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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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Associate secure context with task handle
The secure side context management code now checks that the secure context being saved or restored belongs to the task being switched-out or switched-in respectively. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
This commit is contained in:
Gaurav Aggarwal
Gaurav-Aggarwal-AWS
parent
ccaa0f4d6e
commit
61f7560243
53 changed files with 1796 additions and 1353 deletions
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@ -184,62 +184,65 @@ vClearInterruptMask:
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/*-----------------------------------------------------------*/
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PendSV_Handler:
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mrs r1, psp /* Read PSP in r1. */
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ldr r2, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */
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ldr r0, [r2] /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
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ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */
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ldr r0, [r3] /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
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ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
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ldr r1, [r3] /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */
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mrs r2, psp /* Read PSP in r2. */
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cbz r0, save_ns_context /* No secure context to save. */
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push {r0-r2, r14}
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bl SecureContext_SaveContext
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bl SecureContext_SaveContext /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
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pop {r0-r3} /* LR is now in r3. */
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mov lr, r3 /* LR = r3. */
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lsls r2, r3, #25 /* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
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bpl save_ns_context /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
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lsls r1, r3, #25 /* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
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bpl save_ns_context /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
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ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
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ldr r2, [r3] /* Read pxCurrentTCB. */
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ldr r1, [r3] /* Read pxCurrentTCB. */
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#if ( configENABLE_MPU == 1 )
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subs r1, r1, #16 /* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
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str r1, [r2] /* Save the new top of stack in TCB. */
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mrs r2, psplim /* r2 = PSPLIM. */
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subs r2, r2, #16 /* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
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str r2, [r1] /* Save the new top of stack in TCB. */
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mrs r1, psplim /* r1 = PSPLIM. */
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mrs r3, control /* r3 = CONTROL. */
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mov r4, lr /* r4 = LR/EXC_RETURN. */
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stmia r1!, {r0, r2-r4} /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
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stmia r2!, {r0, r1, r3, r4} /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
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#else /* configENABLE_MPU */
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subs r1, r1, #12 /* Make space for xSecureContext, PSPLIM and LR on the stack. */
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str r1, [r2] /* Save the new top of stack in TCB. */
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mrs r2, psplim /* r2 = PSPLIM. */
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subs r2, r2, #12 /* Make space for xSecureContext, PSPLIM and LR on the stack. */
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str r2, [r1] /* Save the new top of stack in TCB. */
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mrs r1, psplim /* r1 = PSPLIM. */
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mov r3, lr /* r3 = LR/EXC_RETURN. */
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stmia r1!, {r0, r2-r3} /* Store xSecureContext, PSPLIM and LR on the stack. */
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stmia r2!, {r0, r1, r3} /* Store xSecureContext, PSPLIM and LR on the stack. */
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#endif /* configENABLE_MPU */
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b select_next_task
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save_ns_context:
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ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
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ldr r2, [r3] /* Read pxCurrentTCB. */
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ldr r1, [r3] /* Read pxCurrentTCB. */
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#if ( configENABLE_FPU == 1 )
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tst lr, #0x10 /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
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it eq
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vstmdbeq r1!, {s16-s31} /* Store the FPU registers which are not saved automatically. */
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vstmdbeq r2!, {s16-s31} /* Store the FPU registers which are not saved automatically. */
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#endif /* configENABLE_FPU */
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#if ( configENABLE_MPU == 1 )
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subs r1, r1, #48 /* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
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str r1, [r2] /* Save the new top of stack in TCB. */
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adds r1, r1, #16 /* r1 = r1 + 16. */
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stm r1, {r4-r11} /* Store the registers that are not saved automatically. */
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mrs r2, psplim /* r2 = PSPLIM. */
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subs r2, r2, #48 /* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
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str r2, [r1] /* Save the new top of stack in TCB. */
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adds r2, r2, #16 /* r2 = r2 + 16. */
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stm r2, {r4-r11} /* Store the registers that are not saved automatically. */
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mrs r1, psplim /* r1 = PSPLIM. */
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mrs r3, control /* r3 = CONTROL. */
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mov r4, lr /* r4 = LR/EXC_RETURN. */
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subs r1, r1, #16 /* r1 = r1 - 16. */
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stm r1, {r0, r2-r4} /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
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subs r2, r2, #16 /* r2 = r2 - 16. */
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stmia r2!, {r0, r1, r3, r4} /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
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#else /* configENABLE_MPU */
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subs r1, r1, #44 /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
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str r1, [r2] /* Save the new top of stack in TCB. */
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adds r1, r1, #12 /* r1 = r1 + 12. */
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stm r1, {r4-r11} /* Store the registers that are not saved automatically. */
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mrs r2, psplim /* r2 = PSPLIM. */
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subs r2, r2, #44 /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
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str r2, [r1] /* Save the new top of stack in TCB. */
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adds r2, r2, #12 /* r2 = r2 + 12. */
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stm r2, {r4-r11} /* Store the registers that are not saved automatically. */
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mrs r1, psplim /* r1 = PSPLIM. */
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mov r3, lr /* r3 = LR/EXC_RETURN. */
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subs r1, r1, #12 /* r1 = r1 - 12. */
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stmia r1!, {r0, r2-r3} /* Store xSecureContext, PSPLIM and LR on the stack. */
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subs r2, r2, #12 /* r2 = r2 - 12. */
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stmia r2!, {r0, r1, r3} /* Store xSecureContext, PSPLIM and LR on the stack. */
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#endif /* configENABLE_MPU */
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select_next_task:
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@ -251,77 +254,81 @@ PendSV_Handler:
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mov r0, #0 /* r0 = 0. */
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msr basepri, r0 /* Enable interrupts. */
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ldr r2, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
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ldr r3, [r2] /* Read pxCurrentTCB. */
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ldr r1, [r3] /* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */
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ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
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ldr r1, [r3] /* Read pxCurrentTCB. */
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ldr r2, [r1] /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */
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#if ( configENABLE_MPU == 1 )
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dmb /* Complete outstanding transfers before disabling MPU. */
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ldr r2, =0xe000ed94 /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
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ldr r4, [r2] /* Read the value of MPU_CTRL. */
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ldr r3, =0xe000ed94 /* r3 = 0xe000ed94 [Location of MPU_CTRL]. */
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ldr r4, [r3] /* Read the value of MPU_CTRL. */
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bic r4, r4, #1 /* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
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str r4, [r2] /* Disable MPU. */
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str r4, [r3] /* Disable MPU. */
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adds r3, #4 /* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
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ldr r4, [r3] /* r4 = *r3 i.e. r4 = MAIR0. */
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ldr r2, =0xe000edc0 /* r2 = 0xe000edc0 [Location of MAIR0]. */
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str r4, [r2] /* Program MAIR0. */
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ldr r2, =0xe000ed98 /* r2 = 0xe000ed98 [Location of RNR]. */
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adds r1, #4 /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
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ldr r4, [r1] /* r4 = *r1 i.e. r4 = MAIR0. */
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ldr r3, =0xe000edc0 /* r3 = 0xe000edc0 [Location of MAIR0]. */
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str r4, [r3] /* Program MAIR0. */
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ldr r3, =0xe000ed98 /* r3 = 0xe000ed98 [Location of RNR]. */
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movs r4, #4 /* r4 = 4. */
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str r4, [r2] /* Program RNR = 4. */
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adds r3, #4 /* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
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ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */
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ldmia r3!, {r4-r11} /* Read 4 sets of RBAR/RLAR registers from TCB. */
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stmia r2!, {r4-r11} /* Write 4 set of RBAR/RLAR registers using alias registers. */
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str r4, [r3] /* Program RNR = 4. */
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adds r1, #4 /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
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ldr r3, =0xe000ed9c /* r3 = 0xe000ed9c [Location of RBAR]. */
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ldmia r1!, {r4-r11} /* Read 4 sets of RBAR/RLAR registers from TCB. */
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stmia r3!, {r4-r11} /* Write 4 set of RBAR/RLAR registers using alias registers. */
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ldr r2, =0xe000ed94 /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
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ldr r4, [r2] /* Read the value of MPU_CTRL. */
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ldr r3, =0xe000ed94 /* r3 = 0xe000ed94 [Location of MPU_CTRL]. */
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ldr r4, [r3] /* Read the value of MPU_CTRL. */
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orr r4, r4, #1 /* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
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str r4, [r2] /* Enable MPU. */
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str r4, [r3] /* Enable MPU. */
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dsb /* Force memory writes before continuing. */
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#endif /* configENABLE_MPU */
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#if ( configENABLE_MPU == 1 )
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ldmia r1!, {r0, r2-r4} /* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */
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msr psplim, r2 /* Restore the PSPLIM register value for the task. */
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ldmia r2!, {r0, r1, r3, r4} /* Read from stack - r0 = xSecureContext, r1 = PSPLIM, r3 = CONTROL and r4 = LR. */
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msr psplim, r1 /* Restore the PSPLIM register value for the task. */
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msr control, r3 /* Restore the CONTROL register value for the task. */
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mov lr, r4 /* LR = r4. */
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ldr r2, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */
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str r0, [r2] /* Restore the task's xSecureContext. */
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ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */
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str r0, [r3] /* Restore the task's xSecureContext. */
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cbz r0, restore_ns_context /* If there is no secure context for the task, restore the non-secure context. */
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push {r1,r4}
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bl SecureContext_LoadContext /* Restore the secure context. */
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pop {r1,r4}
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ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
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ldr r1, [r3] /* Read pxCurrentTCB. */
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push {r2, r4}
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bl SecureContext_LoadContext /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
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pop {r2, r4}
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mov lr, r4 /* LR = r4. */
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lsls r2, r4, #25 /* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
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bpl restore_ns_context /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
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msr psp, r1 /* Remember the new top of stack for the task. */
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lsls r1, r4, #25 /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
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bpl restore_ns_context /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
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msr psp, r2 /* Remember the new top of stack for the task. */
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bx lr
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#else /* configENABLE_MPU */
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ldmia r1!, {r0, r2-r3} /* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */
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msr psplim, r2 /* Restore the PSPLIM register value for the task. */
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mov lr, r3 /* LR = r3. */
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ldr r2, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */
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str r0, [r2] /* Restore the task's xSecureContext. */
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ldmia r2!, {r0, r1, r4} /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */
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msr psplim, r1 /* Restore the PSPLIM register value for the task. */
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mov lr, r4 /* LR = r4. */
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ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */
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str r0, [r3] /* Restore the task's xSecureContext. */
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cbz r0, restore_ns_context /* If there is no secure context for the task, restore the non-secure context. */
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push {r1,r3}
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bl SecureContext_LoadContext /* Restore the secure context. */
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pop {r1,r3}
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mov lr, r3 /* LR = r3. */
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lsls r2, r3, #25 /* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
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bpl restore_ns_context /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
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msr psp, r1 /* Remember the new top of stack for the task. */
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ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
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ldr r1, [r3] /* Read pxCurrentTCB. */
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push {r2, r4}
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bl SecureContext_LoadContext /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
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pop {r2, r4}
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mov lr, r4 /* LR = r4. */
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lsls r1, r4, #25 /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
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bpl restore_ns_context /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
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msr psp, r2 /* Remember the new top of stack for the task. */
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bx lr
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#endif /* configENABLE_MPU */
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restore_ns_context:
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ldmia r1!, {r4-r11} /* Restore the registers that are not automatically restored. */
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ldmia r2!, {r4-r11} /* Restore the registers that are not automatically restored. */
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#if ( configENABLE_FPU == 1 )
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tst lr, #0x10 /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
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it eq
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vldmiaeq r1!, {s16-s31} /* Restore the FPU registers which are not restored automatically. */
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vldmiaeq r2!, {s16-s31} /* Restore the FPU registers which are not restored automatically. */
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#endif /* configENABLE_FPU */
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msr psp, r1 /* Remember the new top of stack for the task. */
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msr psp, r2 /* Remember the new top of stack for the task. */
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bx lr
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/*-----------------------------------------------------------*/
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@ -335,9 +342,9 @@ SVC_Handler:
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vPortFreeSecureContext:
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/* r0 = uint32_t *pulTCB. */
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ldr r1, [r0] /* The first item in the TCB is the top of the stack. */
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ldr r0, [r1] /* The first item on the stack is the task's xSecureContext. */
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cmp r0, #0 /* Raise svc if task's xSecureContext is not NULL. */
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ldr r2, [r0] /* The first item in the TCB is the top of the stack. */
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ldr r1, [r2] /* The first item on the stack is the task's xSecureContext. */
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cmp r1, #0 /* Raise svc if task's xSecureContext is not NULL. */
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it ne
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svcne 1 /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 1. */
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bx lr /* Return. */
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