From f2d8f66ae3f79c86031bcd615903d56415fc47e0 Mon Sep 17 00:00:00 2001 From: alfred gedeon Date: Thu, 24 Sep 2020 12:35:22 -0700 Subject: [PATCH 1/3] Maintenance: Github workflow URL checker (#179) * Remove non needed spell checks * FreeRTOS Kernel Spelling Update (#170) * FreeRTOS Kernel Spelling Update * Added spell check to kernel repository. * Fixed small spelling errors in various kernel source files. * Added documentation for spellcheck. Note: Only kernel files are checked for spelling, and portable files are ignored. * Fix exit 0 * Remove spell * add echo * Call script from ci * Fix script location * Print pwd * Fix script * Fix script * Remove some lines from script * uncomment lines and fix exit * use bash instead of sh * Move url checker to the action directory * Separate spell and url checkers * Fix bad merge from master * Fix yml file error * Add another step to the url checker Co-authored-by: Carl Lundin <53273776+lundinc2@users.noreply.github.com> --- .github/actions/url_verifier.sh | 59 +++++++++++++++++++++++++++++++++ .github/workflows/ci.yml | 11 +++++- 2 files changed, 69 insertions(+), 1 deletion(-) create mode 100755 .github/actions/url_verifier.sh diff --git a/.github/actions/url_verifier.sh b/.github/actions/url_verifier.sh new file mode 100755 index 000000000..4e9575aa3 --- /dev/null +++ b/.github/actions/url_verifier.sh @@ -0,0 +1,59 @@ +#!/bin/bash - + +PROJECT=$1 +echo "Verifying url links of: ${PROJECT}" +if [ ! -d "$PROJECT" ] +then + echo "Directory passed does not exist" + exit 2 +fi + +SCRIPT_RET=0 + +set -o nounset # Treat unset variables as an error + +declare -A dict + +function test { + while IFS= read -r LINE; do + FILE=$(echo $LINE | cut -f 1 -d ':') + URL=$(echo $LINE | grep -IoE '\b(https?|ftp|file)://[-A-Za-z0-9+&@#/%?=~_|!:,.;]*[-A-Za-z0-9+&@#/%=~_|]') + + # remove trailing / if it exists curl diferenciate between links with + # and without / at the end + # URL=`echo "$URL" | sed 's,/$,,'` + dict+=(["$URL"]="$FILE ") + done < <(grep -e 'https\?://' ${PROJECT} -RIa --exclude='*.exe' --exclude-dir=.git | tr '*' ' ') + + for UNIQ_URL in ${!dict[@]} # loop urls + do + CURL_RES=$(curl -I ${UNIQ_URL} 2>/dev/null| head -n 1 | cut -f 2 -d ' ') + RES=$? + + if [ "${CURL_RES}" == '' -o "${CURL_RES}" != '200' ] + then + echo "URL is: ${UNIQ_URL}" + echo "File names: ${dict[$UNIQ_URL]}" + if [ "${CURL_RES}" == '' ] # curl returned an error + then + CURL_RES=$RES + SCRIPT_RET=1 + elif [ "${CURL_RES}" == '403' ] + then + SCRIPT_RET=1 + fi + echo Result is: "${CURL_RES}" + echo "=================================" + fi + done + + if [ "${SCRIPT_RET}" -eq 0 ] + then + exit 0 + else + exit 1 + fi +} + +test + diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index f6b62a985..593c384f8 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -34,4 +34,13 @@ jobs: else exit 1 fi - + url-check: + runs-on: ubuntu-latest + steps: + - name: Clone This Repo + uses: actions/checkout@v2 + with: + path: ./kernel + - name: URL Checker + run: | + bash kernel/.github/actions/url_verifier.sh kernel From c3117b42374af78f5b4b036bd740b1630c58196a Mon Sep 17 00:00:00 2001 From: "NoMaY (a user of Japan.RenesasRulz.com)" Date: Mon, 28 Sep 2020 16:09:49 +0900 Subject: [PATCH 2/3] Maintenance: Add readme.txt in each Renesas RX folder to show recommended port (#152) * Maintenance: Add readme.txt in each Renesas RX folder to show recomended port * Update readme.txt in each Renesas RX folder regarding to Notes *1 and *2 (both are RX100 port) --- portable/GCC/RX100/readme.txt | 72 +++++++++++++++++++++++ portable/GCC/RX600/readme.txt | 72 +++++++++++++++++++++++ portable/GCC/RX600v2/readme.txt | 72 +++++++++++++++++++++++ portable/GCC/RX700v3_DPFPU/readme.txt | 72 +++++++++++++++++++++++ portable/IAR/RX100/readme.txt | 72 +++++++++++++++++++++++ portable/IAR/RX600/readme.txt | 72 +++++++++++++++++++++++ portable/IAR/RX700v3_DPFPU/readme.txt | 72 +++++++++++++++++++++++ portable/IAR/RXv2/readme.txt | 72 +++++++++++++++++++++++ portable/Renesas/RX100/readme.txt | 72 +++++++++++++++++++++++ portable/Renesas/RX200/readme.txt | 72 +++++++++++++++++++++++ portable/Renesas/RX600/readme.txt | 72 +++++++++++++++++++++++ portable/Renesas/RX600v2/readme.txt | 72 +++++++++++++++++++++++ portable/Renesas/RX700v3_DPFPU/readme.txt | 72 +++++++++++++++++++++++ 13 files changed, 936 insertions(+) create mode 100644 portable/GCC/RX100/readme.txt create mode 100644 portable/GCC/RX600/readme.txt create mode 100644 portable/GCC/RX600v2/readme.txt create mode 100644 portable/GCC/RX700v3_DPFPU/readme.txt create mode 100644 portable/IAR/RX100/readme.txt create mode 100644 portable/IAR/RX600/readme.txt create mode 100644 portable/IAR/RX700v3_DPFPU/readme.txt create mode 100644 portable/IAR/RXv2/readme.txt create mode 100644 portable/Renesas/RX100/readme.txt create mode 100644 portable/Renesas/RX200/readme.txt create mode 100644 portable/Renesas/RX600/readme.txt create mode 100644 portable/Renesas/RX600v2/readme.txt create mode 100644 portable/Renesas/RX700v3_DPFPU/readme.txt diff --git a/portable/GCC/RX100/readme.txt b/portable/GCC/RX100/readme.txt new file mode 100644 index 000000000..9e89a09f6 --- /dev/null +++ b/portable/GCC/RX100/readme.txt @@ -0,0 +1,72 @@ +The following table shows which port is recommended to be used. + + +RX MCU Group CPU FPU FPU Port Layer + Core (Single (Double CC-RX GNURX ICCRX (*6) + Type Precision) Precision) + +RX110 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX111 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX113 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX130 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX13T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 + +RX210 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX21A RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX220 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX230,RX231 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23E-A RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23W RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24U RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 + +RX610 RXv1 Yes --- N/A (*4) N/A (*4) N/A (*4) +RX62N,RX621 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX630 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX634 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63N,RX631 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX64M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX65N,RX651 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX66N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX62T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX62G RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX66T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +RX71M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX72M RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +Notes: + +*1: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is not used, please define configSETUP_TICK_INTERRUPT() (in FreeRTOSConfig.h) and provide +the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems to be +configured to use any CMTn according to the definition of configTICK_VECTOR (in FreeRTOSConfig.h). + +*2: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is used, please modify port.c for the configuration. Please be aware that port.c is +hard coded to use CMT0 though it seems to be configured to use any CMTn according to the definition of +configTICK_VECTOR (in FreeRTOSConfig.h). + +*3: RX100 ports are also available. + +*4: RX600 ports use MVTIPL instruction but RX610 MCUs don't support this instruction. + +*5: RX700v3_DPFPU ports are also available with the following definition in FreeRTOSConfig.h. + +#define configUSE_TASK_DPFPU_SUPPORT 0 + +*6: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port. +It contains two definitions of interrupt priority like the following. + +#define configKERNEL_INTERRUPT_PRIORITY 1 +#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4 + + +For more information about Renesas RX MCUs, please visit the following URL: + +https://www.renesas.com/products/microcontrollers-microprocessors/rx.html + diff --git a/portable/GCC/RX600/readme.txt b/portable/GCC/RX600/readme.txt new file mode 100644 index 000000000..9e89a09f6 --- /dev/null +++ b/portable/GCC/RX600/readme.txt @@ -0,0 +1,72 @@ +The following table shows which port is recommended to be used. + + +RX MCU Group CPU FPU FPU Port Layer + Core (Single (Double CC-RX GNURX ICCRX (*6) + Type Precision) Precision) + +RX110 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX111 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX113 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX130 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX13T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 + +RX210 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX21A RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX220 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX230,RX231 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23E-A RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23W RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24U RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 + +RX610 RXv1 Yes --- N/A (*4) N/A (*4) N/A (*4) +RX62N,RX621 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX630 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX634 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63N,RX631 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX64M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX65N,RX651 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX66N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX62T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX62G RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX66T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +RX71M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX72M RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +Notes: + +*1: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is not used, please define configSETUP_TICK_INTERRUPT() (in FreeRTOSConfig.h) and provide +the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems to be +configured to use any CMTn according to the definition of configTICK_VECTOR (in FreeRTOSConfig.h). + +*2: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is used, please modify port.c for the configuration. Please be aware that port.c is +hard coded to use CMT0 though it seems to be configured to use any CMTn according to the definition of +configTICK_VECTOR (in FreeRTOSConfig.h). + +*3: RX100 ports are also available. + +*4: RX600 ports use MVTIPL instruction but RX610 MCUs don't support this instruction. + +*5: RX700v3_DPFPU ports are also available with the following definition in FreeRTOSConfig.h. + +#define configUSE_TASK_DPFPU_SUPPORT 0 + +*6: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port. +It contains two definitions of interrupt priority like the following. + +#define configKERNEL_INTERRUPT_PRIORITY 1 +#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4 + + +For more information about Renesas RX MCUs, please visit the following URL: + +https://www.renesas.com/products/microcontrollers-microprocessors/rx.html + diff --git a/portable/GCC/RX600v2/readme.txt b/portable/GCC/RX600v2/readme.txt new file mode 100644 index 000000000..9e89a09f6 --- /dev/null +++ b/portable/GCC/RX600v2/readme.txt @@ -0,0 +1,72 @@ +The following table shows which port is recommended to be used. + + +RX MCU Group CPU FPU FPU Port Layer + Core (Single (Double CC-RX GNURX ICCRX (*6) + Type Precision) Precision) + +RX110 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX111 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX113 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX130 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX13T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 + +RX210 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX21A RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX220 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX230,RX231 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23E-A RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23W RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24U RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 + +RX610 RXv1 Yes --- N/A (*4) N/A (*4) N/A (*4) +RX62N,RX621 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX630 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX634 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63N,RX631 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX64M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX65N,RX651 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX66N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX62T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX62G RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX66T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +RX71M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX72M RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +Notes: + +*1: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is not used, please define configSETUP_TICK_INTERRUPT() (in FreeRTOSConfig.h) and provide +the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems to be +configured to use any CMTn according to the definition of configTICK_VECTOR (in FreeRTOSConfig.h). + +*2: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is used, please modify port.c for the configuration. Please be aware that port.c is +hard coded to use CMT0 though it seems to be configured to use any CMTn according to the definition of +configTICK_VECTOR (in FreeRTOSConfig.h). + +*3: RX100 ports are also available. + +*4: RX600 ports use MVTIPL instruction but RX610 MCUs don't support this instruction. + +*5: RX700v3_DPFPU ports are also available with the following definition in FreeRTOSConfig.h. + +#define configUSE_TASK_DPFPU_SUPPORT 0 + +*6: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port. +It contains two definitions of interrupt priority like the following. + +#define configKERNEL_INTERRUPT_PRIORITY 1 +#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4 + + +For more information about Renesas RX MCUs, please visit the following URL: + +https://www.renesas.com/products/microcontrollers-microprocessors/rx.html + diff --git a/portable/GCC/RX700v3_DPFPU/readme.txt b/portable/GCC/RX700v3_DPFPU/readme.txt new file mode 100644 index 000000000..9e89a09f6 --- /dev/null +++ b/portable/GCC/RX700v3_DPFPU/readme.txt @@ -0,0 +1,72 @@ +The following table shows which port is recommended to be used. + + +RX MCU Group CPU FPU FPU Port Layer + Core (Single (Double CC-RX GNURX ICCRX (*6) + Type Precision) Precision) + +RX110 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX111 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX113 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX130 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX13T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 + +RX210 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX21A RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX220 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX230,RX231 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23E-A RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23W RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24U RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 + +RX610 RXv1 Yes --- N/A (*4) N/A (*4) N/A (*4) +RX62N,RX621 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX630 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX634 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63N,RX631 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX64M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX65N,RX651 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX66N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX62T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX62G RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX66T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +RX71M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX72M RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +Notes: + +*1: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is not used, please define configSETUP_TICK_INTERRUPT() (in FreeRTOSConfig.h) and provide +the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems to be +configured to use any CMTn according to the definition of configTICK_VECTOR (in FreeRTOSConfig.h). + +*2: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is used, please modify port.c for the configuration. Please be aware that port.c is +hard coded to use CMT0 though it seems to be configured to use any CMTn according to the definition of +configTICK_VECTOR (in FreeRTOSConfig.h). + +*3: RX100 ports are also available. + +*4: RX600 ports use MVTIPL instruction but RX610 MCUs don't support this instruction. + +*5: RX700v3_DPFPU ports are also available with the following definition in FreeRTOSConfig.h. + +#define configUSE_TASK_DPFPU_SUPPORT 0 + +*6: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port. +It contains two definitions of interrupt priority like the following. + +#define configKERNEL_INTERRUPT_PRIORITY 1 +#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4 + + +For more information about Renesas RX MCUs, please visit the following URL: + +https://www.renesas.com/products/microcontrollers-microprocessors/rx.html + diff --git a/portable/IAR/RX100/readme.txt b/portable/IAR/RX100/readme.txt new file mode 100644 index 000000000..9e89a09f6 --- /dev/null +++ b/portable/IAR/RX100/readme.txt @@ -0,0 +1,72 @@ +The following table shows which port is recommended to be used. + + +RX MCU Group CPU FPU FPU Port Layer + Core (Single (Double CC-RX GNURX ICCRX (*6) + Type Precision) Precision) + +RX110 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX111 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX113 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX130 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX13T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 + +RX210 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX21A RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX220 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX230,RX231 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23E-A RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23W RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24U RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 + +RX610 RXv1 Yes --- N/A (*4) N/A (*4) N/A (*4) +RX62N,RX621 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX630 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX634 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63N,RX631 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX64M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX65N,RX651 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX66N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX62T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX62G RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX66T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +RX71M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX72M RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +Notes: + +*1: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is not used, please define configSETUP_TICK_INTERRUPT() (in FreeRTOSConfig.h) and provide +the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems to be +configured to use any CMTn according to the definition of configTICK_VECTOR (in FreeRTOSConfig.h). + +*2: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is used, please modify port.c for the configuration. Please be aware that port.c is +hard coded to use CMT0 though it seems to be configured to use any CMTn according to the definition of +configTICK_VECTOR (in FreeRTOSConfig.h). + +*3: RX100 ports are also available. + +*4: RX600 ports use MVTIPL instruction but RX610 MCUs don't support this instruction. + +*5: RX700v3_DPFPU ports are also available with the following definition in FreeRTOSConfig.h. + +#define configUSE_TASK_DPFPU_SUPPORT 0 + +*6: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port. +It contains two definitions of interrupt priority like the following. + +#define configKERNEL_INTERRUPT_PRIORITY 1 +#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4 + + +For more information about Renesas RX MCUs, please visit the following URL: + +https://www.renesas.com/products/microcontrollers-microprocessors/rx.html + diff --git a/portable/IAR/RX600/readme.txt b/portable/IAR/RX600/readme.txt new file mode 100644 index 000000000..9e89a09f6 --- /dev/null +++ b/portable/IAR/RX600/readme.txt @@ -0,0 +1,72 @@ +The following table shows which port is recommended to be used. + + +RX MCU Group CPU FPU FPU Port Layer + Core (Single (Double CC-RX GNURX ICCRX (*6) + Type Precision) Precision) + +RX110 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX111 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX113 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX130 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX13T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 + +RX210 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX21A RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX220 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX230,RX231 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23E-A RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23W RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24U RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 + +RX610 RXv1 Yes --- N/A (*4) N/A (*4) N/A (*4) +RX62N,RX621 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX630 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX634 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63N,RX631 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX64M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX65N,RX651 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX66N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX62T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX62G RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX66T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +RX71M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX72M RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +Notes: + +*1: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is not used, please define configSETUP_TICK_INTERRUPT() (in FreeRTOSConfig.h) and provide +the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems to be +configured to use any CMTn according to the definition of configTICK_VECTOR (in FreeRTOSConfig.h). + +*2: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is used, please modify port.c for the configuration. Please be aware that port.c is +hard coded to use CMT0 though it seems to be configured to use any CMTn according to the definition of +configTICK_VECTOR (in FreeRTOSConfig.h). + +*3: RX100 ports are also available. + +*4: RX600 ports use MVTIPL instruction but RX610 MCUs don't support this instruction. + +*5: RX700v3_DPFPU ports are also available with the following definition in FreeRTOSConfig.h. + +#define configUSE_TASK_DPFPU_SUPPORT 0 + +*6: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port. +It contains two definitions of interrupt priority like the following. + +#define configKERNEL_INTERRUPT_PRIORITY 1 +#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4 + + +For more information about Renesas RX MCUs, please visit the following URL: + +https://www.renesas.com/products/microcontrollers-microprocessors/rx.html + diff --git a/portable/IAR/RX700v3_DPFPU/readme.txt b/portable/IAR/RX700v3_DPFPU/readme.txt new file mode 100644 index 000000000..9e89a09f6 --- /dev/null +++ b/portable/IAR/RX700v3_DPFPU/readme.txt @@ -0,0 +1,72 @@ +The following table shows which port is recommended to be used. + + +RX MCU Group CPU FPU FPU Port Layer + Core (Single (Double CC-RX GNURX ICCRX (*6) + Type Precision) Precision) + +RX110 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX111 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX113 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX130 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX13T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 + +RX210 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX21A RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX220 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX230,RX231 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23E-A RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23W RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24U RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 + +RX610 RXv1 Yes --- N/A (*4) N/A (*4) N/A (*4) +RX62N,RX621 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX630 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX634 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63N,RX631 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX64M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX65N,RX651 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX66N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX62T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX62G RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX66T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +RX71M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX72M RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +Notes: + +*1: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is not used, please define configSETUP_TICK_INTERRUPT() (in FreeRTOSConfig.h) and provide +the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems to be +configured to use any CMTn according to the definition of configTICK_VECTOR (in FreeRTOSConfig.h). + +*2: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is used, please modify port.c for the configuration. Please be aware that port.c is +hard coded to use CMT0 though it seems to be configured to use any CMTn according to the definition of +configTICK_VECTOR (in FreeRTOSConfig.h). + +*3: RX100 ports are also available. + +*4: RX600 ports use MVTIPL instruction but RX610 MCUs don't support this instruction. + +*5: RX700v3_DPFPU ports are also available with the following definition in FreeRTOSConfig.h. + +#define configUSE_TASK_DPFPU_SUPPORT 0 + +*6: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port. +It contains two definitions of interrupt priority like the following. + +#define configKERNEL_INTERRUPT_PRIORITY 1 +#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4 + + +For more information about Renesas RX MCUs, please visit the following URL: + +https://www.renesas.com/products/microcontrollers-microprocessors/rx.html + diff --git a/portable/IAR/RXv2/readme.txt b/portable/IAR/RXv2/readme.txt new file mode 100644 index 000000000..9e89a09f6 --- /dev/null +++ b/portable/IAR/RXv2/readme.txt @@ -0,0 +1,72 @@ +The following table shows which port is recommended to be used. + + +RX MCU Group CPU FPU FPU Port Layer + Core (Single (Double CC-RX GNURX ICCRX (*6) + Type Precision) Precision) + +RX110 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX111 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX113 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX130 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX13T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 + +RX210 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX21A RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX220 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX230,RX231 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23E-A RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23W RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24U RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 + +RX610 RXv1 Yes --- N/A (*4) N/A (*4) N/A (*4) +RX62N,RX621 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX630 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX634 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63N,RX631 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX64M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX65N,RX651 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX66N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX62T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX62G RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX66T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +RX71M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX72M RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +Notes: + +*1: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is not used, please define configSETUP_TICK_INTERRUPT() (in FreeRTOSConfig.h) and provide +the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems to be +configured to use any CMTn according to the definition of configTICK_VECTOR (in FreeRTOSConfig.h). + +*2: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is used, please modify port.c for the configuration. Please be aware that port.c is +hard coded to use CMT0 though it seems to be configured to use any CMTn according to the definition of +configTICK_VECTOR (in FreeRTOSConfig.h). + +*3: RX100 ports are also available. + +*4: RX600 ports use MVTIPL instruction but RX610 MCUs don't support this instruction. + +*5: RX700v3_DPFPU ports are also available with the following definition in FreeRTOSConfig.h. + +#define configUSE_TASK_DPFPU_SUPPORT 0 + +*6: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port. +It contains two definitions of interrupt priority like the following. + +#define configKERNEL_INTERRUPT_PRIORITY 1 +#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4 + + +For more information about Renesas RX MCUs, please visit the following URL: + +https://www.renesas.com/products/microcontrollers-microprocessors/rx.html + diff --git a/portable/Renesas/RX100/readme.txt b/portable/Renesas/RX100/readme.txt new file mode 100644 index 000000000..9e89a09f6 --- /dev/null +++ b/portable/Renesas/RX100/readme.txt @@ -0,0 +1,72 @@ +The following table shows which port is recommended to be used. + + +RX MCU Group CPU FPU FPU Port Layer + Core (Single (Double CC-RX GNURX ICCRX (*6) + Type Precision) Precision) + +RX110 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX111 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX113 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX130 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX13T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 + +RX210 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX21A RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX220 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX230,RX231 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23E-A RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23W RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24U RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 + +RX610 RXv1 Yes --- N/A (*4) N/A (*4) N/A (*4) +RX62N,RX621 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX630 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX634 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63N,RX631 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX64M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX65N,RX651 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX66N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX62T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX62G RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX66T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +RX71M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX72M RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +Notes: + +*1: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is not used, please define configSETUP_TICK_INTERRUPT() (in FreeRTOSConfig.h) and provide +the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems to be +configured to use any CMTn according to the definition of configTICK_VECTOR (in FreeRTOSConfig.h). + +*2: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is used, please modify port.c for the configuration. Please be aware that port.c is +hard coded to use CMT0 though it seems to be configured to use any CMTn according to the definition of +configTICK_VECTOR (in FreeRTOSConfig.h). + +*3: RX100 ports are also available. + +*4: RX600 ports use MVTIPL instruction but RX610 MCUs don't support this instruction. + +*5: RX700v3_DPFPU ports are also available with the following definition in FreeRTOSConfig.h. + +#define configUSE_TASK_DPFPU_SUPPORT 0 + +*6: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port. +It contains two definitions of interrupt priority like the following. + +#define configKERNEL_INTERRUPT_PRIORITY 1 +#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4 + + +For more information about Renesas RX MCUs, please visit the following URL: + +https://www.renesas.com/products/microcontrollers-microprocessors/rx.html + diff --git a/portable/Renesas/RX200/readme.txt b/portable/Renesas/RX200/readme.txt new file mode 100644 index 000000000..9e89a09f6 --- /dev/null +++ b/portable/Renesas/RX200/readme.txt @@ -0,0 +1,72 @@ +The following table shows which port is recommended to be used. + + +RX MCU Group CPU FPU FPU Port Layer + Core (Single (Double CC-RX GNURX ICCRX (*6) + Type Precision) Precision) + +RX110 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX111 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX113 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX130 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX13T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 + +RX210 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX21A RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX220 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX230,RX231 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23E-A RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23W RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24U RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 + +RX610 RXv1 Yes --- N/A (*4) N/A (*4) N/A (*4) +RX62N,RX621 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX630 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX634 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63N,RX631 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX64M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX65N,RX651 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX66N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX62T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX62G RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX66T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +RX71M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX72M RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +Notes: + +*1: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is not used, please define configSETUP_TICK_INTERRUPT() (in FreeRTOSConfig.h) and provide +the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems to be +configured to use any CMTn according to the definition of configTICK_VECTOR (in FreeRTOSConfig.h). + +*2: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is used, please modify port.c for the configuration. Please be aware that port.c is +hard coded to use CMT0 though it seems to be configured to use any CMTn according to the definition of +configTICK_VECTOR (in FreeRTOSConfig.h). + +*3: RX100 ports are also available. + +*4: RX600 ports use MVTIPL instruction but RX610 MCUs don't support this instruction. + +*5: RX700v3_DPFPU ports are also available with the following definition in FreeRTOSConfig.h. + +#define configUSE_TASK_DPFPU_SUPPORT 0 + +*6: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port. +It contains two definitions of interrupt priority like the following. + +#define configKERNEL_INTERRUPT_PRIORITY 1 +#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4 + + +For more information about Renesas RX MCUs, please visit the following URL: + +https://www.renesas.com/products/microcontrollers-microprocessors/rx.html + diff --git a/portable/Renesas/RX600/readme.txt b/portable/Renesas/RX600/readme.txt new file mode 100644 index 000000000..9e89a09f6 --- /dev/null +++ b/portable/Renesas/RX600/readme.txt @@ -0,0 +1,72 @@ +The following table shows which port is recommended to be used. + + +RX MCU Group CPU FPU FPU Port Layer + Core (Single (Double CC-RX GNURX ICCRX (*6) + Type Precision) Precision) + +RX110 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX111 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX113 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX130 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX13T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 + +RX210 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX21A RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX220 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX230,RX231 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23E-A RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23W RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24U RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 + +RX610 RXv1 Yes --- N/A (*4) N/A (*4) N/A (*4) +RX62N,RX621 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX630 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX634 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63N,RX631 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX64M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX65N,RX651 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX66N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX62T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX62G RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX66T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +RX71M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX72M RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +Notes: + +*1: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is not used, please define configSETUP_TICK_INTERRUPT() (in FreeRTOSConfig.h) and provide +the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems to be +configured to use any CMTn according to the definition of configTICK_VECTOR (in FreeRTOSConfig.h). + +*2: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is used, please modify port.c for the configuration. Please be aware that port.c is +hard coded to use CMT0 though it seems to be configured to use any CMTn according to the definition of +configTICK_VECTOR (in FreeRTOSConfig.h). + +*3: RX100 ports are also available. + +*4: RX600 ports use MVTIPL instruction but RX610 MCUs don't support this instruction. + +*5: RX700v3_DPFPU ports are also available with the following definition in FreeRTOSConfig.h. + +#define configUSE_TASK_DPFPU_SUPPORT 0 + +*6: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port. +It contains two definitions of interrupt priority like the following. + +#define configKERNEL_INTERRUPT_PRIORITY 1 +#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4 + + +For more information about Renesas RX MCUs, please visit the following URL: + +https://www.renesas.com/products/microcontrollers-microprocessors/rx.html + diff --git a/portable/Renesas/RX600v2/readme.txt b/portable/Renesas/RX600v2/readme.txt new file mode 100644 index 000000000..9e89a09f6 --- /dev/null +++ b/portable/Renesas/RX600v2/readme.txt @@ -0,0 +1,72 @@ +The following table shows which port is recommended to be used. + + +RX MCU Group CPU FPU FPU Port Layer + Core (Single (Double CC-RX GNURX ICCRX (*6) + Type Precision) Precision) + +RX110 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX111 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX113 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX130 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX13T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 + +RX210 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX21A RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX220 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX230,RX231 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23E-A RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23W RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24U RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 + +RX610 RXv1 Yes --- N/A (*4) N/A (*4) N/A (*4) +RX62N,RX621 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX630 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX634 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63N,RX631 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX64M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX65N,RX651 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX66N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX62T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX62G RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX66T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +RX71M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX72M RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +Notes: + +*1: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is not used, please define configSETUP_TICK_INTERRUPT() (in FreeRTOSConfig.h) and provide +the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems to be +configured to use any CMTn according to the definition of configTICK_VECTOR (in FreeRTOSConfig.h). + +*2: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is used, please modify port.c for the configuration. Please be aware that port.c is +hard coded to use CMT0 though it seems to be configured to use any CMTn according to the definition of +configTICK_VECTOR (in FreeRTOSConfig.h). + +*3: RX100 ports are also available. + +*4: RX600 ports use MVTIPL instruction but RX610 MCUs don't support this instruction. + +*5: RX700v3_DPFPU ports are also available with the following definition in FreeRTOSConfig.h. + +#define configUSE_TASK_DPFPU_SUPPORT 0 + +*6: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port. +It contains two definitions of interrupt priority like the following. + +#define configKERNEL_INTERRUPT_PRIORITY 1 +#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4 + + +For more information about Renesas RX MCUs, please visit the following URL: + +https://www.renesas.com/products/microcontrollers-microprocessors/rx.html + diff --git a/portable/Renesas/RX700v3_DPFPU/readme.txt b/portable/Renesas/RX700v3_DPFPU/readme.txt new file mode 100644 index 000000000..9e89a09f6 --- /dev/null +++ b/portable/Renesas/RX700v3_DPFPU/readme.txt @@ -0,0 +1,72 @@ +The following table shows which port is recommended to be used. + + +RX MCU Group CPU FPU FPU Port Layer + Core (Single (Double CC-RX GNURX ICCRX (*6) + Type Precision) Precision) + +RX110 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX111 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX113 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX130 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) +RX13T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 + +RX210 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX21A RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX220 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) +RX230,RX231 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23E-A RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23W RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX23T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX24U RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 + +RX610 RXv1 Yes --- N/A (*4) N/A (*4) N/A (*4) +RX62N,RX621 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX630 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX634 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63N,RX631 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX64M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX65N,RX651 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX66N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX62T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX62G RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX63T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 +RX66T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +RX71M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 +RX72M RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU +RX72T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) + +Notes: + +*1: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is not used, please define configSETUP_TICK_INTERRUPT() (in FreeRTOSConfig.h) and provide +the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems to be +configured to use any CMTn according to the definition of configTICK_VECTOR (in FreeRTOSConfig.h). + +*2: If the application writer wants to use their own tick interrupt configuration when tickless idle +functionality is used, please modify port.c for the configuration. Please be aware that port.c is +hard coded to use CMT0 though it seems to be configured to use any CMTn according to the definition of +configTICK_VECTOR (in FreeRTOSConfig.h). + +*3: RX100 ports are also available. + +*4: RX600 ports use MVTIPL instruction but RX610 MCUs don't support this instruction. + +*5: RX700v3_DPFPU ports are also available with the following definition in FreeRTOSConfig.h. + +#define configUSE_TASK_DPFPU_SUPPORT 0 + +*6: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port. +It contains two definitions of interrupt priority like the following. + +#define configKERNEL_INTERRUPT_PRIORITY 1 +#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4 + + +For more information about Renesas RX MCUs, please visit the following URL: + +https://www.renesas.com/products/microcontrollers-microprocessors/rx.html + From 2225bb5620c883211b2afc3dab404bafbc07dd0f Mon Sep 17 00:00:00 2001 From: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Date: Mon, 28 Sep 2020 00:16:18 -0700 Subject: [PATCH 3/3] Fix Stack alignment for Microchip PIC32MX port (#182) * Fix Stack alignment for Microchip PIC32MX port The stack of a task was not 8 byte aligned. Adding one more unused space at the beginning of task stack (before simulated context) ensures that the stack is 8 byte aligned. The stack (with simulated context) of a newly created task looks like the following: +------------+ | UNUSED | +------------+ | UNUSED | +------------+ | 0xDEADBEEF | +------------+ | 0x12345678 | ^ +------------+ | | CAUSE | <-- SP After Context Restore | +------------+ | | STATUS | | +------------+ | | EPC | | +------------+ | | ra | | +------------+ | | s8 | | +------------+ | | t9 | | +------------+ | | t8 | | +------------+ | | t7 | | +------------+ | | t6 | | +------------+ | | t5 | | +------------+ | | t4 | | +------------+ | | t3 | | +------------+ | | t2 | | +------------+ | | t1 | | +------------+ Context | | t0 | (132 bytes) | +------------+ | | a3 | | +------------+ | | a2 | | +------------+ | | a1 | | +------------+ | | a0 | | +------------+ | | v1 | | +------------+ | | v0 | | +------------+ | | s7 | | +------------+ | | s6 | | +------------+ | | s5 | | +------------+ | | s4 | | +------------+ | | s3 | | +------------+ | | s2 | | +------------+ | | s1 | | +------------+ | | s0 | | +------------+ | | at | | +------------+ | | HI | | +------------+ | | LO | | +------------+ V | | +------------+ | | <-- SP After Context Save +------------+ Signed-off-by: Gaurav Aggarwal * Update comment Signed-off-by: Gaurav Aggarwal --- portable/MPLAB/PIC32MX/port.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/portable/MPLAB/PIC32MX/port.c b/portable/MPLAB/PIC32MX/port.c index fa5c3d414..386b98b0f 100644 --- a/portable/MPLAB/PIC32MX/port.c +++ b/portable/MPLAB/PIC32MX/port.c @@ -159,7 +159,9 @@ const StackType_t * const xISRStackTop = &( xISRStack[ ( configISR_STACK_SIZE & */ StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) { - /* Ensure byte alignment is maintained when leaving this function. */ + /* Ensure 8 byte alignment is maintained when the context is popped from + * stack. The size of the context is 33 words (132 bytes). */ + pxTopOfStack--; pxTopOfStack--; *pxTopOfStack = (StackType_t) 0xDEADBEEF;