diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/AtmelFiles/libboard_sama5d3x-ek/resources/ewarm/sama5d3x/sram.icf b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/AtmelFiles/libboard_sama5d3x-ek/resources/ewarm/sama5d3x/sram.icf
index cae1fd6ce..f1dc6f99b 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/AtmelFiles/libboard_sama5d3x-ek/resources/ewarm/sama5d3x/sram.icf
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/AtmelFiles/libboard_sama5d3x-ek/resources/ewarm/sama5d3x/sram.icf
@@ -6,8 +6,8 @@ define symbol __ICFEDIT_region_RAM_start__ = 0x300000;
define symbol __ICFEDIT_region_RAM_end__ = 0x31FFFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_vectors__ = 0x100;
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_sysstack__ = 0x600;
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+/*define symbol __ICFEDIT_size_sysstack__ = 0x600; Not used. */
define symbol __ICFEDIT_size_irqstack__ = 0x600;
define symbol __ICFEDIT_size_heap__ = 0x0;
/*-Exports-*/
@@ -15,7 +15,7 @@ export symbol __ICFEDIT_region_RAM_start__;
export symbol __ICFEDIT_region_RAM_end__;
export symbol __ICFEDIT_size_vectors__;
export symbol __ICFEDIT_size_cstack__;
-export symbol __ICFEDIT_size_sysstack__;
+/*export symbol __ICFEDIT_size_sysstack__; Not used. */
export symbol __ICFEDIT_size_irqstack__;
export symbol __ICFEDIT_size_heap__;
/**** End of ICF editor section. ###ICF###*/
@@ -25,14 +25,14 @@ define region VEC_region = mem:[from __ICFEDIT_region_RAM_start__ size __ICFEDIT
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
-define block SYS_STACK with alignment = 8, size = __ICFEDIT_size_sysstack__ { };
+/* define block SYS_STACK with alignment = 8, size = __ICFEDIT_size_sysstack__ { }; not used. */
define block IRQ_STACK with alignment = 8, size = __ICFEDIT_size_irqstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
-initialize by copy with packing=none { readwrite };
+initialize by copy with packing=none { readwrite };
do not initialize { readonly section .noinit };
place in VEC_region { section .vectors };
place in RAM_region { readonly };
place in RAM_region { section .cstartup };
-place in RAM_region { readwrite, block IRQ_STACK, block SYS_STACK, block CSTACK, block HEAP };
+place in RAM_region { readwrite, block IRQ_STACK, /* block SYS_STACK not used, */ block CSTACK, block HEAP };
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/AtmelFiles/libboard_sama5d3x-ek/source/board_lowlevel.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/AtmelFiles/libboard_sama5d3x-ek/source/board_lowlevel.c
index 64660bfe4..c6a2fa6b9 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/AtmelFiles/libboard_sama5d3x-ek/source/board_lowlevel.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/AtmelFiles/libboard_sama5d3x-ek/source/board_lowlevel.c
@@ -108,6 +108,7 @@ extern WEAK void LowLevelInit( void )
/* Wait for the PCKRDY1 bit to be set in the PMC_SR register*/
while ((REG_PMC_SR & PMC_SR_PCKRDY1) == 0);
#endif
+
/* select FIQ */
AIC->AIC_SSR = 0;
AIC->AIC_SVR = (unsigned int) defaultFiqHandler;
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/AtmelFiles/usb/common/core/USBDescriptors.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/AtmelFiles/usb/common/core/USBDescriptors.c
index 110d3e04a..80cd4e0c0 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/AtmelFiles/usb/common/core/USBDescriptors.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/AtmelFiles/usb/common/core/USBDescriptors.c
@@ -186,8 +186,8 @@ uint8_t *pc1, *pc2;
usTemp = ( ( *pc2 ) << 8 ) | *pc1;
return usTemp;
-#warning The original code below crashes when build for A5 as endpoint can be misaligned.
- //_RB_return endpoint->wMaxPacketSize;
+#warning The above code replaces the line below to ensure aborts are not received due to unaligned accesses. Alternatively use the --no_unaligned_access compiler option.
+ //return endpoint->wMaxPacketSize;
}
/**
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/CDCCommandConsole.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/CDCCommandConsole.c
index 3cb73a4c6..f80639014 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/CDCCommandConsole.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/CDCCommandConsole.c
@@ -124,7 +124,7 @@ extern void USBD_IrqHandler( void );
/*
* The function that creates the CLI task.
*/
-void vUARTCommandConsoleStart( uint16_t usStackSize, UBaseType_t uxPriority );
+void vUSBCommandConsoleStart( uint16_t usStackSize, UBaseType_t uxPriority );
/*
* Send xDataLength bytes from pcData to the CDC port.
@@ -178,7 +178,7 @@ static EventGroupHandle_t xCDCEventBits;
/*-----------------------------------------------------------*/
-void vUARTCommandConsoleStart( uint16_t usStackSize, UBaseType_t uxPriority )
+void vUSBCommandConsoleStart( uint16_t usStackSize, UBaseType_t uxPriority )
{
/* Event group used to indicate that bytes are available in the Rx buffer
or that bytes have finished sending. */
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/FreeRTOSConfig.h
index afa4c9380..0aada96ee 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/FreeRTOSConfig.h
@@ -86,8 +86,8 @@
#define configUSE_IDLE_HOOK 1
#define configUSE_TICK_HOOK 1
#define configMAX_PRIORITIES ( 5 )
-#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 160 )
-#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 45 * 1024 ) )
+#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 150 )
+#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 42 * 1024 ) )
#define configMAX_TASK_NAME_LEN ( 10 )
#define configUSE_TRACE_FACILITY 1
#define configUSE_16_BIT_TICKS 0
@@ -156,7 +156,7 @@ used. */
and one on TCP/IP). This is done to prevent an output buffer being defined by
each implementation - which would waste RAM. In this case, there is only one
command interpreter running. */
- #define configCOMMAND_INT_MAX_OUTPUT_SIZE 2096
+ #define configCOMMAND_INT_MAX_OUTPUT_SIZE 3000
/* Normal assert() semantics without relying on the provision of an assert.h
header file. */
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/FreeRTOS_tick_config.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/FreeRTOS_tick_config.c
index e90c521f7..9e1417ad5 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/FreeRTOS_tick_config.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/FreeRTOS_tick_config.c
@@ -88,8 +88,6 @@ static void System_Handler( void );
static void System_Handler( void )
{
- __enable_interrupt();
-
/* See the comments above the function prototype in this file. */
FreeRTOS_Tick_Handler();
}
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/IntQueueTimer.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/IntQueueTimer.c
index 8a11f5f5a..2e497aa88 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/IntQueueTimer.c
@@ -71,15 +71,16 @@
* interrupts. As the interrupt is shared the nesting achieved is not as deep
* as normal when this test is executed, but still worth while.
*
- * TC2 channel 0 provides a much higher frequency timer that tests the nesting of
- * interrupts that execute above the maximum syscall interrupt priority.
+ * TC2 channel 0 provides a much higher frequency timer that tests the nesting
+ * of interrupts that don't use the FreeRTOS API. For convenience, the high
+ * frequency timer also keeps a count of the number of time it executes, and the
+ * count is used as the time base for the run time stats (which can be viewed
+ * through the CLI).
*
* All the timers can nest with the tick interrupt - creating a maximum
* interrupt nesting depth of 3 (normally 4, if the first two timers used
* separate interrupts).
*
- * For convenience, the high frequency timer is also used to provide the time
- * base for the run time stats.
*/
/* Scheduler includes. */
@@ -96,7 +97,6 @@
ensure they don't remain synchronised. The frequency of the highest priority
interrupt is 20 times faster so really hammers the interrupt entry and exit
code. */
-#define tmrTIMERS_USED 3
#define tmrTIMER_0_FREQUENCY ( 2000UL )
#define tmrTIMER_1_FREQUENCY ( 2003UL )
#define tmrTIMER_2_FREQUENCY ( 20000UL )
@@ -115,7 +115,8 @@ of the lower frequency timers must still be above the tick interrupt priority. *
#define tmrHIGHER_PRIORITY 5
/*-----------------------------------------------------------*/
-/* Handlers for the three timer channels. */
+/* Handlers for the two timer peripherals - two channels are used in the TC0
+timer. */
static void prvTC0_Handler( void );
static void prvTC1_Handler( void );
@@ -169,9 +170,6 @@ const uint32_t ulDivider = 128UL, ulTCCLKS = 3UL;
static void prvTC0_Handler( void )
{
-#warning Why can interrupts only be enabled inside the C function?
- __enable_interrupt();
-
/* Read will clear the status bit. */
if( ( TC0->TC_CHANNEL[ tmrTC0_CHANNEL_0 ].TC_SR & tmrRC_COMPARE ) != 0 )
{
@@ -189,8 +187,6 @@ static void prvTC1_Handler( void )
{
volatile uint32_t ulDummy;
- __enable_interrupt();
-
/* Dummy read to clear status bit. */
ulDummy = TC1->TC_CHANNEL[ tmrTC1_CHANNEL_0 ].TC_SR;
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/main_full.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/main_full.c
index 1eff84509..b99b2ef5c 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/main_full.c
@@ -84,13 +84,12 @@
* In addition to the standard demo tasks, the following tasks and tests are
* defined and/or created within this file:
*
- * FreeRTOS+CLI command console. The command console is access through the
- * UART to USB connector on the _RB_. For
- * reasons of robustness testing the UART driver is deliberately written to be
- * inefficient and should not be used as a template for a production driver.
- * Type "help" to see a list of registered commands. The FreeRTOS+CLI license
- * is different to the FreeRTOS license, see http://www.FreeRTOS.org/cli for
- * license and usage details. The default baud rate is 115200.
+ * "FreeRTOS+CLI command console" - The command console is access using the USB
+ * CDC driver provided by Atmel. It is accessed through the USB connector
+ * marked J6 SAMA5D3 Xplained board. Type "help" to see a list of registered
+ * commands. The FreeRTOS+CLI license is different to the FreeRTOS license, see
+ * http://www.FreeRTOS.org/cli for license and usage details. The default baud
+ * rate is 115200.
*
* "Reg test" tasks - These fill both the core and floating point registers with
* known values, then check that each register maintains its expected value for
@@ -143,12 +142,12 @@
#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2UL )
#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3UL )
#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY )
-#define mainUART_COMMAND_CONSOLE_STACK_SIZE ( configMINIMAL_STACK_SIZE * 3UL )
+#define mainCDC_COMMAND_CONSOLE_STACK_SIZE ( configMINIMAL_STACK_SIZE * 2UL )
#define mainCOM_TEST_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainCHECK_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
#define mainQUEUE_OVERWRITE_PRIORITY ( tskIDLE_PRIORITY )
-/* The priority used by the UART command console task. */
+/* The initial priority used by the UART command console task. */
#define mainUART_COMMAND_CONSOLE_TASK_PRIORITY ( configMAX_PRIORITIES - 2 )
/* The LED used by the check timer. */
@@ -209,7 +208,7 @@ extern void vRegisterSampleCLICommands( void );
/*
* The task that manages the FreeRTOS+CLI input and output.
*/
-extern void vUARTCommandConsoleStart( uint16_t usStackSize, UBaseType_t uxPriority );
+extern void vUSBCommandConsoleStart( uint16_t usStackSize, UBaseType_t uxPriority );
/*
* A high priority task that does nothing other than execute at a pseudo random
@@ -227,7 +226,7 @@ stops incrementing, then an error has been found. */
volatile unsigned long ulRegTest1LoopCounter = 0UL, ulRegTest2LoopCounter = 0UL;
/*-----------------------------------------------------------*/
-#warning Check demo and source folders for _RB_
+
void main_full( void )
{
/* Start all the other standard demo/test tasks. They have not particular
@@ -248,7 +247,7 @@ void main_full( void )
/* Start the tasks that implements the command console on the UART, as
described above. */
- vUARTCommandConsoleStart( mainUART_COMMAND_CONSOLE_STACK_SIZE, mainUART_COMMAND_CONSOLE_TASK_PRIORITY );
+ vUSBCommandConsoleStart( mainCDC_COMMAND_CONSOLE_STACK_SIZE, mainUART_COMMAND_CONSOLE_TASK_PRIORITY );
/* Register the standard CLI commands. */
vRegisterSampleCLICommands();
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/RTOSDemo.ewd b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/RTOSDemo.ewd
index 604ac47a9..f1ac72d9c 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/RTOSDemo.ewd
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/RTOSDemo.ewd
@@ -49,7 +49,7 @@
MemFile
- $TOOLKIT_DIR$\CONFIG\debugger\Atmel\ATSAMA5D35.ddf
RunToEnable
@@ -1303,7 +1303,7 @@
$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
- 0
+ 1
$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/RTOSDemo.ewp b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/RTOSDemo.ewp
index df27bd85a..4a2a07c4b 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/RTOSDemo.ewp
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/RTOSDemo.ewp
@@ -39,20 +39,20 @@
Input variant
3
- 6
+ 7
Input description
- No specifier n, no float nor long long, no scan set, no assignment suppressing.
+ No specifier n, no float nor long long, no scan set, no assignment suppressing, without multibyte support.
Output variant
2
- 5
+ 7
Output description
- No specifier a, A, no specifier n, no float nor long long.
+ No specifier a, A, no specifier n, no float nor long long, no flags.
GOutputBinary
@@ -1185,9 +1185,6 @@
$PROJ_DIR$\..\..\..\FreeRTOS-Plus\Demo\Common\FreeRTOS_Plus_CLI_Demos\Sample-CLI-commands.c
-
- $PROJ_DIR$\atmel_main.c
-
$PROJ_DIR$\cstartup_with_FreeRTOS_vectors.s
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/atmel_main.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/atmel_main.c
deleted file mode 100644
index 7d50230d4..000000000
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/atmel_main.c
+++ /dev/null
@@ -1,434 +0,0 @@
-/* ----------------------------------------------------------------------------
- * SAM Software Package License
- * ----------------------------------------------------------------------------
- * Copyright (c) 2014, Atmel Corporation
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * - Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the disclaimer below.
- *
- * Atmel's name may not be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
- * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- * ----------------------------------------------------------------------------
- */
-
-
-/**
- * \page getting-started Getting Started with sama5d3 Microcontrollers
- *
- * \section Purpose
- *
- * The Getting Started example will help new users get familiar with Atmel's
- * sama5d3x microcontroller. This basic application shows the startup
- * sequence of a chip and how to use its core peripherals.
- *
- * \section Requirements
- *
- * This package can be used with sama5d3 xplained board.
- *
- * \section Description
- *
- * The demonstration program makes two LEDs on the board blink at a fixed rate.
- * This rate is generated by using Time tick timer. The blinking can be stopped
- * using two buttons (one for each LED). If there is no enough buttons on board, please
- * type "1" or "2" in the terminal application on PC to control the LEDs
- * instead.
- *
- * \section Usage
- *
- * -# Build the program and download it inside the xplained board. Please
- * refer to the
- *
- * SAM-BA User Guide , the
- *
- * GNU-Based Software Development
- * application note or to the
- *
- * IAR EWARM User Guide ,
- * depending on your chosen solution.
- * -# On the computer, open and configure a terminal application
- * (e.g. HyperTerminal on Microsoft Windows) with these settings:
- * - 115200 bauds
- * - 8 bits of data
- * - No parity
- * - 1 stop bit
- * - No flow control
- * -# Start the application.
- * -# Two LEDs should start blinking on the board. In the terminal window, the
- * following text should appear (values depend on the board and chip used):
- * \code
- * -- Getting Started Example xxx --
- * -- SAMxxxxx-xx
- * -- Compiled: xxx xx xxxx xx:xx:xx --
- * \endcode
- * -# Pressing and release button 1 or type "1" in the terminal application on
- * PC should make the first LED stop & restart blinking.
- * Pressing and release button 2 or type "1" in the terminal application on
- * PC should make the other LED stop & restart blinking.
- *
- * \section References
- * - getting-started/main.c
- * - pio.h
- * - pio_it.h
- * - led.h
- * - trace.h
- */
-
-/** \file
- *
- * This file contains all the specific code for the getting-started example.
- *
- */
-
-/*----------------------------------------------------------------------------
- * Headers
- *----------------------------------------------------------------------------*/
-
-#include "board.h"
-
-#include
-#include
-
-/*----------------------------------------------------------------------------
- * Local definitions
- *----------------------------------------------------------------------------*/
-
-#define NO_PUSHBUTTON
-
-/** IRQ priority for PIO (The lower the value, the greater the priority) */
-#define IRQ_PRIOR_PIO 0
-
-/** LED0 blink time, LED1 blink half this time, in ms */
-#define BLINK_PERIOD 1000
-
-/** Delay for pushbutton debouncing (in milliseconds). */
-#define DEBOUNCE_TIME 500
-
-/*----------------------------------------------------------------------------
- * Local variables
- *----------------------------------------------------------------------------*/
-
-#ifndef NO_PUSHBUTTON
-/** Pushbutton \#1 pin instance. */
-const Pin pinPB1 = PIN_PUSHBUTTON_1 ;
-/** Pushbutton \#1 pin instance. */
-const Pin pinPB2 = PIN_PUSHBUTTON_2 ;
-#endif
-
-/** LED0 blinking control. */
-volatile bool bLed0Active = true ;
-
-/** LED1 blinking control. */
-volatile bool bLed1Active = true ;
-
-/** Global timestamp in milliseconds since start of application */
-volatile uint32_t dwTimeStamp = 0;
-
-/*----------------------------------------------------------------------------
- * Local functions
- *----------------------------------------------------------------------------*/
-
-/**
- * \brief Process Buttons Events
- *
- * Change active states of LEDs when corresponding button events happened.
- */
-static void ProcessButtonEvt( uint8_t ucButton )
-{
- if ( ucButton == 0 )
- {
- bLed0Active = !bLed0Active ;
- if ( !bLed0Active )
- {
- LED_Clear( 0 );
- }
- }
- else
- {
- bLed1Active = !bLed1Active ;
-
- /* Enable LED#2 and TC if they were disabled */
- if ( bLed1Active )
- {
- LED_Set( 1 );
- TC_Start( TC0, 0 );
- }
- /* Disable LED#2 and TC if they were enabled */
- else
- {
- LED_Clear( 1 );
- TC_Stop( TC0, 0 );
- }
- }
-}
-
-#ifndef NO_PUSHBUTTON
-/**
- * \brief Handler for Button 1 rising edge interrupt.
- *
- * Handle process led1 status change.
- */
-static void _Button1_Handler( const Pin* pin )
-{
- pin = pin;
- ProcessButtonEvt( 0 ) ;
-}
-
-/**
- * \brief Handler for Button 2 falling edge interrupt.
- *
- * Handle process led2 status change.
- */
-static void _Button2_Handler( const Pin* pin )
-{
- pin = pin;
- ProcessButtonEvt( 1 ) ;
-}
-#else
-/**
- * \brief Handler for DBGU input.
- *
- * Handle process LED1 or LED2 status change.
- */
-static void _DBGU_Handler( void )
-{
- uint8_t key;
- if ( !DBGU_IsRxReady( ) ) return ;
- key = DBGU_GetChar( ) ;
- switch ( key )
- {
- case '1': case '2':
- ProcessButtonEvt( key - '1' ) ;
- break;
- }
-}
-#endif
-
-/**
- * \brief Handler for PIT interrupt.
- */
-static void _Pit_Handler( void )
-{
- uint32_t status;
-
- /* Read the PIT status register */
- status = PIT_GetStatus() & PIT_SR_PITS;
- if (status != 0) {
- /* 1 = The Periodic Interval timer has reached PIV since the last read of PIT_PIVR.
- Read the PIVR to acknowledge interrupt and get number of ticks
- Returns the number of occurrences of periodic intervals since the last read of PIT_PIVR. */
- dwTimeStamp += (PIT_GetPIVR() >> 20);
- }
-}
-
-/**
- * \brief Handler for Sysc interrupts.
- */
-void _Sysc_Handler( void );
-void _Sysc_Handler( void )
-{
- _Pit_Handler( ) ;
- #ifdef NO_PUSHBUTTON
- _DBGU_Handler( ) ;
- #endif
-}
-
-/**
- * \brief Configure the periodic interval timer (PIT) to generate an interrupt every
- * interrupt every millisecond
- */
-static void ConfigurePit(void)
-{
- PMC->PMC_PCER0 = 1 << ID_PIT;
- /* Initialize the PIT to the desired frequency */
- PIT_Init(BLINK_PERIOD, BOARD_MCK / 1000000);
- /* Configure interrupt on PIT */
- IRQ_ConfigureIT(ID_PIT, 0, _Sysc_Handler);
- IRQ_EnableIT(ID_PIT);
- PIT_EnableIT();
- /* Enable the pit */
- PIT_Enable();
-}
-
-#ifndef NO_PUSHBUTTON
-/**
- * \brief Configure the Pushbuttons
- *
- * Configure the PIO as inputs and generate corresponding interrupt when
- * pressed or released.
- */
-static void _ConfigureButtons( void )
-{
- /* Configure pios as inputs. */
- PIO_Configure( &pinPB1, 1 ) ;
- PIO_Configure( &pinPB2, 1 ) ;
-
- /* Adjust pio debounce filter patameters, uses 10 Hz filter. */
- PIO_SetDebounceFilter( &pinPB1, 10 ) ;
- PIO_SetDebounceFilter( &pinPB1, 10 ) ;
-
- /* Enable PIO controller IRQs. */
- PIO_InitializeInterrupts(0);
- /* Initialize pios interrupt handlers, see PIO definition in board.h. */
- PIO_ConfigureIt(&pinPB1, (void (*)(const Pin *))_Button1_Handler);
- PIO_ConfigureIt(&pinPB2, (void (*)(const Pin *))_Button2_Handler);
-
- /* Enable PIO line interrupts. */
- PIO_EnableIt( &pinPB1 ) ;
- PIO_EnableIt( &pinPB2 ) ;
-}
-#endif
-
-/**
- * \brief Configure LEDs
- *
- * Configures LEDs \#1 and \#2 (cleared by default).
- */
-static void _ConfigureLeds( void )
-{
- LED_Configure( 0 ) ;
- LED_Configure( 1 ) ;
-}
-
-/**
- * Interrupt handler for TC0 interrupt. Toggles the state of LED\#2.
- */
-static void TC0_IrqHandler( void )
-{
- volatile uint32_t dummy;
- /* Clear status bit to acknowledge interrupt */
- dummy = TC0->TC_CHANNEL[ 0 ].TC_SR ;
-
- /** Toggle LED state. */
- LED_Toggle( 1 ) ;
- printf( "2 " ) ;
-}
-
-/**
- * Configure Timer Counter 0 to generate an interrupt every 250ms.
- */
-static void _ConfigureTc( void )
-{
- uint32_t div;
- uint32_t tcclks;
-
- /** Enable peripheral clock. */
- PMC->PMC_PCER0 = 1 << ID_TC0;
-
- /** Configure TC for a 4Hz frequency and trigger on RC compare. */
- TC_FindMckDivisor( 4, BOARD_MCK, &div, &tcclks, BOARD_MCK );
- TC_Configure( TC0, 0, tcclks | TC_CMR_CPCTRG );
- TC0->TC_CHANNEL[ 0 ].TC_RC = ( BOARD_MCK / div ) / 4;
-
- /* Configure and enable interrupt on RC compare */
- IRQ_ConfigureIT(ID_TC0, 0, TC0_IrqHandler);
- TC0->TC_CHANNEL[ 0 ].TC_IER = TC_IER_CPCS;
- IRQ_EnableIT(ID_TC0);
-
- /** Start the counter if LED1 is enabled. */
- if ( bLed1Active )
- {
- TC_Start( TC0, 0 );
- }
-}
-
-/**
- * Waits for the given number of milliseconds (using the dwTimeStamp generated
- * by the SAM3's microcontrollers's system tick).
- * \param delay Delay to wait for, in milliseconds.
- */
-static void _Wait( unsigned long delay )
-{
- volatile uint32_t start = dwTimeStamp;
- uint32_t elapsed;
- do {
- elapsed = dwTimeStamp;
- elapsed -= start;
- }
- while (elapsed < delay);
-}
-
-/*----------------------------------------------------------------------------
- * Global functions
- *----------------------------------------------------------------------------*/
-
-/**
- * \brief getting-started Application entry point.
- *
- * \return Unused (ANSI-C compatibility).
- */
-int atmel_main( void );
-int atmel_main( void )
-{
- /* Disable watchdog */
- WDT_Disable( WDT ) ;
-#if defined (ddram)
- MMU_Initialize((uint32_t *)0x30C000);
- CP15_EnableMMU();
- CP15_EnableDcache();
- CP15_EnableIcache();
-#endif
-
- /* Output example information */
- printf( "-- Getting Started Example %s --\n\r", SOFTPACK_VERSION ) ;
- printf( "-- %s\n\r", BOARD_NAME ) ;
- printf( "-- Compiled: %s %s --\n\r", __DATE__, __TIME__ ) ;
-
- /* Configure PIT. */
- printf( "Configure PIT \n\r" ) ;
-//__asm volatile( "cpsid i" );
- ConfigurePit() ;
-
- /* PIO configuration for LEDs and Buttons. */
- PIO_InitializeInterrupts( IRQ_PRIOR_PIO ) ;
-
- printf( "Configure TC.\n\r" );
- _ConfigureTc() ;
-
- printf( "Configure LED PIOs.\n\r" ) ;
- _ConfigureLeds() ;
-
-#ifndef NO_PUSHBUTTON
- printf( "Configure buttons with debouncing.\n\r" ) ;
- _ConfigureButtons() ;
- printf( "Press USRBP1 to Start/Stop the blue LED D1 blinking.\n\r" ) ;
- printf( "Press USRBP2 to Start/Stop the red LED D2 blinking.\n\r" ) ;
-
-#else
- printf( "No push buttons, uses DBG key 1 & 2 instead.\n\r" ) ;
- printf( "Press 1 to Start/Stop the blue LED D1 blinking.\n\r" ) ;
- printf( "Press 2 to Start/Stop the red LED D2 blinking.\n\r" ) ;
-
-#endif
-
- while ( 1 )
- {
- /* Wait for LED to be active */
- while( !bLed0Active );
-
- /* Toggle LED state if active */
- if ( bLed0Active )
- {
- LED_Toggle( 0 );
- printf( "1 " );
- }
-
- /* Wait for 500ms */
- _Wait(500);
- }
-}
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/cstartup_with_FreeRTOS_vectors.s b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/cstartup_with_FreeRTOS_vectors.s
index f1225de18..9a4330bf4 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/cstartup_with_FreeRTOS_vectors.s
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/cstartup_with_FreeRTOS_vectors.s
@@ -131,6 +131,8 @@ resetHandler:
/* Perform low-level initialization of the chip using LowLevelInit() */
label:
+ /* Sets up Supervisor stack before running LowLevelInit. The supervisor
+ stack is reused by interrupts, which switch from IRQ mode to SVC mode. */
LDR r0, =LowLevelInit
LDR r4, =SFE(CSTACK)
MOV sp, r4
@@ -140,14 +142,13 @@ label:
MSR cpsr_c, #ARM_MODE_IRQ | I_BIT | F_BIT ; Change the mode
LDR sp, =SFE(IRQ_STACK)
- /* Set up the SVC stack pointer. This allows the stack used by main()
- to get reused by interrupts (which switch from IRQ mode to SVC mode). */
- MSR cpsr_c, #ARM_MODE_SVC | F_BIT ; Change the mode
- LDR sp, =SFE(CSTACK)
-
/* No need to set up stacks for any other mode as that stack used by
tasks is allocated by FreeRTOS. */
+ /* Back to Supervisor mode bfore calling main(). The schduduler should
+ be started from Supervisor mode. */
+ MSR cpsr_c, #ARM_MODE_SVC | F_BIT ; Change the mode
+
/* Branch to main() */
LDR r0, =?main
BLX r0
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/main.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/main.c
index 1cb080b7c..eb80168a4 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/main.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/main.c
@@ -72,7 +72,8 @@
* implemented and described in main_full.c.
*
* This file implements the code that is not demo specific, including the
- * hardware setup and FreeRTOS hook functions.
+ * hardware setup, standard FreeRTOS hook functions, and the ISR hander called
+ * by the RTOS after interrupt entry (including nesting) has been taken care of.
*
* ENSURE TO READ THE DOCUMENTATION PAGE FOR THIS PORT AND DEMO APPLICATION ON
* THE http://www.FreeRTOS.org WEB SITE FOR FULL INFORMATION ON USING THIS DEMO
@@ -80,8 +81,7 @@
*
*/
-#warning Remove unused libary files.
-#warning document configFPU_D32
+#warning Things to document 1) configFPU_D32 setting, 2) flops can't be used in ISRs, 3) Level interrupts need to be cleared in their handling functions 4) Notes on tailoring generic Cortex-A port 5) assert() will hit if CDC is hammered. 6) Barrier instructions in A9 callbacks. 7) In thumb mode the "common sub expression elimination" optimisation cannot be used.
/* Scheduler include files. */
#include "FreeRTOS.h"
@@ -125,8 +125,15 @@ void vApplicationIdleHook( void );
void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName );
void vApplicationTickHook( void );
+/* Prototype for the IRQ handler called by the generic Cortex-A5 RTOS port
+layer. The address of the ISR is passed into this function as a parameter.
+Note this level of indirection could be removed by creating a SAMA5 specific
+port layer that calls the IRQ directly from the port layer rather than via this
+application callback. */
+void vApplicationIRQHandler( uint32_t ulInterruptVectorAddress );
+
/*-----------------------------------------------------------*/
-#warning check stack sizes in linker script.
+
int main( void )
{
/* Configure the hardware ready to run the demo. */
@@ -158,6 +165,8 @@ static void prvSetupHardware( void )
/* Configure ports used by LEDs. */
vParTestInitialise();
+
+ CP15_EnableIcache();
}
/*-----------------------------------------------------------*/
@@ -240,6 +249,31 @@ void vApplicationTickHook( void )
}
#endif
}
-
+/*-----------------------------------------------------------*/
+
+/* The function called by the RTOS port layer after it has managed interrupt
+entry. */
+void vApplicationIRQHandler( uint32_t ulInterruptVectorAddress )
+{
+typedef void (*ISRFunction_t)( void );
+ISRFunction_t pxISRFunction;
+volatile uint32_t * pulAIC_IVR = ( uint32_t * ) configINTERRUPT_VECTOR_ADDRESS;
+
+ /* On the SAMA5 the parameter is a pointer to the ISR handling function. */
+ pxISRFunction = ( ISRFunction_t ) ulInterruptVectorAddress;
+
+ /* Write back to the SAMA5's interrupt controller's IVR register in case the
+ CPU is in protect mode. If the interrupt controller is not in protect mode
+ then this write is not necessary. */
+ *pulAIC_IVR = 0;
+
+ /* Ensure the write takes before re-enabling interrupts. */
+ __DSB();
+ __ISB();
+ __enable_irq();
+
+ /* Call the installed ISR. */
+ pxISRFunction();
+}
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/settings/RTOSDemo.dbgdt b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/settings/RTOSDemo.dbgdt
index 9e63dcc51..d3d797e57 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/settings/RTOSDemo.dbgdt
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/settings/RTOSDemo.dbgdt
@@ -6,20 +6,20 @@
- 20 1622
+ 3 0 0 Build Find-in-Files 20 1622
- 20 1216 324 81
+ 20 1216 324 81 3 0 0 Debug-Log Find-in-Files
- 258 27 27 27
+ 242 27 27 27
@@ -30,32 +30,16 @@
- 500
- 20
- - 0x0030211C
- 0x00302750
- 0x305444
- 0x0030211C
- 0x00302750
2 0 0 1 1
- 2 0 0 - Expression
- Location
- Type
- Value
- 207
- 150
- 100
- 294
2 0 0 1 0 0 - Frame
- _I0
- 400
- 20
3 0 0 - Breakpoint
- _I0
- 500
- 35
497 82 746 331 2 0 0 - Expression
- Location
- Type
- Value
- 100
- 150
- 100
- 100
- TC0
- TC0->TC_CHANNEL[ tmrTC0_CHANNEL_0 ].TC_RC
2 0 0 - Expression
- Location
- Type
- Value
- 207
- 150
- 100
- 294
2 0 0 1 0 0 - Frame
- _I0
- 400
- 20
3 0 0 - Breakpoint
- _I0
- 500
- 35
497 82 746 331 3 0 0 Debug-Log Build 2 0 0 - Expression
- Location
- Type
- Value
- 100
- 150
- 100
- 100
- TC0
- TC0->TC_CHANNEL[ tmrTC0_CHANNEL_0 ].TC_RC
3 0 0 1 0 200 100 100 100 100 100 100 100 150 200 100 100 100 100 100 100
-
-
- TabID-13925-23874
- Debug Log
- Debug-Log
-
-
- TabID-13402-23884
- Build
- Build
-
- TabID-21109-11091 Find in Files Find-in-Files
-
- 0
TabID-24673-23877
@@ -63,24 +47,24 @@
Workspace
- RTOSDemo RTOSDemo/Full Demo
+ RTOSDemo RTOSDemo/Atmel Files RTOSDemo/Atmel Files/libchip_sama5d3x RTOSDemo/FreeRTOS Source RTOSDemo/FreeRTOS Source/portable RTOSDemo/FreeRTOS Source/portable/MemMang RTOSDemo/FreeRTOS+CLI RTOSDemo/Full Demo RTOSDemo/Full Demo/Common Demo Tasks
- 0
+ 0 TabID-22902-32031 Tasks TASKVIEW 0 TabID-22379-32041 Queues QUEUEVIEW 0
- TextEditor $WS_DIR$\Full_Demo\main_full.c 0 0 0 0 0 370 15067 15067 TextEditor $WS_DIR$\AtmelFiles\usb\common\core\USBDescriptors.c 0 0 0 0 0 165 6026 6026 TextEditor $WS_DIR$\main.c 0 0 0 0 0 109 6007 6007 2 TextEditor $WS_DIR$\CDCCommandConsole.c 0 0 0 0 0 309 11984 11984 TextEditor $WS_DIR$\Full_Demo\IntQueueTimer.c 0 0 0 0 0 162 8098 8116 TextEditor $WS_DIR$\..\..\Source\tasks.c 0 0 0 0 0 1561 55424 55424 TextEditor $WS_DIR$\..\..\Source\portable\IAR\ARM_CA5_No_GIC\portmacro.h 0 0 0 0 0 107 5219 5219 0 1000000 1000000 1
+ TextEditor $WS_DIR$\main.c 0 0 0 0 0 140 7249 7249 TextEditor $WS_DIR$\Full_Demo\main_full.c 0 0 0 0 0 63 0 0 TextEditor $WS_DIR$\blinky_demo\main_blinky.c 0 0 0 0 0 63 1373 1373 TextEditor $WS_DIR$\..\..\Source\portable\IAR\ARM_CA5_No_GIC\portASM.s 0 0 0 0 0 73 3799 3799 3 0 1000000 1000000 1
- iaridepm.enu1 debuggergui.enu1 -2 -2 718 332 -2 -2 200 200 119048 203252 198810 731707 -2 -2 198 1682 -2 -2 1684 200 1002381 203252 119048 203252
+ iaridepm.enu1 debuggergui.enu1 -2 -2 520 332 -2 -2 200 200 119048 203252 198810 530488 -2 -2 198 1682 -2 -2 1684 200 1002381 203252 119048 203252 196 -2 396 1682 -2 196 1684 200 1002381 203252 119048 203252
-
+
TabID-22351-19008
@@ -44,11 +44,11 @@
Workspace
- RTOSDemo RTOSDemo/FreeRTOS Source RTOSDemo/FreeRTOS Source/portable RTOSDemo/Full Demo
+ RTOSDemo
- 0
+ 0
TabID-21076-19237
@@ -58,20 +58,20 @@
TabID-23502-23081 Debug Log Debug-Log TabID-24431-23894 Ambiguous Definitions Select-Ambiguous-Definitions TabID-9033-6116 Find in Files Find-in-Files
- 0
+ 0
- TextEditor $WS_DIR$\Full_Demo\main_full.c 0 0 0 0 0 370 15067 15067 TextEditor $WS_DIR$\AtmelFiles\usb\common\core\USBDescriptors.c 0 0 0 0 0 165 6026 6026 TextEditor $WS_DIR$\main.c 0 0 0 0 0 109 6007 6007 2 TextEditor $WS_DIR$\CDCCommandConsole.c 0 0 0 0 0 309 11984 11984 TextEditor $WS_DIR$\Full_Demo\IntQueueTimer.c 0 0 0 0 0 162 8098 8116 TextEditor $WS_DIR$\..\..\Source\tasks.c 0 0 0 0 0 1561 55424 55424 TextEditor $WS_DIR$\..\..\Source\portable\IAR\ARM_CA5_No_GIC\portmacro.h 0 0 0 0 0 107 5219 5219 0 1000000 1000000 1
+ TextEditor $WS_DIR$\main.c 0 0 0 0 0 59 7249 7249 0 TextEditor $WS_DIR$\Full_Demo\main_full.c 0 0 0 0 0 63 0 0 TextEditor $WS_DIR$\blinky_demo\main_blinky.c 0 0 0 0 0 63 1373 1373 0 1000000 1000000 1
- iaridepm.enu1 -2 -2 668 352 -2 -2 190 170 113095 172764 210714 680894 -2 -2 272 1682 -2 -2 1684 274 1002381 278455 113095 172764
+ iaridepm.enu1 -2 -2 668 352 -2 -2 190 170 113095 172764 210714 680894 -2 -2 272 1682 -2 -2 1684 274 1002381 278455 113095 172764