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Work in progress on the LPC1766 port.

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This commit is contained in:
Richard Barry 2009-05-29 14:30:24 +00:00
parent a9a108a751
commit 6003973d5e
11 changed files with 742 additions and 453 deletions
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592
Demo/CORTEX_LPC1766_GCC_RedSuite/RTOSDemo/webserver/emac.c
View file

@ -1,6 +1,5 @@
/******************************************************************
***** *****
***** Name: cs8900.c *****
***** Ver.: 1.0 *****
***** Date: 07/05/2001 *****
***** Auth: Andreas Dannenberg *****
@ -16,416 +15,451 @@
******************************************************************/
/* Adapted from file originally written by Andreas Dannenberg. Supplied with permission. */
#include "FreeRTOS.h"
#include "semphr.h"
#include "semphr.h"
#include "task.h"
#include "emac.h"
#include "LPC17xx_defs.h"
#define configPINSEL2_VALUE 0x50150105
#define configPINSEL2_VALUE 0x50150105
/* The semaphore used to wake the uIP task when data arives. */
xSemaphoreHandle xEMACSemaphore = NULL;
xSemaphoreHandle xEMACSemaphore = NULL;
static unsigned short *rptr;
static unsigned short *tptr;
static unsigned short *rptr;
static unsigned short *tptr;
// easyWEB internal function
// help function to swap the byte order of a WORD
static unsigned short SwapBytes(unsigned short Data)
static unsigned short SwapBytes( unsigned short Data )
{
return (Data >> 8) | (Data << 8);
return( Data >> 8 ) | ( Data << 8 );
}
// Keil: function added to write PHY
void write_PHY (int PhyReg, int Value)
int write_PHY( int PhyReg, int Value )
{
unsigned int tout;
const unsigned int uiMaxTime = 10;
unsigned int tout;
const unsigned int uiMaxTime = 10;
MAC_MADR = DP83848C_DEF_ADR | PhyReg;
MAC_MWTD = Value;
MAC_MADR = DP83848C_DEF_ADR | PhyReg;
MAC_MWTD = Value;
/* Wait utill operation completed */
tout = 0;
for (tout = 0; tout < uiMaxTime; tout++) {
if ((MAC_MIND & MIND_BUSY) == 0) {
break;
}
vTaskDelay( 2 );
}
/* Wait utill operation completed */
tout = 0;
for( tout = 0; tout < uiMaxTime; tout++ )
{
if( (MAC_MIND & MIND_BUSY) == 0 )
{
break;
}
vTaskDelay( 2 );
}
if( tout < uiMaxTime )
{
return pdPASS;
}
else
{
return pdFAIL;
}
}
// Keil: function added to read PHY
unsigned short read_PHY (unsigned char PhyReg)
unsigned short read_PHY( unsigned char PhyReg, portBASE_TYPE *pxStatus )
{
unsigned int tout;
const unsigned int uiMaxTime = 10;
unsigned int tout;
const unsigned int uiMaxTime = 10;
MAC_MADR = DP83848C_DEF_ADR | PhyReg;
MAC_MCMD = MCMD_READ;
MAC_MADR = DP83848C_DEF_ADR | PhyReg;
MAC_MCMD = MCMD_READ;
/* Wait until operation completed */
tout = 0;
for (tout = 0; tout < uiMaxTime; tout++) {
if ((MAC_MIND & MIND_BUSY) == 0) {
break;
}
vTaskDelay( 2 );
}
MAC_MCMD = 0;
return (MAC_MRDD);
/* Wait until operation completed */
tout = 0;
for( tout = 0; tout < uiMaxTime; tout++ )
{
if( (MAC_MIND & MIND_BUSY) == 0 )
{
break;
}
vTaskDelay( 2 );
}
MAC_MCMD = 0;
if( tout >= uiMaxTime )
{
*pxStatus = pdFAIL;
}
return( MAC_MRDD );
}
// Keil: function added to initialize Rx Descriptors
void rx_descr_init (void)
void rx_descr_init( void )
{
unsigned int i;
unsigned int i;
for (i = 0; i < NUM_RX_FRAG; i++) {
RX_DESC_PACKET(i) = RX_BUF(i);
RX_DESC_CTRL(i) = RCTRL_INT | (ETH_FRAG_SIZE-1);
RX_STAT_INFO(i) = 0;
RX_STAT_HASHCRC(i) = 0;
}
for( i = 0; i < NUM_RX_FRAG; i++ )
{
RX_DESC_PACKET( i ) = RX_BUF( i );
RX_DESC_CTRL( i ) = RCTRL_INT | ( ETH_FRAG_SIZE - 1 );
RX_STAT_INFO( i ) = 0;
RX_STAT_HASHCRC( i ) = 0;
}
/* Set EMAC Receive Descriptor Registers. */
MAC_RXDESCRIPTOR = RX_DESC_BASE;
MAC_RXSTATUS = RX_STAT_BASE;
MAC_RXDESCRIPTORNUM = NUM_RX_FRAG-1;
/* Set EMAC Receive Descriptor Registers. */
MAC_RXDESCRIPTOR = RX_DESC_BASE;
MAC_RXSTATUS = RX_STAT_BASE;
MAC_RXDESCRIPTORNUM = NUM_RX_FRAG - 1;
/* Rx Descriptors Point to 0 */
MAC_RXCONSUMEINDEX = 0;
/* Rx Descriptors Point to 0 */
MAC_RXCONSUMEINDEX = 0;
}
// Keil: function added to initialize Tx Descriptors
void tx_descr_init (void) {
unsigned int i;
void tx_descr_init( void )
{
unsigned int i;
for (i = 0; i < NUM_TX_FRAG; i++) {
TX_DESC_PACKET(i) = TX_BUF(i);
TX_DESC_CTRL(i) = 0;
TX_STAT_INFO(i) = 0;
}
for( i = 0; i < NUM_TX_FRAG; i++ )
{
TX_DESC_PACKET( i ) = TX_BUF( i );
TX_DESC_CTRL( i ) = 0;
TX_STAT_INFO( i ) = 0;
}
/* Set EMAC Transmit Descriptor Registers. */
MAC_TXDESCRIPTOR = TX_DESC_BASE;
MAC_TXSTATUS = TX_STAT_BASE;
MAC_TXDESCRIPTORNUM = NUM_TX_FRAG-1;
/* Set EMAC Transmit Descriptor Registers. */
MAC_TXDESCRIPTOR = TX_DESC_BASE;
MAC_TXSTATUS = TX_STAT_BASE;
MAC_TXDESCRIPTORNUM = NUM_TX_FRAG - 1;
/* Tx Descriptors Point to 0 */
MAC_TXPRODUCEINDEX = 0;
/* Tx Descriptors Point to 0 */
MAC_TXPRODUCEINDEX = 0;
}
// configure port-pins for use with LAN-controller,
// reset it and send the configuration-sequence
portBASE_TYPE Init_EMAC(void)
portBASE_TYPE Init_EMAC( void )
{
portBASE_TYPE xReturn = pdPASS;
portBASE_TYPE xReturn = pdPASS;
// Keil: function modified to access the EMAC
// Initializes the EMAC ethernet controller
volatile unsigned int regv,tout,id1,id2;
// Keil: function modified to access the EMAC
// Initializes the EMAC ethernet controller
volatile unsigned int regv, tout, id1, id2;
/* Enable P1 Ethernet Pins. */
PINSEL2 = configPINSEL2_VALUE;
PINSEL3 = (PINSEL3 & ~0x0000000F) | 0x00000005;
/* Enable P1 Ethernet Pins. */
PINSEL2 = configPINSEL2_VALUE;
PINSEL3 = ( PINSEL3 &~0x0000000F ) | 0x00000005;
/* Power Up the EMAC controller. */
PCONP |= PCONP_PCENET;
vTaskDelay( 2 );
/* Power Up the EMAC controller. */
PCONP |= PCONP_PCENET;
vTaskDelay( 2 );
/* Reset all EMAC internal modules. */
MAC_MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX | MAC1_SIM_RES | MAC1_SOFT_RES;
MAC_COMMAND = CR_REG_RES | CR_TX_RES | CR_RX_RES | CR_PASS_RUNT_FRM;
/* Reset all EMAC internal modules. */
MAC_MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX | MAC1_SIM_RES | MAC1_SOFT_RES;
MAC_COMMAND = CR_REG_RES | CR_TX_RES | CR_RX_RES | CR_PASS_RUNT_FRM;
/* A short delay after reset. */
vTaskDelay( 2 );
/* A short delay after reset. */
vTaskDelay( 2 );
/* Initialize MAC control registers. */
MAC_MAC1 = MAC1_PASS_ALL;
MAC_MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;
MAC_MAXF = ETH_MAX_FLEN;
MAC_CLRT = CLRT_DEF;
MAC_IPGR = IPGR_DEF;
/* Initialize MAC control registers. */
MAC_MAC1 = MAC1_PASS_ALL;
MAC_MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;
MAC_MAXF = ETH_MAX_FLEN;
MAC_CLRT = CLRT_DEF;
MAC_IPGR = IPGR_DEF;
/* Enable Reduced MII interface. */
MAC_COMMAND = CR_RMII | CR_PASS_RUNT_FRM;
/* Enable Reduced MII interface. */
MAC_COMMAND = CR_RMII | CR_PASS_RUNT_FRM;
/* Reset Reduced MII Logic. */
MAC_SUPP = SUPP_RES_RMII;
vTaskDelay( 2 );
MAC_SUPP = 0;
/* Reset Reduced MII Logic. */
MAC_SUPP = SUPP_RES_RMII;
vTaskDelay( 2 );
MAC_SUPP = 0;
/* Put the PHY in reset mode */
write_PHY (PHY_REG_BMCR, 0x8000);
write_PHY (PHY_REG_BMCR, 0x8000);
/* Put the PHY in reset mode */
write_PHY( PHY_REG_BMCR, 0x8000 );
xReturn = write_PHY( PHY_REG_BMCR, 0x8000 );
/* Wait for hardware reset to end. */
for (tout = 0; tout < 100; tout++) {
vTaskDelay( 10 );
regv = read_PHY (PHY_REG_BMCR);
if (!(regv & 0x8000)) {
/* Reset complete */
break;
}
}
/* Wait for hardware reset to end. */
for( tout = 0; tout < 100; tout++ )
{
vTaskDelay( 10 );
regv = read_PHY( PHY_REG_BMCR, &xReturn );
if( !(regv & 0x8000) )
{
/* Reset complete */
break;
}
}
/* Set the Ethernet MAC Address registers */
MAC_SA0 = (emacETHADDR0 << 8) | emacETHADDR1;
MAC_SA1 = (emacETHADDR2 << 8) | emacETHADDR3;
MAC_SA2 = (emacETHADDR4 << 8) | emacETHADDR5;
/* Check if this is a DP83848C PHY. */
id1 = read_PHY( PHY_REG_IDR1, &xReturn );
id2 = read_PHY( PHY_REG_IDR2, &xReturn );
if( ((id1 << 16) | (id2 & 0xFFF0)) == DP83848C_ID )
{
/* Set the Ethernet MAC Address registers */
MAC_SA0 = ( emacETHADDR0 << 8 ) | emacETHADDR1;
MAC_SA1 = ( emacETHADDR2 << 8 ) | emacETHADDR3;
MAC_SA2 = ( emacETHADDR4 << 8 ) | emacETHADDR5;
/* Initialize Tx and Rx DMA Descriptors */
rx_descr_init ();
tx_descr_init ();
/* Initialize Tx and Rx DMA Descriptors */
rx_descr_init();
tx_descr_init();
/* Receive Broadcast and Perfect Match Packets */
MAC_RXFILTERCTRL = RFC_UCAST_EN | RFC_BCAST_EN | RFC_PERFECT_EN;
/* Receive Broadcast and Perfect Match Packets */
MAC_RXFILTERCTRL = RFC_UCAST_EN | RFC_BCAST_EN | RFC_PERFECT_EN;
/* Create the semaphore used ot wake the uIP task. */
vSemaphoreCreateBinary( xEMACSemaphore );
/* Check if this is a DP83848C PHY. */
id1 = read_PHY (PHY_REG_IDR1);
id2 = read_PHY (PHY_REG_IDR2);
if (((id1 << 16) | (id2 & 0xFFF0)) == DP83848C_ID) {
/* Configure the PHY device */
/* Create the semaphore used ot wake the uIP task. */
vSemaphoreCreateBinary( xEMACSemaphore );
/* Use autonegotiation about the link speed. */
write_PHY (PHY_REG_BMCR, PHY_AUTO_NEG);
/* Wait to complete Auto_Negotiation. */
for (tout = 0; tout < 10; tout++) {
vTaskDelay( 100 );
regv = read_PHY (PHY_REG_BMSR);
if (regv & 0x0020) {
/* Autonegotiation Complete. */
break;
}
}
}
else
{
xReturn = pdFAIL;
}
/* Configure the PHY device */
/* Check the link status. */
if( xReturn == pdPASS )
{
xReturn = pdFAIL;
for (tout = 0; tout < 10; tout++) {
vTaskDelay( 100 );
regv = read_PHY (PHY_REG_STS);
if (regv & 0x0001) {
/* Link is on. */
xReturn = pdPASS;
break;
}
}
}
/* Use autonegotiation about the link speed. */
if( write_PHY(PHY_REG_BMCR, PHY_AUTO_NEG) )
{
/* Wait to complete Auto_Negotiation. */
for( tout = 0; tout < 10; tout++ )
{
vTaskDelay( 100 );
regv = read_PHY( PHY_REG_BMSR, &xReturn );
if( regv & 0x0020 )
{
/* Autonegotiation Complete. */
break;
}
}
}
}
else
{
xReturn = pdFAIL;
}
if( xReturn == pdPASS )
{
/* Configure Full/Half Duplex mode. */
if (regv & 0x0004) {
/* Full duplex is enabled. */
MAC_MAC2 |= MAC2_FULL_DUP;
MAC_COMMAND |= CR_FULL_DUP;
MAC_IPGT = IPGT_FULL_DUP;
}
else {
/* Half duplex mode. */
MAC_IPGT = IPGT_HALF_DUP;
}
/* Check the link status. */
if( xReturn == pdPASS )
{
xReturn = pdFAIL;
for( tout = 0; tout < 10; tout++ )
{
vTaskDelay( 100 );
regv = read_PHY( PHY_REG_STS, &xReturn );
if( regv & 0x0001 )
{
/* Link is on. */
xReturn = pdPASS;
break;
}
}
}
/* Configure 100MBit/10MBit mode. */
if (regv & 0x0002) {
/* 10MBit mode. */
MAC_SUPP = 0;
}
else {
/* 100MBit mode. */
MAC_SUPP = SUPP_SPEED;
}
if( xReturn == pdPASS )
{
/* Configure Full/Half Duplex mode. */
if( regv & 0x0004 )
{
/* Full duplex is enabled. */
MAC_MAC2 |= MAC2_FULL_DUP;
MAC_COMMAND |= CR_FULL_DUP;
MAC_IPGT = IPGT_FULL_DUP;
}
else
{
/* Half duplex mode. */
MAC_IPGT = IPGT_HALF_DUP;
}
/* Reset all interrupts */
MAC_INTCLEAR = 0xFFFF;
/* Configure 100MBit/10MBit mode. */
if( regv & 0x0002 )
{
/* 10MBit mode. */
MAC_SUPP = 0;
}
else
{
/* 100MBit mode. */
MAC_SUPP = SUPP_SPEED;
}
/* Enable receive and transmit mode of MAC Ethernet core */
MAC_COMMAND |= (CR_RX_EN | CR_TX_EN);
MAC_MAC1 |= MAC1_REC_EN;
}
/* Reset all interrupts */
MAC_INTCLEAR = 0xFFFF;
return xReturn;
/* Enable receive and transmit mode of MAC Ethernet core */
MAC_COMMAND |= ( CR_RX_EN | CR_TX_EN );
MAC_MAC1 |= MAC1_REC_EN;
}
return xReturn;
}
// reads a word in little-endian byte order from RX_BUFFER
unsigned short ReadFrame_EMAC(void)
unsigned short ReadFrame_EMAC( void )
{
return (*rptr++);
return( *rptr++ );
}
// reads a word in big-endian byte order from RX_FRAME_PORT
// (useful to avoid permanent byte-swapping while reading
// TCP/IP-data)
unsigned short ReadFrameBE_EMAC(void)
unsigned short ReadFrameBE_EMAC( void )
{
unsigned short ReturnValue;
unsigned short ReturnValue;
ReturnValue = SwapBytes (*rptr++);
return (ReturnValue);
ReturnValue = SwapBytes( *rptr++ );
return( ReturnValue );
}
// copies bytes from frame port to MCU-memory
// NOTES: * an odd number of byte may only be transfered
// if the frame is read to the end!
// * MCU-memory MUST start at word-boundary
void CopyFromFrame_EMAC(void *Dest, unsigned short Size)
void CopyFromFrame_EMAC( void *Dest, unsigned short Size )
{
unsigned short * piDest; // Keil: Pointer added to correct expression
unsigned short *piDest; // Keil: Pointer added to correct expression
piDest = Dest; // Keil: Line added
while( Size > 1 )
{
*piDest++ = ReadFrame_EMAC();
Size -= 2;
}
piDest = Dest; // Keil: Line added
while (Size > 1) {
*piDest++ = ReadFrame_EMAC();
Size -= 2;
}
if (Size) { // check for leftover byte...
*(unsigned char *)piDest = (char)ReadFrame_EMAC();// the LAN-Controller will return 0
} // for the highbyte
if( Size )
{ // check for leftover byte...
*( unsigned char * ) piDest = ( char ) ReadFrame_EMAC(); // the LAN-Controller will return 0
} // for the highbyte
}
// does a dummy read on frame-I/O-port
// NOTE: only an even number of bytes is read!
void DummyReadFrame_EMAC(unsigned short Size) // discards an EVEN number of bytes
{ // from RX-fifo
while (Size > 1) {
ReadFrame_EMAC();
Size -= 2;
}
void DummyReadFrame_EMAC( unsigned short Size ) // discards an EVEN number of bytes
{ // from RX-fifo
while( Size > 1 )
{
ReadFrame_EMAC();
Size -= 2;
}
}
// Reads the length of the received ethernet frame and checks if the
// Reads the length of the received ethernet frame and checks if the
// destination address is a broadcast message or not
// returns the frame length
unsigned short StartReadFrame(void) {
unsigned short RxLen;
unsigned int idx;
unsigned short StartReadFrame( void )
{
unsigned short RxLen;
unsigned int idx;
idx = MAC_RXCONSUMEINDEX;
RxLen = (RX_STAT_INFO(idx) & RINFO_SIZE) - 3;
rptr = (unsigned short *)RX_DESC_PACKET(idx);
return(RxLen);
idx = MAC_RXCONSUMEINDEX;
RxLen = ( RX_STAT_INFO(idx) & RINFO_SIZE ) - 3;
rptr = ( unsigned short * ) RX_DESC_PACKET( idx );
return( RxLen );
}
void EndReadFrame(void) {
unsigned int idx;
void EndReadFrame( void )
{
unsigned int idx;
/* DMA free packet. */
idx = MAC_RXCONSUMEINDEX;
/* DMA free packet. */
idx = MAC_RXCONSUMEINDEX;
if (++idx == NUM_RX_FRAG)
idx = 0;
if( ++idx == NUM_RX_FRAG )
{
idx = 0;
}
MAC_RXCONSUMEINDEX = idx;
MAC_RXCONSUMEINDEX = idx;
}
unsigned int CheckFrameReceived(void) { // Packet received ?
if (MAC_RXPRODUCEINDEX != MAC_RXCONSUMEINDEX) // more packets received ?
return(1);
else
return(0);
unsigned int CheckFrameReceived( void )
{
// Packet received ?
if( MAC_RXPRODUCEINDEX != MAC_RXCONSUMEINDEX )
{ // more packets received ?
return( 1 );
}
else
{
return( 0 );
}
}
unsigned int uiGetEMACRxData( unsigned char *ucBuffer )
{
unsigned int uiLen = 0;
unsigned int uiLen = 0;
if( MAC_RXPRODUCEINDEX != MAC_RXCONSUMEINDEX )
{
uiLen = StartReadFrame();
CopyFromFrame_EMAC( ucBuffer, uiLen );
EndReadFrame();
}
if( MAC_RXPRODUCEINDEX != MAC_RXCONSUMEINDEX )
{
uiLen = StartReadFrame();
CopyFromFrame_EMAC( ucBuffer, uiLen );
EndReadFrame();
}
return uiLen;
return uiLen;
}
// requests space in EMAC memory for storing an outgoing frame
void RequestSend(void)
void RequestSend( void )
{
unsigned int idx;
unsigned int idx;
idx = MAC_TXPRODUCEINDEX;
tptr = (unsigned short *)TX_DESC_PACKET(idx);
idx = MAC_TXPRODUCEINDEX;
tptr = ( unsigned short * ) TX_DESC_PACKET( idx );
}
// check if ethernet controller is ready to accept the
// frame we want to send
unsigned int Rdy4Tx(void)
unsigned int Rdy4Tx( void )
{
return (1); // the ethernet controller transmits much faster
} // than the CPU can load its buffers
return( 1 ); // the ethernet controller transmits much faster
} // than the CPU can load its buffers
// writes a word in little-endian byte order to TX_BUFFER
void WriteFrame_EMAC(unsigned short Data)
void WriteFrame_EMAC( unsigned short Data )
{
*tptr++ = Data;
*tptr++ = Data;
}
// copies bytes from MCU-memory to frame port
// NOTES: * an odd number of byte may only be transfered
// if the frame is written to the end!
// * MCU-memory MUST start at word-boundary
void CopyToFrame_EMAC(void *Source, unsigned int Size)
void CopyToFrame_EMAC( void *Source, unsigned int Size )
{
unsigned short * piSource;
unsigned short *piSource;
piSource = Source;
Size = (Size + 1) & 0xFFFE; // round Size up to next even number
while (Size > 0) {
WriteFrame_EMAC(*piSource++);
Size -= 2;
}
piSource = Source;
Size = ( Size + 1 ) & 0xFFFE; // round Size up to next even number
while( Size > 0 )
{
WriteFrame_EMAC( *piSource++ );
Size -= 2;
}
}
void DoSend_EMAC(unsigned short FrameSize)
void DoSend_EMAC( unsigned short FrameSize )
{
unsigned int idx;
unsigned int idx;
idx = MAC_TXPRODUCEINDEX;
TX_DESC_CTRL(idx) = FrameSize | TCTRL_LAST;
if (++idx == NUM_TX_FRAG) idx = 0;
MAC_TXPRODUCEINDEX = idx;
idx = MAC_TXPRODUCEINDEX;
TX_DESC_CTRL( idx ) = FrameSize | TCTRL_LAST;
if( ++idx == NUM_TX_FRAG )
{
idx = 0;
}
MAC_TXPRODUCEINDEX = idx;
}
void vEMAC_ISR( void )
{
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* Clear the interrupt. */
MAC_INTCLEAR = 0xffff;
/* Clear the interrupt. */
MAC_INTCLEAR = 0xffff;
/* Ensure the uIP task is not blocked as data has arrived. */
xSemaphoreGiveFromISR( xEMACSemaphore, &xHigherPriorityTaskWoken );
/* Ensure the uIP task is not blocked as data has arrived. */
xSemaphoreGiveFromISR( xEMACSemaphore, &xHigherPriorityTaskWoken );
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
}

34
Demo/CORTEX_LPC1766_GCC_RedSuite/RTOSDemo/webserver/httpd-cgi.c
View file

@ -54,6 +54,8 @@
#include <stdio.h>
#include <string.h>
#include "LED.h"
HTTPD_CGI_CALL(file, "file-stats", file_stats);
HTTPD_CGI_CALL(tcp, "tcp-connections", tcp_stats);
HTTPD_CGI_CALL(net, "net-stats", net_stats);
@ -234,35 +236,27 @@ PT_THREAD(rtos_stats(struct httpd_state *s, char *ptr))
}
/*---------------------------------------------------------------------------*/
char *pcStatus[ 3 ];
char *pcStatus;
unsigned long ulString;
extern unsigned long uxParTextGetLED( unsigned long uxLED );
static unsigned short generate_io_state( void *arg )
{
( void ) arg;
// for( ulString = 0; ulString < 3; ulString++ )
// {
// if( uxParTextGetLED( ulString + 5 ) )
// {
// pcStatus[ ulString ] = "checked";
// }
// else
// {
// pcStatus[ ulString ] = "";
// }
// }
if( lGetLEDState( 1 << 7 ) == 0 )
{
pcStatus = "";
}
else
{
pcStatus = "checked";
}
sprintf( uip_appdata,
"<input type=\"checkbox\" name=\"LED0\" value=\"1\" %s>LED 2.5,"\
"<input type=\"checkbox\" name=\"LED1\" value=\"1\" %s>LED 2.6,"\
"<input type=\"checkbox\" name=\"LED2\" value=\"1\" %s>LED 2.7"\
"<input type=\"checkbox\" name=\"LED0\" value=\"1\" %s>LED 7"\
"<p>"\
"<input type=\"text\" name=\"LCD\" value=\"Enter LCD text\" size=\"16\">",
pcStatus[ 0 ],
pcStatus[ 1 ],
pcStatus[ 2 ] );
pcStatus );
return strlen( uip_appdata );
}

4
Demo/CORTEX_LPC1766_GCC_RedSuite/RTOSDemo/webserver/httpd.c
View file

@ -270,8 +270,8 @@ PT_THREAD(handle_input(struct httpd_state *s))
/* Process any form input being sent to the server. */
{
extern void vApplicationProcessFormInput( char *pcInputString, long xInputLength );
vApplicationProcessFormInput( s->inputbuf, PSOCK_DATALEN(&s->sin) );
extern void vApplicationProcessFormInput( char *pcInputString );
vApplicationProcessFormInput( s->inputbuf );
}
strncpy(s->filename, &s->inputbuf[0], sizeof(s->filename));

40
Demo/CORTEX_LPC1766_GCC_RedSuite/RTOSDemo/webserver/uIP_Task.c
View file

@ -48,6 +48,7 @@
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/* Standard includes. */
#include <string.h>
@ -65,9 +66,8 @@
/* Demo includes. */
#include "emac.h"
//#include "partest.h"
#include "LED.h"
//#include "LPC17xx_defs.h"
#include "LPC17xx.h"
#include "core_cm3.h"
/*-----------------------------------------------------------*/
@ -82,7 +82,6 @@
#define uipTOTAL_FRAME_HEADER_SIZE 54
#define MAC_INTENABLE (*(volatile unsigned long *)(EMAC_BASE + 0xFE4)) /* Interrupt enable reg */
/*-----------------------------------------------------------*/
/*
@ -275,12 +274,12 @@ struct uip_eth_addr xAddr;
}
/*-----------------------------------------------------------*/
void vApplicationProcessFormInput( portCHAR *pcInputString, portBASE_TYPE xInputLength )
void vApplicationProcessFormInput( portCHAR *pcInputString )
{
char *c, *pcText;
static portCHAR cMessageForDisplay[ 32 ];
extern xQueueHandle xLCDQueue;
//xLCDMessage xLCDMessage;
xLCDMessage xLCDMessage;
/* Process the form input sent by the IO page of the served HTML. */
@ -290,31 +289,15 @@ extern xQueueHandle xLCDQueue;
/* Turn LED's on or off in accordance with the check box status. */
if( strstr( c, "LED0=1" ) != NULL )
{
// vParTestSetLED( 5, 0 );
/* Set LED7. */
vSetLEDState( 1 << 7, 1 );
}
else
{
// vParTestSetLED( 5, 1 );
/* Clear LED7. */
vSetLEDState( 1 << 7, 0 );
}
if( strstr( c, "LED1=1" ) != NULL )
{
// vParTestSetLED( 6, 0 );
}
else
{
// vParTestSetLED( 6, 1 );
}
if( strstr( c, "LED2=1" ) != NULL )
{
// vParTestSetLED( 7, 0 );
}
else
{
// vParTestSetLED( 7, 1 );
}
/* Find the start of the text to be displayed on the LCD. */
pcText = strstr( c, "LCD=" );
pcText += strlen( "LCD=" );
@ -336,10 +319,9 @@ extern xQueueHandle xLCDQueue;
}
/* Write the message to the LCD. */
// strcpy( cMessageForDisplay, pcText );
// xLCDMessage.xColumn = 0;
// xLCDMessage.pcMessage = cMessageForDisplay;
// xQueueSend( xLCDQueue, &xLCDMessage, portMAX_DELAY );
strcpy( cMessageForDisplay, pcText );
xLCDMessage.pcMessage = cMessageForDisplay;
xQueueSend( xLCDQueue, &xLCDMessage, portMAX_DELAY );
}
}