Cortex-M35P: Add Cortex-M35P port (#631)

* Cortex-M35P: Add Cortex-M35P port

The Cortex-M35P support added to kernel. The port hasn't been
validated yet with TF-M. Hence TF-M support is not included in this
port.

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>

* Add portNORETURN to the newly added portmacro.h

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
This commit is contained in:
Devaraj Ranganna 2023-02-28 07:28:59 +00:00 committed by GitHub
parent cd87681789
commit 5fdbb7fd2b
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
56 changed files with 11509 additions and 25 deletions

View file

@ -123,6 +123,20 @@ add_library(freertos_kernel_port STATIC
GCC/ARM_CM33_NTZ/non_secure/portasm.c
ThirdParty/GCC/ARM_TFM/os_wrapper_freertos.c>
$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM35P_NONSECURE>:
GCC/ARM_CM35P/non_secure/port.c
GCC/ARM_CM35P/non_secure/portasm.c>
$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM35P_SECURE>:
GCC/ARM_CM35P/secure/secure_context_port.c
GCC/ARM_CM35P/secure/secure_context.c
GCC/ARM_CM35P/secure/secure_heap.c
GCC/ARM_CM35P/secure/secure_init.c>
$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM35P_NTZ_NONSECURE>:
GCC/ARM_CM35P_NTZ/non_secure/port.c
GCC/ARM_CM35P_NTZ/non_secure/portasm.c>
# ARMv8.1-M ports for GCC
$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM55_NONSECURE>:
GCC/ARM_CM55/non_secure/port.c
@ -397,6 +411,20 @@ add_library(freertos_kernel_port STATIC
IAR/ARM_CM33_NTZ/non_secure/port.c
IAR/ARM_CM33_NTZ/non_secure/portasm.s>
$<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM35P_NONSECURE>:
IAR/ARM_CM35P/non_secure/port.c
IAR/ARM_CM35P/non_secure/portasm.s>
$<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM35P_SECURE>:
IAR/ARM_CM35P/secure/secure_context_port_asm.s
IAR/ARM_CM35P/secure/secure_context.c
IAR/ARM_CM35P/secure/secure_heap.c
IAR/ARM_CM35P/secure/secure_init.c>
$<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM35P_NTZ_NONSECURE>:
IAR/ARM_CM35P_NTZ/non_secure/port.c
IAR/ARM_CM35P_NTZ/non_secure/portasm.s>
# ARMv8.1-M ports for IAR EWARM
$<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM55_NONSECURE>:
IAR/ARM_CM55/non_secure/port.c
@ -738,6 +766,10 @@ target_include_directories(freertos_kernel_port PUBLIC
$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM33_NTZ_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM33_NTZ/non_secure>
$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM33_TFM>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM33_NTZ/non_secure>
$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM35P_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM35P/non_secure>
$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM35P_SECURE>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM35P/secure>
$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM35P_NTZ_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM35P_NTZ/non_secure>
# ARMv8.1-M ports for GCC
$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM55_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM55/non_secure>
$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM55_SECURE>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM55/secure>
@ -860,6 +892,10 @@ target_include_directories(freertos_kernel_port PUBLIC
$<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM33_SECURE>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM33/secure>
$<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM33_NTZ_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM33_NTZ/non_secure>
$<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM35P_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM35P/non_secure>
$<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM35P_SECURE>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM35P/secure>
$<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM35P_NTZ_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM35P_NTZ/non_secure>
# ARMv8.1-M ports for IAR EWARM
$<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM55_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM55/non_secure>
$<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM55_SECURE>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM55/secure>