mirror of
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CI-CD Updates (#768)
* Use new version of CI-CD Actions * Use cSpell spell check, and use ubuntu-20.04 for formatting check * Format and spell check all files in the portable directory * Remove the https:// from #errors and #warnings as uncrustify attempts to change it to /* * Use checkout@v3 instead of checkout@v2 on all jobs ---------
This commit is contained in:
Soren Ptak
GitHub
parent
d6bccb1f4c
commit
5fb9b50da8
485 changed files with 108790 additions and 107581 deletions
310
portable/ThirdParty/xClang/XCOREAI/port.c
vendored
310
portable/ThirdParty/xClang/XCOREAI/port.c
vendored
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@ -1,4 +1,4 @@
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// Copyright (c) 2019, XMOS Ltd, All rights reserved
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/* Copyright (c) 2019, XMOS Ltd, All rights reserved */
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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@ -16,139 +16,144 @@ uint32_t ulPortYieldRequired[ portMAX_CORE_COUNT ] = { pdFALSE };
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void vIntercoreInterruptISR( void )
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{
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int xCoreID;
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int xCoreID;
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// debug_printf( "In KCALL: %u\n", ulData );
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xCoreID = rtos_core_id_get();
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ulPortYieldRequired[ xCoreID ] = pdTRUE;
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/* debug_printf( "In KCALL: %u\n", ulData ); */
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xCoreID = rtos_core_id_get();
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ulPortYieldRequired[ xCoreID ] = pdTRUE;
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}
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/*-----------------------------------------------------------*/
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DEFINE_RTOS_INTERRUPT_CALLBACK( pxKernelTimerISR, pvData )
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{
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uint32_t ulLastTrigger;
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uint32_t ulNow;
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int xCoreID;
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uint32_t ulLastTrigger;
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uint32_t ulNow;
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int xCoreID;
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UBaseType_t uxSavedInterruptStatus;
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xCoreID = 0;
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xCoreID = 0;
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configASSERT( xCoreID == rtos_core_id_get() );
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configASSERT( xCoreID == rtos_core_id_get() );
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/* Need the next interrupt to be scheduled relative to
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* the current trigger time, rather than the current
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* time. */
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ulLastTrigger = hwtimer_get_trigger_time( xKernelTimer );
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/* Need the next interrupt to be scheduled relative to
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* the current trigger time, rather than the current
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* time. */
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ulLastTrigger = hwtimer_get_trigger_time( xKernelTimer );
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/* Check to see if the ISR is late. If it is, we don't
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* want to schedule the next interrupt to be in the past. */
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ulNow = hwtimer_get_time( xKernelTimer );
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if( ulNow - ulLastTrigger >= configCPU_CLOCK_HZ / configTICK_RATE_HZ )
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{
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ulLastTrigger = ulNow;
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}
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/* Check to see if the ISR is late. If it is, we don't
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* want to schedule the next interrupt to be in the past. */
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ulNow = hwtimer_get_time( xKernelTimer );
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ulLastTrigger += configCPU_CLOCK_HZ / configTICK_RATE_HZ;
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hwtimer_change_trigger_time( xKernelTimer, ulLastTrigger );
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if( ulNow - ulLastTrigger >= configCPU_CLOCK_HZ / configTICK_RATE_HZ )
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{
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ulLastTrigger = ulNow;
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}
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#if configUPDATE_RTOS_TIME_FROM_TICK_ISR == 1
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rtos_time_increment( RTOS_TICK_PERIOD( configTICK_RATE_HZ ) );
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#endif
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ulLastTrigger += configCPU_CLOCK_HZ / configTICK_RATE_HZ;
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hwtimer_change_trigger_time( xKernelTimer, ulLastTrigger );
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#if configUPDATE_RTOS_TIME_FROM_TICK_ISR == 1
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rtos_time_increment( RTOS_TICK_PERIOD( configTICK_RATE_HZ ) );
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#endif
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uxSavedInterruptStatus = taskENTER_CRITICAL_FROM_ISR();
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if( xTaskIncrementTick() != pdFALSE )
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{
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ulPortYieldRequired[ xCoreID ] = pdTRUE;
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}
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if( xTaskIncrementTick() != pdFALSE )
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{
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ulPortYieldRequired[ xCoreID ] = pdTRUE;
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}
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taskEXIT_CRITICAL_FROM_ISR( uxSavedInterruptStatus );
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}
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/*-----------------------------------------------------------*/
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void vPortYieldOtherCore( int xOtherCoreID )
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{
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int xCoreID;
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int xCoreID;
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/*
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* This function must be called from within a critical section.
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*/
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/*
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* This function must be called from within a critical section.
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*/
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xCoreID = rtos_core_id_get();
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xCoreID = rtos_core_id_get();
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// debug_printf("%d->%d\n", xCoreID, xOtherCoreID);
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/* debug_printf("%d->%d\n", xCoreID, xOtherCoreID); */
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// debug_printf("Yield core %d from %d\n", xOtherCoreID, xCoreID );
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/* debug_printf("Yield core %d from %d\n", xOtherCoreID, xCoreID ); */
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rtos_irq( xOtherCoreID, xCoreID );
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rtos_irq( xOtherCoreID, xCoreID );
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}
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/*-----------------------------------------------------------*/
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static int prvCoreInit( void )
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{
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int xCoreID;
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int xCoreID;
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xCoreID = rtos_core_register();
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debug_printf( "Logical Core %d initializing as FreeRTOS Core %d\n", get_logical_core_id(), xCoreID );
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xCoreID = rtos_core_register();
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debug_printf( "Logical Core %d initializing as FreeRTOS Core %d\n", get_logical_core_id(), xCoreID );
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asm volatile (
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"ldap r11, kexcept\n\t"
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"set kep, r11\n\t"
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:
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:
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: "r11"
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);
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asm volatile (
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"ldap r11, kexcept\n\t"
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"set kep, r11\n\t"
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:
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:
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: "r11"
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);
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rtos_irq_enable( configNUMBER_OF_CORES );
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rtos_irq_enable( configNUMBER_OF_CORES );
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/*
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* All threads wait here until all have enabled IRQs
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*/
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while( rtos_irq_ready() == pdFALSE );
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/*
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* All threads wait here until all have enabled IRQs
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*/
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while( rtos_irq_ready() == pdFALSE )
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{
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}
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if( xCoreID == 0 )
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{
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uint32_t ulNow;
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ulNow = hwtimer_get_time( xKernelTimer );
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// debug_printf( "The time is now (%u)\n", ulNow );
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if( xCoreID == 0 )
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{
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uint32_t ulNow;
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ulNow = hwtimer_get_time( xKernelTimer );
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/* debug_printf( "The time is now (%u)\n", ulNow ); */
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ulNow += configCPU_CLOCK_HZ / configTICK_RATE_HZ;
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ulNow += configCPU_CLOCK_HZ / configTICK_RATE_HZ;
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triggerable_setup_interrupt_callback( xKernelTimer, NULL, RTOS_INTERRUPT_CALLBACK( pxKernelTimerISR ) );
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hwtimer_set_trigger_time( xKernelTimer, ulNow );
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triggerable_enable_trigger( xKernelTimer );
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}
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triggerable_setup_interrupt_callback( xKernelTimer, NULL, RTOS_INTERRUPT_CALLBACK( pxKernelTimerISR ) );
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hwtimer_set_trigger_time( xKernelTimer, ulNow );
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triggerable_enable_trigger( xKernelTimer );
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}
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return xCoreID;
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return xCoreID;
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}
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/*-----------------------------------------------------------*/
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DEFINE_RTOS_KERNEL_ENTRY( void, vPortStartSchedulerOnCore, void )
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{
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int xCoreID;
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int xCoreID;
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xCoreID = prvCoreInit();
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xCoreID = prvCoreInit();
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#if( configUSE_CORE_INIT_HOOK == 1 )
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{
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extern void vApplicationCoreInitHook( BaseType_t xCoreID );
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#if ( configUSE_CORE_INIT_HOOK == 1 )
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{
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extern void vApplicationCoreInitHook( BaseType_t xCoreID );
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vApplicationCoreInitHook( xCoreID );
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}
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#endif
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vApplicationCoreInitHook( xCoreID );
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}
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#endif
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debug_printf( "FreeRTOS Core %d initialized\n", xCoreID );
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debug_printf( "FreeRTOS Core %d initialized\n", xCoreID );
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/*
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* Restore the context of the first thread
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* to run and jump into it.
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*/
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asm volatile (
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"mov r6, %0\n\t" /* R6 must be the FreeRTOS core ID*/
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"ldaw r5, dp[pxCurrentTCBs]\n\t" /* R5 must be the TCB list which is indexed by R6 */
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"bu _freertos_restore_ctx\n\t"
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: /* no outputs */
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: "r"(xCoreID)
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: "r5", "r6"
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);
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/*
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* Restore the context of the first thread
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* to run and jump into it.
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*/
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asm volatile (
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"mov r6, %0\n\t" /* R6 must be the FreeRTOS core ID*/
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"ldaw r5, dp[pxCurrentTCBs]\n\t" /* R5 must be the TCB list which is indexed by R6 */
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"bu _freertos_restore_ctx\n\t"
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: /* no outputs */
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: "r" ( xCoreID )
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: "r5", "r6"
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);
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}
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/*-----------------------------------------------------------*/
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@ -159,70 +164,73 @@ DEFINE_RTOS_KERNEL_ENTRY( void, vPortStartSchedulerOnCore, void )
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/*
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* See header file for description.
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*/
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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TaskFunction_t pxCode,
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void * pvParameters )
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{
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//debug_printf( "Top of stack was %p for task %p\n", pxTopOfStack, pxCode );
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/*
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* Grow the thread's stack by portTHREAD_CONTEXT_STACK_GROWTH
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* so we can push the context onto it.
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*/
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pxTopOfStack -= portTHREAD_CONTEXT_STACK_GROWTH;
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/*debug_printf( "Top of stack was %p for task %p\n", pxTopOfStack, pxCode ); */
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uint32_t dp;
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uint32_t cp;
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/*
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* Grow the thread's stack by portTHREAD_CONTEXT_STACK_GROWTH
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* so we can push the context onto it.
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*/
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pxTopOfStack -= portTHREAD_CONTEXT_STACK_GROWTH;
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/*
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* We need to get the current CP and DP pointers.
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*/
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asm volatile (
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"ldaw r11, cp[0]\n\t" /* get CP into R11 */
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"mov %0, r11\n\t" /* get R11 (CP) into cp */
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"ldaw r11, dp[0]\n\t" /* get DP into R11 */
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"mov %1, r11\n\t" /* get R11 (DP) into dp */
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: "=r"(cp), "=r"(dp) /* output 0 is cp, output 1 is dp */
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: /* there are no inputs */
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: "r11" /* R11 gets clobbered */
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);
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uint32_t dp;
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uint32_t cp;
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/*
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* Push the thread context onto the stack.
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* Saved PC will point to the new thread's
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* entry pointer.
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* Interrupts will default to enabled.
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* KEDI is also set to enable dual issue mode
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* upon kernel entry.
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*/
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pxTopOfStack[ 1 ] = ( StackType_t ) pxCode; /* SP[1] := SPC */
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/*
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* We need to get the current CP and DP pointers.
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*/
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asm volatile (
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"ldaw r11, cp[0]\n\t" /* get CP into R11 */
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"mov %0, r11\n\t" /* get R11 (CP) into cp */
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"ldaw r11, dp[0]\n\t" /* get DP into R11 */
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"mov %1, r11\n\t" /* get R11 (DP) into dp */
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: "=r" ( cp ), "=r" ( dp ) /* output 0 is cp, output 1 is dp */
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: /* there are no inputs */
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: "r11" /* R11 gets clobbered */
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);
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/*
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* Push the thread context onto the stack.
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* Saved PC will point to the new thread's
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* entry pointer.
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* Interrupts will default to enabled.
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* KEDI is also set to enable dual issue mode
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* upon kernel entry.
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*/
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pxTopOfStack[ 1 ] = ( StackType_t ) pxCode; /* SP[1] := SPC */
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pxTopOfStack[ 2 ] = XS1_SR_IEBLE_MASK
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| XS1_SR_KEDI_MASK; /* SP[2] := SSR */
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pxTopOfStack[ 3 ] = 0x00000000; /* SP[3] := SED */
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pxTopOfStack[ 4 ] = 0x00000000; /* SP[4] := ET */
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pxTopOfStack[ 5 ] = dp; /* SP[5] := DP */
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pxTopOfStack[ 6 ] = cp; /* SP[6] := CP */
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pxTopOfStack[ 7 ] = 0x00000000; /* SP[7] := LR */
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pxTopOfStack[ 8 ] = ( StackType_t ) pvParameters; /* SP[8] := R0 */
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pxTopOfStack[ 9 ] = 0x01010101; /* SP[9] := R1 */
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pxTopOfStack[ 10 ] = 0x02020202; /* SP[10] := R2 */
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pxTopOfStack[ 11 ] = 0x03030303; /* SP[11] := R3 */
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pxTopOfStack[ 12 ] = 0x04040404; /* SP[12] := R4 */
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pxTopOfStack[ 13 ] = 0x05050505; /* SP[13] := R5 */
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pxTopOfStack[ 14 ] = 0x06060606; /* SP[14] := R6 */
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pxTopOfStack[ 15 ] = 0x07070707; /* SP[15] := R7 */
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pxTopOfStack[ 16 ] = 0x08080808; /* SP[16] := R8 */
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pxTopOfStack[ 17 ] = 0x09090909; /* SP[17] := R9 */
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pxTopOfStack[ 18 ] = 0x10101010; /* SP[18] := R10 */
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pxTopOfStack[ 19 ] = 0x11111111; /* SP[19] := R11 */
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pxTopOfStack[ 20 ] = 0x00000000; /* SP[20] := vH and vSR */
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memset(&pxTopOfStack[21], 0, 32); /* SP[21 - 28] := vR */
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memset(&pxTopOfStack[29], 1, 32); /* SP[29 - 36] := vD */
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memset(&pxTopOfStack[37], 2, 32); /* SP[37 - 44] := vC */
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| XS1_SR_KEDI_MASK; /* SP[2] := SSR */
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pxTopOfStack[ 3 ] = 0x00000000; /* SP[3] := SED */
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pxTopOfStack[ 4 ] = 0x00000000; /* SP[4] := ET */
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pxTopOfStack[ 5 ] = dp; /* SP[5] := DP */
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pxTopOfStack[ 6 ] = cp; /* SP[6] := CP */
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pxTopOfStack[ 7 ] = 0x00000000; /* SP[7] := LR */
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pxTopOfStack[ 8 ] = ( StackType_t ) pvParameters; /* SP[8] := R0 */
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pxTopOfStack[ 9 ] = 0x01010101; /* SP[9] := R1 */
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pxTopOfStack[ 10 ] = 0x02020202; /* SP[10] := R2 */
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pxTopOfStack[ 11 ] = 0x03030303; /* SP[11] := R3 */
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pxTopOfStack[ 12 ] = 0x04040404; /* SP[12] := R4 */
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pxTopOfStack[ 13 ] = 0x05050505; /* SP[13] := R5 */
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pxTopOfStack[ 14 ] = 0x06060606; /* SP[14] := R6 */
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pxTopOfStack[ 15 ] = 0x07070707; /* SP[15] := R7 */
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pxTopOfStack[ 16 ] = 0x08080808; /* SP[16] := R8 */
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pxTopOfStack[ 17 ] = 0x09090909; /* SP[17] := R9 */
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pxTopOfStack[ 18 ] = 0x10101010; /* SP[18] := R10 */
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pxTopOfStack[ 19 ] = 0x11111111; /* SP[19] := R11 */
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pxTopOfStack[ 20 ] = 0x00000000; /* SP[20] := vH and vSR */
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memset( &pxTopOfStack[ 21 ], 0, 32 ); /* SP[21 - 28] := vR */
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memset( &pxTopOfStack[ 29 ], 1, 32 ); /* SP[29 - 36] := vD */
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memset( &pxTopOfStack[ 37 ], 2, 32 ); /* SP[37 - 44] := vC */
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//debug_printf( "Top of stack is now %p for task %p\n", pxTopOfStack, pxCode );
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/*debug_printf( "Top of stack is now %p for task %p\n", pxTopOfStack, pxCode ); */
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/*
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* Returns the new top of the stack
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*/
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return pxTopOfStack;
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/*
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* Returns the new top of the stack
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*/
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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@ -233,22 +241,22 @@ void vPortStartSMPScheduler( void );
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*/
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BaseType_t xPortStartScheduler( void )
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{
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if( ( configNUMBER_OF_CORES > portMAX_CORE_COUNT ) || ( configNUMBER_OF_CORES <= 0 ) )
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{
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return pdFAIL;
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}
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if( ( configNUMBER_OF_CORES > portMAX_CORE_COUNT ) || ( configNUMBER_OF_CORES <= 0 ) )
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{
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return pdFAIL;
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}
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rtos_locks_initialize();
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xKernelTimer = hwtimer_alloc();
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rtos_locks_initialize();
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xKernelTimer = hwtimer_alloc();
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vPortStartSMPScheduler();
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vPortStartSMPScheduler();
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return pdPASS;
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return pdPASS;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* Do not implement. */
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/* Do not implement. */
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}
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/*-----------------------------------------------------------*/
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|
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229
portable/ThirdParty/xClang/XCOREAI/portmacro.h
vendored
229
portable/ThirdParty/xClang/XCOREAI/portmacro.h
vendored
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@ -1,63 +1,63 @@
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// Copyright (c) 2020, XMOS Ltd, All rights reserved
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/* Copyright (c) 2020, XMOS Ltd, All rights reserved */
|
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|
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#ifndef PORTMACRO_H
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#define PORTMACRO_H
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#define PORTMACRO_H
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#ifndef __ASSEMBLER__
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#ifndef __ASSEMBLER__
|
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/* Inclusion of xc1.h will result in clock being defined as a type.
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* By default, FreeRTOS will require standard time.h, where clock is a function.
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*/
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#ifndef USE_XCORE_CLOCK_TYPE
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#define _clock_defined
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#endif
|
||||
#ifndef USE_XCORE_CLOCK_TYPE
|
||||
#define _clock_defined
|
||||
#endif
|
||||
|
||||
#include <xs1.h>
|
||||
#include "rtos_support.h"
|
||||
#include <xs1.h>
|
||||
#include "rtos_support.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Type definitions. */
|
||||
#define portSTACK_TYPE uint32_t
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef double portDOUBLE;
|
||||
typedef int32_t BaseType_t;
|
||||
typedef uint32_t UBaseType_t;
|
||||
#define portSTACK_TYPE uint32_t
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef double portDOUBLE;
|
||||
typedef int32_t BaseType_t;
|
||||
typedef uint32_t UBaseType_t;
|
||||
|
||||
#define portBASE_TYPE BaseType_t
|
||||
#define portBASE_TYPE BaseType_t
|
||||
|
||||
#if( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
#if ( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
#endif
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
* not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#endif /* __ASSEMBLER__ */
|
||||
#endif /* __ASSEMBLER__ */
|
||||
|
||||
/* Architecture specifics. These can be used by assembly files as well. */
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
#define portCRITICAL_NESTING_IN_TCB 1
|
||||
#define portMAX_CORE_COUNT 8
|
||||
#ifndef configNUMBER_OF_CORES
|
||||
#define configNUMBER_OF_CORES 1
|
||||
#endif
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
#define portCRITICAL_NESTING_IN_TCB 1
|
||||
#define portMAX_CORE_COUNT 8
|
||||
#ifndef configNUMBER_OF_CORES
|
||||
#define configNUMBER_OF_CORES 1
|
||||
#endif
|
||||
|
||||
/* This may be set to zero in the config file if the rtos_time
|
||||
functions are not needed or if it is incremented elsewhere. */
|
||||
#ifndef configUPDATE_RTOS_TIME_FROM_TICK_ISR
|
||||
#define configUPDATE_RTOS_TIME_FROM_TICK_ISR 1
|
||||
#endif
|
||||
* functions are not needed or if it is incremented elsewhere. */
|
||||
#ifndef configUPDATE_RTOS_TIME_FROM_TICK_ISR
|
||||
#define configUPDATE_RTOS_TIME_FROM_TICK_ISR 1
|
||||
#endif
|
||||
|
||||
/*
|
||||
* When entering an ISR we need to grow the stack by one more word than
|
||||
|
|
@ -66,150 +66,149 @@ functions are not needed or if it is incremented elsewhere. */
|
|||
* it is OK to store words at SP[0]. Therefore the ISR must leave SP[0] alone
|
||||
* even though it is normally not necessary to do so.
|
||||
*/
|
||||
#define portTHREAD_CONTEXT_STACK_GROWTH RTOS_SUPPORT_INTERRUPT_STACK_GROWTH
|
||||
#define portTHREAD_CONTEXT_STACK_GROWTH RTOS_SUPPORT_INTERRUPT_STACK_GROWTH
|
||||
|
||||
#ifndef __ASSEMBLER__
|
||||
#ifndef __ASSEMBLER__
|
||||
|
||||
/* Check validity of number of cores specified in config */
|
||||
#if ( configNUMBER_OF_CORES < 1 || portMAX_CORE_COUNT < configNUMBER_OF_CORES )
|
||||
#error "Invalid number of cores specified in config!"
|
||||
#endif
|
||||
#if ( configNUMBER_OF_CORES < 1 || portMAX_CORE_COUNT < configNUMBER_OF_CORES )
|
||||
#error "Invalid number of cores specified in config!"
|
||||
#endif
|
||||
|
||||
#define portMEMORY_BARRIER() RTOS_MEMORY_BARRIER()
|
||||
#define portTASK_STACK_DEPTH(pxTaskCode) RTOS_THREAD_STACK_SIZE(pxTaskCode)
|
||||
#define portMEMORY_BARRIER() RTOS_MEMORY_BARRIER()
|
||||
#define portTASK_STACK_DEPTH( pxTaskCode ) RTOS_THREAD_STACK_SIZE( pxTaskCode )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Scheduler utilities. */
|
||||
#define portYIELD() asm volatile( "KCALLI_lu6 0" ::: "memory" )
|
||||
#define portYIELD() asm volatile ( "KCALLI_lu6 0" ::: "memory" )
|
||||
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
|
||||
do \
|
||||
{ \
|
||||
if( xSwitchRequired != pdFALSE ) \
|
||||
{ \
|
||||
extern uint32_t ulPortYieldRequired[ portMAX_CORE_COUNT ]; \
|
||||
ulPortYieldRequired[ portGET_CORE_ID() ] = pdTRUE; \
|
||||
} \
|
||||
} while( 0 )
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
|
||||
do \
|
||||
{ \
|
||||
if( xSwitchRequired != pdFALSE ) \
|
||||
{ \
|
||||
extern uint32_t ulPortYieldRequired[ portMAX_CORE_COUNT ]; \
|
||||
ulPortYieldRequired[ portGET_CORE_ID() ] = pdTRUE; \
|
||||
} \
|
||||
} while( 0 )
|
||||
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* SMP utilities. */
|
||||
#define portGET_CORE_ID() rtos_core_id_get()
|
||||
#define portGET_CORE_ID() rtos_core_id_get()
|
||||
|
||||
void vPortYieldOtherCore( int xOtherCoreID );
|
||||
#define portYIELD_CORE( x ) vPortYieldOtherCore( x )
|
||||
void vPortYieldOtherCore( int xOtherCoreID );
|
||||
#define portYIELD_CORE( x ) vPortYieldOtherCore( x )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Architecture specific optimisations. */
|
||||
#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
|
||||
#endif
|
||||
#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
|
||||
#endif
|
||||
|
||||
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
|
||||
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
|
||||
|
||||
/* Store/clear the ready priorities in a bit map. */
|
||||
#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
|
||||
#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
|
||||
/* Store/clear the ready priorities in a bit map. */
|
||||
#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
|
||||
#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __builtin_clz( uxReadyPriorities ) )
|
||||
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __builtin_clz( uxReadyPriorities ) )
|
||||
|
||||
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
|
||||
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Critical section management. */
|
||||
|
||||
#define portGET_INTERRUPT_STATE() rtos_interrupt_mask_get()
|
||||
#define portGET_INTERRUPT_STATE() rtos_interrupt_mask_get()
|
||||
|
||||
/*
|
||||
* This differs from the standard portDISABLE_INTERRUPTS()
|
||||
* in that it also returns what the interrupt state was
|
||||
* before it disabling interrupts.
|
||||
*/
|
||||
#define portDISABLE_INTERRUPTS() rtos_interrupt_mask_all()
|
||||
#define portDISABLE_INTERRUPTS() rtos_interrupt_mask_all()
|
||||
|
||||
#define portENABLE_INTERRUPTS() rtos_interrupt_unmask_all()
|
||||
#define portENABLE_INTERRUPTS() rtos_interrupt_unmask_all()
|
||||
|
||||
/*
|
||||
* Port set interrupt mask and clear interrupt mask.
|
||||
*/
|
||||
#define portSET_INTERRUPT_MASK() rtos_interrupt_mask_all()
|
||||
#define portCLEAR_INTERRUPT_MASK( ulState ) rtos_interrupt_mask_set( ulState )
|
||||
#define portSET_INTERRUPT_MASK() rtos_interrupt_mask_all()
|
||||
#define portCLEAR_INTERRUPT_MASK( ulState ) rtos_interrupt_mask_set( ulState )
|
||||
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ( 0 )
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) ( (void) x )
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ( 0 )
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) ( ( void ) x )
|
||||
|
||||
/*
|
||||
* Will enable interrupts if ulState is non-zero.
|
||||
*/
|
||||
#define portRESTORE_INTERRUPTS(ulState) rtos_interrupt_mask_set(ulState)
|
||||
#define portRESTORE_INTERRUPTS( ulState ) rtos_interrupt_mask_set( ulState )
|
||||
|
||||
/*
|
||||
* Returns non-zero if currently running in an
|
||||
* ISR or otherwise in kernel mode.
|
||||
*/
|
||||
#define portCHECK_IF_IN_ISR() rtos_isr_running()
|
||||
#define portCHECK_IF_IN_ISR() rtos_isr_running()
|
||||
|
||||
#define portASSERT_IF_IN_ISR() configASSERT( portCHECK_IF_IN_ISR() == 0 )
|
||||
#define portASSERT_IF_IN_ISR() configASSERT( portCHECK_IF_IN_ISR() == 0 )
|
||||
|
||||
#define portGET_ISR_LOCK() rtos_lock_acquire(0)
|
||||
#define portRELEASE_ISR_LOCK() rtos_lock_release(0)
|
||||
#define portGET_TASK_LOCK() rtos_lock_acquire(1)
|
||||
#define portRELEASE_TASK_LOCK() rtos_lock_release(1)
|
||||
#define portGET_ISR_LOCK() rtos_lock_acquire( 0 )
|
||||
#define portRELEASE_ISR_LOCK() rtos_lock_release( 0 )
|
||||
#define portGET_TASK_LOCK() rtos_lock_acquire( 1 )
|
||||
#define portRELEASE_TASK_LOCK() rtos_lock_release( 1 )
|
||||
|
||||
void vTaskEnterCritical(void);
|
||||
void vTaskExitCritical(void);
|
||||
#define portENTER_CRITICAL() vTaskEnterCritical()
|
||||
#define portEXIT_CRITICAL() vTaskExitCritical()
|
||||
void vTaskEnterCritical( void );
|
||||
void vTaskExitCritical( void );
|
||||
#define portENTER_CRITICAL() vTaskEnterCritical()
|
||||
#define portEXIT_CRITICAL() vTaskExitCritical()
|
||||
|
||||
extern UBaseType_t vTaskEnterCriticalFromISR( void );
|
||||
extern void vTaskExitCriticalFromISR( UBaseType_t uxSavedInterruptStatus );
|
||||
#define portENTER_CRITICAL_FROM_ISR vTaskEnterCriticalFromISR
|
||||
#define portEXIT_CRITICAL_FROM_ISR vTaskExitCriticalFromISR
|
||||
extern UBaseType_t vTaskEnterCriticalFromISR( void );
|
||||
extern void vTaskExitCriticalFromISR( UBaseType_t uxSavedInterruptStatus );
|
||||
#define portENTER_CRITICAL_FROM_ISR vTaskEnterCriticalFromISR
|
||||
#define portEXIT_CRITICAL_FROM_ISR vTaskExitCriticalFromISR
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Runtime stats support */
|
||||
#if ( configGENERATE_RUN_TIME_STATS == 1 )
|
||||
int xscope_gettime( void );
|
||||
#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() /* nothing needed here */
|
||||
#define portGET_RUN_TIME_COUNTER_VALUE() xscope_gettime()
|
||||
#endif
|
||||
#if ( configGENERATE_RUN_TIME_STATS == 1 )
|
||||
int xscope_gettime( void );
|
||||
#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() /* nothing needed here */
|
||||
#define portGET_RUN_TIME_COUNTER_VALUE() xscope_gettime()
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Maps sprintf and snprintf to the lite version in lib_rtos_support */
|
||||
#if ( configUSE_DEBUG_SPRINTF == 1 )
|
||||
#define sprintf(...) rtos_sprintf(__VA_ARGS__)
|
||||
#define snprintf(...) rtos_snprintf(__VA_ARGS__)
|
||||
#endif
|
||||
#if ( configUSE_DEBUG_SPRINTF == 1 )
|
||||
#define sprintf( ... ) rtos_sprintf( __VA_ARGS__ )
|
||||
#define snprintf( ... ) rtos_snprintf( __VA_ARGS__ )
|
||||
#endif
|
||||
|
||||
/* Attribute for the pxCallbackFunction member of the Timer_t struct.
|
||||
Required by xcc to calculate stack usage. */
|
||||
#define portTIMER_CALLBACK_ATTRIBUTE __attribute__((fptrgroup("timerCallbackGroup")))
|
||||
* Required by xcc to calculate stack usage. */
|
||||
#define portTIMER_CALLBACK_ATTRIBUTE __attribute__( ( fptrgroup( "timerCallbackGroup" ) ) )
|
||||
|
||||
/* Timer callback function macros. For xcc this ensures they get added to the timer callback
|
||||
group so that stack usage for certain functions in timers.c can be calculated. */
|
||||
#define portTIMER_CALLBACK_FUNCTION_PROTO( vFunction, xTimer ) void vFunction( TimerHandle_t xTimer )
|
||||
#define portTIMER_CALLBACK_FUNCTION( vFunction, xTimer ) portTIMER_CALLBACK_ATTRIBUTE void vFunction( TimerHandle_t xTimer )
|
||||
* group so that stack usage for certain functions in timers.c can be calculated. */
|
||||
#define portTIMER_CALLBACK_FUNCTION_PROTO( vFunction, xTimer ) void vFunction( TimerHandle_t xTimer )
|
||||
#define portTIMER_CALLBACK_FUNCTION( vFunction, xTimer ) portTIMER_CALLBACK_ATTRIBUTE void vFunction( TimerHandle_t xTimer )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. These are
|
||||
not necessary for to use this port. They are defined so the common demo files
|
||||
(which build with all the ports) will build. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
* not necessary for to use this port. They are defined so the common demo files
|
||||
* (which build with all the ports) will build. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLER__ */
|
||||
#endif /* __ASSEMBLER__ */
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
// Copyright (c) 2020, XMOS Ltd, All rights reserved
|
||||
/* Copyright (c) 2020, XMOS Ltd, All rights reserved */
|
||||
|
||||
#ifndef RTOS_SUPPORT_RTOS_CONFIG_H_
|
||||
#define RTOS_SUPPORT_RTOS_CONFIG_H_
|
||||
|
|
@ -6,7 +6,7 @@
|
|||
/**
|
||||
* Lets the application know that the RTOS in use is FreeRTOS.
|
||||
*/
|
||||
#define RTOS_FREERTOS 1
|
||||
#define RTOS_FREERTOS 1
|
||||
|
||||
/**
|
||||
* The number of words to extend the stack by when entering an ISR.
|
||||
|
|
@ -17,28 +17,29 @@
|
|||
* it is OK to store words at SP[0]. Therefore the ISR must leave SP[0] alone
|
||||
* even though it is normally not necessary to do so.
|
||||
*/
|
||||
#define RTOS_SUPPORT_INTERRUPT_STACK_GROWTH ( 44 + 1 )
|
||||
#define RTOS_SUPPORT_INTERRUPT_STACK_GROWTH ( 44 + 1 )
|
||||
|
||||
/**
|
||||
* The word offset into the stack where R1 is to be stored after it
|
||||
* is extended when saving a thread's context.
|
||||
*/
|
||||
#define RTOS_SUPPORT_INTERRUPT_R1_STACK_OFFSET 9
|
||||
#define RTOS_SUPPORT_INTERRUPT_R1_STACK_OFFSET 9
|
||||
|
||||
/**
|
||||
* The word offset into the stack where R11 is to be stored after it
|
||||
* is extended when saving a thread's context.
|
||||
*/
|
||||
#define RTOS_SUPPORT_INTERRUPT_R11_STACK_OFFSET 19
|
||||
#define RTOS_SUPPORT_INTERRUPT_R11_STACK_OFFSET 19
|
||||
|
||||
/**
|
||||
* The RTOS provided handler that should run when a
|
||||
* core receives an intercore interrupt request.
|
||||
*/
|
||||
#define RTOS_INTERCORE_INTERRUPT_ISR() do { \
|
||||
void vIntercoreInterruptISR( void ); \
|
||||
vIntercoreInterruptISR(); \
|
||||
} while ( 0 )
|
||||
#define RTOS_INTERCORE_INTERRUPT_ISR() \
|
||||
do { \
|
||||
void vIntercoreInterruptISR( void ); \
|
||||
vIntercoreInterruptISR(); \
|
||||
} while( 0 )
|
||||
|
||||
/**
|
||||
* The number of hardware locks that the RTOS
|
||||
|
|
@ -48,48 +49,47 @@
|
|||
* Note that the IRQ routines require a lock and
|
||||
* will share the first one with the RTOS.
|
||||
*/
|
||||
#define RTOS_LOCK_COUNT 2
|
||||
#define RTOS_LOCK_COUNT 2
|
||||
|
||||
/**
|
||||
* Remaps all calls to debug_printf() to rtos_printf().
|
||||
* When this is on, files should not include both rtos_support.h
|
||||
* and debug_print.h.
|
||||
*/
|
||||
#define RTOS_DEBUG_PRINTF_REMAP 1
|
||||
#define RTOS_DEBUG_PRINTF_REMAP 1
|
||||
|
||||
|
||||
#ifdef configENABLE_DEBUG_PRINTF
|
||||
#if configENABLE_DEBUG_PRINTF
|
||||
#if configENABLE_DEBUG_PRINTF
|
||||
|
||||
/* ensure that debug_printf is enabled */
|
||||
#ifdef DEBUG_PRINT_ENABLE
|
||||
#undef DEBUG_PRINT_ENABLE
|
||||
#endif
|
||||
#define DEBUG_PRINT_ENABLE 1
|
||||
/* ensure that debug_printf is enabled */
|
||||
#ifdef DEBUG_PRINT_ENABLE
|
||||
#undef DEBUG_PRINT_ENABLE
|
||||
#endif
|
||||
#define DEBUG_PRINT_ENABLE 1
|
||||
|
||||
#ifndef configTASKS_DEBUG
|
||||
#define configTASKS_DEBUG 0
|
||||
#endif
|
||||
#if configTASKS_DEBUG == 1
|
||||
#define DEBUG_PRINT_ENABLE_FREERTOS_TASKS 1
|
||||
#else
|
||||
#define DEBUG_PRINT_DISABLE_FREERTOS_TASKS 1
|
||||
#endif
|
||||
#ifndef configTASKS_DEBUG
|
||||
#define configTASKS_DEBUG 0
|
||||
#endif
|
||||
#if configTASKS_DEBUG == 1
|
||||
#define DEBUG_PRINT_ENABLE_FREERTOS_TASKS 1
|
||||
#else
|
||||
#define DEBUG_PRINT_DISABLE_FREERTOS_TASKS 1
|
||||
#endif
|
||||
|
||||
#else /* configENABLE_DEBUG_PRINTF */
|
||||
#else /* configENABLE_DEBUG_PRINTF */
|
||||
|
||||
/* ensure that debug_printf is disabled */
|
||||
#ifdef DEBUG_UNIT
|
||||
#undef DEBUG_UNIT
|
||||
#endif
|
||||
#ifdef DEBUG_PRINT_ENABLE
|
||||
#undef DEBUG_PRINT_ENABLE
|
||||
#endif
|
||||
/* ensure that debug_printf is disabled */
|
||||
#ifdef DEBUG_UNIT
|
||||
#undef DEBUG_UNIT
|
||||
#endif
|
||||
#ifdef DEBUG_PRINT_ENABLE
|
||||
#undef DEBUG_PRINT_ENABLE
|
||||
#endif
|
||||
|
||||
#define DEBUG_PRINT_ENABLE 0
|
||||
#define DEBUG_PRINT_ENABLE 0
|
||||
|
||||
#endif /* configENABLE_DEBUG_PRINTF */
|
||||
#endif
|
||||
#endif /* configENABLE_DEBUG_PRINTF */
|
||||
#endif /* ifdef configENABLE_DEBUG_PRINTF */
|
||||
|
||||
#endif /* RTOS_SUPPORT_RTOS_CONFIG_H_ */
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue