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CI-CD Updates (#768)
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This commit is contained in:
Soren Ptak
GitHub
parent
d6bccb1f4c
commit
5fb9b50da8
485 changed files with 108790 additions and 107581 deletions
206
portable/ThirdParty/GCC/Xtensa_ESP32/port_systick.c
vendored
206
portable/ThirdParty/GCC/Xtensa_ESP32/port_systick.c
vendored
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@ -14,51 +14,51 @@
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#include "esp_log.h"
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#include "sdkconfig.h"
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#ifdef CONFIG_FREERTOS_SYSTICK_USES_SYSTIMER
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#include "soc/periph_defs.h"
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#include "soc/system_reg.h"
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#include "hal/systimer_hal.h"
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#include "hal/systimer_ll.h"
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#include "soc/periph_defs.h"
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#include "soc/system_reg.h"
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#include "hal/systimer_hal.h"
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#include "hal/systimer_ll.h"
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#endif
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#ifdef CONFIG_PM_TRACE
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#include "esp_private/pm_trace.h"
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#include "esp_private/pm_trace.h"
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#endif //CONFIG_PM_TRACE
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BaseType_t xPortSysTickHandler(void);
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BaseType_t xPortSysTickHandler( void );
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#ifdef CONFIG_FREERTOS_SYSTICK_USES_CCOUNT
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extern void _frxt_tick_timer_init(void);
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extern void _xt_tick_divisor_init(void);
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extern void _frxt_tick_timer_init( void );
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extern void _xt_tick_divisor_init( void );
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#ifdef CONFIG_FREERTOS_CORETIMER_0
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#define SYSTICK_INTR_ID (ETS_INTERNAL_TIMER0_INTR_SOURCE+ETS_INTERNAL_INTR_SOURCE_OFF)
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#endif
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#ifdef CONFIG_FREERTOS_CORETIMER_1
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#define SYSTICK_INTR_ID (ETS_INTERNAL_TIMER1_INTR_SOURCE+ETS_INTERNAL_INTR_SOURCE_OFF)
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#endif
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#ifdef CONFIG_FREERTOS_CORETIMER_0
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#define SYSTICK_INTR_ID ( ETS_INTERNAL_TIMER0_INTR_SOURCE + ETS_INTERNAL_INTR_SOURCE_OFF )
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#endif
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#ifdef CONFIG_FREERTOS_CORETIMER_1
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#define SYSTICK_INTR_ID ( ETS_INTERNAL_TIMER1_INTR_SOURCE + ETS_INTERNAL_INTR_SOURCE_OFF )
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#endif
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/**
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* @brief Initialize CCONT timer to generate the tick interrupt
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*
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*/
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void vPortSetupTimer(void)
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{
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/* Init the tick divisor value */
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_xt_tick_divisor_init();
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void vPortSetupTimer( void )
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{
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/* Init the tick divisor value */
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_xt_tick_divisor_init();
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_frxt_tick_timer_init();
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}
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_frxt_tick_timer_init();
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}
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#elif CONFIG_FREERTOS_SYSTICK_USES_SYSTIMER
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_Static_assert(SOC_CPU_CORES_NUM <= SOC_SYSTIMER_ALARM_NUM - 1, "the number of cores must match the number of core alarms in SYSTIMER");
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_Static_assert( SOC_CPU_CORES_NUM <= SOC_SYSTIMER_ALARM_NUM - 1, "the number of cores must match the number of core alarms in SYSTIMER" );
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void SysTickIsrHandler(void *arg);
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void SysTickIsrHandler( void * arg );
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static uint32_t s_handled_systicks[portNUM_PROCESSORS] = { 0 };
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static uint32_t s_handled_systicks[ portNUM_PROCESSORS ] = { 0 };
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#define SYSTICK_INTR_ID (ETS_SYSTIMER_TARGET0_EDGE_INTR_SOURCE)
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#define SYSTICK_INTR_ID ( ETS_SYSTIMER_TARGET0_EDGE_INTR_SOURCE )
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/**
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* @brief Set up the systimer peripheral to generate the tick interrupt
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@ -67,50 +67,58 @@ static uint32_t s_handled_systicks[portNUM_PROCESSORS] = { 0 };
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* It is done at the same time so SysTicks for both CPUs occur at the same time or very close.
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* Shifts a time of triggering interrupts for core 0 and core 1.
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*/
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void vPortSetupTimer(void)
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{
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unsigned cpuid = xPortGetCoreID();
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#ifdef CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL3
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const unsigned level = ESP_INTR_FLAG_LEVEL3;
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#else
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const unsigned level = ESP_INTR_FLAG_LEVEL1;
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#endif
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/* Systimer HAL layer object */
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static systimer_hal_context_t systimer_hal;
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/* set system timer interrupt vector */
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ESP_ERROR_CHECK(esp_intr_alloc(ETS_SYSTIMER_TARGET0_EDGE_INTR_SOURCE + cpuid, ESP_INTR_FLAG_IRAM | level, SysTickIsrHandler, &systimer_hal, NULL));
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void vPortSetupTimer( void )
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{
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unsigned cpuid = xPortGetCoreID();
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if (cpuid == 0) {
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systimer_hal_init(&systimer_hal);
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systimer_ll_set_counter_value(systimer_hal.dev, SYSTIMER_LL_COUNTER_OS_TICK, 0);
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systimer_ll_apply_counter_value(systimer_hal.dev, SYSTIMER_LL_COUNTER_OS_TICK);
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#ifdef CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL3
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const unsigned level = ESP_INTR_FLAG_LEVEL3;
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#else
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const unsigned level = ESP_INTR_FLAG_LEVEL1;
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#endif
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/* Systimer HAL layer object */
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static systimer_hal_context_t systimer_hal;
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/* set system timer interrupt vector */
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ESP_ERROR_CHECK( esp_intr_alloc( ETS_SYSTIMER_TARGET0_EDGE_INTR_SOURCE + cpuid, ESP_INTR_FLAG_IRAM | level, SysTickIsrHandler, &systimer_hal, NULL ) );
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for (cpuid = 0; cpuid < SOC_CPU_CORES_NUM; cpuid++) {
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systimer_hal_counter_can_stall_by_cpu(&systimer_hal, SYSTIMER_LL_COUNTER_OS_TICK, cpuid, false);
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}
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if( cpuid == 0 )
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{
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systimer_hal_init( &systimer_hal );
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systimer_ll_set_counter_value( systimer_hal.dev, SYSTIMER_LL_COUNTER_OS_TICK, 0 );
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systimer_ll_apply_counter_value( systimer_hal.dev, SYSTIMER_LL_COUNTER_OS_TICK );
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for (cpuid = 0; cpuid < portNUM_PROCESSORS; ++cpuid) {
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uint32_t alarm_id = SYSTIMER_LL_ALARM_OS_TICK_CORE0 + cpuid;
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for( cpuid = 0; cpuid < SOC_CPU_CORES_NUM; cpuid++ )
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{
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systimer_hal_counter_can_stall_by_cpu( &systimer_hal, SYSTIMER_LL_COUNTER_OS_TICK, cpuid, false );
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}
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/* configure the timer */
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systimer_hal_connect_alarm_counter(&systimer_hal, alarm_id, SYSTIMER_LL_COUNTER_OS_TICK);
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systimer_hal_set_alarm_period(&systimer_hal, alarm_id, 1000000UL / CONFIG_FREERTOS_HZ);
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systimer_hal_select_alarm_mode(&systimer_hal, alarm_id, SYSTIMER_ALARM_MODE_PERIOD);
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systimer_hal_counter_can_stall_by_cpu(&systimer_hal, SYSTIMER_LL_COUNTER_OS_TICK, cpuid, true);
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if (cpuid == 0) {
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systimer_hal_enable_alarm_int(&systimer_hal, alarm_id);
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systimer_hal_enable_counter(&systimer_hal, SYSTIMER_LL_COUNTER_OS_TICK);
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#ifndef CONFIG_FREERTOS_UNICORE
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// SysTick of core 0 and core 1 are shifted by half of period
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systimer_hal_counter_value_advance(&systimer_hal, SYSTIMER_LL_COUNTER_OS_TICK, 1000000UL / CONFIG_FREERTOS_HZ / 2);
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#endif
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for( cpuid = 0; cpuid < portNUM_PROCESSORS; ++cpuid )
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{
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uint32_t alarm_id = SYSTIMER_LL_ALARM_OS_TICK_CORE0 + cpuid;
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/* configure the timer */
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systimer_hal_connect_alarm_counter( &systimer_hal, alarm_id, SYSTIMER_LL_COUNTER_OS_TICK );
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systimer_hal_set_alarm_period( &systimer_hal, alarm_id, 1000000UL / CONFIG_FREERTOS_HZ );
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systimer_hal_select_alarm_mode( &systimer_hal, alarm_id, SYSTIMER_ALARM_MODE_PERIOD );
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systimer_hal_counter_can_stall_by_cpu( &systimer_hal, SYSTIMER_LL_COUNTER_OS_TICK, cpuid, true );
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if( cpuid == 0 )
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{
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systimer_hal_enable_alarm_int( &systimer_hal, alarm_id );
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systimer_hal_enable_counter( &systimer_hal, SYSTIMER_LL_COUNTER_OS_TICK );
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#ifndef CONFIG_FREERTOS_UNICORE
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/* SysTick of core 0 and core 1 are shifted by half of period */
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systimer_hal_counter_value_advance( &systimer_hal, SYSTIMER_LL_COUNTER_OS_TICK, 1000000UL / CONFIG_FREERTOS_HZ / 2 );
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#endif
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}
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}
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}
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} else {
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uint32_t alarm_id = SYSTIMER_LL_ALARM_OS_TICK_CORE0 + cpuid;
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systimer_hal_enable_alarm_int(&systimer_hal, alarm_id);
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else
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{
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uint32_t alarm_id = SYSTIMER_LL_ALARM_OS_TICK_CORE0 + cpuid;
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systimer_hal_enable_alarm_int( &systimer_hal, alarm_id );
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}
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}
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}
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/**
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* @brief Systimer interrupt handler.
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@ -118,37 +126,46 @@ void vPortSetupTimer(void)
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* The Systimer interrupt for SysTick works in periodic mode no need to calc the next alarm.
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* If a timer interrupt is ever serviced more than one tick late, it is necessary to process multiple ticks.
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*/
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IRAM_ATTR void SysTickIsrHandler(void *arg)
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{
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uint32_t cpuid = xPortGetCoreID();
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systimer_hal_context_t *systimer_hal = (systimer_hal_context_t *)arg;
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#ifdef CONFIG_PM_TRACE
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ESP_PM_TRACE_ENTER(TICK, cpuid);
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#endif
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IRAM_ATTR void SysTickIsrHandler( void * arg )
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{
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uint32_t cpuid = xPortGetCoreID();
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systimer_hal_context_t * systimer_hal = ( systimer_hal_context_t * ) arg;
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uint32_t alarm_id = SYSTIMER_LL_ALARM_OS_TICK_CORE0 + cpuid;
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do {
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systimer_ll_clear_alarm_int(systimer_hal->dev, alarm_id);
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#ifdef CONFIG_PM_TRACE
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ESP_PM_TRACE_ENTER( TICK, cpuid );
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#endif
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uint32_t diff = systimer_hal_get_counter_value(systimer_hal, SYSTIMER_LL_COUNTER_OS_TICK) / systimer_ll_get_alarm_period(systimer_hal->dev, alarm_id) - s_handled_systicks[cpuid];
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if (diff > 0) {
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if (s_handled_systicks[cpuid] == 0) {
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s_handled_systicks[cpuid] = diff;
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diff = 1;
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} else {
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s_handled_systicks[cpuid] += diff;
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uint32_t alarm_id = SYSTIMER_LL_ALARM_OS_TICK_CORE0 + cpuid;
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do
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{
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systimer_ll_clear_alarm_int( systimer_hal->dev, alarm_id );
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uint32_t diff = systimer_hal_get_counter_value( systimer_hal, SYSTIMER_LL_COUNTER_OS_TICK ) / systimer_ll_get_alarm_period( systimer_hal->dev, alarm_id ) - s_handled_systicks[ cpuid ];
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if( diff > 0 )
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{
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if( s_handled_systicks[ cpuid ] == 0 )
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{
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s_handled_systicks[ cpuid ] = diff;
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diff = 1;
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}
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else
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{
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s_handled_systicks[ cpuid ] += diff;
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}
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do
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{
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xPortSysTickHandler();
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} while( --diff );
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}
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} while( systimer_ll_is_alarm_int_fired( systimer_hal->dev, alarm_id ) );
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do {
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xPortSysTickHandler();
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} while (--diff);
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}
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} while (systimer_ll_is_alarm_int_fired(systimer_hal->dev, alarm_id));
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#ifdef CONFIG_PM_TRACE
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ESP_PM_TRACE_EXIT(TICK, cpuid);
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#endif
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}
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#ifdef CONFIG_PM_TRACE
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ESP_PM_TRACE_EXIT( TICK, cpuid );
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#endif
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}
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#endif // CONFIG_FREERTOS_SYSTICK_USES_CCOUNT
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@ -160,15 +177,20 @@ IRAM_ATTR void SysTickIsrHandler(void *arg)
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* - SysTickIsrHandler for xtensa with CONFIG_FREERTOS_SYSTICK_USES_SYSTIMER
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* - SysTickIsrHandler for riscv
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*/
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BaseType_t xPortSysTickHandler(void)
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BaseType_t xPortSysTickHandler( void )
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{
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portbenchmarkIntLatency();
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traceISR_ENTER(SYSTICK_INTR_ID);
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traceISR_ENTER( SYSTICK_INTR_ID );
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BaseType_t ret = xTaskIncrementTick();
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if(ret != pdFALSE) {
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if( ret != pdFALSE )
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{
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portYIELD_FROM_ISR();
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} else {
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}
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else
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{
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traceISR_EXIT();
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}
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return ret;
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}
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