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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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CI-CD Updates (#768)
* Use new version of CI-CD Actions * Use cSpell spell check, and use ubuntu-20.04 for formatting check * Format and spell check all files in the portable directory * Remove the https:// from #errors and #warnings as uncrustify attempts to change it to /* * Use checkout@v3 instead of checkout@v2 on all jobs ---------
This commit is contained in:
Soren Ptak
GitHub
parent
d6bccb1f4c
commit
5fb9b50da8
485 changed files with 108790 additions and 107581 deletions
32
portable/RVDS/ARM_CM3/port.c
Executable file → Normal file
32
portable/RVDS/ARM_CM3/port.c
Executable file → Normal file
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@ -310,22 +310,22 @@ BaseType_t xPortStartScheduler( void )
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if( ulImplementedPrioBits == 8 )
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{
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/* When the hardware implements 8 priority bits, there is no way for
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* the software to configure PRIGROUP to not have sub-priorities. As
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* a result, the least significant bit is always used for sub-priority
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* and there are 128 preemption priorities and 2 sub-priorities.
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*
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* This may cause some confusion in some cases - for example, if
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* configMAX_SYSCALL_INTERRUPT_PRIORITY is set to 5, both 5 and 4
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* priority interrupts will be masked in Critical Sections as those
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* are at the same preemption priority. This may appear confusing as
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* 4 is higher (numerically lower) priority than
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* configMAX_SYSCALL_INTERRUPT_PRIORITY and therefore, should not
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* have been masked. Instead, if we set configMAX_SYSCALL_INTERRUPT_PRIORITY
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* to 4, this confusion does not happen and the behaviour remains the same.
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*
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* The following assert ensures that the sub-priority bit in the
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* configMAX_SYSCALL_INTERRUPT_PRIORITY is clear to avoid the above mentioned
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* confusion. */
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* the software to configure PRIGROUP to not have sub-priorities. As
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* a result, the least significant bit is always used for sub-priority
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* and there are 128 preemption priorities and 2 sub-priorities.
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*
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* This may cause some confusion in some cases - for example, if
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* configMAX_SYSCALL_INTERRUPT_PRIORITY is set to 5, both 5 and 4
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* priority interrupts will be masked in Critical Sections as those
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* are at the same preemption priority. This may appear confusing as
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* 4 is higher (numerically lower) priority than
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* configMAX_SYSCALL_INTERRUPT_PRIORITY and therefore, should not
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* have been masked. Instead, if we set configMAX_SYSCALL_INTERRUPT_PRIORITY
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* to 4, this confusion does not happen and the behaviour remains the same.
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*
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* The following assert ensures that the sub-priority bit in the
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* configMAX_SYSCALL_INTERRUPT_PRIORITY is clear to avoid the above mentioned
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* confusion. */
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configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & 0x1U ) == 0U );
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ulMaxPRIGROUPValue = 0;
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}
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@ -47,45 +47,45 @@
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*/
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/* Type definitions. */
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#define portCHAR char
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#define portFLOAT float
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT short
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#define portSTACK_TYPE uint32_t
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#define portBASE_TYPE long
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#define portCHAR char
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#define portFLOAT float
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT short
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#define portSTACK_TYPE uint32_t
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#define portBASE_TYPE long
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typedef portSTACK_TYPE StackType_t;
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typedef long BaseType_t;
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typedef unsigned long UBaseType_t;
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typedef portSTACK_TYPE StackType_t;
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typedef long BaseType_t;
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typedef unsigned long UBaseType_t;
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#if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
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typedef uint16_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffff
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#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
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typedef uint32_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
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#if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
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typedef uint16_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffff
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#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
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typedef uint32_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
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/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
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* not need to be guarded with a critical section. */
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#define portTICK_TYPE_IS_ATOMIC 1
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#else
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#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
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#endif
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#define portTICK_TYPE_IS_ATOMIC 1
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#else
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#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
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#endif
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/*-----------------------------------------------------------*/
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/* Architecture specifics. */
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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#define portBYTE_ALIGNMENT 8
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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#define portBYTE_ALIGNMENT 8
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/* Constants used with memory barrier intrinsics. */
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#define portSY_FULL_READ_WRITE ( 15 )
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#define portSY_FULL_READ_WRITE ( 15 )
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/*-----------------------------------------------------------*/
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/* Scheduler utilities. */
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#define portYIELD() \
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#define portYIELD() \
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{ \
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/* Set a PendSV to request a context switch. */ \
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
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@ -97,167 +97,167 @@
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}
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/*-----------------------------------------------------------*/
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#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
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#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired != pdFALSE ) portYIELD(); } while( 0 )
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
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#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired != pdFALSE ) portYIELD( ); } while( 0 )
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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/*-----------------------------------------------------------*/
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/* Critical section management. */
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extern void vPortEnterCritical( void );
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extern void vPortExitCritical( void );
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extern void vPortEnterCritical( void );
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extern void vPortExitCritical( void );
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#define portDISABLE_INTERRUPTS() vPortRaiseBASEPRI()
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#define portENABLE_INTERRUPTS() vPortSetBASEPRI( 0 )
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#define portENTER_CRITICAL() vPortEnterCritical()
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#define portEXIT_CRITICAL() vPortExitCritical()
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#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortSetBASEPRI( x )
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#define portDISABLE_INTERRUPTS() vPortRaiseBASEPRI()
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#define portENABLE_INTERRUPTS() vPortSetBASEPRI( 0 )
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#define portENTER_CRITICAL() vPortEnterCritical()
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#define portEXIT_CRITICAL() vPortExitCritical()
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#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortSetBASEPRI( x )
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/*-----------------------------------------------------------*/
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/* Tickless idle/low power functionality. */
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#ifndef portSUPPRESS_TICKS_AND_SLEEP
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extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
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#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
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#endif
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#ifndef portSUPPRESS_TICKS_AND_SLEEP
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extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
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#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
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#endif
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/*-----------------------------------------------------------*/
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/* Port specific optimisations. */
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#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
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#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
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#endif
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#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
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#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
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#endif
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#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
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#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
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/* Check the configuration. */
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#if ( configMAX_PRIORITIES > 32 )
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#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
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#endif
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#if ( configMAX_PRIORITIES > 32 )
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#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
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#endif
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/* Store/clear the ready priorities in a bit map. */
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#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
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#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
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#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
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#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
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/*-----------------------------------------------------------*/
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#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) )
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#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) )
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#endif /* taskRECORD_READY_PRIORITY */
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#endif /* taskRECORD_READY_PRIORITY */
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/*-----------------------------------------------------------*/
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/* Task function macros as described on the FreeRTOS.org WEB site. These are
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* not necessary for to use this port. They are defined so the common demo files
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* (which build with all the ports) will build. */
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
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/*-----------------------------------------------------------*/
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#ifdef configASSERT
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void vPortValidateInterruptPriority( void );
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#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()
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#endif
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#ifdef configASSERT
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void vPortValidateInterruptPriority( void );
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#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()
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#endif
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/* portNOP() is not required by this port. */
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#define portNOP()
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#define portNOP()
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#define portINLINE __inline
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#define portINLINE __inline
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#ifndef portFORCE_INLINE
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#define portFORCE_INLINE __forceinline
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#endif
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#ifndef portFORCE_INLINE
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#define portFORCE_INLINE __forceinline
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#endif
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/*-----------------------------------------------------------*/
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static portFORCE_INLINE void vPortSetBASEPRI( uint32_t ulBASEPRI )
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static portFORCE_INLINE void vPortSetBASEPRI( uint32_t ulBASEPRI )
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{
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__asm
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{
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__asm
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{
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/* Barrier instructions are not used as this function is only used to
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* lower the BASEPRI value. */
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/* Barrier instructions are not used as this function is only used to
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* lower the BASEPRI value. */
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/* *INDENT-OFF* */
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msr basepri, ulBASEPRI
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/* *INDENT-ON* */
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}
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}
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}
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/*-----------------------------------------------------------*/
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static portFORCE_INLINE void vPortRaiseBASEPRI( void )
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{
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uint32_t ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
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static portFORCE_INLINE void vPortRaiseBASEPRI( void )
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{
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uint32_t ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
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__asm
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{
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/* Set BASEPRI to the max syscall priority to effect a critical
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* section. */
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__asm
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{
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/* Set BASEPRI to the max syscall priority to effect a critical
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* section. */
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/* *INDENT-OFF* */
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msr basepri, ulNewBASEPRI
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dsb
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isb
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/* *INDENT-ON* */
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}
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}
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}
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/*-----------------------------------------------------------*/
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static portFORCE_INLINE void vPortClearBASEPRIFromISR( void )
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static portFORCE_INLINE void vPortClearBASEPRIFromISR( void )
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{
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__asm
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{
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__asm
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{
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/* Set BASEPRI to 0 so no interrupts are masked. This function is only
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* used to lower the mask in an interrupt, so memory barriers are not
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* used. */
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/* Set BASEPRI to 0 so no interrupts are masked. This function is only
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* used to lower the mask in an interrupt, so memory barriers are not
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* used. */
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/* *INDENT-OFF* */
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msr basepri, # 0
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/* *INDENT-ON* */
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}
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}
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}
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/*-----------------------------------------------------------*/
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static portFORCE_INLINE uint32_t ulPortRaiseBASEPRI( void )
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{
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uint32_t ulReturn, ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
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static portFORCE_INLINE uint32_t ulPortRaiseBASEPRI( void )
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{
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uint32_t ulReturn, ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
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__asm
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{
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/* Set BASEPRI to the max syscall priority to effect a critical
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* section. */
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__asm
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{
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/* Set BASEPRI to the max syscall priority to effect a critical
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* section. */
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/* *INDENT-OFF* */
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mrs ulReturn, basepri
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msr basepri, ulNewBASEPRI
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dsb
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isb
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/* *INDENT-ON* */
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}
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return ulReturn;
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}
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return ulReturn;
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}
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/*-----------------------------------------------------------*/
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static portFORCE_INLINE BaseType_t xPortIsInsideInterrupt( void )
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{
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uint32_t ulCurrentInterrupt;
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BaseType_t xReturn;
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static portFORCE_INLINE BaseType_t xPortIsInsideInterrupt( void )
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{
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uint32_t ulCurrentInterrupt;
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BaseType_t xReturn;
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/* Obtain the number of the currently executing interrupt. */
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__asm
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{
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/* Obtain the number of the currently executing interrupt. */
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__asm
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{
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/* *INDENT-OFF* */
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mrs ulCurrentInterrupt, ipsr
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/* *INDENT-ON* */
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}
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if( ulCurrentInterrupt == 0 )
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{
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xReturn = pdFALSE;
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}
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else
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{
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xReturn = pdTRUE;
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}
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return xReturn;
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}
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if( ulCurrentInterrupt == 0 )
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{
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xReturn = pdFALSE;
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}
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else
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{
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xReturn = pdTRUE;
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}
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return xReturn;
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}
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/* *INDENT-OFF* */
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#ifdef __cplusplus
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