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CI-CD Updates (#768)
* Use new version of CI-CD Actions * Use cSpell spell check, and use ubuntu-20.04 for formatting check * Format and spell check all files in the portable directory * Remove the https:// from #errors and #warnings as uncrustify attempts to change it to /* * Use checkout@v3 instead of checkout@v2 on all jobs ---------
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Soren Ptak
GitHub
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485 changed files with 108790 additions and 107581 deletions
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@ -28,164 +28,165 @@
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#include "FreeRTOSConfig.h"
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#define portCONTEXT_SIZE 132
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#define portEPC_STACK_LOCATION 124
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#define portSTATUS_STACK_LOCATION 128
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#define portCONTEXT_SIZE 132
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#define portEPC_STACK_LOCATION 124
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#define portSTATUS_STACK_LOCATION 128
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/******************************************************************/
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.macro portSAVE_CONTEXT
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.macro portSAVE_CONTEXT
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/* Make room for the context. First save the current status so it can be
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manipulated, and the cause and EPC registers so their original values are
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captured. */
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mfc0 k0, _CP0_CAUSE
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addiu sp, sp, -portCONTEXT_SIZE
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mfc0 k1, _CP0_STATUS
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/* Make room for the context. First save the current status so it can be
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* manipulated, and the cause and EPC registers so their original values are
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* captured. */
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mfc0 k0, _CP0_CAUSE
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addiu sp, sp, -portCONTEXT_SIZE
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mfc0 k1, _CP0_STATUS
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/* Also save s6 and s5 so they can be used. Any nesting interrupts should
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maintain the values of these registers across the ISR. */
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sw s6, 44(sp)
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sw s5, 40(sp)
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sw k1, portSTATUS_STACK_LOCATION(sp)
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/* Also save s6 and s5 so they can be used. Any nesting interrupts should
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* maintain the values of these registers across the ISR. */
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sw s6, 44 ( sp )
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sw s5, 40 ( sp )
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sw k1, portSTATUS_STACK_LOCATION( sp )
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/* Prepare to enable interrupts above the current priority. */
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srl k0, k0, 0xa
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ins k1, k0, 10, 6
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ins k1, zero, 1, 4
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/* Prepare to enable interrupts above the current priority. */
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srl k0, k0, 0xa
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ins k1, k0, 10, 6
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ins k1, zero, 1, 4
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/* s5 is used as the frame pointer. */
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add s5, zero, sp
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/* s5 is used as the frame pointer. */
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add s5, zero, sp
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/* Check the nesting count value. */
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la k0, uxInterruptNesting
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lw s6, (k0)
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/* Check the nesting count value. */
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la k0, uxInterruptNesting
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lw s6, ( k0 )
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/* If the nesting count is 0 then swap to the the system stack, otherwise
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the system stack is already being used. */
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bne s6, zero, 1f
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nop
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/* If the nesting count is 0 then swap to the the system stack, otherwise
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* the system stack is already being used. */
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bne s6, zero, 1f
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nop
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/* Swap to the system stack. */
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la sp, xISRStackTop
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lw sp, (sp)
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/* Swap to the system stack. */
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la sp, xISRStackTop
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lw sp, ( sp )
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/* Increment and save the nesting count. */
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1: addiu s6, s6, 1
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sw s6, 0(k0)
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/* Increment and save the nesting count. */
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1 : addiu s6, s6, 1
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sw s6, 0 ( k0 )
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/* s6 holds the EPC value, this is saved after interrupts are re-enabled. */
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mfc0 s6, _CP0_EPC
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/* s6 holds the EPC value, this is saved after interrupts are re-enabled. */
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mfc0 s6, _CP0_EPC
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/* Re-enable interrupts. */
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mtc0 k1, _CP0_STATUS
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/* Re-enable interrupts. */
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mtc0 k1, _CP0_STATUS
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/* Save the context into the space just created. s6 is saved again
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here as it now contains the EPC value. No other s registers need be
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saved. */
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sw ra, 120(s5)
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sw s8, 116(s5)
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sw t9, 112(s5)
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sw t8, 108(s5)
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sw t7, 104(s5)
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sw t6, 100(s5)
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sw t5, 96(s5)
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sw t4, 92(s5)
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sw t3, 88(s5)
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sw t2, 84(s5)
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sw t1, 80(s5)
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sw t0, 76(s5)
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sw a3, 72(s5)
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sw a2, 68(s5)
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sw a1, 64(s5)
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sw a0, 60(s5)
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sw v1, 56(s5)
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sw v0, 52(s5)
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sw s6, portEPC_STACK_LOCATION(s5)
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sw $1, 16(s5)
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/* Save the context into the space just created. s6 is saved again
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* here as it now contains the EPC value. No other s registers need be
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* saved. */
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sw ra, 120 ( s5 )
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sw s8, 116 ( s5 )
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sw t9, 112 ( s5 )
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sw t8, 108 ( s5 )
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sw t7, 104 ( s5 )
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sw t6, 100 ( s5 )
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sw t5, 96 ( s5 )
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sw t4, 92 ( s5 )
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sw t3, 88 ( s5 )
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sw t2, 84 ( s5 )
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sw t1, 80 ( s5 )
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sw t0, 76 ( s5 )
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sw a3, 72 ( s5 )
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sw a2, 68 ( s5 )
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sw a1, 64 ( s5 )
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sw a0, 60 ( s5 )
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sw v1, 56 ( s5 )
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sw v0, 52 ( s5 )
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sw s6, portEPC_STACK_LOCATION( s5 )
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sw $1, 16 ( s5 )
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/* s6 is used as a scratch register. */
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mfhi s6
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sw s6, 12(s5)
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mflo s6
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sw s6, 8(s5)
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/* s6 is used as a scratch register. */
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mfhi s6
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sw s6, 12 ( s5 )
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mflo s6
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sw s6, 8 ( s5 )
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/* Update the task stack pointer value if nesting is zero. */
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la s6, uxInterruptNesting
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lw s6, (s6)
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addiu s6, s6, -1
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bne s6, zero, 1f
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nop
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/* Update the task stack pointer value if nesting is zero. */
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la s6, uxInterruptNesting
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lw s6, ( s6 )
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addiu s6, s6, -1
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bne s6, zero, 1f
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nop
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/* Save the stack pointer. */
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la s6, uxSavedTaskStackPointer
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sw s5, (s6)
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1:
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.endm
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/* Save the stack pointer. */
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la s6, uxSavedTaskStackPointer
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sw s5, ( s6 )
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1 :
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.endm
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/******************************************************************/
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.macro portRESTORE_CONTEXT
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.macro portRESTORE_CONTEXT
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/* Restore the stack pointer from the TCB. This is only done if the
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nesting count is 1. */
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la s6, uxInterruptNesting
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lw s6, (s6)
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addiu s6, s6, -1
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bne s6, zero, 1f
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nop
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la s6, uxSavedTaskStackPointer
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lw s5, (s6)
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/* Restore the stack pointer from the TCB. This is only done if the
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* nesting count is 1. */
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la s6, uxInterruptNesting
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lw s6, ( s6 )
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addiu s6, s6, -1
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bne s6, zero, 1f
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nop
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la s6, uxSavedTaskStackPointer
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lw s5, ( s6 )
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/* Restore the context. */
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1: lw s6, 8(s5)
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mtlo s6
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lw s6, 12(s5)
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mthi s6
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lw $1, 16(s5)
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/* s6 is loaded as it was used as a scratch register and therefore saved
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as part of the interrupt context. */
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lw s6, 44(s5)
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lw v0, 52(s5)
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lw v1, 56(s5)
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lw a0, 60(s5)
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lw a1, 64(s5)
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lw a2, 68(s5)
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lw a3, 72(s5)
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lw t0, 76(s5)
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lw t1, 80(s5)
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lw t2, 84(s5)
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lw t3, 88(s5)
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lw t4, 92(s5)
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lw t5, 96(s5)
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lw t6, 100(s5)
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lw t7, 104(s5)
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lw t8, 108(s5)
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lw t9, 112(s5)
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lw s8, 116(s5)
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lw ra, 120(s5)
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/* Restore the context. */
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1 : lw s6, 8 ( s5 )
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mtlo s6
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lw s6, 12 ( s5 )
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mthi s6
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lw $1, 16 ( s5 )
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/* Protect access to the k registers, and others. */
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di
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ehb
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/* s6 is loaded as it was used as a scratch register and therefore saved
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* as part of the interrupt context. */
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lw s6, 44 ( s5 )
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lw v0, 52 ( s5 )
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lw v1, 56 ( s5 )
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lw a0, 60 ( s5 )
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lw a1, 64 ( s5 )
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lw a2, 68 ( s5 )
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lw a3, 72 ( s5 )
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lw t0, 76 ( s5 )
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lw t1, 80 ( s5 )
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lw t2, 84 ( s5 )
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lw t3, 88 ( s5 )
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lw t4, 92 ( s5 )
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lw t5, 96 ( s5 )
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lw t6, 100 ( s5 )
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lw t7, 104 ( s5 )
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lw t8, 108 ( s5 )
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lw t9, 112 ( s5 )
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lw s8, 116 ( s5 )
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lw ra, 120 ( s5 )
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/* Decrement the nesting count. */
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la k0, uxInterruptNesting
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lw k1, (k0)
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addiu k1, k1, -1
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sw k1, 0(k0)
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/* Protect access to the k registers, and others. */
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di
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ehb
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lw k0, portSTATUS_STACK_LOCATION(s5)
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lw k1, portEPC_STACK_LOCATION(s5)
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/* Decrement the nesting count. */
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la k0, uxInterruptNesting
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lw k1, ( k0 )
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addiu k1, k1, -1
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sw k1, 0 ( k0 )
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/* Leave the stack in its original state. First load sp from s5, then
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restore s5 from the stack. */
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add sp, zero, s5
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lw s5, 40(sp)
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addiu sp, sp, portCONTEXT_SIZE
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lw k0, portSTATUS_STACK_LOCATION( s5 )
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lw k1, portEPC_STACK_LOCATION( s5 )
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mtc0 k0, _CP0_STATUS
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mtc0 k1, _CP0_EPC
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ehb
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eret
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nop
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/* Leave the stack in its original state. First load sp from s5, then
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* restore s5 from the stack. */
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add sp, zero, s5
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lw s5, 40 ( sp )
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addiu sp, sp, portCONTEXT_SIZE
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.endm
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mtc0 k0, _CP0_STATUS
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mtc0 k1, _CP0_EPC
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ehb
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eret
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nop
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.endm
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