mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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CI-CD Updates (#768)
* Use new version of CI-CD Actions * Use cSpell spell check, and use ubuntu-20.04 for formatting check * Format and spell check all files in the portable directory * Remove the https:// from #errors and #warnings as uncrustify attempts to change it to /* * Use checkout@v3 instead of checkout@v2 on all jobs ---------
This commit is contained in:
Soren Ptak
GitHub
parent
d6bccb1f4c
commit
5fb9b50da8
485 changed files with 108790 additions and 107581 deletions
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@ -27,33 +27,33 @@
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*/
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/*
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Changes between V1.2.4 and V1.2.5
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+ Introduced portGLOBAL_INTERRUPT_FLAG definition to test the global
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interrupt flag setting. Using the two bits defined within
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portINITAL_INTERRUPT_STATE was causing the w register to get clobbered
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before the test was performed.
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Changes from V1.2.5
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+ Set the interrupt vector address to 0x08. Previously it was at the
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incorrect address for compatibility mode of 0x18.
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Changes from V2.1.1
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+ PCLATU and PCLATH are now saved as part of the context. This allows
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function pointers to be used within tasks. Thanks to Javier Espeche
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for the enhancement.
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Changes from V2.3.1
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+ TABLAT is now saved as part of the task context.
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Changes from V3.2.0
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+ TBLPTRU is now initialised to zero as the MPLAB compiler expects this
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value and does not write to the register.
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*/
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* Changes between V1.2.4 and V1.2.5
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*
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+ Introduced portGLOBAL_INTERRUPT_FLAG definition to test the global
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+ interrupt flag setting. Using the two bits defined within
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+ portINITAL_INTERRUPT_STATE was causing the w register to get clobbered
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+ before the test was performed.
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+
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+ Changes from V1.2.5
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+
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+ Set the interrupt vector address to 0x08. Previously it was at the
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+ incorrect address for compatibility mode of 0x18.
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+
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+ Changes from V2.1.1
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+
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+ PCLATU and PCLATH are now saved as part of the context. This allows
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+ function pointers to be used within tasks. Thanks to Javier Espeche
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+ for the enhancement.
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+
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+ Changes from V2.3.1
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+
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+ TABLAT is now saved as part of the task context.
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+
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+ Changes from V3.2.0
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+
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+ TBLPTRU is now initialised to zero as the MPLAB compiler expects this
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+ value and does not write to the register.
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*/
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/* Scheduler include files. */
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#include "FreeRTOS.h"
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@ -63,37 +63,37 @@ Changes from V3.2.0
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#include "timers.h"
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the PIC port.
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*----------------------------------------------------------*/
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* Implementation of functions defined in portable.h for the PIC port.
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*----------------------------------------------------------*/
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/* Hardware setup for tick. */
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#define portTIMER_FOSC_SCALE ( ( uint32_t ) 4 )
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#define portTIMER_FOSC_SCALE ( ( uint32_t ) 4 )
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/* Initial interrupt enable state for newly created tasks. This value is
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copied into INTCON when a task switches in for the first time. */
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* copied into INTCON when a task switches in for the first time. */
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#define portINITAL_INTERRUPT_STATE 0xc0
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/* Just the bit within INTCON for the global interrupt flag. */
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#define portGLOBAL_INTERRUPT_FLAG 0x80
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/* Constant used for context switch macro when we require the interrupt
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enable state to be unchanged when the interrupted task is switched back in. */
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* enable state to be unchanged when the interrupted task is switched back in. */
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#define portINTERRUPTS_UNCHANGED 0x00
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/* Some memory areas get saved as part of the task context. These memory
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area's get used by the compiler for temporary storage, especially when
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performing mathematical operations, or when using 32bit data types. This
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constant defines the size of memory area which must be saved. */
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* area's get used by the compiler for temporary storage, especially when
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* performing mathematical operations, or when using 32bit data types. This
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* constant defines the size of memory area which must be saved. */
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#define portCOMPILER_MANAGED_MEMORY_SIZE ( ( uint8_t ) 0x13 )
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/* We require the address of the pxCurrentTCB variable, but don't want to know
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any details of its type. */
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* any details of its type. */
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typedef void TCB_t;
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extern volatile TCB_t * volatile pxCurrentTCB;
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/* IO port constants. */
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#define portBIT_SET ( ( uint8_t ) 1 )
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#define portBIT_CLEAR ( ( uint8_t ) 0 )
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#define portBIT_SET ( ( uint8_t ) 1 )
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#define portBIT_CLEAR ( ( uint8_t ) 0 )
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/*
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* The serial port ISR's are defined in serial.c, but are called from portable
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@ -136,7 +136,7 @@ static void prvLowInterrupt( void );
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*
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* The compiler uses some locations at the bottom of the memory for temporary
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* storage during math and other computations. This is especially true if
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* 32bit data types are utilised (as they are by the scheduler). The .tmpdata
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* 32bit data types are used (as they are by the scheduler). The .tmpdata
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* and MATH_DATA sections have to be stored in there entirety as part of a task
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* context. This macro stores from data address 0x00 to
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* portCOMPILER_MANAGED_MEMORY_SIZE. This is sufficient for the demo
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@ -144,212 +144,214 @@ static void prvLowInterrupt( void );
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* this is sufficient for your needs. It is not clear whether this size is
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* fixed for all compilations or has the potential to be program specific.
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*/
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#define portSAVE_CONTEXT( ucForcedInterruptFlags ) \
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{ \
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_asm \
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#define portSAVE_CONTEXT( ucForcedInterruptFlags ) \
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{ \
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_asm \
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/* Save the status and WREG registers first, as these will get modified \
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by the operations below. */ \
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MOVFF WREG, PREINC1 \
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MOVFF STATUS, PREINC1 \
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/* Save the INTCON register with the appropriate bits forced if \
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necessary - as described above. */ \
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MOVFF INTCON, WREG \
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IORLW ucForcedInterruptFlags \
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MOVFF WREG, PREINC1 \
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_endasm \
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\
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portDISABLE_INTERRUPTS(); \
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\
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_asm \
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/* Store the necessary registers to the stack. */ \
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MOVFF BSR, PREINC1 \
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MOVFF FSR2L, PREINC1 \
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MOVFF FSR2H, PREINC1 \
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MOVFF FSR0L, PREINC1 \
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MOVFF FSR0H, PREINC1 \
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MOVFF TABLAT, PREINC1 \
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MOVFF TBLPTRU, PREINC1 \
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MOVFF TBLPTRH, PREINC1 \
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MOVFF TBLPTRL, PREINC1 \
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MOVFF PRODH, PREINC1 \
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MOVFF PRODL, PREINC1 \
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MOVFF PCLATU, PREINC1 \
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MOVFF PCLATH, PREINC1 \
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/* Store the .tempdata and MATH_DATA areas as described above. */ \
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CLRF FSR0L, 0 \
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CLRF FSR0H, 0 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF INDF0, PREINC1 \
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MOVFF FSR0L, PREINC1 \
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MOVFF FSR0H, PREINC1 \
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/* Store the hardware stack pointer in a temp register before we \
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modify it. */ \
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MOVFF STKPTR, FSR0L \
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_endasm \
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\
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/* Store each address from the hardware stack. */ \
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while( STKPTR > ( uint8_t ) 0 ) \
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{ \
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_asm \
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MOVFF TOSL, PREINC1 \
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MOVFF TOSH, PREINC1 \
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MOVFF TOSU, PREINC1 \
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POP \
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_endasm \
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} \
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\
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_asm \
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/* Store the number of addresses on the hardware stack (from the \
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temporary register). */ \
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MOVFF FSR0L, PREINC1 \
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MOVF PREINC1, 1, 0 \
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_endasm \
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\
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/* Save the new top of the software stack in the TCB. */ \
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_asm \
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MOVFF pxCurrentTCB, FSR0L \
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MOVFF pxCurrentTCB + 1, FSR0H \
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MOVFF FSR1L, POSTINC0 \
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MOVFF FSR1H, POSTINC0 \
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_endasm \
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}
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* by the operations below. */ \
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MOVFF WREG, PREINC1 \
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MOVFF STATUS, PREINC1 \
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/* Save the INTCON register with the appropriate bits forced if \
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* necessary - as described above. */ \
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MOVFF INTCON, WREG \
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IORLW ucForcedInterruptFlags \
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MOVFF WREG, PREINC1 \
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_endasm \
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\
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portDISABLE_INTERRUPTS(); \
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\
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_asm \
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/* Store the necessary registers to the stack. */ \
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MOVFF BSR, PREINC1 \
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MOVFF FSR2L, PREINC1 \
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MOVFF FSR2H, PREINC1 \
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MOVFF FSR0L, PREINC1 \
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MOVFF FSR0H, PREINC1 \
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MOVFF TABLAT, PREINC1 \
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MOVFF TBLPTRU, PREINC1 \
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MOVFF TBLPTRH, PREINC1 \
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MOVFF TBLPTRL, PREINC1 \
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MOVFF PRODH, PREINC1 \
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MOVFF PRODL, PREINC1 \
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MOVFF PCLATU, PREINC1 \
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MOVFF PCLATH, PREINC1 \
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/* Store the .tempdata and MATH_DATA areas as described above. */ \
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CLRF FSR0L, 0 \
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CLRF FSR0H, 0 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF POSTINC0, PREINC1 \
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MOVFF INDF0, PREINC1 \
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MOVFF FSR0L, PREINC1 \
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MOVFF FSR0H, PREINC1 \
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/* Store the hardware stack pointer in a temp register before we \
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* modify it. */ \
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MOVFF STKPTR, FSR0L \
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_endasm \
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\
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/* Store each address from the hardware stack. */ \
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while( STKPTR > ( uint8_t ) 0 ) \
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{ \
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_asm \
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MOVFF TOSL, PREINC1 \
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MOVFF TOSH, PREINC1 \
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MOVFF TOSU, PREINC1 \
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POP \
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_endasm \
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} \
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\
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_asm \
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/* Store the number of addresses on the hardware stack (from the \
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* temporary register). */ \
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MOVFF FSR0L, PREINC1 \
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MOVF PREINC1, 1, 0 \
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_endasm \
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\
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/* Save the new top of the software stack in the TCB. */ \
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_asm \
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MOVFF pxCurrentTCB, FSR0L \
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MOVFF pxCurrentTCB + 1, FSR0H \
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MOVFF FSR1L, POSTINC0 \
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MOVFF FSR1H, POSTINC0 \
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_endasm \
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}
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/*-----------------------------------------------------------*/
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/*
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* This is the reverse of portSAVE_CONTEXT. See portSAVE_CONTEXT for more
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* details.
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*/
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#define portRESTORE_CONTEXT() \
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{ \
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_asm \
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/* Set FSR0 to point to pxCurrentTCB->pxTopOfStack. */ \
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MOVFF pxCurrentTCB, FSR0L \
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MOVFF pxCurrentTCB + 1, FSR0H \
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\
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/* De-reference FSR0 to set the address it holds into FSR1. \
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(i.e. *( pxCurrentTCB->pxTopOfStack ) ). */ \
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MOVFF POSTINC0, FSR1L \
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MOVFF POSTINC0, FSR1H \
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\
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/* How many return addresses are there on the hardware stack? Discard \
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the first byte as we are pointing to the next free space. */ \
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MOVFF POSTDEC1, FSR0L \
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MOVFF POSTDEC1, FSR0L \
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_endasm \
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\
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/* Fill the hardware stack from our software stack. */ \
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STKPTR = 0; \
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\
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while( STKPTR < FSR0L ) \
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{ \
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_asm \
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PUSH \
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MOVF POSTDEC1, 0, 0 \
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MOVWF TOSU, 0 \
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MOVF POSTDEC1, 0, 0 \
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MOVWF TOSH, 0 \
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MOVF POSTDEC1, 0, 0 \
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MOVWF TOSL, 0 \
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_endasm \
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} \
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\
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_asm \
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/* Restore the .tmpdata and MATH_DATA memory. */ \
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MOVFF POSTDEC1, FSR0H \
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MOVFF POSTDEC1, FSR0L \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, INDF0 \
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/* Restore the other registers forming the tasks context. */ \
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MOVFF POSTDEC1, PCLATH \
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MOVFF POSTDEC1, PCLATU \
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MOVFF POSTDEC1, PRODL \
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MOVFF POSTDEC1, PRODH \
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MOVFF POSTDEC1, TBLPTRL \
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MOVFF POSTDEC1, TBLPTRH \
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MOVFF POSTDEC1, TBLPTRU \
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MOVFF POSTDEC1, TABLAT \
|
||||
MOVFF POSTDEC1, FSR0H \
|
||||
MOVFF POSTDEC1, FSR0L \
|
||||
MOVFF POSTDEC1, FSR2H \
|
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MOVFF POSTDEC1, FSR2L \
|
||||
MOVFF POSTDEC1, BSR \
|
||||
/* The next byte is the INTCON register. Read this into WREG as some \
|
||||
manipulation is required. */ \
|
||||
MOVFF POSTDEC1, WREG \
|
||||
_endasm \
|
||||
\
|
||||
/* From the INTCON register, only the interrupt enable bits form part \
|
||||
of the tasks context. It is perfectly legitimate for another task to \
|
||||
have modified any other bits. We therefore only restore the top two bits. \
|
||||
*/ \
|
||||
if( WREG & portGLOBAL_INTERRUPT_FLAG ) \
|
||||
{ \
|
||||
_asm \
|
||||
MOVFF POSTDEC1, STATUS \
|
||||
MOVFF POSTDEC1, WREG \
|
||||
/* Return enabling interrupts. */ \
|
||||
RETFIE 0 \
|
||||
_endasm \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
_asm \
|
||||
MOVFF POSTDEC1, STATUS \
|
||||
MOVFF POSTDEC1, WREG \
|
||||
/* Return without effecting interrupts. The context may have \
|
||||
been saved from a critical region. */ \
|
||||
RETURN 0 \
|
||||
_endasm \
|
||||
} \
|
||||
}
|
||||
#define portRESTORE_CONTEXT() \
|
||||
{ \
|
||||
_asm \
|
||||
/* Set FSR0 to point to pxCurrentTCB->pxTopOfStack. */ \
|
||||
MOVFF pxCurrentTCB, FSR0L \
|
||||
MOVFF pxCurrentTCB + 1, FSR0H \
|
||||
\
|
||||
/* De-reference FSR0 to set the address it holds into FSR1. \
|
||||
* (i.e. *( pxCurrentTCB->pxTopOfStack ) ). */ \
|
||||
MOVFF POSTINC0, FSR1L \
|
||||
MOVFF POSTINC0, FSR1H \
|
||||
\
|
||||
/* How many return addresses are there on the hardware stack? Discard \
|
||||
* the first byte as we are pointing to the next free space. */ \
|
||||
MOVFF POSTDEC1, FSR0L \
|
||||
MOVFF POSTDEC1, FSR0L \
|
||||
_endasm \
|
||||
\
|
||||
/* Fill the hardware stack from our software stack. */ \
|
||||
STKPTR = 0; \
|
||||
\
|
||||
while( STKPTR < FSR0L ) \
|
||||
{ \
|
||||
_asm \
|
||||
PUSH \
|
||||
MOVF POSTDEC1, 0, 0 \
|
||||
MOVWF TOSU, 0 \
|
||||
MOVF POSTDEC1, 0, 0 \
|
||||
MOVWF TOSH, 0 \
|
||||
MOVF POSTDEC1, 0, 0 \
|
||||
MOVWF TOSL, 0 \
|
||||
_endasm \
|
||||
} \
|
||||
\
|
||||
_asm \
|
||||
/* Restore the .tmpdata and MATH_DATA memory. */ \
|
||||
MOVFF POSTDEC1, FSR0H \
|
||||
MOVFF POSTDEC1, FSR0L \
|
||||
MOVFF POSTDEC1, POSTDEC0 \
|
||||
MOVFF POSTDEC1, POSTDEC0 \
|
||||
MOVFF POSTDEC1, POSTDEC0 \
|
||||
MOVFF POSTDEC1, POSTDEC0 \
|
||||
MOVFF POSTDEC1, POSTDEC0 \
|
||||
MOVFF POSTDEC1, POSTDEC0 \
|
||||
MOVFF POSTDEC1, POSTDEC0 \
|
||||
MOVFF POSTDEC1, POSTDEC0 \
|
||||
MOVFF POSTDEC1, POSTDEC0 \
|
||||
MOVFF POSTDEC1, POSTDEC0 \
|
||||
MOVFF POSTDEC1, POSTDEC0 \
|
||||
MOVFF POSTDEC1, POSTDEC0 \
|
||||
MOVFF POSTDEC1, POSTDEC0 \
|
||||
MOVFF POSTDEC1, POSTDEC0 \
|
||||
MOVFF POSTDEC1, POSTDEC0 \
|
||||
MOVFF POSTDEC1, POSTDEC0 \
|
||||
MOVFF POSTDEC1, POSTDEC0 \
|
||||
MOVFF POSTDEC1, POSTDEC0 \
|
||||
MOVFF POSTDEC1, POSTDEC0 \
|
||||
MOVFF POSTDEC1, INDF0 \
|
||||
/* Restore the other registers forming the tasks context. */ \
|
||||
MOVFF POSTDEC1, PCLATH \
|
||||
MOVFF POSTDEC1, PCLATU \
|
||||
MOVFF POSTDEC1, PRODL \
|
||||
MOVFF POSTDEC1, PRODH \
|
||||
MOVFF POSTDEC1, TBLPTRL \
|
||||
MOVFF POSTDEC1, TBLPTRH \
|
||||
MOVFF POSTDEC1, TBLPTRU \
|
||||
MOVFF POSTDEC1, TABLAT \
|
||||
MOVFF POSTDEC1, FSR0H \
|
||||
MOVFF POSTDEC1, FSR0L \
|
||||
MOVFF POSTDEC1, FSR2H \
|
||||
MOVFF POSTDEC1, FSR2L \
|
||||
MOVFF POSTDEC1, BSR \
|
||||
/* The next byte is the INTCON register. Read this into WREG as some \
|
||||
* manipulation is required. */ \
|
||||
MOVFF POSTDEC1, WREG \
|
||||
_endasm \
|
||||
\
|
||||
/* From the INTCON register, only the interrupt enable bits form part \
|
||||
* of the tasks context. It is perfectly legitimate for another task to \
|
||||
* have modified any other bits. We therefore only restore the top two bits. \
|
||||
*/ \
|
||||
if( WREG &portGLOBAL_INTERRUPT_FLAG ) \
|
||||
{ \
|
||||
_asm \
|
||||
MOVFF POSTDEC1, STATUS \
|
||||
MOVFF POSTDEC1, WREG \
|
||||
/* Return enabling interrupts. */ \
|
||||
RETFIE 0 \
|
||||
_endasm \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
_asm \
|
||||
MOVFF POSTDEC1, STATUS \
|
||||
MOVFF POSTDEC1, WREG \
|
||||
/* Return without effecting interrupts. The context may have \
|
||||
* been saved from a critical region. */ \
|
||||
RETURN 0 \
|
||||
_endasm \
|
||||
} \
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* See header file for description.
|
||||
*/
|
||||
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters )
|
||||
{
|
||||
uint32_t ulAddress;
|
||||
uint8_t ucBlock;
|
||||
uint32_t ulAddress;
|
||||
uint8_t ucBlock;
|
||||
|
||||
/* Place a few bytes of known values on the bottom of the stack.
|
||||
This is just useful for debugging. */
|
||||
* This is just useful for debugging. */
|
||||
|
||||
*pxTopOfStack = 0x11;
|
||||
pxTopOfStack++;
|
||||
|
|
@ -360,10 +362,10 @@ uint8_t ucBlock;
|
|||
|
||||
|
||||
/* Simulate how the stack would look after a call to vPortYield() generated
|
||||
by the compiler.
|
||||
|
||||
First store the function parameters. This is where the task will expect to
|
||||
find them when it starts running. */
|
||||
* by the compiler.
|
||||
*
|
||||
* First store the function parameters. This is where the task will expect to
|
||||
* find them when it starts running. */
|
||||
ulAddress = ( uint32_t ) pvParameters;
|
||||
*pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );
|
||||
pxTopOfStack++;
|
||||
|
|
@ -373,9 +375,9 @@ uint8_t ucBlock;
|
|||
pxTopOfStack++;
|
||||
|
||||
/* Next we just leave a space. When a context is saved the stack pointer
|
||||
is incremented before it is used so as not to corrupt whatever the stack
|
||||
pointer is actually pointing to. This is especially necessary during
|
||||
function epilogue code generated by the compiler. */
|
||||
* is incremented before it is used so as not to corrupt whatever the stack
|
||||
* pointer is actually pointing to. This is especially necessary during
|
||||
* function epilogue code generated by the compiler. */
|
||||
*pxTopOfStack = 0x44;
|
||||
pxTopOfStack++;
|
||||
|
||||
|
|
@ -445,7 +447,7 @@ uint8_t ucBlock;
|
|||
pxTopOfStack++;
|
||||
|
||||
/* The only function return address so far is the address of the
|
||||
task. */
|
||||
* task. */
|
||||
ulAddress = ( uint32_t ) pxCode;
|
||||
|
||||
/* TOS low. */
|
||||
|
|
@ -463,7 +465,7 @@ uint8_t ucBlock;
|
|||
pxTopOfStack++;
|
||||
|
||||
/* Store the number of return addresses on the hardware stack - so far only
|
||||
the address of the task entry point. */
|
||||
* the address of the task entry point. */
|
||||
*pxTopOfStack = ( StackType_t ) 1;
|
||||
pxTopOfStack++;
|
||||
|
||||
|
|
@ -490,8 +492,8 @@ BaseType_t xPortStartScheduler( void )
|
|||
void vPortEndScheduler( void )
|
||||
{
|
||||
/* It is unlikely that the scheduler for the PIC port will get stopped
|
||||
once running. If required disable the tick interrupt here, then return
|
||||
to xPortStartScheduler(). */
|
||||
* once running. If required disable the tick interrupt here, then return
|
||||
* to xPortStartScheduler(). */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
@ -503,7 +505,7 @@ void vPortEndScheduler( void )
|
|||
void vPortYield( void )
|
||||
{
|
||||
/* This can get called with interrupts either enabled or disabled. We
|
||||
will save the INTCON register with the interrupt enable bits unmodified. */
|
||||
* will save the INTCON register with the interrupt enable bits unmodified. */
|
||||
portSAVE_CONTEXT( portINTERRUPTS_UNCHANGED );
|
||||
|
||||
/* Switch to the highest priority task that is ready to run. */
|
||||
|
|
@ -524,7 +526,7 @@ static void prvLowInterrupt( void )
|
|||
if( PIR1bits.CCP1IF )
|
||||
{
|
||||
_asm
|
||||
goto prvTickISR
|
||||
goto prvTickISR
|
||||
_endasm
|
||||
}
|
||||
|
||||
|
|
@ -532,7 +534,7 @@ static void prvLowInterrupt( void )
|
|||
if( PIR1bits.RCIF )
|
||||
{
|
||||
_asm
|
||||
goto vSerialRxISR
|
||||
goto vSerialRxISR
|
||||
_endasm
|
||||
}
|
||||
|
||||
|
|
@ -542,7 +544,7 @@ static void prvLowInterrupt( void )
|
|||
if( PIE1bits.TXIE )
|
||||
{
|
||||
_asm
|
||||
goto vSerialTxISR
|
||||
goto vSerialTxISR
|
||||
_endasm
|
||||
}
|
||||
}
|
||||
|
|
@ -560,7 +562,7 @@ static void prvLowInterrupt( void )
|
|||
static void prvTickISR( void )
|
||||
{
|
||||
/* Interrupts must have been enabled for the ISR to fire, so we have to
|
||||
save the context with interrupts enabled. */
|
||||
* save the context with interrupts enabled. */
|
||||
portSAVE_CONTEXT( portGLOBAL_INTERRUPT_FLAG );
|
||||
PIR1bits.CCP1IF = 0;
|
||||
|
||||
|
|
@ -580,16 +582,16 @@ static void prvTickISR( void )
|
|||
*/
|
||||
static void prvSetupTimerInterrupt( void )
|
||||
{
|
||||
const uint32_t ulConstCompareValue = ( ( configCPU_CLOCK_HZ / portTIMER_FOSC_SCALE ) / configTICK_RATE_HZ );
|
||||
uint32_t ulCompareValue;
|
||||
uint8_t ucByte;
|
||||
const uint32_t ulConstCompareValue = ( ( configCPU_CLOCK_HZ / portTIMER_FOSC_SCALE ) / configTICK_RATE_HZ );
|
||||
uint32_t ulCompareValue;
|
||||
uint8_t ucByte;
|
||||
|
||||
/* Interrupts are disabled when this function is called.
|
||||
|
||||
Setup CCP1 to provide the tick interrupt using a compare match on timer
|
||||
1.
|
||||
|
||||
Clear the time count then setup timer. */
|
||||
*
|
||||
* Setup CCP1 to provide the tick interrupt using a compare match on timer
|
||||
* 1.
|
||||
*
|
||||
* Clear the time count then setup timer. */
|
||||
TMR1H = ( uint8_t ) 0x00;
|
||||
TMR1L = ( uint8_t ) 0x00;
|
||||
|
||||
|
|
@ -606,10 +608,10 @@ uint8_t ucByte;
|
|||
PIE1bits.CCP1IE = portBIT_SET; /*< Interrupt enable. */
|
||||
|
||||
/* We are only going to use the global interrupt bit, so set the peripheral
|
||||
bit to true. */
|
||||
* bit to true. */
|
||||
INTCONbits.GIEL = portBIT_SET;
|
||||
|
||||
/* Provided library function for setting up the timer that will produce the
|
||||
tick. */
|
||||
* tick. */
|
||||
OpenTimer1( T1_16BIT_RW & T1_SOURCE_INT & T1_PS_1_1 & T1_CCP1_T3_CCP2 );
|
||||
}
|
||||
|
|
|
|||
|
|
@ -40,23 +40,23 @@
|
|||
*/
|
||||
|
||||
/* Type definitions. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT int
|
||||
#define portSTACK_TYPE uint8_t
|
||||
#define portBASE_TYPE char
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT int
|
||||
#define portSTACK_TYPE uint8_t
|
||||
#define portBASE_TYPE char
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef signed char BaseType_t;
|
||||
typedef unsigned char UBaseType_t;
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef signed char BaseType_t;
|
||||
typedef unsigned char UBaseType_t;
|
||||
|
||||
#if( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
|
||||
typedef uint32_t TickType_t;
|
||||
#if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
#else
|
||||
#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
|
||||
|
|
@ -64,10 +64,10 @@ typedef unsigned char UBaseType_t;
|
|||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Hardware specifics. */
|
||||
#define portBYTE_ALIGNMENT 1
|
||||
#define portGLOBAL_INT_ENABLE_BIT 0x80
|
||||
#define portSTACK_GROWTH 1
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 1
|
||||
#define portGLOBAL_INT_ENABLE_BIT 0x80
|
||||
#define portSTACK_GROWTH 1
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Critical section management. */
|
||||
|
|
@ -75,30 +75,32 @@ typedef unsigned char UBaseType_t;
|
|||
#define portENABLE_INTERRUPTS() INTCONbits.GIEH = 1;
|
||||
|
||||
/* Push the INTCON register onto the stack, then disable interrupts. */
|
||||
#define portENTER_CRITICAL() POSTINC1 = INTCON; \
|
||||
INTCONbits.GIEH = 0;
|
||||
#define portENTER_CRITICAL() \
|
||||
POSTINC1 = INTCON; \
|
||||
INTCONbits.GIEH = 0;
|
||||
|
||||
/* Retrieve the INTCON register from the stack, and enable interrupts
|
||||
if they were saved as being enabled. Don't modify any other bits
|
||||
within the INTCON register as these may have lagitimately have been
|
||||
modified within the critical region. */
|
||||
#define portEXIT_CRITICAL() _asm \
|
||||
MOVF POSTDEC1, 1, 0 \
|
||||
_endasm \
|
||||
if( INDF1 & portGLOBAL_INT_ENABLE_BIT ) \
|
||||
{ \
|
||||
portENABLE_INTERRUPTS(); \
|
||||
}
|
||||
* if they were saved as being enabled. Don't modify any other bits
|
||||
* within the INTCON register as these may have legitimately have been
|
||||
* modified within the critical region. */
|
||||
#define portEXIT_CRITICAL() \
|
||||
_asm \
|
||||
MOVF POSTDEC1, 1, 0 \
|
||||
_endasm \
|
||||
if( INDF1 & portGLOBAL_INT_ENABLE_BIT ) \
|
||||
{ \
|
||||
portENABLE_INTERRUPTS(); \
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task utilities. */
|
||||
extern void vPortYield( void );
|
||||
#define portYIELD() vPortYield()
|
||||
#define portYIELD() vPortYield()
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Required by the kernel aware debugger. */
|
||||
|
|
@ -107,8 +109,9 @@ extern void vPortYield( void );
|
|||
#endif
|
||||
|
||||
|
||||
#define portNOP() _asm \
|
||||
NOP \
|
||||
_endasm
|
||||
#define portNOP() \
|
||||
_asm \
|
||||
NOP \
|
||||
_endasm
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue