CI-CD Updates (#768)

* Use new version of CI-CD Actions
* Use cSpell spell check, and use ubuntu-20.04 for formatting check
* Format and spell check all files in the portable directory
* Remove the https:// from #errors and #warnings as uncrustify attempts to change it to /*
* Use checkout@v3 instead of checkout@v2 on all jobs
---------
This commit is contained in:
Soren Ptak 2023-09-05 17:24:04 -04:00 committed by GitHub
parent d6bccb1f4c
commit 5fb9b50da8
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485 changed files with 108790 additions and 107581 deletions

View file

@ -26,80 +26,126 @@
*
*/
EXTERN pxCurrentTCB
EXTERN ulCriticalNesting
EXTERN pxCurrentTCB
EXTERN ulCriticalNesting
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Context save and restore macro definitions
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
Context save and restore macro definitions
;
portSAVE_CONTEXT MACRO
; Push R0 as we are going to use the register.
STMDB SP!, {R0}
;
Push R0 as we are going to use the register.
STMDB SP !, {
R0
}
; Set R0 to point to the task stack pointer.
STMDB SP, {SP}^
NOP
SUB SP, SP, #4
LDMIA SP!, {R0}
Set R0 to point to the task stack pointer.
STMDB SP, {
SP
}
^
NOP
SUB SP, SP, # 4
LDMIA SP !, {
R0
}
; Push the return address onto the stack.
STMDB R0!, {LR}
;
Push the return address onto the stack.
STMDB R0 !, {
LR
}
; Now we have saved LR we can use it instead of R0.
MOV LR, R0
Now we have saved LR we can use it instead of R0.
MOV LR, R0
; Pop R0 so we can save it onto the system mode stack.
LDMIA SP!, {R0}
;
; Push all the system mode registers onto the task stack.
STMDB LR, {R0-LR}^
NOP
SUB LR, LR, #60
Pop R0 so we can save it onto the system mode stack.
LDMIA SP !, {
R0
}
; Push the SPSR onto the task stack.
MRS R0, SPSR
STMDB LR!, {R0}
Push all the system mode registers onto the task stack.
STMDB LR, {
R0 - LR
}
^
NOP
SUB LR, LR, # 60
LDR R0, =ulCriticalNesting
LDR R0, [R0]
STMDB LR!, {R0}
;
Push the SPSR onto the task stack.
MRS R0, SPSR
STMDB LR !, {
R0
}
; Store the new top of stack for the task.
LDR R1, =pxCurrentTCB
LDR R0, [R1]
STR LR, [R0]
LDR R0, = ulCriticalNesting
LDR R0, [ R0 ]
STMDB LR !, {
R0
}
ENDM
Store the new top of stack
for the task.
LDR R1, = pxCurrentTCB
LDR R0, [ R1 ]
STR LR, [ R0 ]
ENDM
portRESTORE_CONTEXT MACRO
; Set the LR to the task stack.
LDR R1, =pxCurrentTCB
LDR R0, [R1]
LDR LR, [R0]
;
Set the LR to the task stack.
LDR R1, = pxCurrentTCB
LDR R0, [ R1 ]
LDR LR, [ R0 ]
; The critical nesting depth is the first item on the stack.
; Load it into the ulCriticalNesting variable.
LDR R0, =ulCriticalNesting
LDMFD LR!, {R1}
STR R1, [R0]
;
The critical nesting depth is the first item on the stack.
;
Load it into the ulCriticalNesting variable.
LDR R0, = ulCriticalNesting
LDMFD LR !, {
R1
}
; Get the SPSR from the stack.
LDMFD LR!, {R0}
MSR SPSR_cxsf, R0
STR R1, [ R0 ]
; Restore all system mode registers for the task.
LDMFD LR, {R0-R14}^
NOP
;
Get the SPSR from the stack.
LDMFD LR !, {
R0
}
MSR SPSR_cxsf, R0
; Restore the return address.
LDR LR, [LR, #+60]
;
Restore all system mode registers
; And return - correcting the offset in the LR to obtain the
; correct address.
SUBS PC, LR, #4
for the task.
LDMFD LR, {
R0 - R14
}
ENDM
^
NOP
;
Restore the return address.
LDR LR, [ LR, # + 60 ]
;
And return -correcting the offset in the LR to obtain the
;
correct address.
SUBS PC, LR, # 4
ENDM

View file

@ -27,9 +27,9 @@
*/
/*-----------------------------------------------------------
* Implementation of functions defined in portable.h for the ST STR91x ARM9
* port.
*----------------------------------------------------------*/
* Implementation of functions defined in portable.h for the ST STR91x ARM9
* port.
*----------------------------------------------------------*/
/* Library includes. */
#include "91x_lib.h"
@ -48,18 +48,18 @@
/* Constants required to setup the initial stack. */
#ifndef _RUN_TASK_IN_ARM_MODE_
#define portINITIAL_SPSR ( ( StackType_t ) 0x3f ) /* System mode, THUMB mode, interrupts enabled. */
#define portINITIAL_SPSR ( ( StackType_t ) 0x3f ) /* System mode, THUMB mode, interrupts enabled. */
#else
#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
#endif
#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
/* Constants required to handle critical sections. */
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
#ifndef abs
#define abs(x) ((x)>0 ? (x) : -(x))
#define abs( x ) ( ( x ) > 0 ? ( x ) : -( x ) )
#endif
/**
@ -74,14 +74,14 @@
* }
*
*/
#define TOGGLE_LED(port,pin) \
if ( ((((port)->DR[(pin)<<2])) & (pin)) != Bit_RESET ) \
{ \
(port)->DR[(pin) <<2] = 0x00; \
} \
else \
{ \
(port)->DR[(pin) <<2] = (pin); \
#define TOGGLE_LED( port, pin ) \
if( ( ( ( ( port )->DR[ ( pin ) << 2 ] ) ) & ( pin ) ) != Bit_RESET ) \
{ \
( port )->DR[ ( pin ) << 2 ] = 0x00; \
} \
else \
{ \
( port )->DR[ ( pin ) << 2 ] = ( pin ); \
}
@ -91,13 +91,13 @@
static void prvSetupTimerInterrupt( void );
/* ulCriticalNesting will get set to zero when the first task starts. It
cannot be initialised to 0 as this will cause interrupts to be enabled
during the kernel initialisation process. */
* cannot be initialised to 0 as this will cause interrupts to be enabled
* during the kernel initialisation process. */
uint32_t ulCriticalNesting = ( uint32_t ) 9999;
/* Tick interrupt routines for cooperative and preemptive operation
respectively. The preemptive version is not defined as __irq as it is called
from an asm wrapper function. */
* respectively. The preemptive version is not defined as __irq as it is called
* from an asm wrapper function. */
void WDG_IRQHandler( void );
/* VIC interrupt default handler. */
@ -116,56 +116,58 @@ static void prvDefaultHandler( void );
*
* See header file for description.
*/
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
TaskFunction_t pxCode,
void * pvParameters )
{
StackType_t *pxOriginalTOS;
StackType_t * pxOriginalTOS;
pxOriginalTOS = pxTopOfStack;
/* To ensure asserts in tasks.c don't fail, although in this case the assert
is not really required. */
* is not really required. */
pxTopOfStack--;
/* Setup the initial stack of the task. The stack is set exactly as
expected by the portRESTORE_CONTEXT() macro. */
* expected by the portRESTORE_CONTEXT() macro. */
/* First on the stack is the return address - which in this case is the
start of the task. The offset is added to make the return address appear
as it would within an IRQ ISR. */
* start of the task. The offset is added to make the return address appear
* as it would within an IRQ ISR. */
*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
*pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
pxTopOfStack--;
/* When the task starts is will expect to find the function parameter in
R0. */
* R0. */
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
pxTopOfStack--;
@ -174,8 +176,8 @@ StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t px
pxTopOfStack--;
/* Interrupt flags cannot always be stored on the stack and will
instead be stored in a variable, which is then saved as part of the
tasks context. */
* instead be stored in a variable, which is then saved as part of the
* tasks context. */
*pxTopOfStack = portNO_CRITICAL_NESTING;
return pxTopOfStack;
@ -184,10 +186,10 @@ StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t px
BaseType_t xPortStartScheduler( void )
{
extern void vPortStartFirstTask( void );
extern void vPortStartFirstTask( void );
/* Start the timer that generates the tick ISR. Interrupts are disabled
here already. */
* here already. */
prvSetupTimerInterrupt();
/* Start the first task. */
@ -201,41 +203,49 @@ extern void vPortStartFirstTask( void );
void vPortEndScheduler( void )
{
/* It is unlikely that the ARM port will require this function as there
is nothing to return to. */
* is nothing to return to. */
}
/*-----------------------------------------------------------*/
/* This function is called from an asm wrapper, so does not require the __irq
keyword. */
* keyword. */
#if configUSE_WATCHDOG_TICK == 1
static void prvFindFactors(u32 n, u16 *a, u32 *b)
static void prvFindFactors( u32 n,
u16 * a,
u32 * b )
{
/* This function is copied from the ST STR7 library and is
copyright STMicroelectronics. Reproduced with permission. */
* copyright STMicroelectronics. Reproduced with permission. */
u32 b0;
u16 a0;
int32_t err, err_min=n;
int32_t err, err_min = n;
*a = a0 = ((n-1)/65536ul) + 1;
*a = a0 = ( ( n - 1 ) / 65536ul ) + 1;
*b = b0 = n / *a;
for (; *a <= 256; (*a)++)
for( ; *a <= 256; ( *a )++ )
{
*b = n / *a;
err = (int32_t)*a * (int32_t)*b - (int32_t)n;
if (abs(err) > (*a / 2))
err = ( int32_t ) *a * ( int32_t ) *b - ( int32_t ) n;
if( abs( err ) > ( *a / 2 ) )
{
(*b)++;
err = (int32_t)*a * (int32_t)*b - (int32_t)n;
( *b )++;
err = ( int32_t ) *a * ( int32_t ) *b - ( int32_t ) n;
}
if (abs(err) < abs(err_min))
if( abs( err ) < abs( err_min ) )
{
err_min = err;
a0 = *a;
b0 = *b;
if (err == 0) break;
if( err == 0 )
{
break;
}
}
}
@ -246,21 +256,21 @@ keyword. */
static void prvSetupTimerInterrupt( void )
{
WDG_InitTypeDef xWdg;
uint16_t a;
uint32_t n = configCPU_PERIPH_HZ / configTICK_RATE_HZ, b;
WDG_InitTypeDef xWdg;
uint16_t a;
uint32_t n = configCPU_PERIPH_HZ / configTICK_RATE_HZ, b;
/* Configure the watchdog as a free running timer that generates a
periodic interrupt. */
* periodic interrupt. */
SCU_APBPeriphClockConfig( __WDG, ENABLE );
WDG_DeInit();
WDG_StructInit(&xWdg);
WDG_StructInit( &xWdg );
prvFindFactors( n, &a, &b );
xWdg.WDG_Prescaler = a - 1;
xWdg.WDG_Preload = b - 1;
WDG_Init( &xWdg );
WDG_ITConfig(ENABLE);
WDG_ITConfig( ENABLE );
/* Configure the VIC for the WDG interrupt. */
VIC_Config( WDG_ITLine, VIC_IRQ, 10 );
@ -270,7 +280,7 @@ keyword. */
VIC0->DVAR = ( uint32_t ) prvDefaultHandler;
VIC1->DVAR = ( uint32_t ) prvDefaultHandler;
WDG_Cmd(ENABLE);
WDG_Cmd( ENABLE );
}
/*-----------------------------------------------------------*/
@ -289,36 +299,44 @@ keyword. */
}
}
#else
#else /* if configUSE_WATCHDOG_TICK == 1 */
static void prvFindFactors(u32 n, u8 *a, u16 *b)
static void prvFindFactors( u32 n,
u8 * a,
u16 * b )
{
/* This function is copied from the ST STR7 library and is
copyright STMicroelectronics. Reproduced with permission. */
* copyright STMicroelectronics. Reproduced with permission. */
u16 b0;
u8 a0;
int32_t err, err_min=n;
int32_t err, err_min = n;
*a = a0 = ((n-1)/256) + 1;
*a = a0 = ( ( n - 1 ) / 256 ) + 1;
*b = b0 = n / *a;
for (; *a <= 256; (*a)++)
for( ; *a <= 256; ( *a )++ )
{
*b = n / *a;
err = (int32_t)*a * (int32_t)*b - (int32_t)n;
if (abs(err) > (*a / 2))
err = ( int32_t ) *a * ( int32_t ) *b - ( int32_t ) n;
if( abs( err ) > ( *a / 2 ) )
{
(*b)++;
err = (int32_t)*a * (int32_t)*b - (int32_t)n;
( *b )++;
err = ( int32_t ) *a * ( int32_t ) *b - ( int32_t ) n;
}
if (abs(err) < abs(err_min))
if( abs( err ) < abs( err_min ) )
{
err_min = err;
a0 = *a;
b0 = *b;
if (err == 0) break;
if( err == 0 )
{
break;
}
}
}
@ -336,20 +354,20 @@ keyword. */
TIM_InitTypeDef timer;
SCU_APBPeriphClockConfig( __TIM23, ENABLE );
TIM_DeInit(TIM2);
TIM_StructInit(&timer);
TIM_DeInit( TIM2 );
TIM_StructInit( &timer );
prvFindFactors( n, &a, &b );
timer.TIM_Mode = TIM_OCM_CHANNEL_1;
timer.TIM_OC1_Modes = TIM_TIMING;
timer.TIM_Clock_Source = TIM_CLK_APB;
timer.TIM_Clock_Edge = TIM_CLK_EDGE_RISING;
timer.TIM_Prescaler = a-1;
timer.TIM_Pulse_Level_1 = TIM_HIGH;
timer.TIM_Pulse_Length_1 = s_nPulseLength = b-1;
timer.TIM_Mode = TIM_OCM_CHANNEL_1;
timer.TIM_OC1_Modes = TIM_TIMING;
timer.TIM_Clock_Source = TIM_CLK_APB;
timer.TIM_Clock_Edge = TIM_CLK_EDGE_RISING;
timer.TIM_Prescaler = a - 1;
timer.TIM_Pulse_Level_1 = TIM_HIGH;
timer.TIM_Pulse_Length_1 = s_nPulseLength = b - 1;
TIM_Init (TIM2, &timer);
TIM_ITConfig(TIM2, TIM_IT_OC1, ENABLE);
TIM_Init( TIM2, &timer );
TIM_ITConfig( TIM2, TIM_IT_OC1, ENABLE );
/* Configure the VIC for the WDG interrupt. */
VIC_Config( TIM2_ITLine, VIC_IRQ, 10 );
VIC_ITCmd( TIM2_ITLine, ENABLE );
@ -358,14 +376,14 @@ keyword. */
VIC0->DVAR = ( uint32_t ) prvDefaultHandler;
VIC1->DVAR = ( uint32_t ) prvDefaultHandler;
TIM_CounterCmd(TIM2, TIM_CLEAR);
TIM_CounterCmd(TIM2, TIM_START);
TIM_CounterCmd( TIM2, TIM_CLEAR );
TIM_CounterCmd( TIM2, TIM_START );
}
/*-----------------------------------------------------------*/
void TIM2_IRQHandler( void )
{
/* Reset the timer counter to avioid overflow. */
/* Reset the timer counter to avoid overflow. */
TIM2->OC1R += s_nPulseLength;
/* Increment the tick counter. */
@ -388,9 +406,9 @@ __arm __interwork void vPortEnterCritical( void )
/* Disable interrupts first! */
portDISABLE_INTERRUPTS();
/* Now interrupts are disabled ulCriticalNesting can be accessed
directly. Increment ulCriticalNesting to keep a count of how many times
portENTER_CRITICAL() has been called. */
/* Now that interrupts are disabled, ulCriticalNesting can be accessed
* directly. Increment ulCriticalNesting to keep a count of how many times
* portENTER_CRITICAL() has been called. */
ulCriticalNesting++;
}
/*-----------------------------------------------------------*/
@ -403,7 +421,7 @@ __arm __interwork void vPortExitCritical( void )
ulCriticalNesting--;
/* If the nesting level has reached zero then interrupts should be
re-enabled. */
* re-enabled. */
if( ulCriticalNesting == portNO_CRITICAL_NESTING )
{
portENABLE_INTERRUPTS();

View file

@ -49,24 +49,24 @@
/* *INDENT-ON* */
/* Type definitions. */
#define portCHAR char
#define portFLOAT float
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
#define portCHAR char
#define portFLOAT float
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
typedef uint32_t TickType_t;
#if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#else
#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
@ -74,11 +74,11 @@ typedef unsigned long UBaseType_t;
/*-----------------------------------------------------------*/
/* Hardware specifics. */
#define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8
#define portYIELD() asm ( "SWI 0" )
#define portNOP() asm ( "NOP" )
#define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8
#define portYIELD() asm ( "SWI 0" )
#define portNOP() asm ( "NOP" )
/*-----------------------------------------------------------*/
/* Critical section handling. */
@ -94,21 +94,21 @@ __arm __interwork void vPortExitCritical( void );
/*-----------------------------------------------------------*/
/* Task utilities. */
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
{ \
extern void vTaskSwitchContext( void ); \
\
if( xSwitchRequired ) \
{ \
vTaskSwitchContext(); \
} \
}
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
{ \
extern void vTaskSwitchContext( void ); \
\
if( xSwitchRequired ) \
{ \
vTaskSwitchContext(); \
} \
}
/*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
/* *INDENT-OFF* */
#ifdef __cplusplus