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CI-CD Updates (#768)
* Use new version of CI-CD Actions * Use cSpell spell check, and use ubuntu-20.04 for formatting check * Format and spell check all files in the portable directory * Remove the https:// from #errors and #warnings as uncrustify attempts to change it to /* * Use checkout@v3 instead of checkout@v2 on all jobs ---------
This commit is contained in:
Soren Ptak
GitHub
parent
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commit
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485 changed files with 108790 additions and 107581 deletions
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@ -1,105 +1,151 @@
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;/*
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; * FreeRTOS Kernel <DEVELOPMENT BRANCH>
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; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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; *
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; * SPDX-License-Identifier: MIT
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; *
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; * Permission is hereby granted, free of charge, to any person obtaining a copy of
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; * this software and associated documentation files (the "Software"), to deal in
|
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; * the Software without restriction, including without limitation the rights to
|
||||
; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
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; * the Software, and to permit persons to whom the Software is furnished to do so,
|
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; * subject to the following conditions:
|
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; *
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||||
; * The above copyright notice and this permission notice shall be included in all
|
||||
; * copies or substantial portions of the Software.
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||||
; *
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||||
; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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||||
; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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||||
; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
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; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
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; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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; *
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; * https://www.FreeRTOS.org
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; * https://github.com/FreeRTOS
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; *
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; */
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; /*
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* ; * FreeRTOS Kernel <DEVELOPMENT BRANCH>
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* ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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* ; *
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* ; * SPDX-License-Identifier: MIT
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* ; *
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* ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* ; * this software and associated documentation files (the "Software"), to deal in
|
||||
* ; * the Software without restriction, including without limitation the rights to
|
||||
* ; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* ; * the Software, and to permit persons to whom the Software is furnished to do so,
|
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* ; * subject to the following conditions:
|
||||
* ; *
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* ; * The above copyright notice and this permission notice shall be included in all
|
||||
* ; * copies or substantial portions of the Software.
|
||||
* ; *
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* ; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* ; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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||||
* ; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
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* ; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
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* ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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* ; *
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* ; * https://www.FreeRTOS.org
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* ; * https://github.com/FreeRTOS
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* ; *
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* ; */
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EXTERN pxCurrentTCB
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EXTERN ulCriticalNesting
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EXTERN pxCurrentTCB
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EXTERN ulCriticalNesting
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; Context save and restore macro definitions
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;
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Context save and restore macro definitions
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;
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portSAVE_CONTEXT MACRO
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; Push R0 as we are going to use the register.
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STMDB SP!, {R0}
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;
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Push R0 as we are going to use the register.
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STMDB SP !, {
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R0
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}
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; Set R0 to point to the task stack pointer.
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STMDB SP, {SP}^
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NOP
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SUB SP, SP, #4
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LDMIA SP!, {R0}
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Set R0 to point to the task stack pointer.
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STMDB SP, {
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SP
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}
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^
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NOP
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SUB SP, SP, # 4
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LDMIA SP !, {
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R0
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}
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; Push the return address onto the stack.
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STMDB R0!, {LR}
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;
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Push the return address onto the stack.
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STMDB R0 !, {
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LR
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}
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; Now we have saved LR we can use it instead of R0.
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MOV LR, R0
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Now we have saved LR we can use it instead of R0.
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MOV LR, R0
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; Pop R0 so we can save it onto the system mode stack.
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LDMIA SP!, {R0}
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;
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; Push all the system mode registers onto the task stack.
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STMDB LR, {R0-LR}^
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NOP
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SUB LR, LR, #60
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Pop R0 so we can save it onto the system mode stack.
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LDMIA SP !, {
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R0
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}
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; Push the SPSR onto the task stack.
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MRS R0, SPSR
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STMDB LR!, {R0}
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Push all the system mode registers onto the task stack.
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STMDB LR, {
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R0 - LR
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}
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^
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NOP
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SUB LR, LR, # 60
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LDR R0, =ulCriticalNesting
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LDR R0, [R0]
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STMDB LR!, {R0}
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;
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Push the SPSR onto the task stack.
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MRS R0, SPSR
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STMDB LR !, {
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R0
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}
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; Store the new top of stack for the task.
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LDR R1, =pxCurrentTCB
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LDR R0, [R1]
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STR LR, [R0]
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LDR R0, = ulCriticalNesting
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LDR R0, [ R0 ]
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STMDB LR !, {
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R0
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}
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ENDM
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Store the new top of stack
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for the task.
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LDR R1, = pxCurrentTCB
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LDR R0, [ R1 ]
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STR LR, [ R0 ]
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ENDM
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portRESTORE_CONTEXT MACRO
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; Set the LR to the task stack.
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LDR R1, =pxCurrentTCB
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LDR R0, [R1]
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LDR LR, [R0]
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;
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Set the LR to the task stack.
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LDR R1, = pxCurrentTCB
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LDR R0, [ R1 ]
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LDR LR, [ R0 ]
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; The critical nesting depth is the first item on the stack.
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; Load it into the ulCriticalNesting variable.
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LDR R0, =ulCriticalNesting
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LDMFD LR!, {R1}
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STR R1, [R0]
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;
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The critical nesting depth is the first item on the stack.
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;
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Load it into the ulCriticalNesting variable.
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LDR R0, = ulCriticalNesting
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LDMFD LR !, {
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R1
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}
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; Get the SPSR from the stack.
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LDMFD LR!, {R0}
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MSR SPSR_cxsf, R0
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STR R1, [ R0 ]
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; Restore all system mode registers for the task.
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LDMFD LR, {R0-R14}^
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NOP
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;
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Get the SPSR from the stack.
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LDMFD LR !, {
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R0
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}
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MSR SPSR_cxsf, R0
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; Restore the return address.
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LDR LR, [LR, #+60]
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;
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Restore all system mode registers
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; And return - correcting the offset in the LR to obtain the
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; correct address.
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SUBS PC, LR, #4
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for the task.
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LDMFD LR, {
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R0 - R14
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}
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ENDM
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^
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NOP
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;
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Restore the return address.
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LDR LR, [ LR, # + 60 ]
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;
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And return -correcting the offset in the LR to obtain the
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;
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correct address.
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SUBS PC, LR, # 4
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ENDM
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@ -27,8 +27,8 @@
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the Atmel ARM7 port.
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*----------------------------------------------------------*/
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* Implementation of functions defined in portable.h for the Atmel ARM7 port.
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*----------------------------------------------------------*/
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/* Standard includes. */
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@ -39,29 +39,29 @@
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#include "task.h"
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/* Constants required to setup the initial stack. */
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#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
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#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
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#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
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#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
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/* Constants required to setup the PIT. */
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#define portPIT_CLOCK_DIVISOR ( ( uint32_t ) 16 )
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#define portPIT_COUNTER_VALUE ( ( ( configCPU_CLOCK_HZ / portPIT_CLOCK_DIVISOR ) / 1000UL ) * portTICK_PERIOD_MS )
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#define portPIT_CLOCK_DIVISOR ( ( uint32_t ) 16 )
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#define portPIT_COUNTER_VALUE ( ( ( configCPU_CLOCK_HZ / portPIT_CLOCK_DIVISOR ) / 1000UL ) * portTICK_PERIOD_MS )
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/* Constants required to handle critical sections. */
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#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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#define portINT_LEVEL_SENSITIVE 0
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#define portPIT_ENABLE ( ( uint16_t ) 0x1 << 24 )
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#define portPIT_INT_ENABLE ( ( uint16_t ) 0x1 << 25 )
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#define portINT_LEVEL_SENSITIVE 0
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#define portPIT_ENABLE ( ( uint16_t ) 0x1 << 24 )
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#define portPIT_INT_ENABLE ( ( uint16_t ) 0x1 << 25 )
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/*-----------------------------------------------------------*/
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/* Setup the PIT to generate the tick interrupts. */
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static void prvSetupTimerInterrupt( void );
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/* ulCriticalNesting will get set to zero when the first task starts. It
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cannot be initialised to 0 as this will cause interrupts to be enabled
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during the kernel initialisation process. */
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* cannot be initialised to 0 as this will cause interrupts to be enabled
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* during the kernel initialisation process. */
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uint32_t ulCriticalNesting = ( uint32_t ) 9999;
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/*-----------------------------------------------------------*/
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@ -72,56 +72,58 @@ uint32_t ulCriticalNesting = ( uint32_t ) 9999;
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*
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* See header file for description.
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*/
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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TaskFunction_t pxCode,
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void * pvParameters )
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{
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StackType_t *pxOriginalTOS;
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StackType_t * pxOriginalTOS;
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pxOriginalTOS = pxTopOfStack;
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/* To ensure asserts in tasks.c don't fail, although in this case the assert
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is not really required. */
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* is not really required. */
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pxTopOfStack--;
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/* Setup the initial stack of the task. The stack is set exactly as
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expected by the portRESTORE_CONTEXT() macro. */
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* expected by the portRESTORE_CONTEXT() macro. */
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/* First on the stack is the return address - which in this case is the
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start of the task. The offset is added to make the return address appear
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as it would within an IRQ ISR. */
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* start of the task. The offset is added to make the return address appear
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* as it would within an IRQ ISR. */
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*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
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*pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
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*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
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*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
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*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
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*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
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*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
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*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
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*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
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*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
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*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
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*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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pxTopOfStack--;
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/* When the task starts is will expect to find the function parameter in
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R0. */
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* R0. */
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*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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pxTopOfStack--;
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@ -137,8 +139,8 @@ StackType_t *pxOriginalTOS;
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pxTopOfStack--;
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/* Interrupt flags cannot always be stored on the stack and will
|
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instead be stored in a variable, which is then saved as part of the
|
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tasks context. */
|
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* instead be stored in a variable, which is then saved as part of the
|
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* tasks context. */
|
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*pxTopOfStack = portNO_CRITICAL_NESTING;
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return pxTopOfStack;
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|
|
@ -147,10 +149,10 @@ StackType_t *pxOriginalTOS;
|
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|
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BaseType_t xPortStartScheduler( void )
|
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{
|
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extern void vPortStartFirstTask( void );
|
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extern void vPortStartFirstTask( void );
|
||||
|
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/* Start the timer that generates the tick ISR. Interrupts are disabled
|
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here already. */
|
||||
* here already. */
|
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prvSetupTimerInterrupt();
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||||
|
||||
/* Start the first task. */
|
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|
|
@ -164,22 +166,22 @@ extern void vPortStartFirstTask( void );
|
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void vPortEndScheduler( void )
|
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{
|
||||
/* It is unlikely that the ARM port will require this function as there
|
||||
is nothing to return to. */
|
||||
* is nothing to return to. */
|
||||
}
|
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/*-----------------------------------------------------------*/
|
||||
|
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#if configUSE_PREEMPTION == 0
|
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|
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/* The cooperative scheduler requires a normal IRQ service routine to
|
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simply increment the system tick. */
|
||||
/* The cooperative scheduler requires a normal IRQ service routine to
|
||||
* simply increment the system tick. */
|
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static __arm __irq void vPortNonPreemptiveTick( void );
|
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static __arm __irq void vPortNonPreemptiveTick( void )
|
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{
|
||||
uint32_t ulDummy;
|
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|
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/* Increment the tick count - which may wake some tasks but as the
|
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preemptive scheduler is not being used any woken task is not given
|
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processor time no matter what its priority. */
|
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* preemptive scheduler is not being used any woken task is not given
|
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* processor time no matter what its priority. */
|
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xTaskIncrementTick();
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|
||||
/* Clear the PIT interrupt. */
|
||||
|
|
@ -189,37 +191,33 @@ void vPortEndScheduler( void )
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|||
AT91C_BASE_AIC->AIC_EOICR = ulDummy;
|
||||
}
|
||||
|
||||
#else
|
||||
#else /* if configUSE_PREEMPTION == 0 */
|
||||
|
||||
/* Currently the IAR port requires the preemptive tick function to be
|
||||
defined in an asm file. */
|
||||
/* Currently the IAR port requires the preemptive tick function to be
|
||||
* defined in an asm file. */
|
||||
|
||||
#endif
|
||||
#endif /* if configUSE_PREEMPTION == 0 */
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvSetupTimerInterrupt( void )
|
||||
{
|
||||
AT91PS_PITC pxPIT = AT91C_BASE_PITC;
|
||||
AT91PS_PITC pxPIT = AT91C_BASE_PITC;
|
||||
|
||||
/* Setup the AIC for PIT interrupts. The interrupt routine chosen depends
|
||||
on whether the preemptive or cooperative scheduler is being used. */
|
||||
* on whether the preemptive or cooperative scheduler is being used. */
|
||||
#if configUSE_PREEMPTION == 0
|
||||
|
||||
AT91F_AIC_ConfigureIt( AT91C_BASE_AIC, AT91C_ID_SYS, AT91C_AIC_PRIOR_HIGHEST, portINT_LEVEL_SENSITIVE, ( void (*)(void) ) vPortNonPreemptiveTick );
|
||||
|
||||
AT91F_AIC_ConfigureIt( AT91C_BASE_AIC, AT91C_ID_SYS, AT91C_AIC_PRIOR_HIGHEST, portINT_LEVEL_SENSITIVE, ( void ( * )( void ) )vPortNonPreemptiveTick );
|
||||
#else
|
||||
|
||||
extern void ( vPortPreemptiveTick )( void );
|
||||
AT91F_AIC_ConfigureIt( AT91C_BASE_AIC, AT91C_ID_SYS, AT91C_AIC_PRIOR_HIGHEST, portINT_LEVEL_SENSITIVE, ( void (*)(void) ) vPortPreemptiveTick );
|
||||
|
||||
extern void( vPortPreemptiveTick )( void );
|
||||
AT91F_AIC_ConfigureIt( AT91C_BASE_AIC, AT91C_ID_SYS, AT91C_AIC_PRIOR_HIGHEST, portINT_LEVEL_SENSITIVE, ( void ( * )( void ) )vPortPreemptiveTick );
|
||||
#endif
|
||||
|
||||
/* Configure the PIT period. */
|
||||
pxPIT->PITC_PIMR = portPIT_ENABLE | portPIT_INT_ENABLE | portPIT_COUNTER_VALUE;
|
||||
|
||||
/* Enable the interrupt. Global interrupts are disabled at this point so
|
||||
this is safe. */
|
||||
* this is safe. */
|
||||
AT91F_AIC_EnableIt( AT91C_BASE_AIC, AT91C_ID_SYS );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
|
@ -229,9 +227,9 @@ void vPortEnterCritical( void )
|
|||
/* Disable interrupts first! */
|
||||
__disable_interrupt();
|
||||
|
||||
/* Now interrupts are disabled ulCriticalNesting can be accessed
|
||||
directly. Increment ulCriticalNesting to keep a count of how many times
|
||||
portENTER_CRITICAL() has been called. */
|
||||
/* Now that interrupts are disabled, ulCriticalNesting can be accessed
|
||||
* directly. Increment ulCriticalNesting to keep a count of how many times
|
||||
* portENTER_CRITICAL() has been called. */
|
||||
ulCriticalNesting++;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
|
@ -244,7 +242,7 @@ void vPortExitCritical( void )
|
|||
ulCriticalNesting--;
|
||||
|
||||
/* If the nesting level has reached zero then interrupts should be
|
||||
re-enabled. */
|
||||
* re-enabled. */
|
||||
if( ulCriticalNesting == portNO_CRITICAL_NESTING )
|
||||
{
|
||||
__enable_interrupt();
|
||||
|
|
|
|||
|
|
@ -47,35 +47,35 @@
|
|||
*/
|
||||
|
||||
/* Type definitions. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
#if( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) ( 0xFFFFFFFFUL )
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) ( 0xFFFFFFFFUL )
|
||||
#else
|
||||
#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Hardware specifics. */
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
#define portYIELD() asm ( "SWI 0" )
|
||||
#define portNOP() asm ( "NOP" )
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
#define portYIELD() asm ( "SWI 0" )
|
||||
#define portNOP() asm ( "NOP" )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Critical section handling. */
|
||||
|
|
@ -91,21 +91,21 @@ __arm __interwork void vPortExitCritical( void );
|
|||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task utilities. */
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
|
||||
{ \
|
||||
extern void vTaskSwitchContext( void ); \
|
||||
\
|
||||
if( xSwitchRequired ) \
|
||||
{ \
|
||||
vTaskSwitchContext(); \
|
||||
} \
|
||||
}
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
|
||||
{ \
|
||||
extern void vTaskSwitchContext( void ); \
|
||||
\
|
||||
if( xSwitchRequired ) \
|
||||
{ \
|
||||
vTaskSwitchContext(); \
|
||||
} \
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue