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CI-CD Updates (#768)
* Use new version of CI-CD Actions * Use cSpell spell check, and use ubuntu-20.04 for formatting check * Format and spell check all files in the portable directory * Remove the https:// from #errors and #warnings as uncrustify attempts to change it to /* * Use checkout@v3 instead of checkout@v2 on all jobs ---------
This commit is contained in:
Soren Ptak
GitHub
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485 changed files with 108790 additions and 107581 deletions
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@ -27,8 +27,8 @@
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the RISC-V port.
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*----------------------------------------------------------*/
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* Implementation of functions defined in portable.h for the RISC-V port.
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*----------------------------------------------------------*/
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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@ -39,15 +39,15 @@
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#include "string.h"
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#ifdef configCLINT_BASE_ADDRESS
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#warning The configCLINT_BASE_ADDRESS constant has been deprecated. configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS are currently being derived from the (possibly 0) configCLINT_BASE_ADDRESS setting. Please update to define configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS dirctly in place of configCLINT_BASE_ADDRESS. See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
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#warning "The configCLINT_BASE_ADDRESS constant has been deprecated. configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS are currently being derived from the (possibly 0) configCLINT_BASE_ADDRESS setting. Please update to define configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS directly in place of configCLINT_BASE_ADDRESS. See www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html"
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#endif
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#ifndef configMTIME_BASE_ADDRESS
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#warning configMTIME_BASE_ADDRESS must be defined in FreeRTOSConfig.h. If the target chip includes a memory-mapped mtime register then set configMTIME_BASE_ADDRESS to the mapped address. Otherwise set configMTIME_BASE_ADDRESS to 0. See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
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#warning "configMTIME_BASE_ADDRESS must be defined in FreeRTOSConfig.h. If the target chip includes a memory-mapped mtime register then set configMTIME_BASE_ADDRESS to the mapped address. Otherwise set configMTIME_BASE_ADDRESS to 0. See www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html"
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#endif
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#ifndef configMTIMECMP_BASE_ADDRESS
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#warning configMTIMECMP_BASE_ADDRESS must be defined in FreeRTOSConfig.h. If the target chip includes a memory-mapped mtimecmp register then set configMTIMECMP_BASE_ADDRESS to the mapped address. Otherwise set configMTIMECMP_BASE_ADDRESS to 0. See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
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#warning "configMTIMECMP_BASE_ADDRESS must be defined in FreeRTOSConfig.h. If the target chip includes a memory-mapped mtimecmp register then set configMTIMECMP_BASE_ADDRESS to the mapped address. Otherwise set configMTIMECMP_BASE_ADDRESS to 0. See www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html"
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#endif
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/* Let the user override the pre-loading of the initial RA. */
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@ -65,12 +65,12 @@
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* stack that was used by main before the scheduler was started for use as the
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* interrupt stack after the scheduler has started. */
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#ifdef configISR_STACK_SIZE_WORDS
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static __attribute__ ((aligned(16))) StackType_t xISRStack[ configISR_STACK_SIZE_WORDS ] = { 0 };
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const StackType_t xISRStackTop = ( StackType_t ) &( xISRStack[ configISR_STACK_SIZE_WORDS & ~portBYTE_ALIGNMENT_MASK ] );
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static __attribute__( ( aligned( 16 ) ) ) StackType_t xISRStack[ configISR_STACK_SIZE_WORDS ] = { 0 };
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const StackType_t xISRStackTop = ( StackType_t ) &( xISRStack[ configISR_STACK_SIZE_WORDS & ~portBYTE_ALIGNMENT_MASK ] );
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/* Don't use 0xa5 as the stack fill bytes as that is used by the kernerl for
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the task stacks, and so will legitimately appear in many positions within
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the ISR stack. */
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/* Don't use 0xa5 as the stack fill bytes as that is used by the kernel for
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* the task stacks, and so will legitimately appear in many positions within
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* the ISR stack. */
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#define portISR_STACK_FILL_BYTE 0xee
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#else
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extern const uint32_t __freertos_irq_stack_top[];
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@ -82,13 +82,13 @@
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* file is weak to allow application writers to change the timer used to
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* generate the tick interrupt.
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*/
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void vPortSetupTimerInterrupt( void ) __attribute__(( weak ));
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void vPortSetupTimerInterrupt( void ) __attribute__( ( weak ) );
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/*-----------------------------------------------------------*/
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/* Used to program the machine timer compare register. */
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uint64_t ullNextTime = 0ULL;
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const uint64_t *pullNextTime = &ullNextTime;
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const uint64_t * pullNextTime = &ullNextTime;
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const size_t uxTimerIncrementsForOneTick = ( size_t ) ( ( configCPU_CLOCK_HZ ) / ( configTICK_RATE_HZ ) ); /* Assumes increment won't go over 32-bits. */
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uint32_t const ullMachineTimerCompareRegisterBase = configMTIMECMP_BASE_ADDRESS;
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volatile uint64_t * pullMachineTimerCompareRegister = NULL;
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@ -96,7 +96,7 @@ volatile uint64_t * pullMachineTimerCompareRegister = NULL;
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/* Holds the critical nesting value - deliberately non-zero at start up to
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* ensure interrupts are not accidentally enabled before the scheduler starts. */
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size_t xCriticalNesting = ( size_t ) 0xaaaaaaaa;
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size_t *pxCriticalNesting = &xCriticalNesting;
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size_t * pxCriticalNesting = &xCriticalNesting;
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/* Used to catch tasks that attempt to return from their implementing function. */
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size_t xTaskReturnAddress = ( size_t ) portTASK_RETURN_ADDRESS;
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@ -106,34 +106,37 @@ size_t xTaskReturnAddress = ( size_t ) portTASK_RETURN_ADDRESS;
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* the stack overflow hook function (because the stack overflow hook is specific
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* to a task stack, not the ISR stack). */
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#if defined( configISR_STACK_SIZE_WORDS ) && ( configCHECK_FOR_STACK_OVERFLOW > 2 )
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#warning This path not tested, or even compiled yet.
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#warning "This path not tested, or even compiled yet."
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static const uint8_t ucExpectedStackBytes[] = {
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portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE }; \
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static const uint8_t ucExpectedStackBytes[] =
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{
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portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE
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}; \
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#define portCHECK_ISR_STACK() configASSERT( ( memcmp( ( void * ) xISRStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) == 0 ) )
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#else
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#define portCHECK_ISR_STACK() configASSERT( ( memcmp( ( void * ) xISRStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) == 0 ) )
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#else /* if defined( configISR_STACK_SIZE_WORDS ) && ( configCHECK_FOR_STACK_OVERFLOW > 2 ) */
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/* Define the function away. */
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#define portCHECK_ISR_STACK()
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#endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */
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/*-----------------------------------------------------------*/
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#if( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIMECMP_BASE_ADDRESS != 0 )
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#if ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIMECMP_BASE_ADDRESS != 0 )
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void vPortSetupTimerInterrupt( void )
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{
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uint32_t ulCurrentTimeHigh, ulCurrentTimeLow;
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volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) ( ( configMTIME_BASE_ADDRESS ) + 4UL ); /* 8-byte type so high 32-bit word is 4 bytes up. */
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volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configMTIME_BASE_ADDRESS );
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volatile uint32_t ulHartId;
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uint32_t ulCurrentTimeHigh, ulCurrentTimeLow;
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volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) ( ( configMTIME_BASE_ADDRESS ) + 4UL ); /* 8-byte type so high 32-bit word is 4 bytes up. */
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volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configMTIME_BASE_ADDRESS );
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volatile uint32_t ulHartId;
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__asm volatile( "csrr %0, mhartid" : "=r"( ulHartId ) );
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pullMachineTimerCompareRegister = ( volatile uint64_t * ) ( ullMachineTimerCompareRegisterBase + ( ulHartId * sizeof( uint64_t ) ) );
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__asm volatile ( "csrr %0, mhartid" : "=r" ( ulHartId ) );
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pullMachineTimerCompareRegister = ( volatile uint64_t * ) ( ullMachineTimerCompareRegisterBase + ( ulHartId * sizeof( uint64_t ) ) );
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do
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{
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BaseType_t xPortStartScheduler( void )
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{
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extern void xPortStartFirstTask( void );
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extern void xPortStartFirstTask( void );
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#if( configASSERT_DEFINED == 1 )
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#if ( configASSERT_DEFINED == 1 )
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{
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/* Check alignment of the interrupt stack - which is the same as the
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* stack that was being used by main() prior to the scheduler being
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* configure whichever clock is to be used to generate the tick interrupt. */
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vPortSetupTimerInterrupt();
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#if( ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIMECMP_BASE_ADDRESS != 0 ) )
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#if ( ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIMECMP_BASE_ADDRESS != 0 ) )
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{
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/* Enable mtime and external interrupts. 1<<7 for timer interrupt,
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* 1<<11 for external interrupt. _RB_ What happens here when mtime is
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* not present as with pulpino? */
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__asm volatile( "csrs mie, %0" :: "r"(0x880) );
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__asm volatile ( "csrs mie, %0" ::"r" ( 0x880 ) );
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}
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#endif /* ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIMECMP_BASE_ADDRESS != 0 ) */
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@ -198,6 +201,8 @@ extern void xPortStartFirstTask( void );
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void vPortEndScheduler( void )
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{
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/* Not implemented. */
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for( ;; );
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for( ; ; )
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{
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}
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}
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/*-----------------------------------------------------------*/
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