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CI-CD Updates (#768)
* Use new version of CI-CD Actions * Use cSpell spell check, and use ubuntu-20.04 for formatting check * Format and spell check all files in the portable directory * Remove the https:// from #errors and #warnings as uncrustify attempts to change it to /* * Use checkout@v3 instead of checkout@v2 on all jobs ---------
This commit is contained in:
Soren Ptak
GitHub
parent
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commit
5fb9b50da8
485 changed files with 108790 additions and 107581 deletions
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@ -27,27 +27,27 @@
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*/
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/*
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Changes from V3.2.3
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+ Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1.
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Changes from V3.2.4
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+ Removed the use of the %0 parameter within the assembler macros and
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replaced them with hard coded registers. This will ensure the
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assembler does not select the link register as the temp register as
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was occasionally happening previously.
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+ The assembler statements are now included in a single asm block rather
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than each line having its own asm block.
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Changes from V4.5.0
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+ Removed the portENTER_SWITCHING_ISR() and portEXIT_SWITCHING_ISR() macros
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and replaced them with portYIELD_FROM_ISR() macro. Application code
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should now make use of the portSAVE_CONTEXT() and portRESTORE_CONTEXT()
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macros as per the V4.5.1 demo code.
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*/
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* Changes from V3.2.3
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*
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+ Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1.
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+
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+ Changes from V3.2.4
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+
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+ Removed the use of the %0 parameter within the assembler macros and
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+ replaced them with hard coded registers. This will ensure the
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+ assembler does not select the link register as the temp register as
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+ was occasionally happening previously.
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+
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+ The assembler statements are now included in a single asm block rather
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+ than each line having its own asm block.
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+
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+ Changes from V4.5.0
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+
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+ Removed the portENTER_SWITCHING_ISR() and portEXIT_SWITCHING_ISR() macros
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+ and replaced them with portYIELD_FROM_ISR() macro. Application code
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+ should now make use of the portSAVE_CONTEXT() and portRESTORE_CONTEXT()
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+ macros as per the V4.5.1 demo code.
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*/
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#ifndef PORTMACRO_H
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#define PORTMACRO_H
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@ -69,34 +69,34 @@
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*/
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/* Type definitions. */
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#define portCHAR char
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#define portFLOAT float
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT short
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#define portSTACK_TYPE uint32_t
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#define portBASE_TYPE portLONG
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#define portCHAR char
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#define portFLOAT float
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT short
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#define portSTACK_TYPE uint32_t
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#define portBASE_TYPE portLONG
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typedef portSTACK_TYPE StackType_t;
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typedef long BaseType_t;
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typedef unsigned long UBaseType_t;
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typedef portSTACK_TYPE StackType_t;
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typedef long BaseType_t;
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typedef unsigned long UBaseType_t;
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#if( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
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typedef uint16_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffff
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#if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
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typedef uint16_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffff
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#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
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typedef uint32_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) ( 0xFFFFFFFFUL )
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typedef uint32_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) ( 0xFFFFFFFFUL )
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#else
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#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
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#endif
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/*-----------------------------------------------------------*/
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/* Architecture specifics. */
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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#define portBYTE_ALIGNMENT 8
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#define portNOP() __asm volatile ( "NOP" );
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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#define portBYTE_ALIGNMENT 8
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#define portNOP() __asm volatile ( "NOP" );
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/*-----------------------------------------------------------*/
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@ -109,92 +109,92 @@ typedef unsigned long UBaseType_t;
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* THUMB mode code will result in a compile time error.
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*/
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#define portRESTORE_CONTEXT() \
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{ \
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extern volatile void * volatile pxCurrentTCB; \
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extern volatile uint32_t ulCriticalNesting; \
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\
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/* Set the LR to the task stack. */ \
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__asm volatile ( \
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"LDR R0, =pxCurrentTCB \n\t" \
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"LDR R0, [R0] \n\t" \
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"LDR LR, [R0] \n\t" \
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\
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/* The critical nesting depth is the first item on the stack. */ \
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/* Load it into the ulCriticalNesting variable. */ \
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"LDR R0, =ulCriticalNesting \n\t" \
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"LDMFD LR!, {R1} \n\t" \
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"STR R1, [R0] \n\t" \
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\
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/* Get the SPSR from the stack. */ \
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"LDMFD LR!, {R0} \n\t" \
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"MSR SPSR, R0 \n\t" \
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\
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/* Restore all system mode registers for the task. */ \
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"LDMFD LR, {R0-R14}^ \n\t" \
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"NOP \n\t" \
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\
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/* Restore the return address. */ \
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"LDR LR, [LR, #+60] \n\t" \
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\
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/* And return - correcting the offset in the LR to obtain the */ \
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/* correct address. */ \
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"SUBS PC, LR, #4 \n\t" \
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); \
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( void ) ulCriticalNesting; \
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( void ) pxCurrentTCB; \
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}
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#define portRESTORE_CONTEXT() \
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{ \
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extern volatile void * volatile pxCurrentTCB; \
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extern volatile uint32_t ulCriticalNesting; \
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\
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/* Set the LR to the task stack. */ \
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__asm volatile ( \
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"LDR R0, =pxCurrentTCB \n\t" \
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"LDR R0, [R0] \n\t" \
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"LDR LR, [R0] \n\t" \
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\
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/* The critical nesting depth is the first item on the stack. */ \
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/* Load it into the ulCriticalNesting variable. */ \
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"LDR R0, =ulCriticalNesting \n\t" \
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"LDMFD LR!, {R1} \n\t" \
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"STR R1, [R0] \n\t" \
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\
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/* Get the SPSR from the stack. */ \
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"LDMFD LR!, {R0} \n\t" \
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"MSR SPSR, R0 \n\t" \
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\
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/* Restore all system mode registers for the task. */ \
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"LDMFD LR, {R0-R14}^ \n\t" \
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"NOP \n\t" \
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\
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/* Restore the return address. */ \
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"LDR LR, [LR, #+60] \n\t" \
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\
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/* And return - correcting the offset in the LR to obtain the */ \
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/* correct address. */ \
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"SUBS PC, LR, #4 \n\t" \
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); \
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( void ) ulCriticalNesting; \
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( void ) pxCurrentTCB; \
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}
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/*-----------------------------------------------------------*/
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#define portSAVE_CONTEXT() \
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{ \
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extern volatile void * volatile pxCurrentTCB; \
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extern volatile uint32_t ulCriticalNesting; \
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\
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/* Push R0 as we are going to use the register. */ \
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__asm volatile ( \
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"STMDB SP!, {R0} \n\t" \
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\
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/* Set R0 to point to the task stack pointer. */ \
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"STMDB SP,{SP}^ \n\t" \
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"NOP \n\t" \
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"SUB SP, SP, #4 \n\t" \
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"LDMIA SP!,{R0} \n\t" \
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\
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/* Push the return address onto the stack. */ \
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"STMDB R0!, {LR} \n\t" \
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\
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/* Now we have saved LR we can use it instead of R0. */ \
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"MOV LR, R0 \n\t" \
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\
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/* Pop R0 so we can save it onto the system mode stack. */ \
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"LDMIA SP!, {R0} \n\t" \
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\
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/* Push all the system mode registers onto the task stack. */ \
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"STMDB LR,{R0-LR}^ \n\t" \
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"NOP \n\t" \
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"SUB LR, LR, #60 \n\t" \
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\
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/* Push the SPSR onto the task stack. */ \
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"MRS R0, SPSR \n\t" \
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"STMDB LR!, {R0} \n\t" \
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\
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"LDR R0, =ulCriticalNesting \n\t" \
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"LDR R0, [R0] \n\t" \
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"STMDB LR!, {R0} \n\t" \
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\
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/* Store the new top of stack for the task. */ \
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"LDR R0, =pxCurrentTCB \n\t" \
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"LDR R0, [R0] \n\t" \
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"STR LR, [R0] \n\t" \
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); \
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( void ) ulCriticalNesting; \
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( void ) pxCurrentTCB; \
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}
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#define portSAVE_CONTEXT() \
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{ \
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extern volatile void * volatile pxCurrentTCB; \
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extern volatile uint32_t ulCriticalNesting; \
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\
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/* Push R0 as we are going to use the register. */ \
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__asm volatile ( \
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"STMDB SP!, {R0} \n\t" \
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\
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/* Set R0 to point to the task stack pointer. */ \
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"STMDB SP,{SP}^ \n\t" \
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"NOP \n\t" \
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"SUB SP, SP, #4 \n\t" \
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"LDMIA SP!,{R0} \n\t" \
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\
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/* Push the return address onto the stack. */ \
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"STMDB R0!, {LR} \n\t" \
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\
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/* Now we have saved LR we can use it instead of R0. */ \
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"MOV LR, R0 \n\t" \
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\
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/* Pop R0 so we can save it onto the system mode stack. */ \
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"LDMIA SP!, {R0} \n\t" \
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\
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/* Push all the system mode registers onto the task stack. */ \
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"STMDB LR,{R0-LR}^ \n\t" \
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"NOP \n\t" \
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"SUB LR, LR, #60 \n\t" \
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\
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/* Push the SPSR onto the task stack. */ \
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"MRS R0, SPSR \n\t" \
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"STMDB LR!, {R0} \n\t" \
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\
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"LDR R0, =ulCriticalNesting \n\t" \
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"LDR R0, [R0] \n\t" \
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"STMDB LR!, {R0} \n\t" \
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\
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/* Store the new top of stack for the task. */ \
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"LDR R0, =pxCurrentTCB \n\t" \
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"LDR R0, [R0] \n\t" \
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"STR LR, [R0] \n\t" \
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); \
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( void ) ulCriticalNesting; \
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( void ) pxCurrentTCB; \
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}
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#define portYIELD_FROM_ISR() vTaskSwitchContext()
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#define portYIELD() __asm volatile ( "SWI 0" )
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#define portYIELD_FROM_ISR() vTaskSwitchContext()
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#define portYIELD() __asm volatile ( "SWI 0" )
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/*-----------------------------------------------------------*/
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@ -209,42 +209,42 @@ extern volatile uint32_t ulCriticalNesting; \
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#ifdef THUMB_INTERWORK
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extern void vPortDisableInterruptsFromThumb( void ) __attribute__ ((naked));
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extern void vPortEnableInterruptsFromThumb( void ) __attribute__ ((naked));
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extern void vPortDisableInterruptsFromThumb( void ) __attribute__( ( naked ) );
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extern void vPortEnableInterruptsFromThumb( void ) __attribute__( ( naked ) );
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#define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb()
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#define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb()
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#else
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#define portDISABLE_INTERRUPTS() \
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__asm volatile ( \
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"STMDB SP!, {R0} \n\t" /* Push R0. */ \
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"MRS R0, CPSR \n\t" /* Get CPSR. */ \
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"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ \
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"MSR CPSR, R0 \n\t" /* Write back modified value. */ \
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"LDMIA SP!, {R0} " ) /* Pop R0. */
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#define portDISABLE_INTERRUPTS() \
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__asm volatile ( \
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"STMDB SP!, {R0} \n\t" /* Push R0. */ \
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"MRS R0, CPSR \n\t" /* Get CPSR. */ \
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"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ \
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"MSR CPSR, R0 \n\t" /* Write back modified value. */ \
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"LDMIA SP!, {R0} " ) /* Pop R0. */
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#define portENABLE_INTERRUPTS() \
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__asm volatile ( \
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"STMDB SP!, {R0} \n\t" /* Push R0. */ \
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"MRS R0, CPSR \n\t" /* Get CPSR. */ \
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"BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */ \
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"MSR CPSR, R0 \n\t" /* Write back modified value. */ \
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"LDMIA SP!, {R0} " ) /* Pop R0. */
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#define portENABLE_INTERRUPTS() \
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__asm volatile ( \
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"STMDB SP!, {R0} \n\t" /* Push R0. */ \
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"MRS R0, CPSR \n\t" /* Get CPSR. */ \
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"BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */ \
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"MSR CPSR, R0 \n\t" /* Write back modified value. */ \
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"LDMIA SP!, {R0} " ) /* Pop R0. */
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#endif /* THUMB_INTERWORK */
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extern void vPortEnterCritical( void );
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extern void vPortExitCritical( void );
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#define portENTER_CRITICAL() vPortEnterCritical();
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#define portEXIT_CRITICAL() vPortExitCritical();
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#define portENTER_CRITICAL() vPortEnterCritical();
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#define portEXIT_CRITICAL() vPortExitCritical();
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/*-----------------------------------------------------------*/
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/* Task function macros as described on the FreeRTOS.org WEB site. */
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
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/* *INDENT-OFF* */
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#ifdef __cplusplus
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