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CI-CD Updates (#768)
* Use new version of CI-CD Actions * Use cSpell spell check, and use ubuntu-20.04 for formatting check * Format and spell check all files in the portable directory * Remove the https:// from #errors and #warnings as uncrustify attempts to change it to /* * Use checkout@v3 instead of checkout@v2 on all jobs ---------
This commit is contained in:
Soren Ptak
GitHub
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485 changed files with 108790 additions and 107581 deletions
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@ -28,12 +28,12 @@
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the ARM7 port.
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*
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* Components that can be compiled to either ARM or THUMB mode are
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* contained in this file. The ISR routines, which can only be compiled
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* to ARM mode are contained in portISR.c.
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*----------------------------------------------------------*/
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* Implementation of functions defined in portable.h for the ARM7 port.
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*
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* Components that can be compiled to either ARM or THUMB mode are
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* contained in this file. The ISR routines, which can only be compiled
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* to ARM mode are contained in portISR.c.
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*----------------------------------------------------------*/
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/* Standard includes. */
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@ -44,21 +44,21 @@
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#include "task.h"
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/* Constants required to setup the task context. */
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#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
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#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
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#define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 )
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#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
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#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
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#define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 )
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/* Constants required to setup the tick ISR. */
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#define portENABLE_TIMER ( ( uint8_t ) 0x01 )
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#define portPRESCALE_VALUE 0x00
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#define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )
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#define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )
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#define portENABLE_TIMER ( ( uint8_t ) 0x01 )
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#define portPRESCALE_VALUE 0x00
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#define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )
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#define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )
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/* Constants required to setup the VIC for the tick ISR. */
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#define portTIMER_VIC_CHANNEL ( ( uint32_t ) 0x0004 )
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#define portTIMER_VIC_CHANNEL_BIT ( ( uint32_t ) 0x0010 )
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#define portTIMER_VIC_ENABLE ( ( uint32_t ) 0x0020 )
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#define portTIMER_VIC_CHANNEL ( ( uint32_t ) 0x0004 )
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#define portTIMER_VIC_CHANNEL_BIT ( ( uint32_t ) 0x0010 )
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#define portTIMER_VIC_ENABLE ( ( uint32_t ) 0x0020 )
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/*-----------------------------------------------------------*/
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@ -79,61 +79,63 @@ extern void vPortISRStartFirstTask( void );
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*
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* See header file for description.
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*/
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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TaskFunction_t pxCode,
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void * pvParameters )
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{
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StackType_t *pxOriginalTOS;
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StackType_t * pxOriginalTOS;
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pxOriginalTOS = pxTopOfStack;
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/* To ensure asserts in tasks.c don't fail, although in this case the assert
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is not really required. */
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* is not really required. */
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pxTopOfStack--;
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/* Setup the initial stack of the task. The stack is set exactly as
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expected by the portRESTORE_CONTEXT() macro. */
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* expected by the portRESTORE_CONTEXT() macro. */
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/* First on the stack is the return address - which in this case is the
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start of the task. The offset is added to make the return address appear
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as it would within an IRQ ISR. */
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* start of the task. The offset is added to make the return address appear
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* as it would within an IRQ ISR. */
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*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x00000000; /* R14 */
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*pxTopOfStack = ( StackType_t ) 0x00000000; /* R14 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
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*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
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*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
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*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
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*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
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*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
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*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
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*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
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*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
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*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
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*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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pxTopOfStack--;
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/* When the task starts is will expect to find the function parameter in
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R0. */
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* R0. */
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*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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pxTopOfStack--;
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/* The last thing onto the stack is the status register, which is set for
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system mode, with interrupts enabled. */
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* system mode, with interrupts enabled. */
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*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
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if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00 )
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@ -145,9 +147,9 @@ StackType_t *pxOriginalTOS;
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pxTopOfStack--;
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/* Some optimisation levels use the stack differently to others. This
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means the interrupt flags cannot always be stored on the stack and will
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instead be stored in a variable, which is then saved as part of the
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tasks context. */
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* means the interrupt flags cannot always be stored on the stack and will
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* instead be stored in a variable, which is then saved as part of the
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* tasks context. */
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*pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
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return pxTopOfStack;
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@ -157,7 +159,7 @@ StackType_t *pxOriginalTOS;
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BaseType_t xPortStartScheduler( void )
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{
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/* Start the timer that generates the tick ISR. Interrupts are disabled
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here already. */
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* here already. */
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prvSetupTimerInterrupt();
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/* Start the first task. */
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@ -171,7 +173,7 @@ BaseType_t xPortStartScheduler( void )
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void vPortEndScheduler( void )
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{
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/* It is unlikely that the ARM port will require this function as there
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is nothing to return to. */
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* is nothing to return to. */
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}
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/*-----------------------------------------------------------*/
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@ -180,21 +182,21 @@ void vPortEndScheduler( void )
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*/
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static void prvSetupTimerInterrupt( void )
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{
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uint32_t ulCompareMatch;
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uint32_t ulCompareMatch;
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PCLKSEL0 = (PCLKSEL0 & (~(0x3<<2))) | (0x01 << 2);
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T0TCR = 2; /* Stop and reset the timer */
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T0CTCR = 0; /* Timer mode */
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PCLKSEL0 = ( PCLKSEL0 & ( ~( 0x3 << 2 ) ) ) | ( 0x01 << 2 );
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T0TCR = 2; /* Stop and reset the timer */
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T0CTCR = 0; /* Timer mode */
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/* A 1ms tick does not require the use of the timer prescale. This is
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defaulted to zero but can be used if necessary. */
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* defaulted to zero but can be used if necessary. */
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T0PR = portPRESCALE_VALUE;
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/* Calculate the match value required for our wanted tick rate. */
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ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
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/* Protect against divide by zero. Using an if() statement still results
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in a warning - hence the #if. */
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* in a warning - hence the #if. */
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#if portPRESCALE_VALUE != 0
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{
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ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
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@ -203,21 +205,21 @@ uint32_t ulCompareMatch;
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T0MR1 = ulCompareMatch;
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/* Generate tick with timer 0 compare match. */
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T0MCR = (3 << 3); /* Reset timer on match and generate interrupt */
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T0MCR = ( 3 << 3 ); /* Reset timer on match and generate interrupt */
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/* Setup the VIC for the timer. */
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VICIntEnable = 0x00000010;
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/* The ISR installed depends on whether the preemptive or cooperative
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scheduler is being used. */
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* scheduler is being used. */
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#if configUSE_PREEMPTION == 1
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{
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extern void ( vPreemptiveTick )( void );
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extern void( vPreemptiveTick )( void );
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VICVectAddr4 = ( int32_t ) vPreemptiveTick;
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}
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#else
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{
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extern void ( vNonPreemptiveTick )( void );
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extern void( vNonPreemptiveTick )( void );
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VICVectAddr4 = ( int32_t ) vNonPreemptiveTick;
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}
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#endif
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VICVectCntl4 = 1;
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/* Start the timer - interrupts are disabled when this function is called
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so it is okay to do this here. */
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* so it is okay to do this here. */
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T0TCR = portENABLE_TIMER;
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}
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/*-----------------------------------------------------------*/
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