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CI-CD Updates (#768)
* Use new version of CI-CD Actions * Use cSpell spell check, and use ubuntu-20.04 for formatting check * Format and spell check all files in the portable directory * Remove the https:// from #errors and #warnings as uncrustify attempts to change it to /* * Use checkout@v3 instead of checkout@v2 on all jobs ---------
This commit is contained in:
Soren Ptak
GitHub
parent
d6bccb1f4c
commit
5fb9b50da8
485 changed files with 108790 additions and 107581 deletions
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@ -38,27 +38,27 @@ uint32_t ulCriticalNesting = 9999;
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/*-----------------------------------------------------------*/
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/* Registers required to configure the RTI. */
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#define portRTI_GCTRL_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC00 ) )
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#define portRTI_TBCTRL_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC04 ) )
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#define portRTI_COMPCTRL_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC0C ) )
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#define portRTI_CNT0_FRC0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC10 ) )
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#define portRTI_CNT0_UC0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC14 ) )
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#define portRTI_CNT0_CPUC0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC18 ) )
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#define portRTI_CNT0_COMP0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC50 ) )
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#define portRTI_CNT0_UDCP0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC54 ) )
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#define portRTI_SETINTENA_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC80 ) )
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#define portRTI_CLEARINTENA_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC84 ) )
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#define portRTI_INTFLAG_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC88 ) )
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#define portRTI_GCTRL_REG ( *( ( volatile uint32_t * ) 0xFFFFFC00 ) )
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#define portRTI_TBCTRL_REG ( *( ( volatile uint32_t * ) 0xFFFFFC04 ) )
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#define portRTI_COMPCTRL_REG ( *( ( volatile uint32_t * ) 0xFFFFFC0C ) )
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#define portRTI_CNT0_FRC0_REG ( *( ( volatile uint32_t * ) 0xFFFFFC10 ) )
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#define portRTI_CNT0_UC0_REG ( *( ( volatile uint32_t * ) 0xFFFFFC14 ) )
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#define portRTI_CNT0_CPUC0_REG ( *( ( volatile uint32_t * ) 0xFFFFFC18 ) )
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#define portRTI_CNT0_COMP0_REG ( *( ( volatile uint32_t * ) 0xFFFFFC50 ) )
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#define portRTI_CNT0_UDCP0_REG ( *( ( volatile uint32_t * ) 0xFFFFFC54 ) )
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#define portRTI_SETINTENA_REG ( *( ( volatile uint32_t * ) 0xFFFFFC80 ) )
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#define portRTI_CLEARINTENA_REG ( *( ( volatile uint32_t * ) 0xFFFFFC84 ) )
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#define portRTI_INTFLAG_REG ( *( ( volatile uint32_t * ) 0xFFFFFC88 ) )
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/* Constants required to set up the initial stack of each task. */
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#define portINITIAL_SPSR ( ( StackType_t ) 0x1F )
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#define portINITIAL_FPSCR ( ( StackType_t ) 0x00 )
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#define portINSTRUCTION_SIZE ( ( StackType_t ) 0x04 )
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#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
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#define portINITIAL_SPSR ( ( StackType_t ) 0x1F )
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#define portINITIAL_FPSCR ( ( StackType_t ) 0x00 )
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#define portINSTRUCTION_SIZE ( ( StackType_t ) 0x04 )
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#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
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/* The number of words on the stack frame between the saved Top Of Stack and
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R0 (in which the parameters are passed. */
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* R0 (in which the parameters are passed. */
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#define portSPACE_BETWEEN_TOS_AND_PARAMETERS ( 12 )
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/*-----------------------------------------------------------*/
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@ -69,7 +69,7 @@ extern void vPortStartFirstTask( void );
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/*-----------------------------------------------------------*/
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/* Saved as part of the task context. Set to pdFALSE if the task does not
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require an FPU context. */
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* require an FPU context. */
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uint32_t ulTaskHasFPUContext = 0;
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/*-----------------------------------------------------------*/
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@ -78,9 +78,11 @@ uint32_t ulTaskHasFPUContext = 0;
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/*
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* See header file for description.
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*/
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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TaskFunction_t pxCode,
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void * pvParameters )
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{
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StackType_t *pxOriginalTOS;
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StackType_t * pxOriginalTOS;
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pxOriginalTOS = pxTopOfStack;
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@ -92,15 +94,15 @@ StackType_t *pxOriginalTOS;
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#endif
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/* Setup the initial stack of the task. The stack is set exactly as
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expected by the portRESTORE_CONTEXT() macro. */
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* expected by the portRESTORE_CONTEXT() macro. */
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/* First on the stack is the return address - which is the start of the as
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the task has not executed yet. The offset is added to make the return
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address appear as it would within an IRQ ISR. */
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* the task has not executed yet. The offset is added to make the return
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* address appear as it would within an IRQ ISR. */
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*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x00000000; /* R14 */
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*pxTopOfStack = ( StackType_t ) 0x00000000; /* R14 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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pxTopOfStack--;
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@ -132,11 +134,11 @@ StackType_t *pxOriginalTOS;
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*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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pxTopOfStack--;
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}
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#else
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#else /* ifdef portPRELOAD_TASK_REGISTERS */
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{
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pxTopOfStack -= portSPACE_BETWEEN_TOS_AND_PARAMETERS;
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}
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#endif
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#endif /* ifdef portPRELOAD_TASK_REGISTERS */
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/* Function parameters are passed in R0. */
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*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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@ -156,8 +158,8 @@ StackType_t *pxOriginalTOS;
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pxTopOfStack--;
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/* The last thing on the stack is the tasks ulUsingFPU value, which by
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default is set to indicate that the stack frame does not include FPU
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registers. */
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* default is set to indicate that the stack frame does not include FPU
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* registers. */
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*pxTopOfStack = pdFALSE;
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}
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#endif
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@ -166,7 +168,7 @@ StackType_t *pxOriginalTOS;
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}
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/*-----------------------------------------------------------*/
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static void prvSetupTimerInterrupt(void)
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static void prvSetupTimerInterrupt( void )
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{
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/* Disable timer 0. */
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portRTI_GCTRL_REG &= 0xFFFFFFFEUL;
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@ -178,8 +180,8 @@ static void prvSetupTimerInterrupt(void)
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portRTI_COMPCTRL_REG = 0x00000000U;
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/* Initialise the counter and the prescale counter registers. */
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portRTI_CNT0_UC0_REG = 0x00000000U;
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portRTI_CNT0_FRC0_REG = 0x00000000U;
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portRTI_CNT0_UC0_REG = 0x00000000U;
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portRTI_CNT0_FRC0_REG = 0x00000000U;
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/* Set Prescalar for RTI clock. */
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portRTI_CNT0_CPUC0_REG = 0x00000001U;
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@ -187,7 +189,7 @@ static void prvSetupTimerInterrupt(void)
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portRTI_CNT0_UDCP0_REG = ( configCPU_CLOCK_HZ / 2 ) / configTICK_RATE_HZ;
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/* Clear interrupts. */
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portRTI_INTFLAG_REG = 0x0007000FU;
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portRTI_INTFLAG_REG = 0x0007000FU;
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portRTI_CLEARINTENA_REG = 0x00070F0FU;
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/* Enable the compare 0 interrupt. */
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@ -199,7 +201,7 @@ static void prvSetupTimerInterrupt(void)
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/*
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* See header file for description.
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*/
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BaseType_t xPortStartScheduler(void)
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BaseType_t xPortStartScheduler( void )
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{
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/* Start the timer that generates the tick ISR. */
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prvSetupTimerInterrupt();
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@ -208,7 +210,7 @@ BaseType_t xPortStartScheduler(void)
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ulCriticalNesting = 0;
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/* Start the first task. This is done from portASM.asm as ARM mode must be
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used. */
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* used. */
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vPortStartFirstTask();
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/* Should not get here! */
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@ -219,40 +221,40 @@ BaseType_t xPortStartScheduler(void)
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/*
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* See header file for description.
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*/
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void vPortEndScheduler(void)
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void vPortEndScheduler( void )
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{
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/* Not implemented in ports where there is nothing to return to.
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Artificially force an assert. */
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* Artificially force an assert. */
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configASSERT( ulCriticalNesting == 1000UL );
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}
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/*-----------------------------------------------------------*/
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#if configUSE_PREEMPTION == 0
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/* The cooperative scheduler requires a normal IRQ service routine to
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* simply increment the system tick. */
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/* The cooperative scheduler requires a normal IRQ service routine to
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* simply increment the system tick. */
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__interrupt void vPortNonPreemptiveTick( void )
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{
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/* clear clock interrupt flag */
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portRTI_INTFLAG_REG = 0x00000001;
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/* Increment the tick count - this may make a delaying task ready
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to run - but a context switch is not performed. */
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* to run - but a context switch is not performed. */
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xTaskIncrementTick();
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}
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#else
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#else /* if configUSE_PREEMPTION == 0 */
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/*
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**************************************************************************
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* The preemptive scheduler ISR is written in assembler and can be found
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* in the portASM.asm file. This will only get used if portUSE_PREEMPTION
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* is set to 1 in portmacro.h
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**************************************************************************
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*/
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/*
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**************************************************************************
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* The preemptive scheduler ISR is written in assembler and can be found
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* in the portASM.asm file. This will only get used if portUSE_PREEMPTION
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* is set to 1 in portmacro.h
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**************************************************************************
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*/
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void vPortPreemptiveTick( void );
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#endif
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#endif /* if configUSE_PREEMPTION == 0 */
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/*-----------------------------------------------------------*/
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@ -264,9 +266,9 @@ void vPortEnterCritical( void )
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/* Disable interrupts as per portDISABLE_INTERRUPTS(); */
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portDISABLE_INTERRUPTS();
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/* Now interrupts are disabled ulCriticalNesting can be accessed
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directly. Increment ulCriticalNesting to keep a count of how many times
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portENTER_CRITICAL() has been called. */
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/* Now that interrupts are disabled, ulCriticalNesting can be accessed
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* directly. Increment ulCriticalNesting to keep a count of how many times
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* portENTER_CRITICAL() has been called. */
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ulCriticalNesting++;
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}
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/*-----------------------------------------------------------*/
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@ -283,7 +285,7 @@ void vPortExitCritical( void )
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ulCriticalNesting--;
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/* If the nesting level has reached zero then interrupts should be
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re-enabled. */
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* re-enabled. */
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if( ulCriticalNesting == 0 )
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{
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/* Enable interrupts as per portENABLE_INTERRUPTS(). */
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@ -297,10 +299,10 @@ void vPortExitCritical( void )
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void vPortTaskUsesFPU( void )
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{
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extern void vPortInitialiseFPSCR( void );
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extern void vPortInitialiseFPSCR( void );
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/* A task is registering the fact that it needs an FPU context. Set the
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FPU flag (saved as part of the task context. */
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* FPU flag (saved as part of the task context. */
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ulTaskHasFPUContext = pdTRUE;
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/* Initialise the floating point status register. */
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@ -40,80 +40,80 @@
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*/
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/* Type definitions. */
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#define portCHAR char
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#define portFLOAT float
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT short
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#define portSTACK_TYPE uint32_t
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#define portBASE_TYPE long
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#define portCHAR char
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#define portFLOAT float
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT short
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#define portSTACK_TYPE uint32_t
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#define portBASE_TYPE long
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typedef portSTACK_TYPE StackType_t;
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typedef long BaseType_t;
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typedef unsigned long UBaseType_t;
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typedef portSTACK_TYPE StackType_t;
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typedef long BaseType_t;
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typedef unsigned long UBaseType_t;
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#if (configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS)
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typedef uint16_t TickType_t;
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#define portMAX_DELAY (TickType_t) 0xFFFF
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#if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
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typedef uint16_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xFFFF
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#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
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typedef uint32_t TickType_t;
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#define portMAX_DELAY (TickType_t) 0xFFFFFFFFF
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typedef uint32_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xFFFFFFFFF
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/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
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not need to be guarded with a critical section. */
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#define portTICK_TYPE_IS_ATOMIC 1
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/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
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* not need to be guarded with a critical section. */
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#define portTICK_TYPE_IS_ATOMIC 1
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#else
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#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
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#endif
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/* Architecture specifics. */
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#define portSTACK_GROWTH (-1)
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#define portTICK_PERIOD_MS ((TickType_t) 1000 / configTICK_RATE_HZ)
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#define portBYTE_ALIGNMENT 8
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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#define portBYTE_ALIGNMENT 8
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/* Critical section handling. */
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extern void vPortEnterCritical(void);
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extern void vPortExitCritical(void);
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extern void vPortEnterCritical( void );
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extern void vPortExitCritical( void );
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#define portENTER_CRITICAL() vPortEnterCritical()
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#define portEXIT_CRITICAL() vPortExitCritical()
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#define portDISABLE_INTERRUPTS() asm( " CPSID I" )
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#define portENABLE_INTERRUPTS() asm( " CPSIE I" )
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#define portDISABLE_INTERRUPTS() asm ( " CPSID I" )
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#define portENABLE_INTERRUPTS() asm ( " CPSIE I" )
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/* Scheduler utilities. */
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#pragma SWI_ALIAS( vPortYield, 0 )
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extern void vPortYield( void );
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#define portYIELD() vPortYield()
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#define portSYS_SSIR1_REG ( * ( ( volatile uint32_t * ) 0xFFFFFFB0 ) )
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#define portSYS_SSIR1_SSKEY ( 0x7500UL )
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#define portYIELD_WITHIN_API() { portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY; asm( " DSB " ); asm( " ISB " ); }
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#define portYIELD_FROM_ISR( x ) do { if( x != pdFALSE ) { portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY; ( void ) portSYS_SSIR1_REG; } } while( 0 )
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#define portYIELD() vPortYield()
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#define portSYS_SSIR1_REG ( *( ( volatile uint32_t * ) 0xFFFFFFB0 ) )
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#define portSYS_SSIR1_SSKEY ( 0x7500UL )
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#define portYIELD_WITHIN_API() { portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY; asm ( " DSB " ); asm ( " ISB " ); }
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#define portYIELD_FROM_ISR( x ) do { if( x != pdFALSE ) { portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY; ( void ) portSYS_SSIR1_REG; } } while( 0 )
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#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
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#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
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#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
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#endif
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/* Architecture specific optimisations. */
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#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
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/* Check the configuration. */
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#if( configMAX_PRIORITIES > 32 )
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/* Check the configuration. */
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#if ( configMAX_PRIORITIES > 32 )
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#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
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#endif
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/* Store/clear the ready priorities in a bit map. */
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#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
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#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
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/* Store/clear the ready priorities in a bit map. */
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#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
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#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) )
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#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) )
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#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
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/* Task function macros as described on the FreeRTOS.org WEB site. */
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#define portTASK_FUNCTION(vFunction, pvParameters) void vFunction(void *pvParameters)
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#define portTASK_FUNCTION_PROTO(vFunction, pvParameters) void vFunction(void *pvParameters)
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
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#endif /* __PORTMACRO_H__ */
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