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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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Update the IAR RX62N port files, which are now functional.
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a418d78163
commit
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3 changed files with 84 additions and 86 deletions
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@ -69,8 +69,8 @@
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/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
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PSW is set with U and I set, and PM and IPL clear. */
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#define portINITIAL_PSW ( ( portSTACK_TYPE ) 0x00030000 )
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#define portINITIAL_FPSW ( ( portSTACK_TYPE ) 0x00000100 )
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#define portINITIAL_PSW ( ( portSTACK_TYPE ) 0x00030000 )
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#define portINITIAL_FPSW ( ( portSTACK_TYPE ) 0x00000100 )
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/*-----------------------------------------------------------*/
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@ -188,7 +188,7 @@ extern void vApplicationSetupTimerInterrupt( void );
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}
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/*-----------------------------------------------------------*/
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#pragma vector = VECT_CMT0_CMI0
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#pragma vector = configTICK_VECTOR
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__interrupt void vTickISR( void )
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{
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/* Re-enable interrupts. */
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@ -52,134 +52,132 @@
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*/
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PUBLIC _prvStartFirstTask
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PUBLIC _vSoftwareInterruptISR
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PUBLIC ___interrupt_27
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EXTERN _pxCurrentTCB
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EXTERN _vTaskSwitchContext
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RSEG CODE:CODE(4)
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_prvStartFirstTask:
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/* When starting the scheduler there is nothing that needs moving to the
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interrupt stack because the function is not called from an interrupt.
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Just ensure the current stack is the user stack. */
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SETPSW U
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SETPSW U
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/* Obtain the location of the stack associated with which ever task
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pxCurrentTCB is currently pointing to. */
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MOV.L #_pxCurrentTCB, R15
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MOV.L [R15], R15
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MOV.L [R15], R0
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MOV.L #_pxCurrentTCB, R15
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MOV.L [R15], R15
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MOV.L [R15], R0
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/* Restore the registers from the stack of the task pointed to by
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pxCurrentTCB. */
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POP R15
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POP R15
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/* Accumulator low 32 bits. */
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MVTACLO R15
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POP R15
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MVTACLO R15
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POP R15
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/* Accumulator high 32 bits. */
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MVTACHI R15
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POP R15
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MVTACHI R15
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POP R15
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/* Floating point status word. */
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MVTC R15, FPSW
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MVTC R15, FPSW
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/* R1 to R15 - R0 is not included as it is the SP. */
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POPM R1-R15
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POPM R1-R15
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/* This pops the remaining registers. */
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RTE
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NOP
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NOP
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RTE
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NOP
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NOP
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/*-----------------------------------------------------------*/
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_vSoftwareInterruptISR:
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/* The software interrupt - overwrite the default 'weak' definition. */
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___interrupt_27:
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/* Re-enable interrupts. */
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SETPSW I
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/* Move the data that was automatically pushed onto the interrupt stack when
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the interrupt occurred from the interrupt stack to the user stack.
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R15 is saved before it is clobbered. */
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PUSH.L R15
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PUSH.L R15
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/* Read the user stack pointer. */
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MVFC USP, R15
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MVFC USP, R15
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/* Move the address down to the data being moved. */
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SUB #12, R15
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MVTC R15, USP
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SUB #12, R15
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MVTC R15, USP
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/* Copy the data across, R15, then PC, then PSW. */
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MOV.L [ R0 ], [ R15 ]
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MOV.L 4[ R0 ], 4[ R15 ]
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MOV.L 8[ R0 ], 8[ R15 ]
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MOV.L [ R0 ], [ R15 ]
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MOV.L 4[ R0 ], 4[ R15 ]
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MOV.L 8[ R0 ], 8[ R15 ]
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/* Move the interrupt stack pointer to its new correct position. */
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ADD #12, R0
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ADD #12, R0
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/* All the rest of the registers are saved directly to the user stack. */
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SETPSW U
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SETPSW U
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/* Save the rest of the general registers (R15 has been saved already). */
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PUSHM R1-R14
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PUSHM R1-R14
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/* Save the FPSW and accumulator. */
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MVFC FPSW, R15
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PUSH.L R15
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MVFACHI R15
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PUSH.L R15
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MVFC FPSW, R15
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PUSH.L R15
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MVFACHI R15
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PUSH.L R15
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/* Middle word. */
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MVFACMI R15
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MVFACMI R15
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/* Shifted left as it is restored to the low order word. */
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SHLL #16, R15
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PUSH.L R15
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SHLL #16, R15
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PUSH.L R15
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/* Save the stack pointer to the TCB. */
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MOV.L #_pxCurrentTCB, R15
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MOV.L [ R15 ], R15
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MOV.L R0, [ R15 ]
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MOV.L #_pxCurrentTCB, R15
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MOV.L [ R15 ], R15
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MOV.L R0, [ R15 ]
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/* Ensure the interrupt mask is set to the syscall priority while the kernel
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structures are being accessed. */
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MVTIPL #4
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MVTIPL #4
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/* Select the next task to run. */
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BSR.A _vTaskSwitchContext
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BSR.A _vTaskSwitchContext
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/* Reset the interrupt mask as no more data structure access is required. */
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MVTIPL #1
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MVTIPL #1
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/* Load the stack pointer of the task that is now selected as the Running
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state task from its TCB. */
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MOV.L #_pxCurrentTCB,R15
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MOV.L [ R15 ], R15
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MOV.L [ R15 ], R0
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MOV.L #_pxCurrentTCB,R15
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MOV.L [ R15 ], R15
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MOV.L [ R15 ], R0
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/* Restore the context of the new task. The PSW (Program Status Word) and
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PC will be popped by the RTE instruction. */
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POP R15
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MVTACLO R15
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POP R15
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MVTACHI R15
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POP R15
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MVTC R15, FPSW
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POPM R1-R15
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RTE
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NOP
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NOP
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/*:: i(configMAX_SYSCALL_INTERRUPT_PRIORITY), i(configKERNEL_INTERRUPT_PRIORITY)*/
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POP R15
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MVTACLO R15
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POP R15
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MVTACHI R15
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POP R15
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MVTC R15, FPSW
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POPM R1-R15
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RTE
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NOP
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NOP
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/*-----------------------------------------------------------*/
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END
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