Before changing headers to V6 and changing portLONG, portSHORt and portCHAR to their standard C types.

This commit is contained in:
Richard Barry 2009-10-05 08:33:08 +00:00
parent 3dfbb349ca
commit 5c64e1fad9
4417 changed files with 1261274 additions and 0 deletions

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/*
FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation and modified by the FreeRTOS exception.
**NOTE** The exception to the GPL is included to allow you to distribute a
combined work that includes FreeRTOS without being obliged to provide the
source code for proprietary components outside of the FreeRTOS kernel.
Alternative commercial license and support terms are also available upon
request. See the licensing section of http://www.FreeRTOS.org for full
license details.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details.
You should have received a copy of the GNU General Public License along
with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
Temple Place, Suite 330, Boston, MA 02111-1307 USA.
***************************************************************************
* *
* Looking for a quick start? Then check out the FreeRTOS eBook! *
* See http://www.FreeRTOS.org/Documentation for details *
* *
***************************************************************************
1 tab == 4 spaces!
Please ensure to read the configuration and relevant port sections of the
online documentation.
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/* CodeWarrior often thinks it knows better than you which files you want to
build - and changes the port.c and portasm.S files included in the project from
the ColdFire V1 versions to the x86 versions. If you get lots of errors output
when either file is compiled then delete the files from the project and then
add back in the port.c and portasm.S files that are located in the
FreeRTOS\Source\portable\GCC\ColdFire_V2 directory. Remove the line below
before compiling. */
#error Read the comment above this line, then delete this error statement!
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
#include "support_common.h"
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
#define configUSE_PREEMPTION 1
#define configUSE_IDLE_HOOK 1
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( ( unsigned portLONG ) 80000000 )
#define configTICK_RATE_HZ ( ( portTickType ) 100 )
#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 100 )
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 15000 ) )
#define configMAX_TASK_NAME_LEN ( 12 )
#define configUSE_TRACE_FACILITY 1
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 0
#define configUSE_CO_ROUTINES 1
#define configUSE_MUTEXES 1
#define configCHECK_FOR_STACK_OVERFLOW 2
#define configUSE_RECURSIVE_MUTEXES 1
#define configQUEUE_REGISTRY_SIZE 0
#define configUSE_COUNTING_SEMAPHORES 0
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 6 )
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_uxTaskGetStackHighWaterMark 1
#define configYIELD_INTERRUPT_VECTOR 16UL
#define configKERNEL_INTERRUPT_PRIORITY 1
#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4
void vApplicationSetupInterrupts( void );
/* Ethernet configuration. */
#define configMAC_0 0x00
#define configMAC_1 0x04
#define configMAC_2 0x9F
#define configMAC_3 0x00
#define configMAC_4 0xAB
#define configMAC_5 0x2B
#define configIP_ADDR0 192
#define configIP_ADDR1 168
#define configIP_ADDR2 0
#define configIP_ADDR3 11
#define configGW_ADDR0 172
#define configGW_ADDR1 25
#define configGW_ADDR2 218
#define configGW_ADDR3 3
#define configNET_MASK0 255
#define configNET_MASK1 255
#define configNET_MASK2 255
#define configNET_MASK3 0
#define configNUM_FEC_TX_BUFFERS 2
#define configNUM_FEC_RX_BUFFERS 4
#define configFEC_BUFFER_SIZE 1520
#define configUSE_PROMISCUOUS_MODE 0
#define configETHERNET_INPUT_TASK_STACK_SIZE ( 320 )
#define configETHERNET_INPUT_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
#define configPHY_ADDRESS 1
#if ( configFEC_BUFFER_SIZE & 0x0F ) != 0
#error configFEC_BUFFER_SIZE must be a multiple of 16.
#endif
#endif /* FREERTOS_CONFIG_H */

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/*
FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation and modified by the FreeRTOS exception.
**NOTE** The exception to the GPL is included to allow you to distribute a
combined work that includes FreeRTOS without being obliged to provide the
source code for proprietary components outside of the FreeRTOS kernel.
Alternative commercial license and support terms are also available upon
request. See the licensing section of http://www.FreeRTOS.org for full
license details.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details.
You should have received a copy of the GNU General Public License along
with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
Temple Place, Suite 330, Boston, MA 02111-1307 USA.
***************************************************************************
* *
* Looking for a quick start? Then check out the FreeRTOS eBook! *
* See http://www.FreeRTOS.org/Documentation for details *
* *
***************************************************************************
1 tab == 4 spaces!
Please ensure to read the configuration and relevant port sections of the
online documentation.
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
#include "FreeRTOS.h"
#include "task.h"
__declspec(interrupt:0) void vPIT0InterruptHandler( void );
/* Constants used to configure the interrupts. */
#define portPRESCALE_VALUE 64
#define portPRESCALE_REG_SETTING ( 5 << 8 )
#define portPIT_INTERRUPT_ENABLED ( 0x08 )
#define configPIT0_INTERRUPT_VECTOR ( 55 )
/*
* FreeRTOS.org requires two interrupts - a tick interrupt generated from a
* timer source, and a spare interrupt vector used for context switching.
* The configuration below uses PIT0 for the former, and vector 16 for the
* latter. **IF YOUR APPLICATION HAS BOTH OF THESE INTERRUPTS FREE THEN YOU DO
* NOT NEED TO CHANGE ANY OF THIS CODE** - otherwise instructions are provided
* here for using alternative interrupt sources.
*
* To change the tick interrupt source:
*
* 1) Modify vApplicationSetupInterrupts() below to be correct for whichever
* peripheral is to be used to generate the tick interrupt.
*
* 2) Change the name of the function __cs3_isr_interrupt_119() defined within
* this file to be correct for the interrupt vector used by the timer peripheral.
* The name of the function should contain the vector number, so by default vector
* number 119 is being used.
*
* 3) Make sure the tick interrupt is cleared within the interrupt handler function.
* Currently __cs3_isr_interrupt_119() clears the PIT0 interrupt.
*
* To change the spare interrupt source:
*
* 1) Modify vApplicationSetupInterrupts() below to be correct for whichever
* interrupt vector is to be used. Make sure you use a spare interrupt on interrupt
* controller 0, otherwise the register used to request context switches will also
* require modification.
*
* 2) Change the definition of configYIELD_INTERRUPT_VECTOR within FreeRTOSConfig.h
* to be correct for your chosen interrupt vector.
*
* 3) Change the name of the function __cs3_isr_interrupt_127() within portasm.S
* to be correct for whichever vector number is being used. By default interrupt
* controller 0 number 16 is used, which corresponds to vector number 127.
*/
void vApplicationSetupInterrupts( void )
{
const unsigned portSHORT usCompareMatchValue = ( ( configCPU_CLOCK_HZ / portPRESCALE_VALUE ) / configTICK_RATE_HZ );
/* Configure interrupt priority and level and unmask interrupt for PIT0. */
MCF_INTC0_ICR55 = ( 1 | ( configKERNEL_INTERRUPT_PRIORITY << 3 ) );
MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK55 );
/* Do the same for vector 63 (interrupt controller 0. I don't think the
write to MCF_INTC0_IMRH is actually required here but is included for
completeness. */
MCF_INTC0_ICR16 = ( 0 | configKERNEL_INTERRUPT_PRIORITY << 3 );
MCF_INTC0_IMRL &= ~( MCF_INTC_IMRL_INT_MASK16 | 0x01 );
/* Configure PIT0 to generate the RTOS tick. */
MCF_PIT0_PCSR |= MCF_PIT_PCSR_PIF;
MCF_PIT0_PCSR = ( portPRESCALE_REG_SETTING | MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_EN );
MCF_PIT0_PMR = usCompareMatchValue;
}
/*-----------------------------------------------------------*/
__declspec(interrupt:0) void vPIT0InterruptHandler( void )
{
unsigned portLONG ulSavedInterruptMask;
/* Clear the PIT0 interrupt. */
MCF_PIT0_PCSR |= MCF_PIT_PCSR_PIF;
/* Increment the RTOS tick. */
ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR();
vTaskIncrementTick();
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulSavedInterruptMask );
/* If we are using the pre-emptive scheduler then also request a
context switch as incrementing the tick could have unblocked a task. */
#if configUSE_PREEMPTION == 1
{
taskYIELD();
}
#endif
}

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/*
* File: mcf52221_sysinit.c
* Purpose: Power-on Reset configuration of the MCF52221.
*
* Notes:
*
*/
#include "support_common.h"
#include "exceptions.h"
/********************************************************************/
static void pll_init(void)
{
MCF_CLOCK_CCHR =0x05; // The PLL pre divider - 48MHz / 6 = 8MHz
/* The PLL pre-divider affects this!!!
* Multiply 8Mhz reference crystal /CCHR by 10 to acheive system clock of 80Mhz
*/
MCF_CLOCK_SYNCR = MCF_CLOCK_SYNCR_MFD(3) | MCF_CLOCK_SYNCR_CLKSRC| MCF_CLOCK_SYNCR_PLLMODE | MCF_CLOCK_SYNCR_PLLEN ;
while (!(MCF_CLOCK_SYNSR & MCF_CLOCK_SYNSR_LOCK))
{
}
}
/********************************************************************/
static void scm_init(void)
{
/*
* Enable on-chip modules to access internal SRAM
*/
MCF_SCM_RAMBAR = (0
| MCF_SCM_RAMBAR_BA(RAMBAR_ADDRESS)
| MCF_SCM_RAMBAR_BDE);
}
/********************************************************************/
/*
* Out of reset, the low-level assembly code calls this routine to
* initialize the mcf5206e for this board. A temporary stack has been
* setup in the internal SRAM, and the stack pointer will be changed
* to point to DRAM once this routine returns.
*/
void __initialize_hardware(void)
{
/*******************************************************
* Out of reset, the low-level assembly code calls this
* routine to initialize the MCF52221 modules for the
* M522223EVB board.
********************************************************/
asm
{
/* Initialize IPSBAR */
move.l #__IPSBAR,d0
andi.l #0xC0000000,d0 // need to mask
add.l #0x1,d0
move.l d0,0x40000000
/* Initialize FLASHBAR */
move.l #__FLASHBAR,d0
andi.l #0xFFF80000,d0 // need to mask
add.l #0x61,d0
movec d0,FLASHBAR
}
/* Set real time clock freq */
MCF_CLOCK_RTCDR = 48000000;
pll_init();
scm_init();
initialize_exceptions();
}

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/*
* File: mcf52221demo_sysinit.h
* Purpose: Power-on Reset configuration of the MCF52221.
*
* Notes:
*
*/
#ifndef __MCF52221DEMO_SYSINIT_H__
#define __MCF52221DEMO_SYSINIT_H__
#ifdef __cplusplus
extern "C" {
#endif
#if ENABLE_UART_SUPPORT==1
#define TERMINAL_PORT 0
#define TERMINAL_BAUD kBaud19200
#endif /* ENABLE_UART_SUPPORT==1 */
#define SYSTEM_CLOCK_KHZ 80000 /* system bus frequency in kHz */
/********************************************************************/
/* __initialize_hardware Startup code routine
*
* __initialize_hardware is called by the startup code right after reset,
* with interrupt disabled and SP pre-set to a valid memory area.
* Here you should initialize memory and some peripherics;
* at this point global variables are not initialized yet.
* The startup code will initialize SP on return of this function.
*/
void __initialize_hardware(void);
/********************************************************************/
/* __initialize_system Startup code routine
*
* __initialize_system is called by the startup code when all languages
* specific initialization are done to allow additional hardware setup.
*/
void __initialize_system(void);
#ifdef __cplusplus
}
#endif
#endif /* __MCF52221DEMO_SYSINIT_H__ */

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/*
FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation and modified by the FreeRTOS exception.
**NOTE** The exception to the GPL is included to allow you to distribute a
combined work that includes FreeRTOS without being obliged to provide the
source code for proprietary components outside of the FreeRTOS kernel.
Alternative commercial license and support terms are also available upon
request. See the licensing section of http://www.FreeRTOS.org for full
license details.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details.
You should have received a copy of the GNU General Public License along
with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
Temple Place, Suite 330, Boston, MA 02111-1307 USA.
***************************************************************************
* *
* Looking for a quick start? Then check out the FreeRTOS eBook! *
* See http://www.FreeRTOS.org/Documentation for details *
* *
***************************************************************************
1 tab == 4 spaces!
Please ensure to read the configuration and relevant port sections of the
online documentation.
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*
Changes from V2.5.2
+ All LED's are turned off to start.
*/
#include "FreeRTOS.h"
#include "task.h"
#include "partest.h"
#define partstNUM_LEDs 4
/*-----------------------------------------------------------
* Simple parallel port IO routines.
*-----------------------------------------------------------*/
void vParTestInitialise( void )
{
/* Enable signals as GPIO */
MCF_GPIO_PTCPAR = 0
| MCF_GPIO_PTCPAR_DTIN3_GPIO
| MCF_GPIO_PTCPAR_DTIN2_GPIO
| MCF_GPIO_PTCPAR_DTIN1_GPIO
| MCF_GPIO_PTCPAR_DTIN0_GPIO;
/* Enable signals as digital outputs */
MCF_GPIO_DDRTC = 0
| MCF_GPIO_DDRTC_DDRTC3
| MCF_GPIO_DDRTC_DDRTC2
| MCF_GPIO_DDRTC_DDRTC1
| MCF_GPIO_DDRTC_DDRTC0;
MCF_GPIO_PORTTC = 0x00; // TURN LEDS OFF
}
/*-----------------------------------------------------------*/
void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
{
unsigned portBASE_TYPE uxLEDMask;
if( uxLED < partstNUM_LEDs )
{
uxLEDMask = 1UL << uxLED;
taskENTER_CRITICAL();
{
if( xValue )
{
MCF_GPIO_PORTTC |= uxLEDMask;
}
else
{
MCF_GPIO_PORTTC &= ~uxLEDMask;
}
}
taskEXIT_CRITICAL();
}
}
/*-----------------------------------------------------------*/
void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
{
unsigned portBASE_TYPE uxLEDMask;
if( uxLED < partstNUM_LEDs )
{
uxLEDMask = 1UL << uxLED;
taskENTER_CRITICAL();
{
if( MCF_GPIO_PORTTC & uxLEDMask )
{
MCF_GPIO_PORTTC &= ~uxLEDMask;
}
else
{
MCF_GPIO_PORTTC |= uxLEDMask;
}
}
taskEXIT_CRITICAL();
}
}

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/* CFM init */
#define KEY_UPPER 0
#define KEY_LOWER 0
#define CFMPROT 0
#define CFMSACC 0
#define CFMDACC 0
#define CFMSEC 0
#pragma define_section cfmconfig ".cfmconfig" far_absolute R
#pragma explicit_zero_data on
__declspec(cfmconfig) unsigned long _cfm[6] = {
KEY_UPPER, /* 0x00000400 */
KEY_LOWER, /* 0x00000404 */
CFMPROT, /* 0x00000408 */
CFMSACC, /* 0x0000040C */
CFMDACC, /* 0x00000410 */
CFMSEC, /* 0x00000414 */
};

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/*
* File: exceptions.c
* Purpose: Generic exception handling for ColdFire processors
*
*/
#include "exceptions.h"
#include "startcf.h"
#include "support_common.h"
#include <ansi_parms.h>
#define REGISTER_ABI __REGABI__
extern void vPIT0InterruptHandler( void );
extern void vUART0InterruptHandler( void );
extern void vPortYieldISR( void );
extern void vFECISRHandler( void );
/***********************************************************************/
/*
* Set NO_PRINTF to 0 in order the exceptions.c interrupt handler
* to output messages to the standard io.
*
*/
#define NO_PRINTF 1
#if NO_PRINTF
#define VECTORDISPLAY(MESSAGE) asm { nop; };
#define VECTORDISPLAY2(MESSAGE,MESSAGE2) asm { nop; };
#define VECTORDISPLAY3(MESSAGE,MESSAGE2,MESSAGE3) asm { nop; };
#else
#include <stdio.h>
#define VECTORDISPLAY(MESSAGE1) printf(MESSAGE1);
#define VECTORDISPLAY2(MESSAGE1,MESSAGE2) printf(MESSAGE1,MESSAGE2);
#define VECTORDISPLAY3(MESSAGE1,MESSAGE2,MESSAGE3) printf(MESSAGE1,MESSAGE2,MESSAGE3);
#endif
#ifdef __cplusplus
extern "C" {
#endif
extern unsigned long far _SP_INIT[];
/***********************************************************************/
/*
* Handling of the TRK ColdFire libs (printf support in Debugger Terminal)
*
* To enable this support (setup by default in CONSOLE_RAM build target
* if available):
* - Set CONSOLE_IO_SUPPORT to 1 in this file; this will enable
* TrapHandler_printf for the trap #14 exception.
* (this is set by default to 1 in the ColdFire Pre-Processor panel for
* the CONSOLE_RAM build target)
*
* - Make sure the file:
* {Compiler}ColdFire_Support\msl\MSL_C\MSL_ColdFire\Src\console_io_cf.c
* is referenced from your project.
*
* - Make sure that in the CF Exceptions panel the check box
* "46 TRAP #14 for Console I/O", in the "User Application Exceptions"
* area is set.
*
*/
#ifndef CONSOLE_IO_SUPPORT
#define CONSOLE_IO_SUPPORT 0
#endif
#if CONSOLE_IO_SUPPORT
asm void TrapHandler_printf(void) {
HALT
RTE
}
#endif
/***********************************************************************/
/*
* This is the handler for all exceptions which are not common to all
* ColdFire Chips.
*
* Called by mcf_exception_handler
*
*/
void derivative_interrupt(unsigned long vector)
{
if (vector < 64 || vector > 192) {
VECTORDISPLAY2("User Defined Vector #%d\n",vector);
}
}
/***********************************************************************
*
* This is the exception handler for all exceptions common to all
* chips ColdFire. Most exceptions do nothing, but some of the more
* important ones are handled to some extent.
*
* Called by asm_exception_handler
*
* The ColdFire family of processors has a simplified exception stack
* frame that looks like the following:
*
* 3322222222221111 111111
* 1098765432109876 5432109876543210
* 8 +----------------+----------------+
* | Program Counter |
* 4 +----------------+----------------+
* |FS/Fmt/Vector/FS| SR |
* SP --> 0 +----------------+----------------+
*
* The stack self-aligns to a 4-byte boundary at an exception, with
* the FS/Fmt/Vector/FS field indicating the size of the adjustment
* (SP += 0,1,2,3 bytes).
* 31 28 27 26 25 18 17 16 15 0
* 4 +---------------------------------------+------------------------------------+
* | Format | FS[3..2] | Vector | FS[1..0] | SR |
* SP --> 0 +---------------------------------------+------------------------------------+
*/
#define MCF5XXX_RD_SF_FORMAT(PTR) \
((*((unsigned short *)(PTR)) >> 12) & 0x00FF)
#define MCF5XXX_RD_SF_VECTOR(PTR) \
((*((unsigned short *)(PTR)) >> 2) & 0x00FF)
#define MCF5XXX_RD_SF_FS(PTR) \
( ((*((unsigned short *)(PTR)) & 0x0C00) >> 8) | (*((unsigned short *)(PTR)) & 0x0003) )
#define MCF5XXX_SF_SR(PTR) *(((unsigned short *)(PTR))+1)
#define MCF5XXX_SF_PC(PTR) *((unsigned long *)(PTR)+1)
#define MCF5XXX_EXCEPTFMT "%s -- PC = %#08X\n"
void mcf_exception_handler(void *framepointer)
{
volatile unsigned long exceptionStackFrame = (*(unsigned long *)(framepointer));
volatile unsigned short stackFrameSR = MCF5XXX_SF_SR(framepointer);
volatile unsigned short stackFrameWord = (*(unsigned short *)(framepointer));
volatile unsigned long stackFrameFormat = (unsigned long)MCF5XXX_RD_SF_FORMAT(&stackFrameWord);
volatile unsigned long stackFrameFS = (unsigned long)MCF5XXX_RD_SF_FS(&stackFrameWord);
volatile unsigned long stackFrameVector = (unsigned long)MCF5XXX_RD_SF_VECTOR(&stackFrameWord);
volatile unsigned long stackFramePC = MCF5XXX_SF_PC(framepointer);
switch (stackFrameFormat)
{
case 4:
case 5:
case 6:
case 7:
break;
default:
VECTORDISPLAY3(MCF5XXX_EXCEPTFMT,"Illegal stack type", stackFramePC);
break;
}
switch (stackFrameVector)
{
case 2:
VECTORDISPLAY3(MCF5XXX_EXCEPTFMT, "Access Error", stackFramePC);
switch (stackFrameFS)
{
case 4:
VECTORDISPLAY("Error on instruction fetch\n");
break;
case 8:
VECTORDISPLAY("Error on operand write\n");
break;
case 9:
VECTORDISPLAY("Attempted write to write-protected space\n");
break;
case 12:
VECTORDISPLAY("Error on operand read\n");
break;
default:
VECTORDISPLAY("Reserved Fault Status Encoding\n");
break;
}
break;
case 3:
VECTORDISPLAY3(MCF5XXX_EXCEPTFMT, "Address Error", stackFramePC);
switch (stackFrameFS)
{
case 4:
VECTORDISPLAY("Error on instruction fetch\n");
break;
case 8:
VECTORDISPLAY("Error on operand write\n");
break;
case 9:
VECTORDISPLAY("Attempted write to write-protected space\n");
break;
case 12:
VECTORDISPLAY("Error on operand read\n");
break;
default:
VECTORDISPLAY("Reserved Fault Status Encoding\n");
break;
}
break;
case 4:
VECTORDISPLAY3(MCF5XXX_EXCEPTFMT, "Illegal instruction", stackFramePC);
break;
case 8:
VECTORDISPLAY3(MCF5XXX_EXCEPTFMT, "Privilege violation", stackFramePC);
break;
case 9:
VECTORDISPLAY3(MCF5XXX_EXCEPTFMT, "Trace Exception", stackFramePC);
break;
case 10:
VECTORDISPLAY3(MCF5XXX_EXCEPTFMT, "Unimplemented A-Line Instruction", stackFramePC);
break;
case 11:
VECTORDISPLAY3(MCF5XXX_EXCEPTFMT, "Unimplemented F-Line Instruction", stackFramePC);
break;
case 12:
VECTORDISPLAY3(MCF5XXX_EXCEPTFMT, "Debug Interrupt", stackFramePC);
break;
case 14:
VECTORDISPLAY3(MCF5XXX_EXCEPTFMT, "Format Error", stackFramePC);
break;
case 15:
VECTORDISPLAY3(MCF5XXX_EXCEPTFMT, "Unitialized Interrupt", stackFramePC);
break;
case 24:
VECTORDISPLAY3(MCF5XXX_EXCEPTFMT, "Spurious Interrupt", stackFramePC);
break;
case 25:
case 26:
case 27:
case 28:
case 29:
case 30:
case 31:
VECTORDISPLAY2("Autovector interrupt level %d\n", stackFrameVector - 24);
break;
case 32:
case 33:
case 34:
case 35:
case 36:
case 37:
case 38:
case 39:
case 40:
case 41:
case 42:
case 43:
case 44:
case 45:
case 46:
case 47:
VECTORDISPLAY2("TRAP #%d\n", stackFrameVector - 32);
break;
case 5:
case 6:
case 7:
case 13:
case 16:
case 17:
case 18:
case 19:
case 20:
case 21:
case 22:
case 23:
case 48:
case 49:
case 50:
case 51:
case 52:
case 53:
case 54:
case 55:
case 56:
case 57:
case 58:
case 59:
case 60:
case 61:
case 62:
case 63:
VECTORDISPLAY2("Reserved: #%d\n", stackFrameVector);
break;
default:
derivative_interrupt(stackFrameVector);
break;
}
}
#if REGISTER_ABI
asm void asm_exception_handler(void)
{
link a6,#0
lea -20(sp), sp
movem.l d0-d2/a0-a1, (sp)
lea 24(sp),a0 /* A0 point to exception stack frame on the stack */
jsr mcf_exception_handler
movem.l (sp), d0-d2/a0-a1
lea 20(sp), sp
unlk a6
rte
}
#else
asm void asm_exception_handler(void)
{
link a6,#0
lea -20(sp), sp
movem.l d0-d2/a0-a1, (sp)
pea 24(sp) /* push exception frame address */
jsr mcf_exception_handler
movem.l 4(sp), d0-d2/a0-a1
lea 24(sp), sp
unlk a6
rte
}
#endif
typedef void (* vectorTableEntryType)(void);
#pragma define_section vectortable ".vectortable" far_absolute R
/* CF have 255 vector + SP_INIT in the vector table (256 entries)
*/
__declspec(vectortable) vectorTableEntryType _vect[256] = { /* Interrupt vector table */
(vectorTableEntryType)__SP_AFTER_RESET, /* 0 (0x000) Initial supervisor SP */
_startup, /* 1 (0x004) Initial PC */
asm_exception_handler, /* 2 (0x008) Access Error */
asm_exception_handler, /* 3 (0x00C) Address Error */
asm_exception_handler, /* 4 (0x010) Illegal Instruction */
asm_exception_handler, /* 5 (0x014) Reserved */
asm_exception_handler, /* 6 (0x018) Reserved */
asm_exception_handler, /* 7 (0x01C) Reserved */
asm_exception_handler, /* 8 (0x020) Privilege Violation */
asm_exception_handler, /* 9 (0x024) Trace */
asm_exception_handler, /* 10 (0x028) Unimplemented A-Line */
asm_exception_handler, /* 11 (0x02C) Unimplemented F-Line */
asm_exception_handler, /* 12 (0x030) Debug Interrupt */
asm_exception_handler, /* 13 (0x034) Reserved */
asm_exception_handler, /* 14 (0x038) Format Error */
asm_exception_handler, /* 15 (0x03C) Unitialized Int */
asm_exception_handler, /* 16 (0x040) Reserved */
asm_exception_handler, /* 17 (0x044) Reserved */
asm_exception_handler, /* 18 (0x048) Reserved */
asm_exception_handler, /* 19 (0x04C) Reserved */
asm_exception_handler, /* 20 (0x050) Reserved */
asm_exception_handler, /* 21 (0x054) Reserved */
asm_exception_handler, /* 22 (0x058) Reserved */
asm_exception_handler, /* 23 (0x05C) Reserved */
asm_exception_handler, /* 24 (0x060) Spurious Interrupt */
asm_exception_handler, /* 25 (0x064) Autovector Level 1 */
asm_exception_handler, /* 26 (0x068) Autovector Level 2 */
asm_exception_handler, /* 27 (0x06C) Autovector Level 3 */
asm_exception_handler, /* 28 (0x070) Autovector Level 4 */
asm_exception_handler, /* 29 (0x074) Autovector Level 5 */
asm_exception_handler, /* 30 (0x078) Autovector Level 6 */
asm_exception_handler, /* 31 (0x07C) Autovector Level 7 */
asm_exception_handler, /* 32 (0x080) TRAP #0 */
asm_exception_handler, /* 33 (0x084) TRAP #1 */
asm_exception_handler, /* 34 (0x088) TRAP #2 */
asm_exception_handler, /* 35 (0x08C) TRAP #3 */
asm_exception_handler, /* 36 (0x090) TRAP #4 */
asm_exception_handler, /* 37 (0x094) TRAP #5 */
asm_exception_handler, /* 38 (0x098) TRAP #6 */
asm_exception_handler, /* 39 (0x09C) TRAP #7 */
asm_exception_handler, /* 40 (0x0A0) TRAP #8 */
asm_exception_handler, /* 41 (0x0A4) TRAP #9 */
asm_exception_handler, /* 42 (0x0A8) TRAP #10 */
asm_exception_handler, /* 43 (0x0AC) TRAP #11 */
asm_exception_handler, /* 44 (0x0B0) TRAP #12 */
asm_exception_handler, /* 45 (0x0B4) TRAP #13 */
#if CONSOLE_IO_SUPPORT
TrapHandler_printf, /* 46 (0x0B8) TRAP #14 */
#else
asm_exception_handler, /* 46 (0x0B8) TRAP #14 */
#endif
asm_exception_handler, /* 47 (0x0BC) TRAP #15 */
asm_exception_handler, /* 48 (0x0C0) Reserved */
asm_exception_handler, /* 49 (0x0C4) Reserved */
asm_exception_handler, /* 50 (0x0C8) Reserved */
asm_exception_handler, /* 51 (0x0CC) Reserved */
asm_exception_handler, /* 52 (0x0D0) Reserved */
asm_exception_handler, /* 53 (0x0D4) Reserved */
asm_exception_handler, /* 54 (0x0D8) Reserved */
asm_exception_handler, /* 55 (0x0DC) Reserved */
asm_exception_handler, /* 56 (0x0E0) Reserved */
asm_exception_handler, /* 57 (0x0E4) Reserved */
asm_exception_handler, /* 58 (0x0E8) Reserved */
asm_exception_handler, /* 59 (0x0EC) Reserved */
asm_exception_handler, /* 60 (0x0F0) Reserved */
asm_exception_handler, /* 61 (0x0F4) Reserved */
asm_exception_handler, /* 62 (0x0F8) Reserved */
asm_exception_handler, /* 63 (0x0FC) Reserved */
asm_exception_handler, /* 64 (0x100) Device-specific interrupts */
asm_exception_handler, /* 65 (0x104) Device-specific interrupts */
asm_exception_handler, /* 66 (0x108) Device-specific interrupts */
asm_exception_handler, /* 67 (0x10C) Device-specific interrupts */
asm_exception_handler, /* 68 (0x110) Device-specific interrupts */
asm_exception_handler, /* 69 (0x114) Device-specific interrupts */
asm_exception_handler, /* 70 (0x118) Device-specific interrupts */
asm_exception_handler, /* 71 (0x11C) Device-specific interrupts */
asm_exception_handler, /* 72 (0x120) Device-specific interrupts */
asm_exception_handler, /* 73 (0x124) Device-specific interrupts */
asm_exception_handler, /* 74 (0x128) Device-specific interrupts */
asm_exception_handler, /* 75 (0x12C) Device-specific interrupts */
asm_exception_handler, /* 76 (0x130) Device-specific interrupts */
vUART0InterruptHandler, /* 77 (0x134) Device-specific interrupts */
asm_exception_handler, /* 78 (0x138) Device-specific interrupts */
asm_exception_handler, /* 79 (0x13C) Device-specific interrupts */
vPortYieldISR, /* 80 (0x140) Device-specific interrupts */
asm_exception_handler, /* 81 (0x144) Device-specific interrupts */
asm_exception_handler, /* 82 (0x148) Device-specific interrupts */
asm_exception_handler, /* 83 (0x14C) Device-specific interrupts */
asm_exception_handler, /* 84 (0x150) Device-specific interrupts */
asm_exception_handler, /* 85 (0x154) Device-specific interrupts */
asm_exception_handler, /* 86 (0x158) Device-specific interrupts */
asm_exception_handler, /* 87 (0x15C) Device-specific interrupts */
asm_exception_handler, /* 88 (0x160) Device-specific interrupts */
asm_exception_handler, /* 89 (0x164) Device-specific interrupts */
asm_exception_handler, /* 90 (0x168) Device-specific interrupts */
asm_exception_handler, /* 91 (0x16C) Device-specific interrupts */
asm_exception_handler, /* 92 (0x170) Device-specific interrupts */
asm_exception_handler, /* 93 (0x174) Device-specific interrupts */
asm_exception_handler, /* 94 (0x178) Device-specific interrupts */
asm_exception_handler, /* 95 (0x17C) Device-specific interrupts */
asm_exception_handler, /* 96 (0x180) Level 1 software interrupt */
asm_exception_handler, /* 97 (0x184) Level 2 software interrupt */
asm_exception_handler, /* 98 (0x188) Level 3 software interrupt */
asm_exception_handler, /* 99 (0x18C) Level 4 software interrupt */
asm_exception_handler, /* 100 (0x190) Level 5 software interrupt */
asm_exception_handler, /* 101 (0x194) Level 6 software interrupt */
asm_exception_handler, /* 102 (0x198) Level 7 software interrupt */
asm_exception_handler, /* 103 (0x19C) Reserved */
asm_exception_handler, /* 104 (0x1A0) Reserved */
asm_exception_handler, /* 105 (0x1A4) Reserved */
asm_exception_handler, /* 106 (0x1A8) Reserved */
asm_exception_handler, /* 107 (0x___) Reserved */
asm_exception_handler, /* 108 (0x___) Reserved */
asm_exception_handler, /* 109 (0x___) Reserved */
asm_exception_handler, /* 110 (0x___) Reserved */
asm_exception_handler, /* 111 (0x___) Reserved */
asm_exception_handler, /* 112 (0x___) Reserved */
asm_exception_handler, /* 113 (0x___) Reserved */
asm_exception_handler, /* 114 (0x___) Reserved */
asm_exception_handler, /* 115 (0x___) Reserved */
asm_exception_handler, /* 116 (0x___) Reserved */
asm_exception_handler, /* 117 (0x___) Reserved */
asm_exception_handler, /* 118 (0x___) Reserved */
vPIT0InterruptHandler, /* 119 (0x___) Reserved */
asm_exception_handler, /* 120 (0x___) Reserved */
asm_exception_handler, /* 121 (0x___) Reserved */
asm_exception_handler, /* 122 (0x___) Reserved */
asm_exception_handler, /* 123 (0x___) Reserved */
asm_exception_handler, /* 124 (0x___) Reserved */
asm_exception_handler, /* 125 (0x___) Reserved */
asm_exception_handler, /* 126 (0x___) Reserved */
asm_exception_handler, /* 127 (0x___) Reserved */
asm_exception_handler, /* 128 (0x___) Reserved */
asm_exception_handler, /* 129 (0x___) Reserved */
asm_exception_handler, /* 130 (0x___) Reserved */
asm_exception_handler, /* 131 (0x___) Reserved */
asm_exception_handler, /* 132 (0x___) Reserved */
asm_exception_handler, /* 133 (0x___) Reserved */
asm_exception_handler, /* 134 (0x___) Reserved */
asm_exception_handler, /* 135 (0x___) Reserved */
asm_exception_handler, /* 136 (0x___) Reserved */
asm_exception_handler, /* 137 (0x___) Reserved */
asm_exception_handler, /* 138 (0x___) Reserved */
asm_exception_handler, /* 139 (0x___) Reserved */
asm_exception_handler, /* 140 (0x___) Reserved */
asm_exception_handler, /* 141 (0x___) Reserved */
asm_exception_handler, /* 142 (0x___) Reserved */
asm_exception_handler, /* 143 (0x___) Reserved */
asm_exception_handler, /* 144 (0x___) Reserved */
asm_exception_handler, /* 145 (0x___) Reserved */
asm_exception_handler, /* 146 (0x___) Reserved */
asm_exception_handler, /* 147 (0x___) Reserved */
asm_exception_handler, /* 148 (0x___) Reserved */
asm_exception_handler, /* 149 (0x___) Reserved */
asm_exception_handler, /* 150 (0x___) Reserved */
asm_exception_handler, /* 151 (0x___) Reserved */
asm_exception_handler, /* 152 (0x___) Reserved */
asm_exception_handler, /* 153 (0x___) Reserved */
asm_exception_handler, /* 154 (0x___) Reserved */
asm_exception_handler, /* 155 (0x___) Reserved */
asm_exception_handler, /* 156 (0x___) Reserved */
asm_exception_handler, /* 157 (0x___) Reserved */
asm_exception_handler, /* 158 (0x___) Reserved */
asm_exception_handler, /* 159 (0x___) Reserved */
asm_exception_handler, /* 160 (0x___) Reserved */
asm_exception_handler, /* 161 (0x___) Reserved */
asm_exception_handler, /* 162 (0x___) Reserved */
asm_exception_handler, /* 163 (0x___) Reserved */
asm_exception_handler, /* 164 (0x___) Reserved */
asm_exception_handler, /* 165 (0x___) Reserved */
asm_exception_handler, /* 166 (0x___) Reserved */
asm_exception_handler, /* 167 (0x___) Reserved */
asm_exception_handler, /* 168 (0x___) Reserved */
asm_exception_handler, /* 169 (0x___) Reserved */
asm_exception_handler, /* 170 (0x___) Reserved */
asm_exception_handler, /* 171 (0x___) Reserved */
asm_exception_handler, /* 172 (0x___) Reserved */
asm_exception_handler, /* 173 (0x___) Reserved */
asm_exception_handler, /* 174 (0x___) Reserved */
asm_exception_handler, /* 175 (0x___) Reserved */
asm_exception_handler, /* 176 (0x___) Reserved */
asm_exception_handler, /* 177 (0x___) Reserved */
asm_exception_handler, /* 178 (0x___) Reserved */
asm_exception_handler, /* 179 (0x___) Reserved */
asm_exception_handler, /* 180 (0x___) Reserved */
asm_exception_handler, /* 181 (0x___) Reserved */
asm_exception_handler, /* 182 (0x___) Reserved */
asm_exception_handler, /* 183 (0x___) Reserved */
asm_exception_handler, /* 184 (0x___) Reserved */
asm_exception_handler, /* 185 (0x___) Reserved */
asm_exception_handler, /* 186 (0x___) Reserved */
asm_exception_handler, /* 187 (0x___) Reserved */
asm_exception_handler, /* 188 (0x___) Reserved */
asm_exception_handler, /* 189 (0x___) Reserved */
asm_exception_handler, /* 190 (0x___) Reserved */
asm_exception_handler, /* 191 (0x___) Reserved */
asm_exception_handler, /* 192 (0x___) Reserved */
asm_exception_handler, /* 193 (0x___) Reserved */
asm_exception_handler, /* 194 (0x___) Reserved */
asm_exception_handler, /* 195 (0x___) Reserved */
asm_exception_handler, /* 196 (0x___) Reserved */
asm_exception_handler, /* 197 (0x___) Reserved */
asm_exception_handler, /* 198 (0x___) Reserved */
asm_exception_handler, /* 199 (0x___) Reserved */
asm_exception_handler, /* 200 (0x___) Reserved */
asm_exception_handler, /* 201 (0x___) Reserved */
asm_exception_handler, /* 202 (0x___) Reserved */
asm_exception_handler, /* 203 (0x___) Reserved */
asm_exception_handler, /* 204 (0x___) Reserved */
asm_exception_handler, /* 205 (0x___) Reserved */
asm_exception_handler, /* 206 (0x___) Reserved */
asm_exception_handler, /* 207 (0x___) Reserved */
asm_exception_handler, /* 208 (0x___) Reserved */
asm_exception_handler, /* 209 (0x___) Reserved */
asm_exception_handler, /* 210 (0x___) Reserved */
asm_exception_handler, /* 211 (0x___) Reserved */
asm_exception_handler, /* 212 (0x___) Reserved */
asm_exception_handler, /* 213 (0x___) Reserved */
asm_exception_handler, /* 214 (0x___) Reserved */
asm_exception_handler, /* 215 (0x___) Reserved */
asm_exception_handler, /* 216 (0x___) Reserved */
asm_exception_handler, /* 217 (0x___) Reserved */
asm_exception_handler, /* 218 (0x___) Reserved */
asm_exception_handler, /* 219 (0x___) Reserved */
asm_exception_handler, /* 220 (0x___) Reserved */
asm_exception_handler, /* 221 (0x___) Reserved */
asm_exception_handler, /* 222 (0x___) Reserved */
asm_exception_handler, /* 223 (0x___) Reserved */
asm_exception_handler, /* 224 (0x___) Reserved */
asm_exception_handler, /* 225 (0x___) Reserved */
asm_exception_handler, /* 226 (0x___) Reserved */
asm_exception_handler, /* 227 (0x___) Reserved */
asm_exception_handler, /* 228 (0x___) Reserved */
asm_exception_handler, /* 229 (0x___) Reserved */
asm_exception_handler, /* 230 (0x___) Reserved */
asm_exception_handler, /* 231 (0x___) Reserved */
asm_exception_handler, /* 232 (0x___) Reserved */
asm_exception_handler, /* 233 (0x___) Reserved */
asm_exception_handler, /* 234 (0x___) Reserved */
asm_exception_handler, /* 235 (0x___) Reserved */
asm_exception_handler, /* 236 (0x___) Reserved */
asm_exception_handler, /* 237 (0x___) Reserved */
asm_exception_handler, /* 238 (0x___) Reserved */
asm_exception_handler, /* 239 (0x___) Reserved */
asm_exception_handler, /* 240 (0x___) Reserved */
asm_exception_handler, /* 241 (0x___) Reserved */
asm_exception_handler, /* 242 (0x___) Reserved */
asm_exception_handler, /* 243 (0x___) Reserved */
asm_exception_handler, /* 244 (0x___) Reserved */
asm_exception_handler, /* 245 (0x___) Reserved */
asm_exception_handler, /* 246 (0x___) Reserved */
asm_exception_handler, /* 247 (0x___) Reserved */
asm_exception_handler, /* 248 (0x___) Reserved */
asm_exception_handler, /* 249 (0x___) Reserved */
asm_exception_handler, /* 250 (0x___) Reserved */
asm_exception_handler, /* 251 (0x___) Reserved */
asm_exception_handler, /* 252 (0x___) Reserved */
asm_exception_handler, /* 253 (0x___) Reserved */
asm_exception_handler, /* 254 (0x___) Reserved */
asm_exception_handler, /* 255 (0x___) Reserved */
};
/********************************************************************
* MCF5xxx ASM utility functions
*/
asm void mcf5xxx_wr_vbr(unsigned long) { /* Set VBR */
move.l 4(SP),D0
movec d0,VBR
nop
rts
}
/********************************************************************
* MCF5xxx startup copy functions:
*
* Set VBR and performs RAM vector table initializatiom.
* The following symbol should be defined in the lcf:
* __VECTOR_RAM
*
* _vect is the start of the exception table in the code
* In case _vect address is different from __VECTOR_RAM,
* the vector table is copied from _vect to __VECTOR_RAM.
* In any case VBR is set to __VECTOR_RAM.
*/
void initialize_exceptions(void)
{
#if 0
/*
* Memory map definitions from linker command files used by mcf5xxx_startup
*/
register uint32 n;
/*
* Copy the vector table to RAM
*/
if (__VECTOR_RAM != (unsigned long*)_vect)
{
for (n = 0; n < 256; n++)
__VECTOR_RAM[n] = (unsigned long)_vect[n];
}
mcf5xxx_wr_vbr((unsigned long)__VECTOR_RAM);
#endif
mcf5xxx_wr_vbr((unsigned long)_vect);
}
#ifdef __cplusplus
}
#endif

View file

@ -0,0 +1,67 @@
/*
* File: exceptions.h
* Purpose: Generic exception handling for ColdFire processors
*
* Notes:
*/
#ifndef _MCF_EXCEPTIONS_H
#define _MCF_EXCEPTIONS_H
#ifdef __cplusplus
extern "C" {
#endif
/***********************************************************************/
/*
* This is the handler for all exceptions which are not common to all
* ColdFire Chips.
*
* Called by mcf_exception_handler
*
*/
void derivative_interrupt(unsigned long vector);
/***********************************************************************/
/*
* This is the exception handler for all exceptions common to all
* chips ColdFire. Most exceptions do nothing, but some of the more
* important ones are handled to some extent.
*
* Called by asm_exception_handler
*/
void mcf_exception_handler(void *framepointer);
/***********************************************************************/
/*
* This is the assembly exception handler defined in the vector table.
* This function is in assembler so that the frame pointer can be read
* from the stack.
* Note that the way to give the stack frame as argument to the c handler
* depends on the used ABI (Register, Compact or Standard).
*
*/
asm void asm_exception_handler(void);
/***********************************************************************/
/* MCF5xxx exceptions table initialization:
*
* Set VBR and performs RAM vector table initialization.
* The following symbol should be defined in the lcf:
* __VECTOR_RAM
*
* _vect is the start of the exception table in the code
* In case _vect address is different from __VECTOR_RAM,
* the vector table is copied from _vect to __VECTOR_RAM.
* In any case VBR is set to __VECTOR_RAM.
*/
void initialize_exceptions(void);
#ifdef __cplusplus
}
#endif
#endif /* _MCF_EXCEPTIONS_H */

View file

@ -0,0 +1,238 @@
/*
* Copyright (c) 2001-2003 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
*/
#ifndef __LWIPOPTS_H__
#define __LWIPOPTS_H__
#define TCPIP_THREAD_NAME "tcp/ip"
#define TCPIP_THREAD_STACKSIZE 350
#define TCPIP_THREAD_PRIO 2
#define DEFAULT_THREAD_STACKSIZE 200
#define DEFAULT_THREAD_PRIO 1
#define ETH_PAD_SIZE 2
#define NOT_LWIP_DEBUG 0
#define DBG_TYPES_ON 0x00
#define LWIP_DBG_TYPES_ON LWIP_DBG_OFF
#define ETHARP_DEBUG LWIP_DBG_OFF
#define NETIF_DEBUG LWIP_DBG_OFF
#define PBUF_DEBUG LWIP_DBG_OFF
#define API_LIB_DEBUG LWIP_DBG_OFF
#define API_MSG_DEBUG LWIP_DBG_OFF
#define SOCKETS_DEBUG LWIP_DBG_OFF
#define ICMP_DEBUG LWIP_DBG_OFF
#define IGMP_DEBUG LWIP_DBG_OFF
#define INET_DEBUG LWIP_DBG_OFF
#define IP_DEBUG LWIP_DBG_OFF
#define IP_REASS_DEBUG LWIP_DBG_OFF
#define RAW_DEBUG LWIP_DBG_OFF
#define MEM_DEBUG LWIP_DBG_OFF
#define MEMP_DEBUG LWIP_DBG_OFF
#define SYS_DEBUG LWIP_DBG_OFF
#define TCP_DEBUG LWIP_DBG_OFF
#define TCP_INPUT_DEBUG LWIP_DBG_OFF
#define TCP_FR_DEBUG LWIP_DBG_OFF
#define TCP_RTO_DEBUG LWIP_DBG_OFF
#define TCP_CWND_DEBUG LWIP_DBG_OFF
#define TCP_WND_DEBUG LWIP_DBG_OFF
#define TCP_OUTPUT_DEBUG LWIP_DBG_OFF
#define TCP_RST_DEBUG LWIP_DBG_OFF
#define TCP_QLEN_DEBUG LWIP_DBG_OFF
#define UDP_DEBUG LWIP_DBG_OFF
#define TCPIP_DEBUG LWIP_DBG_OFF
#define PPP_DEBUG LWIP_DBG_OFF
#define SLIP_DEBUG LWIP_DBG_OFF
#define DHCP_DEBUG LWIP_DBG_OFF
#define AUTOIP_DEBUG LWIP_DBG_OFF
#define SNMP_MSG_DEBUG LWIP_DBG_OFF
#define SNMP_MIB_DEBUG LWIP_DBG_OFF
#define DNS_DEBUG LWIP_DBG_OFF
#define LWIP_NOASSERT 0
#define ETHARP_TRUST_IP_MAC 0
#define LWIP_UDP 0
/**
* SYS_LIGHTWEIGHT_PROT==1: if you want inter-task protection for certain
* critical regions during buffer allocation, deallocation and memory
* allocation and deallocation.
*/
#define SYS_LIGHTWEIGHT_PROT 1
/*
------------------------------------
---------- Memory options ----------
------------------------------------
*/
/**
* MEM_ALIGNMENT: should be set to the alignment of the CPU
* 4 byte alignment -> #define MEM_ALIGNMENT 4
* 2 byte alignment -> #define MEM_ALIGNMENT 2
*/
#define MEM_ALIGNMENT 4
/**
* MEM_SIZE: the size of the heap memory. If the application will send
* a lot of data that needs to be copied, this should be set high.
*/
#define MEM_SIZE (8*1024)
/*
------------------------------------------------
---------- Internal Memory Pool Sizes ----------
------------------------------------------------
*/
/**
* MEMP_NUM_PBUF: the number of memp struct pbufs (used for PBUF_ROM and PBUF_REF).
* If the application sends a lot of data out of ROM (or other static memory),
* this should be set high.
*/
#define MEMP_NUM_PBUF 20
/**
* MEMP_NUM_TCP_PCB: the number of simulatenously active TCP connections.
* (requires the LWIP_TCP option)
*/
#define MEMP_NUM_TCP_PCB 10
/**
* MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP segments.
* (requires the LWIP_TCP option)
*/
#define MEMP_NUM_TCP_SEG 8
/**
* MEMP_NUM_SYS_TIMEOUT: the number of simulateously active timeouts.
* (requires NO_SYS==0)
*/
#define MEMP_NUM_SYS_TIMEOUT 5
/**
* MEMP_NUM_NETBUF: the number of struct netbufs.
* (only needed if you use the sequential API, like api_lib.c)
*/
#define MEMP_NUM_NETBUF 4
/**
* PBUF_POOL_SIZE: the number of buffers in the pbuf pool.
*/
#define PBUF_POOL_SIZE 4
/*
----------------------------------
---------- Pbuf options ----------
----------------------------------
*/
/**
* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. The default is
* designed to accomodate single full size TCP frame in one pbuf, including
* TCP_MSS, IP header, and link header.
*/
#define PBUF_POOL_BUFSIZE 1500
/*
---------------------------------
---------- TCP options ----------
---------------------------------
*/
/**
* LWIP_TCP==1: Turn on TCP.
*/
#define LWIP_TCP 1
/* TCP Maximum segment size. */
#define TCP_MSS 1500
/* TCP sender buffer space (bytes). */
#define TCP_SND_BUF 1500
/**
* TCP_WND: The size of a TCP window.
*/
#define TCP_WND 1500
/**
* TCP_SYNMAXRTX: Maximum number of retransmissions of SYN segments.
*/
#define TCP_SYNMAXRTX 4
/*
---------------------------------
---------- RAW options ----------
---------------------------------
*/
/**
* LWIP_RAW==1: Enable application layer to hook into the IP layer itself.
*/
#define LWIP_RAW 0
/*
------------------------------------
---------- Socket options ----------
------------------------------------
*/
/**
* LWIP_SOCKET==1: Enable Socket API (require to use sockets.c)
*/
#define LWIP_SOCKET 0
/*
----------------------------------------
---------- Statistics options ----------
----------------------------------------
*/
/**
* LWIP_STATS==1: Enable statistics collection in lwip_stats.
*/
#define LWIP_STATS 0
/*
----------------------------------
---------- DHCP options ----------
----------------------------------
*/
/**
* LWIP_DHCP==1: Enable DHCP module.
*/
#define LWIP_DHCP 0
#define LWIP_PROVIDE_ERRNO 0
#endif /* __LWIPOPTS_H__ */

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@ -0,0 +1,453 @@
/*
FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation and modified by the FreeRTOS exception.
**NOTE** The exception to the GPL is included to allow you to distribute a
combined work that includes FreeRTOS without being obliged to provide the
source code for proprietary components outside of the FreeRTOS kernel.
Alternative commercial license and support terms are also available upon
request. See the licensing section of http://www.FreeRTOS.org for full
license details.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details.
You should have received a copy of the GNU General Public License along
with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
Temple Place, Suite 330, Boston, MA 02111-1307 USA.
***************************************************************************
* *
* Looking for a quick start? Then check out the FreeRTOS eBook! *
* See http://www.FreeRTOS.org/Documentation for details *
* *
***************************************************************************
1 tab == 4 spaces!
Please ensure to read the configuration and relevant port sections of the
online documentation.
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*
* Creates all the demo application tasks, then starts the scheduler. The WEB
* documentation provides more details of the standard demo application tasks.
* In addition to the standard demo tasks, the following tasks and tests are
* defined and/or created within this file:
*
* "Check" task - This only executes every five seconds but has a high priority
* to ensure it gets processor time. Its main function is to check that all the
* standard demo tasks are still operational. While no errors have been
* discovered the check task will toggle an LED every 5 seconds - the toggle
* rate increasing to 500ms being a visual indication that at least one task has
* reported unexpected behaviour.
*
* "Reg test" tasks - These fill the registers with known values, then check
* that each register still contains its expected value. Each task uses
* different values. The tasks run with very low priority so get preempted very
* frequently. A register containing an unexpected value is indicative of an
* error in the context switching mechanism.
*
*/
/* Standard includes. */
#include <stdio.h>
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
#include "queue.h"
#include "semphr.h"
/* Demo app includes. */
#include "BlockQ.h"
#include "crflash.h"
#include "partest.h"
#include "semtest.h"
#include "GenQTest.h"
#include "QPeek.h"
#include "comtest2.h"
/*-----------------------------------------------------------*/
/* The time between cycles of the 'check' functionality - as described at the
top of this file. */
#define mainNO_ERROR_PERIOD ( ( portTickType ) 5000 / portTICK_RATE_MS )
/* The rate at which the LED controlled by the 'check' task will flash should an
error have been detected. */
#define mainERROR_PERIOD ( ( portTickType ) 500 / portTICK_RATE_MS )
/* The LED controlled by the 'check' task. */
#define mainCHECK_LED ( 3 )
/* ComTest constants - there is no free LED for the comtest tasks. */
#define mainCOM_TEST_BAUD_RATE ( ( unsigned portLONG ) 19200 )
#define mainCOM_TEST_LED ( 5 )
/* Task priorities. */
#define mainCOM_TEST_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )
#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainGEN_QUEUE_TASK_PRIORITY ( tskIDLE_PRIORITY )
/* Co-routines are used to flash the LEDs. */
#define mainNUM_FLASH_CO_ROUTINES ( 3 )
/* The baud rate used by the comtest tasks. */
#define mainBAUD_RATE ( 38400 )
/* There is no spare LED for the comtest tasks, so this is set to an invalid
number. */
#define mainCOM_LED ( 4 )
/*
* Configure the hardware for the demo.
*/
static void prvSetupHardware( void );
/*
* Implements the 'check' task functionality as described at the top of this
* file.
*/
static void prvCheckTask( void *pvParameters );
/*
* Implement the 'Reg test' functionality as described at the top of this file.
*/
static void vRegTest1Task( void *pvParameters );
static void vRegTest2Task( void *pvParameters );
/*-----------------------------------------------------------*/
/* Counters used to detect errors within the reg test tasks. */
static volatile unsigned portLONG ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;
/*-----------------------------------------------------------*/
int main( void )
{
/* Setup the hardware ready for this demo. */
prvSetupHardware();
/* Start the standard demo tasks. */
vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );
vStartQueuePeekTasks();
vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainBAUD_RATE, mainCOM_LED );
/* For demo purposes use some co-routines to flash the LEDs. */
vStartFlashCoRoutines( mainNUM_FLASH_CO_ROUTINES );
/* Create the check task. */
xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
/* Start the reg test tasks - defined in this file. */
xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );
xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );
/* Start the scheduler. */
vTaskStartScheduler();
/* Will only get here if there was insufficient memory to create the idle
task. */
for( ;; )
{
}
}
/*-----------------------------------------------------------*/
static void prvCheckTask( void *pvParameters )
{
unsigned portLONG ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;
portTickType xLastExecutionTime;
volatile unsigned portBASE_TYPE uxUnusedStack;
( void ) pvParameters;
/* Initialise the variable used to control our iteration rate prior to
its first use. */
xLastExecutionTime = xTaskGetTickCount();
for( ;; )
{
/* Wait until it is time to run the tests again. */
vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );
/* Has an error been found in any task? */
if( xAreGenericQueueTasksStillRunning() != pdTRUE )
{
ulError |= 0x01UL;
}
if( xAreQueuePeekTasksStillRunning() != pdTRUE )
{
ulError |= 0x02UL;
}
if( xAreBlockingQueuesStillRunning() != pdTRUE )
{
ulError |= 0x04UL;
}
if( xAreSemaphoreTasksStillRunning() != pdTRUE )
{
ulError |= 0x20UL;
}
if( xAreComTestTasksStillRunning() != pdTRUE )
{
ulError |= 0x40UL;
}
if( ulLastRegTest1Count == ulRegTest1Counter )
{
ulError |= 0x1000UL;
}
if( ulLastRegTest2Count == ulRegTest2Counter )
{
ulError |= 0x1000UL;
}
ulLastRegTest1Count = ulRegTest1Counter;
ulLastRegTest2Count = ulRegTest2Counter;
/* If an error has been found then increase our cycle rate, and in so
doing increase the rate at which the check task LED toggles. */
if( ulError != 0 )
{
ulTicksToWait = mainERROR_PERIOD;
}
/* Toggle the LED each itteration. */
vParTestToggleLED( mainCHECK_LED );
/* For demo only - how much unused stack does this task have? */
uxUnusedStack = uxTaskGetStackHighWaterMark( NULL );
}
}
/*-----------------------------------------------------------*/
void prvSetupHardware( void )
{
portDISABLE_INTERRUPTS();
/* Setup the port used to toggle LEDs. */
vParTestInitialise();
}
/*-----------------------------------------------------------*/
void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )
{
/* This will get called if a stack overflow is detected during the context
switch. Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack
problems within nested interrupts, but only do this for debug purposes as
it will increase the context switch time. */
( void ) pxTask;
( void ) pcTaskName;
for( ;; )
{
}
}
/*-----------------------------------------------------------*/
void vApplicationIdleHook( void );
void vApplicationIdleHook( void )
{
/* The co-routines run in the idle task. */
vCoRoutineSchedule();
}
/*-----------------------------------------------------------*/
void exit( int n )
{
/* To keep the linker happy only as the libraries have been removed from
the build. */
( void ) n;
for( ;; ) {}
}
/*-----------------------------------------------------------*/
static void vRegTest1Task( void *pvParameters )
{
/* Sanity check - did we receive the parameter expected? */
if( pvParameters != &ulRegTest1Counter )
{
/* Change here so the check task can detect that an error occurred. */
for( ;; )
{
}
}
/* Set all the registers to known values, then check that each retains its
expected value - as described at the top of this file. If an error is
found then the loop counter will no longer be incremented allowing the check
task to recognise the error. */
asm volatile ( "reg_test_1_start: \n\t"
" moveq #1, d0 \n\t"
" moveq #2, d1 \n\t"
" moveq #3, d2 \n\t"
" moveq #4, d3 \n\t"
" moveq #5, d4 \n\t"
" moveq #6, d5 \n\t"
" moveq #7, d6 \n\t"
" moveq #8, d7 \n\t"
" move #9, a0 \n\t"
" move #10, a1 \n\t"
" move #11, a2 \n\t"
" move #12, a3 \n\t"
" move #13, a4 \n\t"
" move #14, a5 \n\t"
" move #15, a6 \n\t"
" \n\t"
" cmpi.l #1, d0 \n\t"
" bne reg_test_1_error \n\t"
" cmpi.l #2, d1 \n\t"
" bne reg_test_1_error \n\t"
" cmpi.l #3, d2 \n\t"
" bne reg_test_1_error \n\t"
" cmpi.l #4, d3 \n\t"
" bne reg_test_1_error \n\t"
" cmpi.l #5, d4 \n\t"
" bne reg_test_1_error \n\t"
" cmpi.l #6, d5 \n\t"
" bne reg_test_1_error \n\t"
" cmpi.l #7, d6 \n\t"
" bne reg_test_1_error \n\t"
" cmpi.l #8, d7 \n\t"
" bne reg_test_1_error \n\t"
" move a0, d0 \n\t"
" cmpi.l #9, d0 \n\t"
" bne reg_test_1_error \n\t"
" move a1, d0 \n\t"
" cmpi.l #10, d0 \n\t"
" bne reg_test_1_error \n\t"
" move a2, d0 \n\t"
" cmpi.l #11, d0 \n\t"
" bne reg_test_1_error \n\t"
" move a3, d0 \n\t"
" cmpi.l #12, d0 \n\t"
" bne reg_test_1_error \n\t"
" move a4, d0 \n\t"
" cmpi.l #13, d0 \n\t"
" bne reg_test_1_error \n\t"
" move a5, d0 \n\t"
" cmpi.l #14, d0 \n\t"
" bne reg_test_1_error \n\t"
" move a6, d0 \n\t"
" cmpi.l #15, d0 \n\t"
" bne reg_test_1_error \n\t"
" move ulRegTest1Counter, d0 \n\t"
" addq #1, d0 \n\t"
" move d0, ulRegTest1Counter \n\t"
" bra reg_test_1_start \n\t"
"reg_test_1_error: \n\t"
" bra reg_test_1_error \n\t"
);
}
/*-----------------------------------------------------------*/
static void vRegTest2Task( void *pvParameters )
{
/* Sanity check - did we receive the parameter expected? */
if( pvParameters != &ulRegTest2Counter )
{
/* Change here so the check task can detect that an error occurred. */
for( ;; )
{
}
}
/* Set all the registers to known values, then check that each retains its
expected value - as described at the top of this file. If an error is
found then the loop counter will no longer be incremented allowing the check
task to recognise the error. */
asm volatile ( "reg_test_2_start: \n\t"
" moveq #10, d0 \n\t"
" moveq #20, d1 \n\t"
" moveq #30, d2 \n\t"
" moveq #40, d3 \n\t"
" moveq #50, d4 \n\t"
" moveq #60, d5 \n\t"
" moveq #70, d6 \n\t"
" moveq #80, d7 \n\t"
" move #90, a0 \n\t"
" move #100, a1 \n\t"
" move #110, a2 \n\t"
" move #120, a3 \n\t"
" move #130, a4 \n\t"
" move #140, a5 \n\t"
" move #150, a6 \n\t"
" \n\t"
" cmpi.l #10, d0 \n\t"
" bne reg_test_2_error \n\t"
" cmpi.l #20, d1 \n\t"
" bne reg_test_2_error \n\t"
" cmpi.l #30, d2 \n\t"
" bne reg_test_2_error \n\t"
" cmpi.l #40, d3 \n\t"
" bne reg_test_2_error \n\t"
" cmpi.l #50, d4 \n\t"
" bne reg_test_2_error \n\t"
" cmpi.l #60, d5 \n\t"
" bne reg_test_2_error \n\t"
" cmpi.l #70, d6 \n\t"
" bne reg_test_2_error \n\t"
" cmpi.l #80, d7 \n\t"
" bne reg_test_2_error \n\t"
" move a0, d0 \n\t"
" cmpi.l #90, d0 \n\t"
" bne reg_test_2_error \n\t"
" move a1, d0 \n\t"
" cmpi.l #100, d0 \n\t"
" bne reg_test_2_error \n\t"
" move a2, d0 \n\t"
" cmpi.l #110, d0 \n\t"
" bne reg_test_2_error \n\t"
" move a3, d0 \n\t"
" cmpi.l #120, d0 \n\t"
" bne reg_test_2_error \n\t"
" move a4, d0 \n\t"
" cmpi.l #130, d0 \n\t"
" bne reg_test_2_error \n\t"
" move a5, d0 \n\t"
" cmpi.l #140, d0 \n\t"
" bne reg_test_2_error \n\t"
" move a6, d0 \n\t"
" cmpi.l #150, d0 \n\t"
" bne reg_test_2_error \n\t"
" move ulRegTest1Counter, d0 \n\t"
" addq #1, d0 \n\t"
" move d0, ulRegTest2Counter \n\t"
" bra reg_test_2_start \n\t"
"reg_test_2_error: \n\t"
" bra reg_test_2_error \n\t"
);
}
/*-----------------------------------------------------------*/

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@ -0,0 +1,293 @@
/*
Copyright 2001, 2002 Georges Menie (www.menie.org)
stdarg version contributed by Christian Ettinger
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU Lesser General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/*
putchar is the only external dependency for this file,
if you have a working putchar, leave it commented out.
If not, uncomment the define below and
replace outbyte(c) by your own function call.
*/
#define putchar(c) c
#include <stdarg.h>
static void printchar(char **str, int c)
{
//extern int putchar(int c);
if (str) {
**str = (char)c;
++(*str);
}
else
{
(void)putchar(c);
}
}
#define PAD_RIGHT 1
#define PAD_ZERO 2
static int prints(char **out, const char *string, int width, int pad)
{
register int pc = 0, padchar = ' ';
if (width > 0) {
register int len = 0;
register const char *ptr;
for (ptr = string; *ptr; ++ptr) ++len;
if (len >= width) width = 0;
else width -= len;
if (pad & PAD_ZERO) padchar = '0';
}
if (!(pad & PAD_RIGHT)) {
for ( ; width > 0; --width) {
printchar (out, padchar);
++pc;
}
}
for ( ; *string ; ++string) {
printchar (out, *string);
++pc;
}
for ( ; width > 0; --width) {
printchar (out, padchar);
++pc;
}
return pc;
}
/* the following should be enough for 32 bit int */
#define PRINT_BUF_LEN 12
static int printi(char **out, int i, int b, int sg, int width, int pad, int letbase)
{
char print_buf[PRINT_BUF_LEN];
register char *s;
register int t, neg = 0, pc = 0;
register unsigned int u = (unsigned int)i;
if (i == 0) {
print_buf[0] = '0';
print_buf[1] = '\0';
return prints (out, print_buf, width, pad);
}
if (sg && b == 10 && i < 0) {
neg = 1;
u = (unsigned int)-i;
}
s = print_buf + PRINT_BUF_LEN-1;
*s = '\0';
while (u) {
t = (unsigned int)u % b;
if( t >= 10 )
t += letbase - '0' - 10;
*--s = (char)(t + '0');
u /= b;
}
if (neg) {
if( width && (pad & PAD_ZERO) ) {
printchar (out, '-');
++pc;
--width;
}
else {
*--s = '-';
}
}
return pc + prints (out, s, width, pad);
}
static int print( char **out, const char *format, va_list args )
{
register int width, pad;
register int pc = 0;
char scr[2];
for (; *format != 0; ++format) {
if (*format == '%') {
++format;
width = pad = 0;
if (*format == '\0') break;
if (*format == '%') goto out;
if (*format == '-') {
++format;
pad = PAD_RIGHT;
}
while (*format == '0') {
++format;
pad |= PAD_ZERO;
}
for ( ; *format >= '0' && *format <= '9'; ++format) {
width *= 10;
width += *format - '0';
}
if( *format == 's' ) {
register char *s = (char *)va_arg( args, int );
pc += prints (out, s?s:"(null)", width, pad);
continue;
}
if( *format == 'd' ) {
pc += printi (out, va_arg( args, int ), 10, 1, width, pad, 'a');
continue;
}
if( *format == 'x' ) {
pc += printi (out, va_arg( args, int ), 16, 0, width, pad, 'a');
continue;
}
if( *format == 'X' ) {
pc += printi (out, va_arg( args, int ), 16, 0, width, pad, 'A');
continue;
}
if( *format == 'u' ) {
pc += printi (out, va_arg( args, int ), 10, 0, width, pad, 'a');
continue;
}
if( *format == 'c' ) {
/* char are converted to int then pushed on the stack */
scr[0] = (char)va_arg( args, int );
scr[1] = '\0';
pc += prints (out, scr, width, pad);
continue;
}
}
else {
out:
printchar (out, *format);
++pc;
}
}
if (out) **out = '\0';
va_end( args );
return pc;
}
int printf(const char *format, ...)
{
va_list args;
va_start( args, format );
return print( 0, format, args );
}
int sprintf(char *out, const char *format, ...)
{
va_list args;
va_start( args, format );
return print( &out, format, args );
}
int snprintf( char *buf, unsigned int count, const char *format, ... )
{
va_list args;
( void ) count;
va_start( args, format );
return print( &buf, format, args );
}
#ifdef TEST_PRINTF
int main(void)
{
char *ptr = "Hello world!";
char *np = 0;
int i = 5;
unsigned int bs = sizeof(int)*8;
int mi;
char buf[80];
mi = (1 << (bs-1)) + 1;
printf("%s\n", ptr);
printf("printf test\n");
printf("%s is null pointer\n", np);
printf("%d = 5\n", i);
printf("%d = - max int\n", mi);
printf("char %c = 'a'\n", 'a');
printf("hex %x = ff\n", 0xff);
printf("hex %02x = 00\n", 0);
printf("signed %d = unsigned %u = hex %x\n", -3, -3, -3);
printf("%d %s(s)%", 0, "message");
printf("\n");
printf("%d %s(s) with %%\n", 0, "message");
sprintf(buf, "justif: \"%-10s\"\n", "left"); printf("%s", buf);
sprintf(buf, "justif: \"%10s\"\n", "right"); printf("%s", buf);
sprintf(buf, " 3: %04d zero padded\n", 3); printf("%s", buf);
sprintf(buf, " 3: %-4d left justif.\n", 3); printf("%s", buf);
sprintf(buf, " 3: %4d right justif.\n", 3); printf("%s", buf);
sprintf(buf, "-3: %04d zero padded\n", -3); printf("%s", buf);
sprintf(buf, "-3: %-4d left justif.\n", -3); printf("%s", buf);
sprintf(buf, "-3: %4d right justif.\n", -3); printf("%s", buf);
return 0;
}
/*
* if you compile this file with
* gcc -Wall $(YOUR_C_OPTIONS) -DTEST_PRINTF -c printf.c
* you will get a normal warning:
* printf.c:214: warning: spurious trailing `%' in format
* this line is testing an invalid % at the end of the format string.
*
* this should display (on 32bit int machine) :
*
* Hello world!
* printf test
* (null) is null pointer
* 5 = 5
* -2147483647 = - max int
* char a = 'a'
* hex ff = ff
* hex 00 = 00
* signed -3 = unsigned 4294967293 = hex fffffffd
* 0 message(s)
* 0 message(s) with %
* justif: "left "
* justif: " right"
* 3: 0003 zero padded
* 3: 3 left justif.
* 3: 3 right justif.
* -3: -003 zero padded
* -3: -3 left justif.
* -3: -3 right justif.
*/
#endif
/* To keep linker happy. */
int write( int i, char* c, int n)
{
(void)i;
(void)n;
(void)c;
return 0;
}

View file

@ -0,0 +1,222 @@
/*
FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation and modified by the FreeRTOS exception.
**NOTE** The exception to the GPL is included to allow you to distribute a
combined work that includes FreeRTOS without being obliged to provide the
source code for proprietary components outside of the FreeRTOS kernel.
Alternative commercial license and support terms are also available upon
request. See the licensing section of http://www.FreeRTOS.org for full
license details.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details.
You should have received a copy of the GNU General Public License along
with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
Temple Place, Suite 330, Boston, MA 02111-1307 USA.
***************************************************************************
* *
* Looking for a quick start? Then check out the FreeRTOS eBook! *
* See http://www.FreeRTOS.org/Documentation for details *
* *
***************************************************************************
1 tab == 4 spaces!
Please ensure to read the configuration and relevant port sections of the
online documentation.
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/* BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER.
NOTE: This driver is primarily to test the scheduler functionality. It does
not effectively use the buffers or DMA and is therefore not intended to be
an example of an efficient driver. */
/* Standard include file. */
#include <stdlib.h>
/* Scheduler include files. */
#include "FreeRTOS.h"
#include "queue.h"
#include "task.h"
/* Demo app include files. */
#include "serial.h"
/* Hardware definitions. */
#define serNO_PARITY ( ( unsigned portCHAR ) 0x02 << 3 )
#define ser8DATA_BITS ( ( unsigned portCHAR ) 0x03 )
#define ser1STOP_BIT ( ( unsigned portCHAR ) 0x07 )
#define serSYSTEM_CLOCK ( ( unsigned portCHAR ) 0xdd )
#define serTX_ENABLE ( ( unsigned portCHAR ) 0x04 )
#define serRX_ENABLE ( ( unsigned portCHAR ) 0x01 )
#define serTX_INT ( ( unsigned portCHAR ) 0x01 )
#define serRX_INT ( ( unsigned portCHAR ) 0x02 )
/* The queues used to communicate between tasks and ISR's. */
static xQueueHandle xRxedChars;
static xQueueHandle xCharsForTx;
/* Flag used to indicate the tx status. */
static portBASE_TYPE xTxHasEnded = pdTRUE;
/*-----------------------------------------------------------*/
xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
{
const unsigned portLONG ulBaudRateDivisor = ( configCPU_CLOCK_HZ / ( 32UL * ulWantedBaud ) );
/* Create the queues used by the com test task. */
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
xCharsForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
xTxHasEnded = pdTRUE;
/* Set the pins to UART mode. */
MCF_GPIO_PUAPAR |= MCF_GPIO_PUAPAR_UTXD0_UTXD0;
MCF_GPIO_PUAPAR |= MCF_GPIO_PUAPAR_URXD0_URXD0;
/* Reset the peripheral. */
MCF_UART0_UCR = MCF_UART_UCR_RESET_RX;
MCF_UART0_UCR = MCF_UART_UCR_RESET_TX;
MCF_UART0_UCR = MCF_UART_UCR_RESET_ERROR;
MCF_UART0_UCR = MCF_UART_UCR_RESET_BKCHGINT;
MCF_UART0_UCR = MCF_UART_UCR_RESET_MR | MCF_UART_UCR_RX_DISABLED | MCF_UART_UCR_TX_DISABLED;
/* Configure the UART. */
MCF_UART0_UMR1 = serNO_PARITY | ser8DATA_BITS;
MCF_UART0_UMR2 = ser1STOP_BIT;
MCF_UART0_UCSR = serSYSTEM_CLOCK;
MCF_UART0_UBG1 = ( unsigned portCHAR ) ( ( ulBaudRateDivisor >> 8UL ) & 0xffUL );
MCF_UART0_UBG2 = ( unsigned portCHAR ) ( ulBaudRateDivisor & 0xffUL );
/* Turn it on. */
MCF_UART0_UCR = serTX_ENABLE | serRX_ENABLE;
/* Configure the interrupt controller. Run the UARTs above the kernel
interrupt priority for demo purposes. */
MCF_INTC0_ICR13 = ( ( configMAX_SYSCALL_INTERRUPT_PRIORITY - 1 ) << 3 );
MCF_INTC0_IMRL &= ~( MCF_INTC_IMRL_INT_MASK13 | 0x01 );
/* The Tx interrupt is not enabled until there is data to send. */
MCF_UART0_UIMR = serRX_INT;
/* Only a single port is implemented so we don't need to return anything. */
return NULL;
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
{
/* Only one port is supported. */
( void ) pxPort;
/* Get the next character from the buffer. Return false if no characters
are available or arrive before xBlockTime expires. */
if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
{
return pdTRUE;
}
else
{
return pdFALSE;
}
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
{
/* Only one port is supported. */
( void ) pxPort;
/* Return false if after the block time there is no room on the Tx queue. */
if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
{
return pdFAIL;
}
/* A critical section should not be required as xTxHasEnded will not be
written to by the ISR if it is already 0 (is this correct?). */
if( xTxHasEnded != pdFALSE )
{
xTxHasEnded = pdFALSE;
MCF_UART0_UIMR = serRX_INT | serTX_INT;
}
return pdPASS;
}
/*-----------------------------------------------------------*/
void vSerialClose( xComPortHandle xPort )
{
( void ) xPort;
}
/*-----------------------------------------------------------*/
__declspec(interrupt:0) void vUART0InterruptHandler( void )
{
unsigned portCHAR ucChar;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE, xDoneSomething = pdTRUE;
while( xDoneSomething != pdFALSE )
{
xDoneSomething = pdFALSE;
/* Does the tx buffer contain space? */
if( ( MCF_UART0_USR & MCF_UART_USR_TXRDY ) != 0x00 )
{
/* Are there any characters queued to be sent? */
if( xQueueReceiveFromISR( xCharsForTx, &ucChar, &xHigherPriorityTaskWoken ) == pdTRUE )
{
/* Send the next char. */
MCF_UART0_UTB = ucChar;
xDoneSomething = pdTRUE;
}
else
{
/* Turn off the Tx interrupt until such time as another character
is being transmitted. */
MCF_UART0_UIMR = serRX_INT;
xTxHasEnded = pdTRUE;
}
}
if( MCF_UART0_USR & MCF_UART_USR_RXRDY )
{
ucChar = MCF_UART0_URB;
xQueueSendFromISR( xRxedChars, &ucChar, &xHigherPriorityTaskWoken );
xDoneSomething = pdTRUE;
}
}
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
}

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@ -0,0 +1,312 @@
/*
* CF_Startup.c - Default init/startup/termination routines for
* Embedded Metrowerks C++
*
* Copyright © 1993-1998 Metrowerks, Inc. All Rights Reserved.
* Copyright © 2005 Freescale semiConductor Inc. All Rights Reserved.
*
*
* THEORY OF OPERATION
*
* This version of thestartup code is intended for linker relocated
* executables. The startup code will assign the stack pointer to
* __SP_INIT, assign the address of the data relative base address
* to a5, initialize the .bss/.sbss sections to zero, call any
* static C++ initializers and then call main. Upon returning from
* main it will call C++ destructors and call exit to terminate.
*/
#ifdef __cplusplus
#pragma cplusplus off
#endif
#pragma PID off
#pragma PIC off
#include "startcf.h"
#include "RuntimeConfig.h"
/* imported data */
extern unsigned long far _SP_INIT, _SDA_BASE;
extern unsigned long far _START_BSS, _END_BSS;
extern unsigned long far _START_SBSS, _END_SBSS;
extern unsigned long far __DATA_RAM, __DATA_ROM, __DATA_END;
/* imported routines */
extern void __call_static_initializers(void);
extern int main(int, char **);
extern void exit(int);
/* exported routines */
extern void _ExitProcess(void);
extern asm void _startup(void);
extern void __initialize_hardware(void);
extern void __initialize_system(void);
/*
* Dummy routine for initializing hardware. For user's custom systems, you
* can create your own routine of the same name that will perform HW
* initialization. The linker will do the right thing to ignore this
* definition and use the version in your file.
*/
#pragma overload void __initialize_hardware(void);
void __initialize_hardware(void)
{
}
/*
* Dummy routine for initializing systems. For user's custom systems,
* you can create your own routine of the same name that will perform
* initialization. The linker will do the right thing to ignore this
* definition and use the version in your file.
*/
#pragma overload void __initialize_system(void);
void __initialize_system(void)
{
}
/*
* Dummy routine for initializing C++. This routine will get overloaded by the C++ runtime.
*/
#pragma overload void __call_static_initializers(void);
void __call_static_initializers(void)
{
}
/*
* Routine to copy a single section from ROM to RAM ...
*/
static __declspec(register_abi) void __copy_rom_section(char* dst, const char* src, unsigned long size)
{
if (dst != src)
while (size--)
*dst++ = *src++;
}
/*
* Routine that copies all sections the user marked as ROM into
* their target RAM addresses ...
*
* __S_romp is automatically generated by the linker if it
* is referenced by the program. It is a table of RomInfo
* structures. The final entry in the table has all-zero
* fields.
*/
static void __copy_rom_sections_to_ram(void)
{
RomInfo *info;
/*
* Go through the entire table, copying sections from ROM to RAM.
*/
for (info = _S_romp; info->Source != 0L || info->Target != 0L || info->Size != 0; ++info)
__copy_rom_section( (char *)info->Target,(char *)info->Source, info->Size);
}
/*
* Exit handler called from the exit routine, if your OS needs
* to do something special for exit handling just replace this
* routines with what the OS needs to do ...
*/
asm void _ExitProcess(void)
{
illegal
rts
}
/*
* Routine to clear out blocks of memory should give good
* performance regardless of 68k or ColdFire part.
*/
static __declspec(register_abi) void clear_mem(char *dst, unsigned long n)
{
unsigned long i;
long *lptr;
if (n >= 32)
{
/* align start address to a 4 byte boundary */
i = (- (unsigned long) dst) & 3;
if (i)
{
n -= i;
do
*dst++ = 0;
while (--i);
}
/* use an unrolled loop to zero out 32byte blocks */
i = n >> 5;
if (i)
{
lptr = (long *)dst;
dst += i * 32;
do
{
*lptr++ = 0;
*lptr++ = 0;
*lptr++ = 0;
*lptr++ = 0;
*lptr++ = 0;
*lptr++ = 0;
*lptr++ = 0;
*lptr++ = 0;
}
while (--i);
}
i = (n & 31) >> 2;
/* handle any 4 byte blocks left */
if (i)
{
lptr = (long *)dst;
dst += i * 4;
do
*lptr++ = 0;
while (--i);
}
n &= 3;
}
/* handle any byte blocks left */
if (n)
do
*dst++ = 0;
while (--n);
}
/*
* Startup routine for embedded application ...
*/
asm void _startup(void)
{
/* disable interrupts */
move.w #0x2700,sr
/* Pre-init SP, in case memory for stack is not valid it should be setup using
MEMORY_INIT before __initialize_hardware is called
*/
lea __SP_AFTER_RESET,a7;
/* initialize memory */
MEMORY_INIT
/* initialize any hardware specific issues */
jsr __initialize_hardware
/* setup the stack pointer */
lea _SP_INIT,a7
/* setup A6 dummy stackframe */
movea.l #0,a6
link a6,#0
/* setup A5 */
lea _SDA_BASE,a5
/* zero initialize the .bss section */
lea _END_BSS, a0
lea _START_BSS, a1
suba.l a1, a0
move.l a0, d0
beq __skip_bss__
lea _START_BSS, a0
/* call clear_mem with base pointer in a0 and size in d0 */
jsr clear_mem
__skip_bss__:
/* zero initialize the .sbss section */
lea _END_SBSS, a0
lea _START_SBSS, a1
suba.l a1, a0
move.l a0, d0
beq __skip_sbss__
lea _START_SBSS, a0
/* call clear_mem with base pointer in a0 and size in d0 */
jsr clear_mem
__skip_sbss__:
/* copy all ROM sections to their RAM locations ... */
#if SUPPORT_ROM_TO_RAM
/*
* _S_romp is a null terminated array of
* typedef struct RomInfo {
* unsigned long Source;
* unsigned long Target;
* unsigned long Size;
* } RomInfo;
*
* Watch out if you're rebasing using _PICPID_DELTA
*/
lea _S_romp, a0
move.l a0, d0
beq __skip_rom_copy__
jsr __copy_rom_sections_to_ram
#else
/*
* There's a single block to copy from ROM to RAM, perform
* the copy directly without using the __S_romp structure
*/
lea __DATA_RAM, a0
lea __DATA_ROM, a1
cmpa a0,a1
beq __skip_rom_copy__
move.l #__DATA_END, d0
sub.l a0, d0
jsr __copy_rom_section
#endif
__skip_rom_copy__:
/* call C++ static initializers (__sinit__(void)) */
jsr __call_static_initializers
jsr __initialize_system
/* call main(int, char **) */
pea __argv
clr.l -(sp) /* clearing a long is ok since it's caller cleanup */
jsr main
addq.l #8, sp
unlk a6
/* now call exit(0) to terminate the application */
clr.l -(sp)
jsr exit
addq.l #4, sp
/* should never reach here but just in case */
illegal
rts
/* exit will never return */
__argv:
dc.l 0
}

View file

@ -0,0 +1,74 @@
/******************************************************************************
FILE : startcf.h
PURPOSE : startup code for ColdFire
LANGUAGE: C
Notes:
1) Default entry point is _startup.
. disable interrupts
. the SP is set to __SP_AFTER_RESET
. SP must be initialized to valid memory
in case the memory it points to is not valid using MEMORY_INIT macro
2) __initialize_hardware is called. Here you can initialize memory and some peripherics
at this point global variables are not initialized yet
3) After __initialize_hardware memory is setup; initialize SP to _SP_INIT and perform
needed initialisations for the language (clear memory, data rom copy).
4) void __initialize_system(void); is called
to allow additional hardware initialization (UART, GPIOs, etc...)
5) Jump to main
*/
/********************************************************************************/
#ifndef STARTCF_H
#define STARTCF_H
#ifdef __cplusplus
extern "C" {
#endif
#include "support_common.h"
extern unsigned long far __SP_INIT[];
extern unsigned long far __SP_AFTER_RESET[];
#ifndef MEMORY_INIT
/* If MEMORY_INIT is set then it performs
minimal memory initialization (to preset SP to __SP_AFTER_RESET, etc...)
*/
#define MEMORY_INIT
#endif
void _startup(void);
#ifndef SUPPORT_ROM_TO_RAM
/*
* If SUPPORT_ROM_TO_RAM is set, _S_romp is used to define the copy to be performed.
* If it is not set, there's a single block to copy, performed directly without
* using the __S_romp structure, based on __DATA_RAM, __DATA_ROM and
* __DATA_END symbols.
*
* Set to 0 for more aggressive dead stripping ...
*/
#define SUPPORT_ROM_TO_RAM 1
#endif
/* format of the ROM table info entry ... */
typedef struct RomInfo {
void *Source;
void *Target;
unsigned long Size;
} RomInfo;
/* imported data */
extern far RomInfo _S_romp[]; /* linker defined symbol */
#ifdef __cplusplus
}
#endif
#endif

View file

@ -0,0 +1,509 @@
/* FILENAME: stdlib.c
*
* Functions normally found in a standard C lib.
*
* 12/28/2005 - added memcmp and memmove
*
* Notes: These functions support ASCII only!!!
*/
#include "support_common.h"
#include "stdlib.h"
/***********************************************************************/
/*
* Misc. Defines
*/
#ifdef FALSE
#undef FALSE
#endif
#define FALSE (0)
#ifdef TRUE
#undef TRUE
#endif
#define TRUE (1)
#ifdef NULL
#undef NULL
#endif
#define NULL (0)
#ifdef ON
#undef ON
#endif
#define ON (1)
#ifdef OFF
#undef OFF
#endif
#define OFF (0)
/****************************************************************/
int
isspace (int ch)
{
if ((ch == ' ') || (ch == '\t')) /* \n ??? */
return TRUE;
else
return FALSE;
}
/****************************************************************/
int
isalnum (int ch)
{
/* ASCII only */
if (((ch >= '0') && (ch <= '9')) ||
((ch >= 'A') && (ch <= 'Z')) ||
((ch >= 'a') && (ch <= 'z')))
return TRUE;
else
return FALSE;
}
/****************************************************************/
int
isdigit (int ch)
{
/* ASCII only */
if ((ch >= '0') && (ch <= '9'))
return TRUE;
else
return FALSE;
}
/****************************************************************/
int
isupper (int ch)
{
/* ASCII only */
if ((ch >= 'A') && (ch <= 'Z'))
return TRUE;
else
return FALSE;
}
/****************************************************************/
int
strcasecmp (const char *s1, const char *s2)
{
char c1, c2;
int result = 0;
while (result == 0)
{
c1 = *s1++;
c2 = *s2++;
if ((c1 >= 'a') && (c1 <= 'z'))
c1 = (char)(c1 - ' ');
if ((c2 >= 'a') && (c2 <= 'z'))
c2 = (char)(c2 - ' ');
if ((result = (c1 - c2)) != 0)
break;
if ((c1 == 0) || (c2 == 0))
break;
}
return result;
}
/****************************************************************/
int
stricmp (const char *s1, const char *s2)
{
return (strcasecmp(s1, s2));
}
/****************************************************************/
int
strncasecmp (const char *s1, const char *s2, int n)
{
char c1, c2;
int k = 0;
int result = 0;
while ( k++ < n )
{
c1 = *s1++;
c2 = *s2++;
if ((c1 >= 'a') && (c1 <= 'z'))
c1 = (char)(c1 - ' ');
if ((c2 >= 'a') && (c2 <= 'z'))
c2 = (char)(c2 - ' ');
if ((result = (c1 - c2)) != 0)
break;
if ((c1 == 0) || (c2 == 0))
break;
}
return result;
}
/****************************************************************/
int
strnicmp (const char *s1, const char *s2, int n)
{
return (strncasecmp(s1, s2, n));
}
/****************************************************************/
uint32
strtoul (char *str, char **ptr, int base)
{
unsigned long rvalue = 0;
int neg = 0;
int c;
/* Validate parameters */
if ((str != NULL) && (base >= 0) && (base <= 36))
{
/* Skip leading white spaces */
while (isspace(*str))
{
++str;
}
/* Check for notations */
switch (str[0])
{
case '0':
if (base == 0)
{
if ((str[1] == 'x') || (str[1] == 'X'))
{
base = 16;
str += 2;
}
else
{
base = 8;
str++;
}
}
break;
case '-':
neg = 1;
str++;
break;
case '+':
str++;
break;
default:
break;
}
if (base == 0)
base = 10;
/* Valid "digits" are 0..9, A..Z, a..z */
while (isalnum(c = *str))
{
/* Convert char to num in 0..36 */
if ((c -= ('a' - 10)) < 10) /* 'a'..'z' */
{
if ((c += ('a' - 'A')) < 10) /* 'A'..'Z' */
{
c += ('A' - '0' - 10); /* '0'..'9' */
}
}
/* check c against base */
if (c >= base)
{
break;
}
if (neg)
{
rvalue = (rvalue * base) - c;
}
else
{
rvalue = (rvalue * base) + c;
}
++str;
}
}
/* Upon exit, 'str' points to the character at which valid info */
/* STOPS. No chars including and beyond 'str' are used. */
if (ptr != NULL)
*ptr = str;
return rvalue;
}
/****************************************************************/
int
atoi (const char *str)
{
char *s = (char *)str;
return ((int)strtoul(s, NULL, 10));
}
/****************************************************************/
int
strlen (const char *str)
{
char *s = (char *)str;
int len = 0;
if (s == NULL)
return 0;
while (*s++ != '\0')
++len;
return len;
}
/****************************************************************/
char *
strcat (char *dest, const char *src)
{
char *dp;
char *sp = (char *)src;
if ((dest != NULL) && (src != NULL))
{
dp = &dest[strlen(dest)];
while (*sp != '\0')
{
*dp++ = *sp++;
}
*dp = '\0';
}
return dest;
}
/****************************************************************/
char *
strncat (char *dest, const char *src, int n)
{
char *dp;
char *sp = (char *)src;
if ((dest != NULL) && (src != NULL) && (n > 0))
{
dp = &dest[strlen(dest)];
while ((*sp != '\0') && (n-- > 0))
{
*dp++ = *sp++;
}
*dp = '\0';
}
return dest;
}
/****************************************************************/
char *
strcpy (char *dest, const char *src)
{
char *dp = (char *)dest;
char *sp = (char *)src;
if ((dest != NULL) && (src != NULL))
{
while (*sp != '\0')
{
*dp++ = *sp++;
}
*dp = '\0';
}
return dest;
}
/****************************************************************/
char *
strncpy (char *dest, const char *src, int n)
{
char *dp = (char *)dest;
char *sp = (char *)src;
if ((dest != NULL) && (src != NULL) && (n > 0))
{
while ((*sp != '\0') && (n-- > 0))
{
*dp++ = *sp++;
}
*dp = '\0';
}
return dest;
}
/****************************************************************/
int
strcmp (const char *s1, const char *s2)
{
/* No checks for NULL */
char *s1p = (char *)s1;
char *s2p = (char *)s2;
while (*s2p != '\0')
{
if (*s1p != *s2p)
break;
++s1p;
++s2p;
}
return (*s1p - *s2p);
}
/****************************************************************/
int
strncmp (const char *s1, const char *s2, int n)
{
/* No checks for NULL */
char *s1p = (char *)s1;
char *s2p = (char *)s2;
if (n <= 0)
return 0;
while (*s2p != '\0')
{
if (*s1p != *s2p)
break;
if (--n == 0)
break;
++s1p;
++s2p;
}
return (*s1p - *s2p);
}
/****************************************************************/
char *
strstr(const char *s1, const char *s2)
{
char *sp = (char *)s1;
int len1 = strlen(s1);
int len2 = strlen(s2);
while (len1 >= len2)
{
if (strncmp(sp, s2, len2) == 0)
{
return (sp);
}
++sp;
--len1;
}
return (NULL);
}
/****************************************************************/
char *
strchr(const char *str, int c)
{
char *sp = (char *)str;
char ch = (char)(c & 0xff);
while (*sp != '\0')
{
if (*sp == ch)
{
return (sp);
}
++sp;
}
return (NULL);
}
/****************************************************************/
void *
memcpy (void *dest, const void *src, unsigned n)
{
unsigned char *dbp = (unsigned char *)dest;
unsigned char *sbp = (unsigned char *)src;
if ((dest != NULL) && (src != NULL) && (n > 0))
{
while (n--)
*dbp++ = *sbp++;
}
return dest;
}
/****************************************************************/
void *
memset (void *s, int c, unsigned n)
{
/* Not optimized, but very portable */
unsigned char *sp = (unsigned char *)s;
if ((s != NULL) && (n > 0))
{
while (n--)
{
*sp++ = (unsigned char)c;
}
}
return s;
}
/****************************************************************/
int
memcmp (const void *s1, const void *s2, unsigned n)
{
unsigned char *s1p, *s2p;
if (s1 && s2 && (n > 0))
{
s1p = (unsigned char *)s1;
s2p = (unsigned char *)s2;
while ((--n >= 0) && (*s1p == *s2p))
{
if (*s1p != *s2p)
return (*s1p - *s2p);
++s1p;
++s2p;
}
}
return (0);
}
/****************************************************************/
void *
memmove (void *dest, const void *src, unsigned n)
{
unsigned char *dbp = (unsigned char *)dest;
unsigned char *sbp = (unsigned char *)src;
unsigned char *dend = dbp + n;
unsigned char *send = sbp + n;
if ((dest != NULL) && (src != NULL) && (n > 0))
{
/* see if a memcpy would overwrite source buffer */
if ((sbp < dbp) && (dbp < send))
{
while (n--)
*(--dend) = *(--send);
}
else
{
while (n--)
*dbp++ = *sbp++;
}
}
return dest;
}
/****************************************************************/

View file

@ -0,0 +1,79 @@
/*
* File: stdlib.h
* Purpose: Function prototypes for standard library functions
*
* Notes:
*/
#ifndef _STDLIB_H
#define _STDLIB_H
/********************************************************************
* Standard library functions
********************************************************************/
int
isspace (int);
int
isalnum (int);
int
isdigit (int);
int
isupper (int);
int
strcasecmp (const char *, const char *);
int
strncasecmp (const char *, const char *, int);
unsigned long
strtoul (char *, char **, int);
int
strlen (const char *);
char *
strcat (char *, const char *);
char *
strncat (char *, const char *, int);
char *
strcpy (char *, const char *);
char *
strncpy (char *, const char *, int);
int
strcmp (const char *, const char *);
int
strncmp (const char *, const char *, int);
void *
memcpy (void *, const void *, unsigned);
void *
memset (void *, int, unsigned);
void
free (void *);
void *
malloc (unsigned);
#define RAND_MAX 32767
int
rand (void);
void
srand (int);
/********************************************************************/
#endif

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/*
* File: support_common.h
* Purpose: Various project configurations.
*
* Notes:
*/
#ifndef _SUPPORT_COMMON_H_
#define _SUPPORT_COMMON_H_
/* Enable UART Support. */
#define ENABLE_UART_SUPPORT 0
#define MEMORY_INIT \
/* Initialize RAMBAR: locate SRAM and validate it */ \
move.l %#__RAMBAR + 0x21,d0; \
movec d0,RAMBAR;
#define SUPPORT_ROM_TO_RAM 1
/*
* Include the derivative header files
*/
#include "MCF52221.h"
/*
* Include the board specific header files
*/
#include "MCF52221_sysinit.h"
/********************************************************************/
#endif /* _SUPPORT_COMMON_H_ */

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/*
* File: uart_support.c
* Purpose: Implements UART basic support, Derivative Specific Interrupt handler and need function needed
* for MSL Support (printf\cout to terminal), defined in <UART.h>
*
* Notes:
*
*/
#include "support_common.h"
#include "uart_support.h"
#if ENABLE_UART_SUPPORT==1
#if UART_SUPPORT_TYPE==UART_PSC
/* 5475 & 5485 boards have different names for uart access registers */
void uart_init(int channel, unsigned long systemClockKHz, unsigned long baudRate)
{
register uint16 ubgs;
/*
* On Verdi, only PSC 0 & 1 are brought out to RS232 transceivers
*/
/* Put PSC in UART mode */
MCF_PSC_PSCSICR(channel) = MCF_PSC_PSCSICR_SIM_UART;
/* Rx and Tx baud rate from timers */
MCF_PSC_PSCCSR(channel) = (0
| MCF_PSC_PSCCSR_RCSEL_SYS_CLK
| MCF_PSC_PSCCSR_TCSEL_SYS_CLK);
/*
* Calculate baud settings
*/
ubgs = (uint16)((systemClockKHz * 1000)/(baudRate * 32));
MCF_PSC_PSCCTUR(channel) = (uint8) ((ubgs >> 8) & 0xFF);
MCF_PSC_PSCCTLR(channel) = (uint8) (ubgs & 0xFF);
/* Reset transmitter, receiver, mode register, and error conditions */
MCF_PSC_PSCCR(channel) = MCF_PSC_PSCCR_RESET_RX;
MCF_PSC_PSCCR(channel) = MCF_PSC_PSCCR_RESET_TX;
MCF_PSC_PSCCR(channel) = MCF_PSC_PSCCR_RESET_ERROR;
MCF_PSC_PSCCR(channel) = MCF_PSC_PSCCR_RESET_BKCHGINT;
MCF_PSC_PSCCR(channel) = MCF_PSC_PSCCR_RESET_MR;
/* 8-bit data, no parity */
MCF_PSC_PSCMR(channel) = (0
#ifdef UART_HARDWARE_FLOW_CONTROL
| MCF_PSC_PSCMR_RXRTS
#endif
| MCF_PSC_PSCMR_PM_NONE
| MCF_PSC_PSCMR_BC_8);
/* No echo or loopback, 1 stop bit */
MCF_PSC_PSCMR(channel) = (0
#ifdef UART_HARDWARE_FLOW_CONTROL
| MCF_PSC_PSCMR_TXCTS
#endif
| MCF_PSC_PSCMR_CM_NORMAL
| MCF_PSC_PSCMR_SB_STOP_BITS_1);
/* Mask all UART interrupts */
MCF_PSC_PSCIMR(channel) = 0x0000;
/* Enable RTS to send */
MCF_PSC_PSCOPSET(channel) = MCF_PSC_PSCOPSET_RTS;
/* Setup FIFO Alarms */
MCF_PSC_PSCRFAR(channel) = MCF_PSC_PSCRFAR_ALARM(248);
MCF_PSC_PSCTFAR(channel) = MCF_PSC_PSCTFAR_ALARM(248);
/* Enable receiver and transmitter */
MCF_PSC_PSCCR(channel) =(0
| MCF_PSC_PSCCR_RX_ENABLED
| MCF_PSC_PSCCR_TX_ENABLED);
}
/********************************************************************/
/*
* Wait for a character to be received on the specified UART
*
* Return Values:
* the received character
*/
char uart_getchar (int channel)
{
/* Wait until character has been received */
while (!(MCF_PSC_PSCSR(channel) & MCF_PSC_PSCSR_RXRDY))
{
}
return (char)(*((uint8 *) &MCF_PSC_PSCRB_8BIT(channel)));
}
/********************************************************************/
/*
* Wait for space in the UART Tx FIFO and then send a character
*/
void uart_putchar (int channel, char ch)
{
/* Wait until space is available in the FIFO */
while (!(MCF_PSC_PSCSR(channel) & MCF_PSC_PSCSR_TXRDY))
;
*((uint8 *) &MCF_PSC_PSCTB_8BIT(channel)) = (uint8)ch;
}
#else /* UART_SUPPORT_TYPE==UART_PSC */
#if UART_SUPPORT_TYPE == UART_5407
/********************************************************************/
/*
* 5407 derivative doesn't have macros to access URB/UTB by channel number
* because they have different sizes for UART0 & UART1
* But in UART mode only 8 bits of UART1 URB/UTB is used, so define these macros here
* if they doesn't defined before
*/
#ifndef MCF_UART_URB
#define MCF_UART_URB(x) (*(vuint8 *)(&__MBAR[0x1CC + ((x)*0x40)]))
#endif /* MCF_UART_URB */
#ifndef MCF_UART_UTB
#define MCF_UART_UTB(x) (*(vuint8 *)(&__MBAR[0x1CC + ((x)*0x40)]))
#endif /* MCF_UART_UTB */
#endif /* UART_SUPPORT_TYPE == UART_5407 */
void uart_init(int channel, unsigned long systemClockKHz, unsigned long baudRate)
{
/*
* Initialize UART for serial communications
*/
register uint16 ubgs;
#if UART_SUPPORT_TYPE==UART_54451
uint32 vco;
uint32 divider;
uint32 bus_clk;
divider = ((MCF_CLOCK_PCR & 0x000000F0) >> 4) + 1;
vco = ((MCF_CLOCK_PCR >> 24) * systemClockKHz * 1000);
bus_clk = (vco / divider);
#endif
/*
* Reset Transmitter
*/
MCF_UART_UCR(channel) = MCF_UART_UCR_RESET_TX;
/*
* Reset Receiver
*/
MCF_UART_UCR(channel) = MCF_UART_UCR_RESET_RX;
/*
* Reset Mode Register
*/
MCF_UART_UCR(channel) = MCF_UART_UCR_RESET_MR;
/*
* No parity, 8-bits per character
*/
MCF_UART_UMR(channel) = (0
| MCF_UART_UMR_PM_NONE
| MCF_UART_UMR_BC_8 );
/*
* No echo or loopback, 1 stop bit
*/
MCF_UART_UMR(channel) = (0
| MCF_UART_UMR_CM_NORMAL
| MCF_UART_UMR_SB_STOP_BITS_1);
/*
* Set Rx and Tx baud by SYSTEM CLOCK
*/
MCF_UART_UCSR(channel) = (0
| MCF_UART_UCSR_RCS_SYS_CLK
| MCF_UART_UCSR_TCS_SYS_CLK);
/*
* Mask all UART interrupts
*/
MCF_UART_UIMR(channel) = 0;
/*
* Calculate baud settings
*/
#if UART_SUPPORT_TYPE==UART_54451
ubgs = (uint16)(((bus_clk >> 5) + (baudRate >> 1)) / baudRate);
#else
ubgs = (uint16)((systemClockKHz * 1000)/(baudRate * 32));
#endif
#if UART_SUPPORT_TYPE==UART_DIVIDER || UART_SUPPORT_TYPE == UART_5407
MCF_UART_UDU(channel) = (uint8)((ubgs & 0xFF00) >> 8);
MCF_UART_UDL(channel) = (uint8)(ubgs & 0x00FF);
#else /* UART_SUPPORT_TYPE!=UART_DIVIDER */
MCF_UART_UBG1(channel) = (uint8)((ubgs & 0xFF00) >> 8);
MCF_UART_UBG2(channel) = (uint8)(ubgs & 0x00FF);
#endif /* UART_SUPPORT_TYPE==UART_DIVIDER */
/*
* Enable receiver and transmitter
*/
MCF_UART_UCR(channel) = (0
| MCF_UART_UCR_TX_ENABLED
| MCF_UART_UCR_RX_ENABLED);
}
/********************************************************************/
/*
* Wait for a character to be received on the specified UART
*
* Return Values:
* the received character
*/
char uart_getchar (int channel)
{
/* Wait until character has been received */
while (!(MCF_UART_USR(channel) & MCF_UART_USR_RXRDY))
{
};
return (char)MCF_UART_URB(channel);
}
/********************************************************************/
/*
* Wait for space in the UART Tx FIFO and then send a character
*/
void uart_putchar (int channel, char ch)
{
/* Wait until space is available in the FIFO */
while (!(MCF_UART_USR(channel) & MCF_UART_USR_TXRDY))
{
};
/* Send the character */
MCF_UART_UTB(channel) = (uint8)ch;
}
#endif /* UART_SUPPORT_TYPE==UART_PSC */
/********************************************************************/
/********************************************************************/
/** <UART.h> Neeeded functions **/
/********************************************************************/
/****************************************************************************/
/*
* Implementation for CodeWarror MSL interface to serial device (UART.h).
* Needed for printf, etc...
* Only InitializeUART, ReadUARTN, and WriteUARTN are implemented.
*
*/
UARTError InitializeUART(UARTBaudRate baudRate)
{
#if UART_SUPPORT_TYPE==UART_54451
baudRate = kBaud115200;
#endif
uart_init(TERMINAL_PORT, SYSTEM_CLOCK_KHZ, baudRate);
return kUARTNoError;
}
/****************************************************************************/
/*
ReadUARTN
Read N bytes from the UART.
bytes pointer to result buffer
limit size of buffer and # of bytes to read
*/
/****************************************************************************/
UARTError ReadUARTN(void* bytes, unsigned long limit)
{
int count;
for (count = 0; count < limit; count++) {
*( (char *)bytes + count ) = uart_getchar(TERMINAL_PORT);
}
return kUARTNoError;
}
/****************************************************************************/
UARTError WriteUARTN(const void* bytes, unsigned long length)
{
int count;
for (count = 0; count < length; count++) {
uart_putchar(TERMINAL_PORT, *( ((char *)bytes) + count));
}
return kUARTNoError;
}
#endif /* ENABLE_UART_SUPPORT */

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/*
* File: uart_support.h
* Purpose: Implements UART basic support, Derivative Specific Interrupt handler and need function needed
* for MSL Support (printf\cout to terminal), defined in <UART.h>
*
* Notes:
*
*/
#ifndef __UART_SUPPORT_H__
#define __UART_SUPPORT_H__
#ifdef __cplusplus
extern "C" {
#endif
#include "support_common.h"
#if ENABLE_UART_SUPPORT==1
/*
* Include the Freescale UART specific header file for printf/cout/scanf support
*/
#include <ansi_parms.h>
#ifdef __cplusplus
extern "C" {
#endif
#include <UART.h>
#ifdef __cplusplus
}
#endif
#define UART_STANDARD 0
#define UART_DIVIDER 1
#define UART_5407 2
#define UART_PSC 3
#define UART_54451 4
#define UART_SUPPORT_TYPE UART_STANDARD
void uart_init(int channel, unsigned long systemClockKHz, unsigned long baudRate);
/********************************************************************/
/*
* Wait for a character to be received on the specified UART
*
* Return Values:
* the received character
*/
char uart_getchar (int channel);
/********************************************************************/
/*
* Wait for space in the UART Tx FIFO and then send a character
*/
void uart_putchar (int channel, char ch);
#endif /* ENABLE_UART_SUPPORT */
#ifdef __cplusplus
}
#endif
#endif /* __UART_SUPPORT_H__ */