diff --git a/.github/ISSUE_TEMPLATE/bug-report.md b/.github/ISSUE_TEMPLATE/bug-report.md index 9e0f24291..cfb80a992 100644 --- a/.github/ISSUE_TEMPLATE/bug-report.md +++ b/.github/ISSUE_TEMPLATE/bug-report.md @@ -34,3 +34,5 @@ If applicable, add screenshots to help explain your problem. Add any other context about the problem here. e.g. code snippet to reproduce the issue. e.g. stack trace, memory dump, debugger log, and many etc. + + diff --git a/.github/ISSUE_TEMPLATE/documentation-issue.md b/.github/ISSUE_TEMPLATE/documentation-issue.md index 062a678b5..7f48e7a57 100644 --- a/.github/ISSUE_TEMPLATE/documentation-issue.md +++ b/.github/ISSUE_TEMPLATE/documentation-issue.md @@ -19,3 +19,5 @@ If applicable, please attach screenshot. **Browser** - Browser: [e.g. Chrome] - Version: [e.g. 80.0.3987.132] + + diff --git a/.github/ISSUE_TEMPLATE/general-inquiry.md b/.github/ISSUE_TEMPLATE/general-inquiry.md deleted file mode 100644 index d3b8baf70..000000000 --- a/.github/ISSUE_TEMPLATE/general-inquiry.md +++ /dev/null @@ -1,12 +0,0 @@ ---- -name: General inquiry -about: Free form communication. -title: "[Inquiry]" -labels: question -assignees: '' - ---- - -We do encourage you to take a look at [FreeRTOS official site](https://www.freertos.org) for general information and [FreeRTOS forum](https://forums.freertos.org) to access our community. - -If still needed, could create a general inquiry report here. diff --git a/.github/actions/url_verifier.sh b/.github/actions/url_verifier.sh new file mode 100755 index 000000000..4e9575aa3 --- /dev/null +++ b/.github/actions/url_verifier.sh @@ -0,0 +1,59 @@ +#!/bin/bash - + +PROJECT=$1 +echo "Verifying url links of: ${PROJECT}" +if [ ! -d "$PROJECT" ] +then + echo "Directory passed does not exist" + exit 2 +fi + +SCRIPT_RET=0 + +set -o nounset # Treat unset variables as an error + +declare -A dict + +function test { + while IFS= read -r LINE; do + FILE=$(echo $LINE | cut -f 1 -d ':') + URL=$(echo $LINE | grep -IoE '\b(https?|ftp|file)://[-A-Za-z0-9+&@#/%?=~_|!:,.;]*[-A-Za-z0-9+&@#/%=~_|]') + + # remove trailing / if it exists curl diferenciate between links with + # and without / at the end + # URL=`echo "$URL" | sed 's,/$,,'` + dict+=(["$URL"]="$FILE ") + done < <(grep -e 'https\?://' ${PROJECT} -RIa --exclude='*.exe' --exclude-dir=.git | tr '*' ' ') + + for UNIQ_URL in ${!dict[@]} # loop urls + do + CURL_RES=$(curl -I ${UNIQ_URL} 2>/dev/null| head -n 1 | cut -f 2 -d ' ') + RES=$? + + if [ "${CURL_RES}" == '' -o "${CURL_RES}" != '200' ] + then + echo "URL is: ${UNIQ_URL}" + echo "File names: ${dict[$UNIQ_URL]}" + if [ "${CURL_RES}" == '' ] # curl returned an error + then + CURL_RES=$RES + SCRIPT_RET=1 + elif [ "${CURL_RES}" == '403' ] + then + SCRIPT_RET=1 + fi + echo Result is: "${CURL_RES}" + echo "=================================" + fi + done + + if [ "${SCRIPT_RET}" -eq 0 ] + then + exit 0 + else + exit 1 + fi +} + +test + diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml new file mode 100644 index 000000000..593c384f8 --- /dev/null +++ b/.github/workflows/ci.yml @@ -0,0 +1,46 @@ +name: CI Checks +on: + push: + branches: ["**"] + pull_request: + branches: [master] + workflow_dispatch: +jobs: + spell-check: + runs-on: ubuntu-latest + steps: + - name: Checkout Parent Repo + uses: actions/checkout@v2 + with: + ref: master + repository: aws/aws-iot-device-sdk-embedded-C + path: main + - name: Clone This Repo + uses: actions/checkout@v2 + with: + path: ./kernel + - name: Install spell + run: | + sudo apt-get install spell + sudo apt-get install util-linux + - name: Check spelling + run: | + PATH=$PATH:main/tools/spell + # Make sure that the portable directory is not included in the spellcheck. + sed -i 's/find $DIRNAME/find $DIRNAME -not -path '*portable*'/g' main/tools/spell/find-unknown-comment-words + find-unknown-comment-words --directory kernel/ + if [ "$?" = "0" ]; then + exit 0 + else + exit 1 + fi + url-check: + runs-on: ubuntu-latest + steps: + - name: Clone This Repo + uses: actions/checkout@v2 + with: + path: ./kernel + - name: URL Checker + run: | + bash kernel/.github/actions/url_verifier.sh kernel diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md index f2cca892c..0aeb817ee 100644 --- a/CONTRIBUTING.md +++ b/CONTRIBUTING.md @@ -1,70 +1,70 @@ -# Contribution guidelines - -Thank you for your interest in contributing to our project. Whether it's a bug report, new feature, code, or -documentation, we welcome our community to be involved in this project. - -Please read through this document before submitting any issues or pull requests to ensure we are able to help you and all members of the community as effectively as possible. - -## Code of conduct -This project has adopted the [Amazon Open Source Code of Conduct](https://aws.github.io/code-of-conduct). -For more information see the [Code of Conduct FAQ](https://aws.github.io/code-of-conduct-faq) or contact -opensource-codeofconduct@amazon.com with any additional questions or comments. - - -## Security issue notifications -If you discover a potential security issue in this project we ask that you notify AWS/Amazon Security via our [vulnerability reporting page](http://aws.amazon.com/security/vulnerability-reporting/). Please do **not** create a public github issue. - - -## Submitting a bugs/feature request -Have a bug to report or feature to request? Follow these steps: -1. Search on the [FreeRTOS Community Support Forums](https://forums.freertos.org/) and [GitHub issue tracker](https://github.com/FreeRTOS/FreeRTOS/issues?utf8=%E2%9C%93&q=is%3Aissue) to be sure this hasn't been already reported or discussed. -2. If your search turns up empty, create a new topic in the [forums](https://forums.freertos.org/) and work with the community to help clarify issues or refine the idea. Include as many of the details listed below. -3. Once the community has had time to discuss and digest, we welcome you to create an [issue](https://github.com/FreeRTOS/FreeRTOS/issues) to report bugs or suggest features. - -When creating a new topic on the forums or filing an issue, please include as many relevant details as possible. Examples include: - -* A clear description of the situation — what you observe, what you expect, and your view on how the two differ. -* A reproducible test case or sequence of steps. -* The version of our code being used. -* Any modifications you've made relevant to the bug. -* Details of your environment or deployment. Highlight anything unusual. - - -## Contributing via pull request -Contributions via pull requests are much appreciated. Before sending us a pull request, please ensure that: - -1. You are working against the latest source on the *master* branch. -2. You check existing open, and recently merged, pull requests to make sure someone else hasn't addressed the problem already. -3. You open an issue to discuss any significant work - we would hate for your time to be wasted. - -To send us a pull request, please: - -1. Fork the repository. -2. Modify the source; focus on the specific change you are contributing. If you also reformat all the code, it will be hard for us to focus on your change. -3. Follow the [coding style guide](https://www.freertos.org/FreeRTOS-Coding-Standard-and-Style-Guide.html). -4. Commit to your fork using clear commit messages. -5. Send us a pull request, answering any default questions in the pull request interface. - NOTE: Please make sure the default option (Allow edits from maintainers) is left checked. -6. Pay attention to any automated CI failures reported in the pull request, and stay involved in the conversation. - -GitHub provides additional document on [forking a repository](https://help.github.com/articles/fork-a-repo/) and -[creating a pull request](https://help.github.com/articles/creating-a-pull-request/). - -## Coding style -* Please ensure that your code complies to the [FreeRTOS coding style guidelines](https://www.freertos.org/FreeRTOS-Coding-Standard-and-Style-Guide.html). - - -## Getting your pull request merged -All pull requests must be approved by our review team before it can be merged in. We appreciate your patience while pull requests are reviewed. The time it takes to review will depend on complexity and consideration of wider implications. - - -## Finding contributions to work on -Looking at the existing issues is a great way to find something to contribute on. As our projects, by default, use the default GitHub issue labels (enhancement/bug/duplicate/help wanted/invalid/question/wontfix), tackling open 'help wanted' issues is a great place to start. - - -## Licensing -The FreeRTOS kernel is released under the MIT open source license, the text of which can be found [here](https://github.com/FreeRTOS/FreeRTOS/blob/master/FreeRTOS/License/license.txt) - -Additional license files can be found in the folders containing any supplementary libraries licensed by their respective copyright owners where applicable. - -We may ask you to sign a [Contributor License Agreement (CLA)](http://en.wikipedia.org/wiki/Contributor_License_Agreement) for larger changes. +# Contribution guidelines + +Thank you for your interest in contributing to our project. Whether it's a bug report, new feature, code, or +documentation, we welcome our community to be involved in this project. + +Please read through this document before submitting any issues or pull requests to ensure we are able to help you and all members of the community as effectively as possible. + +## Code of conduct +This project has adopted the [Amazon Open Source Code of Conduct](https://aws.github.io/code-of-conduct). +For more information see the [Code of Conduct FAQ](https://aws.github.io/code-of-conduct-faq) or contact +opensource-codeofconduct@amazon.com with any additional questions or comments. + + +## Security issue notifications +If you discover a potential security issue in this project we ask that you notify AWS/Amazon Security via our [vulnerability reporting page](https://aws.amazon.com/security/vulnerability-reporting/). Please do **not** create a public github issue. + + +## Submitting a bugs/feature request +Have a bug to report or feature to request? Follow these steps: +1. Search on the [FreeRTOS Community Support Forums](https://forums.freertos.org/) and [GitHub issue tracker](https://github.com/FreeRTOS/FreeRTOS/issues?utf8=%E2%9C%93&q=is%3Aissue) to be sure this hasn't been already reported or discussed. +2. If your search turns up empty, create a new topic in the [forums](https://forums.freertos.org/) and work with the community to help clarify issues or refine the idea. Include as many of the details listed below. +3. Once the community has had time to discuss and digest, we welcome you to create an [issue](https://github.com/FreeRTOS/FreeRTOS/issues) to report bugs or suggest features. + +When creating a new topic on the forums or filing an issue, please include as many relevant details as possible. Examples include: + +* A clear description of the situation — what you observe, what you expect, and your view on how the two differ. +* A reproducible test case or sequence of steps. +* The version of our code being used. +* Any modifications you've made relevant to the bug. +* Details of your environment or deployment. Highlight anything unusual. + + +## Contributing via pull request +Contributions via pull requests are much appreciated. Before sending us a pull request, please ensure that: + +1. You are working against the latest source on the *master* branch. +2. You check existing open, and recently merged, pull requests to make sure someone else hasn't addressed the problem already. +3. You open an issue to discuss any significant work - we would hate for your time to be wasted. + +To send us a pull request, please: + +1. Fork the repository. +2. Modify the source; focus on the specific change you are contributing. If you also reformat all the code, it will be hard for us to focus on your change. +3. Follow the [coding style guide](https://www.FreeRTOS.org/FreeRTOS-Coding-Standard-and-Style-Guide.html). +4. Commit to your fork using clear commit messages. +5. Send us a pull request, answering any default questions in the pull request interface. + NOTE: Please make sure the default option (Allow edits from maintainers) is left checked. +6. Pay attention to any automated CI failures reported in the pull request, and stay involved in the conversation. + +GitHub provides additional document on [forking a repository](https://help.github.com/articles/fork-a-repo/) and +[creating a pull request](https://help.github.com/articles/creating-a-pull-request/). + +## Coding style +* Please ensure that your code complies to the [FreeRTOS coding style guidelines](https://www.FreeRTOS.org/FreeRTOS-Coding-Standard-and-Style-Guide.html). + + +## Getting your pull request merged +All pull requests must be approved by our review team before it can be merged in. We appreciate your patience while pull requests are reviewed. The time it takes to review will depend on complexity and consideration of wider implications. + + +## Finding contributions to work on +Looking at the existing issues is a great way to find something to contribute on. As our projects, by default, use the default GitHub issue labels (enhancement/bug/duplicate/help wanted/invalid/question/wontfix), tackling open 'help wanted' issues is a great place to start. + + +## Licensing +The FreeRTOS kernel is released under the MIT open source license, the text of which can be found [here](https://github.com/FreeRTOS/FreeRTOS/blob/master/FreeRTOS/License/license.txt) + +Additional license files can be found in the folders containing any supplementary libraries licensed by their respective copyright owners where applicable. + +We may ask you to sign a [Contributor License Agreement (CLA)](https://en.wikipedia.org/wiki/Contributor_License_Agreement) for larger changes. diff --git a/History.txt b/History.txt index 243e3c30c..bb3e4e71c 100644 --- a/History.txt +++ b/History.txt @@ -1,15 +1,64 @@ -Documentation and download available at http://www.FreeRTOS.org/ +Documentation and download available at https://www.FreeRTOS.org/ + +Changes between FreeRTOS V10.4.0 and FreeRTOS V10.4.1 released September 17 2020 + See https://www.FreeRTOS.org/FreeRTOS-V10.4.x.html + + + Fixed an incorrectly named parameter that prevented the + ulTaskNotifyTakeIndexed macro compiling, and the name space clash in the + test code that prevented this error causing test failures. + + +Changes between FreeRTOS V10.3.1 and FreeRTOS V10.4.0 released September 10 2020 + + See https://www.FreeRTOS.org/FreeRTOS-V10.4.x.html + + Major enhancements: + + + Task notifications: Prior to FreeRTOS V10.4.0 each created task had a + single direct to task notification. From FreeRTOS V10.4.0 each task has + an array of notifications. The direct to task notification API has been + extended with API functions postfixed with "Indexed" to enable the API to + operate on a task notification at any array index. See + https://www.freertos.org/RTOS-task-notifications.html for more information. + + Kernel ports that support memory protection units (MPUs): The ARMv7-M and + ARMv8-M MPU ports now support a privilege access only heap. The ARMv7-M + MPU ports now support devices that have 16 MPU regions, have the ability + to override default memory attributes for privileged code and data + regions, and have the ability to place the FreeRTOS kernel code outside of + the Flash memory. The ARMv8-M MPU ports now support tickless idle mode. + See https://www.freertos.org/FreeRTOS-MPU-memory-protection-unit.html + for more information. + + Additional noteworthy updates: + + + Code formatting is now automated to facilitate the increase in + collaborative development in Git. The auto-formated code is not identical + to the original formatting conventions. Most notably spaces are now used + in place of tabs. + + The prototypes for callback functions (those that start with "Application", + such as vApplicationStackOverflowHook()) are now in the FreeRTOS header + files, removing the need for application writers to add prototypes into + the C files in which they define the functions. + + New Renesas RXv3 port layer. + + Updates to the Synopsys ARC code, including support for EM and HS cores, + and updated BSP. + + Added new POSIX port layer that allows FreeRTOS to run on Linux hosts in + the same way the Windows port layer enables FreeRTOS to run on Windows + hosts. + + Many other minor optimisations and enhancements. For full details + see https://github.com/FreeRTOS/FreeRTOS-Kernel/commits/master + Changes between FreeRTOS V10.3.0 and FreeRTOS V10.3.1 released February 18 2020 - See http://www.FreeRTOS.org/FreeRTOS-V10.3.x.html + See https://www.FreeRTOS.org/FreeRTOS-V10.3.x.html - ./FreeRTOS-Labs directory was removed from this file. The libraries it + + ./FreeRTOS-Labs directory was removed from this file. The libraries it contained are now available as a separate download. Changes between FreeRTOS V10.2.1 and FreeRTOS V10.3.0 released February 7 2020 - See http://www.FreeRTOS.org/FreeRTOS-V10.3.x.html + See https://www.FreeRTOS.org/FreeRTOS-V10.3.x.html New and updated kernel ports: @@ -203,8 +252,8 @@ Changes between FreeRTOS V9.0.1 and FreeRTOS V10.0.0: New Features and components: - + Stream Buffers - see http://www.FreeRTOS.org/RTOS-stream-buffer-example.html - + Message Buffers - see http://www.FreeRTOS.org//RTOS-message-buffer-example.html + + Stream Buffers - see https://www.FreeRTOS.org/RTOS-stream-buffer-example.html + + Message Buffers - see https://www.FreeRTOS.org//RTOS-message-buffer-example.html + Move FreeRTOS+TCP into the main repository, along with the basic Win32 TCP demo FreeRTOS_Plus_TCP_Minimal_Windows_Simulator. @@ -306,7 +355,7 @@ Changes since FreeRTOS V9.0.0: Changes between FreeRTOS V9.0.0 and FreeRTOS V9.0.0rc2 released May 25 2016: - See http://www.FreeRTOS.org/FreeRTOS-V9.html + See https://www.FreeRTOS.org/FreeRTOS-V9.html RTOS kernel updates: @@ -315,7 +364,7 @@ Changes between FreeRTOS V9.0.0 and FreeRTOS V9.0.0rc2 released May 25 2016: "CreateStatic()" API functions. The stack size parameter in xTaskCreateStatic() is now uint32_t, which changes the prototype of the callback functions. See the following URL: - http://www.freertos.org/xTaskCreateStatic.html + https://www.FreeRTOS.org/xTaskCreateStatic.html + GCC ARM Cortex-A port: Introduced the configUSE_TASK_FPU_SUPPORT constant. When configUSE_TASK_FPU_SUPPORT is set to 2 every task is automatically given a floating point (FPU) context. @@ -364,7 +413,7 @@ Changes between FreeRTOS V9.0.0 and FreeRTOS V9.0.0rc2 released May 25 2016: Changes between FreeRTOS V9.0.0rc1 and FreeRTOS V9.0.0rc2 (release candidate 2) released March 30 2016: - NOTE - See http://www.FreeRTOS.org/FreeRTOS-V9.html for details + NOTE - See https://www.FreeRTOS.org/FreeRTOS-V9.html for details + The functions that create RTOS objects using static memory allocation have been simplified and will not revert to using dynamic allocation if a @@ -577,7 +626,7 @@ Changes between V8.1.2 and V8.2.0 released 16th January 2015 Significant RTOS kernel updates: + MAJOR NEW FEATURE! Task notifications. Please see the following URL for - details: http://www.FreeRTOS.org/RTOS-task-notifications.html + details: https://www.FreeRTOS.org/RTOS-task-notifications.html + NEW HEADER FILE REQUIRED! Obsolete definitions have been separated into a new header file called FreeRTOS/Source/include/deprecated_definitions.h. This header file must be present to build. Note some of the obsolete @@ -741,21 +790,21 @@ Changes between V8.0.0 and V8.0.1 released 2nd May 2014 Changes between V7.6.0 and V8.0.0 released 19th Feb 2014 - http://www.freertos.org/upgrading-to-FreeRTOS-V8.html + https://www.FreeRTOS.org/upgrading-to-FreeRTOS-V8.html FreeRTOS V8.x.x is a drop-in compatible replacement for FreeRTOS V7.x.x, although a change to the type used to reference character strings may result in application code generating a few (easily clearable) compiler warnings after the upgrade, and an updated typedef naming convention means use of the old typedef names is now discouraged. - See http://www.freertos.org/upgrading-to-FreeRTOS-V8.html for full + See https://www.FreeRTOS.org/upgrading-to-FreeRTOS-V8.html for full information. New features and functionality: - + Event groups - see http://www.freertos.org/FreeRTOS-Event-Groups.html + + Event groups - see https://www.FreeRTOS.org/FreeRTOS-Event-Groups.html + Centralised deferred interrupt processing - see - http://www.freertos.org/xTimerPendFunctionCallFromISR.html + https://www.FreeRTOS.org/xTimerPendFunctionCallFromISR.html Other updates: @@ -766,7 +815,7 @@ Changes between V7.6.0 and V8.0.0 released 19th Feb 2014 priority of the Running task. + New low power tickless demonstration project that targets the ST STM32L microcontroller - see - http://www.freertos.org/STM32L-discovery-low-power-tickless-RTOS-demo.html + https://www.FreeRTOS.org/STM32L-discovery-low-power-tickless-RTOS-demo.html + Add xPortGetMinimumEverFreeHeapSize() to heap_4.c. + Small change to the tickless low power implementation on the SAM4L to ensure the alarm value (compare match value) cannot be set to zero when a @@ -916,8 +965,8 @@ Changes between V7.4.2 and V7.5.0 released July 19 2013 New API functions: - + uxTaskGetSystemState() http://www.freertos.org/uxTaskGetSystemState.html - + xQueueOverwrite() http://www.freertos.org/xQueueOverwrite.html + + uxTaskGetSystemState() https://www.FreeRTOS.org/uxTaskGetSystemState.html + + xQueueOverwrite() https://www.FreeRTOS.org/xQueueOverwrite.html + xQueueOverwriteFromISR() + xQueuePeekFromISR() @@ -930,7 +979,7 @@ Changes between V7.4.2 and V7.5.0 released July 19 2013 + Microsemi SmartFusion2 New FreeRTOSConfig.h settings - http://shop.freertos.org/FreeRTOS_API_and_Configuration_Reference_s/1822.htm + https://freertos.org/a00110.html + configUSE_TIME_SLICING + configUSE_NEWLIB_REENTRANT @@ -967,7 +1016,7 @@ Changes between V7.4.1 and V7.4.2 released May 1 2013 + Added FreeRTOS+FAT SL source code and demo project. The demo project runs in the FreeRTOS Windows simulator for easy and hardware independent - experimentation and evaluation. See http://www.FreeRTOS.org/fat_sl + experimentation and evaluation. See https://www.FreeRTOS.org/fat_sl Changes between V7.4.0 and V7.4.1 released April 18 2013 @@ -996,7 +1045,7 @@ Changes between V7.4.0 and V7.4.1 released April 18 2013 Changes between V7.3.0 and V7.4.0 released February 20 2013 + New feature: Queue sets. See: - http://www.FreeRTOS.org/Pend-on-multiple-rtos-objects.html + https://www.FreeRTOS.org/Pend-on-multiple-rtos-objects.html + Overhauled the default tickless idle mode implementation provided with the ARM Cortex-M3 port layers. + Enhanced tickless support in the core kernel code with the introduction of @@ -1143,7 +1192,7 @@ Changes between V7.1.0 and V7.1.1 released May 1 2012 + Introduced the portSETUP_TCB() macro to remove the requirement for the Windows simulator to use the traceTASK_CREATE() macro, leaving the trace - macro available for use by FreeRTOS+Trace (http://www.FreeRTOS.org/trace). + macro available for use by FreeRTOS+Trace (https://www.FreeRTOS.org/trace). + Added a new trace macro, traceMOVE_TASK_TO_READY_STATE(), to allow future FreeRTOS+Trace versions to provide even more information to users. + Updated the FreeRTOS MPU port to be correct for changes that were @@ -1171,7 +1220,7 @@ Changes between V7.1.0 and V7.1.1 released May 1 2012 + The command interpreter has now been formally released as FreeRTOS+CLI, and been moved out of the main FreeRTOS download, to instead be available - from the FreeRTOS+ Ecosystem site http://www.FreeRTOS.org/plus. + from the FreeRTOS+ Ecosystem site https://www.FreeRTOS.org/plus. + flash_timer.c/h has been added to the list of standard demo tasks. This performs the same functionality as the flash.c tasks, but using software timers in place of tasks. @@ -1453,7 +1502,7 @@ Changes between V6.0.3 and V6.0.4 released March 14 2010 + All the contributed files that were located in the Demo/Unsupported_Demos directory have been removed. These files are instead now available in the new Community Contributions section of the FreeRTOS website. See - http://www.freertos.org/RTOS-contributed-ports.html + https://www.FreeRTOS.org/RTOS-contributed-ports.html + The project file located in the Demo/CORTEX_STM32F107_GCC_Rowley directory has been upgraded to use V2.x of the Rowley Crossworks STM32 support package. @@ -1746,9 +1795,6 @@ Changes between V4.8.0 and V5.0.0 released April 15, 2008 compiler might not issue any type mismatch warnings! - See http://www.FreeRTOS.org/upgrading.html for full information. - - Other changes: + Support added for the new Luminary Micro LM3S3768 and LM3S3748 Cortex-M3 @@ -2002,7 +2048,7 @@ Changes between V4.0.1 and V4.0.2 released May 28, 2006 it was also called when the tick function was called during the scheduler unlocking process. + The EMAC driver in the SAM7X lwIP demo has been made more robust as per - the thread: http://sourceforge.net/forum/message.php?msg_id=3714405 + the thread: https://sourceforge.net/forum/message.php?msg_id=3714405 + In the PC ports: Add function prvSetTickFrequencyDefault() to set the DOS tick back to its proper value when the scheduler exits. Thanks Raynald! diff --git a/Quick_Start_Guide.url b/Quick_Start_Guide.url index be74fdc95..0aa68ed2a 100644 --- a/Quick_Start_Guide.url +++ b/Quick_Start_Guide.url @@ -1,5 +1,5 @@ [InternetShortcut] -URL=http://www.freertos.org/FreeRTOS-quick-start-guide.html +URL=https://www.FreeRTOS.org/FreeRTOS-quick-start-guide.html IDList= [{000214A0-0000-0000-C000-000000000046}] Prop3=19,2 diff --git a/README.md b/README.md index c9e1e6961..1cc1b84ce 100644 --- a/README.md +++ b/README.md @@ -1,9 +1,9 @@ ## Getting started This repository contains FreeRTOS kernel source/header files and kernel ports only. This repository is referenced as a submodule in [FreeRTOS/FreeRTOS](https://github.com/FreeRTOS/FreeRTOS) repository, which contains pre-configured demo application projects under ```FreeRTOS/Demo``` directory. -The easiest way to use FreeRTOS is to start with one of the pre-configured demo application projects. That way you will have the correct FreeRTOS source files included, and the correct include paths configured. Once a demo application is building and executing you can remove the demo application files, and start to add in your own application source files. See the [FreeRTOS Kernel Quick Start Guide](https://www.freertos.org/FreeRTOS-quick-start-guide.html) for detailed instructions and other useful links. +The easiest way to use FreeRTOS is to start with one of the pre-configured demo application projects. That way you will have the correct FreeRTOS source files included, and the correct include paths configured. Once a demo application is building and executing you can remove the demo application files, and start to add in your own application source files. See the [FreeRTOS Kernel Quick Start Guide](https://www.FreeRTOS.org/FreeRTOS-quick-start-guide.html) for detailed instructions and other useful links. -Additionally, for FreeRTOS kernel feature information refer to the [Developer Documentation](https://www.freertos.org/features.html), and [API Reference](https://www.freertos.org/a00106.html). +Additionally, for FreeRTOS kernel feature information refer to the [Developer Documentation](https://www.FreeRTOS.org/features.html), and [API Reference](https://www.FreeRTOS.org/a00106.html). ### Getting help If you have any questions or need assistance troubleshooting your FreeRTOS project, we have an active community that can help on the [FreeRTOS Community Support Forum](https://forums.freertos.org). @@ -29,3 +29,11 @@ is normally only used on very memory limited systems. See the readme file in the ```./portable``` directory for more information. - The ```./include``` directory contains the real time kernel header files. + +### Code Formatting +FreeRTOS files are formatted using the "uncrustify" tool. The configuration file used by uncrustify can be found in the [FreeRTOS/FreeRTOS repository](https://github.com/FreeRTOS/FreeRTOS/blob/master/tools/uncrustify.cfg). + +### Spelling +*lexicon.txt* contains words that are not traditionally found in an English dictionary. It is used by the spellchecker to verify the various jargon, variable names, and other odd words used in the FreeRTOS code base. If your pull request fails to pass the spelling and you believe this is a mistake, then add the word to *lexicon.txt*. +Note that only the FreeRTOS Kernel source files are checked for proper spelling, the portable section is ignored. + diff --git a/SECURITY.md b/SECURITY.md index d1a40a4db..b4049f25b 100644 --- a/SECURITY.md +++ b/SECURITY.md @@ -1,5 +1,5 @@ -## Reporting a Vulnerability - -If you discover a potential security issue in this project we ask that you notify AWS/Amazon Security -via our [vulnerability reporting page](http://aws.amazon.com/security/vulnerability-reporting/) or directly via email to aws-security@amazon.com. -Please do **not** create a public github issue. +## Reporting a Vulnerability + +If you discover a potential security issue in this project we ask that you notify AWS/Amazon Security +via our [vulnerability reporting page](https://aws.amazon.com/security/vulnerability-reporting/) or directly via email to aws-security@amazon.com. +Please do **not** create a public github issue. diff --git a/croutine.c b/croutine.c index f30e5cef8..6959fac3c 100644 --- a/croutine.c +++ b/croutine.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.3.1 + * FreeRTOS Kernel V10.4.1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ #include "FreeRTOS.h" @@ -30,32 +29,32 @@ #include "croutine.h" /* Remove the whole file is co-routines are not being used. */ -#if( configUSE_CO_ROUTINES != 0 ) +#if ( configUSE_CO_ROUTINES != 0 ) /* * Some kernel aware debuggers require data to be viewed to be global, rather * than file scope. */ -#ifdef portREMOVE_STATIC_QUALIFIER - #define static -#endif + #ifdef portREMOVE_STATIC_QUALIFIER + #define static + #endif /* Lists for ready and blocked co-routines. --------------------*/ -static List_t pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ]; /*< Prioritised ready co-routines. */ -static List_t xDelayedCoRoutineList1; /*< Delayed co-routines. */ -static List_t xDelayedCoRoutineList2; /*< Delayed co-routines (two lists are used - one for delays that have overflowed the current tick count. */ -static List_t * pxDelayedCoRoutineList = NULL; /*< Points to the delayed co-routine list currently being used. */ -static List_t * pxOverflowDelayedCoRoutineList = NULL; /*< Points to the delayed co-routine list currently being used to hold co-routines that have overflowed the current tick count. */ -static List_t xPendingReadyCoRoutineList; /*< Holds co-routines that have been readied by an external event. They cannot be added directly to the ready lists as the ready lists cannot be accessed by interrupts. */ + static List_t pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ]; /*< Prioritised ready co-routines. */ + static List_t xDelayedCoRoutineList1; /*< Delayed co-routines. */ + static List_t xDelayedCoRoutineList2; /*< Delayed co-routines (two lists are used - one for delays that have overflowed the current tick count. */ + static List_t * pxDelayedCoRoutineList = NULL; /*< Points to the delayed co-routine list currently being used. */ + static List_t * pxOverflowDelayedCoRoutineList = NULL; /*< Points to the delayed co-routine list currently being used to hold co-routines that have overflowed the current tick count. */ + static List_t xPendingReadyCoRoutineList; /*< Holds co-routines that have been readied by an external event. They cannot be added directly to the ready lists as the ready lists cannot be accessed by interrupts. */ /* Other file private variables. --------------------------------*/ -CRCB_t * pxCurrentCoRoutine = NULL; -static UBaseType_t uxTopCoRoutineReadyPriority = 0; -static TickType_t xCoRoutineTickCount = 0, xLastTickCount = 0, xPassedTicks = 0; + CRCB_t * pxCurrentCoRoutine = NULL; + static UBaseType_t uxTopCoRoutineReadyPriority = 0; + static TickType_t xCoRoutineTickCount = 0, xLastTickCount = 0, xPassedTicks = 0; /* The initial state of the co-routine when it is created. */ -#define corINITIAL_STATE ( 0 ) + #define corINITIAL_STATE ( 0 ) /* * Place the co-routine represented by pxCRCB into the appropriate ready queue @@ -64,20 +63,20 @@ static TickType_t xCoRoutineTickCount = 0, xLastTickCount = 0, xPassedTicks = 0; * This macro accesses the co-routine ready lists and therefore must not be * used from within an ISR. */ -#define prvAddCoRoutineToReadyQueue( pxCRCB ) \ -{ \ - if( pxCRCB->uxPriority > uxTopCoRoutineReadyPriority ) \ - { \ - uxTopCoRoutineReadyPriority = pxCRCB->uxPriority; \ - } \ - vListInsertEnd( ( List_t * ) &( pxReadyCoRoutineLists[ pxCRCB->uxPriority ] ), &( pxCRCB->xGenericListItem ) ); \ -} + #define prvAddCoRoutineToReadyQueue( pxCRCB ) \ + { \ + if( pxCRCB->uxPriority > uxTopCoRoutineReadyPriority ) \ + { \ + uxTopCoRoutineReadyPriority = pxCRCB->uxPriority; \ + } \ + vListInsertEnd( ( List_t * ) &( pxReadyCoRoutineLists[ pxCRCB->uxPriority ] ), &( pxCRCB->xGenericListItem ) ); \ + } /* * Utility to ready all the lists used by the scheduler. This is called * automatically upon the creation of the first co-routine. */ -static void prvInitialiseCoRoutineLists( void ); + static void prvInitialiseCoRoutineLists( void ); /* * Co-routines that are readied by an interrupt cannot be placed directly into @@ -85,7 +84,7 @@ static void prvInitialiseCoRoutineLists( void ); * in the pending ready list in order that they can later be moved to the ready * list by the co-routine scheduler. */ -static void prvCheckPendingReadyList( void ); + static void prvCheckPendingReadyList( void ); /* * Macro that looks at the list of co-routines that are currently delayed to @@ -95,265 +94,268 @@ static void prvCheckPendingReadyList( void ); * meaning once one co-routine has been found whose timer has not expired * we need not look any further down the list. */ -static void prvCheckDelayedList( void ); + static void prvCheckDelayedList( void ); /*-----------------------------------------------------------*/ -BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, UBaseType_t uxPriority, UBaseType_t uxIndex ) -{ -BaseType_t xReturn; -CRCB_t *pxCoRoutine; + BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, + UBaseType_t uxPriority, + UBaseType_t uxIndex ) + { + BaseType_t xReturn; + CRCB_t * pxCoRoutine; - /* Allocate the memory that will store the co-routine control block. */ - pxCoRoutine = ( CRCB_t * ) pvPortMalloc( sizeof( CRCB_t ) ); - if( pxCoRoutine ) - { - /* If pxCurrentCoRoutine is NULL then this is the first co-routine to - be created and the co-routine data structures need initialising. */ - if( pxCurrentCoRoutine == NULL ) - { - pxCurrentCoRoutine = pxCoRoutine; - prvInitialiseCoRoutineLists(); - } + /* Allocate the memory that will store the co-routine control block. */ + pxCoRoutine = ( CRCB_t * ) pvPortMalloc( sizeof( CRCB_t ) ); - /* Check the priority is within limits. */ - if( uxPriority >= configMAX_CO_ROUTINE_PRIORITIES ) - { - uxPriority = configMAX_CO_ROUTINE_PRIORITIES - 1; - } + if( pxCoRoutine ) + { + /* If pxCurrentCoRoutine is NULL then this is the first co-routine to + * be created and the co-routine data structures need initialising. */ + if( pxCurrentCoRoutine == NULL ) + { + pxCurrentCoRoutine = pxCoRoutine; + prvInitialiseCoRoutineLists(); + } - /* Fill out the co-routine control block from the function parameters. */ - pxCoRoutine->uxState = corINITIAL_STATE; - pxCoRoutine->uxPriority = uxPriority; - pxCoRoutine->uxIndex = uxIndex; - pxCoRoutine->pxCoRoutineFunction = pxCoRoutineCode; + /* Check the priority is within limits. */ + if( uxPriority >= configMAX_CO_ROUTINE_PRIORITIES ) + { + uxPriority = configMAX_CO_ROUTINE_PRIORITIES - 1; + } - /* Initialise all the other co-routine control block parameters. */ - vListInitialiseItem( &( pxCoRoutine->xGenericListItem ) ); - vListInitialiseItem( &( pxCoRoutine->xEventListItem ) ); + /* Fill out the co-routine control block from the function parameters. */ + pxCoRoutine->uxState = corINITIAL_STATE; + pxCoRoutine->uxPriority = uxPriority; + pxCoRoutine->uxIndex = uxIndex; + pxCoRoutine->pxCoRoutineFunction = pxCoRoutineCode; - /* Set the co-routine control block as a link back from the ListItem_t. - This is so we can get back to the containing CRCB from a generic item - in a list. */ - listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xGenericListItem ), pxCoRoutine ); - listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xEventListItem ), pxCoRoutine ); + /* Initialise all the other co-routine control block parameters. */ + vListInitialiseItem( &( pxCoRoutine->xGenericListItem ) ); + vListInitialiseItem( &( pxCoRoutine->xEventListItem ) ); - /* Event lists are always in priority order. */ - listSET_LIST_ITEM_VALUE( &( pxCoRoutine->xEventListItem ), ( ( TickType_t ) configMAX_CO_ROUTINE_PRIORITIES - ( TickType_t ) uxPriority ) ); + /* Set the co-routine control block as a link back from the ListItem_t. + * This is so we can get back to the containing CRCB from a generic item + * in a list. */ + listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xGenericListItem ), pxCoRoutine ); + listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xEventListItem ), pxCoRoutine ); - /* Now the co-routine has been initialised it can be added to the ready - list at the correct priority. */ - prvAddCoRoutineToReadyQueue( pxCoRoutine ); + /* Event lists are always in priority order. */ + listSET_LIST_ITEM_VALUE( &( pxCoRoutine->xEventListItem ), ( ( TickType_t ) configMAX_CO_ROUTINE_PRIORITIES - ( TickType_t ) uxPriority ) ); - xReturn = pdPASS; - } - else - { - xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY; - } + /* Now the co-routine has been initialised it can be added to the ready + * list at the correct priority. */ + prvAddCoRoutineToReadyQueue( pxCoRoutine ); - return xReturn; -} + xReturn = pdPASS; + } + else + { + xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY; + } + + return xReturn; + } /*-----------------------------------------------------------*/ -void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay, List_t *pxEventList ) -{ -TickType_t xTimeToWake; + void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay, + List_t * pxEventList ) + { + TickType_t xTimeToWake; - /* Calculate the time to wake - this may overflow but this is - not a problem. */ - xTimeToWake = xCoRoutineTickCount + xTicksToDelay; + /* Calculate the time to wake - this may overflow but this is + * not a problem. */ + xTimeToWake = xCoRoutineTickCount + xTicksToDelay; - /* We must remove ourselves from the ready list before adding - ourselves to the blocked list as the same list item is used for - both lists. */ - ( void ) uxListRemove( ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) ); + /* We must remove ourselves from the ready list before adding + * ourselves to the blocked list as the same list item is used for + * both lists. */ + ( void ) uxListRemove( ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - /* The list item will be inserted in wake time order. */ - listSET_LIST_ITEM_VALUE( &( pxCurrentCoRoutine->xGenericListItem ), xTimeToWake ); + /* The list item will be inserted in wake time order. */ + listSET_LIST_ITEM_VALUE( &( pxCurrentCoRoutine->xGenericListItem ), xTimeToWake ); - if( xTimeToWake < xCoRoutineTickCount ) - { - /* Wake time has overflowed. Place this item in the - overflow list. */ - vListInsert( ( List_t * ) pxOverflowDelayedCoRoutineList, ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the - current block list. */ - vListInsert( ( List_t * ) pxDelayedCoRoutineList, ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - } + if( xTimeToWake < xCoRoutineTickCount ) + { + /* Wake time has overflowed. Place this item in the + * overflow list. */ + vListInsert( ( List_t * ) pxOverflowDelayedCoRoutineList, ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) ); + } + else + { + /* The wake time has not overflowed, so we can use the + * current block list. */ + vListInsert( ( List_t * ) pxDelayedCoRoutineList, ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) ); + } - if( pxEventList ) - { - /* Also add the co-routine to an event list. If this is done then the - function must be called with interrupts disabled. */ - vListInsert( pxEventList, &( pxCurrentCoRoutine->xEventListItem ) ); - } -} + if( pxEventList ) + { + /* Also add the co-routine to an event list. If this is done then the + * function must be called with interrupts disabled. */ + vListInsert( pxEventList, &( pxCurrentCoRoutine->xEventListItem ) ); + } + } /*-----------------------------------------------------------*/ -static void prvCheckPendingReadyList( void ) -{ - /* Are there any co-routines waiting to get moved to the ready list? These - are co-routines that have been readied by an ISR. The ISR cannot access - the ready lists itself. */ - while( listLIST_IS_EMPTY( &xPendingReadyCoRoutineList ) == pdFALSE ) - { - CRCB_t *pxUnblockedCRCB; + static void prvCheckPendingReadyList( void ) + { + /* Are there any co-routines waiting to get moved to the ready list? These + * are co-routines that have been readied by an ISR. The ISR cannot access + * the ready lists itself. */ + while( listLIST_IS_EMPTY( &xPendingReadyCoRoutineList ) == pdFALSE ) + { + CRCB_t * pxUnblockedCRCB; - /* The pending ready list can be accessed by an ISR. */ - portDISABLE_INTERRUPTS(); - { - pxUnblockedCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( (&xPendingReadyCoRoutineList) ); - ( void ) uxListRemove( &( pxUnblockedCRCB->xEventListItem ) ); - } - portENABLE_INTERRUPTS(); + /* The pending ready list can be accessed by an ISR. */ + portDISABLE_INTERRUPTS(); + { + pxUnblockedCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyCoRoutineList ) ); + ( void ) uxListRemove( &( pxUnblockedCRCB->xEventListItem ) ); + } + portENABLE_INTERRUPTS(); - ( void ) uxListRemove( &( pxUnblockedCRCB->xGenericListItem ) ); - prvAddCoRoutineToReadyQueue( pxUnblockedCRCB ); - } -} + ( void ) uxListRemove( &( pxUnblockedCRCB->xGenericListItem ) ); + prvAddCoRoutineToReadyQueue( pxUnblockedCRCB ); + } + } /*-----------------------------------------------------------*/ -static void prvCheckDelayedList( void ) -{ -CRCB_t *pxCRCB; + static void prvCheckDelayedList( void ) + { + CRCB_t * pxCRCB; - xPassedTicks = xTaskGetTickCount() - xLastTickCount; - while( xPassedTicks ) - { - xCoRoutineTickCount++; - xPassedTicks--; + xPassedTicks = xTaskGetTickCount() - xLastTickCount; - /* If the tick count has overflowed we need to swap the ready lists. */ - if( xCoRoutineTickCount == 0 ) - { - List_t * pxTemp; + while( xPassedTicks ) + { + xCoRoutineTickCount++; + xPassedTicks--; - /* Tick count has overflowed so we need to swap the delay lists. If there are - any items in pxDelayedCoRoutineList here then there is an error! */ - pxTemp = pxDelayedCoRoutineList; - pxDelayedCoRoutineList = pxOverflowDelayedCoRoutineList; - pxOverflowDelayedCoRoutineList = pxTemp; - } + /* If the tick count has overflowed we need to swap the ready lists. */ + if( xCoRoutineTickCount == 0 ) + { + List_t * pxTemp; - /* See if this tick has made a timeout expire. */ - while( listLIST_IS_EMPTY( pxDelayedCoRoutineList ) == pdFALSE ) - { - pxCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedCoRoutineList ); + /* Tick count has overflowed so we need to swap the delay lists. If there are + * any items in pxDelayedCoRoutineList here then there is an error! */ + pxTemp = pxDelayedCoRoutineList; + pxDelayedCoRoutineList = pxOverflowDelayedCoRoutineList; + pxOverflowDelayedCoRoutineList = pxTemp; + } - if( xCoRoutineTickCount < listGET_LIST_ITEM_VALUE( &( pxCRCB->xGenericListItem ) ) ) - { - /* Timeout not yet expired. */ - break; - } + /* See if this tick has made a timeout expire. */ + while( listLIST_IS_EMPTY( pxDelayedCoRoutineList ) == pdFALSE ) + { + pxCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedCoRoutineList ); - portDISABLE_INTERRUPTS(); - { - /* The event could have occurred just before this critical - section. If this is the case then the generic list item will - have been moved to the pending ready list and the following - line is still valid. Also the pvContainer parameter will have - been set to NULL so the following lines are also valid. */ - ( void ) uxListRemove( &( pxCRCB->xGenericListItem ) ); + if( xCoRoutineTickCount < listGET_LIST_ITEM_VALUE( &( pxCRCB->xGenericListItem ) ) ) + { + /* Timeout not yet expired. */ + break; + } - /* Is the co-routine waiting on an event also? */ - if( pxCRCB->xEventListItem.pxContainer ) - { - ( void ) uxListRemove( &( pxCRCB->xEventListItem ) ); - } - } - portENABLE_INTERRUPTS(); + portDISABLE_INTERRUPTS(); + { + /* The event could have occurred just before this critical + * section. If this is the case then the generic list item will + * have been moved to the pending ready list and the following + * line is still valid. Also the pvContainer parameter will have + * been set to NULL so the following lines are also valid. */ + ( void ) uxListRemove( &( pxCRCB->xGenericListItem ) ); - prvAddCoRoutineToReadyQueue( pxCRCB ); - } - } + /* Is the co-routine waiting on an event also? */ + if( pxCRCB->xEventListItem.pxContainer ) + { + ( void ) uxListRemove( &( pxCRCB->xEventListItem ) ); + } + } + portENABLE_INTERRUPTS(); - xLastTickCount = xCoRoutineTickCount; -} + prvAddCoRoutineToReadyQueue( pxCRCB ); + } + } + + xLastTickCount = xCoRoutineTickCount; + } /*-----------------------------------------------------------*/ -void vCoRoutineSchedule( void ) -{ - /* Only run a co-routine after prvInitialiseCoRoutineLists() has been - called. prvInitialiseCoRoutineLists() is called automatically when a - co-routine is created. */ - if( pxDelayedCoRoutineList != NULL ) - { - /* See if any co-routines readied by events need moving to the ready lists. */ - prvCheckPendingReadyList(); + void vCoRoutineSchedule( void ) + { + /* Only run a co-routine after prvInitialiseCoRoutineLists() has been + * called. prvInitialiseCoRoutineLists() is called automatically when a + * co-routine is created. */ + if( pxDelayedCoRoutineList != NULL ) + { + /* See if any co-routines readied by events need moving to the ready lists. */ + prvCheckPendingReadyList(); - /* See if any delayed co-routines have timed out. */ - prvCheckDelayedList(); + /* See if any delayed co-routines have timed out. */ + prvCheckDelayedList(); - /* Find the highest priority queue that contains ready co-routines. */ - while( listLIST_IS_EMPTY( &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ) ) - { - if( uxTopCoRoutineReadyPriority == 0 ) - { - /* No more co-routines to check. */ - return; - } - --uxTopCoRoutineReadyPriority; - } + /* Find the highest priority queue that contains ready co-routines. */ + while( listLIST_IS_EMPTY( &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ) ) + { + if( uxTopCoRoutineReadyPriority == 0 ) + { + /* No more co-routines to check. */ + return; + } - /* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the co-routines - of the same priority get an equal share of the processor time. */ - listGET_OWNER_OF_NEXT_ENTRY( pxCurrentCoRoutine, &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ); + --uxTopCoRoutineReadyPriority; + } - /* Call the co-routine. */ - ( pxCurrentCoRoutine->pxCoRoutineFunction )( pxCurrentCoRoutine, pxCurrentCoRoutine->uxIndex ); - } + /* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the co-routines + * of the same priority get an equal share of the processor time. */ + listGET_OWNER_OF_NEXT_ENTRY( pxCurrentCoRoutine, &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ); - return; -} + /* Call the co-routine. */ + ( pxCurrentCoRoutine->pxCoRoutineFunction )( pxCurrentCoRoutine, pxCurrentCoRoutine->uxIndex ); + } + } /*-----------------------------------------------------------*/ -static void prvInitialiseCoRoutineLists( void ) -{ -UBaseType_t uxPriority; + static void prvInitialiseCoRoutineLists( void ) + { + UBaseType_t uxPriority; - for( uxPriority = 0; uxPriority < configMAX_CO_ROUTINE_PRIORITIES; uxPriority++ ) - { - vListInitialise( ( List_t * ) &( pxReadyCoRoutineLists[ uxPriority ] ) ); - } + for( uxPriority = 0; uxPriority < configMAX_CO_ROUTINE_PRIORITIES; uxPriority++ ) + { + vListInitialise( ( List_t * ) &( pxReadyCoRoutineLists[ uxPriority ] ) ); + } - vListInitialise( ( List_t * ) &xDelayedCoRoutineList1 ); - vListInitialise( ( List_t * ) &xDelayedCoRoutineList2 ); - vListInitialise( ( List_t * ) &xPendingReadyCoRoutineList ); + vListInitialise( ( List_t * ) &xDelayedCoRoutineList1 ); + vListInitialise( ( List_t * ) &xDelayedCoRoutineList2 ); + vListInitialise( ( List_t * ) &xPendingReadyCoRoutineList ); - /* Start with pxDelayedCoRoutineList using list1 and the - pxOverflowDelayedCoRoutineList using list2. */ - pxDelayedCoRoutineList = &xDelayedCoRoutineList1; - pxOverflowDelayedCoRoutineList = &xDelayedCoRoutineList2; -} + /* Start with pxDelayedCoRoutineList using list1 and the + * pxOverflowDelayedCoRoutineList using list2. */ + pxDelayedCoRoutineList = &xDelayedCoRoutineList1; + pxOverflowDelayedCoRoutineList = &xDelayedCoRoutineList2; + } /*-----------------------------------------------------------*/ -BaseType_t xCoRoutineRemoveFromEventList( const List_t *pxEventList ) -{ -CRCB_t *pxUnblockedCRCB; -BaseType_t xReturn; + BaseType_t xCoRoutineRemoveFromEventList( const List_t * pxEventList ) + { + CRCB_t * pxUnblockedCRCB; + BaseType_t xReturn; - /* This function is called from within an interrupt. It can only access - event lists and the pending ready list. This function assumes that a - check has already been made to ensure pxEventList is not empty. */ - pxUnblockedCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); - ( void ) uxListRemove( &( pxUnblockedCRCB->xEventListItem ) ); - vListInsertEnd( ( List_t * ) &( xPendingReadyCoRoutineList ), &( pxUnblockedCRCB->xEventListItem ) ); + /* This function is called from within an interrupt. It can only access + * event lists and the pending ready list. This function assumes that a + * check has already been made to ensure pxEventList is not empty. */ + pxUnblockedCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); + ( void ) uxListRemove( &( pxUnblockedCRCB->xEventListItem ) ); + vListInsertEnd( ( List_t * ) &( xPendingReadyCoRoutineList ), &( pxUnblockedCRCB->xEventListItem ) ); - if( pxUnblockedCRCB->uxPriority >= pxCurrentCoRoutine->uxPriority ) - { - xReturn = pdTRUE; - } - else - { - xReturn = pdFALSE; - } + if( pxUnblockedCRCB->uxPriority >= pxCurrentCoRoutine->uxPriority ) + { + xReturn = pdTRUE; + } + else + { + xReturn = pdFALSE; + } - return xReturn; -} + return xReturn; + } #endif /* configUSE_CO_ROUTINES == 0 */ - diff --git a/event_groups.c b/event_groups.c index 0bf3b9661..c46013ab3 100644 --- a/event_groups.c +++ b/event_groups.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.3.1 + * FreeRTOS Kernel V10.4.1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,18 +19,17 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /* Standard includes. */ #include /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining -all the API functions to use the MPU wrappers. That should only be done when -task.h is included from an application file. */ + * all the API functions to use the MPU wrappers. That should only be done when + * task.h is included from an application file. */ #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE /* FreeRTOS includes. */ @@ -40,38 +39,38 @@ task.h is included from an application file. */ #include "event_groups.h" /* Lint e961, e750 and e9021 are suppressed as a MISRA exception justified -because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined -for the header files above, but not in this file, in order to generate the -correct privileged Vs unprivileged linkage and placement. */ + * because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined + * for the header files above, but not in this file, in order to generate the + * correct privileged Vs unprivileged linkage and placement. */ #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750 !e9021 See comment above. */ /* The following bit fields convey control information in a task's event list -item value. It is important they don't clash with the -taskEVENT_LIST_ITEM_VALUE_IN_USE definition. */ + * item value. It is important they don't clash with the + * taskEVENT_LIST_ITEM_VALUE_IN_USE definition. */ #if configUSE_16_BIT_TICKS == 1 - #define eventCLEAR_EVENTS_ON_EXIT_BIT 0x0100U - #define eventUNBLOCKED_DUE_TO_BIT_SET 0x0200U - #define eventWAIT_FOR_ALL_BITS 0x0400U - #define eventEVENT_BITS_CONTROL_BYTES 0xff00U + #define eventCLEAR_EVENTS_ON_EXIT_BIT 0x0100U + #define eventUNBLOCKED_DUE_TO_BIT_SET 0x0200U + #define eventWAIT_FOR_ALL_BITS 0x0400U + #define eventEVENT_BITS_CONTROL_BYTES 0xff00U #else - #define eventCLEAR_EVENTS_ON_EXIT_BIT 0x01000000UL - #define eventUNBLOCKED_DUE_TO_BIT_SET 0x02000000UL - #define eventWAIT_FOR_ALL_BITS 0x04000000UL - #define eventEVENT_BITS_CONTROL_BYTES 0xff000000UL + #define eventCLEAR_EVENTS_ON_EXIT_BIT 0x01000000UL + #define eventUNBLOCKED_DUE_TO_BIT_SET 0x02000000UL + #define eventWAIT_FOR_ALL_BITS 0x04000000UL + #define eventEVENT_BITS_CONTROL_BYTES 0xff000000UL #endif typedef struct EventGroupDef_t { - EventBits_t uxEventBits; - List_t xTasksWaitingForBits; /*< List of tasks waiting for a bit to be set. */ + EventBits_t uxEventBits; + List_t xTasksWaitingForBits; /*< List of tasks waiting for a bit to be set. */ - #if( configUSE_TRACE_FACILITY == 1 ) - UBaseType_t uxEventGroupNumber; - #endif + #if ( configUSE_TRACE_FACILITY == 1 ) + UBaseType_t uxEventGroupNumber; + #endif - #if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) - uint8_t ucStaticallyAllocated; /*< Set to pdTRUE if the event group is statically allocated to ensure no attempt is made to free the memory. */ - #endif + #if ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) + uint8_t ucStaticallyAllocated; /*< Set to pdTRUE if the event group is statically allocated to ensure no attempt is made to free the memory. */ + #endif } EventGroup_t; /*-----------------------------------------------------------*/ @@ -84,670 +83,689 @@ typedef struct EventGroupDef_t * wait condition is met if any of the bits set in uxBitsToWait for are also set * in uxCurrentEventBits. */ -static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEventBits, const EventBits_t uxBitsToWaitFor, const BaseType_t xWaitForAllBits ) PRIVILEGED_FUNCTION; +static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEventBits, + const EventBits_t uxBitsToWaitFor, + const BaseType_t xWaitForAllBits ) PRIVILEGED_FUNCTION; /*-----------------------------------------------------------*/ -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) +#if ( configSUPPORT_STATIC_ALLOCATION == 1 ) - EventGroupHandle_t xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer ) - { - EventGroup_t *pxEventBits; + EventGroupHandle_t xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer ) + { + EventGroup_t * pxEventBits; - /* A StaticEventGroup_t object must be provided. */ - configASSERT( pxEventGroupBuffer ); + /* A StaticEventGroup_t object must be provided. */ + configASSERT( pxEventGroupBuffer ); - #if( configASSERT_DEFINED == 1 ) - { - /* Sanity check that the size of the structure used to declare a - variable of type StaticEventGroup_t equals the size of the real - event group structure. */ - volatile size_t xSize = sizeof( StaticEventGroup_t ); - configASSERT( xSize == sizeof( EventGroup_t ) ); - } /*lint !e529 xSize is referenced if configASSERT() is defined. */ - #endif /* configASSERT_DEFINED */ + #if ( configASSERT_DEFINED == 1 ) + { + /* Sanity check that the size of the structure used to declare a + * variable of type StaticEventGroup_t equals the size of the real + * event group structure. */ + volatile size_t xSize = sizeof( StaticEventGroup_t ); + configASSERT( xSize == sizeof( EventGroup_t ) ); + } /*lint !e529 xSize is referenced if configASSERT() is defined. */ + #endif /* configASSERT_DEFINED */ - /* The user has provided a statically allocated event group - use it. */ - pxEventBits = ( EventGroup_t * ) pxEventGroupBuffer; /*lint !e740 !e9087 EventGroup_t and StaticEventGroup_t are deliberately aliased for data hiding purposes and guaranteed to have the same size and alignment requirement - checked by configASSERT(). */ + /* The user has provided a statically allocated event group - use it. */ + pxEventBits = ( EventGroup_t * ) pxEventGroupBuffer; /*lint !e740 !e9087 EventGroup_t and StaticEventGroup_t are deliberately aliased for data hiding purposes and guaranteed to have the same size and alignment requirement - checked by configASSERT(). */ - if( pxEventBits != NULL ) - { - pxEventBits->uxEventBits = 0; - vListInitialise( &( pxEventBits->xTasksWaitingForBits ) ); + if( pxEventBits != NULL ) + { + pxEventBits->uxEventBits = 0; + vListInitialise( &( pxEventBits->xTasksWaitingForBits ) ); - #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - { - /* Both static and dynamic allocation can be used, so note that - this event group was created statically in case the event group - is later deleted. */ - pxEventBits->ucStaticallyAllocated = pdTRUE; - } - #endif /* configSUPPORT_DYNAMIC_ALLOCATION */ + #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + { + /* Both static and dynamic allocation can be used, so note that + * this event group was created statically in case the event group + * is later deleted. */ + pxEventBits->ucStaticallyAllocated = pdTRUE; + } + #endif /* configSUPPORT_DYNAMIC_ALLOCATION */ - traceEVENT_GROUP_CREATE( pxEventBits ); - } - else - { - /* xEventGroupCreateStatic should only ever be called with - pxEventGroupBuffer pointing to a pre-allocated (compile time - allocated) StaticEventGroup_t variable. */ - traceEVENT_GROUP_CREATE_FAILED(); - } + traceEVENT_GROUP_CREATE( pxEventBits ); + } + else + { + /* xEventGroupCreateStatic should only ever be called with + * pxEventGroupBuffer pointing to a pre-allocated (compile time + * allocated) StaticEventGroup_t variable. */ + traceEVENT_GROUP_CREATE_FAILED(); + } - return pxEventBits; - } + return pxEventBits; + } #endif /* configSUPPORT_STATIC_ALLOCATION */ /*-----------------------------------------------------------*/ -#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) +#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - EventGroupHandle_t xEventGroupCreate( void ) - { - EventGroup_t *pxEventBits; + EventGroupHandle_t xEventGroupCreate( void ) + { + EventGroup_t * pxEventBits; - /* Allocate the event group. Justification for MISRA deviation as - follows: pvPortMalloc() always ensures returned memory blocks are - aligned per the requirements of the MCU stack. In this case - pvPortMalloc() must return a pointer that is guaranteed to meet the - alignment requirements of the EventGroup_t structure - which (if you - follow it through) is the alignment requirements of the TickType_t type - (EventBits_t being of TickType_t itself). Therefore, whenever the - stack alignment requirements are greater than or equal to the - TickType_t alignment requirements the cast is safe. In other cases, - where the natural word size of the architecture is less than - sizeof( TickType_t ), the TickType_t variables will be accessed in two - or more reads operations, and the alignment requirements is only that - of each individual read. */ - pxEventBits = ( EventGroup_t * ) pvPortMalloc( sizeof( EventGroup_t ) ); /*lint !e9087 !e9079 see comment above. */ + /* Allocate the event group. Justification for MISRA deviation as + * follows: pvPortMalloc() always ensures returned memory blocks are + * aligned per the requirements of the MCU stack. In this case + * pvPortMalloc() must return a pointer that is guaranteed to meet the + * alignment requirements of the EventGroup_t structure - which (if you + * follow it through) is the alignment requirements of the TickType_t type + * (EventBits_t being of TickType_t itself). Therefore, whenever the + * stack alignment requirements are greater than or equal to the + * TickType_t alignment requirements the cast is safe. In other cases, + * where the natural word size of the architecture is less than + * sizeof( TickType_t ), the TickType_t variables will be accessed in two + * or more reads operations, and the alignment requirements is only that + * of each individual read. */ + pxEventBits = ( EventGroup_t * ) pvPortMalloc( sizeof( EventGroup_t ) ); /*lint !e9087 !e9079 see comment above. */ - if( pxEventBits != NULL ) - { - pxEventBits->uxEventBits = 0; - vListInitialise( &( pxEventBits->xTasksWaitingForBits ) ); + if( pxEventBits != NULL ) + { + pxEventBits->uxEventBits = 0; + vListInitialise( &( pxEventBits->xTasksWaitingForBits ) ); - #if( configSUPPORT_STATIC_ALLOCATION == 1 ) - { - /* Both static and dynamic allocation can be used, so note this - event group was allocated statically in case the event group is - later deleted. */ - pxEventBits->ucStaticallyAllocated = pdFALSE; - } - #endif /* configSUPPORT_STATIC_ALLOCATION */ + #if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + { + /* Both static and dynamic allocation can be used, so note this + * event group was allocated statically in case the event group is + * later deleted. */ + pxEventBits->ucStaticallyAllocated = pdFALSE; + } + #endif /* configSUPPORT_STATIC_ALLOCATION */ - traceEVENT_GROUP_CREATE( pxEventBits ); - } - else - { - traceEVENT_GROUP_CREATE_FAILED(); /*lint !e9063 Else branch only exists to allow tracing and does not generate code if trace macros are not defined. */ - } + traceEVENT_GROUP_CREATE( pxEventBits ); + } + else + { + traceEVENT_GROUP_CREATE_FAILED(); /*lint !e9063 Else branch only exists to allow tracing and does not generate code if trace macros are not defined. */ + } - return pxEventBits; - } + return pxEventBits; + } #endif /* configSUPPORT_DYNAMIC_ALLOCATION */ /*-----------------------------------------------------------*/ -EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ) +EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, + const EventBits_t uxBitsToWaitFor, + TickType_t xTicksToWait ) { -EventBits_t uxOriginalBitValue, uxReturn; -EventGroup_t *pxEventBits = xEventGroup; -BaseType_t xAlreadyYielded; -BaseType_t xTimeoutOccurred = pdFALSE; + EventBits_t uxOriginalBitValue, uxReturn; + EventGroup_t * pxEventBits = xEventGroup; + BaseType_t xAlreadyYielded; + BaseType_t xTimeoutOccurred = pdFALSE; - configASSERT( ( uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 ); - configASSERT( uxBitsToWaitFor != 0 ); - #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) - { - configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ); - } - #endif + configASSERT( ( uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 ); + configASSERT( uxBitsToWaitFor != 0 ); + #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) + { + configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ); + } + #endif - vTaskSuspendAll(); - { - uxOriginalBitValue = pxEventBits->uxEventBits; + vTaskSuspendAll(); + { + uxOriginalBitValue = pxEventBits->uxEventBits; - ( void ) xEventGroupSetBits( xEventGroup, uxBitsToSet ); + ( void ) xEventGroupSetBits( xEventGroup, uxBitsToSet ); - if( ( ( uxOriginalBitValue | uxBitsToSet ) & uxBitsToWaitFor ) == uxBitsToWaitFor ) - { - /* All the rendezvous bits are now set - no need to block. */ - uxReturn = ( uxOriginalBitValue | uxBitsToSet ); + if( ( ( uxOriginalBitValue | uxBitsToSet ) & uxBitsToWaitFor ) == uxBitsToWaitFor ) + { + /* All the rendezvous bits are now set - no need to block. */ + uxReturn = ( uxOriginalBitValue | uxBitsToSet ); - /* Rendezvous always clear the bits. They will have been cleared - already unless this is the only task in the rendezvous. */ - pxEventBits->uxEventBits &= ~uxBitsToWaitFor; + /* Rendezvous always clear the bits. They will have been cleared + * already unless this is the only task in the rendezvous. */ + pxEventBits->uxEventBits &= ~uxBitsToWaitFor; - xTicksToWait = 0; - } - else - { - if( xTicksToWait != ( TickType_t ) 0 ) - { - traceEVENT_GROUP_SYNC_BLOCK( xEventGroup, uxBitsToSet, uxBitsToWaitFor ); + xTicksToWait = 0; + } + else + { + if( xTicksToWait != ( TickType_t ) 0 ) + { + traceEVENT_GROUP_SYNC_BLOCK( xEventGroup, uxBitsToSet, uxBitsToWaitFor ); - /* Store the bits that the calling task is waiting for in the - task's event list item so the kernel knows when a match is - found. Then enter the blocked state. */ - vTaskPlaceOnUnorderedEventList( &( pxEventBits->xTasksWaitingForBits ), ( uxBitsToWaitFor | eventCLEAR_EVENTS_ON_EXIT_BIT | eventWAIT_FOR_ALL_BITS ), xTicksToWait ); + /* Store the bits that the calling task is waiting for in the + * task's event list item so the kernel knows when a match is + * found. Then enter the blocked state. */ + vTaskPlaceOnUnorderedEventList( &( pxEventBits->xTasksWaitingForBits ), ( uxBitsToWaitFor | eventCLEAR_EVENTS_ON_EXIT_BIT | eventWAIT_FOR_ALL_BITS ), xTicksToWait ); - /* This assignment is obsolete as uxReturn will get set after - the task unblocks, but some compilers mistakenly generate a - warning about uxReturn being returned without being set if the - assignment is omitted. */ - uxReturn = 0; - } - else - { - /* The rendezvous bits were not set, but no block time was - specified - just return the current event bit value. */ - uxReturn = pxEventBits->uxEventBits; - xTimeoutOccurred = pdTRUE; - } - } - } - xAlreadyYielded = xTaskResumeAll(); + /* This assignment is obsolete as uxReturn will get set after + * the task unblocks, but some compilers mistakenly generate a + * warning about uxReturn being returned without being set if the + * assignment is omitted. */ + uxReturn = 0; + } + else + { + /* The rendezvous bits were not set, but no block time was + * specified - just return the current event bit value. */ + uxReturn = pxEventBits->uxEventBits; + xTimeoutOccurred = pdTRUE; + } + } + } + xAlreadyYielded = xTaskResumeAll(); - if( xTicksToWait != ( TickType_t ) 0 ) - { - if( xAlreadyYielded == pdFALSE ) - { - portYIELD_WITHIN_API(); - } - else - { - mtCOVERAGE_TEST_MARKER(); - } + if( xTicksToWait != ( TickType_t ) 0 ) + { + if( xAlreadyYielded == pdFALSE ) + { + portYIELD_WITHIN_API(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } - /* The task blocked to wait for its required bits to be set - at this - point either the required bits were set or the block time expired. If - the required bits were set they will have been stored in the task's - event list item, and they should now be retrieved then cleared. */ - uxReturn = uxTaskResetEventItemValue(); + /* The task blocked to wait for its required bits to be set - at this + * point either the required bits were set or the block time expired. If + * the required bits were set they will have been stored in the task's + * event list item, and they should now be retrieved then cleared. */ + uxReturn = uxTaskResetEventItemValue(); - if( ( uxReturn & eventUNBLOCKED_DUE_TO_BIT_SET ) == ( EventBits_t ) 0 ) - { - /* The task timed out, just return the current event bit value. */ - taskENTER_CRITICAL(); - { - uxReturn = pxEventBits->uxEventBits; + if( ( uxReturn & eventUNBLOCKED_DUE_TO_BIT_SET ) == ( EventBits_t ) 0 ) + { + /* The task timed out, just return the current event bit value. */ + taskENTER_CRITICAL(); + { + uxReturn = pxEventBits->uxEventBits; - /* Although the task got here because it timed out before the - bits it was waiting for were set, it is possible that since it - unblocked another task has set the bits. If this is the case - then it needs to clear the bits before exiting. */ - if( ( uxReturn & uxBitsToWaitFor ) == uxBitsToWaitFor ) - { - pxEventBits->uxEventBits &= ~uxBitsToWaitFor; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - } - taskEXIT_CRITICAL(); + /* Although the task got here because it timed out before the + * bits it was waiting for were set, it is possible that since it + * unblocked another task has set the bits. If this is the case + * then it needs to clear the bits before exiting. */ + if( ( uxReturn & uxBitsToWaitFor ) == uxBitsToWaitFor ) + { + pxEventBits->uxEventBits &= ~uxBitsToWaitFor; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + taskEXIT_CRITICAL(); - xTimeoutOccurred = pdTRUE; - } - else - { - /* The task unblocked because the bits were set. */ - } + xTimeoutOccurred = pdTRUE; + } + else + { + /* The task unblocked because the bits were set. */ + } - /* Control bits might be set as the task had blocked should not be - returned. */ - uxReturn &= ~eventEVENT_BITS_CONTROL_BYTES; - } + /* Control bits might be set as the task had blocked should not be + * returned. */ + uxReturn &= ~eventEVENT_BITS_CONTROL_BYTES; + } - traceEVENT_GROUP_SYNC_END( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTimeoutOccurred ); + traceEVENT_GROUP_SYNC_END( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTimeoutOccurred ); - /* Prevent compiler warnings when trace macros are not used. */ - ( void ) xTimeoutOccurred; + /* Prevent compiler warnings when trace macros are not used. */ + ( void ) xTimeoutOccurred; - return uxReturn; + return uxReturn; } /*-----------------------------------------------------------*/ -EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) +EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToWaitFor, + const BaseType_t xClearOnExit, + const BaseType_t xWaitForAllBits, + TickType_t xTicksToWait ) { -EventGroup_t *pxEventBits = xEventGroup; -EventBits_t uxReturn, uxControlBits = 0; -BaseType_t xWaitConditionMet, xAlreadyYielded; -BaseType_t xTimeoutOccurred = pdFALSE; + EventGroup_t * pxEventBits = xEventGroup; + EventBits_t uxReturn, uxControlBits = 0; + BaseType_t xWaitConditionMet, xAlreadyYielded; + BaseType_t xTimeoutOccurred = pdFALSE; - /* Check the user is not attempting to wait on the bits used by the kernel - itself, and that at least one bit is being requested. */ - configASSERT( xEventGroup ); - configASSERT( ( uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 ); - configASSERT( uxBitsToWaitFor != 0 ); - #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) - { - configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ); - } - #endif + /* Check the user is not attempting to wait on the bits used by the kernel + * itself, and that at least one bit is being requested. */ + configASSERT( xEventGroup ); + configASSERT( ( uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 ); + configASSERT( uxBitsToWaitFor != 0 ); + #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) + { + configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ); + } + #endif - vTaskSuspendAll(); - { - const EventBits_t uxCurrentEventBits = pxEventBits->uxEventBits; + vTaskSuspendAll(); + { + const EventBits_t uxCurrentEventBits = pxEventBits->uxEventBits; - /* Check to see if the wait condition is already met or not. */ - xWaitConditionMet = prvTestWaitCondition( uxCurrentEventBits, uxBitsToWaitFor, xWaitForAllBits ); + /* Check to see if the wait condition is already met or not. */ + xWaitConditionMet = prvTestWaitCondition( uxCurrentEventBits, uxBitsToWaitFor, xWaitForAllBits ); - if( xWaitConditionMet != pdFALSE ) - { - /* The wait condition has already been met so there is no need to - block. */ - uxReturn = uxCurrentEventBits; - xTicksToWait = ( TickType_t ) 0; + if( xWaitConditionMet != pdFALSE ) + { + /* The wait condition has already been met so there is no need to + * block. */ + uxReturn = uxCurrentEventBits; + xTicksToWait = ( TickType_t ) 0; - /* Clear the wait bits if requested to do so. */ - if( xClearOnExit != pdFALSE ) - { - pxEventBits->uxEventBits &= ~uxBitsToWaitFor; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - } - else if( xTicksToWait == ( TickType_t ) 0 ) - { - /* The wait condition has not been met, but no block time was - specified, so just return the current value. */ - uxReturn = uxCurrentEventBits; - xTimeoutOccurred = pdTRUE; - } - else - { - /* The task is going to block to wait for its required bits to be - set. uxControlBits are used to remember the specified behaviour of - this call to xEventGroupWaitBits() - for use when the event bits - unblock the task. */ - if( xClearOnExit != pdFALSE ) - { - uxControlBits |= eventCLEAR_EVENTS_ON_EXIT_BIT; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } + /* Clear the wait bits if requested to do so. */ + if( xClearOnExit != pdFALSE ) + { + pxEventBits->uxEventBits &= ~uxBitsToWaitFor; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else if( xTicksToWait == ( TickType_t ) 0 ) + { + /* The wait condition has not been met, but no block time was + * specified, so just return the current value. */ + uxReturn = uxCurrentEventBits; + xTimeoutOccurred = pdTRUE; + } + else + { + /* The task is going to block to wait for its required bits to be + * set. uxControlBits are used to remember the specified behaviour of + * this call to xEventGroupWaitBits() - for use when the event bits + * unblock the task. */ + if( xClearOnExit != pdFALSE ) + { + uxControlBits |= eventCLEAR_EVENTS_ON_EXIT_BIT; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } - if( xWaitForAllBits != pdFALSE ) - { - uxControlBits |= eventWAIT_FOR_ALL_BITS; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } + if( xWaitForAllBits != pdFALSE ) + { + uxControlBits |= eventWAIT_FOR_ALL_BITS; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } - /* Store the bits that the calling task is waiting for in the - task's event list item so the kernel knows when a match is - found. Then enter the blocked state. */ - vTaskPlaceOnUnorderedEventList( &( pxEventBits->xTasksWaitingForBits ), ( uxBitsToWaitFor | uxControlBits ), xTicksToWait ); + /* Store the bits that the calling task is waiting for in the + * task's event list item so the kernel knows when a match is + * found. Then enter the blocked state. */ + vTaskPlaceOnUnorderedEventList( &( pxEventBits->xTasksWaitingForBits ), ( uxBitsToWaitFor | uxControlBits ), xTicksToWait ); - /* This is obsolete as it will get set after the task unblocks, but - some compilers mistakenly generate a warning about the variable - being returned without being set if it is not done. */ - uxReturn = 0; + /* This is obsolete as it will get set after the task unblocks, but + * some compilers mistakenly generate a warning about the variable + * being returned without being set if it is not done. */ + uxReturn = 0; - traceEVENT_GROUP_WAIT_BITS_BLOCK( xEventGroup, uxBitsToWaitFor ); - } - } - xAlreadyYielded = xTaskResumeAll(); + traceEVENT_GROUP_WAIT_BITS_BLOCK( xEventGroup, uxBitsToWaitFor ); + } + } + xAlreadyYielded = xTaskResumeAll(); - if( xTicksToWait != ( TickType_t ) 0 ) - { - if( xAlreadyYielded == pdFALSE ) - { - portYIELD_WITHIN_API(); - } - else - { - mtCOVERAGE_TEST_MARKER(); - } + if( xTicksToWait != ( TickType_t ) 0 ) + { + if( xAlreadyYielded == pdFALSE ) + { + portYIELD_WITHIN_API(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } - /* The task blocked to wait for its required bits to be set - at this - point either the required bits were set or the block time expired. If - the required bits were set they will have been stored in the task's - event list item, and they should now be retrieved then cleared. */ - uxReturn = uxTaskResetEventItemValue(); + /* The task blocked to wait for its required bits to be set - at this + * point either the required bits were set or the block time expired. If + * the required bits were set they will have been stored in the task's + * event list item, and they should now be retrieved then cleared. */ + uxReturn = uxTaskResetEventItemValue(); - if( ( uxReturn & eventUNBLOCKED_DUE_TO_BIT_SET ) == ( EventBits_t ) 0 ) - { - taskENTER_CRITICAL(); - { - /* The task timed out, just return the current event bit value. */ - uxReturn = pxEventBits->uxEventBits; + if( ( uxReturn & eventUNBLOCKED_DUE_TO_BIT_SET ) == ( EventBits_t ) 0 ) + { + taskENTER_CRITICAL(); + { + /* The task timed out, just return the current event bit value. */ + uxReturn = pxEventBits->uxEventBits; - /* It is possible that the event bits were updated between this - task leaving the Blocked state and running again. */ - if( prvTestWaitCondition( uxReturn, uxBitsToWaitFor, xWaitForAllBits ) != pdFALSE ) - { - if( xClearOnExit != pdFALSE ) - { - pxEventBits->uxEventBits &= ~uxBitsToWaitFor; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - xTimeoutOccurred = pdTRUE; - } - taskEXIT_CRITICAL(); - } - else - { - /* The task unblocked because the bits were set. */ - } + /* It is possible that the event bits were updated between this + * task leaving the Blocked state and running again. */ + if( prvTestWaitCondition( uxReturn, uxBitsToWaitFor, xWaitForAllBits ) != pdFALSE ) + { + if( xClearOnExit != pdFALSE ) + { + pxEventBits->uxEventBits &= ~uxBitsToWaitFor; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } - /* The task blocked so control bits may have been set. */ - uxReturn &= ~eventEVENT_BITS_CONTROL_BYTES; - } - traceEVENT_GROUP_WAIT_BITS_END( xEventGroup, uxBitsToWaitFor, xTimeoutOccurred ); + xTimeoutOccurred = pdTRUE; + } + taskEXIT_CRITICAL(); + } + else + { + /* The task unblocked because the bits were set. */ + } - /* Prevent compiler warnings when trace macros are not used. */ - ( void ) xTimeoutOccurred; + /* The task blocked so control bits may have been set. */ + uxReturn &= ~eventEVENT_BITS_CONTROL_BYTES; + } - return uxReturn; + traceEVENT_GROUP_WAIT_BITS_END( xEventGroup, uxBitsToWaitFor, xTimeoutOccurred ); + + /* Prevent compiler warnings when trace macros are not used. */ + ( void ) xTimeoutOccurred; + + return uxReturn; } /*-----------------------------------------------------------*/ -EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) +EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) { -EventGroup_t *pxEventBits = xEventGroup; -EventBits_t uxReturn; + EventGroup_t * pxEventBits = xEventGroup; + EventBits_t uxReturn; - /* Check the user is not attempting to clear the bits used by the kernel - itself. */ - configASSERT( xEventGroup ); - configASSERT( ( uxBitsToClear & eventEVENT_BITS_CONTROL_BYTES ) == 0 ); + /* Check the user is not attempting to clear the bits used by the kernel + * itself. */ + configASSERT( xEventGroup ); + configASSERT( ( uxBitsToClear & eventEVENT_BITS_CONTROL_BYTES ) == 0 ); - taskENTER_CRITICAL(); - { - traceEVENT_GROUP_CLEAR_BITS( xEventGroup, uxBitsToClear ); + taskENTER_CRITICAL(); + { + traceEVENT_GROUP_CLEAR_BITS( xEventGroup, uxBitsToClear ); - /* The value returned is the event group value prior to the bits being - cleared. */ - uxReturn = pxEventBits->uxEventBits; + /* The value returned is the event group value prior to the bits being + * cleared. */ + uxReturn = pxEventBits->uxEventBits; - /* Clear the bits. */ - pxEventBits->uxEventBits &= ~uxBitsToClear; - } - taskEXIT_CRITICAL(); + /* Clear the bits. */ + pxEventBits->uxEventBits &= ~uxBitsToClear; + } + taskEXIT_CRITICAL(); - return uxReturn; + return uxReturn; } /*-----------------------------------------------------------*/ #if ( ( configUSE_TRACE_FACILITY == 1 ) && ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) ) - BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) - { - BaseType_t xReturn; + BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) + { + BaseType_t xReturn; - traceEVENT_GROUP_CLEAR_BITS_FROM_ISR( xEventGroup, uxBitsToClear ); - xReturn = xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToClear, NULL ); /*lint !e9087 Can't avoid cast to void* as a generic callback function not specific to this use case. Callback casts back to original type so safe. */ + traceEVENT_GROUP_CLEAR_BITS_FROM_ISR( xEventGroup, uxBitsToClear ); + xReturn = xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToClear, NULL ); /*lint !e9087 Can't avoid cast to void* as a generic callback function not specific to this use case. Callback casts back to original type so safe. */ - return xReturn; - } + return xReturn; + } -#endif +#endif /* if ( ( configUSE_TRACE_FACILITY == 1 ) && ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) ) */ /*-----------------------------------------------------------*/ EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ) { -UBaseType_t uxSavedInterruptStatus; -EventGroup_t const * const pxEventBits = xEventGroup; -EventBits_t uxReturn; + UBaseType_t uxSavedInterruptStatus; + EventGroup_t const * const pxEventBits = xEventGroup; + EventBits_t uxReturn; - uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); - { - uxReturn = pxEventBits->uxEventBits; - } - portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); + uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); + { + uxReturn = pxEventBits->uxEventBits; + } + portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); - return uxReturn; + return uxReturn; } /*lint !e818 EventGroupHandle_t is a typedef used in other functions to so can't be pointer to const. */ /*-----------------------------------------------------------*/ -EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) +EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) { -ListItem_t *pxListItem, *pxNext; -ListItem_t const *pxListEnd; -List_t const * pxList; -EventBits_t uxBitsToClear = 0, uxBitsWaitedFor, uxControlBits; -EventGroup_t *pxEventBits = xEventGroup; -BaseType_t xMatchFound = pdFALSE; + ListItem_t * pxListItem, * pxNext; + ListItem_t const * pxListEnd; + List_t const * pxList; + EventBits_t uxBitsToClear = 0, uxBitsWaitedFor, uxControlBits; + EventGroup_t * pxEventBits = xEventGroup; + BaseType_t xMatchFound = pdFALSE; - /* Check the user is not attempting to set the bits used by the kernel - itself. */ - configASSERT( xEventGroup ); - configASSERT( ( uxBitsToSet & eventEVENT_BITS_CONTROL_BYTES ) == 0 ); + /* Check the user is not attempting to set the bits used by the kernel + * itself. */ + configASSERT( xEventGroup ); + configASSERT( ( uxBitsToSet & eventEVENT_BITS_CONTROL_BYTES ) == 0 ); - pxList = &( pxEventBits->xTasksWaitingForBits ); - pxListEnd = listGET_END_MARKER( pxList ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */ - vTaskSuspendAll(); - { - traceEVENT_GROUP_SET_BITS( xEventGroup, uxBitsToSet ); + pxList = &( pxEventBits->xTasksWaitingForBits ); + pxListEnd = listGET_END_MARKER( pxList ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */ + vTaskSuspendAll(); + { + traceEVENT_GROUP_SET_BITS( xEventGroup, uxBitsToSet ); - pxListItem = listGET_HEAD_ENTRY( pxList ); + pxListItem = listGET_HEAD_ENTRY( pxList ); - /* Set the bits. */ - pxEventBits->uxEventBits |= uxBitsToSet; + /* Set the bits. */ + pxEventBits->uxEventBits |= uxBitsToSet; - /* See if the new bit value should unblock any tasks. */ - while( pxListItem != pxListEnd ) - { - pxNext = listGET_NEXT( pxListItem ); - uxBitsWaitedFor = listGET_LIST_ITEM_VALUE( pxListItem ); - xMatchFound = pdFALSE; + /* See if the new bit value should unblock any tasks. */ + while( pxListItem != pxListEnd ) + { + pxNext = listGET_NEXT( pxListItem ); + uxBitsWaitedFor = listGET_LIST_ITEM_VALUE( pxListItem ); + xMatchFound = pdFALSE; - /* Split the bits waited for from the control bits. */ - uxControlBits = uxBitsWaitedFor & eventEVENT_BITS_CONTROL_BYTES; - uxBitsWaitedFor &= ~eventEVENT_BITS_CONTROL_BYTES; + /* Split the bits waited for from the control bits. */ + uxControlBits = uxBitsWaitedFor & eventEVENT_BITS_CONTROL_BYTES; + uxBitsWaitedFor &= ~eventEVENT_BITS_CONTROL_BYTES; - if( ( uxControlBits & eventWAIT_FOR_ALL_BITS ) == ( EventBits_t ) 0 ) - { - /* Just looking for single bit being set. */ - if( ( uxBitsWaitedFor & pxEventBits->uxEventBits ) != ( EventBits_t ) 0 ) - { - xMatchFound = pdTRUE; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - } - else if( ( uxBitsWaitedFor & pxEventBits->uxEventBits ) == uxBitsWaitedFor ) - { - /* All bits are set. */ - xMatchFound = pdTRUE; - } - else - { - /* Need all bits to be set, but not all the bits were set. */ - } + if( ( uxControlBits & eventWAIT_FOR_ALL_BITS ) == ( EventBits_t ) 0 ) + { + /* Just looking for single bit being set. */ + if( ( uxBitsWaitedFor & pxEventBits->uxEventBits ) != ( EventBits_t ) 0 ) + { + xMatchFound = pdTRUE; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else if( ( uxBitsWaitedFor & pxEventBits->uxEventBits ) == uxBitsWaitedFor ) + { + /* All bits are set. */ + xMatchFound = pdTRUE; + } + else + { + /* Need all bits to be set, but not all the bits were set. */ + } - if( xMatchFound != pdFALSE ) - { - /* The bits match. Should the bits be cleared on exit? */ - if( ( uxControlBits & eventCLEAR_EVENTS_ON_EXIT_BIT ) != ( EventBits_t ) 0 ) - { - uxBitsToClear |= uxBitsWaitedFor; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } + if( xMatchFound != pdFALSE ) + { + /* The bits match. Should the bits be cleared on exit? */ + if( ( uxControlBits & eventCLEAR_EVENTS_ON_EXIT_BIT ) != ( EventBits_t ) 0 ) + { + uxBitsToClear |= uxBitsWaitedFor; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } - /* Store the actual event flag value in the task's event list - item before removing the task from the event list. The - eventUNBLOCKED_DUE_TO_BIT_SET bit is set so the task knows - that is was unblocked due to its required bits matching, rather - than because it timed out. */ - vTaskRemoveFromUnorderedEventList( pxListItem, pxEventBits->uxEventBits | eventUNBLOCKED_DUE_TO_BIT_SET ); - } + /* Store the actual event flag value in the task's event list + * item before removing the task from the event list. The + * eventUNBLOCKED_DUE_TO_BIT_SET bit is set so the task knows + * that is was unblocked due to its required bits matching, rather + * than because it timed out. */ + vTaskRemoveFromUnorderedEventList( pxListItem, pxEventBits->uxEventBits | eventUNBLOCKED_DUE_TO_BIT_SET ); + } - /* Move onto the next list item. Note pxListItem->pxNext is not - used here as the list item may have been removed from the event list - and inserted into the ready/pending reading list. */ - pxListItem = pxNext; - } + /* Move onto the next list item. Note pxListItem->pxNext is not + * used here as the list item may have been removed from the event list + * and inserted into the ready/pending reading list. */ + pxListItem = pxNext; + } - /* Clear any bits that matched when the eventCLEAR_EVENTS_ON_EXIT_BIT - bit was set in the control word. */ - pxEventBits->uxEventBits &= ~uxBitsToClear; - } - ( void ) xTaskResumeAll(); + /* Clear any bits that matched when the eventCLEAR_EVENTS_ON_EXIT_BIT + * bit was set in the control word. */ + pxEventBits->uxEventBits &= ~uxBitsToClear; + } + ( void ) xTaskResumeAll(); - return pxEventBits->uxEventBits; + return pxEventBits->uxEventBits; } /*-----------------------------------------------------------*/ void vEventGroupDelete( EventGroupHandle_t xEventGroup ) { -EventGroup_t *pxEventBits = xEventGroup; -const List_t *pxTasksWaitingForBits = &( pxEventBits->xTasksWaitingForBits ); + EventGroup_t * pxEventBits = xEventGroup; + const List_t * pxTasksWaitingForBits = &( pxEventBits->xTasksWaitingForBits ); - vTaskSuspendAll(); - { - traceEVENT_GROUP_DELETE( xEventGroup ); + vTaskSuspendAll(); + { + traceEVENT_GROUP_DELETE( xEventGroup ); - while( listCURRENT_LIST_LENGTH( pxTasksWaitingForBits ) > ( UBaseType_t ) 0 ) - { - /* Unblock the task, returning 0 as the event list is being deleted - and cannot therefore have any bits set. */ - configASSERT( pxTasksWaitingForBits->xListEnd.pxNext != ( const ListItem_t * ) &( pxTasksWaitingForBits->xListEnd ) ); - vTaskRemoveFromUnorderedEventList( pxTasksWaitingForBits->xListEnd.pxNext, eventUNBLOCKED_DUE_TO_BIT_SET ); - } + while( listCURRENT_LIST_LENGTH( pxTasksWaitingForBits ) > ( UBaseType_t ) 0 ) + { + /* Unblock the task, returning 0 as the event list is being deleted + * and cannot therefore have any bits set. */ + configASSERT( pxTasksWaitingForBits->xListEnd.pxNext != ( const ListItem_t * ) &( pxTasksWaitingForBits->xListEnd ) ); + vTaskRemoveFromUnorderedEventList( pxTasksWaitingForBits->xListEnd.pxNext, eventUNBLOCKED_DUE_TO_BIT_SET ); + } - #if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) ) - { - /* The event group can only have been allocated dynamically - free - it again. */ - vPortFree( pxEventBits ); - } - #elif( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) - { - /* The event group could have been allocated statically or - dynamically, so check before attempting to free the memory. */ - if( pxEventBits->ucStaticallyAllocated == ( uint8_t ) pdFALSE ) - { - vPortFree( pxEventBits ); - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - } - #endif /* configSUPPORT_DYNAMIC_ALLOCATION */ - } - ( void ) xTaskResumeAll(); + #if ( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) ) + { + /* The event group can only have been allocated dynamically - free + * it again. */ + vPortFree( pxEventBits ); + } + #elif ( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) + { + /* The event group could have been allocated statically or + * dynamically, so check before attempting to free the memory. */ + if( pxEventBits->ucStaticallyAllocated == ( uint8_t ) pdFALSE ) + { + vPortFree( pxEventBits ); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + #endif /* configSUPPORT_DYNAMIC_ALLOCATION */ + } + ( void ) xTaskResumeAll(); } /*-----------------------------------------------------------*/ /* For internal use only - execute a 'set bits' command that was pended from -an interrupt. */ -void vEventGroupSetBitsCallback( void *pvEventGroup, const uint32_t ulBitsToSet ) + * an interrupt. */ +void vEventGroupSetBitsCallback( void * pvEventGroup, + const uint32_t ulBitsToSet ) { - ( void ) xEventGroupSetBits( pvEventGroup, ( EventBits_t ) ulBitsToSet ); /*lint !e9079 Can't avoid cast to void* as a generic timer callback prototype. Callback casts back to original type so safe. */ + ( void ) xEventGroupSetBits( pvEventGroup, ( EventBits_t ) ulBitsToSet ); /*lint !e9079 Can't avoid cast to void* as a generic timer callback prototype. Callback casts back to original type so safe. */ } /*-----------------------------------------------------------*/ /* For internal use only - execute a 'clear bits' command that was pended from -an interrupt. */ -void vEventGroupClearBitsCallback( void *pvEventGroup, const uint32_t ulBitsToClear ) + * an interrupt. */ +void vEventGroupClearBitsCallback( void * pvEventGroup, + const uint32_t ulBitsToClear ) { - ( void ) xEventGroupClearBits( pvEventGroup, ( EventBits_t ) ulBitsToClear ); /*lint !e9079 Can't avoid cast to void* as a generic timer callback prototype. Callback casts back to original type so safe. */ + ( void ) xEventGroupClearBits( pvEventGroup, ( EventBits_t ) ulBitsToClear ); /*lint !e9079 Can't avoid cast to void* as a generic timer callback prototype. Callback casts back to original type so safe. */ } /*-----------------------------------------------------------*/ -static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEventBits, const EventBits_t uxBitsToWaitFor, const BaseType_t xWaitForAllBits ) +static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEventBits, + const EventBits_t uxBitsToWaitFor, + const BaseType_t xWaitForAllBits ) { -BaseType_t xWaitConditionMet = pdFALSE; + BaseType_t xWaitConditionMet = pdFALSE; - if( xWaitForAllBits == pdFALSE ) - { - /* Task only has to wait for one bit within uxBitsToWaitFor to be - set. Is one already set? */ - if( ( uxCurrentEventBits & uxBitsToWaitFor ) != ( EventBits_t ) 0 ) - { - xWaitConditionMet = pdTRUE; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - } - else - { - /* Task has to wait for all the bits in uxBitsToWaitFor to be set. - Are they set already? */ - if( ( uxCurrentEventBits & uxBitsToWaitFor ) == uxBitsToWaitFor ) - { - xWaitConditionMet = pdTRUE; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - } + if( xWaitForAllBits == pdFALSE ) + { + /* Task only has to wait for one bit within uxBitsToWaitFor to be + * set. Is one already set? */ + if( ( uxCurrentEventBits & uxBitsToWaitFor ) != ( EventBits_t ) 0 ) + { + xWaitConditionMet = pdTRUE; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + /* Task has to wait for all the bits in uxBitsToWaitFor to be set. + * Are they set already? */ + if( ( uxCurrentEventBits & uxBitsToWaitFor ) == uxBitsToWaitFor ) + { + xWaitConditionMet = pdTRUE; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } - return xWaitConditionMet; + return xWaitConditionMet; } /*-----------------------------------------------------------*/ #if ( ( configUSE_TRACE_FACILITY == 1 ) && ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) ) - BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken ) - { - BaseType_t xReturn; + BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, + BaseType_t * pxHigherPriorityTaskWoken ) + { + BaseType_t xReturn; - traceEVENT_GROUP_SET_BITS_FROM_ISR( xEventGroup, uxBitsToSet ); - xReturn = xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken ); /*lint !e9087 Can't avoid cast to void* as a generic callback function not specific to this use case. Callback casts back to original type so safe. */ + traceEVENT_GROUP_SET_BITS_FROM_ISR( xEventGroup, uxBitsToSet ); + xReturn = xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken ); /*lint !e9087 Can't avoid cast to void* as a generic callback function not specific to this use case. Callback casts back to original type so safe. */ - return xReturn; - } + return xReturn; + } -#endif +#endif /* if ( ( configUSE_TRACE_FACILITY == 1 ) && ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) ) */ /*-----------------------------------------------------------*/ -#if (configUSE_TRACE_FACILITY == 1) +#if ( configUSE_TRACE_FACILITY == 1 ) - UBaseType_t uxEventGroupGetNumber( void* xEventGroup ) - { - UBaseType_t xReturn; - EventGroup_t const *pxEventBits = ( EventGroup_t * ) xEventGroup; /*lint !e9087 !e9079 EventGroupHandle_t is a pointer to an EventGroup_t, but EventGroupHandle_t is kept opaque outside of this file for data hiding purposes. */ + UBaseType_t uxEventGroupGetNumber( void * xEventGroup ) + { + UBaseType_t xReturn; + EventGroup_t const * pxEventBits = ( EventGroup_t * ) xEventGroup; /*lint !e9087 !e9079 EventGroupHandle_t is a pointer to an EventGroup_t, but EventGroupHandle_t is kept opaque outside of this file for data hiding purposes. */ - if( xEventGroup == NULL ) - { - xReturn = 0; - } - else - { - xReturn = pxEventBits->uxEventGroupNumber; - } + if( xEventGroup == NULL ) + { + xReturn = 0; + } + else + { + xReturn = pxEventBits->uxEventGroupNumber; + } - return xReturn; - } + return xReturn; + } #endif /* configUSE_TRACE_FACILITY */ /*-----------------------------------------------------------*/ #if ( configUSE_TRACE_FACILITY == 1 ) - void vEventGroupSetNumber( void * xEventGroup, UBaseType_t uxEventGroupNumber ) - { - ( ( EventGroup_t * ) xEventGroup )->uxEventGroupNumber = uxEventGroupNumber; /*lint !e9087 !e9079 EventGroupHandle_t is a pointer to an EventGroup_t, but EventGroupHandle_t is kept opaque outside of this file for data hiding purposes. */ - } + void vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) + { + ( ( EventGroup_t * ) xEventGroup )->uxEventGroupNumber = uxEventGroupNumber; /*lint !e9087 !e9079 EventGroupHandle_t is a pointer to an EventGroup_t, but EventGroupHandle_t is kept opaque outside of this file for data hiding purposes. */ + } #endif /* configUSE_TRACE_FACILITY */ /*-----------------------------------------------------------*/ - - diff --git a/include/FreeRTOS.h b/include/FreeRTOS.h index 5a1a49780..96cf880a4 100644 --- a/include/FreeRTOS.h +++ b/include/FreeRTOS.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.3.1 + * FreeRTOS Kernel V10.4.1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ #ifndef INC_FREERTOS_H @@ -46,11 +45,13 @@ * contains the typedefs required to build FreeRTOS. Read the instructions * in FreeRTOS/source/stdint.readme for more information. */ -#include /* READ COMMENT ABOVE. */ +#include /* READ COMMENT ABOVE. */ +/* *INDENT-OFF* */ #ifdef __cplusplus -extern "C" { + extern "C" { #endif +/* *INDENT-ON* */ /* Application specific configuration options. */ #include "FreeRTOSConfig.h" @@ -63,13 +64,14 @@ extern "C" { /* Must be defaulted before configUSE_NEWLIB_REENTRANT is used below. */ #ifndef configUSE_NEWLIB_REENTRANT - #define configUSE_NEWLIB_REENTRANT 0 + #define configUSE_NEWLIB_REENTRANT 0 #endif /* Required if struct _reent is used. */ #if ( configUSE_NEWLIB_REENTRANT == 1 ) - #include + #include #endif + /* * Check all the required application specific macros have been defined. * These macros are application specific and (as downloaded) are defined @@ -77,495 +79,509 @@ extern "C" { */ #ifndef configMINIMAL_STACK_SIZE - #error Missing definition: configMINIMAL_STACK_SIZE must be defined in FreeRTOSConfig.h. configMINIMAL_STACK_SIZE defines the size (in words) of the stack allocated to the idle task. Refer to the demo project provided for your port for a suitable value. + #error Missing definition: configMINIMAL_STACK_SIZE must be defined in FreeRTOSConfig.h. configMINIMAL_STACK_SIZE defines the size (in words) of the stack allocated to the idle task. Refer to the demo project provided for your port for a suitable value. #endif #ifndef configMAX_PRIORITIES - #error Missing definition: configMAX_PRIORITIES must be defined in FreeRTOSConfig.h. See the Configuration section of the FreeRTOS API documentation for details. + #error Missing definition: configMAX_PRIORITIES must be defined in FreeRTOSConfig.h. See the Configuration section of the FreeRTOS API documentation for details. #endif #if configMAX_PRIORITIES < 1 - #error configMAX_PRIORITIES must be defined to be greater than or equal to 1. + #error configMAX_PRIORITIES must be defined to be greater than or equal to 1. #endif #ifndef configUSE_PREEMPTION - #error Missing definition: configUSE_PREEMPTION must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. + #error Missing definition: configUSE_PREEMPTION must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. #endif #ifndef configUSE_IDLE_HOOK - #error Missing definition: configUSE_IDLE_HOOK must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. + #error Missing definition: configUSE_IDLE_HOOK must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. #endif #ifndef configUSE_TICK_HOOK - #error Missing definition: configUSE_TICK_HOOK must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. + #error Missing definition: configUSE_TICK_HOOK must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. #endif #ifndef configUSE_16_BIT_TICKS - #error Missing definition: configUSE_16_BIT_TICKS must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. + #error Missing definition: configUSE_16_BIT_TICKS must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. #endif #ifndef configUSE_CO_ROUTINES - #define configUSE_CO_ROUTINES 0 + #define configUSE_CO_ROUTINES 0 #endif #ifndef INCLUDE_vTaskPrioritySet - #define INCLUDE_vTaskPrioritySet 0 + #define INCLUDE_vTaskPrioritySet 0 #endif #ifndef INCLUDE_uxTaskPriorityGet - #define INCLUDE_uxTaskPriorityGet 0 + #define INCLUDE_uxTaskPriorityGet 0 #endif #ifndef INCLUDE_vTaskDelete - #define INCLUDE_vTaskDelete 0 + #define INCLUDE_vTaskDelete 0 #endif #ifndef INCLUDE_vTaskSuspend - #define INCLUDE_vTaskSuspend 0 + #define INCLUDE_vTaskSuspend 0 #endif #ifndef INCLUDE_vTaskDelayUntil - #define INCLUDE_vTaskDelayUntil 0 + #define INCLUDE_vTaskDelayUntil 0 #endif #ifndef INCLUDE_vTaskDelay - #define INCLUDE_vTaskDelay 0 + #define INCLUDE_vTaskDelay 0 #endif #ifndef INCLUDE_xTaskGetIdleTaskHandle - #define INCLUDE_xTaskGetIdleTaskHandle 0 + #define INCLUDE_xTaskGetIdleTaskHandle 0 #endif #ifndef INCLUDE_xTaskAbortDelay - #define INCLUDE_xTaskAbortDelay 0 + #define INCLUDE_xTaskAbortDelay 0 #endif #ifndef INCLUDE_xQueueGetMutexHolder - #define INCLUDE_xQueueGetMutexHolder 0 + #define INCLUDE_xQueueGetMutexHolder 0 #endif #ifndef INCLUDE_xSemaphoreGetMutexHolder - #define INCLUDE_xSemaphoreGetMutexHolder INCLUDE_xQueueGetMutexHolder + #define INCLUDE_xSemaphoreGetMutexHolder INCLUDE_xQueueGetMutexHolder #endif #ifndef INCLUDE_xTaskGetHandle - #define INCLUDE_xTaskGetHandle 0 + #define INCLUDE_xTaskGetHandle 0 #endif #ifndef INCLUDE_uxTaskGetStackHighWaterMark - #define INCLUDE_uxTaskGetStackHighWaterMark 0 + #define INCLUDE_uxTaskGetStackHighWaterMark 0 #endif #ifndef INCLUDE_uxTaskGetStackHighWaterMark2 - #define INCLUDE_uxTaskGetStackHighWaterMark2 0 + #define INCLUDE_uxTaskGetStackHighWaterMark2 0 #endif #ifndef INCLUDE_eTaskGetState - #define INCLUDE_eTaskGetState 0 + #define INCLUDE_eTaskGetState 0 #endif #ifndef INCLUDE_xTaskResumeFromISR - #define INCLUDE_xTaskResumeFromISR 1 + #define INCLUDE_xTaskResumeFromISR 1 #endif #ifndef INCLUDE_xTimerPendFunctionCall - #define INCLUDE_xTimerPendFunctionCall 0 + #define INCLUDE_xTimerPendFunctionCall 0 #endif #ifndef INCLUDE_xTaskGetSchedulerState - #define INCLUDE_xTaskGetSchedulerState 0 + #define INCLUDE_xTaskGetSchedulerState 0 #endif #ifndef INCLUDE_xTaskGetCurrentTaskHandle - #define INCLUDE_xTaskGetCurrentTaskHandle 0 + #define INCLUDE_xTaskGetCurrentTaskHandle 0 #endif #if configUSE_CO_ROUTINES != 0 - #ifndef configMAX_CO_ROUTINE_PRIORITIES - #error configMAX_CO_ROUTINE_PRIORITIES must be greater than or equal to 1. - #endif + #ifndef configMAX_CO_ROUTINE_PRIORITIES + #error configMAX_CO_ROUTINE_PRIORITIES must be greater than or equal to 1. + #endif #endif #ifndef configUSE_DAEMON_TASK_STARTUP_HOOK - #define configUSE_DAEMON_TASK_STARTUP_HOOK 0 + #define configUSE_DAEMON_TASK_STARTUP_HOOK 0 #endif #ifndef configUSE_APPLICATION_TASK_TAG - #define configUSE_APPLICATION_TASK_TAG 0 + #define configUSE_APPLICATION_TASK_TAG 0 #endif #ifndef configNUM_THREAD_LOCAL_STORAGE_POINTERS - #define configNUM_THREAD_LOCAL_STORAGE_POINTERS 0 + #define configNUM_THREAD_LOCAL_STORAGE_POINTERS 0 #endif #ifndef configUSE_RECURSIVE_MUTEXES - #define configUSE_RECURSIVE_MUTEXES 0 + #define configUSE_RECURSIVE_MUTEXES 0 #endif #ifndef configUSE_MUTEXES - #define configUSE_MUTEXES 0 + #define configUSE_MUTEXES 0 #endif #ifndef configUSE_TIMERS - #define configUSE_TIMERS 0 + #define configUSE_TIMERS 0 #endif #ifndef configUSE_COUNTING_SEMAPHORES - #define configUSE_COUNTING_SEMAPHORES 0 + #define configUSE_COUNTING_SEMAPHORES 0 #endif #ifndef configUSE_ALTERNATIVE_API - #define configUSE_ALTERNATIVE_API 0 + #define configUSE_ALTERNATIVE_API 0 #endif #ifndef portCRITICAL_NESTING_IN_TCB - #define portCRITICAL_NESTING_IN_TCB 0 + #define portCRITICAL_NESTING_IN_TCB 0 #endif #ifndef configMAX_TASK_NAME_LEN - #define configMAX_TASK_NAME_LEN 16 + #define configMAX_TASK_NAME_LEN 16 #endif #ifndef configIDLE_SHOULD_YIELD - #define configIDLE_SHOULD_YIELD 1 + #define configIDLE_SHOULD_YIELD 1 #endif #if configMAX_TASK_NAME_LEN < 1 - #error configMAX_TASK_NAME_LEN must be set to a minimum of 1 in FreeRTOSConfig.h + #error configMAX_TASK_NAME_LEN must be set to a minimum of 1 in FreeRTOSConfig.h #endif #ifndef configASSERT - #define configASSERT( x ) - #define configASSERT_DEFINED 0 + #define configASSERT( x ) + #define configASSERT_DEFINED 0 #else - #define configASSERT_DEFINED 1 + #define configASSERT_DEFINED 1 #endif /* configPRECONDITION should be defined as configASSERT. -The CBMC proofs need a way to track assumptions and assertions. -A configPRECONDITION statement should express an implicit invariant or -assumption made. A configASSERT statement should express an invariant that must -hold explicit before calling the code. */ + * The CBMC proofs need a way to track assumptions and assertions. + * A configPRECONDITION statement should express an implicit invariant or + * assumption made. A configASSERT statement should express an invariant that must + * hold explicit before calling the code. */ #ifndef configPRECONDITION - #define configPRECONDITION( X ) configASSERT(X) - #define configPRECONDITION_DEFINED 0 + #define configPRECONDITION( X ) configASSERT( X ) + #define configPRECONDITION_DEFINED 0 #else - #define configPRECONDITION_DEFINED 1 + #define configPRECONDITION_DEFINED 1 #endif #ifndef portMEMORY_BARRIER - #define portMEMORY_BARRIER() + #define portMEMORY_BARRIER() #endif #ifndef portSOFTWARE_BARRIER - #define portSOFTWARE_BARRIER() + #define portSOFTWARE_BARRIER() #endif /* The timers module relies on xTaskGetSchedulerState(). */ #if configUSE_TIMERS == 1 - #ifndef configTIMER_TASK_PRIORITY - #error If configUSE_TIMERS is set to 1 then configTIMER_TASK_PRIORITY must also be defined. - #endif /* configTIMER_TASK_PRIORITY */ + #ifndef configTIMER_TASK_PRIORITY + #error If configUSE_TIMERS is set to 1 then configTIMER_TASK_PRIORITY must also be defined. + #endif /* configTIMER_TASK_PRIORITY */ - #ifndef configTIMER_QUEUE_LENGTH - #error If configUSE_TIMERS is set to 1 then configTIMER_QUEUE_LENGTH must also be defined. - #endif /* configTIMER_QUEUE_LENGTH */ + #ifndef configTIMER_QUEUE_LENGTH + #error If configUSE_TIMERS is set to 1 then configTIMER_QUEUE_LENGTH must also be defined. + #endif /* configTIMER_QUEUE_LENGTH */ - #ifndef configTIMER_TASK_STACK_DEPTH - #error If configUSE_TIMERS is set to 1 then configTIMER_TASK_STACK_DEPTH must also be defined. - #endif /* configTIMER_TASK_STACK_DEPTH */ + #ifndef configTIMER_TASK_STACK_DEPTH + #error If configUSE_TIMERS is set to 1 then configTIMER_TASK_STACK_DEPTH must also be defined. + #endif /* configTIMER_TASK_STACK_DEPTH */ #endif /* configUSE_TIMERS */ #ifndef portSET_INTERRUPT_MASK_FROM_ISR - #define portSET_INTERRUPT_MASK_FROM_ISR() 0 + #define portSET_INTERRUPT_MASK_FROM_ISR() 0 #endif #ifndef portCLEAR_INTERRUPT_MASK_FROM_ISR - #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusValue ) ( void ) uxSavedStatusValue + #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusValue ) ( void ) uxSavedStatusValue #endif #ifndef portCLEAN_UP_TCB - #define portCLEAN_UP_TCB( pxTCB ) ( void ) pxTCB + #define portCLEAN_UP_TCB( pxTCB ) ( void ) pxTCB #endif #ifndef portPRE_TASK_DELETE_HOOK - #define portPRE_TASK_DELETE_HOOK( pvTaskToDelete, pxYieldPending ) + #define portPRE_TASK_DELETE_HOOK( pvTaskToDelete, pxYieldPending ) #endif #ifndef portSETUP_TCB - #define portSETUP_TCB( pxTCB ) ( void ) pxTCB + #define portSETUP_TCB( pxTCB ) ( void ) pxTCB #endif #ifndef configQUEUE_REGISTRY_SIZE - #define configQUEUE_REGISTRY_SIZE 0U + #define configQUEUE_REGISTRY_SIZE 0U #endif #if ( configQUEUE_REGISTRY_SIZE < 1 ) - #define vQueueAddToRegistry( xQueue, pcName ) - #define vQueueUnregisterQueue( xQueue ) - #define pcQueueGetName( xQueue ) + #define vQueueAddToRegistry( xQueue, pcName ) + #define vQueueUnregisterQueue( xQueue ) + #define pcQueueGetName( xQueue ) #endif #ifndef portPOINTER_SIZE_TYPE - #define portPOINTER_SIZE_TYPE uint32_t + #define portPOINTER_SIZE_TYPE uint32_t #endif /* Remove any unused trace macros. */ #ifndef traceSTART - /* Used to perform any necessary initialisation - for example, open a file - into which trace is to be written. */ - #define traceSTART() + +/* Used to perform any necessary initialisation - for example, open a file + * into which trace is to be written. */ + #define traceSTART() #endif #ifndef traceEND - /* Use to close a trace, for example close a file into which trace has been - written. */ - #define traceEND() + +/* Use to close a trace, for example close a file into which trace has been + * written. */ + #define traceEND() #endif #ifndef traceTASK_SWITCHED_IN - /* Called after a task has been selected to run. pxCurrentTCB holds a pointer - to the task control block of the selected task. */ - #define traceTASK_SWITCHED_IN() + +/* Called after a task has been selected to run. pxCurrentTCB holds a pointer + * to the task control block of the selected task. */ + #define traceTASK_SWITCHED_IN() #endif #ifndef traceINCREASE_TICK_COUNT - /* Called before stepping the tick count after waking from tickless idle - sleep. */ - #define traceINCREASE_TICK_COUNT( x ) + +/* Called before stepping the tick count after waking from tickless idle + * sleep. */ + #define traceINCREASE_TICK_COUNT( x ) #endif #ifndef traceLOW_POWER_IDLE_BEGIN - /* Called immediately before entering tickless idle. */ - #define traceLOW_POWER_IDLE_BEGIN() + /* Called immediately before entering tickless idle. */ + #define traceLOW_POWER_IDLE_BEGIN() #endif -#ifndef traceLOW_POWER_IDLE_END - /* Called when returning to the Idle task after a tickless idle. */ - #define traceLOW_POWER_IDLE_END() +#ifndef traceLOW_POWER_IDLE_END + /* Called when returning to the Idle task after a tickless idle. */ + #define traceLOW_POWER_IDLE_END() #endif #ifndef traceTASK_SWITCHED_OUT - /* Called before a task has been selected to run. pxCurrentTCB holds a pointer - to the task control block of the task being switched out. */ - #define traceTASK_SWITCHED_OUT() + +/* Called before a task has been selected to run. pxCurrentTCB holds a pointer + * to the task control block of the task being switched out. */ + #define traceTASK_SWITCHED_OUT() #endif #ifndef traceTASK_PRIORITY_INHERIT - /* Called when a task attempts to take a mutex that is already held by a - lower priority task. pxTCBOfMutexHolder is a pointer to the TCB of the task - that holds the mutex. uxInheritedPriority is the priority the mutex holder - will inherit (the priority of the task that is attempting to obtain the - muted. */ - #define traceTASK_PRIORITY_INHERIT( pxTCBOfMutexHolder, uxInheritedPriority ) + +/* Called when a task attempts to take a mutex that is already held by a + * lower priority task. pxTCBOfMutexHolder is a pointer to the TCB of the task + * that holds the mutex. uxInheritedPriority is the priority the mutex holder + * will inherit (the priority of the task that is attempting to obtain the + * muted. */ + #define traceTASK_PRIORITY_INHERIT( pxTCBOfMutexHolder, uxInheritedPriority ) #endif #ifndef traceTASK_PRIORITY_DISINHERIT - /* Called when a task releases a mutex, the holding of which had resulted in - the task inheriting the priority of a higher priority task. - pxTCBOfMutexHolder is a pointer to the TCB of the task that is releasing the - mutex. uxOriginalPriority is the task's configured (base) priority. */ - #define traceTASK_PRIORITY_DISINHERIT( pxTCBOfMutexHolder, uxOriginalPriority ) + +/* Called when a task releases a mutex, the holding of which had resulted in + * the task inheriting the priority of a higher priority task. + * pxTCBOfMutexHolder is a pointer to the TCB of the task that is releasing the + * mutex. uxOriginalPriority is the task's configured (base) priority. */ + #define traceTASK_PRIORITY_DISINHERIT( pxTCBOfMutexHolder, uxOriginalPriority ) #endif #ifndef traceBLOCKING_ON_QUEUE_RECEIVE - /* Task is about to block because it cannot read from a - queue/mutex/semaphore. pxQueue is a pointer to the queue/mutex/semaphore - upon which the read was attempted. pxCurrentTCB points to the TCB of the - task that attempted the read. */ - #define traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue ) + +/* Task is about to block because it cannot read from a + * queue/mutex/semaphore. pxQueue is a pointer to the queue/mutex/semaphore + * upon which the read was attempted. pxCurrentTCB points to the TCB of the + * task that attempted the read. */ + #define traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue ) #endif #ifndef traceBLOCKING_ON_QUEUE_PEEK - /* Task is about to block because it cannot read from a - queue/mutex/semaphore. pxQueue is a pointer to the queue/mutex/semaphore - upon which the read was attempted. pxCurrentTCB points to the TCB of the - task that attempted the read. */ - #define traceBLOCKING_ON_QUEUE_PEEK( pxQueue ) + +/* Task is about to block because it cannot read from a + * queue/mutex/semaphore. pxQueue is a pointer to the queue/mutex/semaphore + * upon which the read was attempted. pxCurrentTCB points to the TCB of the + * task that attempted the read. */ + #define traceBLOCKING_ON_QUEUE_PEEK( pxQueue ) #endif #ifndef traceBLOCKING_ON_QUEUE_SEND - /* Task is about to block because it cannot write to a - queue/mutex/semaphore. pxQueue is a pointer to the queue/mutex/semaphore - upon which the write was attempted. pxCurrentTCB points to the TCB of the - task that attempted the write. */ - #define traceBLOCKING_ON_QUEUE_SEND( pxQueue ) + +/* Task is about to block because it cannot write to a + * queue/mutex/semaphore. pxQueue is a pointer to the queue/mutex/semaphore + * upon which the write was attempted. pxCurrentTCB points to the TCB of the + * task that attempted the write. */ + #define traceBLOCKING_ON_QUEUE_SEND( pxQueue ) #endif #ifndef configCHECK_FOR_STACK_OVERFLOW - #define configCHECK_FOR_STACK_OVERFLOW 0 + #define configCHECK_FOR_STACK_OVERFLOW 0 #endif #ifndef configRECORD_STACK_HIGH_ADDRESS - #define configRECORD_STACK_HIGH_ADDRESS 0 + #define configRECORD_STACK_HIGH_ADDRESS 0 #endif #ifndef configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H - #define configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H 0 + #define configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H 0 #endif /* The following event macros are embedded in the kernel API calls. */ #ifndef traceMOVED_TASK_TO_READY_STATE - #define traceMOVED_TASK_TO_READY_STATE( pxTCB ) + #define traceMOVED_TASK_TO_READY_STATE( pxTCB ) #endif #ifndef tracePOST_MOVED_TASK_TO_READY_STATE - #define tracePOST_MOVED_TASK_TO_READY_STATE( pxTCB ) + #define tracePOST_MOVED_TASK_TO_READY_STATE( pxTCB ) #endif #ifndef traceQUEUE_CREATE - #define traceQUEUE_CREATE( pxNewQueue ) + #define traceQUEUE_CREATE( pxNewQueue ) #endif #ifndef traceQUEUE_CREATE_FAILED - #define traceQUEUE_CREATE_FAILED( ucQueueType ) + #define traceQUEUE_CREATE_FAILED( ucQueueType ) #endif #ifndef traceCREATE_MUTEX - #define traceCREATE_MUTEX( pxNewQueue ) + #define traceCREATE_MUTEX( pxNewQueue ) #endif #ifndef traceCREATE_MUTEX_FAILED - #define traceCREATE_MUTEX_FAILED() + #define traceCREATE_MUTEX_FAILED() #endif #ifndef traceGIVE_MUTEX_RECURSIVE - #define traceGIVE_MUTEX_RECURSIVE( pxMutex ) + #define traceGIVE_MUTEX_RECURSIVE( pxMutex ) #endif #ifndef traceGIVE_MUTEX_RECURSIVE_FAILED - #define traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex ) + #define traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex ) #endif #ifndef traceTAKE_MUTEX_RECURSIVE - #define traceTAKE_MUTEX_RECURSIVE( pxMutex ) + #define traceTAKE_MUTEX_RECURSIVE( pxMutex ) #endif #ifndef traceTAKE_MUTEX_RECURSIVE_FAILED - #define traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex ) + #define traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex ) #endif #ifndef traceCREATE_COUNTING_SEMAPHORE - #define traceCREATE_COUNTING_SEMAPHORE() + #define traceCREATE_COUNTING_SEMAPHORE() #endif #ifndef traceCREATE_COUNTING_SEMAPHORE_FAILED - #define traceCREATE_COUNTING_SEMAPHORE_FAILED() + #define traceCREATE_COUNTING_SEMAPHORE_FAILED() +#endif + +#ifndef traceQUEUE_SET_SEND + #define traceQUEUE_SET_SEND traceQUEUE_SEND #endif #ifndef traceQUEUE_SEND - #define traceQUEUE_SEND( pxQueue ) + #define traceQUEUE_SEND( pxQueue ) #endif #ifndef traceQUEUE_SEND_FAILED - #define traceQUEUE_SEND_FAILED( pxQueue ) + #define traceQUEUE_SEND_FAILED( pxQueue ) #endif #ifndef traceQUEUE_RECEIVE - #define traceQUEUE_RECEIVE( pxQueue ) + #define traceQUEUE_RECEIVE( pxQueue ) #endif #ifndef traceQUEUE_PEEK - #define traceQUEUE_PEEK( pxQueue ) + #define traceQUEUE_PEEK( pxQueue ) #endif #ifndef traceQUEUE_PEEK_FAILED - #define traceQUEUE_PEEK_FAILED( pxQueue ) + #define traceQUEUE_PEEK_FAILED( pxQueue ) #endif #ifndef traceQUEUE_PEEK_FROM_ISR - #define traceQUEUE_PEEK_FROM_ISR( pxQueue ) + #define traceQUEUE_PEEK_FROM_ISR( pxQueue ) #endif #ifndef traceQUEUE_RECEIVE_FAILED - #define traceQUEUE_RECEIVE_FAILED( pxQueue ) + #define traceQUEUE_RECEIVE_FAILED( pxQueue ) #endif #ifndef traceQUEUE_SEND_FROM_ISR - #define traceQUEUE_SEND_FROM_ISR( pxQueue ) + #define traceQUEUE_SEND_FROM_ISR( pxQueue ) #endif #ifndef traceQUEUE_SEND_FROM_ISR_FAILED - #define traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue ) + #define traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue ) #endif #ifndef traceQUEUE_RECEIVE_FROM_ISR - #define traceQUEUE_RECEIVE_FROM_ISR( pxQueue ) + #define traceQUEUE_RECEIVE_FROM_ISR( pxQueue ) #endif #ifndef traceQUEUE_RECEIVE_FROM_ISR_FAILED - #define traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue ) + #define traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue ) #endif #ifndef traceQUEUE_PEEK_FROM_ISR_FAILED - #define traceQUEUE_PEEK_FROM_ISR_FAILED( pxQueue ) + #define traceQUEUE_PEEK_FROM_ISR_FAILED( pxQueue ) #endif #ifndef traceQUEUE_DELETE - #define traceQUEUE_DELETE( pxQueue ) + #define traceQUEUE_DELETE( pxQueue ) #endif #ifndef traceTASK_CREATE - #define traceTASK_CREATE( pxNewTCB ) + #define traceTASK_CREATE( pxNewTCB ) #endif #ifndef traceTASK_CREATE_FAILED - #define traceTASK_CREATE_FAILED() + #define traceTASK_CREATE_FAILED() #endif #ifndef traceTASK_DELETE - #define traceTASK_DELETE( pxTaskToDelete ) + #define traceTASK_DELETE( pxTaskToDelete ) #endif #ifndef traceTASK_DELAY_UNTIL - #define traceTASK_DELAY_UNTIL( x ) + #define traceTASK_DELAY_UNTIL( x ) #endif #ifndef traceTASK_DELAY - #define traceTASK_DELAY() + #define traceTASK_DELAY() #endif #ifndef traceTASK_PRIORITY_SET - #define traceTASK_PRIORITY_SET( pxTask, uxNewPriority ) + #define traceTASK_PRIORITY_SET( pxTask, uxNewPriority ) #endif #ifndef traceTASK_SUSPEND - #define traceTASK_SUSPEND( pxTaskToSuspend ) + #define traceTASK_SUSPEND( pxTaskToSuspend ) #endif #ifndef traceTASK_RESUME - #define traceTASK_RESUME( pxTaskToResume ) + #define traceTASK_RESUME( pxTaskToResume ) #endif #ifndef traceTASK_RESUME_FROM_ISR - #define traceTASK_RESUME_FROM_ISR( pxTaskToResume ) + #define traceTASK_RESUME_FROM_ISR( pxTaskToResume ) #endif #ifndef traceTASK_INCREMENT_TICK - #define traceTASK_INCREMENT_TICK( xTickCount ) + #define traceTASK_INCREMENT_TICK( xTickCount ) #endif #ifndef traceTIMER_CREATE - #define traceTIMER_CREATE( pxNewTimer ) + #define traceTIMER_CREATE( pxNewTimer ) #endif #ifndef traceTIMER_CREATE_FAILED - #define traceTIMER_CREATE_FAILED() + #define traceTIMER_CREATE_FAILED() #endif #ifndef traceTIMER_COMMAND_SEND - #define traceTIMER_COMMAND_SEND( xTimer, xMessageID, xMessageValueValue, xReturn ) + #define traceTIMER_COMMAND_SEND( xTimer, xMessageID, xMessageValueValue, xReturn ) #endif #ifndef traceTIMER_EXPIRED - #define traceTIMER_EXPIRED( pxTimer ) + #define traceTIMER_EXPIRED( pxTimer ) #endif #ifndef traceTIMER_COMMAND_RECEIVED - #define traceTIMER_COMMAND_RECEIVED( pxTimer, xMessageID, xMessageValue ) + #define traceTIMER_COMMAND_RECEIVED( pxTimer, xMessageID, xMessageValue ) #endif #ifndef traceMALLOC @@ -577,430 +593,445 @@ hold explicit before calling the code. */ #endif #ifndef traceEVENT_GROUP_CREATE - #define traceEVENT_GROUP_CREATE( xEventGroup ) + #define traceEVENT_GROUP_CREATE( xEventGroup ) #endif #ifndef traceEVENT_GROUP_CREATE_FAILED - #define traceEVENT_GROUP_CREATE_FAILED() + #define traceEVENT_GROUP_CREATE_FAILED() #endif #ifndef traceEVENT_GROUP_SYNC_BLOCK - #define traceEVENT_GROUP_SYNC_BLOCK( xEventGroup, uxBitsToSet, uxBitsToWaitFor ) + #define traceEVENT_GROUP_SYNC_BLOCK( xEventGroup, uxBitsToSet, uxBitsToWaitFor ) #endif #ifndef traceEVENT_GROUP_SYNC_END - #define traceEVENT_GROUP_SYNC_END( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTimeoutOccurred ) ( void ) xTimeoutOccurred + #define traceEVENT_GROUP_SYNC_END( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTimeoutOccurred ) ( void ) xTimeoutOccurred #endif #ifndef traceEVENT_GROUP_WAIT_BITS_BLOCK - #define traceEVENT_GROUP_WAIT_BITS_BLOCK( xEventGroup, uxBitsToWaitFor ) + #define traceEVENT_GROUP_WAIT_BITS_BLOCK( xEventGroup, uxBitsToWaitFor ) #endif #ifndef traceEVENT_GROUP_WAIT_BITS_END - #define traceEVENT_GROUP_WAIT_BITS_END( xEventGroup, uxBitsToWaitFor, xTimeoutOccurred ) ( void ) xTimeoutOccurred + #define traceEVENT_GROUP_WAIT_BITS_END( xEventGroup, uxBitsToWaitFor, xTimeoutOccurred ) ( void ) xTimeoutOccurred #endif #ifndef traceEVENT_GROUP_CLEAR_BITS - #define traceEVENT_GROUP_CLEAR_BITS( xEventGroup, uxBitsToClear ) + #define traceEVENT_GROUP_CLEAR_BITS( xEventGroup, uxBitsToClear ) #endif #ifndef traceEVENT_GROUP_CLEAR_BITS_FROM_ISR - #define traceEVENT_GROUP_CLEAR_BITS_FROM_ISR( xEventGroup, uxBitsToClear ) + #define traceEVENT_GROUP_CLEAR_BITS_FROM_ISR( xEventGroup, uxBitsToClear ) #endif #ifndef traceEVENT_GROUP_SET_BITS - #define traceEVENT_GROUP_SET_BITS( xEventGroup, uxBitsToSet ) + #define traceEVENT_GROUP_SET_BITS( xEventGroup, uxBitsToSet ) #endif #ifndef traceEVENT_GROUP_SET_BITS_FROM_ISR - #define traceEVENT_GROUP_SET_BITS_FROM_ISR( xEventGroup, uxBitsToSet ) + #define traceEVENT_GROUP_SET_BITS_FROM_ISR( xEventGroup, uxBitsToSet ) #endif #ifndef traceEVENT_GROUP_DELETE - #define traceEVENT_GROUP_DELETE( xEventGroup ) + #define traceEVENT_GROUP_DELETE( xEventGroup ) #endif #ifndef tracePEND_FUNC_CALL - #define tracePEND_FUNC_CALL(xFunctionToPend, pvParameter1, ulParameter2, ret) + #define tracePEND_FUNC_CALL( xFunctionToPend, pvParameter1, ulParameter2, ret ) #endif #ifndef tracePEND_FUNC_CALL_FROM_ISR - #define tracePEND_FUNC_CALL_FROM_ISR(xFunctionToPend, pvParameter1, ulParameter2, ret) + #define tracePEND_FUNC_CALL_FROM_ISR( xFunctionToPend, pvParameter1, ulParameter2, ret ) #endif #ifndef traceQUEUE_REGISTRY_ADD - #define traceQUEUE_REGISTRY_ADD(xQueue, pcQueueName) + #define traceQUEUE_REGISTRY_ADD( xQueue, pcQueueName ) #endif #ifndef traceTASK_NOTIFY_TAKE_BLOCK - #define traceTASK_NOTIFY_TAKE_BLOCK() + #define traceTASK_NOTIFY_TAKE_BLOCK( uxIndexToWait ) #endif #ifndef traceTASK_NOTIFY_TAKE - #define traceTASK_NOTIFY_TAKE() + #define traceTASK_NOTIFY_TAKE( uxIndexToWait ) #endif #ifndef traceTASK_NOTIFY_WAIT_BLOCK - #define traceTASK_NOTIFY_WAIT_BLOCK() + #define traceTASK_NOTIFY_WAIT_BLOCK( uxIndexToWait ) #endif #ifndef traceTASK_NOTIFY_WAIT - #define traceTASK_NOTIFY_WAIT() + #define traceTASK_NOTIFY_WAIT( uxIndexToWait ) #endif #ifndef traceTASK_NOTIFY - #define traceTASK_NOTIFY() + #define traceTASK_NOTIFY( uxIndexToNotify ) #endif #ifndef traceTASK_NOTIFY_FROM_ISR - #define traceTASK_NOTIFY_FROM_ISR() + #define traceTASK_NOTIFY_FROM_ISR( uxIndexToNotify ) #endif #ifndef traceTASK_NOTIFY_GIVE_FROM_ISR - #define traceTASK_NOTIFY_GIVE_FROM_ISR() + #define traceTASK_NOTIFY_GIVE_FROM_ISR( uxIndexToNotify ) #endif #ifndef traceSTREAM_BUFFER_CREATE_FAILED - #define traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer ) + #define traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer ) #endif #ifndef traceSTREAM_BUFFER_CREATE_STATIC_FAILED - #define traceSTREAM_BUFFER_CREATE_STATIC_FAILED( xReturn, xIsMessageBuffer ) + #define traceSTREAM_BUFFER_CREATE_STATIC_FAILED( xReturn, xIsMessageBuffer ) #endif #ifndef traceSTREAM_BUFFER_CREATE - #define traceSTREAM_BUFFER_CREATE( pxStreamBuffer, xIsMessageBuffer ) + #define traceSTREAM_BUFFER_CREATE( pxStreamBuffer, xIsMessageBuffer ) #endif #ifndef traceSTREAM_BUFFER_DELETE - #define traceSTREAM_BUFFER_DELETE( xStreamBuffer ) + #define traceSTREAM_BUFFER_DELETE( xStreamBuffer ) #endif #ifndef traceSTREAM_BUFFER_RESET - #define traceSTREAM_BUFFER_RESET( xStreamBuffer ) + #define traceSTREAM_BUFFER_RESET( xStreamBuffer ) #endif #ifndef traceBLOCKING_ON_STREAM_BUFFER_SEND - #define traceBLOCKING_ON_STREAM_BUFFER_SEND( xStreamBuffer ) + #define traceBLOCKING_ON_STREAM_BUFFER_SEND( xStreamBuffer ) #endif #ifndef traceSTREAM_BUFFER_SEND - #define traceSTREAM_BUFFER_SEND( xStreamBuffer, xBytesSent ) + #define traceSTREAM_BUFFER_SEND( xStreamBuffer, xBytesSent ) #endif #ifndef traceSTREAM_BUFFER_SEND_FAILED - #define traceSTREAM_BUFFER_SEND_FAILED( xStreamBuffer ) + #define traceSTREAM_BUFFER_SEND_FAILED( xStreamBuffer ) #endif #ifndef traceSTREAM_BUFFER_SEND_FROM_ISR - #define traceSTREAM_BUFFER_SEND_FROM_ISR( xStreamBuffer, xBytesSent ) + #define traceSTREAM_BUFFER_SEND_FROM_ISR( xStreamBuffer, xBytesSent ) #endif #ifndef traceBLOCKING_ON_STREAM_BUFFER_RECEIVE - #define traceBLOCKING_ON_STREAM_BUFFER_RECEIVE( xStreamBuffer ) + #define traceBLOCKING_ON_STREAM_BUFFER_RECEIVE( xStreamBuffer ) #endif #ifndef traceSTREAM_BUFFER_RECEIVE - #define traceSTREAM_BUFFER_RECEIVE( xStreamBuffer, xReceivedLength ) + #define traceSTREAM_BUFFER_RECEIVE( xStreamBuffer, xReceivedLength ) #endif #ifndef traceSTREAM_BUFFER_RECEIVE_FAILED - #define traceSTREAM_BUFFER_RECEIVE_FAILED( xStreamBuffer ) + #define traceSTREAM_BUFFER_RECEIVE_FAILED( xStreamBuffer ) #endif #ifndef traceSTREAM_BUFFER_RECEIVE_FROM_ISR - #define traceSTREAM_BUFFER_RECEIVE_FROM_ISR( xStreamBuffer, xReceivedLength ) + #define traceSTREAM_BUFFER_RECEIVE_FROM_ISR( xStreamBuffer, xReceivedLength ) #endif #ifndef configGENERATE_RUN_TIME_STATS - #define configGENERATE_RUN_TIME_STATS 0 + #define configGENERATE_RUN_TIME_STATS 0 #endif #if ( configGENERATE_RUN_TIME_STATS == 1 ) - #ifndef portCONFIGURE_TIMER_FOR_RUN_TIME_STATS - #error If configGENERATE_RUN_TIME_STATS is defined then portCONFIGURE_TIMER_FOR_RUN_TIME_STATS must also be defined. portCONFIGURE_TIMER_FOR_RUN_TIME_STATS should call a port layer function to setup a peripheral timer/counter that can then be used as the run time counter time base. - #endif /* portCONFIGURE_TIMER_FOR_RUN_TIME_STATS */ + #ifndef portCONFIGURE_TIMER_FOR_RUN_TIME_STATS + #error If configGENERATE_RUN_TIME_STATS is defined then portCONFIGURE_TIMER_FOR_RUN_TIME_STATS must also be defined. portCONFIGURE_TIMER_FOR_RUN_TIME_STATS should call a port layer function to setup a peripheral timer/counter that can then be used as the run time counter time base. + #endif /* portCONFIGURE_TIMER_FOR_RUN_TIME_STATS */ - #ifndef portGET_RUN_TIME_COUNTER_VALUE - #ifndef portALT_GET_RUN_TIME_COUNTER_VALUE - #error If configGENERATE_RUN_TIME_STATS is defined then either portGET_RUN_TIME_COUNTER_VALUE or portALT_GET_RUN_TIME_COUNTER_VALUE must also be defined. See the examples provided and the FreeRTOS web site for more information. - #endif /* portALT_GET_RUN_TIME_COUNTER_VALUE */ - #endif /* portGET_RUN_TIME_COUNTER_VALUE */ + #ifndef portGET_RUN_TIME_COUNTER_VALUE + #ifndef portALT_GET_RUN_TIME_COUNTER_VALUE + #error If configGENERATE_RUN_TIME_STATS is defined then either portGET_RUN_TIME_COUNTER_VALUE or portALT_GET_RUN_TIME_COUNTER_VALUE must also be defined. See the examples provided and the FreeRTOS web site for more information. + #endif /* portALT_GET_RUN_TIME_COUNTER_VALUE */ + #endif /* portGET_RUN_TIME_COUNTER_VALUE */ #endif /* configGENERATE_RUN_TIME_STATS */ #ifndef portCONFIGURE_TIMER_FOR_RUN_TIME_STATS - #define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() + #define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() #endif #ifndef configUSE_MALLOC_FAILED_HOOK - #define configUSE_MALLOC_FAILED_HOOK 0 + #define configUSE_MALLOC_FAILED_HOOK 0 #endif #ifndef portPRIVILEGE_BIT - #define portPRIVILEGE_BIT ( ( UBaseType_t ) 0x00 ) + #define portPRIVILEGE_BIT ( ( UBaseType_t ) 0x00 ) #endif #ifndef portYIELD_WITHIN_API - #define portYIELD_WITHIN_API portYIELD + #define portYIELD_WITHIN_API portYIELD #endif #ifndef portSUPPRESS_TICKS_AND_SLEEP - #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) + #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) #endif #ifndef configEXPECTED_IDLE_TIME_BEFORE_SLEEP - #define configEXPECTED_IDLE_TIME_BEFORE_SLEEP 2 + #define configEXPECTED_IDLE_TIME_BEFORE_SLEEP 2 #endif #if configEXPECTED_IDLE_TIME_BEFORE_SLEEP < 2 - #error configEXPECTED_IDLE_TIME_BEFORE_SLEEP must not be less than 2 + #error configEXPECTED_IDLE_TIME_BEFORE_SLEEP must not be less than 2 #endif #ifndef configUSE_TICKLESS_IDLE - #define configUSE_TICKLESS_IDLE 0 + #define configUSE_TICKLESS_IDLE 0 #endif #ifndef configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING - #define configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING( x ) + #define configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING( x ) #endif #ifndef configPRE_SLEEP_PROCESSING - #define configPRE_SLEEP_PROCESSING( x ) + #define configPRE_SLEEP_PROCESSING( x ) #endif #ifndef configPOST_SLEEP_PROCESSING - #define configPOST_SLEEP_PROCESSING( x ) + #define configPOST_SLEEP_PROCESSING( x ) #endif #ifndef configUSE_QUEUE_SETS - #define configUSE_QUEUE_SETS 0 + #define configUSE_QUEUE_SETS 0 #endif #ifndef portTASK_USES_FLOATING_POINT - #define portTASK_USES_FLOATING_POINT() + #define portTASK_USES_FLOATING_POINT() #endif #ifndef portALLOCATE_SECURE_CONTEXT - #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) + #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) #endif #ifndef portDONT_DISCARD - #define portDONT_DISCARD + #define portDONT_DISCARD #endif #ifndef configUSE_TIME_SLICING - #define configUSE_TIME_SLICING 1 + #define configUSE_TIME_SLICING 1 #endif #ifndef configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS - #define configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS 0 + #define configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS 0 #endif #ifndef configUSE_STATS_FORMATTING_FUNCTIONS - #define configUSE_STATS_FORMATTING_FUNCTIONS 0 + #define configUSE_STATS_FORMATTING_FUNCTIONS 0 #endif #ifndef portASSERT_IF_INTERRUPT_PRIORITY_INVALID - #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() + #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() #endif #ifndef configUSE_TRACE_FACILITY - #define configUSE_TRACE_FACILITY 0 + #define configUSE_TRACE_FACILITY 0 #endif #ifndef mtCOVERAGE_TEST_MARKER - #define mtCOVERAGE_TEST_MARKER() + #define mtCOVERAGE_TEST_MARKER() #endif #ifndef mtCOVERAGE_TEST_DELAY - #define mtCOVERAGE_TEST_DELAY() + #define mtCOVERAGE_TEST_DELAY() #endif #ifndef portASSERT_IF_IN_ISR - #define portASSERT_IF_IN_ISR() + #define portASSERT_IF_IN_ISR() #endif #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION - #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 + #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 #endif #ifndef configAPPLICATION_ALLOCATED_HEAP - #define configAPPLICATION_ALLOCATED_HEAP 0 + #define configAPPLICATION_ALLOCATED_HEAP 0 #endif #ifndef configUSE_TASK_NOTIFICATIONS - #define configUSE_TASK_NOTIFICATIONS 1 + #define configUSE_TASK_NOTIFICATIONS 1 +#endif + +#ifndef configTASK_NOTIFICATION_ARRAY_ENTRIES + #define configTASK_NOTIFICATION_ARRAY_ENTRIES 1 +#endif + +#if configTASK_NOTIFICATION_ARRAY_ENTRIES < 1 + #error configTASK_NOTIFICATION_ARRAY_ENTRIES must be at least 1 #endif #ifndef configUSE_POSIX_ERRNO - #define configUSE_POSIX_ERRNO 0 + #define configUSE_POSIX_ERRNO 0 #endif #ifndef portTICK_TYPE_IS_ATOMIC - #define portTICK_TYPE_IS_ATOMIC 0 + #define portTICK_TYPE_IS_ATOMIC 0 #endif #ifndef configSUPPORT_STATIC_ALLOCATION - /* Defaults to 0 for backward compatibility. */ - #define configSUPPORT_STATIC_ALLOCATION 0 + /* Defaults to 0 for backward compatibility. */ + #define configSUPPORT_STATIC_ALLOCATION 0 #endif #ifndef configSUPPORT_DYNAMIC_ALLOCATION - /* Defaults to 1 for backward compatibility. */ - #define configSUPPORT_DYNAMIC_ALLOCATION 1 + /* Defaults to 1 for backward compatibility. */ + #define configSUPPORT_DYNAMIC_ALLOCATION 1 #endif #ifndef configSTACK_DEPTH_TYPE - /* Defaults to uint16_t for backward compatibility, but can be overridden - in FreeRTOSConfig.h if uint16_t is too restrictive. */ - #define configSTACK_DEPTH_TYPE uint16_t + +/* Defaults to uint16_t for backward compatibility, but can be overridden + * in FreeRTOSConfig.h if uint16_t is too restrictive. */ + #define configSTACK_DEPTH_TYPE uint16_t #endif #ifndef configMESSAGE_BUFFER_LENGTH_TYPE - /* Defaults to size_t for backward compatibility, but can be overridden - in FreeRTOSConfig.h if lengths will always be less than the number of bytes - in a size_t. */ - #define configMESSAGE_BUFFER_LENGTH_TYPE size_t + +/* Defaults to size_t for backward compatibility, but can be overridden + * in FreeRTOSConfig.h if lengths will always be less than the number of bytes + * in a size_t. */ + #define configMESSAGE_BUFFER_LENGTH_TYPE size_t #endif /* Sanity check the configuration. */ -#if( configUSE_TICKLESS_IDLE != 0 ) - #if( INCLUDE_vTaskSuspend != 1 ) - #error INCLUDE_vTaskSuspend must be set to 1 if configUSE_TICKLESS_IDLE is not set to 0 - #endif /* INCLUDE_vTaskSuspend */ +#if ( configUSE_TICKLESS_IDLE != 0 ) + #if ( INCLUDE_vTaskSuspend != 1 ) + #error INCLUDE_vTaskSuspend must be set to 1 if configUSE_TICKLESS_IDLE is not set to 0 + #endif /* INCLUDE_vTaskSuspend */ #endif /* configUSE_TICKLESS_IDLE */ -#if( ( configSUPPORT_STATIC_ALLOCATION == 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 0 ) ) - #error configSUPPORT_STATIC_ALLOCATION and configSUPPORT_DYNAMIC_ALLOCATION cannot both be 0, but can both be 1. +#if ( ( configSUPPORT_STATIC_ALLOCATION == 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 0 ) ) + #error configSUPPORT_STATIC_ALLOCATION and configSUPPORT_DYNAMIC_ALLOCATION cannot both be 0, but can both be 1. #endif -#if( ( configUSE_RECURSIVE_MUTEXES == 1 ) && ( configUSE_MUTEXES != 1 ) ) - #error configUSE_MUTEXES must be set to 1 to use recursive mutexes +#if ( ( configUSE_RECURSIVE_MUTEXES == 1 ) && ( configUSE_MUTEXES != 1 ) ) + #error configUSE_MUTEXES must be set to 1 to use recursive mutexes #endif #ifndef configINITIAL_TICK_COUNT - #define configINITIAL_TICK_COUNT 0 + #define configINITIAL_TICK_COUNT 0 #endif -#if( portTICK_TYPE_IS_ATOMIC == 0 ) - /* Either variables of tick type cannot be read atomically, or - portTICK_TYPE_IS_ATOMIC was not set - map the critical sections used when - the tick count is returned to the standard critical section macros. */ - #define portTICK_TYPE_ENTER_CRITICAL() portENTER_CRITICAL() - #define portTICK_TYPE_EXIT_CRITICAL() portEXIT_CRITICAL() - #define portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR() portSET_INTERRUPT_MASK_FROM_ISR() - #define portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( x ) portCLEAR_INTERRUPT_MASK_FROM_ISR( ( x ) ) +#if ( portTICK_TYPE_IS_ATOMIC == 0 ) + +/* Either variables of tick type cannot be read atomically, or + * portTICK_TYPE_IS_ATOMIC was not set - map the critical sections used when + * the tick count is returned to the standard critical section macros. */ + #define portTICK_TYPE_ENTER_CRITICAL() portENTER_CRITICAL() + #define portTICK_TYPE_EXIT_CRITICAL() portEXIT_CRITICAL() + #define portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR() portSET_INTERRUPT_MASK_FROM_ISR() + #define portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( x ) portCLEAR_INTERRUPT_MASK_FROM_ISR( ( x ) ) #else - /* The tick type can be read atomically, so critical sections used when the - tick count is returned can be defined away. */ - #define portTICK_TYPE_ENTER_CRITICAL() - #define portTICK_TYPE_EXIT_CRITICAL() - #define portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR() 0 - #define portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( x ) ( void ) x -#endif + +/* The tick type can be read atomically, so critical sections used when the + * tick count is returned can be defined away. */ + #define portTICK_TYPE_ENTER_CRITICAL() + #define portTICK_TYPE_EXIT_CRITICAL() + #define portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR() 0 + #define portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( x ) ( void ) x +#endif /* if ( portTICK_TYPE_IS_ATOMIC == 0 ) */ /* Definitions to allow backward compatibility with FreeRTOS versions prior to -V8 if desired. */ + * V8 if desired. */ #ifndef configENABLE_BACKWARD_COMPATIBILITY - #define configENABLE_BACKWARD_COMPATIBILITY 1 + #define configENABLE_BACKWARD_COMPATIBILITY 1 #endif #ifndef configPRINTF - /* configPRINTF() was not defined, so define it away to nothing. To use - configPRINTF() then define it as follows (where MyPrintFunction() is - provided by the application writer): - void MyPrintFunction(const char *pcFormat, ... ); - #define configPRINTF( X ) MyPrintFunction X - - Then call like a standard printf() function, but placing brackets around - all parameters so they are passed as a single parameter. For example: - configPRINTF( ("Value = %d", MyVariable) ); */ - #define configPRINTF( X ) +/* configPRINTF() was not defined, so define it away to nothing. To use + * configPRINTF() then define it as follows (where MyPrintFunction() is + * provided by the application writer): + * + * void MyPrintFunction(const char *pcFormat, ... ); + #define configPRINTF( X ) MyPrintFunction X + * + * Then call like a standard printf() function, but placing brackets around + * all parameters so they are passed as a single parameter. For example: + * configPRINTF( ("Value = %d", MyVariable) ); */ + #define configPRINTF( X ) #endif #ifndef configMAX - /* The application writer has not provided their own MAX macro, so define - the following generic implementation. */ - #define configMAX( a, b ) ( ( ( a ) > ( b ) ) ? ( a ) : ( b ) ) + +/* The application writer has not provided their own MAX macro, so define + * the following generic implementation. */ + #define configMAX( a, b ) ( ( ( a ) > ( b ) ) ? ( a ) : ( b ) ) #endif #ifndef configMIN - /* The application writer has not provided their own MAX macro, so define - the following generic implementation. */ - #define configMIN( a, b ) ( ( ( a ) < ( b ) ) ? ( a ) : ( b ) ) + +/* The application writer has not provided their own MAX macro, so define + * the following generic implementation. */ + #define configMIN( a, b ) ( ( ( a ) < ( b ) ) ? ( a ) : ( b ) ) #endif #if configENABLE_BACKWARD_COMPATIBILITY == 1 - #define eTaskStateGet eTaskGetState - #define portTickType TickType_t - #define xTaskHandle TaskHandle_t - #define xQueueHandle QueueHandle_t - #define xSemaphoreHandle SemaphoreHandle_t - #define xQueueSetHandle QueueSetHandle_t - #define xQueueSetMemberHandle QueueSetMemberHandle_t - #define xTimeOutType TimeOut_t - #define xMemoryRegion MemoryRegion_t - #define xTaskParameters TaskParameters_t - #define xTaskStatusType TaskStatus_t - #define xTimerHandle TimerHandle_t - #define xCoRoutineHandle CoRoutineHandle_t - #define pdTASK_HOOK_CODE TaskHookFunction_t - #define portTICK_RATE_MS portTICK_PERIOD_MS - #define pcTaskGetTaskName pcTaskGetName - #define pcTimerGetTimerName pcTimerGetName - #define pcQueueGetQueueName pcQueueGetName - #define vTaskGetTaskInfo vTaskGetInfo - #define xTaskGetIdleRunTimeCounter ulTaskGetIdleRunTimeCounter + #define eTaskStateGet eTaskGetState + #define portTickType TickType_t + #define xTaskHandle TaskHandle_t + #define xQueueHandle QueueHandle_t + #define xSemaphoreHandle SemaphoreHandle_t + #define xQueueSetHandle QueueSetHandle_t + #define xQueueSetMemberHandle QueueSetMemberHandle_t + #define xTimeOutType TimeOut_t + #define xMemoryRegion MemoryRegion_t + #define xTaskParameters TaskParameters_t + #define xTaskStatusType TaskStatus_t + #define xTimerHandle TimerHandle_t + #define xCoRoutineHandle CoRoutineHandle_t + #define pdTASK_HOOK_CODE TaskHookFunction_t + #define portTICK_RATE_MS portTICK_PERIOD_MS + #define pcTaskGetTaskName pcTaskGetName + #define pcTimerGetTimerName pcTimerGetName + #define pcQueueGetQueueName pcQueueGetName + #define vTaskGetTaskInfo vTaskGetInfo + #define xTaskGetIdleRunTimeCounter ulTaskGetIdleRunTimeCounter - /* Backward compatibility within the scheduler code only - these definitions - are not really required but are included for completeness. */ - #define tmrTIMER_CALLBACK TimerCallbackFunction_t - #define pdTASK_CODE TaskFunction_t - #define xListItem ListItem_t - #define xList List_t +/* Backward compatibility within the scheduler code only - these definitions + * are not really required but are included for completeness. */ + #define tmrTIMER_CALLBACK TimerCallbackFunction_t + #define pdTASK_CODE TaskFunction_t + #define xListItem ListItem_t + #define xList List_t - /* For libraries that break the list data hiding, and access list structure - members directly (which is not supposed to be done). */ - #define pxContainer pvContainer +/* For libraries that break the list data hiding, and access list structure + * members directly (which is not supposed to be done). */ + #define pxContainer pvContainer #endif /* configENABLE_BACKWARD_COMPATIBILITY */ -#if( configUSE_ALTERNATIVE_API != 0 ) - #error The alternative API was deprecated some time ago, and was removed in FreeRTOS V9.0 0 +#if ( configUSE_ALTERNATIVE_API != 0 ) + #error The alternative API was deprecated some time ago, and was removed in FreeRTOS V9.0 0 #endif /* Set configUSE_TASK_FPU_SUPPORT to 0 to omit floating point support even -if floating point hardware is otherwise supported by the FreeRTOS port in use. -This constant is not supported by all FreeRTOS ports that include floating -point support. */ + * if floating point hardware is otherwise supported by the FreeRTOS port in use. + * This constant is not supported by all FreeRTOS ports that include floating + * point support. */ #ifndef configUSE_TASK_FPU_SUPPORT - #define configUSE_TASK_FPU_SUPPORT 1 + #define configUSE_TASK_FPU_SUPPORT 1 #endif /* Set configENABLE_MPU to 1 to enable MPU support and 0 to disable it. This is -currently used in ARMv8M ports. */ + * currently used in ARMv8M ports. */ #ifndef configENABLE_MPU - #define configENABLE_MPU 0 + #define configENABLE_MPU 0 #endif /* Set configENABLE_FPU to 1 to enable FPU support and 0 to disable it. This is -currently used in ARMv8M ports. */ + * currently used in ARMv8M ports. */ #ifndef configENABLE_FPU - #define configENABLE_FPU 1 + #define configENABLE_FPU 1 #endif /* Set configENABLE_TRUSTZONE to 1 enable TrustZone support and 0 to disable it. -This is currently used in ARMv8M ports. */ + * This is currently used in ARMv8M ports. */ #ifndef configENABLE_TRUSTZONE - #define configENABLE_TRUSTZONE 1 + #define configENABLE_TRUSTZONE 1 #endif /* Set configRUN_FREERTOS_SECURE_ONLY to 1 to run the FreeRTOS ARMv8M port on -the Secure Side only. */ + * the Secure Side only. */ #ifndef configRUN_FREERTOS_SECURE_ONLY - #define configRUN_FREERTOS_SECURE_ONLY 0 + #define configRUN_FREERTOS_SECURE_ONLY 0 #endif /* Sometimes the FreeRTOSConfig.h settings only allow a task to be created using @@ -1045,8 +1076,9 @@ the Secure Side only. */ * | | | | xTaskCreateRestrictedStatic | | | | * +-----+---------+--------+-----------------------------+-----------------------------------+------------------+-----------+ */ -#define tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE ( ( ( portUSING_MPU_WRAPPERS == 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) || \ - ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) ) +#define tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE \ + ( ( ( portUSING_MPU_WRAPPERS == 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) || \ + ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) ) /* * In line with software engineering best practice, FreeRTOS implements a strict @@ -1060,40 +1092,40 @@ the Secure Side only. */ */ struct xSTATIC_LIST_ITEM { - #if( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 ) - TickType_t xDummy1; - #endif - TickType_t xDummy2; - void *pvDummy3[ 4 ]; - #if( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 ) - TickType_t xDummy4; - #endif + #if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 ) + TickType_t xDummy1; + #endif + TickType_t xDummy2; + void * pvDummy3[ 4 ]; + #if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 ) + TickType_t xDummy4; + #endif }; typedef struct xSTATIC_LIST_ITEM StaticListItem_t; /* See the comments above the struct xSTATIC_LIST_ITEM definition. */ struct xSTATIC_MINI_LIST_ITEM { - #if( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 ) - TickType_t xDummy1; - #endif - TickType_t xDummy2; - void *pvDummy3[ 2 ]; + #if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 ) + TickType_t xDummy1; + #endif + TickType_t xDummy2; + void * pvDummy3[ 2 ]; }; typedef struct xSTATIC_MINI_LIST_ITEM StaticMiniListItem_t; /* See the comments above the struct xSTATIC_LIST_ITEM definition. */ typedef struct xSTATIC_LIST { - #if( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 ) - TickType_t xDummy1; - #endif - UBaseType_t uxDummy2; - void *pvDummy3; - StaticMiniListItem_t xDummy4; - #if( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 ) - TickType_t xDummy5; - #endif + #if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 ) + TickType_t xDummy1; + #endif + UBaseType_t uxDummy2; + void * pvDummy3; + StaticMiniListItem_t xDummy4; + #if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 ) + TickType_t xDummy5; + #endif } StaticList_t; /* @@ -1111,52 +1143,52 @@ typedef struct xSTATIC_LIST */ typedef struct xSTATIC_TCB { - void *pxDummy1; - #if ( portUSING_MPU_WRAPPERS == 1 ) - xMPU_SETTINGS xDummy2; - #endif - StaticListItem_t xDummy3[ 2 ]; - UBaseType_t uxDummy5; - void *pxDummy6; - uint8_t ucDummy7[ configMAX_TASK_NAME_LEN ]; - #if ( ( portSTACK_GROWTH > 0 ) || ( configRECORD_STACK_HIGH_ADDRESS == 1 ) ) - void *pxDummy8; - #endif - #if ( portCRITICAL_NESTING_IN_TCB == 1 ) - UBaseType_t uxDummy9; - #endif - #if ( configUSE_TRACE_FACILITY == 1 ) - UBaseType_t uxDummy10[ 2 ]; - #endif - #if ( configUSE_MUTEXES == 1 ) - UBaseType_t uxDummy12[ 2 ]; - #endif - #if ( configUSE_APPLICATION_TASK_TAG == 1 ) - void *pxDummy14; - #endif - #if( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 ) - void *pvDummy15[ configNUM_THREAD_LOCAL_STORAGE_POINTERS ]; - #endif - #if ( configGENERATE_RUN_TIME_STATS == 1 ) - uint32_t ulDummy16; - #endif - #if ( configUSE_NEWLIB_REENTRANT == 1 ) - struct _reent xDummy17; - #endif - #if ( configUSE_TASK_NOTIFICATIONS == 1 ) - uint32_t ulDummy18; - uint8_t ucDummy19; - #endif - #if ( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) - uint8_t uxDummy20; - #endif + void * pxDummy1; + #if ( portUSING_MPU_WRAPPERS == 1 ) + xMPU_SETTINGS xDummy2; + #endif + StaticListItem_t xDummy3[ 2 ]; + UBaseType_t uxDummy5; + void * pxDummy6; + uint8_t ucDummy7[ configMAX_TASK_NAME_LEN ]; + #if ( ( portSTACK_GROWTH > 0 ) || ( configRECORD_STACK_HIGH_ADDRESS == 1 ) ) + void * pxDummy8; + #endif + #if ( portCRITICAL_NESTING_IN_TCB == 1 ) + UBaseType_t uxDummy9; + #endif + #if ( configUSE_TRACE_FACILITY == 1 ) + UBaseType_t uxDummy10[ 2 ]; + #endif + #if ( configUSE_MUTEXES == 1 ) + UBaseType_t uxDummy12[ 2 ]; + #endif + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) + void * pxDummy14; + #endif + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 ) + void * pvDummy15[ configNUM_THREAD_LOCAL_STORAGE_POINTERS ]; + #endif + #if ( configGENERATE_RUN_TIME_STATS == 1 ) + uint32_t ulDummy16; + #endif + #if ( configUSE_NEWLIB_REENTRANT == 1 ) + struct _reent xDummy17; + #endif + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) + uint32_t ulDummy18[ configTASK_NOTIFICATION_ARRAY_ENTRIES ]; + uint8_t ucDummy19[ configTASK_NOTIFICATION_ARRAY_ENTRIES ]; + #endif + #if ( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) + uint8_t uxDummy20; + #endif - #if( INCLUDE_xTaskAbortDelay == 1 ) - uint8_t ucDummy21; - #endif - #if ( configUSE_POSIX_ERRNO == 1 ) - int iDummy22; - #endif + #if ( INCLUDE_xTaskAbortDelay == 1 ) + uint8_t ucDummy21; + #endif + #if ( configUSE_POSIX_ERRNO == 1 ) + int iDummy22; + #endif } StaticTask_t; /* @@ -1175,31 +1207,30 @@ typedef struct xSTATIC_TCB */ typedef struct xSTATIC_QUEUE { - void *pvDummy1[ 3 ]; + void * pvDummy1[ 3 ]; - union - { - void *pvDummy2; - UBaseType_t uxDummy2; - } u; + union + { + void * pvDummy2; + UBaseType_t uxDummy2; + } u; - StaticList_t xDummy3[ 2 ]; - UBaseType_t uxDummy4[ 3 ]; - uint8_t ucDummy5[ 2 ]; + StaticList_t xDummy3[ 2 ]; + UBaseType_t uxDummy4[ 3 ]; + uint8_t ucDummy5[ 2 ]; - #if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) - uint8_t ucDummy6; - #endif + #if ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) + uint8_t ucDummy6; + #endif - #if ( configUSE_QUEUE_SETS == 1 ) - void *pvDummy7; - #endif - - #if ( configUSE_TRACE_FACILITY == 1 ) - UBaseType_t uxDummy8; - uint8_t ucDummy9; - #endif + #if ( configUSE_QUEUE_SETS == 1 ) + void * pvDummy7; + #endif + #if ( configUSE_TRACE_FACILITY == 1 ) + UBaseType_t uxDummy8; + uint8_t ucDummy9; + #endif } StaticQueue_t; typedef StaticQueue_t StaticSemaphore_t; @@ -1219,17 +1250,16 @@ typedef StaticQueue_t StaticSemaphore_t; */ typedef struct xSTATIC_EVENT_GROUP { - TickType_t xDummy1; - StaticList_t xDummy2; + TickType_t xDummy1; + StaticList_t xDummy2; - #if( configUSE_TRACE_FACILITY == 1 ) - UBaseType_t uxDummy3; - #endif - - #if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) - uint8_t ucDummy4; - #endif + #if ( configUSE_TRACE_FACILITY == 1 ) + UBaseType_t uxDummy3; + #endif + #if ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) + uint8_t ucDummy4; + #endif } StaticEventGroup_t; /* @@ -1248,48 +1278,48 @@ typedef struct xSTATIC_EVENT_GROUP */ typedef struct xSTATIC_TIMER { - void *pvDummy1; - StaticListItem_t xDummy2; - TickType_t xDummy3; - void *pvDummy5; - TaskFunction_t pvDummy6; - #if( configUSE_TRACE_FACILITY == 1 ) - UBaseType_t uxDummy7; - #endif - uint8_t ucDummy8; - + void * pvDummy1; + StaticListItem_t xDummy2; + TickType_t xDummy3; + void * pvDummy5; + TaskFunction_t pvDummy6; + #if ( configUSE_TRACE_FACILITY == 1 ) + UBaseType_t uxDummy7; + #endif + uint8_t ucDummy8; } StaticTimer_t; /* -* In line with software engineering best practice, especially when supplying a -* library that is likely to change in future versions, FreeRTOS implements a -* strict data hiding policy. This means the stream buffer structure used -* internally by FreeRTOS is not accessible to application code. However, if -* the application writer wants to statically allocate the memory required to -* create a stream buffer then the size of the stream buffer object needs to be -* know. The StaticStreamBuffer_t structure below is provided for this purpose. -* Its size and alignment requirements are guaranteed to match those of the -* genuine structure, no matter which architecture is being used, and no matter -* how the values in FreeRTOSConfig.h are set. Its contents are somewhat -* obfuscated in the hope users will recognise that it would be unwise to make -* direct use of the structure members. -*/ + * In line with software engineering best practice, especially when supplying a + * library that is likely to change in future versions, FreeRTOS implements a + * strict data hiding policy. This means the stream buffer structure used + * internally by FreeRTOS is not accessible to application code. However, if + * the application writer wants to statically allocate the memory required to + * create a stream buffer then the size of the stream buffer object needs to be + * know. The StaticStreamBuffer_t structure below is provided for this purpose. + * Its size and alignment requirements are guaranteed to match those of the + * genuine structure, no matter which architecture is being used, and no matter + * how the values in FreeRTOSConfig.h are set. Its contents are somewhat + * obfuscated in the hope users will recognise that it would be unwise to make + * direct use of the structure members. + */ typedef struct xSTATIC_STREAM_BUFFER { - size_t uxDummy1[ 4 ]; - void * pvDummy2[ 3 ]; - uint8_t ucDummy3; - #if ( configUSE_TRACE_FACILITY == 1 ) - UBaseType_t uxDummy4; - #endif + size_t uxDummy1[ 4 ]; + void * pvDummy2[ 3 ]; + uint8_t ucDummy3; + #if ( configUSE_TRACE_FACILITY == 1 ) + UBaseType_t uxDummy4; + #endif } StaticStreamBuffer_t; /* Message buffers are built on stream buffers. */ typedef StaticStreamBuffer_t StaticMessageBuffer_t; +/* *INDENT-OFF* */ #ifdef __cplusplus -} + } #endif +/* *INDENT-ON* */ #endif /* INC_FREERTOS_H */ - diff --git a/include/StackMacros.h b/include/StackMacros.h index ac946118e..0b7e99d48 100644 --- a/include/StackMacros.h +++ b/include/StackMacros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.3.1 + * FreeRTOS Kernel V10.4.1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,115 +19,14 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ -#ifndef STACK_MACROS_H -#define STACK_MACROS_H #ifndef _MSC_VER /* Visual Studio doesn't support #warning. */ - #warning The name of this file has changed to stack_macros.h. Please update your code accordingly. This source file (which has the original name) will be removed in future released. + #warning The name of this file has changed to stack_macros.h. Please update your code accordingly. This source file (which has the original name) will be removed in future released. #endif -/* - * Call the stack overflow hook function if the stack of the task being swapped - * out is currently overflowed, or looks like it might have overflowed in the - * past. - * - * Setting configCHECK_FOR_STACK_OVERFLOW to 1 will cause the macro to check - * the current stack state only - comparing the current top of stack value to - * the stack limit. Setting configCHECK_FOR_STACK_OVERFLOW to greater than 1 - * will also cause the last few stack bytes to be checked to ensure the value - * to which the bytes were set when the task was created have not been - * overwritten. Note this second test does not guarantee that an overflowed - * stack will always be recognised. - */ - -/*-----------------------------------------------------------*/ - -#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) ) - - /* Only the current stack state is to be checked. */ - #define taskCHECK_FOR_STACK_OVERFLOW() \ - { \ - /* Is the currently saved stack pointer within the stack limit? */ \ - if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack ) \ - { \ - vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ - } \ - } - -#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */ -/*-----------------------------------------------------------*/ - -#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) ) - - /* Only the current stack state is to be checked. */ - #define taskCHECK_FOR_STACK_OVERFLOW() \ - { \ - \ - /* Is the currently saved stack pointer within the stack limit? */ \ - if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack ) \ - { \ - vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ - } \ - } - -#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */ -/*-----------------------------------------------------------*/ - -#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) ) - - #define taskCHECK_FOR_STACK_OVERFLOW() \ - { \ - const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack; \ - const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5; \ - \ - if( ( pulStack[ 0 ] != ulCheckValue ) || \ - ( pulStack[ 1 ] != ulCheckValue ) || \ - ( pulStack[ 2 ] != ulCheckValue ) || \ - ( pulStack[ 3 ] != ulCheckValue ) ) \ - { \ - vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ - } \ - } - -#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */ -/*-----------------------------------------------------------*/ - -#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) ) - - #define taskCHECK_FOR_STACK_OVERFLOW() \ - { \ - int8_t *pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack; \ - static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ - tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ - tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ - tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ - tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \ - \ - \ - pcEndOfStack -= sizeof( ucExpectedStackBytes ); \ - \ - /* Has the extremity of the task stack ever been written over? */ \ - if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) \ - { \ - vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ - } \ - } - -#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */ -/*-----------------------------------------------------------*/ - -/* Remove stack overflow macro if not being used. */ -#ifndef taskCHECK_FOR_STACK_OVERFLOW - #define taskCHECK_FOR_STACK_OVERFLOW() -#endif - - - -#endif /* STACK_MACROS_H */ - +#include "stack_macros.h" diff --git a/include/atomic.h b/include/atomic.h index 795d80122..093530739 100644 --- a/include/atomic.h +++ b/include/atomic.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.3.1 + * FreeRTOS Kernel V10.4.1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /** @@ -38,15 +37,17 @@ #define ATOMIC_H #ifndef INC_FREERTOS_H - #error "include FreeRTOS.h must appear in source files before include atomic.h" + #error "include FreeRTOS.h must appear in source files before include atomic.h" #endif /* Standard includes. */ #include +/* *INDENT-OFF* */ #ifdef __cplusplus -extern "C" { + extern "C" { #endif +/* *INDENT-ON* */ /* * Port specific definitions -- entering/exiting critical section. @@ -58,18 +59,18 @@ extern "C" { */ #if defined( portSET_INTERRUPT_MASK_FROM_ISR ) - /* Nested interrupt scheme is supported in this port. */ - #define ATOMIC_ENTER_CRITICAL() \ - UBaseType_t uxCriticalSectionType = portSET_INTERRUPT_MASK_FROM_ISR() +/* Nested interrupt scheme is supported in this port. */ + #define ATOMIC_ENTER_CRITICAL() \ + UBaseType_t uxCriticalSectionType = portSET_INTERRUPT_MASK_FROM_ISR() - #define ATOMIC_EXIT_CRITICAL() \ - portCLEAR_INTERRUPT_MASK_FROM_ISR( uxCriticalSectionType ) + #define ATOMIC_EXIT_CRITICAL() \ + portCLEAR_INTERRUPT_MASK_FROM_ISR( uxCriticalSectionType ) #else - /* Nested interrupt scheme is NOT supported in this port. */ - #define ATOMIC_ENTER_CRITICAL() portENTER_CRITICAL() - #define ATOMIC_EXIT_CRITICAL() portEXIT_CRITICAL() +/* Nested interrupt scheme is NOT supported in this port. */ + #define ATOMIC_ENTER_CRITICAL() portENTER_CRITICAL() + #define ATOMIC_EXIT_CRITICAL() portEXIT_CRITICAL() #endif /* portSET_INTERRUPT_MASK_FROM_ISR() */ @@ -81,11 +82,11 @@ extern "C" { * instead of resulting error, simply define it away. */ #ifndef portFORCE_INLINE - #define portFORCE_INLINE + #define portFORCE_INLINE #endif -#define ATOMIC_COMPARE_AND_SWAP_SUCCESS 0x1U /**< Compare and swap succeeded, swapped. */ -#define ATOMIC_COMPARE_AND_SWAP_FAILURE 0x0U /**< Compare and swap failed, did not swap. */ +#define ATOMIC_COMPARE_AND_SWAP_SUCCESS 0x1U /**< Compare and swap succeeded, swapped. */ +#define ATOMIC_COMPARE_AND_SWAP_FAILURE 0x0U /**< Compare and swap failed, did not swap. */ /*----------------------------- Swap && CAS ------------------------------*/ @@ -105,26 +106,26 @@ extern "C" { * *pulDestination value equals ulComparand. */ static portFORCE_INLINE uint32_t Atomic_CompareAndSwap_u32( uint32_t volatile * pulDestination, - uint32_t ulExchange, - uint32_t ulComparand ) + uint32_t ulExchange, + uint32_t ulComparand ) { -uint32_t ulReturnValue; + uint32_t ulReturnValue; - ATOMIC_ENTER_CRITICAL(); - { - if( *pulDestination == ulComparand ) - { - *pulDestination = ulExchange; - ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS; - } - else - { - ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE; - } - } - ATOMIC_EXIT_CRITICAL(); + ATOMIC_ENTER_CRITICAL(); + { + if( *pulDestination == ulComparand ) + { + *pulDestination = ulExchange; + ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS; + } + else + { + ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE; + } + } + ATOMIC_EXIT_CRITICAL(); - return ulReturnValue; + return ulReturnValue; } /*-----------------------------------------------------------*/ @@ -141,18 +142,18 @@ uint32_t ulReturnValue; * @return The initial value of *ppvDestination. */ static portFORCE_INLINE void * Atomic_SwapPointers_p32( void * volatile * ppvDestination, - void * pvExchange ) + void * pvExchange ) { -void * pReturnValue; + void * pReturnValue; - ATOMIC_ENTER_CRITICAL(); - { - pReturnValue = *ppvDestination; - *ppvDestination = pvExchange; - } - ATOMIC_EXIT_CRITICAL(); + ATOMIC_ENTER_CRITICAL(); + { + pReturnValue = *ppvDestination; + *ppvDestination = pvExchange; + } + ATOMIC_EXIT_CRITICAL(); - return pReturnValue; + return pReturnValue; } /*-----------------------------------------------------------*/ @@ -173,22 +174,22 @@ void * pReturnValue; * *ppvDestination value equals pvComparand. */ static portFORCE_INLINE uint32_t Atomic_CompareAndSwapPointers_p32( void * volatile * ppvDestination, - void * pvExchange, - void * pvComparand ) + void * pvExchange, + void * pvComparand ) { -uint32_t ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE; + uint32_t ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE; - ATOMIC_ENTER_CRITICAL(); - { - if( *ppvDestination == pvComparand ) - { - *ppvDestination = pvExchange; - ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS; - } - } - ATOMIC_EXIT_CRITICAL(); + ATOMIC_ENTER_CRITICAL(); + { + if( *ppvDestination == pvComparand ) + { + *ppvDestination = pvExchange; + ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS; + } + } + ATOMIC_EXIT_CRITICAL(); - return ulReturnValue; + return ulReturnValue; } @@ -206,18 +207,18 @@ uint32_t ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE; * @return previous *pulAddend value. */ static portFORCE_INLINE uint32_t Atomic_Add_u32( uint32_t volatile * pulAddend, - uint32_t ulCount ) + uint32_t ulCount ) { - uint32_t ulCurrent; + uint32_t ulCurrent; - ATOMIC_ENTER_CRITICAL(); - { - ulCurrent = *pulAddend; - *pulAddend += ulCount; - } - ATOMIC_EXIT_CRITICAL(); + ATOMIC_ENTER_CRITICAL(); + { + ulCurrent = *pulAddend; + *pulAddend += ulCount; + } + ATOMIC_EXIT_CRITICAL(); - return ulCurrent; + return ulCurrent; } /*-----------------------------------------------------------*/ @@ -234,18 +235,18 @@ static portFORCE_INLINE uint32_t Atomic_Add_u32( uint32_t volatile * pulAddend, * @return previous *pulAddend value. */ static portFORCE_INLINE uint32_t Atomic_Subtract_u32( uint32_t volatile * pulAddend, - uint32_t ulCount ) + uint32_t ulCount ) { - uint32_t ulCurrent; + uint32_t ulCurrent; - ATOMIC_ENTER_CRITICAL(); - { - ulCurrent = *pulAddend; - *pulAddend -= ulCount; - } - ATOMIC_EXIT_CRITICAL(); + ATOMIC_ENTER_CRITICAL(); + { + ulCurrent = *pulAddend; + *pulAddend -= ulCount; + } + ATOMIC_EXIT_CRITICAL(); - return ulCurrent; + return ulCurrent; } /*-----------------------------------------------------------*/ @@ -261,16 +262,16 @@ static portFORCE_INLINE uint32_t Atomic_Subtract_u32( uint32_t volatile * pulAdd */ static portFORCE_INLINE uint32_t Atomic_Increment_u32( uint32_t volatile * pulAddend ) { -uint32_t ulCurrent; + uint32_t ulCurrent; - ATOMIC_ENTER_CRITICAL(); - { - ulCurrent = *pulAddend; - *pulAddend += 1; - } - ATOMIC_EXIT_CRITICAL(); + ATOMIC_ENTER_CRITICAL(); + { + ulCurrent = *pulAddend; + *pulAddend += 1; + } + ATOMIC_EXIT_CRITICAL(); - return ulCurrent; + return ulCurrent; } /*-----------------------------------------------------------*/ @@ -286,16 +287,16 @@ uint32_t ulCurrent; */ static portFORCE_INLINE uint32_t Atomic_Decrement_u32( uint32_t volatile * pulAddend ) { -uint32_t ulCurrent; + uint32_t ulCurrent; - ATOMIC_ENTER_CRITICAL(); - { - ulCurrent = *pulAddend; - *pulAddend -= 1; - } - ATOMIC_EXIT_CRITICAL(); + ATOMIC_ENTER_CRITICAL(); + { + ulCurrent = *pulAddend; + *pulAddend -= 1; + } + ATOMIC_EXIT_CRITICAL(); - return ulCurrent; + return ulCurrent; } /*----------------------------- Bitwise Logical ------------------------------*/ @@ -312,18 +313,18 @@ uint32_t ulCurrent; * @return The original value of *pulDestination. */ static portFORCE_INLINE uint32_t Atomic_OR_u32( uint32_t volatile * pulDestination, - uint32_t ulValue ) + uint32_t ulValue ) { -uint32_t ulCurrent; + uint32_t ulCurrent; - ATOMIC_ENTER_CRITICAL(); - { - ulCurrent = *pulDestination; - *pulDestination |= ulValue; - } - ATOMIC_EXIT_CRITICAL(); + ATOMIC_ENTER_CRITICAL(); + { + ulCurrent = *pulDestination; + *pulDestination |= ulValue; + } + ATOMIC_EXIT_CRITICAL(); - return ulCurrent; + return ulCurrent; } /*-----------------------------------------------------------*/ @@ -339,18 +340,18 @@ uint32_t ulCurrent; * @return The original value of *pulDestination. */ static portFORCE_INLINE uint32_t Atomic_AND_u32( uint32_t volatile * pulDestination, - uint32_t ulValue ) + uint32_t ulValue ) { -uint32_t ulCurrent; + uint32_t ulCurrent; - ATOMIC_ENTER_CRITICAL(); - { - ulCurrent = *pulDestination; - *pulDestination &= ulValue; - } - ATOMIC_EXIT_CRITICAL(); + ATOMIC_ENTER_CRITICAL(); + { + ulCurrent = *pulDestination; + *pulDestination &= ulValue; + } + ATOMIC_EXIT_CRITICAL(); - return ulCurrent; + return ulCurrent; } /*-----------------------------------------------------------*/ @@ -366,18 +367,18 @@ uint32_t ulCurrent; * @return The original value of *pulDestination. */ static portFORCE_INLINE uint32_t Atomic_NAND_u32( uint32_t volatile * pulDestination, - uint32_t ulValue ) + uint32_t ulValue ) { -uint32_t ulCurrent; + uint32_t ulCurrent; - ATOMIC_ENTER_CRITICAL(); - { - ulCurrent = *pulDestination; - *pulDestination = ~( ulCurrent & ulValue ); - } - ATOMIC_EXIT_CRITICAL(); + ATOMIC_ENTER_CRITICAL(); + { + ulCurrent = *pulDestination; + *pulDestination = ~( ulCurrent & ulValue ); + } + ATOMIC_EXIT_CRITICAL(); - return ulCurrent; + return ulCurrent; } /*-----------------------------------------------------------*/ @@ -393,22 +394,24 @@ uint32_t ulCurrent; * @return The original value of *pulDestination. */ static portFORCE_INLINE uint32_t Atomic_XOR_u32( uint32_t volatile * pulDestination, - uint32_t ulValue ) + uint32_t ulValue ) { -uint32_t ulCurrent; + uint32_t ulCurrent; - ATOMIC_ENTER_CRITICAL(); - { - ulCurrent = *pulDestination; - *pulDestination ^= ulValue; - } - ATOMIC_EXIT_CRITICAL(); + ATOMIC_ENTER_CRITICAL(); + { + ulCurrent = *pulDestination; + *pulDestination ^= ulValue; + } + ATOMIC_EXIT_CRITICAL(); - return ulCurrent; + return ulCurrent; } +/* *INDENT-OFF* */ #ifdef __cplusplus -} + } #endif +/* *INDENT-ON* */ #endif /* ATOMIC_H */ diff --git a/include/croutine.h b/include/croutine.h index ed2c161dd..bf51e6f50 100644 --- a/include/croutine.h +++ b/include/croutine.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.3.1 + * FreeRTOS Kernel V10.4.1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,51 +19,54 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ #ifndef CO_ROUTINE_H #define CO_ROUTINE_H #ifndef INC_FREERTOS_H - #error "include FreeRTOS.h must appear in source files before include croutine.h" + #error "include FreeRTOS.h must appear in source files before include croutine.h" #endif #include "list.h" +/* *INDENT-OFF* */ #ifdef __cplusplus -extern "C" { + extern "C" { #endif +/* *INDENT-ON* */ /* Used to hide the implementation of the co-routine control block. The -control block structure however has to be included in the header due to -the macro implementation of the co-routine functionality. */ + * control block structure however has to be included in the header due to + * the macro implementation of the co-routine functionality. */ typedef void * CoRoutineHandle_t; /* Defines the prototype to which co-routine functions must conform. */ -typedef void (*crCOROUTINE_CODE)( CoRoutineHandle_t, UBaseType_t ); +typedef void (* crCOROUTINE_CODE)( CoRoutineHandle_t, + UBaseType_t ); typedef struct corCoRoutineControlBlock { - crCOROUTINE_CODE pxCoRoutineFunction; - ListItem_t xGenericListItem; /*< List item used to place the CRCB in ready and blocked queues. */ - ListItem_t xEventListItem; /*< List item used to place the CRCB in event lists. */ - UBaseType_t uxPriority; /*< The priority of the co-routine in relation to other co-routines. */ - UBaseType_t uxIndex; /*< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */ - uint16_t uxState; /*< Used internally by the co-routine implementation. */ -} CRCB_t; /* Co-routine control block. Note must be identical in size down to uxPriority with TCB_t. */ + crCOROUTINE_CODE pxCoRoutineFunction; + ListItem_t xGenericListItem; /*< List item used to place the CRCB in ready and blocked queues. */ + ListItem_t xEventListItem; /*< List item used to place the CRCB in event lists. */ + UBaseType_t uxPriority; /*< The priority of the co-routine in relation to other co-routines. */ + UBaseType_t uxIndex; /*< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */ + uint16_t uxState; /*< Used internally by the co-routine implementation. */ +} CRCB_t; /* Co-routine control block. Note must be identical in size down to uxPriority with TCB_t. */ /** * croutine. h - *
- BaseType_t xCoRoutineCreate(
-                                 crCOROUTINE_CODE pxCoRoutineCode,
-                                 UBaseType_t uxPriority,
-                                 UBaseType_t uxIndex
-                               );
+ * 
+ * BaseType_t xCoRoutineCreate(
+ *                               crCOROUTINE_CODE pxCoRoutineCode,
+ *                               UBaseType_t uxPriority,
+ *                               UBaseType_t uxIndex
+ *                             ); 
+ *
* * Create a new co-routine and add it to the list of co-routines that are * ready to run. @@ -83,58 +86,61 @@ typedef struct corCoRoutineControlBlock * list, otherwise an error code defined with ProjDefs.h. * * Example usage: - 
- // Co-routine to be created.
- void vFlashCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- // This may not be necessary for const variables.
- static const char cLedToFlash[ 2 ] = { 5, 6 };
- static const TickType_t uxFlashRates[ 2 ] = { 200, 400 };
-
-     // Must start every co-routine with a call to crSTART();
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-         // This co-routine just delays for a fixed period, then toggles
-         // an LED.  Two co-routines are created using this function, so
-         // the uxIndex parameter is used to tell the co-routine which
-         // LED to flash and how int32_t to delay.  This assumes xQueue has
-         // already been created.
-         vParTestToggleLED( cLedToFlash[ uxIndex ] );
-         crDELAY( xHandle, uxFlashRates[ uxIndex ] );
-     }
-
-     // Must end every co-routine with a call to crEND();
-     crEND();
- }
-
- // Function that creates two co-routines.
- void vOtherFunction( void )
- {
- uint8_t ucParameterToPass;
- TaskHandle_t xHandle;
-
-     // Create two co-routines at priority 0.  The first is given index 0
-     // so (from the code above) toggles LED 5 every 200 ticks.  The second
-     // is given index 1 so toggles LED 6 every 400 ticks.
-     for( uxIndex = 0; uxIndex < 2; uxIndex++ )
-     {
-         xCoRoutineCreate( vFlashCoRoutine, 0, uxIndex );
-     }
- }
-
+ * 
+ * // Co-routine to be created.
+ * void vFlashCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ * {
+ * // Variables in co-routines must be declared static if they must maintain value across a blocking call.
+ * // This may not be necessary for const variables.
+ * static const char cLedToFlash[ 2 ] = { 5, 6 };
+ * static const TickType_t uxFlashRates[ 2 ] = { 200, 400 };
+ *
+ *   // Must start every co-routine with a call to crSTART();
+ *   crSTART( xHandle );
+ *
+ *   for( ;; )
+ *   {
+ *       // This co-routine just delays for a fixed period, then toggles
+ *       // an LED.  Two co-routines are created using this function, so
+ *       // the uxIndex parameter is used to tell the co-routine which
+ *       // LED to flash and how int32_t to delay.  This assumes xQueue has
+ *       // already been created.
+ *       vParTestToggleLED( cLedToFlash[ uxIndex ] );
+ *       crDELAY( xHandle, uxFlashRates[ uxIndex ] );
+ *   }
+ *
+ *   // Must end every co-routine with a call to crEND();
+ *   crEND();
+ * }
+ *
+ * // Function that creates two co-routines.
+ * void vOtherFunction( void )
+ * {
+ * uint8_t ucParameterToPass;
+ * TaskHandle_t xHandle;
+ *
+ *   // Create two co-routines at priority 0.  The first is given index 0
+ *   // so (from the code above) toggles LED 5 every 200 ticks.  The second
+ *   // is given index 1 so toggles LED 6 every 400 ticks.
+ *   for( uxIndex = 0; uxIndex < 2; uxIndex++ )
+ *   {
+ *       xCoRoutineCreate( vFlashCoRoutine, 0, uxIndex );
+ *   }
+ * }
+ *
* \defgroup xCoRoutineCreate xCoRoutineCreate * \ingroup Tasks */ -BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, UBaseType_t uxPriority, UBaseType_t uxIndex ); +BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, + UBaseType_t uxPriority, + UBaseType_t uxIndex ); /** * croutine. h - *
- void vCoRoutineSchedule( void );
+ * 
+ * void vCoRoutineSchedule( void );
+ *
* * Run a co-routine. * @@ -148,25 +154,25 @@ BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, UBaseType_t uxPri * hook). * * Example usage: - 
- // This idle task hook will schedule a co-routine each time it is called.
- // The rest of the idle task will execute between co-routine calls.
- void vApplicationIdleHook( void )
- {
-	vCoRoutineSchedule();
- }
-
- // Alternatively, if you do not require any other part of the idle task to
- // execute, the idle task hook can call vCoRoutineSchedule() within an
- // infinite loop.
- void vApplicationIdleHook( void )
- {
-    for( ;; )
-    {
-        vCoRoutineSchedule();
-    }
- }
-
+ * 
+ * // This idle task hook will schedule a co-routine each time it is called.
+ * // The rest of the idle task will execute between co-routine calls.
+ * void vApplicationIdleHook( void )
+ * {
+ *  vCoRoutineSchedule();
+ * }
+ *
+ * // Alternatively, if you do not require any other part of the idle task to
+ * // execute, the idle task hook can call vCoRoutineSchedule() within an
+ * // infinite loop.
+ * void vApplicationIdleHook( void )
+ * {
+ *  for( ;; )
+ *  {
+ *      vCoRoutineSchedule();
+ *  }
+ * }
+ *
* \defgroup vCoRoutineSchedule vCoRoutineSchedule * \ingroup Tasks */ @@ -175,76 +181,87 @@ void vCoRoutineSchedule( void ); /** * croutine. h * 
- crSTART( CoRoutineHandle_t xHandle );
+ * crSTART( CoRoutineHandle_t xHandle ); + * * * This macro MUST always be called at the start of a co-routine function. * * Example usage: - 
- // Co-routine to be created.
- void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static int32_t ulAVariable;
-
-     // Must start every co-routine with a call to crSTART();
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-          // Co-routine functionality goes here.
-     }
-
-     // Must end every co-routine with a call to crEND();
-     crEND();
- }
+ * 
+ * // Co-routine to be created.
+ * void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ * {
+ * // Variables in co-routines must be declared static if they must maintain value across a blocking call.
+ * static int32_t ulAVariable;
+ *
+ *   // Must start every co-routine with a call to crSTART();
+ *   crSTART( xHandle );
+ *
+ *   for( ;; )
+ *   {
+ *        // Co-routine functionality goes here.
+ *   }
+ *
+ *   // Must end every co-routine with a call to crEND();
+ *   crEND();
+ * }
+ *
* \defgroup crSTART crSTART * \ingroup Tasks */ -#define crSTART( pxCRCB ) switch( ( ( CRCB_t * )( pxCRCB ) )->uxState ) { case 0: +#define crSTART( pxCRCB ) \ + switch( ( ( CRCB_t * ) ( pxCRCB ) )->uxState ) { \ + case 0: /** * croutine. h * 
- crEND();
+ * crEND(); + * * * This macro MUST always be called at the end of a co-routine function. * * Example usage: - 
- // Co-routine to be created.
- void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static int32_t ulAVariable;
-
-     // Must start every co-routine with a call to crSTART();
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-          // Co-routine functionality goes here.
-     }
-
-     // Must end every co-routine with a call to crEND();
-     crEND();
- }
+ * 
+ * // Co-routine to be created.
+ * void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ * {
+ * // Variables in co-routines must be declared static if they must maintain value across a blocking call.
+ * static int32_t ulAVariable;
+ *
+ *   // Must start every co-routine with a call to crSTART();
+ *   crSTART( xHandle );
+ *
+ *   for( ;; )
+ *   {
+ *        // Co-routine functionality goes here.
+ *   }
+ *
+ *   // Must end every co-routine with a call to crEND();
+ *   crEND();
+ * }
+ *
* \defgroup crSTART crSTART * \ingroup Tasks */ -#define crEND() } +#define crEND() } /* * These macros are intended for internal use by the co-routine implementation * only. The macros should not be used directly by application writers. */ -#define crSET_STATE0( xHandle ) ( ( CRCB_t * )( xHandle ) )->uxState = (__LINE__ * 2); return; case (__LINE__ * 2): -#define crSET_STATE1( xHandle ) ( ( CRCB_t * )( xHandle ) )->uxState = ((__LINE__ * 2)+1); return; case ((__LINE__ * 2)+1): +#define crSET_STATE0( xHandle ) \ + ( ( CRCB_t * ) ( xHandle ) )->uxState = ( __LINE__ * 2 ); return; \ + case ( __LINE__ * 2 ): +#define crSET_STATE1( xHandle ) \ + ( ( CRCB_t * ) ( xHandle ) )->uxState = ( ( __LINE__ * 2 ) + 1 ); return; \ + case ( ( __LINE__ * 2 ) + 1 ): /** * croutine. h - *
- crDELAY( CoRoutineHandle_t xHandle, TickType_t xTicksToDelay );
+ * 
+ * crDELAY( CoRoutineHandle_t xHandle, TickType_t xTicksToDelay );
+ *
* * Delay a co-routine for a fixed period of time. * @@ -261,48 +278,50 @@ void vCoRoutineSchedule( void ); * can be used to convert ticks to milliseconds. * * Example usage: - 
- // Co-routine to be created.
- void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- // This may not be necessary for const variables.
- // We are to delay for 200ms.
- static const xTickType xDelayTime = 200 / portTICK_PERIOD_MS;
-
-     // Must start every co-routine with a call to crSTART();
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-        // Delay for 200ms.
-        crDELAY( xHandle, xDelayTime );
-
-        // Do something here.
-     }
-
-     // Must end every co-routine with a call to crEND();
-     crEND();
- }
+ * 
+ * // Co-routine to be created.
+ * void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ * {
+ * // Variables in co-routines must be declared static if they must maintain value across a blocking call.
+ * // This may not be necessary for const variables.
+ * // We are to delay for 200ms.
+ * static const xTickType xDelayTime = 200 / portTICK_PERIOD_MS;
+ *
+ *   // Must start every co-routine with a call to crSTART();
+ *   crSTART( xHandle );
+ *
+ *   for( ;; )
+ *   {
+ *      // Delay for 200ms.
+ *      crDELAY( xHandle, xDelayTime );
+ *
+ *      // Do something here.
+ *   }
+ *
+ *   // Must end every co-routine with a call to crEND();
+ *   crEND();
+ * }
+ *
* \defgroup crDELAY crDELAY * \ingroup Tasks */ -#define crDELAY( xHandle, xTicksToDelay ) \ - if( ( xTicksToDelay ) > 0 ) \ - { \ - vCoRoutineAddToDelayedList( ( xTicksToDelay ), NULL ); \ - } \ - crSET_STATE0( ( xHandle ) ); +#define crDELAY( xHandle, xTicksToDelay ) \ + if( ( xTicksToDelay ) > 0 ) \ + { \ + vCoRoutineAddToDelayedList( ( xTicksToDelay ), NULL ); \ + } \ + crSET_STATE0( ( xHandle ) ); /** * 
- crQUEUE_SEND(
-                  CoRoutineHandle_t xHandle,
-                  QueueHandle_t pxQueue,
-                  void *pvItemToQueue,
-                  TickType_t xTicksToWait,
-                  BaseType_t *pxResult
-             )
+ * crQUEUE_SEND( + * CoRoutineHandle_t xHandle, + * QueueHandle_t pxQueue, + * void *pvItemToQueue, + * TickType_t xTicksToWait, + * BaseType_t *pxResult + * ) + * * * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. @@ -342,66 +361,68 @@ void vCoRoutineSchedule( void ); * error defined within ProjDefs.h. * * Example usage: - 
- // Co-routine function that blocks for a fixed period then posts a number onto
- // a queue.
- static void prvCoRoutineFlashTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static BaseType_t xNumberToPost = 0;
- static BaseType_t xResult;
-
-    // Co-routines must begin with a call to crSTART().
-    crSTART( xHandle );
-
-    for( ;; )
-    {
-        // This assumes the queue has already been created.
-        crQUEUE_SEND( xHandle, xCoRoutineQueue, &xNumberToPost, NO_DELAY, &xResult );
-
-        if( xResult != pdPASS )
-        {
-            // The message was not posted!
-        }
-
-        // Increment the number to be posted onto the queue.
-        xNumberToPost++;
-
-        // Delay for 100 ticks.
-        crDELAY( xHandle, 100 );
-    }
-
-    // Co-routines must end with a call to crEND().
-    crEND();
- }
+ * 
+ * // Co-routine function that blocks for a fixed period then posts a number onto
+ * // a queue.
+ * static void prvCoRoutineFlashTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ * {
+ * // Variables in co-routines must be declared static if they must maintain value across a blocking call.
+ * static BaseType_t xNumberToPost = 0;
+ * static BaseType_t xResult;
+ *
+ *  // Co-routines must begin with a call to crSTART().
+ *  crSTART( xHandle );
+ *
+ *  for( ;; )
+ *  {
+ *      // This assumes the queue has already been created.
+ *      crQUEUE_SEND( xHandle, xCoRoutineQueue, &xNumberToPost, NO_DELAY, &xResult );
+ *
+ *      if( xResult != pdPASS )
+ *      {
+ *          // The message was not posted!
+ *      }
+ *
+ *      // Increment the number to be posted onto the queue.
+ *      xNumberToPost++;
+ *
+ *      // Delay for 100 ticks.
+ *      crDELAY( xHandle, 100 );
+ *  }
+ *
+ *  // Co-routines must end with a call to crEND().
+ *  crEND();
+ * }
+ *
* \defgroup crQUEUE_SEND crQUEUE_SEND * \ingroup Tasks */ -#define crQUEUE_SEND( xHandle, pxQueue, pvItemToQueue, xTicksToWait, pxResult ) \ -{ \ - *( pxResult ) = xQueueCRSend( ( pxQueue) , ( pvItemToQueue) , ( xTicksToWait ) ); \ - if( *( pxResult ) == errQUEUE_BLOCKED ) \ - { \ - crSET_STATE0( ( xHandle ) ); \ - *pxResult = xQueueCRSend( ( pxQueue ), ( pvItemToQueue ), 0 ); \ - } \ - if( *pxResult == errQUEUE_YIELD ) \ - { \ - crSET_STATE1( ( xHandle ) ); \ - *pxResult = pdPASS; \ - } \ -} +#define crQUEUE_SEND( xHandle, pxQueue, pvItemToQueue, xTicksToWait, pxResult ) \ + { \ + *( pxResult ) = xQueueCRSend( ( pxQueue ), ( pvItemToQueue ), ( xTicksToWait ) ); \ + if( *( pxResult ) == errQUEUE_BLOCKED ) \ + { \ + crSET_STATE0( ( xHandle ) ); \ + *pxResult = xQueueCRSend( ( pxQueue ), ( pvItemToQueue ), 0 ); \ + } \ + if( *pxResult == errQUEUE_YIELD ) \ + { \ + crSET_STATE1( ( xHandle ) ); \ + *pxResult = pdPASS; \ + } \ + } /** * croutine. h * 
-  crQUEUE_RECEIVE(
-                     CoRoutineHandle_t xHandle,
-                     QueueHandle_t pxQueue,
-                     void *pvBuffer,
-                     TickType_t xTicksToWait,
-                     BaseType_t *pxResult
-                 )
+ * crQUEUE_RECEIVE( + * CoRoutineHandle_t xHandle, + * QueueHandle_t pxQueue, + * void *pvBuffer, + * TickType_t xTicksToWait, + * BaseType_t *pxResult + * ) + * * * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. @@ -440,58 +461,60 @@ void vCoRoutineSchedule( void ); * an error code as defined within ProjDefs.h. * * Example usage: - 
- // A co-routine receives the number of an LED to flash from a queue.  It
- // blocks on the queue until the number is received.
- static void prvCoRoutineFlashWorkTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static BaseType_t xResult;
- static UBaseType_t uxLEDToFlash;
-
-    // All co-routines must start with a call to crSTART().
-    crSTART( xHandle );
-
-    for( ;; )
-    {
-        // Wait for data to become available on the queue.
-        crQUEUE_RECEIVE( xHandle, xCoRoutineQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
-
-        if( xResult == pdPASS )
-        {
-            // We received the LED to flash - flash it!
-            vParTestToggleLED( uxLEDToFlash );
-        }
-    }
-
-    crEND();
- }
+ * 
+ * // A co-routine receives the number of an LED to flash from a queue.  It
+ * // blocks on the queue until the number is received.
+ * static void prvCoRoutineFlashWorkTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ * {
+ * // Variables in co-routines must be declared static if they must maintain value across a blocking call.
+ * static BaseType_t xResult;
+ * static UBaseType_t uxLEDToFlash;
+ *
+ *  // All co-routines must start with a call to crSTART().
+ *  crSTART( xHandle );
+ *
+ *  for( ;; )
+ *  {
+ *      // Wait for data to become available on the queue.
+ *      crQUEUE_RECEIVE( xHandle, xCoRoutineQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
+ *
+ *      if( xResult == pdPASS )
+ *      {
+ *          // We received the LED to flash - flash it!
+ *          vParTestToggleLED( uxLEDToFlash );
+ *      }
+ *  }
+ *
+ *  crEND();
+ * }
+ *
* \defgroup crQUEUE_RECEIVE crQUEUE_RECEIVE * \ingroup Tasks */ -#define crQUEUE_RECEIVE( xHandle, pxQueue, pvBuffer, xTicksToWait, pxResult ) \ -{ \ - *( pxResult ) = xQueueCRReceive( ( pxQueue) , ( pvBuffer ), ( xTicksToWait ) ); \ - if( *( pxResult ) == errQUEUE_BLOCKED ) \ - { \ - crSET_STATE0( ( xHandle ) ); \ - *( pxResult ) = xQueueCRReceive( ( pxQueue) , ( pvBuffer ), 0 ); \ - } \ - if( *( pxResult ) == errQUEUE_YIELD ) \ - { \ - crSET_STATE1( ( xHandle ) ); \ - *( pxResult ) = pdPASS; \ - } \ -} +#define crQUEUE_RECEIVE( xHandle, pxQueue, pvBuffer, xTicksToWait, pxResult ) \ + { \ + *( pxResult ) = xQueueCRReceive( ( pxQueue ), ( pvBuffer ), ( xTicksToWait ) ); \ + if( *( pxResult ) == errQUEUE_BLOCKED ) \ + { \ + crSET_STATE0( ( xHandle ) ); \ + *( pxResult ) = xQueueCRReceive( ( pxQueue ), ( pvBuffer ), 0 ); \ + } \ + if( *( pxResult ) == errQUEUE_YIELD ) \ + { \ + crSET_STATE1( ( xHandle ) ); \ + *( pxResult ) = pdPASS; \ + } \ + } /** * croutine. h * 
-  crQUEUE_SEND_FROM_ISR(
-                            QueueHandle_t pxQueue,
-                            void *pvItemToQueue,
-                            BaseType_t xCoRoutinePreviouslyWoken
-                       )
+ * crQUEUE_SEND_FROM_ISR( + * QueueHandle_t pxQueue, + * void *pvItemToQueue, + * BaseType_t xCoRoutinePreviouslyWoken + * ) + * * * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() @@ -526,69 +549,72 @@ void vCoRoutineSchedule( void ); * the ISR. * * Example usage: - 
- // A co-routine that blocks on a queue waiting for characters to be received.
- static void vReceivingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
- {
- char cRxedChar;
- BaseType_t xResult;
-
-     // All co-routines must start with a call to crSTART().
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-         // Wait for data to become available on the queue.  This assumes the
-         // queue xCommsRxQueue has already been created!
-         crQUEUE_RECEIVE( xHandle, xCommsRxQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
-
-         // Was a character received?
-         if( xResult == pdPASS )
-         {
-             // Process the character here.
-         }
-     }
-
-     // All co-routines must end with a call to crEND().
-     crEND();
- }
-
- // An ISR that uses a queue to send characters received on a serial port to
- // a co-routine.
- void vUART_ISR( void )
- {
- char cRxedChar;
- BaseType_t xCRWokenByPost = pdFALSE;
-
-     // We loop around reading characters until there are none left in the UART.
-     while( UART_RX_REG_NOT_EMPTY() )
-     {
-         // Obtain the character from the UART.
-         cRxedChar = UART_RX_REG;
-
-         // Post the character onto a queue.  xCRWokenByPost will be pdFALSE
-         // the first time around the loop.  If the post causes a co-routine
-         // to be woken (unblocked) then xCRWokenByPost will be set to pdTRUE.
-         // In this manner we can ensure that if more than one co-routine is
-         // blocked on the queue only one is woken by this ISR no matter how
-         // many characters are posted to the queue.
-         xCRWokenByPost = crQUEUE_SEND_FROM_ISR( xCommsRxQueue, &cRxedChar, xCRWokenByPost );
-     }
- }
+ * 
+ * // A co-routine that blocks on a queue waiting for characters to be received.
+ * static void vReceivingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ * {
+ * char cRxedChar;
+ * BaseType_t xResult;
+ *
+ *   // All co-routines must start with a call to crSTART().
+ *   crSTART( xHandle );
+ *
+ *   for( ;; )
+ *   {
+ *       // Wait for data to become available on the queue.  This assumes the
+ *       // queue xCommsRxQueue has already been created!
+ *       crQUEUE_RECEIVE( xHandle, xCommsRxQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
+ *
+ *       // Was a character received?
+ *       if( xResult == pdPASS )
+ *       {
+ *           // Process the character here.
+ *       }
+ *   }
+ *
+ *   // All co-routines must end with a call to crEND().
+ *   crEND();
+ * }
+ *
+ * // An ISR that uses a queue to send characters received on a serial port to
+ * // a co-routine.
+ * void vUART_ISR( void )
+ * {
+ * char cRxedChar;
+ * BaseType_t xCRWokenByPost = pdFALSE;
+ *
+ *   // We loop around reading characters until there are none left in the UART.
+ *   while( UART_RX_REG_NOT_EMPTY() )
+ *   {
+ *       // Obtain the character from the UART.
+ *       cRxedChar = UART_RX_REG;
+ *
+ *       // Post the character onto a queue.  xCRWokenByPost will be pdFALSE
+ *       // the first time around the loop.  If the post causes a co-routine
+ *       // to be woken (unblocked) then xCRWokenByPost will be set to pdTRUE.
+ *       // In this manner we can ensure that if more than one co-routine is
+ *       // blocked on the queue only one is woken by this ISR no matter how
+ *       // many characters are posted to the queue.
+ *       xCRWokenByPost = crQUEUE_SEND_FROM_ISR( xCommsRxQueue, &cRxedChar, xCRWokenByPost );
+ *   }
+ * }
+ *
* \defgroup crQUEUE_SEND_FROM_ISR crQUEUE_SEND_FROM_ISR * \ingroup Tasks */ -#define crQUEUE_SEND_FROM_ISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) xQueueCRSendFromISR( ( pxQueue ), ( pvItemToQueue ), ( xCoRoutinePreviouslyWoken ) ) +#define crQUEUE_SEND_FROM_ISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) \ + xQueueCRSendFromISR( ( pxQueue ), ( pvItemToQueue ), ( xCoRoutinePreviouslyWoken ) ) /** * croutine. h * 
-  crQUEUE_SEND_FROM_ISR(
-                            QueueHandle_t pxQueue,
-                            void *pvBuffer,
-                            BaseType_t * pxCoRoutineWoken
-                       )
+ * crQUEUE_SEND_FROM_ISR( + * QueueHandle_t pxQueue, + * void *pvBuffer, + * BaseType_t * pxCoRoutineWoken + * ) + * * * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() @@ -623,75 +649,77 @@ void vCoRoutineSchedule( void ); * pdFALSE. * * Example usage: - 
- // A co-routine that posts a character to a queue then blocks for a fixed
- // period.  The character is incremented each time.
- static void vSendingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
- {
- // cChar holds its value while this co-routine is blocked and must therefore
- // be declared static.
- static char cCharToTx = 'a';
- BaseType_t xResult;
-
-     // All co-routines must start with a call to crSTART().
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-         // Send the next character to the queue.
-         crQUEUE_SEND( xHandle, xCoRoutineQueue, &cCharToTx, NO_DELAY, &xResult );
-
-         if( xResult == pdPASS )
-         {
-             // The character was successfully posted to the queue.
-         }
-		 else
-		 {
-			// Could not post the character to the queue.
-		 }
-
-         // Enable the UART Tx interrupt to cause an interrupt in this
-		 // hypothetical UART.  The interrupt will obtain the character
-		 // from the queue and send it.
-		 ENABLE_RX_INTERRUPT();
-
-		 // Increment to the next character then block for a fixed period.
-		 // cCharToTx will maintain its value across the delay as it is
-		 // declared static.
-		 cCharToTx++;
-		 if( cCharToTx > 'x' )
-		 {
-			cCharToTx = 'a';
-		 }
-		 crDELAY( 100 );
-     }
-
-     // All co-routines must end with a call to crEND().
-     crEND();
- }
-
- // An ISR that uses a queue to receive characters to send on a UART.
- void vUART_ISR( void )
- {
- char cCharToTx;
- BaseType_t xCRWokenByPost = pdFALSE;
-
-     while( UART_TX_REG_EMPTY() )
-     {
-         // Are there any characters in the queue waiting to be sent?
-		 // xCRWokenByPost will automatically be set to pdTRUE if a co-routine
-		 // is woken by the post - ensuring that only a single co-routine is
-		 // woken no matter how many times we go around this loop.
-         if( crQUEUE_RECEIVE_FROM_ISR( pxQueue, &cCharToTx, &xCRWokenByPost ) )
-		 {
-			 SEND_CHARACTER( cCharToTx );
-		 }
-     }
- }
+ * 
+ * // A co-routine that posts a character to a queue then blocks for a fixed
+ * // period.  The character is incremented each time.
+ * static void vSendingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ * {
+ * // cChar holds its value while this co-routine is blocked and must therefore
+ * // be declared static.
+ * static char cCharToTx = 'a';
+ * BaseType_t xResult;
+ *
+ *   // All co-routines must start with a call to crSTART().
+ *   crSTART( xHandle );
+ *
+ *   for( ;; )
+ *   {
+ *       // Send the next character to the queue.
+ *       crQUEUE_SEND( xHandle, xCoRoutineQueue, &cCharToTx, NO_DELAY, &xResult );
+ *
+ *       if( xResult == pdPASS )
+ *       {
+ *           // The character was successfully posted to the queue.
+ *       }
+ *       else
+ *       {
+ *          // Could not post the character to the queue.
+ *       }
+ *
+ *       // Enable the UART Tx interrupt to cause an interrupt in this
+ *       // hypothetical UART.  The interrupt will obtain the character
+ *       // from the queue and send it.
+ *       ENABLE_RX_INTERRUPT();
+ *
+ *       // Increment to the next character then block for a fixed period.
+ *       // cCharToTx will maintain its value across the delay as it is
+ *       // declared static.
+ *       cCharToTx++;
+ *       if( cCharToTx > 'x' )
+ *       {
+ *          cCharToTx = 'a';
+ *       }
+ *       crDELAY( 100 );
+ *   }
+ *
+ *   // All co-routines must end with a call to crEND().
+ *   crEND();
+ * }
+ *
+ * // An ISR that uses a queue to receive characters to send on a UART.
+ * void vUART_ISR( void )
+ * {
+ * char cCharToTx;
+ * BaseType_t xCRWokenByPost = pdFALSE;
+ *
+ *   while( UART_TX_REG_EMPTY() )
+ *   {
+ *       // Are there any characters in the queue waiting to be sent?
+ *       // xCRWokenByPost will automatically be set to pdTRUE if a co-routine
+ *       // is woken by the post - ensuring that only a single co-routine is
+ *       // woken no matter how many times we go around this loop.
+ *       if( crQUEUE_RECEIVE_FROM_ISR( pxQueue, &cCharToTx, &xCRWokenByPost ) )
+ *       {
+ *           SEND_CHARACTER( cCharToTx );
+ *       }
+ *   }
+ * }
+ *
* \defgroup crQUEUE_RECEIVE_FROM_ISR crQUEUE_RECEIVE_FROM_ISR * \ingroup Tasks */ -#define crQUEUE_RECEIVE_FROM_ISR( pxQueue, pvBuffer, pxCoRoutineWoken ) xQueueCRReceiveFromISR( ( pxQueue ), ( pvBuffer ), ( pxCoRoutineWoken ) ) +#define crQUEUE_RECEIVE_FROM_ISR( pxQueue, pvBuffer, pxCoRoutineWoken ) \ + xQueueCRReceiveFromISR( ( pxQueue ), ( pvBuffer ), ( pxCoRoutineWoken ) ) /* * This function is intended for internal use by the co-routine macros only. @@ -702,7 +730,8 @@ void vCoRoutineSchedule( void ); * Removes the current co-routine from its ready list and places it in the * appropriate delayed list. */ -void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay, List_t *pxEventList ); +void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay, + List_t * pxEventList ); /* * This function is intended for internal use by the queue implementation only. @@ -711,10 +740,12 @@ void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay, List_t *pxEventList ) * Removes the highest priority co-routine from the event list and places it in * the pending ready list. */ -BaseType_t xCoRoutineRemoveFromEventList( const List_t *pxEventList ); +BaseType_t xCoRoutineRemoveFromEventList( const List_t * pxEventList ); +/* *INDENT-OFF* */ #ifdef __cplusplus -} + } #endif +/* *INDENT-ON* */ #endif /* CO_ROUTINE_H */ diff --git a/include/deprecated_definitions.h b/include/deprecated_definitions.h index e048e6cdb..2006d9abf 100644 --- a/include/deprecated_definitions.h +++ b/include/deprecated_definitions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.3.1 + * FreeRTOS Kernel V10.4.1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ #ifndef DEPRECATED_DEFINITIONS_H @@ -30,158 +29,158 @@ /* Each FreeRTOS port has a unique portmacro.h header file. Originally a -pre-processor definition was used to ensure the pre-processor found the correct -portmacro.h file for the port being used. That scheme was deprecated in favour -of setting the compiler's include path such that it found the correct -portmacro.h file - removing the need for the constant and allowing the -portmacro.h file to be located anywhere in relation to the port being used. The -definitions below remain in the code for backward compatibility only. New -projects should not use them. */ + * pre-processor definition was used to ensure the pre-processor found the correct + * portmacro.h file for the port being used. That scheme was deprecated in favour + * of setting the compiler's include path such that it found the correct + * portmacro.h file - removing the need for the constant and allowing the + * portmacro.h file to be located anywhere in relation to the port being used. The + * definitions below remain in the code for backward compatibility only. New + * projects should not use them. */ #ifdef OPEN_WATCOM_INDUSTRIAL_PC_PORT - #include "..\..\Source\portable\owatcom\16bitdos\pc\portmacro.h" - typedef void ( __interrupt __far *pxISR )(); + #include "..\..\Source\portable\owatcom\16bitdos\pc\portmacro.h" + typedef void ( __interrupt __far * pxISR )(); #endif #ifdef OPEN_WATCOM_FLASH_LITE_186_PORT - #include "..\..\Source\portable\owatcom\16bitdos\flsh186\portmacro.h" - typedef void ( __interrupt __far *pxISR )(); + #include "..\..\Source\portable\owatcom\16bitdos\flsh186\portmacro.h" + typedef void ( __interrupt __far * pxISR )(); #endif #ifdef GCC_MEGA_AVR - #include "../portable/GCC/ATMega323/portmacro.h" + #include "../portable/GCC/ATMega323/portmacro.h" #endif #ifdef IAR_MEGA_AVR - #include "../portable/IAR/ATMega323/portmacro.h" + #include "../portable/IAR/ATMega323/portmacro.h" #endif #ifdef MPLAB_PIC24_PORT - #include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h" + #include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h" #endif #ifdef MPLAB_DSPIC_PORT - #include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h" + #include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h" #endif #ifdef MPLAB_PIC18F_PORT - #include "../../Source/portable/MPLAB/PIC18F/portmacro.h" + #include "../../Source/portable/MPLAB/PIC18F/portmacro.h" #endif #ifdef MPLAB_PIC32MX_PORT - #include "../../Source/portable/MPLAB/PIC32MX/portmacro.h" + #include "../../Source/portable/MPLAB/PIC32MX/portmacro.h" #endif #ifdef _FEDPICC - #include "libFreeRTOS/Include/portmacro.h" + #include "libFreeRTOS/Include/portmacro.h" #endif #ifdef SDCC_CYGNAL - #include "../../Source/portable/SDCC/Cygnal/portmacro.h" + #include "../../Source/portable/SDCC/Cygnal/portmacro.h" #endif #ifdef GCC_ARM7 - #include "../../Source/portable/GCC/ARM7_LPC2000/portmacro.h" + #include "../../Source/portable/GCC/ARM7_LPC2000/portmacro.h" #endif #ifdef GCC_ARM7_ECLIPSE - #include "portmacro.h" + #include "portmacro.h" #endif #ifdef ROWLEY_LPC23xx - #include "../../Source/portable/GCC/ARM7_LPC23xx/portmacro.h" + #include "../../Source/portable/GCC/ARM7_LPC23xx/portmacro.h" #endif #ifdef IAR_MSP430 - #include "..\..\Source\portable\IAR\MSP430\portmacro.h" + #include "..\..\Source\portable\IAR\MSP430\portmacro.h" #endif #ifdef GCC_MSP430 - #include "../../Source/portable/GCC/MSP430F449/portmacro.h" + #include "../../Source/portable/GCC/MSP430F449/portmacro.h" #endif #ifdef ROWLEY_MSP430 - #include "../../Source/portable/Rowley/MSP430F449/portmacro.h" + #include "../../Source/portable/Rowley/MSP430F449/portmacro.h" #endif #ifdef ARM7_LPC21xx_KEIL_RVDS - #include "..\..\Source\portable\RVDS\ARM7_LPC21xx\portmacro.h" + #include "..\..\Source\portable\RVDS\ARM7_LPC21xx\portmacro.h" #endif #ifdef SAM7_GCC - #include "../../Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h" + #include "../../Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h" #endif #ifdef SAM7_IAR - #include "..\..\Source\portable\IAR\AtmelSAM7S64\portmacro.h" + #include "..\..\Source\portable\IAR\AtmelSAM7S64\portmacro.h" #endif #ifdef SAM9XE_IAR - #include "..\..\Source\portable\IAR\AtmelSAM9XE\portmacro.h" + #include "..\..\Source\portable\IAR\AtmelSAM9XE\portmacro.h" #endif #ifdef LPC2000_IAR - #include "..\..\Source\portable\IAR\LPC2000\portmacro.h" + #include "..\..\Source\portable\IAR\LPC2000\portmacro.h" #endif #ifdef STR71X_IAR - #include "..\..\Source\portable\IAR\STR71x\portmacro.h" + #include "..\..\Source\portable\IAR\STR71x\portmacro.h" #endif #ifdef STR75X_IAR - #include "..\..\Source\portable\IAR\STR75x\portmacro.h" + #include "..\..\Source\portable\IAR\STR75x\portmacro.h" #endif #ifdef STR75X_GCC - #include "..\..\Source\portable\GCC\STR75x\portmacro.h" + #include "..\..\Source\portable\GCC\STR75x\portmacro.h" #endif #ifdef STR91X_IAR - #include "..\..\Source\portable\IAR\STR91x\portmacro.h" + #include "..\..\Source\portable\IAR\STR91x\portmacro.h" #endif #ifdef GCC_H8S - #include "../../Source/portable/GCC/H8S2329/portmacro.h" + #include "../../Source/portable/GCC/H8S2329/portmacro.h" #endif #ifdef GCC_AT91FR40008 - #include "../../Source/portable/GCC/ARM7_AT91FR40008/portmacro.h" + #include "../../Source/portable/GCC/ARM7_AT91FR40008/portmacro.h" #endif #ifdef RVDS_ARMCM3_LM3S102 - #include "../../Source/portable/RVDS/ARM_CM3/portmacro.h" + #include "../../Source/portable/RVDS/ARM_CM3/portmacro.h" #endif #ifdef GCC_ARMCM3_LM3S102 - #include "../../Source/portable/GCC/ARM_CM3/portmacro.h" + #include "../../Source/portable/GCC/ARM_CM3/portmacro.h" #endif #ifdef GCC_ARMCM3 - #include "../../Source/portable/GCC/ARM_CM3/portmacro.h" + #include "../../Source/portable/GCC/ARM_CM3/portmacro.h" #endif #ifdef IAR_ARM_CM3 - #include "../../Source/portable/IAR/ARM_CM3/portmacro.h" + #include "../../Source/portable/IAR/ARM_CM3/portmacro.h" #endif #ifdef IAR_ARMCM3_LM - #include "../../Source/portable/IAR/ARM_CM3/portmacro.h" + #include "../../Source/portable/IAR/ARM_CM3/portmacro.h" #endif #ifdef HCS12_CODE_WARRIOR - #include "../../Source/portable/CodeWarrior/HCS12/portmacro.h" + #include "../../Source/portable/CodeWarrior/HCS12/portmacro.h" #endif #ifdef MICROBLAZE_GCC - #include "../../Source/portable/GCC/MicroBlaze/portmacro.h" + #include "../../Source/portable/GCC/MicroBlaze/portmacro.h" #endif #ifdef TERN_EE - #include "..\..\Source\portable\Paradigm\Tern_EE\small\portmacro.h" + #include "..\..\Source\portable\Paradigm\Tern_EE\small\portmacro.h" #endif #ifdef GCC_HCS12 - #include "../../Source/portable/GCC/HCS12/portmacro.h" + #include "../../Source/portable/GCC/HCS12/portmacro.h" #endif #ifdef GCC_MCF5235 @@ -189,91 +188,92 @@ projects should not use them. */ #endif #ifdef COLDFIRE_V2_GCC - #include "../../../Source/portable/GCC/ColdFire_V2/portmacro.h" + #include "../../../Source/portable/GCC/ColdFire_V2/portmacro.h" #endif #ifdef COLDFIRE_V2_CODEWARRIOR - #include "../../Source/portable/CodeWarrior/ColdFire_V2/portmacro.h" + #include "../../Source/portable/CodeWarrior/ColdFire_V2/portmacro.h" #endif #ifdef GCC_PPC405 - #include "../../Source/portable/GCC/PPC405_Xilinx/portmacro.h" + #include "../../Source/portable/GCC/PPC405_Xilinx/portmacro.h" #endif #ifdef GCC_PPC440 - #include "../../Source/portable/GCC/PPC440_Xilinx/portmacro.h" + #include "../../Source/portable/GCC/PPC440_Xilinx/portmacro.h" #endif #ifdef _16FX_SOFTUNE - #include "..\..\Source\portable\Softune\MB96340\portmacro.h" + #include "..\..\Source\portable\Softune\MB96340\portmacro.h" #endif #ifdef BCC_INDUSTRIAL_PC_PORT - /* A short file name has to be used in place of the normal - FreeRTOSConfig.h when using the Borland compiler. */ - #include "frconfig.h" - #include "..\portable\BCC\16BitDOS\PC\prtmacro.h" - typedef void ( __interrupt __far *pxISR )(); + +/* A short file name has to be used in place of the normal + * FreeRTOSConfig.h when using the Borland compiler. */ + #include "frconfig.h" + #include "..\portable\BCC\16BitDOS\PC\prtmacro.h" + typedef void ( __interrupt __far * pxISR )(); #endif #ifdef BCC_FLASH_LITE_186_PORT - /* A short file name has to be used in place of the normal - FreeRTOSConfig.h when using the Borland compiler. */ - #include "frconfig.h" - #include "..\portable\BCC\16BitDOS\flsh186\prtmacro.h" - typedef void ( __interrupt __far *pxISR )(); + +/* A short file name has to be used in place of the normal + * FreeRTOSConfig.h when using the Borland compiler. */ + #include "frconfig.h" + #include "..\portable\BCC\16BitDOS\flsh186\prtmacro.h" + typedef void ( __interrupt __far * pxISR )(); #endif #ifdef __GNUC__ - #ifdef __AVR32_AVR32A__ - #include "portmacro.h" - #endif + #ifdef __AVR32_AVR32A__ + #include "portmacro.h" + #endif #endif #ifdef __ICCAVR32__ - #ifdef __CORE__ - #if __CORE__ == __AVR32A__ - #include "portmacro.h" - #endif - #endif + #ifdef __CORE__ + #if __CORE__ == __AVR32A__ + #include "portmacro.h" + #endif + #endif #endif #ifdef __91467D - #include "portmacro.h" + #include "portmacro.h" #endif #ifdef __96340 - #include "portmacro.h" + #include "portmacro.h" #endif #ifdef __IAR_V850ES_Fx3__ - #include "../../Source/portable/IAR/V850ES/portmacro.h" + #include "../../Source/portable/IAR/V850ES/portmacro.h" #endif #ifdef __IAR_V850ES_Jx3__ - #include "../../Source/portable/IAR/V850ES/portmacro.h" + #include "../../Source/portable/IAR/V850ES/portmacro.h" #endif #ifdef __IAR_V850ES_Jx3_L__ - #include "../../Source/portable/IAR/V850ES/portmacro.h" + #include "../../Source/portable/IAR/V850ES/portmacro.h" #endif #ifdef __IAR_V850ES_Jx2__ - #include "../../Source/portable/IAR/V850ES/portmacro.h" + #include "../../Source/portable/IAR/V850ES/portmacro.h" #endif #ifdef __IAR_V850ES_Hx2__ - #include "../../Source/portable/IAR/V850ES/portmacro.h" + #include "../../Source/portable/IAR/V850ES/portmacro.h" #endif #ifdef __IAR_78K0R_Kx3__ - #include "../../Source/portable/IAR/78K0R/portmacro.h" + #include "../../Source/portable/IAR/78K0R/portmacro.h" #endif #ifdef __IAR_78K0R_Kx3L__ - #include "../../Source/portable/IAR/78K0R/portmacro.h" + #include "../../Source/portable/IAR/78K0R/portmacro.h" #endif #endif /* DEPRECATED_DEFINITIONS_H */ - diff --git a/include/event_groups.h b/include/event_groups.h index bf8a985b6..e03b70dc8 100644 --- a/include/event_groups.h +++ b/include/event_groups.h @@ -1,757 +1,775 @@ -/* - * FreeRTOS Kernel V10.3.1 - * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of - * this software and associated documentation files (the "Software"), to deal in - * the Software without restriction, including without limitation the rights to - * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of - * the Software, and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR - * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos - * - * 1 tab == 4 spaces! - */ - -#ifndef EVENT_GROUPS_H -#define EVENT_GROUPS_H - -#ifndef INC_FREERTOS_H - #error "include FreeRTOS.h" must appear in source files before "include event_groups.h" -#endif - -/* FreeRTOS includes. */ -#include "timers.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * An event group is a collection of bits to which an application can assign a - * meaning. For example, an application may create an event group to convey - * the status of various CAN bus related events in which bit 0 might mean "A CAN - * message has been received and is ready for processing", bit 1 might mean "The - * application has queued a message that is ready for sending onto the CAN - * network", and bit 2 might mean "It is time to send a SYNC message onto the - * CAN network" etc. A task can then test the bit values to see which events - * are active, and optionally enter the Blocked state to wait for a specified - * bit or a group of specified bits to be active. To continue the CAN bus - * example, a CAN controlling task can enter the Blocked state (and therefore - * not consume any processing time) until either bit 0, bit 1 or bit 2 are - * active, at which time the bit that was actually active would inform the task - * which action it had to take (process a received message, send a message, or - * send a SYNC). - * - * The event groups implementation contains intelligence to avoid race - * conditions that would otherwise occur were an application to use a simple - * variable for the same purpose. This is particularly important with respect - * to when a bit within an event group is to be cleared, and when bits have to - * be set and then tested atomically - as is the case where event groups are - * used to create a synchronisation point between multiple tasks (a - * 'rendezvous'). - * - * \defgroup EventGroup - */ - - - -/** - * event_groups.h - * - * Type by which event groups are referenced. For example, a call to - * xEventGroupCreate() returns an EventGroupHandle_t variable that can then - * be used as a parameter to other event group functions. - * - * \defgroup EventGroupHandle_t EventGroupHandle_t - * \ingroup EventGroup - */ -struct EventGroupDef_t; -typedef struct EventGroupDef_t * EventGroupHandle_t; - -/* - * The type that holds event bits always matches TickType_t - therefore the - * number of bits it holds is set by configUSE_16_BIT_TICKS (16 bits if set to 1, - * 32 bits if set to 0. - * - * \defgroup EventBits_t EventBits_t - * \ingroup EventGroup - */ -typedef TickType_t EventBits_t; - -/** - * event_groups.h - *
- EventGroupHandle_t xEventGroupCreate( void );
-
- * - * Create a new event group. - * - * Internally, within the FreeRTOS implementation, event groups use a [small] - * block of memory, in which the event group's structure is stored. If an event - * groups is created using xEventGropuCreate() then the required memory is - * automatically dynamically allocated inside the xEventGroupCreate() function. - * (see http://www.freertos.org/a00111.html). If an event group is created - * using xEventGropuCreateStatic() then the application writer must instead - * provide the memory that will get used by the event group. - * xEventGroupCreateStatic() therefore allows an event group to be created - * without using any dynamic memory allocation. - * - * Although event groups are not related to ticks, for internal implementation - * reasons the number of bits available for use in an event group is dependent - * on the configUSE_16_BIT_TICKS setting in FreeRTOSConfig.h. If - * configUSE_16_BIT_TICKS is 1 then each event group contains 8 usable bits (bit - * 0 to bit 7). If configUSE_16_BIT_TICKS is set to 0 then each event group has - * 24 usable bits (bit 0 to bit 23). The EventBits_t type is used to store - * event bits within an event group. - * - * @return If the event group was created then a handle to the event group is - * returned. If there was insufficient FreeRTOS heap available to create the - * event group then NULL is returned. See http://www.freertos.org/a00111.html - * - * Example usage: - 
-	// Declare a variable to hold the created event group.
-	EventGroupHandle_t xCreatedEventGroup;
-
-	// Attempt to create the event group.
-	xCreatedEventGroup = xEventGroupCreate();
-
-	// Was the event group created successfully?
-	if( xCreatedEventGroup == NULL )
-	{
-		// The event group was not created because there was insufficient
-		// FreeRTOS heap available.
-	}
-	else
-	{
-		// The event group was created.
-	}
-
- * \defgroup xEventGroupCreate xEventGroupCreate - * \ingroup EventGroup - */ -#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - EventGroupHandle_t xEventGroupCreate( void ) PRIVILEGED_FUNCTION; -#endif - -/** - * event_groups.h - *
- EventGroupHandle_t xEventGroupCreateStatic( EventGroupHandle_t * pxEventGroupBuffer );
-
- * - * Create a new event group. - * - * Internally, within the FreeRTOS implementation, event groups use a [small] - * block of memory, in which the event group's structure is stored. If an event - * groups is created using xEventGropuCreate() then the required memory is - * automatically dynamically allocated inside the xEventGroupCreate() function. - * (see http://www.freertos.org/a00111.html). If an event group is created - * using xEventGropuCreateStatic() then the application writer must instead - * provide the memory that will get used by the event group. - * xEventGroupCreateStatic() therefore allows an event group to be created - * without using any dynamic memory allocation. - * - * Although event groups are not related to ticks, for internal implementation - * reasons the number of bits available for use in an event group is dependent - * on the configUSE_16_BIT_TICKS setting in FreeRTOSConfig.h. If - * configUSE_16_BIT_TICKS is 1 then each event group contains 8 usable bits (bit - * 0 to bit 7). If configUSE_16_BIT_TICKS is set to 0 then each event group has - * 24 usable bits (bit 0 to bit 23). The EventBits_t type is used to store - * event bits within an event group. - * - * @param pxEventGroupBuffer pxEventGroupBuffer must point to a variable of type - * StaticEventGroup_t, which will be then be used to hold the event group's data - * structures, removing the need for the memory to be allocated dynamically. - * - * @return If the event group was created then a handle to the event group is - * returned. If pxEventGroupBuffer was NULL then NULL is returned. - * - * Example usage: - 
-	// StaticEventGroup_t is a publicly accessible structure that has the same
-	// size and alignment requirements as the real event group structure.  It is
-	// provided as a mechanism for applications to know the size of the event
-	// group (which is dependent on the architecture and configuration file
-	// settings) without breaking the strict data hiding policy by exposing the
-	// real event group internals.  This StaticEventGroup_t variable is passed
-	// into the xSemaphoreCreateEventGroupStatic() function and is used to store
-	// the event group's data structures
-	StaticEventGroup_t xEventGroupBuffer;
-
-	// Create the event group without dynamically allocating any memory.
-	xEventGroup = xEventGroupCreateStatic( &xEventGroupBuffer );
-
- */ -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) - EventGroupHandle_t xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer ) PRIVILEGED_FUNCTION; -#endif - -/** - * event_groups.h - *
-	EventBits_t xEventGroupWaitBits( 	EventGroupHandle_t xEventGroup,
-										const EventBits_t uxBitsToWaitFor,
-										const BaseType_t xClearOnExit,
-										const BaseType_t xWaitForAllBits,
-										const TickType_t xTicksToWait );
-
- * - * [Potentially] block to wait for one or more bits to be set within a - * previously created event group. - * - * This function cannot be called from an interrupt. - * - * @param xEventGroup The event group in which the bits are being tested. The - * event group must have previously been created using a call to - * xEventGroupCreate(). - * - * @param uxBitsToWaitFor A bitwise value that indicates the bit or bits to test - * inside the event group. For example, to wait for bit 0 and/or bit 2 set - * uxBitsToWaitFor to 0x05. To wait for bits 0 and/or bit 1 and/or bit 2 set - * uxBitsToWaitFor to 0x07. Etc. - * - * @param xClearOnExit If xClearOnExit is set to pdTRUE then any bits within - * uxBitsToWaitFor that are set within the event group will be cleared before - * xEventGroupWaitBits() returns if the wait condition was met (if the function - * returns for a reason other than a timeout). If xClearOnExit is set to - * pdFALSE then the bits set in the event group are not altered when the call to - * xEventGroupWaitBits() returns. - * - * @param xWaitForAllBits If xWaitForAllBits is set to pdTRUE then - * xEventGroupWaitBits() will return when either all the bits in uxBitsToWaitFor - * are set or the specified block time expires. If xWaitForAllBits is set to - * pdFALSE then xEventGroupWaitBits() will return when any one of the bits set - * in uxBitsToWaitFor is set or the specified block time expires. The block - * time is specified by the xTicksToWait parameter. - * - * @param xTicksToWait The maximum amount of time (specified in 'ticks') to wait - * for one/all (depending on the xWaitForAllBits value) of the bits specified by - * uxBitsToWaitFor to become set. - * - * @return The value of the event group at the time either the bits being waited - * for became set, or the block time expired. Test the return value to know - * which bits were set. If xEventGroupWaitBits() returned because its timeout - * expired then not all the bits being waited for will be set. If - * xEventGroupWaitBits() returned because the bits it was waiting for were set - * then the returned value is the event group value before any bits were - * automatically cleared in the case that xClearOnExit parameter was set to - * pdTRUE. - * - * Example usage: - 
-   #define BIT_0	( 1 << 0 )
-   #define BIT_4	( 1 << 4 )
-
-   void aFunction( EventGroupHandle_t xEventGroup )
-   {
-   EventBits_t uxBits;
-   const TickType_t xTicksToWait = 100 / portTICK_PERIOD_MS;
-
-		// Wait a maximum of 100ms for either bit 0 or bit 4 to be set within
-		// the event group.  Clear the bits before exiting.
-		uxBits = xEventGroupWaitBits(
-					xEventGroup,	// The event group being tested.
-					BIT_0 | BIT_4,	// The bits within the event group to wait for.
-					pdTRUE,			// BIT_0 and BIT_4 should be cleared before returning.
-					pdFALSE,		// Don't wait for both bits, either bit will do.
-					xTicksToWait );	// Wait a maximum of 100ms for either bit to be set.
-
-		if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
-		{
-			// xEventGroupWaitBits() returned because both bits were set.
-		}
-		else if( ( uxBits & BIT_0 ) != 0 )
-		{
-			// xEventGroupWaitBits() returned because just BIT_0 was set.
-		}
-		else if( ( uxBits & BIT_4 ) != 0 )
-		{
-			// xEventGroupWaitBits() returned because just BIT_4 was set.
-		}
-		else
-		{
-			// xEventGroupWaitBits() returned because xTicksToWait ticks passed
-			// without either BIT_0 or BIT_4 becoming set.
-		}
-   }
-
- * \defgroup xEventGroupWaitBits xEventGroupWaitBits - * \ingroup EventGroup - */ -EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; - -/** - * event_groups.h - *
-	EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear );
-
- * - * Clear bits within an event group. This function cannot be called from an - * interrupt. - * - * @param xEventGroup The event group in which the bits are to be cleared. - * - * @param uxBitsToClear A bitwise value that indicates the bit or bits to clear - * in the event group. For example, to clear bit 3 only, set uxBitsToClear to - * 0x08. To clear bit 3 and bit 0 set uxBitsToClear to 0x09. - * - * @return The value of the event group before the specified bits were cleared. - * - * Example usage: - 
-   #define BIT_0	( 1 << 0 )
-   #define BIT_4	( 1 << 4 )
-
-   void aFunction( EventGroupHandle_t xEventGroup )
-   {
-   EventBits_t uxBits;
-
-		// Clear bit 0 and bit 4 in xEventGroup.
-		uxBits = xEventGroupClearBits(
-								xEventGroup,	// The event group being updated.
-								BIT_0 | BIT_4 );// The bits being cleared.
-
-		if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
-		{
-			// Both bit 0 and bit 4 were set before xEventGroupClearBits() was
-			// called.  Both will now be clear (not set).
-		}
-		else if( ( uxBits & BIT_0 ) != 0 )
-		{
-			// Bit 0 was set before xEventGroupClearBits() was called.  It will
-			// now be clear.
-		}
-		else if( ( uxBits & BIT_4 ) != 0 )
-		{
-			// Bit 4 was set before xEventGroupClearBits() was called.  It will
-			// now be clear.
-		}
-		else
-		{
-			// Neither bit 0 nor bit 4 were set in the first place.
-		}
-   }
-
- * \defgroup xEventGroupClearBits xEventGroupClearBits - * \ingroup EventGroup - */ -EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) PRIVILEGED_FUNCTION; - -/** - * event_groups.h - *
-	BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet );
-
- * - * A version of xEventGroupClearBits() that can be called from an interrupt. - * - * Setting bits in an event group is not a deterministic operation because there - * are an unknown number of tasks that may be waiting for the bit or bits being - * set. FreeRTOS does not allow nondeterministic operations to be performed - * while interrupts are disabled, so protects event groups that are accessed - * from tasks by suspending the scheduler rather than disabling interrupts. As - * a result event groups cannot be accessed directly from an interrupt service - * routine. Therefore xEventGroupClearBitsFromISR() sends a message to the - * timer task to have the clear operation performed in the context of the timer - * task. - * - * @param xEventGroup The event group in which the bits are to be cleared. - * - * @param uxBitsToClear A bitwise value that indicates the bit or bits to clear. - * For example, to clear bit 3 only, set uxBitsToClear to 0x08. To clear bit 3 - * and bit 0 set uxBitsToClear to 0x09. - * - * @return If the request to execute the function was posted successfully then - * pdPASS is returned, otherwise pdFALSE is returned. pdFALSE will be returned - * if the timer service queue was full. - * - * Example usage: - 
-   #define BIT_0	( 1 << 0 )
-   #define BIT_4	( 1 << 4 )
-
-   // An event group which it is assumed has already been created by a call to
-   // xEventGroupCreate().
-   EventGroupHandle_t xEventGroup;
-
-   void anInterruptHandler( void )
-   {
-		// Clear bit 0 and bit 4 in xEventGroup.
-		xResult = xEventGroupClearBitsFromISR(
-							xEventGroup,	 // The event group being updated.
-							BIT_0 | BIT_4 ); // The bits being set.
-
-		if( xResult == pdPASS )
-		{
-			// The message was posted successfully.
-		}
-  }
-
- * \defgroup xEventGroupClearBitsFromISR xEventGroupClearBitsFromISR - * \ingroup EventGroup - */ -#if( configUSE_TRACE_FACILITY == 1 ) - BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) PRIVILEGED_FUNCTION; -#else - #define xEventGroupClearBitsFromISR( xEventGroup, uxBitsToClear ) xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToClear, NULL ) -#endif - -/** - * event_groups.h - *
-	EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet );
-
- * - * Set bits within an event group. - * This function cannot be called from an interrupt. xEventGroupSetBitsFromISR() - * is a version that can be called from an interrupt. - * - * Setting bits in an event group will automatically unblock tasks that are - * blocked waiting for the bits. - * - * @param xEventGroup The event group in which the bits are to be set. - * - * @param uxBitsToSet A bitwise value that indicates the bit or bits to set. - * For example, to set bit 3 only, set uxBitsToSet to 0x08. To set bit 3 - * and bit 0 set uxBitsToSet to 0x09. - * - * @return The value of the event group at the time the call to - * xEventGroupSetBits() returns. There are two reasons why the returned value - * might have the bits specified by the uxBitsToSet parameter cleared. First, - * if setting a bit results in a task that was waiting for the bit leaving the - * blocked state then it is possible the bit will be cleared automatically - * (see the xClearBitOnExit parameter of xEventGroupWaitBits()). Second, any - * unblocked (or otherwise Ready state) task that has a priority above that of - * the task that called xEventGroupSetBits() will execute and may change the - * event group value before the call to xEventGroupSetBits() returns. - * - * Example usage: - 
-   #define BIT_0	( 1 << 0 )
-   #define BIT_4	( 1 << 4 )
-
-   void aFunction( EventGroupHandle_t xEventGroup )
-   {
-   EventBits_t uxBits;
-
-		// Set bit 0 and bit 4 in xEventGroup.
-		uxBits = xEventGroupSetBits(
-							xEventGroup,	// The event group being updated.
-							BIT_0 | BIT_4 );// The bits being set.
-
-		if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
-		{
-			// Both bit 0 and bit 4 remained set when the function returned.
-		}
-		else if( ( uxBits & BIT_0 ) != 0 )
-		{
-			// Bit 0 remained set when the function returned, but bit 4 was
-			// cleared.  It might be that bit 4 was cleared automatically as a
-			// task that was waiting for bit 4 was removed from the Blocked
-			// state.
-		}
-		else if( ( uxBits & BIT_4 ) != 0 )
-		{
-			// Bit 4 remained set when the function returned, but bit 0 was
-			// cleared.  It might be that bit 0 was cleared automatically as a
-			// task that was waiting for bit 0 was removed from the Blocked
-			// state.
-		}
-		else
-		{
-			// Neither bit 0 nor bit 4 remained set.  It might be that a task
-			// was waiting for both of the bits to be set, and the bits were
-			// cleared as the task left the Blocked state.
-		}
-   }
-
- * \defgroup xEventGroupSetBits xEventGroupSetBits - * \ingroup EventGroup - */ -EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) PRIVILEGED_FUNCTION; - -/** - * event_groups.h - *
-	BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken );
-
- * - * A version of xEventGroupSetBits() that can be called from an interrupt. - * - * Setting bits in an event group is not a deterministic operation because there - * are an unknown number of tasks that may be waiting for the bit or bits being - * set. FreeRTOS does not allow nondeterministic operations to be performed in - * interrupts or from critical sections. Therefore xEventGroupSetBitsFromISR() - * sends a message to the timer task to have the set operation performed in the - * context of the timer task - where a scheduler lock is used in place of a - * critical section. - * - * @param xEventGroup The event group in which the bits are to be set. - * - * @param uxBitsToSet A bitwise value that indicates the bit or bits to set. - * For example, to set bit 3 only, set uxBitsToSet to 0x08. To set bit 3 - * and bit 0 set uxBitsToSet to 0x09. - * - * @param pxHigherPriorityTaskWoken As mentioned above, calling this function - * will result in a message being sent to the timer daemon task. If the - * priority of the timer daemon task is higher than the priority of the - * currently running task (the task the interrupt interrupted) then - * *pxHigherPriorityTaskWoken will be set to pdTRUE by - * xEventGroupSetBitsFromISR(), indicating that a context switch should be - * requested before the interrupt exits. For that reason - * *pxHigherPriorityTaskWoken must be initialised to pdFALSE. See the - * example code below. - * - * @return If the request to execute the function was posted successfully then - * pdPASS is returned, otherwise pdFALSE is returned. pdFALSE will be returned - * if the timer service queue was full. - * - * Example usage: - 
-   #define BIT_0	( 1 << 0 )
-   #define BIT_4	( 1 << 4 )
-
-   // An event group which it is assumed has already been created by a call to
-   // xEventGroupCreate().
-   EventGroupHandle_t xEventGroup;
-
-   void anInterruptHandler( void )
-   {
-   BaseType_t xHigherPriorityTaskWoken, xResult;
-
-		// xHigherPriorityTaskWoken must be initialised to pdFALSE.
-		xHigherPriorityTaskWoken = pdFALSE;
-
-		// Set bit 0 and bit 4 in xEventGroup.
-		xResult = xEventGroupSetBitsFromISR(
-							xEventGroup,	// The event group being updated.
-							BIT_0 | BIT_4   // The bits being set.
-							&xHigherPriorityTaskWoken );
-
-		// Was the message posted successfully?
-		if( xResult == pdPASS )
-		{
-			// If xHigherPriorityTaskWoken is now set to pdTRUE then a context
-			// switch should be requested.  The macro used is port specific and
-			// will be either portYIELD_FROM_ISR() or portEND_SWITCHING_ISR() -
-			// refer to the documentation page for the port being used.
-			portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
-		}
-  }
-
- * \defgroup xEventGroupSetBitsFromISR xEventGroupSetBitsFromISR - * \ingroup EventGroup - */ -#if( configUSE_TRACE_FACILITY == 1 ) - BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; -#else - #define xEventGroupSetBitsFromISR( xEventGroup, uxBitsToSet, pxHigherPriorityTaskWoken ) xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken ) -#endif - -/** - * event_groups.h - *
-	EventBits_t xEventGroupSync(	EventGroupHandle_t xEventGroup,
-									const EventBits_t uxBitsToSet,
-									const EventBits_t uxBitsToWaitFor,
-									TickType_t xTicksToWait );
-
- * - * Atomically set bits within an event group, then wait for a combination of - * bits to be set within the same event group. This functionality is typically - * used to synchronise multiple tasks, where each task has to wait for the other - * tasks to reach a synchronisation point before proceeding. - * - * This function cannot be used from an interrupt. - * - * The function will return before its block time expires if the bits specified - * by the uxBitsToWait parameter are set, or become set within that time. In - * this case all the bits specified by uxBitsToWait will be automatically - * cleared before the function returns. - * - * @param xEventGroup The event group in which the bits are being tested. The - * event group must have previously been created using a call to - * xEventGroupCreate(). - * - * @param uxBitsToSet The bits to set in the event group before determining - * if, and possibly waiting for, all the bits specified by the uxBitsToWait - * parameter are set. - * - * @param uxBitsToWaitFor A bitwise value that indicates the bit or bits to test - * inside the event group. For example, to wait for bit 0 and bit 2 set - * uxBitsToWaitFor to 0x05. To wait for bits 0 and bit 1 and bit 2 set - * uxBitsToWaitFor to 0x07. Etc. - * - * @param xTicksToWait The maximum amount of time (specified in 'ticks') to wait - * for all of the bits specified by uxBitsToWaitFor to become set. - * - * @return The value of the event group at the time either the bits being waited - * for became set, or the block time expired. Test the return value to know - * which bits were set. If xEventGroupSync() returned because its timeout - * expired then not all the bits being waited for will be set. If - * xEventGroupSync() returned because all the bits it was waiting for were - * set then the returned value is the event group value before any bits were - * automatically cleared. - * - * Example usage: - 
- // Bits used by the three tasks.
- #define TASK_0_BIT		( 1 << 0 )
- #define TASK_1_BIT		( 1 << 1 )
- #define TASK_2_BIT		( 1 << 2 )
-
- #define ALL_SYNC_BITS ( TASK_0_BIT | TASK_1_BIT | TASK_2_BIT )
-
- // Use an event group to synchronise three tasks.  It is assumed this event
- // group has already been created elsewhere.
- EventGroupHandle_t xEventBits;
-
- void vTask0( void *pvParameters )
- {
- EventBits_t uxReturn;
- TickType_t xTicksToWait = 100 / portTICK_PERIOD_MS;
-
-	 for( ;; )
-	 {
-		// Perform task functionality here.
-
-		// Set bit 0 in the event flag to note this task has reached the
-		// sync point.  The other two tasks will set the other two bits defined
-		// by ALL_SYNC_BITS.  All three tasks have reached the synchronisation
-		// point when all the ALL_SYNC_BITS are set.  Wait a maximum of 100ms
-		// for this to happen.
-		uxReturn = xEventGroupSync( xEventBits, TASK_0_BIT, ALL_SYNC_BITS, xTicksToWait );
-
-		if( ( uxReturn & ALL_SYNC_BITS ) == ALL_SYNC_BITS )
-		{
-			// All three tasks reached the synchronisation point before the call
-			// to xEventGroupSync() timed out.
-		}
-	}
- }
-
- void vTask1( void *pvParameters )
- {
-	 for( ;; )
-	 {
-		// Perform task functionality here.
-
-		// Set bit 1 in the event flag to note this task has reached the
-		// synchronisation point.  The other two tasks will set the other two
-		// bits defined by ALL_SYNC_BITS.  All three tasks have reached the
-		// synchronisation point when all the ALL_SYNC_BITS are set.  Wait
-		// indefinitely for this to happen.
-		xEventGroupSync( xEventBits, TASK_1_BIT, ALL_SYNC_BITS, portMAX_DELAY );
-
-		// xEventGroupSync() was called with an indefinite block time, so
-		// this task will only reach here if the syncrhonisation was made by all
-		// three tasks, so there is no need to test the return value.
-	 }
- }
-
- void vTask2( void *pvParameters )
- {
-	 for( ;; )
-	 {
-		// Perform task functionality here.
-
-		// Set bit 2 in the event flag to note this task has reached the
-		// synchronisation point.  The other two tasks will set the other two
-		// bits defined by ALL_SYNC_BITS.  All three tasks have reached the
-		// synchronisation point when all the ALL_SYNC_BITS are set.  Wait
-		// indefinitely for this to happen.
-		xEventGroupSync( xEventBits, TASK_2_BIT, ALL_SYNC_BITS, portMAX_DELAY );
-
-		// xEventGroupSync() was called with an indefinite block time, so
-		// this task will only reach here if the syncrhonisation was made by all
-		// three tasks, so there is no need to test the return value.
-	}
- }
-
-
- * \defgroup xEventGroupSync xEventGroupSync - * \ingroup EventGroup - */ -EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; - - -/** - * event_groups.h - *
-	EventBits_t xEventGroupGetBits( EventGroupHandle_t xEventGroup );
-
- * - * Returns the current value of the bits in an event group. This function - * cannot be used from an interrupt. - * - * @param xEventGroup The event group being queried. - * - * @return The event group bits at the time xEventGroupGetBits() was called. - * - * \defgroup xEventGroupGetBits xEventGroupGetBits - * \ingroup EventGroup - */ -#define xEventGroupGetBits( xEventGroup ) xEventGroupClearBits( xEventGroup, 0 ) - -/** - * event_groups.h - *
-	EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup );
-
- * - * A version of xEventGroupGetBits() that can be called from an ISR. - * - * @param xEventGroup The event group being queried. - * - * @return The event group bits at the time xEventGroupGetBitsFromISR() was called. - * - * \defgroup xEventGroupGetBitsFromISR xEventGroupGetBitsFromISR - * \ingroup EventGroup - */ -EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION; - -/** - * event_groups.h - *
-	void xEventGroupDelete( EventGroupHandle_t xEventGroup );
-
- * - * Delete an event group that was previously created by a call to - * xEventGroupCreate(). Tasks that are blocked on the event group will be - * unblocked and obtain 0 as the event group's value. - * - * @param xEventGroup The event group being deleted. - */ -void vEventGroupDelete( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION; - -/* For internal use only. */ -void vEventGroupSetBitsCallback( void *pvEventGroup, const uint32_t ulBitsToSet ) PRIVILEGED_FUNCTION; -void vEventGroupClearBitsCallback( void *pvEventGroup, const uint32_t ulBitsToClear ) PRIVILEGED_FUNCTION; - - -#if (configUSE_TRACE_FACILITY == 1) - UBaseType_t uxEventGroupGetNumber( void* xEventGroup ) PRIVILEGED_FUNCTION; - void vEventGroupSetNumber( void* xEventGroup, UBaseType_t uxEventGroupNumber ) PRIVILEGED_FUNCTION; -#endif - -#ifdef __cplusplus -} -#endif - -#endif /* EVENT_GROUPS_H */ - - +/* + * FreeRTOS Kernel V10.4.1 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +#ifndef EVENT_GROUPS_H +#define EVENT_GROUPS_H + +#ifndef INC_FREERTOS_H + #error "include FreeRTOS.h" must appear in source files before "include event_groups.h" +#endif + +/* FreeRTOS includes. */ +#include "timers.h" + +/* *INDENT-OFF* */ +#ifdef __cplusplus + extern "C" { +#endif +/* *INDENT-ON* */ + +/** + * An event group is a collection of bits to which an application can assign a + * meaning. For example, an application may create an event group to convey + * the status of various CAN bus related events in which bit 0 might mean "A CAN + * message has been received and is ready for processing", bit 1 might mean "The + * application has queued a message that is ready for sending onto the CAN + * network", and bit 2 might mean "It is time to send a SYNC message onto the + * CAN network" etc. A task can then test the bit values to see which events + * are active, and optionally enter the Blocked state to wait for a specified + * bit or a group of specified bits to be active. To continue the CAN bus + * example, a CAN controlling task can enter the Blocked state (and therefore + * not consume any processing time) until either bit 0, bit 1 or bit 2 are + * active, at which time the bit that was actually active would inform the task + * which action it had to take (process a received message, send a message, or + * send a SYNC). + * + * The event groups implementation contains intelligence to avoid race + * conditions that would otherwise occur were an application to use a simple + * variable for the same purpose. This is particularly important with respect + * to when a bit within an event group is to be cleared, and when bits have to + * be set and then tested atomically - as is the case where event groups are + * used to create a synchronisation point between multiple tasks (a + * 'rendezvous'). + * + * \defgroup EventGroup + */ + + + +/** + * event_groups.h + * + * Type by which event groups are referenced. For example, a call to + * xEventGroupCreate() returns an EventGroupHandle_t variable that can then + * be used as a parameter to other event group functions. + * + * \defgroup EventGroupHandle_t EventGroupHandle_t + * \ingroup EventGroup + */ +struct EventGroupDef_t; +typedef struct EventGroupDef_t * EventGroupHandle_t; + +/* + * The type that holds event bits always matches TickType_t - therefore the + * number of bits it holds is set by configUSE_16_BIT_TICKS (16 bits if set to 1, + * 32 bits if set to 0. + * + * \defgroup EventBits_t EventBits_t + * \ingroup EventGroup + */ +typedef TickType_t EventBits_t; + +/** + * event_groups.h + * 
+ * EventGroupHandle_t xEventGroupCreate( void );
+ *
+ * + * Create a new event group. + * + * Internally, within the FreeRTOS implementation, event groups use a [small] + * block of memory, in which the event group's structure is stored. If an event + * groups is created using xEventGropuCreate() then the required memory is + * automatically dynamically allocated inside the xEventGroupCreate() function. + * (see https://www.FreeRTOS.org/a00111.html). If an event group is created + * using xEventGropuCreateStatic() then the application writer must instead + * provide the memory that will get used by the event group. + * xEventGroupCreateStatic() therefore allows an event group to be created + * without using any dynamic memory allocation. + * + * Although event groups are not related to ticks, for internal implementation + * reasons the number of bits available for use in an event group is dependent + * on the configUSE_16_BIT_TICKS setting in FreeRTOSConfig.h. If + * configUSE_16_BIT_TICKS is 1 then each event group contains 8 usable bits (bit + * 0 to bit 7). If configUSE_16_BIT_TICKS is set to 0 then each event group has + * 24 usable bits (bit 0 to bit 23). The EventBits_t type is used to store + * event bits within an event group. + * + * @return If the event group was created then a handle to the event group is + * returned. If there was insufficient FreeRTOS heap available to create the + * event group then NULL is returned. See https://www.FreeRTOS.org/a00111.html + * + * Example usage: + * 
+ *  // Declare a variable to hold the created event group.
+ *  EventGroupHandle_t xCreatedEventGroup;
+ *
+ *  // Attempt to create the event group.
+ *  xCreatedEventGroup = xEventGroupCreate();
+ *
+ *  // Was the event group created successfully?
+ *  if( xCreatedEventGroup == NULL )
+ *  {
+ *      // The event group was not created because there was insufficient
+ *      // FreeRTOS heap available.
+ *  }
+ *  else
+ *  {
+ *      // The event group was created.
+ *  }
+ *
+ * \defgroup xEventGroupCreate xEventGroupCreate + * \ingroup EventGroup + */ +#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + EventGroupHandle_t xEventGroupCreate( void ) PRIVILEGED_FUNCTION; +#endif + +/** + * event_groups.h + * 
+ * EventGroupHandle_t xEventGroupCreateStatic( EventGroupHandle_t * pxEventGroupBuffer );
+ *
+ * + * Create a new event group. + * + * Internally, within the FreeRTOS implementation, event groups use a [small] + * block of memory, in which the event group's structure is stored. If an event + * groups is created using xEventGropuCreate() then the required memory is + * automatically dynamically allocated inside the xEventGroupCreate() function. + * (see https://www.FreeRTOS.org/a00111.html). If an event group is created + * using xEventGropuCreateStatic() then the application writer must instead + * provide the memory that will get used by the event group. + * xEventGroupCreateStatic() therefore allows an event group to be created + * without using any dynamic memory allocation. + * + * Although event groups are not related to ticks, for internal implementation + * reasons the number of bits available for use in an event group is dependent + * on the configUSE_16_BIT_TICKS setting in FreeRTOSConfig.h. If + * configUSE_16_BIT_TICKS is 1 then each event group contains 8 usable bits (bit + * 0 to bit 7). If configUSE_16_BIT_TICKS is set to 0 then each event group has + * 24 usable bits (bit 0 to bit 23). The EventBits_t type is used to store + * event bits within an event group. + * + * @param pxEventGroupBuffer pxEventGroupBuffer must point to a variable of type + * StaticEventGroup_t, which will be then be used to hold the event group's data + * structures, removing the need for the memory to be allocated dynamically. + * + * @return If the event group was created then a handle to the event group is + * returned. If pxEventGroupBuffer was NULL then NULL is returned. + * + * Example usage: + * 
+ *  // StaticEventGroup_t is a publicly accessible structure that has the same
+ *  // size and alignment requirements as the real event group structure.  It is
+ *  // provided as a mechanism for applications to know the size of the event
+ *  // group (which is dependent on the architecture and configuration file
+ *  // settings) without breaking the strict data hiding policy by exposing the
+ *  // real event group internals.  This StaticEventGroup_t variable is passed
+ *  // into the xSemaphoreCreateEventGroupStatic() function and is used to store
+ *  // the event group's data structures
+ *  StaticEventGroup_t xEventGroupBuffer;
+ *
+ *  // Create the event group without dynamically allocating any memory.
+ *  xEventGroup = xEventGroupCreateStatic( &xEventGroupBuffer );
+ *
+ */ +#if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + EventGroupHandle_t xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer ) PRIVILEGED_FUNCTION; +#endif + +/** + * event_groups.h + * 
+ *  EventBits_t xEventGroupWaitBits(    EventGroupHandle_t xEventGroup,
+ *                                      const EventBits_t uxBitsToWaitFor,
+ *                                      const BaseType_t xClearOnExit,
+ *                                      const BaseType_t xWaitForAllBits,
+ *                                      const TickType_t xTicksToWait );
+ *
+ * + * [Potentially] block to wait for one or more bits to be set within a + * previously created event group. + * + * This function cannot be called from an interrupt. + * + * @param xEventGroup The event group in which the bits are being tested. The + * event group must have previously been created using a call to + * xEventGroupCreate(). + * + * @param uxBitsToWaitFor A bitwise value that indicates the bit or bits to test + * inside the event group. For example, to wait for bit 0 and/or bit 2 set + * uxBitsToWaitFor to 0x05. To wait for bits 0 and/or bit 1 and/or bit 2 set + * uxBitsToWaitFor to 0x07. Etc. + * + * @param xClearOnExit If xClearOnExit is set to pdTRUE then any bits within + * uxBitsToWaitFor that are set within the event group will be cleared before + * xEventGroupWaitBits() returns if the wait condition was met (if the function + * returns for a reason other than a timeout). If xClearOnExit is set to + * pdFALSE then the bits set in the event group are not altered when the call to + * xEventGroupWaitBits() returns. + * + * @param xWaitForAllBits If xWaitForAllBits is set to pdTRUE then + * xEventGroupWaitBits() will return when either all the bits in uxBitsToWaitFor + * are set or the specified block time expires. If xWaitForAllBits is set to + * pdFALSE then xEventGroupWaitBits() will return when any one of the bits set + * in uxBitsToWaitFor is set or the specified block time expires. The block + * time is specified by the xTicksToWait parameter. + * + * @param xTicksToWait The maximum amount of time (specified in 'ticks') to wait + * for one/all (depending on the xWaitForAllBits value) of the bits specified by + * uxBitsToWaitFor to become set. + * + * @return The value of the event group at the time either the bits being waited + * for became set, or the block time expired. Test the return value to know + * which bits were set. If xEventGroupWaitBits() returned because its timeout + * expired then not all the bits being waited for will be set. If + * xEventGroupWaitBits() returned because the bits it was waiting for were set + * then the returned value is the event group value before any bits were + * automatically cleared in the case that xClearOnExit parameter was set to + * pdTRUE. + * + * Example usage: + * 
+ #define BIT_0 ( 1 << 0 )
+ #define BIT_4 ( 1 << 4 )
+ *
+ * void aFunction( EventGroupHandle_t xEventGroup )
+ * {
+ * EventBits_t uxBits;
+ * const TickType_t xTicksToWait = 100 / portTICK_PERIOD_MS;
+ *
+ *      // Wait a maximum of 100ms for either bit 0 or bit 4 to be set within
+ *      // the event group.  Clear the bits before exiting.
+ *      uxBits = xEventGroupWaitBits(
+ *                  xEventGroup,    // The event group being tested.
+ *                  BIT_0 | BIT_4,  // The bits within the event group to wait for.
+ *                  pdTRUE,         // BIT_0 and BIT_4 should be cleared before returning.
+ *                  pdFALSE,        // Don't wait for both bits, either bit will do.
+ *                  xTicksToWait ); // Wait a maximum of 100ms for either bit to be set.
+ *
+ *      if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
+ *      {
+ *          // xEventGroupWaitBits() returned because both bits were set.
+ *      }
+ *      else if( ( uxBits & BIT_0 ) != 0 )
+ *      {
+ *          // xEventGroupWaitBits() returned because just BIT_0 was set.
+ *      }
+ *      else if( ( uxBits & BIT_4 ) != 0 )
+ *      {
+ *          // xEventGroupWaitBits() returned because just BIT_4 was set.
+ *      }
+ *      else
+ *      {
+ *          // xEventGroupWaitBits() returned because xTicksToWait ticks passed
+ *          // without either BIT_0 or BIT_4 becoming set.
+ *      }
+ * }
+ *
+ * \defgroup xEventGroupWaitBits xEventGroupWaitBits + * \ingroup EventGroup + */ +EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToWaitFor, + const BaseType_t xClearOnExit, + const BaseType_t xWaitForAllBits, + TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + +/** + * event_groups.h + * 
+ *  EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear );
+ *
+ * + * Clear bits within an event group. This function cannot be called from an + * interrupt. + * + * @param xEventGroup The event group in which the bits are to be cleared. + * + * @param uxBitsToClear A bitwise value that indicates the bit or bits to clear + * in the event group. For example, to clear bit 3 only, set uxBitsToClear to + * 0x08. To clear bit 3 and bit 0 set uxBitsToClear to 0x09. + * + * @return The value of the event group before the specified bits were cleared. + * + * Example usage: + * 
+ #define BIT_0 ( 1 << 0 )
+ #define BIT_4 ( 1 << 4 )
+ *
+ * void aFunction( EventGroupHandle_t xEventGroup )
+ * {
+ * EventBits_t uxBits;
+ *
+ *      // Clear bit 0 and bit 4 in xEventGroup.
+ *      uxBits = xEventGroupClearBits(
+ *                              xEventGroup,    // The event group being updated.
+ *                              BIT_0 | BIT_4 );// The bits being cleared.
+ *
+ *      if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
+ *      {
+ *          // Both bit 0 and bit 4 were set before xEventGroupClearBits() was
+ *          // called.  Both will now be clear (not set).
+ *      }
+ *      else if( ( uxBits & BIT_0 ) != 0 )
+ *      {
+ *          // Bit 0 was set before xEventGroupClearBits() was called.  It will
+ *          // now be clear.
+ *      }
+ *      else if( ( uxBits & BIT_4 ) != 0 )
+ *      {
+ *          // Bit 4 was set before xEventGroupClearBits() was called.  It will
+ *          // now be clear.
+ *      }
+ *      else
+ *      {
+ *          // Neither bit 0 nor bit 4 were set in the first place.
+ *      }
+ * }
+ *
+ * \defgroup xEventGroupClearBits xEventGroupClearBits + * \ingroup EventGroup + */ +EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) PRIVILEGED_FUNCTION; + +/** + * event_groups.h + * 
+ *  BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet );
+ *
+ * + * A version of xEventGroupClearBits() that can be called from an interrupt. + * + * Setting bits in an event group is not a deterministic operation because there + * are an unknown number of tasks that may be waiting for the bit or bits being + * set. FreeRTOS does not allow nondeterministic operations to be performed + * while interrupts are disabled, so protects event groups that are accessed + * from tasks by suspending the scheduler rather than disabling interrupts. As + * a result event groups cannot be accessed directly from an interrupt service + * routine. Therefore xEventGroupClearBitsFromISR() sends a message to the + * timer task to have the clear operation performed in the context of the timer + * task. + * + * @param xEventGroup The event group in which the bits are to be cleared. + * + * @param uxBitsToClear A bitwise value that indicates the bit or bits to clear. + * For example, to clear bit 3 only, set uxBitsToClear to 0x08. To clear bit 3 + * and bit 0 set uxBitsToClear to 0x09. + * + * @return If the request to execute the function was posted successfully then + * pdPASS is returned, otherwise pdFALSE is returned. pdFALSE will be returned + * if the timer service queue was full. + * + * Example usage: + * 
+ #define BIT_0 ( 1 << 0 )
+ #define BIT_4 ( 1 << 4 )
+ *
+ * // An event group which it is assumed has already been created by a call to
+ * // xEventGroupCreate().
+ * EventGroupHandle_t xEventGroup;
+ *
+ * void anInterruptHandler( void )
+ * {
+ *      // Clear bit 0 and bit 4 in xEventGroup.
+ *      xResult = xEventGroupClearBitsFromISR(
+ *                          xEventGroup,     // The event group being updated.
+ *                          BIT_0 | BIT_4 ); // The bits being set.
+ *
+ *      if( xResult == pdPASS )
+ *      {
+ *          // The message was posted successfully.
+ *      }
+ * }
+ *
+ * \defgroup xEventGroupClearBitsFromISR xEventGroupClearBitsFromISR + * \ingroup EventGroup + */ +#if ( configUSE_TRACE_FACILITY == 1 ) + BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) PRIVILEGED_FUNCTION; +#else + #define xEventGroupClearBitsFromISR( xEventGroup, uxBitsToClear ) \ + xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToClear, NULL ) +#endif + +/** + * event_groups.h + * 
+ *  EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet );
+ *
+ * + * Set bits within an event group. + * This function cannot be called from an interrupt. xEventGroupSetBitsFromISR() + * is a version that can be called from an interrupt. + * + * Setting bits in an event group will automatically unblock tasks that are + * blocked waiting for the bits. + * + * @param xEventGroup The event group in which the bits are to be set. + * + * @param uxBitsToSet A bitwise value that indicates the bit or bits to set. + * For example, to set bit 3 only, set uxBitsToSet to 0x08. To set bit 3 + * and bit 0 set uxBitsToSet to 0x09. + * + * @return The value of the event group at the time the call to + * xEventGroupSetBits() returns. There are two reasons why the returned value + * might have the bits specified by the uxBitsToSet parameter cleared. First, + * if setting a bit results in a task that was waiting for the bit leaving the + * blocked state then it is possible the bit will be cleared automatically + * (see the xClearBitOnExit parameter of xEventGroupWaitBits()). Second, any + * unblocked (or otherwise Ready state) task that has a priority above that of + * the task that called xEventGroupSetBits() will execute and may change the + * event group value before the call to xEventGroupSetBits() returns. + * + * Example usage: + * 
+ #define BIT_0 ( 1 << 0 )
+ #define BIT_4 ( 1 << 4 )
+ *
+ * void aFunction( EventGroupHandle_t xEventGroup )
+ * {
+ * EventBits_t uxBits;
+ *
+ *      // Set bit 0 and bit 4 in xEventGroup.
+ *      uxBits = xEventGroupSetBits(
+ *                          xEventGroup,    // The event group being updated.
+ *                          BIT_0 | BIT_4 );// The bits being set.
+ *
+ *      if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
+ *      {
+ *          // Both bit 0 and bit 4 remained set when the function returned.
+ *      }
+ *      else if( ( uxBits & BIT_0 ) != 0 )
+ *      {
+ *          // Bit 0 remained set when the function returned, but bit 4 was
+ *          // cleared.  It might be that bit 4 was cleared automatically as a
+ *          // task that was waiting for bit 4 was removed from the Blocked
+ *          // state.
+ *      }
+ *      else if( ( uxBits & BIT_4 ) != 0 )
+ *      {
+ *          // Bit 4 remained set when the function returned, but bit 0 was
+ *          // cleared.  It might be that bit 0 was cleared automatically as a
+ *          // task that was waiting for bit 0 was removed from the Blocked
+ *          // state.
+ *      }
+ *      else
+ *      {
+ *          // Neither bit 0 nor bit 4 remained set.  It might be that a task
+ *          // was waiting for both of the bits to be set, and the bits were
+ *          // cleared as the task left the Blocked state.
+ *      }
+ * }
+ *
+ * \defgroup xEventGroupSetBits xEventGroupSetBits + * \ingroup EventGroup + */ +EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) PRIVILEGED_FUNCTION; + +/** + * event_groups.h + * 
+ *  BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken );
+ *
+ * + * A version of xEventGroupSetBits() that can be called from an interrupt. + * + * Setting bits in an event group is not a deterministic operation because there + * are an unknown number of tasks that may be waiting for the bit or bits being + * set. FreeRTOS does not allow nondeterministic operations to be performed in + * interrupts or from critical sections. Therefore xEventGroupSetBitsFromISR() + * sends a message to the timer task to have the set operation performed in the + * context of the timer task - where a scheduler lock is used in place of a + * critical section. + * + * @param xEventGroup The event group in which the bits are to be set. + * + * @param uxBitsToSet A bitwise value that indicates the bit or bits to set. + * For example, to set bit 3 only, set uxBitsToSet to 0x08. To set bit 3 + * and bit 0 set uxBitsToSet to 0x09. + * + * @param pxHigherPriorityTaskWoken As mentioned above, calling this function + * will result in a message being sent to the timer daemon task. If the + * priority of the timer daemon task is higher than the priority of the + * currently running task (the task the interrupt interrupted) then + * *pxHigherPriorityTaskWoken will be set to pdTRUE by + * xEventGroupSetBitsFromISR(), indicating that a context switch should be + * requested before the interrupt exits. For that reason + * *pxHigherPriorityTaskWoken must be initialised to pdFALSE. See the + * example code below. + * + * @return If the request to execute the function was posted successfully then + * pdPASS is returned, otherwise pdFALSE is returned. pdFALSE will be returned + * if the timer service queue was full. + * + * Example usage: + * 
+ #define BIT_0 ( 1 << 0 )
+ #define BIT_4 ( 1 << 4 )
+ *
+ * // An event group which it is assumed has already been created by a call to
+ * // xEventGroupCreate().
+ * EventGroupHandle_t xEventGroup;
+ *
+ * void anInterruptHandler( void )
+ * {
+ * BaseType_t xHigherPriorityTaskWoken, xResult;
+ *
+ *      // xHigherPriorityTaskWoken must be initialised to pdFALSE.
+ *      xHigherPriorityTaskWoken = pdFALSE;
+ *
+ *      // Set bit 0 and bit 4 in xEventGroup.
+ *      xResult = xEventGroupSetBitsFromISR(
+ *                          xEventGroup,    // The event group being updated.
+ *                          BIT_0 | BIT_4   // The bits being set.
+ *                          &xHigherPriorityTaskWoken );
+ *
+ *      // Was the message posted successfully?
+ *      if( xResult == pdPASS )
+ *      {
+ *          // If xHigherPriorityTaskWoken is now set to pdTRUE then a context
+ *          // switch should be requested.  The macro used is port specific and
+ *          // will be either portYIELD_FROM_ISR() or portEND_SWITCHING_ISR() -
+ *          // refer to the documentation page for the port being used.
+ *          portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
+ *      }
+ * }
+ *
+ * \defgroup xEventGroupSetBitsFromISR xEventGroupSetBitsFromISR + * \ingroup EventGroup + */ +#if ( configUSE_TRACE_FACILITY == 1 ) + BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, + BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; +#else + #define xEventGroupSetBitsFromISR( xEventGroup, uxBitsToSet, pxHigherPriorityTaskWoken ) \ + xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken ) +#endif + +/** + * event_groups.h + * 
+ *  EventBits_t xEventGroupSync(    EventGroupHandle_t xEventGroup,
+ *                                  const EventBits_t uxBitsToSet,
+ *                                  const EventBits_t uxBitsToWaitFor,
+ *                                  TickType_t xTicksToWait );
+ *
+ * + * Atomically set bits within an event group, then wait for a combination of + * bits to be set within the same event group. This functionality is typically + * used to synchronise multiple tasks, where each task has to wait for the other + * tasks to reach a synchronisation point before proceeding. + * + * This function cannot be used from an interrupt. + * + * The function will return before its block time expires if the bits specified + * by the uxBitsToWait parameter are set, or become set within that time. In + * this case all the bits specified by uxBitsToWait will be automatically + * cleared before the function returns. + * + * @param xEventGroup The event group in which the bits are being tested. The + * event group must have previously been created using a call to + * xEventGroupCreate(). + * + * @param uxBitsToSet The bits to set in the event group before determining + * if, and possibly waiting for, all the bits specified by the uxBitsToWait + * parameter are set. + * + * @param uxBitsToWaitFor A bitwise value that indicates the bit or bits to test + * inside the event group. For example, to wait for bit 0 and bit 2 set + * uxBitsToWaitFor to 0x05. To wait for bits 0 and bit 1 and bit 2 set + * uxBitsToWaitFor to 0x07. Etc. + * + * @param xTicksToWait The maximum amount of time (specified in 'ticks') to wait + * for all of the bits specified by uxBitsToWaitFor to become set. + * + * @return The value of the event group at the time either the bits being waited + * for became set, or the block time expired. Test the return value to know + * which bits were set. If xEventGroupSync() returned because its timeout + * expired then not all the bits being waited for will be set. If + * xEventGroupSync() returned because all the bits it was waiting for were + * set then the returned value is the event group value before any bits were + * automatically cleared. + * + * Example usage: + * 
+ * // Bits used by the three tasks.
+ #define TASK_0_BIT     ( 1 << 0 )
+ #define TASK_1_BIT     ( 1 << 1 )
+ #define TASK_2_BIT     ( 1 << 2 )
+ *
+ #define ALL_SYNC_BITS ( TASK_0_BIT | TASK_1_BIT | TASK_2_BIT )
+ *
+ * // Use an event group to synchronise three tasks.  It is assumed this event
+ * // group has already been created elsewhere.
+ * EventGroupHandle_t xEventBits;
+ *
+ * void vTask0( void *pvParameters )
+ * {
+ * EventBits_t uxReturn;
+ * TickType_t xTicksToWait = 100 / portTICK_PERIOD_MS;
+ *
+ *   for( ;; )
+ *   {
+ *      // Perform task functionality here.
+ *
+ *      // Set bit 0 in the event flag to note this task has reached the
+ *      // sync point.  The other two tasks will set the other two bits defined
+ *      // by ALL_SYNC_BITS.  All three tasks have reached the synchronisation
+ *      // point when all the ALL_SYNC_BITS are set.  Wait a maximum of 100ms
+ *      // for this to happen.
+ *      uxReturn = xEventGroupSync( xEventBits, TASK_0_BIT, ALL_SYNC_BITS, xTicksToWait );
+ *
+ *      if( ( uxReturn & ALL_SYNC_BITS ) == ALL_SYNC_BITS )
+ *      {
+ *          // All three tasks reached the synchronisation point before the call
+ *          // to xEventGroupSync() timed out.
+ *      }
+ *  }
+ * }
+ *
+ * void vTask1( void *pvParameters )
+ * {
+ *   for( ;; )
+ *   {
+ *      // Perform task functionality here.
+ *
+ *      // Set bit 1 in the event flag to note this task has reached the
+ *      // synchronisation point.  The other two tasks will set the other two
+ *      // bits defined by ALL_SYNC_BITS.  All three tasks have reached the
+ *      // synchronisation point when all the ALL_SYNC_BITS are set.  Wait
+ *      // indefinitely for this to happen.
+ *      xEventGroupSync( xEventBits, TASK_1_BIT, ALL_SYNC_BITS, portMAX_DELAY );
+ *
+ *      // xEventGroupSync() was called with an indefinite block time, so
+ *      // this task will only reach here if the synchronisation was made by all
+ *      // three tasks, so there is no need to test the return value.
+ *   }
+ * }
+ *
+ * void vTask2( void *pvParameters )
+ * {
+ *   for( ;; )
+ *   {
+ *      // Perform task functionality here.
+ *
+ *      // Set bit 2 in the event flag to note this task has reached the
+ *      // synchronisation point.  The other two tasks will set the other two
+ *      // bits defined by ALL_SYNC_BITS.  All three tasks have reached the
+ *      // synchronisation point when all the ALL_SYNC_BITS are set.  Wait
+ *      // indefinitely for this to happen.
+ *      xEventGroupSync( xEventBits, TASK_2_BIT, ALL_SYNC_BITS, portMAX_DELAY );
+ *
+ *      // xEventGroupSync() was called with an indefinite block time, so
+ *      // this task will only reach here if the synchronisation was made by all
+ *      // three tasks, so there is no need to test the return value.
+ *  }
+ * }
+ *
+ *
+ * \defgroup xEventGroupSync xEventGroupSync + * \ingroup EventGroup + */ +EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, + const EventBits_t uxBitsToWaitFor, + TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + + +/** + * event_groups.h + * 
+ *  EventBits_t xEventGroupGetBits( EventGroupHandle_t xEventGroup );
+ *
+ * + * Returns the current value of the bits in an event group. This function + * cannot be used from an interrupt. + * + * @param xEventGroup The event group being queried. + * + * @return The event group bits at the time xEventGroupGetBits() was called. + * + * \defgroup xEventGroupGetBits xEventGroupGetBits + * \ingroup EventGroup + */ +#define xEventGroupGetBits( xEventGroup ) xEventGroupClearBits( xEventGroup, 0 ) + +/** + * event_groups.h + * 
+ *  EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup );
+ *
+ * + * A version of xEventGroupGetBits() that can be called from an ISR. + * + * @param xEventGroup The event group being queried. + * + * @return The event group bits at the time xEventGroupGetBitsFromISR() was called. + * + * \defgroup xEventGroupGetBitsFromISR xEventGroupGetBitsFromISR + * \ingroup EventGroup + */ +EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION; + +/** + * event_groups.h + * 
+ *  void xEventGroupDelete( EventGroupHandle_t xEventGroup );
+ *
+ * + * Delete an event group that was previously created by a call to + * xEventGroupCreate(). Tasks that are blocked on the event group will be + * unblocked and obtain 0 as the event group's value. + * + * @param xEventGroup The event group being deleted. + */ +void vEventGroupDelete( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION; + +/* For internal use only. */ +void vEventGroupSetBitsCallback( void * pvEventGroup, + const uint32_t ulBitsToSet ) PRIVILEGED_FUNCTION; +void vEventGroupClearBitsCallback( void * pvEventGroup, + const uint32_t ulBitsToClear ) PRIVILEGED_FUNCTION; + + +#if ( configUSE_TRACE_FACILITY == 1 ) + UBaseType_t uxEventGroupGetNumber( void * xEventGroup ) PRIVILEGED_FUNCTION; + void vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) PRIVILEGED_FUNCTION; +#endif + +/* *INDENT-OFF* */ +#ifdef __cplusplus + } +#endif +/* *INDENT-ON* */ + +#endif /* EVENT_GROUPS_H */ diff --git a/include/list.h b/include/list.h index 0598a935f..e2a00750c 100644 --- a/include/list.h +++ b/include/list.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.3.1 + * FreeRTOS Kernel V10.4.1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /* @@ -53,13 +52,14 @@ * \ingroup FreeRTOSIntro */ -#ifndef INC_FREERTOS_H - #error FreeRTOS.h must be included before list.h -#endif #ifndef LIST_H #define LIST_H +#ifndef INC_FREERTOS_H + #error "FreeRTOS.h must be included before list.h" +#endif + /* * The list structure members are modified from within interrupts, and therefore * by rights should be declared volatile. However, they are only modified in a @@ -89,47 +89,49 @@ * "#define configLIST_VOLATILE volatile" */ #ifndef configLIST_VOLATILE - #define configLIST_VOLATILE + #define configLIST_VOLATILE #endif /* configSUPPORT_CROSS_MODULE_OPTIMISATION */ +/* *INDENT-OFF* */ #ifdef __cplusplus -extern "C" { + extern "C" { #endif +/* *INDENT-ON* */ /* Macros that can be used to place known values within the list structures, -then check that the known values do not get corrupted during the execution of -the application. These may catch the list data structures being overwritten in -memory. They will not catch data errors caused by incorrect configuration or -use of FreeRTOS.*/ -#if( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 0 ) - /* Define the macros to do nothing. */ - #define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE - #define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE - #define listFIRST_LIST_INTEGRITY_CHECK_VALUE - #define listSECOND_LIST_INTEGRITY_CHECK_VALUE - #define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) - #define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) - #define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ) - #define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ) - #define listTEST_LIST_ITEM_INTEGRITY( pxItem ) - #define listTEST_LIST_INTEGRITY( pxList ) -#else - /* Define macros that add new members into the list structures. */ - #define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE TickType_t xListItemIntegrityValue1; - #define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE TickType_t xListItemIntegrityValue2; - #define listFIRST_LIST_INTEGRITY_CHECK_VALUE TickType_t xListIntegrityValue1; - #define listSECOND_LIST_INTEGRITY_CHECK_VALUE TickType_t xListIntegrityValue2; + * then check that the known values do not get corrupted during the execution of + * the application. These may catch the list data structures being overwritten in + * memory. They will not catch data errors caused by incorrect configuration or + * use of FreeRTOS.*/ +#if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 0 ) + /* Define the macros to do nothing. */ + #define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE + #define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE + #define listFIRST_LIST_INTEGRITY_CHECK_VALUE + #define listSECOND_LIST_INTEGRITY_CHECK_VALUE + #define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) + #define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) + #define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ) + #define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ) + #define listTEST_LIST_ITEM_INTEGRITY( pxItem ) + #define listTEST_LIST_INTEGRITY( pxList ) +#else /* if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 0 ) */ + /* Define macros that add new members into the list structures. */ + #define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE TickType_t xListItemIntegrityValue1; + #define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE TickType_t xListItemIntegrityValue2; + #define listFIRST_LIST_INTEGRITY_CHECK_VALUE TickType_t xListIntegrityValue1; + #define listSECOND_LIST_INTEGRITY_CHECK_VALUE TickType_t xListIntegrityValue2; - /* Define macros that set the new structure members to known values. */ - #define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrityValue1 = pdINTEGRITY_CHECK_VALUE - #define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrityValue2 = pdINTEGRITY_CHECK_VALUE - #define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ) ( pxList )->xListIntegrityValue1 = pdINTEGRITY_CHECK_VALUE - #define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ) ( pxList )->xListIntegrityValue2 = pdINTEGRITY_CHECK_VALUE +/* Define macros that set the new structure members to known values. */ + #define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrityValue1 = pdINTEGRITY_CHECK_VALUE + #define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrityValue2 = pdINTEGRITY_CHECK_VALUE + #define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ) ( pxList )->xListIntegrityValue1 = pdINTEGRITY_CHECK_VALUE + #define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ) ( pxList )->xListIntegrityValue2 = pdINTEGRITY_CHECK_VALUE - /* Define macros that will assert if one of the structure members does not - contain its expected value. */ - #define listTEST_LIST_ITEM_INTEGRITY( pxItem ) configASSERT( ( ( pxItem )->xListItemIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxItem )->xListItemIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) ) - #define listTEST_LIST_INTEGRITY( pxList ) configASSERT( ( ( pxList )->xListIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxList )->xListIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) ) +/* Define macros that will assert if one of the structure members does not + * contain its expected value. */ + #define listTEST_LIST_ITEM_INTEGRITY( pxItem ) configASSERT( ( ( pxItem )->xListItemIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxItem )->xListItemIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) ) + #define listTEST_LIST_INTEGRITY( pxList ) configASSERT( ( ( pxList )->xListIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxList )->xListIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) ) #endif /* configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES */ @@ -139,22 +141,22 @@ use of FreeRTOS.*/ struct xLIST; struct xLIST_ITEM { - listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ - configLIST_VOLATILE TickType_t xItemValue; /*< The value being listed. In most cases this is used to sort the list in descending order. */ - struct xLIST_ITEM * configLIST_VOLATILE pxNext; /*< Pointer to the next ListItem_t in the list. */ - struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; /*< Pointer to the previous ListItem_t in the list. */ - void * pvOwner; /*< Pointer to the object (normally a TCB) that contains the list item. There is therefore a two way link between the object containing the list item and the list item itself. */ - struct xLIST * configLIST_VOLATILE pxContainer; /*< Pointer to the list in which this list item is placed (if any). */ - listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ + listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ + configLIST_VOLATILE TickType_t xItemValue; /*< The value being listed. In most cases this is used to sort the list in descending order. */ + struct xLIST_ITEM * configLIST_VOLATILE pxNext; /*< Pointer to the next ListItem_t in the list. */ + struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; /*< Pointer to the previous ListItem_t in the list. */ + void * pvOwner; /*< Pointer to the object (normally a TCB) that contains the list item. There is therefore a two way link between the object containing the list item and the list item itself. */ + struct xLIST * configLIST_VOLATILE pxContainer; /*< Pointer to the list in which this list item is placed (if any). */ + listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ }; -typedef struct xLIST_ITEM ListItem_t; /* For some reason lint wants this as two separate definitions. */ +typedef struct xLIST_ITEM ListItem_t; /* For some reason lint wants this as two separate definitions. */ struct xMINI_LIST_ITEM { - listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ - configLIST_VOLATILE TickType_t xItemValue; - struct xLIST_ITEM * configLIST_VOLATILE pxNext; - struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; + listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ + configLIST_VOLATILE TickType_t xItemValue; + struct xLIST_ITEM * configLIST_VOLATILE pxNext; + struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; }; typedef struct xMINI_LIST_ITEM MiniListItem_t; @@ -163,11 +165,11 @@ typedef struct xMINI_LIST_ITEM MiniListItem_t; */ typedef struct xLIST { - listFIRST_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ - volatile UBaseType_t uxNumberOfItems; - ListItem_t * configLIST_VOLATILE pxIndex; /*< Used to walk through the list. Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */ - MiniListItem_t xListEnd; /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */ - listSECOND_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ + listFIRST_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ + volatile UBaseType_t uxNumberOfItems; + ListItem_t * configLIST_VOLATILE pxIndex; /*< Used to walk through the list. Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */ + MiniListItem_t xListEnd; /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */ + listSECOND_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ } List_t; /* @@ -177,7 +179,7 @@ typedef struct xLIST * \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER * \ingroup LinkedList */ -#define listSET_LIST_ITEM_OWNER( pxListItem, pxOwner ) ( ( pxListItem )->pvOwner = ( void * ) ( pxOwner ) ) +#define listSET_LIST_ITEM_OWNER( pxListItem, pxOwner ) ( ( pxListItem )->pvOwner = ( void * ) ( pxOwner ) ) /* * Access macro to get the owner of a list item. The owner of a list item @@ -186,7 +188,7 @@ typedef struct xLIST * \page listGET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER * \ingroup LinkedList */ -#define listGET_LIST_ITEM_OWNER( pxListItem ) ( ( pxListItem )->pvOwner ) +#define listGET_LIST_ITEM_OWNER( pxListItem ) ( ( pxListItem )->pvOwner ) /* * Access macro to set the value of the list item. In most cases the value is @@ -195,7 +197,7 @@ typedef struct xLIST * \page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE * \ingroup LinkedList */ -#define listSET_LIST_ITEM_VALUE( pxListItem, xValue ) ( ( pxListItem )->xItemValue = ( xValue ) ) +#define listSET_LIST_ITEM_VALUE( pxListItem, xValue ) ( ( pxListItem )->xItemValue = ( xValue ) ) /* * Access macro to retrieve the value of the list item. The value can @@ -205,7 +207,7 @@ typedef struct xLIST * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE * \ingroup LinkedList */ -#define listGET_LIST_ITEM_VALUE( pxListItem ) ( ( pxListItem )->xItemValue ) +#define listGET_LIST_ITEM_VALUE( pxListItem ) ( ( pxListItem )->xItemValue ) /* * Access macro to retrieve the value of the list item at the head of a given @@ -214,7 +216,7 @@ typedef struct xLIST * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE * \ingroup LinkedList */ -#define listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext->xItemValue ) +#define listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext->xItemValue ) /* * Return the list item at the head of the list. @@ -222,7 +224,7 @@ typedef struct xLIST * \page listGET_HEAD_ENTRY listGET_HEAD_ENTRY * \ingroup LinkedList */ -#define listGET_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext ) +#define listGET_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext ) /* * Return the next list item. @@ -230,7 +232,7 @@ typedef struct xLIST * \page listGET_NEXT listGET_NEXT * \ingroup LinkedList */ -#define listGET_NEXT( pxListItem ) ( ( pxListItem )->pxNext ) +#define listGET_NEXT( pxListItem ) ( ( pxListItem )->pxNext ) /* * Return the list item that marks the end of the list @@ -238,7 +240,7 @@ typedef struct xLIST * \page listGET_END_MARKER listGET_END_MARKER * \ingroup LinkedList */ -#define listGET_END_MARKER( pxList ) ( ( ListItem_t const * ) ( &( ( pxList )->xListEnd ) ) ) +#define listGET_END_MARKER( pxList ) ( ( ListItem_t const * ) ( &( ( pxList )->xListEnd ) ) ) /* * Access macro to determine if a list contains any items. The macro will @@ -247,12 +249,12 @@ typedef struct xLIST * \page listLIST_IS_EMPTY listLIST_IS_EMPTY * \ingroup LinkedList */ -#define listLIST_IS_EMPTY( pxList ) ( ( ( pxList )->uxNumberOfItems == ( UBaseType_t ) 0 ) ? pdTRUE : pdFALSE ) +#define listLIST_IS_EMPTY( pxList ) ( ( ( pxList )->uxNumberOfItems == ( UBaseType_t ) 0 ) ? pdTRUE : pdFALSE ) /* * Access macro to return the number of items in the list. */ -#define listCURRENT_LIST_LENGTH( pxList ) ( ( pxList )->uxNumberOfItems ) +#define listCURRENT_LIST_LENGTH( pxList ) ( ( pxList )->uxNumberOfItems ) /* * Access function to obtain the owner of the next entry in a list. @@ -274,18 +276,18 @@ typedef struct xLIST * \page listGET_OWNER_OF_NEXT_ENTRY listGET_OWNER_OF_NEXT_ENTRY * \ingroup LinkedList */ -#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList ) \ -{ \ -List_t * const pxConstList = ( pxList ); \ - /* Increment the index to the next item and return the item, ensuring */ \ - /* we don't return the marker used at the end of the list. */ \ - ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \ - if( ( void * ) ( pxConstList )->pxIndex == ( void * ) &( ( pxConstList )->xListEnd ) ) \ - { \ - ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \ - } \ - ( pxTCB ) = ( pxConstList )->pxIndex->pvOwner; \ -} +#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList ) \ + { \ + List_t * const pxConstList = ( pxList ); \ + /* Increment the index to the next item and return the item, ensuring */ \ + /* we don't return the marker used at the end of the list. */ \ + ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \ + if( ( void * ) ( pxConstList )->pxIndex == ( void * ) &( ( pxConstList )->xListEnd ) ) \ + { \ + ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \ + } \ + ( pxTCB ) = ( pxConstList )->pxIndex->pvOwner; \ + } /* @@ -304,7 +306,7 @@ List_t * const pxConstList = ( pxList ); \ * \page listGET_OWNER_OF_HEAD_ENTRY listGET_OWNER_OF_HEAD_ENTRY * \ingroup LinkedList */ -#define listGET_OWNER_OF_HEAD_ENTRY( pxList ) ( (&( ( pxList )->xListEnd ))->pxNext->pvOwner ) +#define listGET_OWNER_OF_HEAD_ENTRY( pxList ) ( ( &( ( pxList )->xListEnd ) )->pxNext->pvOwner ) /* * Check to see if a list item is within a list. The list item maintains a @@ -315,7 +317,7 @@ List_t * const pxConstList = ( pxList ); \ * @param pxListItem The list item we want to know if is in the list. * @return pdTRUE if the list item is in the list, otherwise pdFALSE. */ -#define listIS_CONTAINED_WITHIN( pxList, pxListItem ) ( ( ( pxListItem )->pxContainer == ( pxList ) ) ? ( pdTRUE ) : ( pdFALSE ) ) +#define listIS_CONTAINED_WITHIN( pxList, pxListItem ) ( ( ( pxListItem )->pxContainer == ( pxList ) ) ? ( pdTRUE ) : ( pdFALSE ) ) /* * Return the list a list item is contained within (referenced from). @@ -323,14 +325,14 @@ List_t * const pxConstList = ( pxList ); \ * @param pxListItem The list item being queried. * @return A pointer to the List_t object that references the pxListItem */ -#define listLIST_ITEM_CONTAINER( pxListItem ) ( ( pxListItem )->pxContainer ) +#define listLIST_ITEM_CONTAINER( pxListItem ) ( ( pxListItem )->pxContainer ) /* * This provides a crude means of knowing if a list has been initialised, as * pxList->xListEnd.xItemValue is set to portMAX_DELAY by the vListInitialise() * function. */ -#define listLIST_IS_INITIALISED( pxList ) ( ( pxList )->xListEnd.xItemValue == portMAX_DELAY ) +#define listLIST_IS_INITIALISED( pxList ) ( ( pxList )->xListEnd.xItemValue == portMAX_DELAY ) /* * Must be called before a list is used! This initialises all the members @@ -366,7 +368,8 @@ void vListInitialiseItem( ListItem_t * const pxItem ) PRIVILEGED_FUNCTION; * \page vListInsert vListInsert * \ingroup LinkedList */ -void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION; +void vListInsert( List_t * const pxList, + ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION; /* * Insert a list item into a list. The item will be inserted in a position @@ -387,7 +390,8 @@ void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem ) PRIV * \page vListInsertEnd vListInsertEnd * \ingroup LinkedList */ -void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION; +void vListInsertEnd( List_t * const pxList, + ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION; /* * Remove an item from a list. The list item has a pointer to the list that @@ -404,9 +408,10 @@ void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem ) P */ UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove ) PRIVILEGED_FUNCTION; +/* *INDENT-OFF* */ #ifdef __cplusplus -} -#endif - + } #endif +/* *INDENT-ON* */ +#endif /* ifndef LIST_H */ diff --git a/include/message_buffer.h b/include/message_buffer.h index b20c09e81..0fc36702b 100644 --- a/include/message_buffer.h +++ b/include/message_buffer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.3.1 + * FreeRTOS Kernel V10.4.1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ @@ -63,15 +62,17 @@ #define FREERTOS_MESSAGE_BUFFER_H #ifndef INC_FREERTOS_H - #error "include FreeRTOS.h must appear in source files before include message_buffer.h" + #error "include FreeRTOS.h must appear in source files before include message_buffer.h" #endif /* Message buffers are built onto of stream buffers. */ #include "stream_buffer.h" +/* *INDENT-OFF* */ #if defined( __cplusplus ) -extern "C" { + extern "C" { #endif +/* *INDENT-ON* */ /** * Type by which message buffers are referenced. For example, a call to @@ -86,9 +87,9 @@ typedef void * MessageBufferHandle_t; /** * message_buffer.h * -
-MessageBufferHandle_t xMessageBufferCreate( size_t xBufferSizeBytes );
-
+ * 
+ * MessageBufferHandle_t xMessageBufferCreate( size_t xBufferSizeBytes );
+ *
* * Creates a new message buffer using dynamically allocated memory. See * xMessageBufferCreateStatic() for a version that uses statically allocated @@ -112,43 +113,44 @@ MessageBufferHandle_t xMessageBufferCreate( size_t xBufferSizeBytes ); * buffer. * * Example use: -
-
-void vAFunction( void )
-{
-MessageBufferHandle_t xMessageBuffer;
-const size_t xMessageBufferSizeBytes = 100;
-
-    // Create a message buffer that can hold 100 bytes.  The memory used to hold
-    // both the message buffer structure and the messages themselves is allocated
-    // dynamically.  Each message added to the buffer consumes an additional 4
-    // bytes which are used to hold the lengh of the message.
-    xMessageBuffer = xMessageBufferCreate( xMessageBufferSizeBytes );
-
-    if( xMessageBuffer == NULL )
-    {
-        // There was not enough heap memory space available to create the
-        // message buffer.
-    }
-    else
-    {
-        // The message buffer was created successfully and can now be used.
-    }
-
-
+ * 
+ *
+ * void vAFunction( void )
+ * {
+ * MessageBufferHandle_t xMessageBuffer;
+ * const size_t xMessageBufferSizeBytes = 100;
+ *
+ *  // Create a message buffer that can hold 100 bytes.  The memory used to hold
+ *  // both the message buffer structure and the messages themselves is allocated
+ *  // dynamically.  Each message added to the buffer consumes an additional 4
+ *  // bytes which are used to hold the lengh of the message.
+ *  xMessageBuffer = xMessageBufferCreate( xMessageBufferSizeBytes );
+ *
+ *  if( xMessageBuffer == NULL )
+ *  {
+ *      // There was not enough heap memory space available to create the
+ *      // message buffer.
+ *  }
+ *  else
+ *  {
+ *      // The message buffer was created successfully and can now be used.
+ *  }
+ *
+ *
* \defgroup xMessageBufferCreate xMessageBufferCreate * \ingroup MessageBufferManagement */ -#define xMessageBufferCreate( xBufferSizeBytes ) ( MessageBufferHandle_t ) xStreamBufferGenericCreate( xBufferSizeBytes, ( size_t ) 0, pdTRUE ) +#define xMessageBufferCreate( xBufferSizeBytes ) \ + ( MessageBufferHandle_t ) xStreamBufferGenericCreate( xBufferSizeBytes, ( size_t ) 0, pdTRUE ) /** * message_buffer.h * -
-MessageBufferHandle_t xMessageBufferCreateStatic( size_t xBufferSizeBytes,
-                                                  uint8_t *pucMessageBufferStorageArea,
-                                                  StaticMessageBuffer_t *pxStaticMessageBuffer );
-
+ * 
+ * MessageBufferHandle_t xMessageBufferCreateStatic( size_t xBufferSizeBytes,
+ *                                                uint8_t *pucMessageBufferStorageArea,
+ *                                                StaticMessageBuffer_t *pxStaticMessageBuffer );
+ *
* Creates a new message buffer using statically allocated memory. See * xMessageBufferCreate() for a version that uses dynamically allocated memory. * @@ -173,49 +175,50 @@ MessageBufferHandle_t xMessageBufferCreateStatic( size_t xBufferSizeBytes, * pxStaticmessageBuffer are NULL then NULL is returned. * * Example use: -
-
-// Used to dimension the array used to hold the messages.  The available space
-// will actually be one less than this, so 999.
-#define STORAGE_SIZE_BYTES 1000
-
-// Defines the memory that will actually hold the messages within the message
-// buffer.
-static uint8_t ucStorageBuffer[ STORAGE_SIZE_BYTES ];
-
-// The variable used to hold the message buffer structure.
-StaticMessageBuffer_t xMessageBufferStruct;
-
-void MyFunction( void )
-{
-MessageBufferHandle_t xMessageBuffer;
-
-    xMessageBuffer = xMessageBufferCreateStatic( sizeof( ucBufferStorage ),
-                                                 ucBufferStorage,
-                                                 &xMessageBufferStruct );
-
-    // As neither the pucMessageBufferStorageArea or pxStaticMessageBuffer
-    // parameters were NULL, xMessageBuffer will not be NULL, and can be used to
-    // reference the created message buffer in other message buffer API calls.
-
-    // Other code that uses the message buffer can go here.
-}
-
-
+ * 
+ *
+ * // Used to dimension the array used to hold the messages.  The available space
+ * // will actually be one less than this, so 999.
+ #define STORAGE_SIZE_BYTES 1000
+ *
+ * // Defines the memory that will actually hold the messages within the message
+ * // buffer.
+ * static uint8_t ucStorageBuffer[ STORAGE_SIZE_BYTES ];
+ *
+ * // The variable used to hold the message buffer structure.
+ * StaticMessageBuffer_t xMessageBufferStruct;
+ *
+ * void MyFunction( void )
+ * {
+ * MessageBufferHandle_t xMessageBuffer;
+ *
+ *  xMessageBuffer = xMessageBufferCreateStatic( sizeof( ucBufferStorage ),
+ *                                               ucBufferStorage,
+ *                                               &xMessageBufferStruct );
+ *
+ *  // As neither the pucMessageBufferStorageArea or pxStaticMessageBuffer
+ *  // parameters were NULL, xMessageBuffer will not be NULL, and can be used to
+ *  // reference the created message buffer in other message buffer API calls.
+ *
+ *  // Other code that uses the message buffer can go here.
+ * }
+ *
+ *
* \defgroup xMessageBufferCreateStatic xMessageBufferCreateStatic * \ingroup MessageBufferManagement */ -#define xMessageBufferCreateStatic( xBufferSizeBytes, pucMessageBufferStorageArea, pxStaticMessageBuffer ) ( MessageBufferHandle_t ) xStreamBufferGenericCreateStatic( xBufferSizeBytes, 0, pdTRUE, pucMessageBufferStorageArea, pxStaticMessageBuffer ) +#define xMessageBufferCreateStatic( xBufferSizeBytes, pucMessageBufferStorageArea, pxStaticMessageBuffer ) \ + ( MessageBufferHandle_t ) xStreamBufferGenericCreateStatic( xBufferSizeBytes, 0, pdTRUE, pucMessageBufferStorageArea, pxStaticMessageBuffer ) /** * message_buffer.h * -
-size_t xMessageBufferSend( MessageBufferHandle_t xMessageBuffer,
-                           const void *pvTxData,
-                           size_t xDataLengthBytes,
-                           TickType_t xTicksToWait );
-
+ * 
+ * size_t xMessageBufferSend( MessageBufferHandle_t xMessageBuffer,
+ *                         const void *pvTxData,
+ *                         size_t xDataLengthBytes,
+ *                         TickType_t xTicksToWait );
+ * 

  *
  * Sends a discrete message to the message buffer.  The message can be any
  * length that fits within the buffer's free space, and is copied into the
@@ -272,49 +275,50 @@ size_t xMessageBufferSend( MessageBufferHandle_t xMessageBuffer,
  * time out then xDataLengthBytes is returned.
  *
  * Example use:
-
-void vAFunction( MessageBufferHandle_t xMessageBuffer )
-{
-size_t xBytesSent;
-uint8_t ucArrayToSend[] = { 0, 1, 2, 3 };
-char *pcStringToSend = "String to send";
-const TickType_t x100ms = pdMS_TO_TICKS( 100 );
-
-    // Send an array to the message buffer, blocking for a maximum of 100ms to
-    // wait for enough space to be available in the message buffer.
-    xBytesSent = xMessageBufferSend( xMessageBuffer, ( void * ) ucArrayToSend, sizeof( ucArrayToSend ), x100ms );
-
-    if( xBytesSent != sizeof( ucArrayToSend ) )
-    {
-        // The call to xMessageBufferSend() times out before there was enough
-        // space in the buffer for the data to be written.
-    }
-
-    // Send the string to the message buffer.  Return immediately if there is
-    // not enough space in the buffer.
-    xBytesSent = xMessageBufferSend( xMessageBuffer, ( void * ) pcStringToSend, strlen( pcStringToSend ), 0 );
-
-    if( xBytesSent != strlen( pcStringToSend ) )
-    {
-        // The string could not be added to the message buffer because there was
-        // not enough free space in the buffer.
-    }
-}
-

+ * 
+ * void vAFunction( MessageBufferHandle_t xMessageBuffer )
+ * {
+ * size_t xBytesSent;
+ * uint8_t ucArrayToSend[] = { 0, 1, 2, 3 };
+ * char *pcStringToSend = "String to send";
+ * const TickType_t x100ms = pdMS_TO_TICKS( 100 );
+ *
+ *  // Send an array to the message buffer, blocking for a maximum of 100ms to
+ *  // wait for enough space to be available in the message buffer.
+ *  xBytesSent = xMessageBufferSend( xMessageBuffer, ( void * ) ucArrayToSend, sizeof( ucArrayToSend ), x100ms );
+ *
+ *  if( xBytesSent != sizeof( ucArrayToSend ) )
+ *  {
+ *      // The call to xMessageBufferSend() times out before there was enough
+ *      // space in the buffer for the data to be written.
+ *  }
+ *
+ *  // Send the string to the message buffer.  Return immediately if there is
+ *  // not enough space in the buffer.
+ *  xBytesSent = xMessageBufferSend( xMessageBuffer, ( void * ) pcStringToSend, strlen( pcStringToSend ), 0 );
+ *
+ *  if( xBytesSent != strlen( pcStringToSend ) )
+ *  {
+ *      // The string could not be added to the message buffer because there was
+ *      // not enough free space in the buffer.
+ *  }
+ * }
+ * 

  * \defgroup xMessageBufferSend xMessageBufferSend
  * \ingroup MessageBufferManagement
  */
-#define xMessageBufferSend( xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait ) xStreamBufferSend( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait )
+#define xMessageBufferSend( xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait ) \
+    xStreamBufferSend( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait )
 
 /**
  * message_buffer.h
  *
-
-size_t xMessageBufferSendFromISR( MessageBufferHandle_t xMessageBuffer,
-                                  const void *pvTxData,
-                                  size_t xDataLengthBytes,
-                                  BaseType_t *pxHigherPriorityTaskWoken );
-
+ * 
+ * size_t xMessageBufferSendFromISR( MessageBufferHandle_t xMessageBuffer,
+ *                                const void *pvTxData,
+ *                                size_t xDataLengthBytes,
+ *                                BaseType_t *pxHigherPriorityTaskWoken );
+ * 

  *
  * Interrupt safe version of the API function that sends a discrete message to
  * the message buffer.  The message can be any length that fits within the
@@ -372,53 +376,54 @@ size_t xMessageBufferSendFromISR( MessageBufferHandle_t xMessageBuffer,
  * then 0 is returned, otherwise xDataLengthBytes is returned.
  *
  * Example use:
-
-// A message buffer that has already been created.
-MessageBufferHandle_t xMessageBuffer;
-
-void vAnInterruptServiceRoutine( void )
-{
-size_t xBytesSent;
-char *pcStringToSend = "String to send";
-BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE.
-
-    // Attempt to send the string to the message buffer.
-    xBytesSent = xMessageBufferSendFromISR( xMessageBuffer,
-                                            ( void * ) pcStringToSend,
-                                            strlen( pcStringToSend ),
-                                            &xHigherPriorityTaskWoken );
-
-    if( xBytesSent != strlen( pcStringToSend ) )
-    {
-        // The string could not be added to the message buffer because there was
-        // not enough free space in the buffer.
-    }
-
-    // If xHigherPriorityTaskWoken was set to pdTRUE inside
-    // xMessageBufferSendFromISR() then a task that has a priority above the
-    // priority of the currently executing task was unblocked and a context
-    // switch should be performed to ensure the ISR returns to the unblocked
-    // task.  In most FreeRTOS ports this is done by simply passing
-    // xHigherPriorityTaskWoken into portYIELD_FROM_ISR(), which will test the
-    // variables value, and perform the context switch if necessary.  Check the
-    // documentation for the port in use for port specific instructions.
-    portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
-}
-

+ * 
+ * // A message buffer that has already been created.
+ * MessageBufferHandle_t xMessageBuffer;
+ *
+ * void vAnInterruptServiceRoutine( void )
+ * {
+ * size_t xBytesSent;
+ * char *pcStringToSend = "String to send";
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE.
+ *
+ *  // Attempt to send the string to the message buffer.
+ *  xBytesSent = xMessageBufferSendFromISR( xMessageBuffer,
+ *                                          ( void * ) pcStringToSend,
+ *                                          strlen( pcStringToSend ),
+ *                                          &xHigherPriorityTaskWoken );
+ *
+ *  if( xBytesSent != strlen( pcStringToSend ) )
+ *  {
+ *      // The string could not be added to the message buffer because there was
+ *      // not enough free space in the buffer.
+ *  }
+ *
+ *  // If xHigherPriorityTaskWoken was set to pdTRUE inside
+ *  // xMessageBufferSendFromISR() then a task that has a priority above the
+ *  // priority of the currently executing task was unblocked and a context
+ *  // switch should be performed to ensure the ISR returns to the unblocked
+ *  // task.  In most FreeRTOS ports this is done by simply passing
+ *  // xHigherPriorityTaskWoken into portYIELD_FROM_ISR(), which will test the
+ *  // variables value, and perform the context switch if necessary.  Check the
+ *  // documentation for the port in use for port specific instructions.
+ *  portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
+ * }
+ * 

  * \defgroup xMessageBufferSendFromISR xMessageBufferSendFromISR
  * \ingroup MessageBufferManagement
  */
-#define xMessageBufferSendFromISR( xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken ) xStreamBufferSendFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken )
+#define xMessageBufferSendFromISR( xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken ) \
+    xStreamBufferSendFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken )
 
 /**
  * message_buffer.h
  *
-
-size_t xMessageBufferReceive( MessageBufferHandle_t xMessageBuffer,
-                              void *pvRxData,
-                              size_t xBufferLengthBytes,
-                              TickType_t xTicksToWait );
-

+ * 
+ * size_t xMessageBufferReceive( MessageBufferHandle_t xMessageBuffer,
+ *                            void *pvRxData,
+ *                            size_t xBufferLengthBytes,
+ *                            TickType_t xTicksToWait );
+ * 

  *
  * Receives a discrete message from a message buffer.  Messages can be of
  * variable length and are copied out of the buffer.
@@ -471,43 +476,44 @@ size_t xMessageBufferReceive( MessageBufferHandle_t xMessageBuffer,
  * zero is returned.
  *
  * Example use:
-
-void vAFunction( MessageBuffer_t xMessageBuffer )
-{
-uint8_t ucRxData[ 20 ];
-size_t xReceivedBytes;
-const TickType_t xBlockTime = pdMS_TO_TICKS( 20 );
-
-    // Receive the next message from the message buffer.  Wait in the Blocked
-    // state (so not using any CPU processing time) for a maximum of 100ms for
-    // a message to become available.
-    xReceivedBytes = xMessageBufferReceive( xMessageBuffer,
-                                            ( void * ) ucRxData,
-                                            sizeof( ucRxData ),
-                                            xBlockTime );
-
-    if( xReceivedBytes > 0 )
-    {
-        // A ucRxData contains a message that is xReceivedBytes long.  Process
-        // the message here....
-    }
-}
-

+ * 
+ * void vAFunction( MessageBuffer_t xMessageBuffer )
+ * {
+ * uint8_t ucRxData[ 20 ];
+ * size_t xReceivedBytes;
+ * const TickType_t xBlockTime = pdMS_TO_TICKS( 20 );
+ *
+ *  // Receive the next message from the message buffer.  Wait in the Blocked
+ *  // state (so not using any CPU processing time) for a maximum of 100ms for
+ *  // a message to become available.
+ *  xReceivedBytes = xMessageBufferReceive( xMessageBuffer,
+ *                                          ( void * ) ucRxData,
+ *                                          sizeof( ucRxData ),
+ *                                          xBlockTime );
+ *
+ *  if( xReceivedBytes > 0 )
+ *  {
+ *      // A ucRxData contains a message that is xReceivedBytes long.  Process
+ *      // the message here....
+ *  }
+ * }
+ * 

  * \defgroup xMessageBufferReceive xMessageBufferReceive
  * \ingroup MessageBufferManagement
  */
-#define xMessageBufferReceive( xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait ) xStreamBufferReceive( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait )
+#define xMessageBufferReceive( xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait ) \
+    xStreamBufferReceive( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait )
 
 
 /**
  * message_buffer.h
  *
-
-size_t xMessageBufferReceiveFromISR( MessageBufferHandle_t xMessageBuffer,
-                                     void *pvRxData,
-                                     size_t xBufferLengthBytes,
-                                     BaseType_t *pxHigherPriorityTaskWoken );
-

+ * 
+ * size_t xMessageBufferReceiveFromISR( MessageBufferHandle_t xMessageBuffer,
+ *                                   void *pvRxData,
+ *                                   size_t xBufferLengthBytes,
+ *                                   BaseType_t *pxHigherPriorityTaskWoken );
+ * 

  *
  * An interrupt safe version of the API function that receives a discrete
  * message from a message buffer.  Messages can be of variable length and are
@@ -561,50 +567,51 @@ size_t xMessageBufferReceiveFromISR( MessageBufferHandle_t xMessageBuffer,
  * any.
  *
  * Example use:
-
-// A message buffer that has already been created.
-MessageBuffer_t xMessageBuffer;
-
-void vAnInterruptServiceRoutine( void )
-{
-uint8_t ucRxData[ 20 ];
-size_t xReceivedBytes;
-BaseType_t xHigherPriorityTaskWoken = pdFALSE;  // Initialised to pdFALSE.
-
-    // Receive the next message from the message buffer.
-    xReceivedBytes = xMessageBufferReceiveFromISR( xMessageBuffer,
-                                                  ( void * ) ucRxData,
-                                                  sizeof( ucRxData ),
-                                                  &xHigherPriorityTaskWoken );
-
-    if( xReceivedBytes > 0 )
-    {
-        // A ucRxData contains a message that is xReceivedBytes long.  Process
-        // the message here....
-    }
-
-    // If xHigherPriorityTaskWoken was set to pdTRUE inside
-    // xMessageBufferReceiveFromISR() then a task that has a priority above the
-    // priority of the currently executing task was unblocked and a context
-    // switch should be performed to ensure the ISR returns to the unblocked
-    // task.  In most FreeRTOS ports this is done by simply passing
-    // xHigherPriorityTaskWoken into portYIELD_FROM_ISR(), which will test the
-    // variables value, and perform the context switch if necessary.  Check the
-    // documentation for the port in use for port specific instructions.
-    portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
-}
-

+ * 
+ * // A message buffer that has already been created.
+ * MessageBuffer_t xMessageBuffer;
+ *
+ * void vAnInterruptServiceRoutine( void )
+ * {
+ * uint8_t ucRxData[ 20 ];
+ * size_t xReceivedBytes;
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;  // Initialised to pdFALSE.
+ *
+ *  // Receive the next message from the message buffer.
+ *  xReceivedBytes = xMessageBufferReceiveFromISR( xMessageBuffer,
+ *                                                ( void * ) ucRxData,
+ *                                                sizeof( ucRxData ),
+ *                                                &xHigherPriorityTaskWoken );
+ *
+ *  if( xReceivedBytes > 0 )
+ *  {
+ *      // A ucRxData contains a message that is xReceivedBytes long.  Process
+ *      // the message here....
+ *  }
+ *
+ *  // If xHigherPriorityTaskWoken was set to pdTRUE inside
+ *  // xMessageBufferReceiveFromISR() then a task that has a priority above the
+ *  // priority of the currently executing task was unblocked and a context
+ *  // switch should be performed to ensure the ISR returns to the unblocked
+ *  // task.  In most FreeRTOS ports this is done by simply passing
+ *  // xHigherPriorityTaskWoken into portYIELD_FROM_ISR(), which will test the
+ *  // variables value, and perform the context switch if necessary.  Check the
+ *  // documentation for the port in use for port specific instructions.
+ *  portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
+ * }
+ * 

  * \defgroup xMessageBufferReceiveFromISR xMessageBufferReceiveFromISR
  * \ingroup MessageBufferManagement
  */
-#define xMessageBufferReceiveFromISR( xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken ) xStreamBufferReceiveFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken )
+#define xMessageBufferReceiveFromISR( xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken ) \
+    xStreamBufferReceiveFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken )
 
 /**
  * message_buffer.h
  *
-
-void vMessageBufferDelete( MessageBufferHandle_t xMessageBuffer );
-

+ * 
+ * void vMessageBufferDelete( MessageBufferHandle_t xMessageBuffer );
+ * 

  *
  * Deletes a message buffer that was previously created using a call to
  * xMessageBufferCreate() or xMessageBufferCreateStatic().  If the message
@@ -617,13 +624,14 @@ void vMessageBufferDelete( MessageBufferHandle_t xMessageBuffer );
  * @param xMessageBuffer The handle of the message buffer to be deleted.
  *
  */
-#define vMessageBufferDelete( xMessageBuffer ) vStreamBufferDelete( ( StreamBufferHandle_t ) xMessageBuffer )
+#define vMessageBufferDelete( xMessageBuffer ) \
+    vStreamBufferDelete( ( StreamBufferHandle_t ) xMessageBuffer )
 
 /**
  * message_buffer.h
-
-BaseType_t xMessageBufferIsFull( MessageBufferHandle_t xMessageBuffer ) );
-

+ * 
+ * BaseType_t xMessageBufferIsFull( MessageBufferHandle_t xMessageBuffer ) );
+ * 

  *
  * Tests to see if a message buffer is full.  A message buffer is full if it
  * cannot accept any more messages, of any size, until space is made available
@@ -634,13 +642,14 @@ BaseType_t xMessageBufferIsFull( MessageBufferHandle_t xMessageBuffer ) );
  * @return If the message buffer referenced by xMessageBuffer is full then
  * pdTRUE is returned.  Otherwise pdFALSE is returned.
  */
-#define xMessageBufferIsFull( xMessageBuffer ) xStreamBufferIsFull( ( StreamBufferHandle_t ) xMessageBuffer )
+#define xMessageBufferIsFull( xMessageBuffer ) \
+    xStreamBufferIsFull( ( StreamBufferHandle_t ) xMessageBuffer )
 
 /**
  * message_buffer.h
-
-BaseType_t xMessageBufferIsEmpty( MessageBufferHandle_t xMessageBuffer ) );
-

+ * 
+ * BaseType_t xMessageBufferIsEmpty( MessageBufferHandle_t xMessageBuffer ) );
+ * 

  *
  * Tests to see if a message buffer is empty (does not contain any messages).
  *
@@ -650,13 +659,14 @@ BaseType_t xMessageBufferIsEmpty( MessageBufferHandle_t xMessageBuffer ) );
  * pdTRUE is returned.  Otherwise pdFALSE is returned.
  *
  */
-#define xMessageBufferIsEmpty( xMessageBuffer ) xStreamBufferIsEmpty( ( StreamBufferHandle_t ) xMessageBuffer )
+#define xMessageBufferIsEmpty( xMessageBuffer ) \
+    xStreamBufferIsEmpty( ( StreamBufferHandle_t ) xMessageBuffer )
 
 /**
  * message_buffer.h
-
-BaseType_t xMessageBufferReset( MessageBufferHandle_t xMessageBuffer );
-

+ * 
+ * BaseType_t xMessageBufferReset( MessageBufferHandle_t xMessageBuffer );
+ * 

  *
  * Resets a message buffer to its initial empty state, discarding any message it
  * contained.
@@ -673,14 +683,15 @@ BaseType_t xMessageBufferReset( MessageBufferHandle_t xMessageBuffer );
  * \defgroup xMessageBufferReset xMessageBufferReset
  * \ingroup MessageBufferManagement
  */
-#define xMessageBufferReset( xMessageBuffer ) xStreamBufferReset( ( StreamBufferHandle_t ) xMessageBuffer )
+#define xMessageBufferReset( xMessageBuffer ) \
+    xStreamBufferReset( ( StreamBufferHandle_t ) xMessageBuffer )
 
 
 /**
  * message_buffer.h
-
-size_t xMessageBufferSpaceAvailable( MessageBufferHandle_t xMessageBuffer ) );
-

+ * 
+ * size_t xMessageBufferSpaceAvailable( MessageBufferHandle_t xMessageBuffer ) );
+ * 

  * Returns the number of bytes of free space in the message buffer.
  *
  * @param xMessageBuffer The handle of the message buffer being queried.
@@ -695,14 +706,16 @@ size_t xMessageBufferSpaceAvailable( MessageBufferHandle_t xMessageBuffer ) );
  * \defgroup xMessageBufferSpaceAvailable xMessageBufferSpaceAvailable
  * \ingroup MessageBufferManagement
  */
-#define xMessageBufferSpaceAvailable( xMessageBuffer ) xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer )
-#define xMessageBufferSpacesAvailable( xMessageBuffer ) xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer ) /* Corrects typo in original macro name. */
+#define xMessageBufferSpaceAvailable( xMessageBuffer ) \
+    xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer )
+#define xMessageBufferSpacesAvailable( xMessageBuffer ) \
+    xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer ) /* Corrects typo in original macro name. */
 
 /**
  * message_buffer.h
- 
- size_t xMessageBufferNextLengthBytes( MessageBufferHandle_t xMessageBuffer ) );
- 

+ * 
+ * size_t xMessageBufferNextLengthBytes( MessageBufferHandle_t xMessageBuffer ) );
+ * 

  * Returns the length (in bytes) of the next message in a message buffer.
  * Useful if xMessageBufferReceive() returned 0 because the size of the buffer
  * passed into xMessageBufferReceive() was too small to hold the next message.
@@ -715,14 +728,15 @@ size_t xMessageBufferSpaceAvailable( MessageBufferHandle_t xMessageBuffer ) );
  * \defgroup xMessageBufferNextLengthBytes xMessageBufferNextLengthBytes
  * \ingroup MessageBufferManagement
  */
-#define xMessageBufferNextLengthBytes( xMessageBuffer ) xStreamBufferNextMessageLengthBytes( ( StreamBufferHandle_t ) xMessageBuffer ) PRIVILEGED_FUNCTION;
+#define xMessageBufferNextLengthBytes( xMessageBuffer ) \
+    xStreamBufferNextMessageLengthBytes( ( StreamBufferHandle_t ) xMessageBuffer ) PRIVILEGED_FUNCTION;
 
 /**
  * message_buffer.h
  *
-
-BaseType_t xMessageBufferSendCompletedFromISR( MessageBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
-

+ * 
+ * BaseType_t xMessageBufferSendCompletedFromISR( MessageBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
+ * 

  *
  * For advanced users only.
  *
@@ -754,14 +768,15 @@ BaseType_t xMessageBufferSendCompletedFromISR( MessageBufferHandle_t xStreamBuff
  * \defgroup xMessageBufferSendCompletedFromISR xMessageBufferSendCompletedFromISR
  * \ingroup StreamBufferManagement
  */
-#define xMessageBufferSendCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) xStreamBufferSendCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )
+#define xMessageBufferSendCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) \
+    xStreamBufferSendCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )
 
 /**
  * message_buffer.h
  *
-
-BaseType_t xMessageBufferReceiveCompletedFromISR( MessageBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
-

+ * 
+ * BaseType_t xMessageBufferReceiveCompletedFromISR( MessageBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
+ * 

  *
  * For advanced users only.
  *
@@ -794,10 +809,13 @@ BaseType_t xMessageBufferReceiveCompletedFromISR( MessageBufferHandle_t xStreamB
  * \defgroup xMessageBufferReceiveCompletedFromISR xMessageBufferReceiveCompletedFromISR
  * \ingroup StreamBufferManagement
  */
-#define xMessageBufferReceiveCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) xStreamBufferReceiveCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )
+#define xMessageBufferReceiveCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) \
+    xStreamBufferReceiveCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )
 
+/* *INDENT-OFF* */
 #if defined( __cplusplus )
-} /* extern "C" */
+    } /* extern "C" */
 #endif
+/* *INDENT-ON* */
 
-#endif	/* !defined( FREERTOS_MESSAGE_BUFFER_H ) */
+#endif /* !defined( FREERTOS_MESSAGE_BUFFER_H ) */
diff --git a/include/mpu_prototypes.h b/include/mpu_prototypes.h
index 79a185b48..d95dcd8c4 100644
--- a/include/mpu_prototypes.h
+++ b/include/mpu_prototypes.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,10 +19,9 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*
@@ -38,19 +37,38 @@
 #define MPU_PROTOTYPES_H
 
 /* MPU versions of tasks.h API functions. */
-BaseType_t MPU_xTaskCreate( TaskFunction_t pxTaskCode, const char * const pcName, const uint16_t usStackDepth, void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask ) FREERTOS_SYSTEM_CALL;
-TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode, const char * const pcName, const uint32_t ulStackDepth, void * const pvParameters, UBaseType_t uxPriority, StackType_t * const puxStackBuffer, StaticTask_t * const pxTaskBuffer ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) FREERTOS_SYSTEM_CALL;
-void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskCreate( TaskFunction_t pxTaskCode,
+                            const char * const pcName,
+                            const uint16_t usStackDepth,
+                            void * const pvParameters,
+                            UBaseType_t uxPriority,
+                            TaskHandle_t * const pxCreatedTask ) FREERTOS_SYSTEM_CALL;
+TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode,
+                                    const char * const pcName,
+                                    const uint32_t ulStackDepth,
+                                    void * const pvParameters,
+                                    UBaseType_t uxPriority,
+                                    StackType_t * const puxStackBuffer,
+                                    StaticTask_t * const pxTaskBuffer ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition,
+                                      TaskHandle_t * pxCreatedTask ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition,
+                                            TaskHandle_t * pxCreatedTask ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask,
+                                  const MemoryRegion_t * const pxRegions ) FREERTOS_SYSTEM_CALL;
 void MPU_vTaskDelete( TaskHandle_t xTaskToDelete ) FREERTOS_SYSTEM_CALL;
 void MPU_vTaskDelay( const TickType_t xTicksToDelay ) FREERTOS_SYSTEM_CALL;
-void MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, const TickType_t xTimeIncrement ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime,
+                          const TickType_t xTimeIncrement ) FREERTOS_SYSTEM_CALL;
 BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
 UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
 eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
-void MPU_vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState ) FREERTOS_SYSTEM_CALL;
-void MPU_vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskGetInfo( TaskHandle_t xTask,
+                       TaskStatus_t * pxTaskStatus,
+                       BaseType_t xGetFreeStackSpace,
+                       eTaskState eState ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskPrioritySet( TaskHandle_t xTask,
+                           UBaseType_t uxNewPriority ) FREERTOS_SYSTEM_CALL;
 void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) FREERTOS_SYSTEM_CALL;
 void MPU_vTaskResume( TaskHandle_t xTaskToResume ) FREERTOS_SYSTEM_CALL;
 void MPU_vTaskStartScheduler( void ) FREERTOS_SYSTEM_CALL;
@@ -59,90 +77,169 @@ BaseType_t MPU_xTaskResumeAll( void ) FREERTOS_SYSTEM_CALL;
 TickType_t MPU_xTaskGetTickCount( void ) FREERTOS_SYSTEM_CALL;
 UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) FREERTOS_SYSTEM_CALL;
 char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) FREERTOS_SYSTEM_CALL;
-TaskHandle_t MPU_xTaskGetHandle( const char *pcNameToQuery ) FREERTOS_SYSTEM_CALL;
+TaskHandle_t MPU_xTaskGetHandle( const char * pcNameToQuery ) FREERTOS_SYSTEM_CALL;
 UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
 configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
-void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask,
+                                     TaskHookFunction_t pxHookFunction ) FREERTOS_SYSTEM_CALL;
 TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
-void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue ) FREERTOS_SYSTEM_CALL;
-void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet,
+                                            BaseType_t xIndex,
+                                            void * pvValue ) FREERTOS_SYSTEM_CALL;
+void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery,
+                                               BaseType_t xIndex ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask,
+                                             void * pvParameter ) FREERTOS_SYSTEM_CALL;
 TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) FREERTOS_SYSTEM_CALL;
-UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, const UBaseType_t uxArraySize, uint32_t * const pulTotalRunTime ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray,
+                                      const UBaseType_t uxArraySize,
+                                      uint32_t * const pulTotalRunTime ) FREERTOS_SYSTEM_CALL;
 uint32_t MPU_ulTaskGetIdleRunTimeCounter( void ) FREERTOS_SYSTEM_CALL;
 void MPU_vTaskList( char * pcWriteBuffer ) FREERTOS_SYSTEM_CALL;
-void MPU_vTaskGetRunTimeStats( char *pcWriteBuffer ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
-uint32_t MPU_ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTaskNotifyStateClear( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
-uint32_t MPU_ulTaskNotifyValueClear( TaskHandle_t xTask, uint32_t ulBitsToClear ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskGetRunTimeStats( char * pcWriteBuffer ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify,
+                                   UBaseType_t uxIndexToNotify,
+                                   uint32_t ulValue,
+                                   eNotifyAction eAction,
+                                   uint32_t * pulPreviousNotificationValue ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn,
+                                       uint32_t ulBitsToClearOnEntry,
+                                       uint32_t ulBitsToClearOnExit,
+                                       uint32_t * pulNotificationValue,
+                                       TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn,
+                                      BaseType_t xClearCountOnExit,
+                                      TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask,
+                                             UBaseType_t uxIndexToClear ) FREERTOS_SYSTEM_CALL;
+uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask,
+                                            UBaseType_t uxIndexToClear,
+                                            uint32_t ulBitsToClear ) FREERTOS_SYSTEM_CALL;
 BaseType_t MPU_xTaskIncrementTick( void ) FREERTOS_SYSTEM_CALL;
 TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) FREERTOS_SYSTEM_CALL;
 void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut,
+                                     TickType_t * const pxTicksToWait ) FREERTOS_SYSTEM_CALL;
 void MPU_vTaskMissedYield( void ) FREERTOS_SYSTEM_CALL;
 BaseType_t MPU_xTaskGetSchedulerState( void ) FREERTOS_SYSTEM_CALL;
 BaseType_t MPU_xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) FREERTOS_SYSTEM_CALL;
 
 /* MPU versions of queue.h API functions. */
-BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue,
+                                  const void * const pvItemToQueue,
+                                  TickType_t xTicksToWait,
+                                  const BaseType_t xCopyPosition ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue,
+                              void * const pvBuffer,
+                              TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue,
+                           void * const pvBuffer,
+                           TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue,
+                                    TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
 UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
 UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
 void MPU_vQueueDelete( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
 QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
-QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue ) FREERTOS_SYSTEM_CALL;
-QueueHandle_t MPU_xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount ) FREERTOS_SYSTEM_CALL;
-QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue ) FREERTOS_SYSTEM_CALL;
+QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType,
+                                           StaticQueue_t * pxStaticQueue ) FREERTOS_SYSTEM_CALL;
+QueueHandle_t MPU_xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount,
+                                                 const UBaseType_t uxInitialCount ) FREERTOS_SYSTEM_CALL;
+QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount,
+                                                       const UBaseType_t uxInitialCount,
+                                                       StaticQueue_t * pxStaticQueue ) FREERTOS_SYSTEM_CALL;
 TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex,
+                                         TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
 BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) FREERTOS_SYSTEM_CALL;
-void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcName ) FREERTOS_SYSTEM_CALL;
+void MPU_vQueueAddToRegistry( QueueHandle_t xQueue,
+                              const char * pcName ) FREERTOS_SYSTEM_CALL;
 void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
 const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
-QueueHandle_t MPU_xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
-QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
+QueueHandle_t MPU_xQueueGenericCreate( const UBaseType_t uxQueueLength,
+                                       const UBaseType_t uxItemSize,
+                                       const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
+QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength,
+                                             const UBaseType_t uxItemSize,
+                                             uint8_t * pucQueueStorage,
+                                             StaticQueue_t * pxStaticQueue,
+                                             const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
 QueueSetHandle_t MPU_xQueueCreateSet( const UBaseType_t uxEventQueueLength ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL;
-QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue ) FREERTOS_SYSTEM_CALL;
-void MPU_vQueueSetQueueNumber( QueueHandle_t xQueue, UBaseType_t uxQueueNumber ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore,
+                               QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore,
+                                    QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL;
+QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet,
+                                                const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueGenericReset( QueueHandle_t xQueue,
+                                   BaseType_t xNewQueue ) FREERTOS_SYSTEM_CALL;
+void MPU_vQueueSetQueueNumber( QueueHandle_t xQueue,
+                               UBaseType_t uxQueueNumber ) FREERTOS_SYSTEM_CALL;
 UBaseType_t MPU_uxQueueGetQueueNumber( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
 uint8_t MPU_ucQueueGetQueueType( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
 
 /* MPU versions of timers.h API functions. */
-TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction ) FREERTOS_SYSTEM_CALL;
-TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction, StaticTimer_t *pxTimerBuffer ) FREERTOS_SYSTEM_CALL;
+TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName,
+                                const TickType_t xTimerPeriodInTicks,
+                                const UBaseType_t uxAutoReload,
+                                void * const pvTimerID,
+                                TimerCallbackFunction_t pxCallbackFunction ) FREERTOS_SYSTEM_CALL;
+TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName,
+                                      const TickType_t xTimerPeriodInTicks,
+                                      const UBaseType_t uxAutoReload,
+                                      void * const pvTimerID,
+                                      TimerCallbackFunction_t pxCallbackFunction,
+                                      StaticTimer_t * pxTimerBuffer ) FREERTOS_SYSTEM_CALL;
 void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
-void MPU_vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID ) FREERTOS_SYSTEM_CALL;
+void MPU_vTimerSetTimerID( TimerHandle_t xTimer,
+                           void * pvNewID ) FREERTOS_SYSTEM_CALL;
 BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
 TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTimerPendFunctionCall( PendedFunction_t xFunctionToPend,
+                                       void * pvParameter1,
+                                       uint32_t ulParameter2,
+                                       TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
 const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
-void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, const UBaseType_t uxAutoReload ) FREERTOS_SYSTEM_CALL;
+void MPU_vTimerSetReloadMode( TimerHandle_t xTimer,
+                              const UBaseType_t uxAutoReload ) FREERTOS_SYSTEM_CALL;
 UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
 TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
 TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
 BaseType_t MPU_xTimerCreateTimerTask( void ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer,
+                                     const BaseType_t xCommandID,
+                                     const TickType_t xOptionalValue,
+                                     BaseType_t * const pxHigherPriorityTaskWoken,
+                                     const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
 
 /* MPU versions of event_group.h API functions. */
 EventGroupHandle_t MPU_xEventGroupCreate( void ) FREERTOS_SYSTEM_CALL;
-EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer ) FREERTOS_SYSTEM_CALL;
-EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
-EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) FREERTOS_SYSTEM_CALL;
-EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) FREERTOS_SYSTEM_CALL;
-EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer ) FREERTOS_SYSTEM_CALL;
+EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup,
+                                     const EventBits_t uxBitsToWaitFor,
+                                     const BaseType_t xClearOnExit,
+                                     const BaseType_t xWaitForAllBits,
+                                     TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup,
+                                      const EventBits_t uxBitsToClear ) FREERTOS_SYSTEM_CALL;
+EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup,
+                                    const EventBits_t uxBitsToSet ) FREERTOS_SYSTEM_CALL;
+EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup,
+                                 const EventBits_t uxBitsToSet,
+                                 const EventBits_t uxBitsToWaitFor,
+                                 TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
 void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ) FREERTOS_SYSTEM_CALL;
-UBaseType_t MPU_uxEventGroupGetNumber( void* xEventGroup ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) FREERTOS_SYSTEM_CALL;
 
 /* MPU versions of message/stream_buffer.h API functions. */
-size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, const void *pvTxData, size_t xDataLengthBytes, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
-size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, void *pvRxData, size_t xBufferLengthBytes, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
+                              const void * pvTxData,
+                              size_t xDataLengthBytes,
+                              TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
+                                 void * pvRxData,
+                                 size_t xBufferLengthBytes,
+                                 TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
 size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
 void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
 BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
@@ -150,11 +247,17 @@ BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) FREERT
 BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
 size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
 size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel ) FREERTOS_SYSTEM_CALL;
-StreamBufferHandle_t MPU_xStreamBufferGenericCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer ) FREERTOS_SYSTEM_CALL;
-StreamBufferHandle_t MPU_xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer, uint8_t * const pucStreamBufferStorageArea, StaticStreamBuffer_t * const pxStaticStreamBuffer ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer,
+                                             size_t xTriggerLevel ) FREERTOS_SYSTEM_CALL;
+StreamBufferHandle_t MPU_xStreamBufferGenericCreate( size_t xBufferSizeBytes,
+                                                     size_t xTriggerLevelBytes,
+                                                     BaseType_t xIsMessageBuffer ) FREERTOS_SYSTEM_CALL;
+StreamBufferHandle_t MPU_xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
+                                                           size_t xTriggerLevelBytes,
+                                                           BaseType_t xIsMessageBuffer,
+                                                           uint8_t * const pucStreamBufferStorageArea,
+                                                           StaticStreamBuffer_t * const pxStaticStreamBuffer ) FREERTOS_SYSTEM_CALL;
 
 
 
 #endif /* MPU_PROTOTYPES_H */
-
diff --git a/include/mpu_wrappers.h b/include/mpu_wrappers.h
index 87a2f2c38..6d2f5629d 100644
--- a/include/mpu_wrappers.h
+++ b/include/mpu_wrappers.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,171 +19,169 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef MPU_WRAPPERS_H
 #define MPU_WRAPPERS_H
 
 /* This file redefines API functions to be called through a wrapper macro, but
-only for ports that are using the MPU. */
+ * only for ports that are using the MPU. */
 #ifdef portUSING_MPU_WRAPPERS
 
-	/* MPU_WRAPPERS_INCLUDED_FROM_API_FILE will be defined when this file is
-	included from queue.c or task.c to prevent it from having an effect within
-	those files. */
-	#ifndef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+/* MPU_WRAPPERS_INCLUDED_FROM_API_FILE will be defined when this file is
+ * included from queue.c or task.c to prevent it from having an effect within
+ * those files. */
+    #ifndef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
-		/*
-		 * Map standard (non MPU) API functions to equivalents that start
-		 * "MPU_".  This will cause the application code to call the MPU_
-		 * version, which wraps the non-MPU version with privilege promoting
-		 * then demoting code, so the kernel code always runs will full
-		 * privileges.
-		 */
+/*
+ * Map standard (non MPU) API functions to equivalents that start
+ * "MPU_".  This will cause the application code to call the MPU_
+ * version, which wraps the non-MPU version with privilege promoting
+ * then demoting code, so the kernel code always runs will full
+ * privileges.
+ */
 
-		/* Map standard tasks.h API functions to the MPU equivalents. */
-		#define xTaskCreate								MPU_xTaskCreate
-		#define xTaskCreateStatic						MPU_xTaskCreateStatic
-		#define xTaskCreateRestricted					MPU_xTaskCreateRestricted
-		#define vTaskAllocateMPURegions					MPU_vTaskAllocateMPURegions
-		#define vTaskDelete								MPU_vTaskDelete
-		#define vTaskDelay								MPU_vTaskDelay
-		#define vTaskDelayUntil							MPU_vTaskDelayUntil
-		#define xTaskAbortDelay							MPU_xTaskAbortDelay
-		#define uxTaskPriorityGet						MPU_uxTaskPriorityGet
-		#define eTaskGetState							MPU_eTaskGetState
-		#define vTaskGetInfo							MPU_vTaskGetInfo
-		#define vTaskPrioritySet						MPU_vTaskPrioritySet
-		#define vTaskSuspend							MPU_vTaskSuspend
-		#define vTaskResume								MPU_vTaskResume
-		#define vTaskSuspendAll							MPU_vTaskSuspendAll
-		#define xTaskResumeAll							MPU_xTaskResumeAll
-		#define xTaskGetTickCount						MPU_xTaskGetTickCount
-		#define uxTaskGetNumberOfTasks					MPU_uxTaskGetNumberOfTasks
-		#define pcTaskGetName							MPU_pcTaskGetName
-		#define xTaskGetHandle							MPU_xTaskGetHandle
-		#define uxTaskGetStackHighWaterMark				MPU_uxTaskGetStackHighWaterMark
-		#define uxTaskGetStackHighWaterMark2			MPU_uxTaskGetStackHighWaterMark2
-		#define vTaskSetApplicationTaskTag				MPU_vTaskSetApplicationTaskTag
-		#define xTaskGetApplicationTaskTag				MPU_xTaskGetApplicationTaskTag
-		#define vTaskSetThreadLocalStoragePointer		MPU_vTaskSetThreadLocalStoragePointer
-		#define pvTaskGetThreadLocalStoragePointer		MPU_pvTaskGetThreadLocalStoragePointer
-		#define xTaskCallApplicationTaskHook			MPU_xTaskCallApplicationTaskHook
-		#define xTaskGetIdleTaskHandle					MPU_xTaskGetIdleTaskHandle
-		#define uxTaskGetSystemState					MPU_uxTaskGetSystemState
-		#define vTaskList								MPU_vTaskList
-		#define vTaskGetRunTimeStats					MPU_vTaskGetRunTimeStats
-		#define ulTaskGetIdleRunTimeCounter				MPU_ulTaskGetIdleRunTimeCounter
-		#define xTaskGenericNotify						MPU_xTaskGenericNotify
-		#define xTaskNotifyWait							MPU_xTaskNotifyWait
-		#define ulTaskNotifyTake						MPU_ulTaskNotifyTake
-		#define xTaskNotifyStateClear					MPU_xTaskNotifyStateClear
-		#define ulTaskNotifyValueClear					MPU_ulTaskNotifyValueClear
-		#define xTaskCatchUpTicks						MPU_xTaskCatchUpTicks
+/* Map standard tasks.h API functions to the MPU equivalents. */
+        #define xTaskCreate                            MPU_xTaskCreate
+        #define xTaskCreateStatic                      MPU_xTaskCreateStatic
+        #define xTaskCreateRestricted                  MPU_xTaskCreateRestricted
+        #define vTaskAllocateMPURegions                MPU_vTaskAllocateMPURegions
+        #define vTaskDelete                            MPU_vTaskDelete
+        #define vTaskDelay                             MPU_vTaskDelay
+        #define vTaskDelayUntil                        MPU_vTaskDelayUntil
+        #define xTaskAbortDelay                        MPU_xTaskAbortDelay
+        #define uxTaskPriorityGet                      MPU_uxTaskPriorityGet
+        #define eTaskGetState                          MPU_eTaskGetState
+        #define vTaskGetInfo                           MPU_vTaskGetInfo
+        #define vTaskPrioritySet                       MPU_vTaskPrioritySet
+        #define vTaskSuspend                           MPU_vTaskSuspend
+        #define vTaskResume                            MPU_vTaskResume
+        #define vTaskSuspendAll                        MPU_vTaskSuspendAll
+        #define xTaskResumeAll                         MPU_xTaskResumeAll
+        #define xTaskGetTickCount                      MPU_xTaskGetTickCount
+        #define uxTaskGetNumberOfTasks                 MPU_uxTaskGetNumberOfTasks
+        #define pcTaskGetName                          MPU_pcTaskGetName
+        #define xTaskGetHandle                         MPU_xTaskGetHandle
+        #define uxTaskGetStackHighWaterMark            MPU_uxTaskGetStackHighWaterMark
+        #define uxTaskGetStackHighWaterMark2           MPU_uxTaskGetStackHighWaterMark2
+        #define vTaskSetApplicationTaskTag             MPU_vTaskSetApplicationTaskTag
+        #define xTaskGetApplicationTaskTag             MPU_xTaskGetApplicationTaskTag
+        #define vTaskSetThreadLocalStoragePointer      MPU_vTaskSetThreadLocalStoragePointer
+        #define pvTaskGetThreadLocalStoragePointer     MPU_pvTaskGetThreadLocalStoragePointer
+        #define xTaskCallApplicationTaskHook           MPU_xTaskCallApplicationTaskHook
+        #define xTaskGetIdleTaskHandle                 MPU_xTaskGetIdleTaskHandle
+        #define uxTaskGetSystemState                   MPU_uxTaskGetSystemState
+        #define vTaskList                              MPU_vTaskList
+        #define vTaskGetRunTimeStats                   MPU_vTaskGetRunTimeStats
+        #define ulTaskGetIdleRunTimeCounter            MPU_ulTaskGetIdleRunTimeCounter
+        #define xTaskGenericNotify                     MPU_xTaskGenericNotify
+        #define xTaskGenericNotifyWait                 MPU_xTaskGenericNotifyWait
+        #define ulTaskGenericNotifyTake                MPU_ulTaskGenericNotifyTake
+        #define xTaskGenericNotifyStateClear           MPU_xTaskGenericNotifyStateClear
+        #define ulTaskGenericNotifyValueClear          MPU_ulTaskGenericNotifyValueClear
+        #define xTaskCatchUpTicks                      MPU_xTaskCatchUpTicks
 
-		#define xTaskGetCurrentTaskHandle				MPU_xTaskGetCurrentTaskHandle
-		#define vTaskSetTimeOutState					MPU_vTaskSetTimeOutState
-		#define xTaskCheckForTimeOut					MPU_xTaskCheckForTimeOut
-		#define xTaskGetSchedulerState					MPU_xTaskGetSchedulerState
+        #define xTaskGetCurrentTaskHandle              MPU_xTaskGetCurrentTaskHandle
+        #define vTaskSetTimeOutState                   MPU_vTaskSetTimeOutState
+        #define xTaskCheckForTimeOut                   MPU_xTaskCheckForTimeOut
+        #define xTaskGetSchedulerState                 MPU_xTaskGetSchedulerState
 
-		/* Map standard queue.h API functions to the MPU equivalents. */
-		#define xQueueGenericSend						MPU_xQueueGenericSend
-		#define xQueueReceive							MPU_xQueueReceive
-		#define xQueuePeek								MPU_xQueuePeek
-		#define xQueueSemaphoreTake						MPU_xQueueSemaphoreTake
-		#define uxQueueMessagesWaiting					MPU_uxQueueMessagesWaiting
-		#define uxQueueSpacesAvailable					MPU_uxQueueSpacesAvailable
-		#define vQueueDelete							MPU_vQueueDelete
-		#define xQueueCreateMutex						MPU_xQueueCreateMutex
-		#define xQueueCreateMutexStatic					MPU_xQueueCreateMutexStatic
-		#define xQueueCreateCountingSemaphore			MPU_xQueueCreateCountingSemaphore
-		#define xQueueCreateCountingSemaphoreStatic		MPU_xQueueCreateCountingSemaphoreStatic
-		#define xQueueGetMutexHolder					MPU_xQueueGetMutexHolder
-		#define xQueueTakeMutexRecursive				MPU_xQueueTakeMutexRecursive
-		#define xQueueGiveMutexRecursive				MPU_xQueueGiveMutexRecursive
-		#define xQueueGenericCreate						MPU_xQueueGenericCreate
-		#define xQueueGenericCreateStatic				MPU_xQueueGenericCreateStatic
-		#define xQueueCreateSet							MPU_xQueueCreateSet
-		#define xQueueAddToSet							MPU_xQueueAddToSet
-		#define xQueueRemoveFromSet						MPU_xQueueRemoveFromSet
-		#define xQueueSelectFromSet						MPU_xQueueSelectFromSet
-		#define xQueueGenericReset						MPU_xQueueGenericReset
+/* Map standard queue.h API functions to the MPU equivalents. */
+        #define xQueueGenericSend                      MPU_xQueueGenericSend
+        #define xQueueReceive                          MPU_xQueueReceive
+        #define xQueuePeek                             MPU_xQueuePeek
+        #define xQueueSemaphoreTake                    MPU_xQueueSemaphoreTake
+        #define uxQueueMessagesWaiting                 MPU_uxQueueMessagesWaiting
+        #define uxQueueSpacesAvailable                 MPU_uxQueueSpacesAvailable
+        #define vQueueDelete                           MPU_vQueueDelete
+        #define xQueueCreateMutex                      MPU_xQueueCreateMutex
+        #define xQueueCreateMutexStatic                MPU_xQueueCreateMutexStatic
+        #define xQueueCreateCountingSemaphore          MPU_xQueueCreateCountingSemaphore
+        #define xQueueCreateCountingSemaphoreStatic    MPU_xQueueCreateCountingSemaphoreStatic
+        #define xQueueGetMutexHolder                   MPU_xQueueGetMutexHolder
+        #define xQueueTakeMutexRecursive               MPU_xQueueTakeMutexRecursive
+        #define xQueueGiveMutexRecursive               MPU_xQueueGiveMutexRecursive
+        #define xQueueGenericCreate                    MPU_xQueueGenericCreate
+        #define xQueueGenericCreateStatic              MPU_xQueueGenericCreateStatic
+        #define xQueueCreateSet                        MPU_xQueueCreateSet
+        #define xQueueAddToSet                         MPU_xQueueAddToSet
+        #define xQueueRemoveFromSet                    MPU_xQueueRemoveFromSet
+        #define xQueueSelectFromSet                    MPU_xQueueSelectFromSet
+        #define xQueueGenericReset                     MPU_xQueueGenericReset
 
-		#if( configQUEUE_REGISTRY_SIZE > 0 )
-			#define vQueueAddToRegistry						MPU_vQueueAddToRegistry
-			#define vQueueUnregisterQueue					MPU_vQueueUnregisterQueue
-			#define pcQueueGetName							MPU_pcQueueGetName
-		#endif
+        #if ( configQUEUE_REGISTRY_SIZE > 0 )
+            #define vQueueAddToRegistry                MPU_vQueueAddToRegistry
+            #define vQueueUnregisterQueue              MPU_vQueueUnregisterQueue
+            #define pcQueueGetName                     MPU_pcQueueGetName
+        #endif
 
-		/* Map standard timer.h API functions to the MPU equivalents. */
-		#define xTimerCreate							MPU_xTimerCreate
-		#define xTimerCreateStatic						MPU_xTimerCreateStatic
-		#define pvTimerGetTimerID						MPU_pvTimerGetTimerID
-		#define vTimerSetTimerID						MPU_vTimerSetTimerID
-		#define xTimerIsTimerActive						MPU_xTimerIsTimerActive
-		#define xTimerGetTimerDaemonTaskHandle			MPU_xTimerGetTimerDaemonTaskHandle
-		#define xTimerPendFunctionCall					MPU_xTimerPendFunctionCall
-		#define pcTimerGetName							MPU_pcTimerGetName
-		#define vTimerSetReloadMode						MPU_vTimerSetReloadMode
-		#define uxTimerGetReloadMode					MPU_uxTimerGetReloadMode
-		#define xTimerGetPeriod							MPU_xTimerGetPeriod
-		#define xTimerGetExpiryTime						MPU_xTimerGetExpiryTime
-		#define xTimerGenericCommand					MPU_xTimerGenericCommand
+/* Map standard timer.h API functions to the MPU equivalents. */
+        #define xTimerCreate                           MPU_xTimerCreate
+        #define xTimerCreateStatic                     MPU_xTimerCreateStatic
+        #define pvTimerGetTimerID                      MPU_pvTimerGetTimerID
+        #define vTimerSetTimerID                       MPU_vTimerSetTimerID
+        #define xTimerIsTimerActive                    MPU_xTimerIsTimerActive
+        #define xTimerGetTimerDaemonTaskHandle         MPU_xTimerGetTimerDaemonTaskHandle
+        #define xTimerPendFunctionCall                 MPU_xTimerPendFunctionCall
+        #define pcTimerGetName                         MPU_pcTimerGetName
+        #define vTimerSetReloadMode                    MPU_vTimerSetReloadMode
+        #define uxTimerGetReloadMode                   MPU_uxTimerGetReloadMode
+        #define xTimerGetPeriod                        MPU_xTimerGetPeriod
+        #define xTimerGetExpiryTime                    MPU_xTimerGetExpiryTime
+        #define xTimerGenericCommand                   MPU_xTimerGenericCommand
 
-		/* Map standard event_group.h API functions to the MPU equivalents. */
-		#define xEventGroupCreate						MPU_xEventGroupCreate
-		#define xEventGroupCreateStatic					MPU_xEventGroupCreateStatic
-		#define xEventGroupWaitBits						MPU_xEventGroupWaitBits
-		#define xEventGroupClearBits					MPU_xEventGroupClearBits
-		#define xEventGroupSetBits						MPU_xEventGroupSetBits
-		#define xEventGroupSync							MPU_xEventGroupSync
-		#define vEventGroupDelete						MPU_vEventGroupDelete
+/* Map standard event_group.h API functions to the MPU equivalents. */
+        #define xEventGroupCreate                      MPU_xEventGroupCreate
+        #define xEventGroupCreateStatic                MPU_xEventGroupCreateStatic
+        #define xEventGroupWaitBits                    MPU_xEventGroupWaitBits
+        #define xEventGroupClearBits                   MPU_xEventGroupClearBits
+        #define xEventGroupSetBits                     MPU_xEventGroupSetBits
+        #define xEventGroupSync                        MPU_xEventGroupSync
+        #define vEventGroupDelete                      MPU_vEventGroupDelete
 
-		/* Map standard message/stream_buffer.h API functions to the MPU
-		equivalents. */
-		#define xStreamBufferSend						MPU_xStreamBufferSend
-		#define xStreamBufferReceive					MPU_xStreamBufferReceive
-		#define xStreamBufferNextMessageLengthBytes		MPU_xStreamBufferNextMessageLengthBytes
-		#define vStreamBufferDelete						MPU_vStreamBufferDelete
-		#define xStreamBufferIsFull						MPU_xStreamBufferIsFull
-		#define xStreamBufferIsEmpty					MPU_xStreamBufferIsEmpty
-		#define xStreamBufferReset						MPU_xStreamBufferReset
-		#define xStreamBufferSpacesAvailable			MPU_xStreamBufferSpacesAvailable
-		#define xStreamBufferBytesAvailable				MPU_xStreamBufferBytesAvailable
-		#define xStreamBufferSetTriggerLevel			MPU_xStreamBufferSetTriggerLevel
-		#define xStreamBufferGenericCreate				MPU_xStreamBufferGenericCreate
-		#define xStreamBufferGenericCreateStatic		MPU_xStreamBufferGenericCreateStatic
+/* Map standard message/stream_buffer.h API functions to the MPU
+ * equivalents. */
+        #define xStreamBufferSend                      MPU_xStreamBufferSend
+        #define xStreamBufferReceive                   MPU_xStreamBufferReceive
+        #define xStreamBufferNextMessageLengthBytes    MPU_xStreamBufferNextMessageLengthBytes
+        #define vStreamBufferDelete                    MPU_vStreamBufferDelete
+        #define xStreamBufferIsFull                    MPU_xStreamBufferIsFull
+        #define xStreamBufferIsEmpty                   MPU_xStreamBufferIsEmpty
+        #define xStreamBufferReset                     MPU_xStreamBufferReset
+        #define xStreamBufferSpacesAvailable           MPU_xStreamBufferSpacesAvailable
+        #define xStreamBufferBytesAvailable            MPU_xStreamBufferBytesAvailable
+        #define xStreamBufferSetTriggerLevel           MPU_xStreamBufferSetTriggerLevel
+        #define xStreamBufferGenericCreate             MPU_xStreamBufferGenericCreate
+        #define xStreamBufferGenericCreateStatic       MPU_xStreamBufferGenericCreateStatic
 
 
-		/* Remove the privileged function macro, but keep the PRIVILEGED_DATA
-		macro so applications can place data in privileged access sections
-		(useful when using statically allocated objects). */
-		#define PRIVILEGED_FUNCTION
-		#define PRIVILEGED_DATA __attribute__((section("privileged_data")))
-		#define FREERTOS_SYSTEM_CALL
+/* Remove the privileged function macro, but keep the PRIVILEGED_DATA
+ * macro so applications can place data in privileged access sections
+ * (useful when using statically allocated objects). */
+        #define PRIVILEGED_FUNCTION
+        #define PRIVILEGED_DATA    __attribute__( ( section( "privileged_data" ) ) )
+        #define FREERTOS_SYSTEM_CALL
 
-	#else /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
+    #else /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
 
-		/* Ensure API functions go in the privileged execution section. */
-		#define PRIVILEGED_FUNCTION __attribute__((section("privileged_functions")))
-		#define PRIVILEGED_DATA __attribute__((section("privileged_data")))
-		#define FREERTOS_SYSTEM_CALL __attribute__((section( "freertos_system_calls")))
+/* Ensure API functions go in the privileged execution section. */
+        #define PRIVILEGED_FUNCTION     __attribute__( ( section( "privileged_functions" ) ) )
+        #define PRIVILEGED_DATA         __attribute__( ( section( "privileged_data" ) ) )
+        #define FREERTOS_SYSTEM_CALL    __attribute__( ( section( "freertos_system_calls" ) ) )
 
-	#endif /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
+    #endif /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
 
 #else /* portUSING_MPU_WRAPPERS */
 
-	#define PRIVILEGED_FUNCTION
-	#define PRIVILEGED_DATA
-	#define FREERTOS_SYSTEM_CALL
-	#define portUSING_MPU_WRAPPERS 0
+    #define PRIVILEGED_FUNCTION
+    #define PRIVILEGED_DATA
+    #define FREERTOS_SYSTEM_CALL
+    #define portUSING_MPU_WRAPPERS    0
 
 #endif /* portUSING_MPU_WRAPPERS */
 
 
 #endif /* MPU_WRAPPERS_H */
-
diff --git a/include/portable.h b/include/portable.h
index 47ceab9f2..7bcea0248 100644
--- a/include/portable.h
+++ b/include/portable.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,82 +19,83 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------
- * Portable layer API.  Each function must be defined for each port.
- *----------------------------------------------------------*/
+* Portable layer API.  Each function must be defined for each port.
+*----------------------------------------------------------*/
 
 #ifndef PORTABLE_H
 #define PORTABLE_H
 
 /* Each FreeRTOS port has a unique portmacro.h header file.  Originally a
-pre-processor definition was used to ensure the pre-processor found the correct
-portmacro.h file for the port being used.  That scheme was deprecated in favour
-of setting the compiler's include path such that it found the correct
-portmacro.h file - removing the need for the constant and allowing the
-portmacro.h file to be located anywhere in relation to the port being used.
-Purely for reasons of backward compatibility the old method is still valid, but
-to make it clear that new projects should not use it, support for the port
-specific constants has been moved into the deprecated_definitions.h header
-file. */
+ * pre-processor definition was used to ensure the pre-processor found the correct
+ * portmacro.h file for the port being used.  That scheme was deprecated in favour
+ * of setting the compiler's include path such that it found the correct
+ * portmacro.h file - removing the need for the constant and allowing the
+ * portmacro.h file to be located anywhere in relation to the port being used.
+ * Purely for reasons of backward compatibility the old method is still valid, but
+ * to make it clear that new projects should not use it, support for the port
+ * specific constants has been moved into the deprecated_definitions.h header
+ * file. */
 #include "deprecated_definitions.h"
 
 /* If portENTER_CRITICAL is not defined then including deprecated_definitions.h
-did not result in a portmacro.h header file being included - and it should be
-included here.  In this case the path to the correct portmacro.h header file
-must be set in the compiler's include path. */
+ * did not result in a portmacro.h header file being included - and it should be
+ * included here.  In this case the path to the correct portmacro.h header file
+ * must be set in the compiler's include path. */
 #ifndef portENTER_CRITICAL
-	#include "portmacro.h"
+    #include "portmacro.h"
 #endif
 
 #if portBYTE_ALIGNMENT == 32
-	#define portBYTE_ALIGNMENT_MASK ( 0x001f )
+    #define portBYTE_ALIGNMENT_MASK    ( 0x001f )
 #endif
 
 #if portBYTE_ALIGNMENT == 16
-	#define portBYTE_ALIGNMENT_MASK ( 0x000f )
+    #define portBYTE_ALIGNMENT_MASK    ( 0x000f )
 #endif
 
 #if portBYTE_ALIGNMENT == 8
-	#define portBYTE_ALIGNMENT_MASK ( 0x0007 )
+    #define portBYTE_ALIGNMENT_MASK    ( 0x0007 )
 #endif
 
 #if portBYTE_ALIGNMENT == 4
-	#define portBYTE_ALIGNMENT_MASK	( 0x0003 )
+    #define portBYTE_ALIGNMENT_MASK    ( 0x0003 )
 #endif
 
 #if portBYTE_ALIGNMENT == 2
-	#define portBYTE_ALIGNMENT_MASK	( 0x0001 )
+    #define portBYTE_ALIGNMENT_MASK    ( 0x0001 )
 #endif
 
 #if portBYTE_ALIGNMENT == 1
-	#define portBYTE_ALIGNMENT_MASK	( 0x0000 )
+    #define portBYTE_ALIGNMENT_MASK    ( 0x0000 )
 #endif
 
 #ifndef portBYTE_ALIGNMENT_MASK
-	#error "Invalid portBYTE_ALIGNMENT definition"
+    #error "Invalid portBYTE_ALIGNMENT definition"
 #endif
 
 #ifndef portNUM_CONFIGURABLE_REGIONS
-	#define portNUM_CONFIGURABLE_REGIONS 1
+    #define portNUM_CONFIGURABLE_REGIONS    1
 #endif
 
 #ifndef portHAS_STACK_OVERFLOW_CHECKING
-	#define portHAS_STACK_OVERFLOW_CHECKING 0
+    #define portHAS_STACK_OVERFLOW_CHECKING    0
 #endif
 
 #ifndef portARCH_NAME
-	#define portARCH_NAME NULL
+    #define portARCH_NAME    NULL
 #endif
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
-extern "C" {
+    extern "C" {
 #endif
+/* *INDENT-ON* */
 
 #include "mpu_wrappers.h"
 
@@ -104,38 +105,50 @@ extern "C" {
  * the order that the port expects to find them.
  *
  */
-#if( portUSING_MPU_WRAPPERS == 1 )
-	#if( portHAS_STACK_OVERFLOW_CHECKING == 1 )
-		StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;
-	#else
-		StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;
-	#endif
-#else
-	#if( portHAS_STACK_OVERFLOW_CHECKING == 1 )
-		StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters ) PRIVILEGED_FUNCTION;
-	#else
-		StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) PRIVILEGED_FUNCTION;
-	#endif
-#endif
+#if ( portUSING_MPU_WRAPPERS == 1 )
+    #if ( portHAS_STACK_OVERFLOW_CHECKING == 1 )
+        StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                             StackType_t * pxEndOfStack,
+                                             TaskFunction_t pxCode,
+                                             void * pvParameters,
+                                             BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;
+    #else
+        StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                             TaskFunction_t pxCode,
+                                             void * pvParameters,
+                                             BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;
+    #endif
+#else /* if ( portUSING_MPU_WRAPPERS == 1 ) */
+    #if ( portHAS_STACK_OVERFLOW_CHECKING == 1 )
+        StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                             StackType_t * pxEndOfStack,
+                                             TaskFunction_t pxCode,
+                                             void * pvParameters ) PRIVILEGED_FUNCTION;
+    #else
+        StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                             TaskFunction_t pxCode,
+                                             void * pvParameters ) PRIVILEGED_FUNCTION;
+    #endif
+#endif /* if ( portUSING_MPU_WRAPPERS == 1 ) */
 
 /* Used by heap_5.c to define the start address and size of each memory region
-that together comprise the total FreeRTOS heap space. */
+ * that together comprise the total FreeRTOS heap space. */
 typedef struct HeapRegion
 {
-	uint8_t *pucStartAddress;
-	size_t xSizeInBytes;
+    uint8_t * pucStartAddress;
+    size_t xSizeInBytes;
 } HeapRegion_t;
 
 /* Used to pass information about the heap out of vPortGetHeapStats(). */
 typedef struct xHeapStats
 {
-	size_t xAvailableHeapSpaceInBytes;		/* The total heap size currently available - this is the sum of all the free blocks, not the largest block that can be allocated. */
-	size_t xSizeOfLargestFreeBlockInBytes; 	/* The maximum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
-	size_t xSizeOfSmallestFreeBlockInBytes; /* The minimum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
-	size_t xNumberOfFreeBlocks;				/* The number of free memory blocks within the heap at the time vPortGetHeapStats() is called. */
-	size_t xMinimumEverFreeBytesRemaining;	/* The minimum amount of total free memory (sum of all free blocks) there has been in the heap since the system booted. */
-	size_t xNumberOfSuccessfulAllocations;	/* The number of calls to pvPortMalloc() that have returned a valid memory block. */
-	size_t xNumberOfSuccessfulFrees;		/* The number of calls to vPortFree() that has successfully freed a block of memory. */
+    size_t xAvailableHeapSpaceInBytes;          /* The total heap size currently available - this is the sum of all the free blocks, not the largest block that can be allocated. */
+    size_t xSizeOfLargestFreeBlockInBytes;      /* The maximum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
+    size_t xSizeOfSmallestFreeBlockInBytes;     /* The minimum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
+    size_t xNumberOfFreeBlocks;                 /* The number of free memory blocks within the heap at the time vPortGetHeapStats() is called. */
+    size_t xMinimumEverFreeBytesRemaining;      /* The minimum amount of total free memory (sum of all free blocks) there has been in the heap since the system booted. */
+    size_t xNumberOfSuccessfulAllocations;      /* The number of calls to pvPortMalloc() that have returned a valid memory block. */
+    size_t xNumberOfSuccessfulFrees;            /* The number of calls to vPortFree() that has successfully freed a block of memory. */
 } HeapStats_t;
 
 /*
@@ -155,13 +168,13 @@ void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) PRIVILEG
  * Returns a HeapStats_t structure filled with information about the current
  * heap state.
  */
-void vPortGetHeapStats( HeapStats_t *pxHeapStats );
+void vPortGetHeapStats( HeapStats_t * pxHeapStats );
 
 /*
  * Map to the memory management routines required for the port.
  */
-void *pvPortMalloc( size_t xSize ) PRIVILEGED_FUNCTION;
-void vPortFree( void *pv ) PRIVILEGED_FUNCTION;
+void * pvPortMalloc( size_t xSize ) PRIVILEGED_FUNCTION;
+void vPortFree( void * pv ) PRIVILEGED_FUNCTION;
 void vPortInitialiseBlocks( void ) PRIVILEGED_FUNCTION;
 size_t xPortGetFreeHeapSize( void ) PRIVILEGED_FUNCTION;
 size_t xPortGetMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION;
@@ -186,14 +199,18 @@ void vPortEndScheduler( void ) PRIVILEGED_FUNCTION;
  * Fills the xMPUSettings structure with the memory region information
  * contained in xRegions.
  */
-#if( portUSING_MPU_WRAPPERS == 1 )
-	struct xMEMORY_REGION;
-	void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t ulStackDepth ) PRIVILEGED_FUNCTION;
+#if ( portUSING_MPU_WRAPPERS == 1 )
+    struct xMEMORY_REGION;
+    void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
+                                    const struct xMEMORY_REGION * const xRegions,
+                                    StackType_t * pxBottomOfStack,
+                                    uint32_t ulStackDepth ) PRIVILEGED_FUNCTION;
 #endif
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
-}
+    }
 #endif
+/* *INDENT-ON* */
 
 #endif /* PORTABLE_H */
-
diff --git a/include/projdefs.h b/include/projdefs.h
index 75d4155b8..918256564 100644
--- a/include/projdefs.h
+++ b/include/projdefs.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,10 +19,9 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef PROJDEFS_H
@@ -32,93 +31,90 @@
  * Defines the prototype to which task functions must conform.  Defined in this
  * file to ensure the type is known before portable.h is included.
  */
-typedef void (*TaskFunction_t)( void * );
+typedef void (* TaskFunction_t)( void * );
 
 /* Converts a time in milliseconds to a time in ticks.  This macro can be
-overridden by a macro of the same name defined in FreeRTOSConfig.h in case the
-definition here is not suitable for your application. */
+ * overridden by a macro of the same name defined in FreeRTOSConfig.h in case the
+ * definition here is not suitable for your application. */
 #ifndef pdMS_TO_TICKS
-	#define pdMS_TO_TICKS( xTimeInMs ) ( ( TickType_t ) ( ( ( TickType_t ) ( xTimeInMs ) * ( TickType_t ) configTICK_RATE_HZ ) / ( TickType_t ) 1000 ) )
+    #define pdMS_TO_TICKS( xTimeInMs )    ( ( TickType_t ) ( ( ( TickType_t ) ( xTimeInMs ) * ( TickType_t ) configTICK_RATE_HZ ) / ( TickType_t ) 1000U ) )
 #endif
 
-#define pdFALSE			( ( BaseType_t ) 0 )
-#define pdTRUE			( ( BaseType_t ) 1 )
+#define pdFALSE                                  ( ( BaseType_t ) 0 )
+#define pdTRUE                                   ( ( BaseType_t ) 1 )
 
-#define pdPASS			( pdTRUE )
-#define pdFAIL			( pdFALSE )
-#define errQUEUE_EMPTY	( ( BaseType_t ) 0 )
-#define errQUEUE_FULL	( ( BaseType_t ) 0 )
+#define pdPASS                                   ( pdTRUE )
+#define pdFAIL                                   ( pdFALSE )
+#define errQUEUE_EMPTY                           ( ( BaseType_t ) 0 )
+#define errQUEUE_FULL                            ( ( BaseType_t ) 0 )
 
 /* FreeRTOS error definitions. */
-#define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY	( -1 )
-#define errQUEUE_BLOCKED						( -4 )
-#define errQUEUE_YIELD							( -5 )
+#define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY    ( -1 )
+#define errQUEUE_BLOCKED                         ( -4 )
+#define errQUEUE_YIELD                           ( -5 )
 
 /* Macros used for basic data corruption checks. */
 #ifndef configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES
-	#define configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES 0
+    #define configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES    0
 #endif
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	#define pdINTEGRITY_CHECK_VALUE 0x5a5a
+#if ( configUSE_16_BIT_TICKS == 1 )
+    #define pdINTEGRITY_CHECK_VALUE    0x5a5a
 #else
-	#define pdINTEGRITY_CHECK_VALUE 0x5a5a5a5aUL
+    #define pdINTEGRITY_CHECK_VALUE    0x5a5a5a5aUL
 #endif
 
 /* The following errno values are used by FreeRTOS+ components, not FreeRTOS
-itself. */
-#define pdFREERTOS_ERRNO_NONE			0	/* No errors */
-#define	pdFREERTOS_ERRNO_ENOENT			2	/* No such file or directory */
-#define	pdFREERTOS_ERRNO_EINTR			4	/* Interrupted system call */
-#define	pdFREERTOS_ERRNO_EIO			5	/* I/O error */
-#define	pdFREERTOS_ERRNO_ENXIO			6	/* No such device or address */
-#define	pdFREERTOS_ERRNO_EBADF			9	/* Bad file number */
-#define	pdFREERTOS_ERRNO_EAGAIN			11	/* No more processes */
-#define	pdFREERTOS_ERRNO_EWOULDBLOCK	11	/* Operation would block */
-#define	pdFREERTOS_ERRNO_ENOMEM			12	/* Not enough memory */
-#define	pdFREERTOS_ERRNO_EACCES			13	/* Permission denied */
-#define	pdFREERTOS_ERRNO_EFAULT			14	/* Bad address */
-#define	pdFREERTOS_ERRNO_EBUSY			16	/* Mount device busy */
-#define	pdFREERTOS_ERRNO_EEXIST			17	/* File exists */
-#define	pdFREERTOS_ERRNO_EXDEV			18	/* Cross-device link */
-#define	pdFREERTOS_ERRNO_ENODEV			19	/* No such device */
-#define	pdFREERTOS_ERRNO_ENOTDIR		20	/* Not a directory */
-#define	pdFREERTOS_ERRNO_EISDIR			21	/* Is a directory */
-#define	pdFREERTOS_ERRNO_EINVAL			22	/* Invalid argument */
-#define	pdFREERTOS_ERRNO_ENOSPC			28	/* No space left on device */
-#define	pdFREERTOS_ERRNO_ESPIPE			29	/* Illegal seek */
-#define	pdFREERTOS_ERRNO_EROFS			30	/* Read only file system */
-#define	pdFREERTOS_ERRNO_EUNATCH		42	/* Protocol driver not attached */
-#define	pdFREERTOS_ERRNO_EBADE			50	/* Invalid exchange */
-#define	pdFREERTOS_ERRNO_EFTYPE			79	/* Inappropriate file type or format */
-#define	pdFREERTOS_ERRNO_ENMFILE		89	/* No more files */
-#define	pdFREERTOS_ERRNO_ENOTEMPTY		90	/* Directory not empty */
-#define	pdFREERTOS_ERRNO_ENAMETOOLONG 	91	/* File or path name too long */
-#define	pdFREERTOS_ERRNO_EOPNOTSUPP		95	/* Operation not supported on transport endpoint */
-#define	pdFREERTOS_ERRNO_ENOBUFS		105	/* No buffer space available */
-#define	pdFREERTOS_ERRNO_ENOPROTOOPT	109	/* Protocol not available */
-#define	pdFREERTOS_ERRNO_EADDRINUSE		112	/* Address already in use */
-#define	pdFREERTOS_ERRNO_ETIMEDOUT		116	/* Connection timed out */
-#define	pdFREERTOS_ERRNO_EINPROGRESS	119	/* Connection already in progress */
-#define	pdFREERTOS_ERRNO_EALREADY		120	/* Socket already connected */
-#define	pdFREERTOS_ERRNO_EADDRNOTAVAIL 	125	/* Address not available */
-#define	pdFREERTOS_ERRNO_EISCONN		127	/* Socket is already connected */
-#define	pdFREERTOS_ERRNO_ENOTCONN		128	/* Socket is not connected */
-#define	pdFREERTOS_ERRNO_ENOMEDIUM		135	/* No medium inserted */
-#define	pdFREERTOS_ERRNO_EILSEQ			138	/* An invalid UTF-16 sequence was encountered. */
-#define	pdFREERTOS_ERRNO_ECANCELED		140	/* Operation canceled. */
+ * itself. */
+#define pdFREERTOS_ERRNO_NONE             0   /* No errors */
+#define pdFREERTOS_ERRNO_ENOENT           2   /* No such file or directory */
+#define pdFREERTOS_ERRNO_EINTR            4   /* Interrupted system call */
+#define pdFREERTOS_ERRNO_EIO              5   /* I/O error */
+#define pdFREERTOS_ERRNO_ENXIO            6   /* No such device or address */
+#define pdFREERTOS_ERRNO_EBADF            9   /* Bad file number */
+#define pdFREERTOS_ERRNO_EAGAIN           11  /* No more processes */
+#define pdFREERTOS_ERRNO_EWOULDBLOCK      11  /* Operation would block */
+#define pdFREERTOS_ERRNO_ENOMEM           12  /* Not enough memory */
+#define pdFREERTOS_ERRNO_EACCES           13  /* Permission denied */
+#define pdFREERTOS_ERRNO_EFAULT           14  /* Bad address */
+#define pdFREERTOS_ERRNO_EBUSY            16  /* Mount device busy */
+#define pdFREERTOS_ERRNO_EEXIST           17  /* File exists */
+#define pdFREERTOS_ERRNO_EXDEV            18  /* Cross-device link */
+#define pdFREERTOS_ERRNO_ENODEV           19  /* No such device */
+#define pdFREERTOS_ERRNO_ENOTDIR          20  /* Not a directory */
+#define pdFREERTOS_ERRNO_EISDIR           21  /* Is a directory */
+#define pdFREERTOS_ERRNO_EINVAL           22  /* Invalid argument */
+#define pdFREERTOS_ERRNO_ENOSPC           28  /* No space left on device */
+#define pdFREERTOS_ERRNO_ESPIPE           29  /* Illegal seek */
+#define pdFREERTOS_ERRNO_EROFS            30  /* Read only file system */
+#define pdFREERTOS_ERRNO_EUNATCH          42  /* Protocol driver not attached */
+#define pdFREERTOS_ERRNO_EBADE            50  /* Invalid exchange */
+#define pdFREERTOS_ERRNO_EFTYPE           79  /* Inappropriate file type or format */
+#define pdFREERTOS_ERRNO_ENMFILE          89  /* No more files */
+#define pdFREERTOS_ERRNO_ENOTEMPTY        90  /* Directory not empty */
+#define pdFREERTOS_ERRNO_ENAMETOOLONG     91  /* File or path name too long */
+#define pdFREERTOS_ERRNO_EOPNOTSUPP       95  /* Operation not supported on transport endpoint */
+#define pdFREERTOS_ERRNO_ENOBUFS          105 /* No buffer space available */
+#define pdFREERTOS_ERRNO_ENOPROTOOPT      109 /* Protocol not available */
+#define pdFREERTOS_ERRNO_EADDRINUSE       112 /* Address already in use */
+#define pdFREERTOS_ERRNO_ETIMEDOUT        116 /* Connection timed out */
+#define pdFREERTOS_ERRNO_EINPROGRESS      119 /* Connection already in progress */
+#define pdFREERTOS_ERRNO_EALREADY         120 /* Socket already connected */
+#define pdFREERTOS_ERRNO_EADDRNOTAVAIL    125 /* Address not available */
+#define pdFREERTOS_ERRNO_EISCONN          127 /* Socket is already connected */
+#define pdFREERTOS_ERRNO_ENOTCONN         128 /* Socket is not connected */
+#define pdFREERTOS_ERRNO_ENOMEDIUM        135 /* No medium inserted */
+#define pdFREERTOS_ERRNO_EILSEQ           138 /* An invalid UTF-16 sequence was encountered. */
+#define pdFREERTOS_ERRNO_ECANCELED        140 /* Operation canceled. */
 
 /* The following endian values are used by FreeRTOS+ components, not FreeRTOS
-itself. */
-#define pdFREERTOS_LITTLE_ENDIAN		0
-#define pdFREERTOS_BIG_ENDIAN			1
+ * itself. */
+#define pdFREERTOS_LITTLE_ENDIAN          0
+#define pdFREERTOS_BIG_ENDIAN             1
 
 /* Re-defining endian values for generic naming. */
-#define pdLITTLE_ENDIAN					pdFREERTOS_LITTLE_ENDIAN
-#define pdBIG_ENDIAN					pdFREERTOS_BIG_ENDIAN
+#define pdLITTLE_ENDIAN                   pdFREERTOS_LITTLE_ENDIAN
+#define pdBIG_ENDIAN                      pdFREERTOS_BIG_ENDIAN
 
 
 #endif /* PROJDEFS_H */
-
-
-
diff --git a/include/queue.h b/include/queue.h
index fb8231528..738287581 100644
--- a/include/queue.h
+++ b/include/queue.h
@@ -1,1655 +1,1716 @@
-/*
- * FreeRTOS Kernel V10.3.1
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-
-#ifndef QUEUE_H
-#define QUEUE_H
-
-#ifndef INC_FREERTOS_H
-	#error "include FreeRTOS.h" must appear in source files before "include queue.h"
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include "task.h"
-
-/**
- * Type by which queues are referenced.  For example, a call to xQueueCreate()
- * returns an QueueHandle_t variable that can then be used as a parameter to
- * xQueueSend(), xQueueReceive(), etc.
- */
-struct QueueDefinition; /* Using old naming convention so as not to break kernel aware debuggers. */
-typedef struct QueueDefinition * QueueHandle_t;
-
-/**
- * Type by which queue sets are referenced.  For example, a call to
- * xQueueCreateSet() returns an xQueueSet variable that can then be used as a
- * parameter to xQueueSelectFromSet(), xQueueAddToSet(), etc.
- */
-typedef struct QueueDefinition * QueueSetHandle_t;
-
-/**
- * Queue sets can contain both queues and semaphores, so the
- * QueueSetMemberHandle_t is defined as a type to be used where a parameter or
- * return value can be either an QueueHandle_t or an SemaphoreHandle_t.
- */
-typedef struct QueueDefinition * QueueSetMemberHandle_t;
-
-/* For internal use only. */
-#define	queueSEND_TO_BACK		( ( BaseType_t ) 0 )
-#define	queueSEND_TO_FRONT		( ( BaseType_t ) 1 )
-#define queueOVERWRITE			( ( BaseType_t ) 2 )
-
-/* For internal use only.  These definitions *must* match those in queue.c. */
-#define queueQUEUE_TYPE_BASE				( ( uint8_t ) 0U )
-#define queueQUEUE_TYPE_SET					( ( uint8_t ) 0U )
-#define queueQUEUE_TYPE_MUTEX 				( ( uint8_t ) 1U )
-#define queueQUEUE_TYPE_COUNTING_SEMAPHORE	( ( uint8_t ) 2U )
-#define queueQUEUE_TYPE_BINARY_SEMAPHORE	( ( uint8_t ) 3U )
-#define queueQUEUE_TYPE_RECURSIVE_MUTEX		( ( uint8_t ) 4U )
-
-/**
- * queue. h
- * 
- QueueHandle_t xQueueCreate(
-							  UBaseType_t uxQueueLength,
-							  UBaseType_t uxItemSize
-						  );
- * 

- *
- * Creates a new queue instance, and returns a handle by which the new queue
- * can be referenced.
- *
- * Internally, within the FreeRTOS implementation, queues use two blocks of
- * memory.  The first block is used to hold the queue's data structures.  The
- * second block is used to hold items placed into the queue.  If a queue is
- * created using xQueueCreate() then both blocks of memory are automatically
- * dynamically allocated inside the xQueueCreate() function.  (see
- * http://www.freertos.org/a00111.html).  If a queue is created using
- * xQueueCreateStatic() then the application writer must provide the memory that
- * will get used by the queue.  xQueueCreateStatic() therefore allows a queue to
- * be created without using any dynamic memory allocation.
- *
- * http://www.FreeRTOS.org/Embedded-RTOS-Queues.html
- *
- * @param uxQueueLength The maximum number of items that the queue can contain.
- *
- * @param uxItemSize The number of bytes each item in the queue will require.
- * Items are queued by copy, not by reference, so this is the number of bytes
- * that will be copied for each posted item.  Each item on the queue must be
- * the same size.
- *
- * @return If the queue is successfully create then a handle to the newly
- * created queue is returned.  If the queue cannot be created then 0 is
- * returned.
- *
- * Example usage:
-   
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- };
-
- void vATask( void *pvParameters )
- {
- QueueHandle_t xQueue1, xQueue2;
-
-	// Create a queue capable of containing 10 uint32_t values.
-	xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
-	if( xQueue1 == 0 )
-	{
-		// Queue was not created and must not be used.
-	}
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-	if( xQueue2 == 0 )
-	{
-		// Queue was not created and must not be used.
-	}
-
-	// ... Rest of task code.
- }
- 

- * \defgroup xQueueCreate xQueueCreate
- * \ingroup QueueManagement
- */
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-	#define xQueueCreate( uxQueueLength, uxItemSize ) xQueueGenericCreate( ( uxQueueLength ), ( uxItemSize ), ( queueQUEUE_TYPE_BASE ) )
-#endif
-
-/**
- * queue. h
- * 
- QueueHandle_t xQueueCreateStatic(
-							  UBaseType_t uxQueueLength,
-							  UBaseType_t uxItemSize,
-							  uint8_t *pucQueueStorageBuffer,
-							  StaticQueue_t *pxQueueBuffer
-						  );
- * 

- *
- * Creates a new queue instance, and returns a handle by which the new queue
- * can be referenced.
- *
- * Internally, within the FreeRTOS implementation, queues use two blocks of
- * memory.  The first block is used to hold the queue's data structures.  The
- * second block is used to hold items placed into the queue.  If a queue is
- * created using xQueueCreate() then both blocks of memory are automatically
- * dynamically allocated inside the xQueueCreate() function.  (see
- * http://www.freertos.org/a00111.html).  If a queue is created using
- * xQueueCreateStatic() then the application writer must provide the memory that
- * will get used by the queue.  xQueueCreateStatic() therefore allows a queue to
- * be created without using any dynamic memory allocation.
- *
- * http://www.FreeRTOS.org/Embedded-RTOS-Queues.html
- *
- * @param uxQueueLength The maximum number of items that the queue can contain.
- *
- * @param uxItemSize The number of bytes each item in the queue will require.
- * Items are queued by copy, not by reference, so this is the number of bytes
- * that will be copied for each posted item.  Each item on the queue must be
- * the same size.
- *
- * @param pucQueueStorageBuffer If uxItemSize is not zero then
- * pucQueueStorageBuffer must point to a uint8_t array that is at least large
- * enough to hold the maximum number of items that can be in the queue at any
- * one time - which is ( uxQueueLength * uxItemsSize ) bytes.  If uxItemSize is
- * zero then pucQueueStorageBuffer can be NULL.
- *
- * @param pxQueueBuffer Must point to a variable of type StaticQueue_t, which
- * will be used to hold the queue's data structure.
- *
- * @return If the queue is created then a handle to the created queue is
- * returned.  If pxQueueBuffer is NULL then NULL is returned.
- *
- * Example usage:
-   
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- };
-
- #define QUEUE_LENGTH 10
- #define ITEM_SIZE sizeof( uint32_t )
-
- // xQueueBuffer will hold the queue structure.
- StaticQueue_t xQueueBuffer;
-
- // ucQueueStorage will hold the items posted to the queue.  Must be at least
- // [(queue length) * ( queue item size)] bytes long.
- uint8_t ucQueueStorage[ QUEUE_LENGTH * ITEM_SIZE ];
-
- void vATask( void *pvParameters )
- {
- QueueHandle_t xQueue1;
-
-	// Create a queue capable of containing 10 uint32_t values.
-	xQueue1 = xQueueCreate( QUEUE_LENGTH, // The number of items the queue can hold.
-							ITEM_SIZE	  // The size of each item in the queue
-							&( ucQueueStorage[ 0 ] ), // The buffer that will hold the items in the queue.
-							&xQueueBuffer ); // The buffer that will hold the queue structure.
-
-	// The queue is guaranteed to be created successfully as no dynamic memory
-	// allocation is used.  Therefore xQueue1 is now a handle to a valid queue.
-
-	// ... Rest of task code.
- }
- 

- * \defgroup xQueueCreateStatic xQueueCreateStatic
- * \ingroup QueueManagement
- */
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-	#define xQueueCreateStatic( uxQueueLength, uxItemSize, pucQueueStorage, pxQueueBuffer ) xQueueGenericCreateStatic( ( uxQueueLength ), ( uxItemSize ), ( pucQueueStorage ), ( pxQueueBuffer ), ( queueQUEUE_TYPE_BASE ) )
-#endif /* configSUPPORT_STATIC_ALLOCATION */
-
-/**
- * queue. h
- * 
- BaseType_t xQueueSendToToFront(
-								   QueueHandle_t	xQueue,
-								   const void		*pvItemToQueue,
-								   TickType_t		xTicksToWait
-							   );
- * 

- *
- * Post an item to the front of a queue.  The item is queued by copy, not by
- * reference.  This function must not be called from an interrupt service
- * routine.  See xQueueSendFromISR () for an alternative which may be used
- * in an ISR.
- *
- * @param xQueue The handle to the queue on which the item is to be posted.
- *
- * @param pvItemToQueue A pointer to the item that is to be placed on the
- * queue.  The size of the items the queue will hold was defined when the
- * queue was created, so this many bytes will be copied from pvItemToQueue
- * into the queue storage area.
- *
- * @param xTicksToWait The maximum amount of time the task should block
- * waiting for space to become available on the queue, should it already
- * be full.  The call will return immediately if this is set to 0 and the
- * queue is full.  The time is defined in tick periods so the constant
- * portTICK_PERIOD_MS should be used to convert to real time if this is required.
- *
- * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
- *
- * Example usage:
-   
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- uint32_t ulVar = 10UL;
-
- void vATask( void *pvParameters )
- {
- QueueHandle_t xQueue1, xQueue2;
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 uint32_t values.
-	xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-
-	// ...
-
-	if( xQueue1 != 0 )
-	{
-		// Send an uint32_t.  Wait for 10 ticks for space to become
-		// available if necessary.
-		if( xQueueSendToFront( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )
-		{
-			// Failed to post the message, even after 10 ticks.
-		}
-	}
-
-	if( xQueue2 != 0 )
-	{
-		// Send a pointer to a struct AMessage object.  Don't block if the
-		// queue is already full.
-		pxMessage = & xMessage;
-		xQueueSendToFront( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );
-	}
-
-	// ... Rest of task code.
- }
- 

- * \defgroup xQueueSend xQueueSend
- * \ingroup QueueManagement
- */
-#define xQueueSendToFront( xQueue, pvItemToQueue, xTicksToWait ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_FRONT )
-
-/**
- * queue. h
- * 
- BaseType_t xQueueSendToBack(
-								   QueueHandle_t	xQueue,
-								   const void		*pvItemToQueue,
-								   TickType_t		xTicksToWait
-							   );
- * 

- *
- * This is a macro that calls xQueueGenericSend().
- *
- * Post an item to the back of a queue.  The item is queued by copy, not by
- * reference.  This function must not be called from an interrupt service
- * routine.  See xQueueSendFromISR () for an alternative which may be used
- * in an ISR.
- *
- * @param xQueue The handle to the queue on which the item is to be posted.
- *
- * @param pvItemToQueue A pointer to the item that is to be placed on the
- * queue.  The size of the items the queue will hold was defined when the
- * queue was created, so this many bytes will be copied from pvItemToQueue
- * into the queue storage area.
- *
- * @param xTicksToWait The maximum amount of time the task should block
- * waiting for space to become available on the queue, should it already
- * be full.  The call will return immediately if this is set to 0 and the queue
- * is full.  The  time is defined in tick periods so the constant
- * portTICK_PERIOD_MS should be used to convert to real time if this is required.
- *
- * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
- *
- * Example usage:
-   
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- uint32_t ulVar = 10UL;
-
- void vATask( void *pvParameters )
- {
- QueueHandle_t xQueue1, xQueue2;
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 uint32_t values.
-	xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-
-	// ...
-
-	if( xQueue1 != 0 )
-	{
-		// Send an uint32_t.  Wait for 10 ticks for space to become
-		// available if necessary.
-		if( xQueueSendToBack( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )
-		{
-			// Failed to post the message, even after 10 ticks.
-		}
-	}
-
-	if( xQueue2 != 0 )
-	{
-		// Send a pointer to a struct AMessage object.  Don't block if the
-		// queue is already full.
-		pxMessage = & xMessage;
-		xQueueSendToBack( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );
-	}
-
-	// ... Rest of task code.
- }
- 

- * \defgroup xQueueSend xQueueSend
- * \ingroup QueueManagement
- */
-#define xQueueSendToBack( xQueue, pvItemToQueue, xTicksToWait ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK )
-
-/**
- * queue. h
- * 
- BaseType_t xQueueSend(
-							  QueueHandle_t xQueue,
-							  const void * pvItemToQueue,
-							  TickType_t xTicksToWait
-						 );
- * 

- *
- * This is a macro that calls xQueueGenericSend().  It is included for
- * backward compatibility with versions of FreeRTOS.org that did not
- * include the xQueueSendToFront() and xQueueSendToBack() macros.  It is
- * equivalent to xQueueSendToBack().
- *
- * Post an item on a queue.  The item is queued by copy, not by reference.
- * This function must not be called from an interrupt service routine.
- * See xQueueSendFromISR () for an alternative which may be used in an ISR.
- *
- * @param xQueue The handle to the queue on which the item is to be posted.
- *
- * @param pvItemToQueue A pointer to the item that is to be placed on the
- * queue.  The size of the items the queue will hold was defined when the
- * queue was created, so this many bytes will be copied from pvItemToQueue
- * into the queue storage area.
- *
- * @param xTicksToWait The maximum amount of time the task should block
- * waiting for space to become available on the queue, should it already
- * be full.  The call will return immediately if this is set to 0 and the
- * queue is full.  The time is defined in tick periods so the constant
- * portTICK_PERIOD_MS should be used to convert to real time if this is required.
- *
- * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
- *
- * Example usage:
-   
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- uint32_t ulVar = 10UL;
-
- void vATask( void *pvParameters )
- {
- QueueHandle_t xQueue1, xQueue2;
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 uint32_t values.
-	xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-
-	// ...
-
-	if( xQueue1 != 0 )
-	{
-		// Send an uint32_t.  Wait for 10 ticks for space to become
-		// available if necessary.
-		if( xQueueSend( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )
-		{
-			// Failed to post the message, even after 10 ticks.
-		}
-	}
-
-	if( xQueue2 != 0 )
-	{
-		// Send a pointer to a struct AMessage object.  Don't block if the
-		// queue is already full.
-		pxMessage = & xMessage;
-		xQueueSend( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );
-	}
-
-	// ... Rest of task code.
- }
- 

- * \defgroup xQueueSend xQueueSend
- * \ingroup QueueManagement
- */
-#define xQueueSend( xQueue, pvItemToQueue, xTicksToWait ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK )
-
-/**
- * queue. h
- * 
- BaseType_t xQueueOverwrite(
-							  QueueHandle_t xQueue,
-							  const void * pvItemToQueue
-						 );
- * 

- *
- * Only for use with queues that have a length of one - so the queue is either
- * empty or full.
- *
- * Post an item on a queue.  If the queue is already full then overwrite the
- * value held in the queue.  The item is queued by copy, not by reference.
- *
- * This function must not be called from an interrupt service routine.
- * See xQueueOverwriteFromISR () for an alternative which may be used in an ISR.
- *
- * @param xQueue The handle of the queue to which the data is being sent.
- *
- * @param pvItemToQueue A pointer to the item that is to be placed on the
- * queue.  The size of the items the queue will hold was defined when the
- * queue was created, so this many bytes will be copied from pvItemToQueue
- * into the queue storage area.
- *
- * @return xQueueOverwrite() is a macro that calls xQueueGenericSend(), and
- * therefore has the same return values as xQueueSendToFront().  However, pdPASS
- * is the only value that can be returned because xQueueOverwrite() will write
- * to the queue even when the queue is already full.
- *
- * Example usage:
-   
-
- void vFunction( void *pvParameters )
- {
- QueueHandle_t xQueue;
- uint32_t ulVarToSend, ulValReceived;
-
-	// Create a queue to hold one uint32_t value.  It is strongly
-	// recommended *not* to use xQueueOverwrite() on queues that can
-	// contain more than one value, and doing so will trigger an assertion
-	// if configASSERT() is defined.
-	xQueue = xQueueCreate( 1, sizeof( uint32_t ) );
-
-	// Write the value 10 to the queue using xQueueOverwrite().
-	ulVarToSend = 10;
-	xQueueOverwrite( xQueue, &ulVarToSend );
-
-	// Peeking the queue should now return 10, but leave the value 10 in
-	// the queue.  A block time of zero is used as it is known that the
-	// queue holds a value.
-	ulValReceived = 0;
-	xQueuePeek( xQueue, &ulValReceived, 0 );
-
-	if( ulValReceived != 10 )
-	{
-		// Error unless the item was removed by a different task.
-	}
-
-	// The queue is still full.  Use xQueueOverwrite() to overwrite the
-	// value held in the queue with 100.
-	ulVarToSend = 100;
-	xQueueOverwrite( xQueue, &ulVarToSend );
-
-	// This time read from the queue, leaving the queue empty once more.
-	// A block time of 0 is used again.
-	xQueueReceive( xQueue, &ulValReceived, 0 );
-
-	// The value read should be the last value written, even though the
-	// queue was already full when the value was written.
-	if( ulValReceived != 100 )
-	{
-		// Error!
-	}
-
-	// ...
-}
- 

- * \defgroup xQueueOverwrite xQueueOverwrite
- * \ingroup QueueManagement
- */
-#define xQueueOverwrite( xQueue, pvItemToQueue ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), 0, queueOVERWRITE )
-
-
-/**
- * queue. h
- * 
- BaseType_t xQueueGenericSend(
-									QueueHandle_t xQueue,
-									const void * pvItemToQueue,
-									TickType_t xTicksToWait
-									BaseType_t xCopyPosition
-								);
- * 

- *
- * It is preferred that the macros xQueueSend(), xQueueSendToFront() and
- * xQueueSendToBack() are used in place of calling this function directly.
- *
- * Post an item on a queue.  The item is queued by copy, not by reference.
- * This function must not be called from an interrupt service routine.
- * See xQueueSendFromISR () for an alternative which may be used in an ISR.
- *
- * @param xQueue The handle to the queue on which the item is to be posted.
- *
- * @param pvItemToQueue A pointer to the item that is to be placed on the
- * queue.  The size of the items the queue will hold was defined when the
- * queue was created, so this many bytes will be copied from pvItemToQueue
- * into the queue storage area.
- *
- * @param xTicksToWait The maximum amount of time the task should block
- * waiting for space to become available on the queue, should it already
- * be full.  The call will return immediately if this is set to 0 and the
- * queue is full.  The time is defined in tick periods so the constant
- * portTICK_PERIOD_MS should be used to convert to real time if this is required.
- *
- * @param xCopyPosition Can take the value queueSEND_TO_BACK to place the
- * item at the back of the queue, or queueSEND_TO_FRONT to place the item
- * at the front of the queue (for high priority messages).
- *
- * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
- *
- * Example usage:
-   
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- uint32_t ulVar = 10UL;
-
- void vATask( void *pvParameters )
- {
- QueueHandle_t xQueue1, xQueue2;
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 uint32_t values.
-	xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-
-	// ...
-
-	if( xQueue1 != 0 )
-	{
-		// Send an uint32_t.  Wait for 10 ticks for space to become
-		// available if necessary.
-		if( xQueueGenericSend( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10, queueSEND_TO_BACK ) != pdPASS )
-		{
-			// Failed to post the message, even after 10 ticks.
-		}
-	}
-
-	if( xQueue2 != 0 )
-	{
-		// Send a pointer to a struct AMessage object.  Don't block if the
-		// queue is already full.
-		pxMessage = & xMessage;
-		xQueueGenericSend( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0, queueSEND_TO_BACK );
-	}
-
-	// ... Rest of task code.
- }
- 

- * \defgroup xQueueSend xQueueSend
- * \ingroup QueueManagement
- */
-BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION;
-
-/**
- * queue. h
- * 
- BaseType_t xQueuePeek(
-							 QueueHandle_t xQueue,
-							 void * const pvBuffer,
-							 TickType_t xTicksToWait
-						 );

- *
- * Receive an item from a queue without removing the item from the queue.
- * The item is received by copy so a buffer of adequate size must be
- * provided.  The number of bytes copied into the buffer was defined when
- * the queue was created.
- *
- * Successfully received items remain on the queue so will be returned again
- * by the next call, or a call to xQueueReceive().
- *
- * This macro must not be used in an interrupt service routine.  See
- * xQueuePeekFromISR() for an alternative that can be called from an interrupt
- * service routine.
- *
- * @param xQueue The handle to the queue from which the item is to be
- * received.
- *
- * @param pvBuffer Pointer to the buffer into which the received item will
- * be copied.
- *
- * @param xTicksToWait The maximum amount of time the task should block
- * waiting for an item to receive should the queue be empty at the time
- * of the call.	 The time is defined in tick periods so the constant
- * portTICK_PERIOD_MS should be used to convert to real time if this is required.
- * xQueuePeek() will return immediately if xTicksToWait is 0 and the queue
- * is empty.
- *
- * @return pdTRUE if an item was successfully received from the queue,
- * otherwise pdFALSE.
- *
- * Example usage:
-   
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- QueueHandle_t xQueue;
-
- // Task to create a queue and post a value.
- void vATask( void *pvParameters )
- {
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );
-	if( xQueue == 0 )
-	{
-		// Failed to create the queue.
-	}
-
-	// ...
-
-	// Send a pointer to a struct AMessage object.  Don't block if the
-	// queue is already full.
-	pxMessage = & xMessage;
-	xQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 );
-
-	// ... Rest of task code.
- }
-
- // Task to peek the data from the queue.
- void vADifferentTask( void *pvParameters )
- {
- struct AMessage *pxRxedMessage;
-
-	if( xQueue != 0 )
-	{
-		// Peek a message on the created queue.  Block for 10 ticks if a
-		// message is not immediately available.
-		if( xQueuePeek( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) )
-		{
-			// pcRxedMessage now points to the struct AMessage variable posted
-			// by vATask, but the item still remains on the queue.
-		}
-	}
-
-	// ... Rest of task code.
- }
- 

- * \defgroup xQueuePeek xQueuePeek
- * \ingroup QueueManagement
- */
-BaseType_t xQueuePeek( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
-
-/**
- * queue. h
- * 
- BaseType_t xQueuePeekFromISR(
-									QueueHandle_t xQueue,
-									void *pvBuffer,
-								);

- *
- * A version of xQueuePeek() that can be called from an interrupt service
- * routine (ISR).
- *
- * Receive an item from a queue without removing the item from the queue.
- * The item is received by copy so a buffer of adequate size must be
- * provided.  The number of bytes copied into the buffer was defined when
- * the queue was created.
- *
- * Successfully received items remain on the queue so will be returned again
- * by the next call, or a call to xQueueReceive().
- *
- * @param xQueue The handle to the queue from which the item is to be
- * received.
- *
- * @param pvBuffer Pointer to the buffer into which the received item will
- * be copied.
- *
- * @return pdTRUE if an item was successfully received from the queue,
- * otherwise pdFALSE.
- *
- * \defgroup xQueuePeekFromISR xQueuePeekFromISR
- * \ingroup QueueManagement
- */
-BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue, void * const pvBuffer ) PRIVILEGED_FUNCTION;
-
-/**
- * queue. h
- * 
- BaseType_t xQueueReceive(
-								 QueueHandle_t xQueue,
-								 void *pvBuffer,
-								 TickType_t xTicksToWait
-							);

- *
- * Receive an item from a queue.  The item is received by copy so a buffer of
- * adequate size must be provided.  The number of bytes copied into the buffer
- * was defined when the queue was created.
- *
- * Successfully received items are removed from the queue.
- *
- * This function must not be used in an interrupt service routine.  See
- * xQueueReceiveFromISR for an alternative that can.
- *
- * @param xQueue The handle to the queue from which the item is to be
- * received.
- *
- * @param pvBuffer Pointer to the buffer into which the received item will
- * be copied.
- *
- * @param xTicksToWait The maximum amount of time the task should block
- * waiting for an item to receive should the queue be empty at the time
- * of the call.	 xQueueReceive() will return immediately if xTicksToWait
- * is zero and the queue is empty.  The time is defined in tick periods so the
- * constant portTICK_PERIOD_MS should be used to convert to real time if this is
- * required.
- *
- * @return pdTRUE if an item was successfully received from the queue,
- * otherwise pdFALSE.
- *
- * Example usage:
-   
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- QueueHandle_t xQueue;
-
- // Task to create a queue and post a value.
- void vATask( void *pvParameters )
- {
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );
-	if( xQueue == 0 )
-	{
-		// Failed to create the queue.
-	}
-
-	// ...
-
-	// Send a pointer to a struct AMessage object.  Don't block if the
-	// queue is already full.
-	pxMessage = & xMessage;
-	xQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 );
-
-	// ... Rest of task code.
- }
-
- // Task to receive from the queue.
- void vADifferentTask( void *pvParameters )
- {
- struct AMessage *pxRxedMessage;
-
-	if( xQueue != 0 )
-	{
-		// Receive a message on the created queue.  Block for 10 ticks if a
-		// message is not immediately available.
-		if( xQueueReceive( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) )
-		{
-			// pcRxedMessage now points to the struct AMessage variable posted
-			// by vATask.
-		}
-	}
-
-	// ... Rest of task code.
- }
- 

- * \defgroup xQueueReceive xQueueReceive
- * \ingroup QueueManagement
- */
-BaseType_t xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
-
-/**
- * queue. h
- * 
UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue );

- *
- * Return the number of messages stored in a queue.
- *
- * @param xQueue A handle to the queue being queried.
- *
- * @return The number of messages available in the queue.
- *
- * \defgroup uxQueueMessagesWaiting uxQueueMessagesWaiting
- * \ingroup QueueManagement
- */
-UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
-
-/**
- * queue. h
- * 
UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue );

- *
- * Return the number of free spaces available in a queue.  This is equal to the
- * number of items that can be sent to the queue before the queue becomes full
- * if no items are removed.
- *
- * @param xQueue A handle to the queue being queried.
- *
- * @return The number of spaces available in the queue.
- *
- * \defgroup uxQueueMessagesWaiting uxQueueMessagesWaiting
- * \ingroup QueueManagement
- */
-UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
-
-/**
- * queue. h
- * 
void vQueueDelete( QueueHandle_t xQueue );

- *
- * Delete a queue - freeing all the memory allocated for storing of items
- * placed on the queue.
- *
- * @param xQueue A handle to the queue to be deleted.
- *
- * \defgroup vQueueDelete vQueueDelete
- * \ingroup QueueManagement
- */
-void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
-
-/**
- * queue. h
- * 
- BaseType_t xQueueSendToFrontFromISR(
-										 QueueHandle_t xQueue,
-										 const void *pvItemToQueue,
-										 BaseType_t *pxHigherPriorityTaskWoken
-									  );
- 

- *
- * This is a macro that calls xQueueGenericSendFromISR().
- *
- * Post an item to the front of a queue.  It is safe to use this macro from
- * within an interrupt service routine.
- *
- * Items are queued by copy not reference so it is preferable to only
- * queue small items, especially when called from an ISR.  In most cases
- * it would be preferable to store a pointer to the item being queued.
- *
- * @param xQueue The handle to the queue on which the item is to be posted.
- *
- * @param pvItemToQueue A pointer to the item that is to be placed on the
- * queue.  The size of the items the queue will hold was defined when the
- * queue was created, so this many bytes will be copied from pvItemToQueue
- * into the queue storage area.
- *
- * @param pxHigherPriorityTaskWoken xQueueSendToFrontFromISR() will set
- * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
- * to unblock, and the unblocked task has a priority higher than the currently
- * running task.  If xQueueSendToFromFromISR() sets this value to pdTRUE then
- * a context switch should be requested before the interrupt is exited.
- *
- * @return pdTRUE if the data was successfully sent to the queue, otherwise
- * errQUEUE_FULL.
- *
- * Example usage for buffered IO (where the ISR can obtain more than one value
- * per call):
-   
- void vBufferISR( void )
- {
- char cIn;
- BaseType_t xHigherPrioritTaskWoken;
-
-	// We have not woken a task at the start of the ISR.
-	xHigherPriorityTaskWoken = pdFALSE;
-
-	// Loop until the buffer is empty.
-	do
-	{
-		// Obtain a byte from the buffer.
-		cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
-
-		// Post the byte.
-		xQueueSendToFrontFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
-
-	} while( portINPUT_BYTE( BUFFER_COUNT ) );
-
-	// Now the buffer is empty we can switch context if necessary.
-	if( xHigherPriorityTaskWoken )
-	{
-		taskYIELD ();
-	}
- }
- 

- *
- * \defgroup xQueueSendFromISR xQueueSendFromISR
- * \ingroup QueueManagement
- */
-#define xQueueSendToFrontFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_FRONT )
-
-
-/**
- * queue. h
- * 
- BaseType_t xQueueSendToBackFromISR(
-										 QueueHandle_t xQueue,
-										 const void *pvItemToQueue,
-										 BaseType_t *pxHigherPriorityTaskWoken
-									  );
- 

- *
- * This is a macro that calls xQueueGenericSendFromISR().
- *
- * Post an item to the back of a queue.  It is safe to use this macro from
- * within an interrupt service routine.
- *
- * Items are queued by copy not reference so it is preferable to only
- * queue small items, especially when called from an ISR.  In most cases
- * it would be preferable to store a pointer to the item being queued.
- *
- * @param xQueue The handle to the queue on which the item is to be posted.
- *
- * @param pvItemToQueue A pointer to the item that is to be placed on the
- * queue.  The size of the items the queue will hold was defined when the
- * queue was created, so this many bytes will be copied from pvItemToQueue
- * into the queue storage area.
- *
- * @param pxHigherPriorityTaskWoken xQueueSendToBackFromISR() will set
- * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
- * to unblock, and the unblocked task has a priority higher than the currently
- * running task.  If xQueueSendToBackFromISR() sets this value to pdTRUE then
- * a context switch should be requested before the interrupt is exited.
- *
- * @return pdTRUE if the data was successfully sent to the queue, otherwise
- * errQUEUE_FULL.
- *
- * Example usage for buffered IO (where the ISR can obtain more than one value
- * per call):
-   
- void vBufferISR( void )
- {
- char cIn;
- BaseType_t xHigherPriorityTaskWoken;
-
-	// We have not woken a task at the start of the ISR.
-	xHigherPriorityTaskWoken = pdFALSE;
-
-	// Loop until the buffer is empty.
-	do
-	{
-		// Obtain a byte from the buffer.
-		cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
-
-		// Post the byte.
-		xQueueSendToBackFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
-
-	} while( portINPUT_BYTE( BUFFER_COUNT ) );
-
-	// Now the buffer is empty we can switch context if necessary.
-	if( xHigherPriorityTaskWoken )
-	{
-		taskYIELD ();
-	}
- }
- 

- *
- * \defgroup xQueueSendFromISR xQueueSendFromISR
- * \ingroup QueueManagement
- */
-#define xQueueSendToBackFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK )
-
-/**
- * queue. h
- * 
- BaseType_t xQueueOverwriteFromISR(
-							  QueueHandle_t xQueue,
-							  const void * pvItemToQueue,
-							  BaseType_t *pxHigherPriorityTaskWoken
-						 );
- * 

- *
- * A version of xQueueOverwrite() that can be used in an interrupt service
- * routine (ISR).
- *
- * Only for use with queues that can hold a single item - so the queue is either
- * empty or full.
- *
- * Post an item on a queue.  If the queue is already full then overwrite the
- * value held in the queue.  The item is queued by copy, not by reference.
- *
- * @param xQueue The handle to the queue on which the item is to be posted.
- *
- * @param pvItemToQueue A pointer to the item that is to be placed on the
- * queue.  The size of the items the queue will hold was defined when the
- * queue was created, so this many bytes will be copied from pvItemToQueue
- * into the queue storage area.
- *
- * @param pxHigherPriorityTaskWoken xQueueOverwriteFromISR() will set
- * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
- * to unblock, and the unblocked task has a priority higher than the currently
- * running task.  If xQueueOverwriteFromISR() sets this value to pdTRUE then
- * a context switch should be requested before the interrupt is exited.
- *
- * @return xQueueOverwriteFromISR() is a macro that calls
- * xQueueGenericSendFromISR(), and therefore has the same return values as
- * xQueueSendToFrontFromISR().  However, pdPASS is the only value that can be
- * returned because xQueueOverwriteFromISR() will write to the queue even when
- * the queue is already full.
- *
- * Example usage:
-   
-
- QueueHandle_t xQueue;
-
- void vFunction( void *pvParameters )
- {
- 	// Create a queue to hold one uint32_t value.  It is strongly
-	// recommended *not* to use xQueueOverwriteFromISR() on queues that can
-	// contain more than one value, and doing so will trigger an assertion
-	// if configASSERT() is defined.
-	xQueue = xQueueCreate( 1, sizeof( uint32_t ) );
-}
-
-void vAnInterruptHandler( void )
-{
-// xHigherPriorityTaskWoken must be set to pdFALSE before it is used.
-BaseType_t xHigherPriorityTaskWoken = pdFALSE;
-uint32_t ulVarToSend, ulValReceived;
-
-	// Write the value 10 to the queue using xQueueOverwriteFromISR().
-	ulVarToSend = 10;
-	xQueueOverwriteFromISR( xQueue, &ulVarToSend, &xHigherPriorityTaskWoken );
-
-	// The queue is full, but calling xQueueOverwriteFromISR() again will still
-	// pass because the value held in the queue will be overwritten with the
-	// new value.
-	ulVarToSend = 100;
-	xQueueOverwriteFromISR( xQueue, &ulVarToSend, &xHigherPriorityTaskWoken );
-
-	// Reading from the queue will now return 100.
-
-	// ...
-
-	if( xHigherPrioritytaskWoken == pdTRUE )
-	{
-		// Writing to the queue caused a task to unblock and the unblocked task
-		// has a priority higher than or equal to the priority of the currently
-		// executing task (the task this interrupt interrupted).  Perform a context
-		// switch so this interrupt returns directly to the unblocked task.
-		portYIELD_FROM_ISR(); // or portEND_SWITCHING_ISR() depending on the port.
-	}
-}
- 

- * \defgroup xQueueOverwriteFromISR xQueueOverwriteFromISR
- * \ingroup QueueManagement
- */
-#define xQueueOverwriteFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueOVERWRITE )
-
-/**
- * queue. h
- * 
- BaseType_t xQueueSendFromISR(
-									 QueueHandle_t xQueue,
-									 const void *pvItemToQueue,
-									 BaseType_t *pxHigherPriorityTaskWoken
-								);
- 

- *
- * This is a macro that calls xQueueGenericSendFromISR().  It is included
- * for backward compatibility with versions of FreeRTOS.org that did not
- * include the xQueueSendToBackFromISR() and xQueueSendToFrontFromISR()
- * macros.
- *
- * Post an item to the back of a queue.  It is safe to use this function from
- * within an interrupt service routine.
- *
- * Items are queued by copy not reference so it is preferable to only
- * queue small items, especially when called from an ISR.  In most cases
- * it would be preferable to store a pointer to the item being queued.
- *
- * @param xQueue The handle to the queue on which the item is to be posted.
- *
- * @param pvItemToQueue A pointer to the item that is to be placed on the
- * queue.  The size of the items the queue will hold was defined when the
- * queue was created, so this many bytes will be copied from pvItemToQueue
- * into the queue storage area.
- *
- * @param pxHigherPriorityTaskWoken xQueueSendFromISR() will set
- * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
- * to unblock, and the unblocked task has a priority higher than the currently
- * running task.  If xQueueSendFromISR() sets this value to pdTRUE then
- * a context switch should be requested before the interrupt is exited.
- *
- * @return pdTRUE if the data was successfully sent to the queue, otherwise
- * errQUEUE_FULL.
- *
- * Example usage for buffered IO (where the ISR can obtain more than one value
- * per call):
-   
- void vBufferISR( void )
- {
- char cIn;
- BaseType_t xHigherPriorityTaskWoken;
-
-	// We have not woken a task at the start of the ISR.
-	xHigherPriorityTaskWoken = pdFALSE;
-
-	// Loop until the buffer is empty.
-	do
-	{
-		// Obtain a byte from the buffer.
-		cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
-
-		// Post the byte.
-		xQueueSendFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
-
-	} while( portINPUT_BYTE( BUFFER_COUNT ) );
-
-	// Now the buffer is empty we can switch context if necessary.
-	if( xHigherPriorityTaskWoken )
-	{
-		// Actual macro used here is port specific.
-		portYIELD_FROM_ISR ();
-	}
- }
- 

- *
- * \defgroup xQueueSendFromISR xQueueSendFromISR
- * \ingroup QueueManagement
- */
-#define xQueueSendFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK )
-
-/**
- * queue. h
- * 
- BaseType_t xQueueGenericSendFromISR(
-										   QueueHandle_t		xQueue,
-										   const	void	*pvItemToQueue,
-										   BaseType_t	*pxHigherPriorityTaskWoken,
-										   BaseType_t	xCopyPosition
-									   );
- 

- *
- * It is preferred that the macros xQueueSendFromISR(),
- * xQueueSendToFrontFromISR() and xQueueSendToBackFromISR() be used in place
- * of calling this function directly.  xQueueGiveFromISR() is an
- * equivalent for use by semaphores that don't actually copy any data.
- *
- * Post an item on a queue.  It is safe to use this function from within an
- * interrupt service routine.
- *
- * Items are queued by copy not reference so it is preferable to only
- * queue small items, especially when called from an ISR.  In most cases
- * it would be preferable to store a pointer to the item being queued.
- *
- * @param xQueue The handle to the queue on which the item is to be posted.
- *
- * @param pvItemToQueue A pointer to the item that is to be placed on the
- * queue.  The size of the items the queue will hold was defined when the
- * queue was created, so this many bytes will be copied from pvItemToQueue
- * into the queue storage area.
- *
- * @param pxHigherPriorityTaskWoken xQueueGenericSendFromISR() will set
- * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
- * to unblock, and the unblocked task has a priority higher than the currently
- * running task.  If xQueueGenericSendFromISR() sets this value to pdTRUE then
- * a context switch should be requested before the interrupt is exited.
- *
- * @param xCopyPosition Can take the value queueSEND_TO_BACK to place the
- * item at the back of the queue, or queueSEND_TO_FRONT to place the item
- * at the front of the queue (for high priority messages).
- *
- * @return pdTRUE if the data was successfully sent to the queue, otherwise
- * errQUEUE_FULL.
- *
- * Example usage for buffered IO (where the ISR can obtain more than one value
- * per call):
-   
- void vBufferISR( void )
- {
- char cIn;
- BaseType_t xHigherPriorityTaskWokenByPost;
-
-	// We have not woken a task at the start of the ISR.
-	xHigherPriorityTaskWokenByPost = pdFALSE;
-
-	// Loop until the buffer is empty.
-	do
-	{
-		// Obtain a byte from the buffer.
-		cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
-
-		// Post each byte.
-		xQueueGenericSendFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWokenByPost, queueSEND_TO_BACK );
-
-	} while( portINPUT_BYTE( BUFFER_COUNT ) );
-
-	// Now the buffer is empty we can switch context if necessary.  Note that the
-	// name of the yield function required is port specific.
-	if( xHigherPriorityTaskWokenByPost )
-	{
-		portYIELD_FROM_ISR();
-	}
- }
- 

- *
- * \defgroup xQueueSendFromISR xQueueSendFromISR
- * \ingroup QueueManagement
- */
-BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, const void * const pvItemToQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION;
-BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue, BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
-
-/**
- * queue. h
- * 
- BaseType_t xQueueReceiveFromISR(
-									   QueueHandle_t	xQueue,
-									   void	*pvBuffer,
-									   BaseType_t *pxTaskWoken
-								   );
- * 

- *
- * Receive an item from a queue.  It is safe to use this function from within an
- * interrupt service routine.
- *
- * @param xQueue The handle to the queue from which the item is to be
- * received.
- *
- * @param pvBuffer Pointer to the buffer into which the received item will
- * be copied.
- *
- * @param pxTaskWoken A task may be blocked waiting for space to become
- * available on the queue.  If xQueueReceiveFromISR causes such a task to
- * unblock *pxTaskWoken will get set to pdTRUE, otherwise *pxTaskWoken will
- * remain unchanged.
- *
- * @return pdTRUE if an item was successfully received from the queue,
- * otherwise pdFALSE.
- *
- * Example usage:
-   
-
- QueueHandle_t xQueue;
-
- // Function to create a queue and post some values.
- void vAFunction( void *pvParameters )
- {
- char cValueToPost;
- const TickType_t xTicksToWait = ( TickType_t )0xff;
-
-	// Create a queue capable of containing 10 characters.
-	xQueue = xQueueCreate( 10, sizeof( char ) );
-	if( xQueue == 0 )
-	{
-		// Failed to create the queue.
-	}
-
-	// ...
-
-	// Post some characters that will be used within an ISR.  If the queue
-	// is full then this task will block for xTicksToWait ticks.
-	cValueToPost = 'a';
-	xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );
-	cValueToPost = 'b';
-	xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );
-
-	// ... keep posting characters ... this task may block when the queue
-	// becomes full.
-
-	cValueToPost = 'c';
-	xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );
- }
-
- // ISR that outputs all the characters received on the queue.
- void vISR_Routine( void )
- {
- BaseType_t xTaskWokenByReceive = pdFALSE;
- char cRxedChar;
-
-	while( xQueueReceiveFromISR( xQueue, ( void * ) &cRxedChar, &xTaskWokenByReceive) )
-	{
-		// A character was received.  Output the character now.
-		vOutputCharacter( cRxedChar );
-
-		// If removing the character from the queue woke the task that was
-		// posting onto the queue cTaskWokenByReceive will have been set to
-		// pdTRUE.  No matter how many times this loop iterates only one
-		// task will be woken.
-	}
-
-	if( cTaskWokenByPost != ( char ) pdFALSE;
-	{
-		taskYIELD ();
-	}
- }
- 

- * \defgroup xQueueReceiveFromISR xQueueReceiveFromISR
- * \ingroup QueueManagement
- */
-BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, void * const pvBuffer, BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
-
-/*
- * Utilities to query queues that are safe to use from an ISR.  These utilities
- * should be used only from witin an ISR, or within a critical section.
- */
-BaseType_t xQueueIsQueueEmptyFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
-BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
-UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
-
-/*
- * The functions defined above are for passing data to and from tasks.  The
- * functions below are the equivalents for passing data to and from
- * co-routines.
- *
- * These functions are called from the co-routine macro implementation and
- * should not be called directly from application code.  Instead use the macro
- * wrappers defined within croutine.h.
- */
-BaseType_t xQueueCRSendFromISR( QueueHandle_t xQueue, const void *pvItemToQueue, BaseType_t xCoRoutinePreviouslyWoken );
-BaseType_t xQueueCRReceiveFromISR( QueueHandle_t xQueue, void *pvBuffer, BaseType_t *pxTaskWoken );
-BaseType_t xQueueCRSend( QueueHandle_t xQueue, const void *pvItemToQueue, TickType_t xTicksToWait );
-BaseType_t xQueueCRReceive( QueueHandle_t xQueue, void *pvBuffer, TickType_t xTicksToWait );
-
-/*
- * For internal use only.  Use xSemaphoreCreateMutex(),
- * xSemaphoreCreateCounting() or xSemaphoreGetMutexHolder() instead of calling
- * these functions directly.
- */
-QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
-QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue ) PRIVILEGED_FUNCTION;
-QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount ) PRIVILEGED_FUNCTION;
-QueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue ) PRIVILEGED_FUNCTION;
-BaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
-TaskHandle_t xQueueGetMutexHolder( QueueHandle_t xSemaphore ) PRIVILEGED_FUNCTION;
-TaskHandle_t xQueueGetMutexHolderFromISR( QueueHandle_t xSemaphore ) PRIVILEGED_FUNCTION;
-
-/*
- * For internal use only.  Use xSemaphoreTakeMutexRecursive() or
- * xSemaphoreGiveMutexRecursive() instead of calling these functions directly.
- */
-BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
-BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex ) PRIVILEGED_FUNCTION;
-
-/*
- * Reset a queue back to its original empty state.  The return value is now
- * obsolete and is always set to pdPASS.
- */
-#define xQueueReset( xQueue ) xQueueGenericReset( xQueue, pdFALSE )
-
-/*
- * The registry is provided as a means for kernel aware debuggers to
- * locate queues, semaphores and mutexes.  Call vQueueAddToRegistry() add
- * a queue, semaphore or mutex handle to the registry if you want the handle
- * to be available to a kernel aware debugger.  If you are not using a kernel
- * aware debugger then this function can be ignored.
- *
- * configQUEUE_REGISTRY_SIZE defines the maximum number of handles the
- * registry can hold.  configQUEUE_REGISTRY_SIZE must be greater than 0
- * within FreeRTOSConfig.h for the registry to be available.  Its value
- * does not effect the number of queues, semaphores and mutexes that can be
- * created - just the number that the registry can hold.
- *
- * @param xQueue The handle of the queue being added to the registry.  This
- * is the handle returned by a call to xQueueCreate().  Semaphore and mutex
- * handles can also be passed in here.
- *
- * @param pcName The name to be associated with the handle.  This is the
- * name that the kernel aware debugger will display.  The queue registry only
- * stores a pointer to the string - so the string must be persistent (global or
- * preferably in ROM/Flash), not on the stack.
- */
-#if( configQUEUE_REGISTRY_SIZE > 0 )
-	void vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcQueueName ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-#endif
-
-/*
- * The registry is provided as a means for kernel aware debuggers to
- * locate queues, semaphores and mutexes.  Call vQueueAddToRegistry() add
- * a queue, semaphore or mutex handle to the registry if you want the handle
- * to be available to a kernel aware debugger, and vQueueUnregisterQueue() to
- * remove the queue, semaphore or mutex from the register.  If you are not using
- * a kernel aware debugger then this function can be ignored.
- *
- * @param xQueue The handle of the queue being removed from the registry.
- */
-#if( configQUEUE_REGISTRY_SIZE > 0 )
-	void vQueueUnregisterQueue( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
-#endif
-
-/*
- * The queue registry is provided as a means for kernel aware debuggers to
- * locate queues, semaphores and mutexes.  Call pcQueueGetName() to look
- * up and return the name of a queue in the queue registry from the queue's
- * handle.
- *
- * @param xQueue The handle of the queue the name of which will be returned.
- * @return If the queue is in the registry then a pointer to the name of the
- * queue is returned.  If the queue is not in the registry then NULL is
- * returned.
- */
-#if( configQUEUE_REGISTRY_SIZE > 0 )
-	const char *pcQueueGetName( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-#endif
-
-/*
- * Generic version of the function used to creaet a queue using dynamic memory
- * allocation.  This is called by other functions and macros that create other
- * RTOS objects that use the queue structure as their base.
- */
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-	QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
-#endif
-
-/*
- * Generic version of the function used to creaet a queue using dynamic memory
- * allocation.  This is called by other functions and macros that create other
- * RTOS objects that use the queue structure as their base.
- */
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-	QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
-#endif
-
-/*
- * Queue sets provide a mechanism to allow a task to block (pend) on a read
- * operation from multiple queues or semaphores simultaneously.
- *
- * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
- * function.
- *
- * A queue set must be explicitly created using a call to xQueueCreateSet()
- * before it can be used.  Once created, standard FreeRTOS queues and semaphores
- * can be added to the set using calls to xQueueAddToSet().
- * xQueueSelectFromSet() is then used to determine which, if any, of the queues
- * or semaphores contained in the set is in a state where a queue read or
- * semaphore take operation would be successful.
- *
- * Note 1:  See the documentation on http://wwwFreeRTOS.org/RTOS-queue-sets.html
- * for reasons why queue sets are very rarely needed in practice as there are
- * simpler methods of blocking on multiple objects.
- *
- * Note 2:  Blocking on a queue set that contains a mutex will not cause the
- * mutex holder to inherit the priority of the blocked task.
- *
- * Note 3:  An additional 4 bytes of RAM is required for each space in a every
- * queue added to a queue set.  Therefore counting semaphores that have a high
- * maximum count value should not be added to a queue set.
- *
- * Note 4:  A receive (in the case of a queue) or take (in the case of a
- * semaphore) operation must not be performed on a member of a queue set unless
- * a call to xQueueSelectFromSet() has first returned a handle to that set member.
- *
- * @param uxEventQueueLength Queue sets store events that occur on
- * the queues and semaphores contained in the set.  uxEventQueueLength specifies
- * the maximum number of events that can be queued at once.  To be absolutely
- * certain that events are not lost uxEventQueueLength should be set to the
- * total sum of the length of the queues added to the set, where binary
- * semaphores and mutexes have a length of 1, and counting semaphores have a
- * length set by their maximum count value.  Examples:
- *  + If a queue set is to hold a queue of length 5, another queue of length 12,
- *    and a binary semaphore, then uxEventQueueLength should be set to
- *    (5 + 12 + 1), or 18.
- *  + If a queue set is to hold three binary semaphores then uxEventQueueLength
- *    should be set to (1 + 1 + 1 ), or 3.
- *  + If a queue set is to hold a counting semaphore that has a maximum count of
- *    5, and a counting semaphore that has a maximum count of 3, then
- *    uxEventQueueLength should be set to (5 + 3), or 8.
- *
- * @return If the queue set is created successfully then a handle to the created
- * queue set is returned.  Otherwise NULL is returned.
- */
-QueueSetHandle_t xQueueCreateSet( const UBaseType_t uxEventQueueLength ) PRIVILEGED_FUNCTION;
-
-/*
- * Adds a queue or semaphore to a queue set that was previously created by a
- * call to xQueueCreateSet().
- *
- * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
- * function.
- *
- * Note 1:  A receive (in the case of a queue) or take (in the case of a
- * semaphore) operation must not be performed on a member of a queue set unless
- * a call to xQueueSelectFromSet() has first returned a handle to that set member.
- *
- * @param xQueueOrSemaphore The handle of the queue or semaphore being added to
- * the queue set (cast to an QueueSetMemberHandle_t type).
- *
- * @param xQueueSet The handle of the queue set to which the queue or semaphore
- * is being added.
- *
- * @return If the queue or semaphore was successfully added to the queue set
- * then pdPASS is returned.  If the queue could not be successfully added to the
- * queue set because it is already a member of a different queue set then pdFAIL
- * is returned.
- */
-BaseType_t xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;
-
-/*
- * Removes a queue or semaphore from a queue set.  A queue or semaphore can only
- * be removed from a set if the queue or semaphore is empty.
- *
- * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
- * function.
- *
- * @param xQueueOrSemaphore The handle of the queue or semaphore being removed
- * from the queue set (cast to an QueueSetMemberHandle_t type).
- *
- * @param xQueueSet The handle of the queue set in which the queue or semaphore
- * is included.
- *
- * @return If the queue or semaphore was successfully removed from the queue set
- * then pdPASS is returned.  If the queue was not in the queue set, or the
- * queue (or semaphore) was not empty, then pdFAIL is returned.
- */
-BaseType_t xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;
-
-/*
- * xQueueSelectFromSet() selects from the members of a queue set a queue or
- * semaphore that either contains data (in the case of a queue) or is available
- * to take (in the case of a semaphore).  xQueueSelectFromSet() effectively
- * allows a task to block (pend) on a read operation on all the queues and
- * semaphores in a queue set simultaneously.
- *
- * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
- * function.
- *
- * Note 1:  See the documentation on http://wwwFreeRTOS.org/RTOS-queue-sets.html
- * for reasons why queue sets are very rarely needed in practice as there are
- * simpler methods of blocking on multiple objects.
- *
- * Note 2:  Blocking on a queue set that contains a mutex will not cause the
- * mutex holder to inherit the priority of the blocked task.
- *
- * Note 3:  A receive (in the case of a queue) or take (in the case of a
- * semaphore) operation must not be performed on a member of a queue set unless
- * a call to xQueueSelectFromSet() has first returned a handle to that set member.
- *
- * @param xQueueSet The queue set on which the task will (potentially) block.
- *
- * @param xTicksToWait The maximum time, in ticks, that the calling task will
- * remain in the Blocked state (with other tasks executing) to wait for a member
- * of the queue set to be ready for a successful queue read or semaphore take
- * operation.
- *
- * @return xQueueSelectFromSet() will return the handle of a queue (cast to
- * a QueueSetMemberHandle_t type) contained in the queue set that contains data,
- * or the handle of a semaphore (cast to a QueueSetMemberHandle_t type) contained
- * in the queue set that is available, or NULL if no such queue or semaphore
- * exists before before the specified block time expires.
- */
-QueueSetMemberHandle_t xQueueSelectFromSet( QueueSetHandle_t xQueueSet, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
-
-/*
- * A version of xQueueSelectFromSet() that can be used from an ISR.
- */
-QueueSetMemberHandle_t xQueueSelectFromSetFromISR( QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;
-
-/* Not public API functions. */
-void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely ) PRIVILEGED_FUNCTION;
-BaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue ) PRIVILEGED_FUNCTION;
-void vQueueSetQueueNumber( QueueHandle_t xQueue, UBaseType_t uxQueueNumber ) PRIVILEGED_FUNCTION;
-UBaseType_t uxQueueGetQueueNumber( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
-uint8_t ucQueueGetQueueType( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* QUEUE_H */
-
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+
+#ifndef QUEUE_H
+#define QUEUE_H
+
+#ifndef INC_FREERTOS_H
+    #error "include FreeRTOS.h" must appear in source files before "include queue.h"
+#endif
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+#include "task.h"
+
+/**
+ * Type by which queues are referenced.  For example, a call to xQueueCreate()
+ * returns an QueueHandle_t variable that can then be used as a parameter to
+ * xQueueSend(), xQueueReceive(), etc.
+ */
+struct QueueDefinition; /* Using old naming convention so as not to break kernel aware debuggers. */
+typedef struct QueueDefinition   * QueueHandle_t;
+
+/**
+ * Type by which queue sets are referenced.  For example, a call to
+ * xQueueCreateSet() returns an xQueueSet variable that can then be used as a
+ * parameter to xQueueSelectFromSet(), xQueueAddToSet(), etc.
+ */
+typedef struct QueueDefinition   * QueueSetHandle_t;
+
+/**
+ * Queue sets can contain both queues and semaphores, so the
+ * QueueSetMemberHandle_t is defined as a type to be used where a parameter or
+ * return value can be either an QueueHandle_t or an SemaphoreHandle_t.
+ */
+typedef struct QueueDefinition   * QueueSetMemberHandle_t;
+
+/* For internal use only. */
+#define queueSEND_TO_BACK                     ( ( BaseType_t ) 0 )
+#define queueSEND_TO_FRONT                    ( ( BaseType_t ) 1 )
+#define queueOVERWRITE                        ( ( BaseType_t ) 2 )
+
+/* For internal use only.  These definitions *must* match those in queue.c. */
+#define queueQUEUE_TYPE_BASE                  ( ( uint8_t ) 0U )
+#define queueQUEUE_TYPE_SET                   ( ( uint8_t ) 0U )
+#define queueQUEUE_TYPE_MUTEX                 ( ( uint8_t ) 1U )
+#define queueQUEUE_TYPE_COUNTING_SEMAPHORE    ( ( uint8_t ) 2U )
+#define queueQUEUE_TYPE_BINARY_SEMAPHORE      ( ( uint8_t ) 3U )
+#define queueQUEUE_TYPE_RECURSIVE_MUTEX       ( ( uint8_t ) 4U )
+
+/**
+ * queue. h
+ * 
+ * QueueHandle_t xQueueCreate(
+ *                            UBaseType_t uxQueueLength,
+ *                            UBaseType_t uxItemSize
+ *                        );
+ * 

+ *
+ * Creates a new queue instance, and returns a handle by which the new queue
+ * can be referenced.
+ *
+ * Internally, within the FreeRTOS implementation, queues use two blocks of
+ * memory.  The first block is used to hold the queue's data structures.  The
+ * second block is used to hold items placed into the queue.  If a queue is
+ * created using xQueueCreate() then both blocks of memory are automatically
+ * dynamically allocated inside the xQueueCreate() function.  (see
+ * https://www.FreeRTOS.org/a00111.html).  If a queue is created using
+ * xQueueCreateStatic() then the application writer must provide the memory that
+ * will get used by the queue.  xQueueCreateStatic() therefore allows a queue to
+ * be created without using any dynamic memory allocation.
+ *
+ * https://www.FreeRTOS.org/Embedded-RTOS-Queues.html
+ *
+ * @param uxQueueLength The maximum number of items that the queue can contain.
+ *
+ * @param uxItemSize The number of bytes each item in the queue will require.
+ * Items are queued by copy, not by reference, so this is the number of bytes
+ * that will be copied for each posted item.  Each item on the queue must be
+ * the same size.
+ *
+ * @return If the queue is successfully create then a handle to the newly
+ * created queue is returned.  If the queue cannot be created then 0 is
+ * returned.
+ *
+ * Example usage:
+ * 
+ * struct AMessage
+ * {
+ *  char ucMessageID;
+ *  char ucData[ 20 ];
+ * };
+ *
+ * void vATask( void *pvParameters )
+ * {
+ * QueueHandle_t xQueue1, xQueue2;
+ *
+ *  // Create a queue capable of containing 10 uint32_t values.
+ *  xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
+ *  if( xQueue1 == 0 )
+ *  {
+ *      // Queue was not created and must not be used.
+ *  }
+ *
+ *  // Create a queue capable of containing 10 pointers to AMessage structures.
+ *  // These should be passed by pointer as they contain a lot of data.
+ *  xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
+ *  if( xQueue2 == 0 )
+ *  {
+ *      // Queue was not created and must not be used.
+ *  }
+ *
+ *  // ... Rest of task code.
+ * }
+ * 

+ * \defgroup xQueueCreate xQueueCreate
+ * \ingroup QueueManagement
+ */
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+    #define xQueueCreate( uxQueueLength, uxItemSize )    xQueueGenericCreate( ( uxQueueLength ), ( uxItemSize ), ( queueQUEUE_TYPE_BASE ) )
+#endif
+
+/**
+ * queue. h
+ * 
+ * QueueHandle_t xQueueCreateStatic(
+ *                            UBaseType_t uxQueueLength,
+ *                            UBaseType_t uxItemSize,
+ *                            uint8_t *pucQueueStorageBuffer,
+ *                            StaticQueue_t *pxQueueBuffer
+ *                        );
+ * 

+ *
+ * Creates a new queue instance, and returns a handle by which the new queue
+ * can be referenced.
+ *
+ * Internally, within the FreeRTOS implementation, queues use two blocks of
+ * memory.  The first block is used to hold the queue's data structures.  The
+ * second block is used to hold items placed into the queue.  If a queue is
+ * created using xQueueCreate() then both blocks of memory are automatically
+ * dynamically allocated inside the xQueueCreate() function.  (see
+ * https://www.FreeRTOS.org/a00111.html).  If a queue is created using
+ * xQueueCreateStatic() then the application writer must provide the memory that
+ * will get used by the queue.  xQueueCreateStatic() therefore allows a queue to
+ * be created without using any dynamic memory allocation.
+ *
+ * https://www.FreeRTOS.org/Embedded-RTOS-Queues.html
+ *
+ * @param uxQueueLength The maximum number of items that the queue can contain.
+ *
+ * @param uxItemSize The number of bytes each item in the queue will require.
+ * Items are queued by copy, not by reference, so this is the number of bytes
+ * that will be copied for each posted item.  Each item on the queue must be
+ * the same size.
+ *
+ * @param pucQueueStorageBuffer If uxItemSize is not zero then
+ * pucQueueStorageBuffer must point to a uint8_t array that is at least large
+ * enough to hold the maximum number of items that can be in the queue at any
+ * one time - which is ( uxQueueLength * uxItemsSize ) bytes.  If uxItemSize is
+ * zero then pucQueueStorageBuffer can be NULL.
+ *
+ * @param pxQueueBuffer Must point to a variable of type StaticQueue_t, which
+ * will be used to hold the queue's data structure.
+ *
+ * @return If the queue is created then a handle to the created queue is
+ * returned.  If pxQueueBuffer is NULL then NULL is returned.
+ *
+ * Example usage:
+ * 
+ * struct AMessage
+ * {
+ *  char ucMessageID;
+ *  char ucData[ 20 ];
+ * };
+ *
+ #define QUEUE_LENGTH 10
+ #define ITEM_SIZE sizeof( uint32_t )
+ *
+ * // xQueueBuffer will hold the queue structure.
+ * StaticQueue_t xQueueBuffer;
+ *
+ * // ucQueueStorage will hold the items posted to the queue.  Must be at least
+ * // [(queue length) * ( queue item size)] bytes long.
+ * uint8_t ucQueueStorage[ QUEUE_LENGTH * ITEM_SIZE ];
+ *
+ * void vATask( void *pvParameters )
+ * {
+ * QueueHandle_t xQueue1;
+ *
+ *  // Create a queue capable of containing 10 uint32_t values.
+ *  xQueue1 = xQueueCreate( QUEUE_LENGTH, // The number of items the queue can hold.
+ *                          ITEM_SIZE     // The size of each item in the queue
+ *                          &( ucQueueStorage[ 0 ] ), // The buffer that will hold the items in the queue.
+ *                          &xQueueBuffer ); // The buffer that will hold the queue structure.
+ *
+ *  // The queue is guaranteed to be created successfully as no dynamic memory
+ *  // allocation is used.  Therefore xQueue1 is now a handle to a valid queue.
+ *
+ *  // ... Rest of task code.
+ * }
+ * 

+ * \defgroup xQueueCreateStatic xQueueCreateStatic
+ * \ingroup QueueManagement
+ */
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+    #define xQueueCreateStatic( uxQueueLength, uxItemSize, pucQueueStorage, pxQueueBuffer )    xQueueGenericCreateStatic( ( uxQueueLength ), ( uxItemSize ), ( pucQueueStorage ), ( pxQueueBuffer ), ( queueQUEUE_TYPE_BASE ) )
+#endif /* configSUPPORT_STATIC_ALLOCATION */
+
+/**
+ * queue. h
+ * 
+ * BaseType_t xQueueSendToToFront(
+ *                                 QueueHandle_t    xQueue,
+ *                                 const void       *pvItemToQueue,
+ *                                 TickType_t       xTicksToWait
+ *                             );
+ * 

+ *
+ * Post an item to the front of a queue.  The item is queued by copy, not by
+ * reference.  This function must not be called from an interrupt service
+ * routine.  See xQueueSendFromISR () for an alternative which may be used
+ * in an ISR.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param xTicksToWait The maximum amount of time the task should block
+ * waiting for space to become available on the queue, should it already
+ * be full.  The call will return immediately if this is set to 0 and the
+ * queue is full.  The time is defined in tick periods so the constant
+ * portTICK_PERIOD_MS should be used to convert to real time if this is required.
+ *
+ * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
+ *
+ * Example usage:
+ * 
+ * struct AMessage
+ * {
+ *  char ucMessageID;
+ *  char ucData[ 20 ];
+ * } xMessage;
+ *
+ * uint32_t ulVar = 10UL;
+ *
+ * void vATask( void *pvParameters )
+ * {
+ * QueueHandle_t xQueue1, xQueue2;
+ * struct AMessage *pxMessage;
+ *
+ *  // Create a queue capable of containing 10 uint32_t values.
+ *  xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
+ *
+ *  // Create a queue capable of containing 10 pointers to AMessage structures.
+ *  // These should be passed by pointer as they contain a lot of data.
+ *  xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
+ *
+ *  // ...
+ *
+ *  if( xQueue1 != 0 )
+ *  {
+ *      // Send an uint32_t.  Wait for 10 ticks for space to become
+ *      // available if necessary.
+ *      if( xQueueSendToFront( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )
+ *      {
+ *          // Failed to post the message, even after 10 ticks.
+ *      }
+ *  }
+ *
+ *  if( xQueue2 != 0 )
+ *  {
+ *      // Send a pointer to a struct AMessage object.  Don't block if the
+ *      // queue is already full.
+ *      pxMessage = & xMessage;
+ *      xQueueSendToFront( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );
+ *  }
+ *
+ *  // ... Rest of task code.
+ * }
+ * 

+ * \defgroup xQueueSend xQueueSend
+ * \ingroup QueueManagement
+ */
+#define xQueueSendToFront( xQueue, pvItemToQueue, xTicksToWait ) \
+    xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_FRONT )
+
+/**
+ * queue. h
+ * 
+ * BaseType_t xQueueSendToBack(
+ *                                 QueueHandle_t    xQueue,
+ *                                 const void       *pvItemToQueue,
+ *                                 TickType_t       xTicksToWait
+ *                             );
+ * 

+ *
+ * This is a macro that calls xQueueGenericSend().
+ *
+ * Post an item to the back of a queue.  The item is queued by copy, not by
+ * reference.  This function must not be called from an interrupt service
+ * routine.  See xQueueSendFromISR () for an alternative which may be used
+ * in an ISR.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param xTicksToWait The maximum amount of time the task should block
+ * waiting for space to become available on the queue, should it already
+ * be full.  The call will return immediately if this is set to 0 and the queue
+ * is full.  The  time is defined in tick periods so the constant
+ * portTICK_PERIOD_MS should be used to convert to real time if this is required.
+ *
+ * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
+ *
+ * Example usage:
+ * 
+ * struct AMessage
+ * {
+ *  char ucMessageID;
+ *  char ucData[ 20 ];
+ * } xMessage;
+ *
+ * uint32_t ulVar = 10UL;
+ *
+ * void vATask( void *pvParameters )
+ * {
+ * QueueHandle_t xQueue1, xQueue2;
+ * struct AMessage *pxMessage;
+ *
+ *  // Create a queue capable of containing 10 uint32_t values.
+ *  xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
+ *
+ *  // Create a queue capable of containing 10 pointers to AMessage structures.
+ *  // These should be passed by pointer as they contain a lot of data.
+ *  xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
+ *
+ *  // ...
+ *
+ *  if( xQueue1 != 0 )
+ *  {
+ *      // Send an uint32_t.  Wait for 10 ticks for space to become
+ *      // available if necessary.
+ *      if( xQueueSendToBack( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )
+ *      {
+ *          // Failed to post the message, even after 10 ticks.
+ *      }
+ *  }
+ *
+ *  if( xQueue2 != 0 )
+ *  {
+ *      // Send a pointer to a struct AMessage object.  Don't block if the
+ *      // queue is already full.
+ *      pxMessage = & xMessage;
+ *      xQueueSendToBack( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );
+ *  }
+ *
+ *  // ... Rest of task code.
+ * }
+ * 

+ * \defgroup xQueueSend xQueueSend
+ * \ingroup QueueManagement
+ */
+#define xQueueSendToBack( xQueue, pvItemToQueue, xTicksToWait ) \
+    xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK )
+
+/**
+ * queue. h
+ * 
+ * BaseType_t xQueueSend(
+ *                            QueueHandle_t xQueue,
+ *                            const void * pvItemToQueue,
+ *                            TickType_t xTicksToWait
+ *                       );
+ * 

+ *
+ * This is a macro that calls xQueueGenericSend().  It is included for
+ * backward compatibility with versions of FreeRTOS.org that did not
+ * include the xQueueSendToFront() and xQueueSendToBack() macros.  It is
+ * equivalent to xQueueSendToBack().
+ *
+ * Post an item on a queue.  The item is queued by copy, not by reference.
+ * This function must not be called from an interrupt service routine.
+ * See xQueueSendFromISR () for an alternative which may be used in an ISR.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param xTicksToWait The maximum amount of time the task should block
+ * waiting for space to become available on the queue, should it already
+ * be full.  The call will return immediately if this is set to 0 and the
+ * queue is full.  The time is defined in tick periods so the constant
+ * portTICK_PERIOD_MS should be used to convert to real time if this is required.
+ *
+ * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
+ *
+ * Example usage:
+ * 
+ * struct AMessage
+ * {
+ *  char ucMessageID;
+ *  char ucData[ 20 ];
+ * } xMessage;
+ *
+ * uint32_t ulVar = 10UL;
+ *
+ * void vATask( void *pvParameters )
+ * {
+ * QueueHandle_t xQueue1, xQueue2;
+ * struct AMessage *pxMessage;
+ *
+ *  // Create a queue capable of containing 10 uint32_t values.
+ *  xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
+ *
+ *  // Create a queue capable of containing 10 pointers to AMessage structures.
+ *  // These should be passed by pointer as they contain a lot of data.
+ *  xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
+ *
+ *  // ...
+ *
+ *  if( xQueue1 != 0 )
+ *  {
+ *      // Send an uint32_t.  Wait for 10 ticks for space to become
+ *      // available if necessary.
+ *      if( xQueueSend( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )
+ *      {
+ *          // Failed to post the message, even after 10 ticks.
+ *      }
+ *  }
+ *
+ *  if( xQueue2 != 0 )
+ *  {
+ *      // Send a pointer to a struct AMessage object.  Don't block if the
+ *      // queue is already full.
+ *      pxMessage = & xMessage;
+ *      xQueueSend( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );
+ *  }
+ *
+ *  // ... Rest of task code.
+ * }
+ * 

+ * \defgroup xQueueSend xQueueSend
+ * \ingroup QueueManagement
+ */
+#define xQueueSend( xQueue, pvItemToQueue, xTicksToWait ) \
+    xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK )
+
+/**
+ * queue. h
+ * 
+ * BaseType_t xQueueOverwrite(
+ *                            QueueHandle_t xQueue,
+ *                            const void * pvItemToQueue
+ *                       );
+ * 

+ *
+ * Only for use with queues that have a length of one - so the queue is either
+ * empty or full.
+ *
+ * Post an item on a queue.  If the queue is already full then overwrite the
+ * value held in the queue.  The item is queued by copy, not by reference.
+ *
+ * This function must not be called from an interrupt service routine.
+ * See xQueueOverwriteFromISR () for an alternative which may be used in an ISR.
+ *
+ * @param xQueue The handle of the queue to which the data is being sent.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @return xQueueOverwrite() is a macro that calls xQueueGenericSend(), and
+ * therefore has the same return values as xQueueSendToFront().  However, pdPASS
+ * is the only value that can be returned because xQueueOverwrite() will write
+ * to the queue even when the queue is already full.
+ *
+ * Example usage:
+ * 
+ *
+ * void vFunction( void *pvParameters )
+ * {
+ * QueueHandle_t xQueue;
+ * uint32_t ulVarToSend, ulValReceived;
+ *
+ *  // Create a queue to hold one uint32_t value.  It is strongly
+ *  // recommended *not* to use xQueueOverwrite() on queues that can
+ *  // contain more than one value, and doing so will trigger an assertion
+ *  // if configASSERT() is defined.
+ *  xQueue = xQueueCreate( 1, sizeof( uint32_t ) );
+ *
+ *  // Write the value 10 to the queue using xQueueOverwrite().
+ *  ulVarToSend = 10;
+ *  xQueueOverwrite( xQueue, &ulVarToSend );
+ *
+ *  // Peeking the queue should now return 10, but leave the value 10 in
+ *  // the queue.  A block time of zero is used as it is known that the
+ *  // queue holds a value.
+ *  ulValReceived = 0;
+ *  xQueuePeek( xQueue, &ulValReceived, 0 );
+ *
+ *  if( ulValReceived != 10 )
+ *  {
+ *      // Error unless the item was removed by a different task.
+ *  }
+ *
+ *  // The queue is still full.  Use xQueueOverwrite() to overwrite the
+ *  // value held in the queue with 100.
+ *  ulVarToSend = 100;
+ *  xQueueOverwrite( xQueue, &ulVarToSend );
+ *
+ *  // This time read from the queue, leaving the queue empty once more.
+ *  // A block time of 0 is used again.
+ *  xQueueReceive( xQueue, &ulValReceived, 0 );
+ *
+ *  // The value read should be the last value written, even though the
+ *  // queue was already full when the value was written.
+ *  if( ulValReceived != 100 )
+ *  {
+ *      // Error!
+ *  }
+ *
+ *  // ...
+ * }
+ * 

+ * \defgroup xQueueOverwrite xQueueOverwrite
+ * \ingroup QueueManagement
+ */
+#define xQueueOverwrite( xQueue, pvItemToQueue ) \
+    xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), 0, queueOVERWRITE )
+
+
+/**
+ * queue. h
+ * 
+ * BaseType_t xQueueGenericSend(
+ *                                  QueueHandle_t xQueue,
+ *                                  const void * pvItemToQueue,
+ *                                  TickType_t xTicksToWait
+ *                                  BaseType_t xCopyPosition
+ *                              );
+ * 

+ *
+ * It is preferred that the macros xQueueSend(), xQueueSendToFront() and
+ * xQueueSendToBack() are used in place of calling this function directly.
+ *
+ * Post an item on a queue.  The item is queued by copy, not by reference.
+ * This function must not be called from an interrupt service routine.
+ * See xQueueSendFromISR () for an alternative which may be used in an ISR.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param xTicksToWait The maximum amount of time the task should block
+ * waiting for space to become available on the queue, should it already
+ * be full.  The call will return immediately if this is set to 0 and the
+ * queue is full.  The time is defined in tick periods so the constant
+ * portTICK_PERIOD_MS should be used to convert to real time if this is required.
+ *
+ * @param xCopyPosition Can take the value queueSEND_TO_BACK to place the
+ * item at the back of the queue, or queueSEND_TO_FRONT to place the item
+ * at the front of the queue (for high priority messages).
+ *
+ * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
+ *
+ * Example usage:
+ * 
+ * struct AMessage
+ * {
+ *  char ucMessageID;
+ *  char ucData[ 20 ];
+ * } xMessage;
+ *
+ * uint32_t ulVar = 10UL;
+ *
+ * void vATask( void *pvParameters )
+ * {
+ * QueueHandle_t xQueue1, xQueue2;
+ * struct AMessage *pxMessage;
+ *
+ *  // Create a queue capable of containing 10 uint32_t values.
+ *  xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
+ *
+ *  // Create a queue capable of containing 10 pointers to AMessage structures.
+ *  // These should be passed by pointer as they contain a lot of data.
+ *  xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
+ *
+ *  // ...
+ *
+ *  if( xQueue1 != 0 )
+ *  {
+ *      // Send an uint32_t.  Wait for 10 ticks for space to become
+ *      // available if necessary.
+ *      if( xQueueGenericSend( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10, queueSEND_TO_BACK ) != pdPASS )
+ *      {
+ *          // Failed to post the message, even after 10 ticks.
+ *      }
+ *  }
+ *
+ *  if( xQueue2 != 0 )
+ *  {
+ *      // Send a pointer to a struct AMessage object.  Don't block if the
+ *      // queue is already full.
+ *      pxMessage = & xMessage;
+ *      xQueueGenericSend( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0, queueSEND_TO_BACK );
+ *  }
+ *
+ *  // ... Rest of task code.
+ * }
+ * 

+ * \defgroup xQueueSend xQueueSend
+ * \ingroup QueueManagement
+ */
+BaseType_t xQueueGenericSend( QueueHandle_t xQueue,
+                              const void * const pvItemToQueue,
+                              TickType_t xTicksToWait,
+                              const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION;
+
+/**
+ * queue. h
+ * 
+ * BaseType_t xQueuePeek(
+ *                           QueueHandle_t xQueue,
+ *                           void * const pvBuffer,
+ *                           TickType_t xTicksToWait
+ *                       );
+ * 

+ *
+ * Receive an item from a queue without removing the item from the queue.
+ * The item is received by copy so a buffer of adequate size must be
+ * provided.  The number of bytes copied into the buffer was defined when
+ * the queue was created.
+ *
+ * Successfully received items remain on the queue so will be returned again
+ * by the next call, or a call to xQueueReceive().
+ *
+ * This macro must not be used in an interrupt service routine.  See
+ * xQueuePeekFromISR() for an alternative that can be called from an interrupt
+ * service routine.
+ *
+ * @param xQueue The handle to the queue from which the item is to be
+ * received.
+ *
+ * @param pvBuffer Pointer to the buffer into which the received item will
+ * be copied.
+ *
+ * @param xTicksToWait The maximum amount of time the task should block
+ * waiting for an item to receive should the queue be empty at the time
+ * of the call. The time is defined in tick periods so the constant
+ * portTICK_PERIOD_MS should be used to convert to real time if this is required.
+ * xQueuePeek() will return immediately if xTicksToWait is 0 and the queue
+ * is empty.
+ *
+ * @return pdTRUE if an item was successfully received from the queue,
+ * otherwise pdFALSE.
+ *
+ * Example usage:
+ * 
+ * struct AMessage
+ * {
+ *  char ucMessageID;
+ *  char ucData[ 20 ];
+ * } xMessage;
+ *
+ * QueueHandle_t xQueue;
+ *
+ * // Task to create a queue and post a value.
+ * void vATask( void *pvParameters )
+ * {
+ * struct AMessage *pxMessage;
+ *
+ *  // Create a queue capable of containing 10 pointers to AMessage structures.
+ *  // These should be passed by pointer as they contain a lot of data.
+ *  xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );
+ *  if( xQueue == 0 )
+ *  {
+ *      // Failed to create the queue.
+ *  }
+ *
+ *  // ...
+ *
+ *  // Send a pointer to a struct AMessage object.  Don't block if the
+ *  // queue is already full.
+ *  pxMessage = & xMessage;
+ *  xQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 );
+ *
+ *  // ... Rest of task code.
+ * }
+ *
+ * // Task to peek the data from the queue.
+ * void vADifferentTask( void *pvParameters )
+ * {
+ * struct AMessage *pxRxedMessage;
+ *
+ *  if( xQueue != 0 )
+ *  {
+ *      // Peek a message on the created queue.  Block for 10 ticks if a
+ *      // message is not immediately available.
+ *      if( xQueuePeek( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) )
+ *      {
+ *          // pcRxedMessage now points to the struct AMessage variable posted
+ *          // by vATask, but the item still remains on the queue.
+ *      }
+ *  }
+ *
+ *  // ... Rest of task code.
+ * }
+ * 

+ * \defgroup xQueuePeek xQueuePeek
+ * \ingroup QueueManagement
+ */
+BaseType_t xQueuePeek( QueueHandle_t xQueue,
+                       void * const pvBuffer,
+                       TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/**
+ * queue. h
+ * 
+ * BaseType_t xQueuePeekFromISR(
+ *                                  QueueHandle_t xQueue,
+ *                                  void *pvBuffer,
+ *                              );
+ * 

+ *
+ * A version of xQueuePeek() that can be called from an interrupt service
+ * routine (ISR).
+ *
+ * Receive an item from a queue without removing the item from the queue.
+ * The item is received by copy so a buffer of adequate size must be
+ * provided.  The number of bytes copied into the buffer was defined when
+ * the queue was created.
+ *
+ * Successfully received items remain on the queue so will be returned again
+ * by the next call, or a call to xQueueReceive().
+ *
+ * @param xQueue The handle to the queue from which the item is to be
+ * received.
+ *
+ * @param pvBuffer Pointer to the buffer into which the received item will
+ * be copied.
+ *
+ * @return pdTRUE if an item was successfully received from the queue,
+ * otherwise pdFALSE.
+ *
+ * \defgroup xQueuePeekFromISR xQueuePeekFromISR
+ * \ingroup QueueManagement
+ */
+BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue,
+                              void * const pvBuffer ) PRIVILEGED_FUNCTION;
+
+/**
+ * queue. h
+ * 
+ * BaseType_t xQueueReceive(
+ *                               QueueHandle_t xQueue,
+ *                               void *pvBuffer,
+ *                               TickType_t xTicksToWait
+ *                          );
+ * 

+ *
+ * Receive an item from a queue.  The item is received by copy so a buffer of
+ * adequate size must be provided.  The number of bytes copied into the buffer
+ * was defined when the queue was created.
+ *
+ * Successfully received items are removed from the queue.
+ *
+ * This function must not be used in an interrupt service routine.  See
+ * xQueueReceiveFromISR for an alternative that can.
+ *
+ * @param xQueue The handle to the queue from which the item is to be
+ * received.
+ *
+ * @param pvBuffer Pointer to the buffer into which the received item will
+ * be copied.
+ *
+ * @param xTicksToWait The maximum amount of time the task should block
+ * waiting for an item to receive should the queue be empty at the time
+ * of the call. xQueueReceive() will return immediately if xTicksToWait
+ * is zero and the queue is empty.  The time is defined in tick periods so the
+ * constant portTICK_PERIOD_MS should be used to convert to real time if this is
+ * required.
+ *
+ * @return pdTRUE if an item was successfully received from the queue,
+ * otherwise pdFALSE.
+ *
+ * Example usage:
+ * 
+ * struct AMessage
+ * {
+ *  char ucMessageID;
+ *  char ucData[ 20 ];
+ * } xMessage;
+ *
+ * QueueHandle_t xQueue;
+ *
+ * // Task to create a queue and post a value.
+ * void vATask( void *pvParameters )
+ * {
+ * struct AMessage *pxMessage;
+ *
+ *  // Create a queue capable of containing 10 pointers to AMessage structures.
+ *  // These should be passed by pointer as they contain a lot of data.
+ *  xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );
+ *  if( xQueue == 0 )
+ *  {
+ *      // Failed to create the queue.
+ *  }
+ *
+ *  // ...
+ *
+ *  // Send a pointer to a struct AMessage object.  Don't block if the
+ *  // queue is already full.
+ *  pxMessage = & xMessage;
+ *  xQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 );
+ *
+ *  // ... Rest of task code.
+ * }
+ *
+ * // Task to receive from the queue.
+ * void vADifferentTask( void *pvParameters )
+ * {
+ * struct AMessage *pxRxedMessage;
+ *
+ *  if( xQueue != 0 )
+ *  {
+ *      // Receive a message on the created queue.  Block for 10 ticks if a
+ *      // message is not immediately available.
+ *      if( xQueueReceive( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) )
+ *      {
+ *          // pcRxedMessage now points to the struct AMessage variable posted
+ *          // by vATask.
+ *      }
+ *  }
+ *
+ *  // ... Rest of task code.
+ * }
+ * 

+ * \defgroup xQueueReceive xQueueReceive
+ * \ingroup QueueManagement
+ */
+BaseType_t xQueueReceive( QueueHandle_t xQueue,
+                          void * const pvBuffer,
+                          TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/**
+ * queue. h
+ * 
+ * UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue );
+ * 

+ *
+ * Return the number of messages stored in a queue.
+ *
+ * @param xQueue A handle to the queue being queried.
+ *
+ * @return The number of messages available in the queue.
+ *
+ * \defgroup uxQueueMessagesWaiting uxQueueMessagesWaiting
+ * \ingroup QueueManagement
+ */
+UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+
+/**
+ * queue. h
+ * 
+ * UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue );
+ * 

+ *
+ * Return the number of free spaces available in a queue.  This is equal to the
+ * number of items that can be sent to the queue before the queue becomes full
+ * if no items are removed.
+ *
+ * @param xQueue A handle to the queue being queried.
+ *
+ * @return The number of spaces available in the queue.
+ *
+ * \defgroup uxQueueMessagesWaiting uxQueueMessagesWaiting
+ * \ingroup QueueManagement
+ */
+UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+
+/**
+ * queue. h
+ * 
+ * void vQueueDelete( QueueHandle_t xQueue );
+ * 

+ *
+ * Delete a queue - freeing all the memory allocated for storing of items
+ * placed on the queue.
+ *
+ * @param xQueue A handle to the queue to be deleted.
+ *
+ * \defgroup vQueueDelete vQueueDelete
+ * \ingroup QueueManagement
+ */
+void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+
+/**
+ * queue. h
+ * 
+ * BaseType_t xQueueSendToFrontFromISR(
+ *                                       QueueHandle_t xQueue,
+ *                                       const void *pvItemToQueue,
+ *                                       BaseType_t *pxHigherPriorityTaskWoken
+ *                                    );
+ * 

+ *
+ * This is a macro that calls xQueueGenericSendFromISR().
+ *
+ * Post an item to the front of a queue.  It is safe to use this macro from
+ * within an interrupt service routine.
+ *
+ * Items are queued by copy not reference so it is preferable to only
+ * queue small items, especially when called from an ISR.  In most cases
+ * it would be preferable to store a pointer to the item being queued.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param pxHigherPriorityTaskWoken xQueueSendToFrontFromISR() will set
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
+ * to unblock, and the unblocked task has a priority higher than the currently
+ * running task.  If xQueueSendToFromFromISR() sets this value to pdTRUE then
+ * a context switch should be requested before the interrupt is exited.
+ *
+ * @return pdTRUE if the data was successfully sent to the queue, otherwise
+ * errQUEUE_FULL.
+ *
+ * Example usage for buffered IO (where the ISR can obtain more than one value
+ * per call):
+ * 
+ * void vBufferISR( void )
+ * {
+ * char cIn;
+ * BaseType_t xHigherPrioritTaskWoken;
+ *
+ *  // We have not woken a task at the start of the ISR.
+ *  xHigherPriorityTaskWoken = pdFALSE;
+ *
+ *  // Loop until the buffer is empty.
+ *  do
+ *  {
+ *      // Obtain a byte from the buffer.
+ *      cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
+ *
+ *      // Post the byte.
+ *      xQueueSendToFrontFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
+ *
+ *  } while( portINPUT_BYTE( BUFFER_COUNT ) );
+ *
+ *  // Now the buffer is empty we can switch context if necessary.
+ *  if( xHigherPriorityTaskWoken )
+ *  {
+ *      taskYIELD ();
+ *  }
+ * }
+ * 

+ *
+ * \defgroup xQueueSendFromISR xQueueSendFromISR
+ * \ingroup QueueManagement
+ */
+#define xQueueSendToFrontFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) \
+    xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_FRONT )
+
+
+/**
+ * queue. h
+ * 
+ * BaseType_t xQueueSendToBackFromISR(
+ *                                       QueueHandle_t xQueue,
+ *                                       const void *pvItemToQueue,
+ *                                       BaseType_t *pxHigherPriorityTaskWoken
+ *                                    );
+ * 

+ *
+ * This is a macro that calls xQueueGenericSendFromISR().
+ *
+ * Post an item to the back of a queue.  It is safe to use this macro from
+ * within an interrupt service routine.
+ *
+ * Items are queued by copy not reference so it is preferable to only
+ * queue small items, especially when called from an ISR.  In most cases
+ * it would be preferable to store a pointer to the item being queued.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param pxHigherPriorityTaskWoken xQueueSendToBackFromISR() will set
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
+ * to unblock, and the unblocked task has a priority higher than the currently
+ * running task.  If xQueueSendToBackFromISR() sets this value to pdTRUE then
+ * a context switch should be requested before the interrupt is exited.
+ *
+ * @return pdTRUE if the data was successfully sent to the queue, otherwise
+ * errQUEUE_FULL.
+ *
+ * Example usage for buffered IO (where the ISR can obtain more than one value
+ * per call):
+ * 
+ * void vBufferISR( void )
+ * {
+ * char cIn;
+ * BaseType_t xHigherPriorityTaskWoken;
+ *
+ *  // We have not woken a task at the start of the ISR.
+ *  xHigherPriorityTaskWoken = pdFALSE;
+ *
+ *  // Loop until the buffer is empty.
+ *  do
+ *  {
+ *      // Obtain a byte from the buffer.
+ *      cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
+ *
+ *      // Post the byte.
+ *      xQueueSendToBackFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
+ *
+ *  } while( portINPUT_BYTE( BUFFER_COUNT ) );
+ *
+ *  // Now the buffer is empty we can switch context if necessary.
+ *  if( xHigherPriorityTaskWoken )
+ *  {
+ *      taskYIELD ();
+ *  }
+ * }
+ * 

+ *
+ * \defgroup xQueueSendFromISR xQueueSendFromISR
+ * \ingroup QueueManagement
+ */
+#define xQueueSendToBackFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) \
+    xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK )
+
+/**
+ * queue. h
+ * 
+ * BaseType_t xQueueOverwriteFromISR(
+ *                            QueueHandle_t xQueue,
+ *                            const void * pvItemToQueue,
+ *                            BaseType_t *pxHigherPriorityTaskWoken
+ *                       );
+ * 

+ *
+ * A version of xQueueOverwrite() that can be used in an interrupt service
+ * routine (ISR).
+ *
+ * Only for use with queues that can hold a single item - so the queue is either
+ * empty or full.
+ *
+ * Post an item on a queue.  If the queue is already full then overwrite the
+ * value held in the queue.  The item is queued by copy, not by reference.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param pxHigherPriorityTaskWoken xQueueOverwriteFromISR() will set
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
+ * to unblock, and the unblocked task has a priority higher than the currently
+ * running task.  If xQueueOverwriteFromISR() sets this value to pdTRUE then
+ * a context switch should be requested before the interrupt is exited.
+ *
+ * @return xQueueOverwriteFromISR() is a macro that calls
+ * xQueueGenericSendFromISR(), and therefore has the same return values as
+ * xQueueSendToFrontFromISR().  However, pdPASS is the only value that can be
+ * returned because xQueueOverwriteFromISR() will write to the queue even when
+ * the queue is already full.
+ *
+ * Example usage:
+ * 
+ *
+ * QueueHandle_t xQueue;
+ *
+ * void vFunction( void *pvParameters )
+ * {
+ *  // Create a queue to hold one uint32_t value.  It is strongly
+ *  // recommended *not* to use xQueueOverwriteFromISR() on queues that can
+ *  // contain more than one value, and doing so will trigger an assertion
+ *  // if configASSERT() is defined.
+ *  xQueue = xQueueCreate( 1, sizeof( uint32_t ) );
+ * }
+ *
+ * void vAnInterruptHandler( void )
+ * {
+ * // xHigherPriorityTaskWoken must be set to pdFALSE before it is used.
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+ * uint32_t ulVarToSend, ulValReceived;
+ *
+ *  // Write the value 10 to the queue using xQueueOverwriteFromISR().
+ *  ulVarToSend = 10;
+ *  xQueueOverwriteFromISR( xQueue, &ulVarToSend, &xHigherPriorityTaskWoken );
+ *
+ *  // The queue is full, but calling xQueueOverwriteFromISR() again will still
+ *  // pass because the value held in the queue will be overwritten with the
+ *  // new value.
+ *  ulVarToSend = 100;
+ *  xQueueOverwriteFromISR( xQueue, &ulVarToSend, &xHigherPriorityTaskWoken );
+ *
+ *  // Reading from the queue will now return 100.
+ *
+ *  // ...
+ *
+ *  if( xHigherPrioritytaskWoken == pdTRUE )
+ *  {
+ *      // Writing to the queue caused a task to unblock and the unblocked task
+ *      // has a priority higher than or equal to the priority of the currently
+ *      // executing task (the task this interrupt interrupted).  Perform a context
+ *      // switch so this interrupt returns directly to the unblocked task.
+ *      portYIELD_FROM_ISR(); // or portEND_SWITCHING_ISR() depending on the port.
+ *  }
+ * }
+ * 

+ * \defgroup xQueueOverwriteFromISR xQueueOverwriteFromISR
+ * \ingroup QueueManagement
+ */
+#define xQueueOverwriteFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) \
+    xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueOVERWRITE )
+
+/**
+ * queue. h
+ * 
+ * BaseType_t xQueueSendFromISR(
+ *                                   QueueHandle_t xQueue,
+ *                                   const void *pvItemToQueue,
+ *                                   BaseType_t *pxHigherPriorityTaskWoken
+ *                              );
+ * 

+ *
+ * This is a macro that calls xQueueGenericSendFromISR().  It is included
+ * for backward compatibility with versions of FreeRTOS.org that did not
+ * include the xQueueSendToBackFromISR() and xQueueSendToFrontFromISR()
+ * macros.
+ *
+ * Post an item to the back of a queue.  It is safe to use this function from
+ * within an interrupt service routine.
+ *
+ * Items are queued by copy not reference so it is preferable to only
+ * queue small items, especially when called from an ISR.  In most cases
+ * it would be preferable to store a pointer to the item being queued.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param pxHigherPriorityTaskWoken xQueueSendFromISR() will set
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
+ * to unblock, and the unblocked task has a priority higher than the currently
+ * running task.  If xQueueSendFromISR() sets this value to pdTRUE then
+ * a context switch should be requested before the interrupt is exited.
+ *
+ * @return pdTRUE if the data was successfully sent to the queue, otherwise
+ * errQUEUE_FULL.
+ *
+ * Example usage for buffered IO (where the ISR can obtain more than one value
+ * per call):
+ * 
+ * void vBufferISR( void )
+ * {
+ * char cIn;
+ * BaseType_t xHigherPriorityTaskWoken;
+ *
+ *  // We have not woken a task at the start of the ISR.
+ *  xHigherPriorityTaskWoken = pdFALSE;
+ *
+ *  // Loop until the buffer is empty.
+ *  do
+ *  {
+ *      // Obtain a byte from the buffer.
+ *      cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
+ *
+ *      // Post the byte.
+ *      xQueueSendFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
+ *
+ *  } while( portINPUT_BYTE( BUFFER_COUNT ) );
+ *
+ *  // Now the buffer is empty we can switch context if necessary.
+ *  if( xHigherPriorityTaskWoken )
+ *  {
+ *      // Actual macro used here is port specific.
+ *      portYIELD_FROM_ISR ();
+ *  }
+ * }
+ * 

+ *
+ * \defgroup xQueueSendFromISR xQueueSendFromISR
+ * \ingroup QueueManagement
+ */
+#define xQueueSendFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) \
+    xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK )
+
+/**
+ * queue. h
+ * 
+ * BaseType_t xQueueGenericSendFromISR(
+ *                                         QueueHandle_t    xQueue,
+ *                                         const    void    *pvItemToQueue,
+ *                                         BaseType_t  *pxHigherPriorityTaskWoken,
+ *                                         BaseType_t  xCopyPosition
+ *                                     );
+ * 

+ *
+ * It is preferred that the macros xQueueSendFromISR(),
+ * xQueueSendToFrontFromISR() and xQueueSendToBackFromISR() be used in place
+ * of calling this function directly.  xQueueGiveFromISR() is an
+ * equivalent for use by semaphores that don't actually copy any data.
+ *
+ * Post an item on a queue.  It is safe to use this function from within an
+ * interrupt service routine.
+ *
+ * Items are queued by copy not reference so it is preferable to only
+ * queue small items, especially when called from an ISR.  In most cases
+ * it would be preferable to store a pointer to the item being queued.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param pxHigherPriorityTaskWoken xQueueGenericSendFromISR() will set
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
+ * to unblock, and the unblocked task has a priority higher than the currently
+ * running task.  If xQueueGenericSendFromISR() sets this value to pdTRUE then
+ * a context switch should be requested before the interrupt is exited.
+ *
+ * @param xCopyPosition Can take the value queueSEND_TO_BACK to place the
+ * item at the back of the queue, or queueSEND_TO_FRONT to place the item
+ * at the front of the queue (for high priority messages).
+ *
+ * @return pdTRUE if the data was successfully sent to the queue, otherwise
+ * errQUEUE_FULL.
+ *
+ * Example usage for buffered IO (where the ISR can obtain more than one value
+ * per call):
+ * 
+ * void vBufferISR( void )
+ * {
+ * char cIn;
+ * BaseType_t xHigherPriorityTaskWokenByPost;
+ *
+ *  // We have not woken a task at the start of the ISR.
+ *  xHigherPriorityTaskWokenByPost = pdFALSE;
+ *
+ *  // Loop until the buffer is empty.
+ *  do
+ *  {
+ *      // Obtain a byte from the buffer.
+ *      cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
+ *
+ *      // Post each byte.
+ *      xQueueGenericSendFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWokenByPost, queueSEND_TO_BACK );
+ *
+ *  } while( portINPUT_BYTE( BUFFER_COUNT ) );
+ *
+ *  // Now the buffer is empty we can switch context if necessary.  Note that the
+ *  // name of the yield function required is port specific.
+ *  if( xHigherPriorityTaskWokenByPost )
+ *  {
+ *      portYIELD_FROM_ISR();
+ *  }
+ * }
+ * 

+ *
+ * \defgroup xQueueSendFromISR xQueueSendFromISR
+ * \ingroup QueueManagement
+ */
+BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue,
+                                     const void * const pvItemToQueue,
+                                     BaseType_t * const pxHigherPriorityTaskWoken,
+                                     const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION;
+BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue,
+                              BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+
+/**
+ * queue. h
+ * 
+ * BaseType_t xQueueReceiveFromISR(
+ *                                     QueueHandle_t    xQueue,
+ *                                     void             *pvBuffer,
+ *                                     BaseType_t       *pxTaskWoken
+ *                                 );
+ * 

+ *
+ * Receive an item from a queue.  It is safe to use this function from within an
+ * interrupt service routine.
+ *
+ * @param xQueue The handle to the queue from which the item is to be
+ * received.
+ *
+ * @param pvBuffer Pointer to the buffer into which the received item will
+ * be copied.
+ *
+ * @param pxTaskWoken A task may be blocked waiting for space to become
+ * available on the queue.  If xQueueReceiveFromISR causes such a task to
+ * unblock *pxTaskWoken will get set to pdTRUE, otherwise *pxTaskWoken will
+ * remain unchanged.
+ *
+ * @return pdTRUE if an item was successfully received from the queue,
+ * otherwise pdFALSE.
+ *
+ * Example usage:
+ * 
+ *
+ * QueueHandle_t xQueue;
+ *
+ * // Function to create a queue and post some values.
+ * void vAFunction( void *pvParameters )
+ * {
+ * char cValueToPost;
+ * const TickType_t xTicksToWait = ( TickType_t )0xff;
+ *
+ *  // Create a queue capable of containing 10 characters.
+ *  xQueue = xQueueCreate( 10, sizeof( char ) );
+ *  if( xQueue == 0 )
+ *  {
+ *      // Failed to create the queue.
+ *  }
+ *
+ *  // ...
+ *
+ *  // Post some characters that will be used within an ISR.  If the queue
+ *  // is full then this task will block for xTicksToWait ticks.
+ *  cValueToPost = 'a';
+ *  xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );
+ *  cValueToPost = 'b';
+ *  xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );
+ *
+ *  // ... keep posting characters ... this task may block when the queue
+ *  // becomes full.
+ *
+ *  cValueToPost = 'c';
+ *  xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );
+ * }
+ *
+ * // ISR that outputs all the characters received on the queue.
+ * void vISR_Routine( void )
+ * {
+ * BaseType_t xTaskWokenByReceive = pdFALSE;
+ * char cRxedChar;
+ *
+ *  while( xQueueReceiveFromISR( xQueue, ( void * ) &cRxedChar, &xTaskWokenByReceive) )
+ *  {
+ *      // A character was received.  Output the character now.
+ *      vOutputCharacter( cRxedChar );
+ *
+ *      // If removing the character from the queue woke the task that was
+ *      // posting onto the queue cTaskWokenByReceive will have been set to
+ *      // pdTRUE.  No matter how many times this loop iterates only one
+ *      // task will be woken.
+ *  }
+ *
+ *  if( cTaskWokenByPost != ( char ) pdFALSE;
+ *  {
+ *      taskYIELD ();
+ *  }
+ * }
+ * 

+ * \defgroup xQueueReceiveFromISR xQueueReceiveFromISR
+ * \ingroup QueueManagement
+ */
+BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue,
+                                 void * const pvBuffer,
+                                 BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+
+/*
+ * Utilities to query queues that are safe to use from an ISR.  These utilities
+ * should be used only from witin an ISR, or within a critical section.
+ */
+BaseType_t xQueueIsQueueEmptyFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+
+/*
+ * The functions defined above are for passing data to and from tasks.  The
+ * functions below are the equivalents for passing data to and from
+ * co-routines.
+ *
+ * These functions are called from the co-routine macro implementation and
+ * should not be called directly from application code.  Instead use the macro
+ * wrappers defined within croutine.h.
+ */
+BaseType_t xQueueCRSendFromISR( QueueHandle_t xQueue,
+                                const void * pvItemToQueue,
+                                BaseType_t xCoRoutinePreviouslyWoken );
+BaseType_t xQueueCRReceiveFromISR( QueueHandle_t xQueue,
+                                   void * pvBuffer,
+                                   BaseType_t * pxTaskWoken );
+BaseType_t xQueueCRSend( QueueHandle_t xQueue,
+                         const void * pvItemToQueue,
+                         TickType_t xTicksToWait );
+BaseType_t xQueueCRReceive( QueueHandle_t xQueue,
+                            void * pvBuffer,
+                            TickType_t xTicksToWait );
+
+/*
+ * For internal use only.  Use xSemaphoreCreateMutex(),
+ * xSemaphoreCreateCounting() or xSemaphoreGetMutexHolder() instead of calling
+ * these functions directly.
+ */
+QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
+QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType,
+                                       StaticQueue_t * pxStaticQueue ) PRIVILEGED_FUNCTION;
+QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount,
+                                             const UBaseType_t uxInitialCount ) PRIVILEGED_FUNCTION;
+QueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount,
+                                                   const UBaseType_t uxInitialCount,
+                                                   StaticQueue_t * pxStaticQueue ) PRIVILEGED_FUNCTION;
+BaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue,
+                                TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+TaskHandle_t xQueueGetMutexHolder( QueueHandle_t xSemaphore ) PRIVILEGED_FUNCTION;
+TaskHandle_t xQueueGetMutexHolderFromISR( QueueHandle_t xSemaphore ) PRIVILEGED_FUNCTION;
+
+/*
+ * For internal use only.  Use xSemaphoreTakeMutexRecursive() or
+ * xSemaphoreGiveMutexRecursive() instead of calling these functions directly.
+ */
+BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex,
+                                     TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex ) PRIVILEGED_FUNCTION;
+
+/*
+ * Reset a queue back to its original empty state.  The return value is now
+ * obsolete and is always set to pdPASS.
+ */
+#define xQueueReset( xQueue )    xQueueGenericReset( xQueue, pdFALSE )
+
+/*
+ * The registry is provided as a means for kernel aware debuggers to
+ * locate queues, semaphores and mutexes.  Call vQueueAddToRegistry() add
+ * a queue, semaphore or mutex handle to the registry if you want the handle
+ * to be available to a kernel aware debugger.  If you are not using a kernel
+ * aware debugger then this function can be ignored.
+ *
+ * configQUEUE_REGISTRY_SIZE defines the maximum number of handles the
+ * registry can hold.  configQUEUE_REGISTRY_SIZE must be greater than 0
+ * within FreeRTOSConfig.h for the registry to be available.  Its value
+ * does not effect the number of queues, semaphores and mutexes that can be
+ * created - just the number that the registry can hold.
+ *
+ * @param xQueue The handle of the queue being added to the registry.  This
+ * is the handle returned by a call to xQueueCreate().  Semaphore and mutex
+ * handles can also be passed in here.
+ *
+ * @param pcName The name to be associated with the handle.  This is the
+ * name that the kernel aware debugger will display.  The queue registry only
+ * stores a pointer to the string - so the string must be persistent (global or
+ * preferably in ROM/Flash), not on the stack.
+ */
+#if ( configQUEUE_REGISTRY_SIZE > 0 )
+    void vQueueAddToRegistry( QueueHandle_t xQueue,
+                              const char * pcQueueName ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+#endif
+
+/*
+ * The registry is provided as a means for kernel aware debuggers to
+ * locate queues, semaphores and mutexes.  Call vQueueAddToRegistry() add
+ * a queue, semaphore or mutex handle to the registry if you want the handle
+ * to be available to a kernel aware debugger, and vQueueUnregisterQueue() to
+ * remove the queue, semaphore or mutex from the register.  If you are not using
+ * a kernel aware debugger then this function can be ignored.
+ *
+ * @param xQueue The handle of the queue being removed from the registry.
+ */
+#if ( configQUEUE_REGISTRY_SIZE > 0 )
+    void vQueueUnregisterQueue( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+#endif
+
+/*
+ * The queue registry is provided as a means for kernel aware debuggers to
+ * locate queues, semaphores and mutexes.  Call pcQueueGetName() to look
+ * up and return the name of a queue in the queue registry from the queue's
+ * handle.
+ *
+ * @param xQueue The handle of the queue the name of which will be returned.
+ * @return If the queue is in the registry then a pointer to the name of the
+ * queue is returned.  If the queue is not in the registry then NULL is
+ * returned.
+ */
+#if ( configQUEUE_REGISTRY_SIZE > 0 )
+    const char * pcQueueGetName( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+#endif
+
+/*
+ * Generic version of the function used to create a queue using dynamic memory
+ * allocation.  This is called by other functions and macros that create other
+ * RTOS objects that use the queue structure as their base.
+ */
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+    QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength,
+                                       const UBaseType_t uxItemSize,
+                                       const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
+#endif
+
+/*
+ * Generic version of the function used to create a queue using dynamic memory
+ * allocation.  This is called by other functions and macros that create other
+ * RTOS objects that use the queue structure as their base.
+ */
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+    QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength,
+                                             const UBaseType_t uxItemSize,
+                                             uint8_t * pucQueueStorage,
+                                             StaticQueue_t * pxStaticQueue,
+                                             const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
+#endif
+
+/*
+ * Queue sets provide a mechanism to allow a task to block (pend) on a read
+ * operation from multiple queues or semaphores simultaneously.
+ *
+ * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
+ * function.
+ *
+ * A queue set must be explicitly created using a call to xQueueCreateSet()
+ * before it can be used.  Once created, standard FreeRTOS queues and semaphores
+ * can be added to the set using calls to xQueueAddToSet().
+ * xQueueSelectFromSet() is then used to determine which, if any, of the queues
+ * or semaphores contained in the set is in a state where a queue read or
+ * semaphore take operation would be successful.
+ *
+ * Note 1:  See the documentation on https://www.FreeRTOS.org/RTOS-queue-sets.html
+ * for reasons why queue sets are very rarely needed in practice as there are
+ * simpler methods of blocking on multiple objects.
+ *
+ * Note 2:  Blocking on a queue set that contains a mutex will not cause the
+ * mutex holder to inherit the priority of the blocked task.
+ *
+ * Note 3:  An additional 4 bytes of RAM is required for each space in a every
+ * queue added to a queue set.  Therefore counting semaphores that have a high
+ * maximum count value should not be added to a queue set.
+ *
+ * Note 4:  A receive (in the case of a queue) or take (in the case of a
+ * semaphore) operation must not be performed on a member of a queue set unless
+ * a call to xQueueSelectFromSet() has first returned a handle to that set member.
+ *
+ * @param uxEventQueueLength Queue sets store events that occur on
+ * the queues and semaphores contained in the set.  uxEventQueueLength specifies
+ * the maximum number of events that can be queued at once.  To be absolutely
+ * certain that events are not lost uxEventQueueLength should be set to the
+ * total sum of the length of the queues added to the set, where binary
+ * semaphores and mutexes have a length of 1, and counting semaphores have a
+ * length set by their maximum count value.  Examples:
+ *  + If a queue set is to hold a queue of length 5, another queue of length 12,
+ *    and a binary semaphore, then uxEventQueueLength should be set to
+ *    (5 + 12 + 1), or 18.
+ *  + If a queue set is to hold three binary semaphores then uxEventQueueLength
+ *    should be set to (1 + 1 + 1 ), or 3.
+ *  + If a queue set is to hold a counting semaphore that has a maximum count of
+ *    5, and a counting semaphore that has a maximum count of 3, then
+ *    uxEventQueueLength should be set to (5 + 3), or 8.
+ *
+ * @return If the queue set is created successfully then a handle to the created
+ * queue set is returned.  Otherwise NULL is returned.
+ */
+QueueSetHandle_t xQueueCreateSet( const UBaseType_t uxEventQueueLength ) PRIVILEGED_FUNCTION;
+
+/*
+ * Adds a queue or semaphore to a queue set that was previously created by a
+ * call to xQueueCreateSet().
+ *
+ * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
+ * function.
+ *
+ * Note 1:  A receive (in the case of a queue) or take (in the case of a
+ * semaphore) operation must not be performed on a member of a queue set unless
+ * a call to xQueueSelectFromSet() has first returned a handle to that set member.
+ *
+ * @param xQueueOrSemaphore The handle of the queue or semaphore being added to
+ * the queue set (cast to an QueueSetMemberHandle_t type).
+ *
+ * @param xQueueSet The handle of the queue set to which the queue or semaphore
+ * is being added.
+ *
+ * @return If the queue or semaphore was successfully added to the queue set
+ * then pdPASS is returned.  If the queue could not be successfully added to the
+ * queue set because it is already a member of a different queue set then pdFAIL
+ * is returned.
+ */
+BaseType_t xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore,
+                           QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;
+
+/*
+ * Removes a queue or semaphore from a queue set.  A queue or semaphore can only
+ * be removed from a set if the queue or semaphore is empty.
+ *
+ * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
+ * function.
+ *
+ * @param xQueueOrSemaphore The handle of the queue or semaphore being removed
+ * from the queue set (cast to an QueueSetMemberHandle_t type).
+ *
+ * @param xQueueSet The handle of the queue set in which the queue or semaphore
+ * is included.
+ *
+ * @return If the queue or semaphore was successfully removed from the queue set
+ * then pdPASS is returned.  If the queue was not in the queue set, or the
+ * queue (or semaphore) was not empty, then pdFAIL is returned.
+ */
+BaseType_t xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore,
+                                QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;
+
+/*
+ * xQueueSelectFromSet() selects from the members of a queue set a queue or
+ * semaphore that either contains data (in the case of a queue) or is available
+ * to take (in the case of a semaphore).  xQueueSelectFromSet() effectively
+ * allows a task to block (pend) on a read operation on all the queues and
+ * semaphores in a queue set simultaneously.
+ *
+ * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
+ * function.
+ *
+ * Note 1:  See the documentation on https://www.FreeRTOS.org/RTOS-queue-sets.html
+ * for reasons why queue sets are very rarely needed in practice as there are
+ * simpler methods of blocking on multiple objects.
+ *
+ * Note 2:  Blocking on a queue set that contains a mutex will not cause the
+ * mutex holder to inherit the priority of the blocked task.
+ *
+ * Note 3:  A receive (in the case of a queue) or take (in the case of a
+ * semaphore) operation must not be performed on a member of a queue set unless
+ * a call to xQueueSelectFromSet() has first returned a handle to that set member.
+ *
+ * @param xQueueSet The queue set on which the task will (potentially) block.
+ *
+ * @param xTicksToWait The maximum time, in ticks, that the calling task will
+ * remain in the Blocked state (with other tasks executing) to wait for a member
+ * of the queue set to be ready for a successful queue read or semaphore take
+ * operation.
+ *
+ * @return xQueueSelectFromSet() will return the handle of a queue (cast to
+ * a QueueSetMemberHandle_t type) contained in the queue set that contains data,
+ * or the handle of a semaphore (cast to a QueueSetMemberHandle_t type) contained
+ * in the queue set that is available, or NULL if no such queue or semaphore
+ * exists before before the specified block time expires.
+ */
+QueueSetMemberHandle_t xQueueSelectFromSet( QueueSetHandle_t xQueueSet,
+                                            const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/*
+ * A version of xQueueSelectFromSet() that can be used from an ISR.
+ */
+QueueSetMemberHandle_t xQueueSelectFromSetFromISR( QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;
+
+/* Not public API functions. */
+void vQueueWaitForMessageRestricted( QueueHandle_t xQueue,
+                                     TickType_t xTicksToWait,
+                                     const BaseType_t xWaitIndefinitely ) PRIVILEGED_FUNCTION;
+BaseType_t xQueueGenericReset( QueueHandle_t xQueue,
+                               BaseType_t xNewQueue ) PRIVILEGED_FUNCTION;
+void vQueueSetQueueNumber( QueueHandle_t xQueue,
+                           UBaseType_t uxQueueNumber ) PRIVILEGED_FUNCTION;
+UBaseType_t uxQueueGetQueueNumber( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+uint8_t ucQueueGetQueueType( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+
+#endif /* QUEUE_H */
diff --git a/include/semphr.h b/include/semphr.h
index ff21a392b..fa82554e2 100644
--- a/include/semphr.h
+++ b/include/semphr.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,35 +19,36 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef SEMAPHORE_H
 #define SEMAPHORE_H
 
 #ifndef INC_FREERTOS_H
-	#error "include FreeRTOS.h" must appear in source files before "include semphr.h"
+    #error "include FreeRTOS.h" must appear in source files before "include semphr.h"
 #endif
 
 #include "queue.h"
 
 typedef QueueHandle_t SemaphoreHandle_t;
 
-#define semBINARY_SEMAPHORE_QUEUE_LENGTH	( ( uint8_t ) 1U )
-#define semSEMAPHORE_QUEUE_ITEM_LENGTH		( ( uint8_t ) 0U )
-#define semGIVE_BLOCK_TIME					( ( TickType_t ) 0U )
+#define semBINARY_SEMAPHORE_QUEUE_LENGTH    ( ( uint8_t ) 1U )
+#define semSEMAPHORE_QUEUE_ITEM_LENGTH      ( ( uint8_t ) 0U )
+#define semGIVE_BLOCK_TIME                  ( ( TickType_t ) 0U )
 
 
 /**
  * semphr. h
- * 
vSemaphoreCreateBinary( SemaphoreHandle_t xSemaphore )

+ * 
+ * vSemaphoreCreateBinary( SemaphoreHandle_t xSemaphore );
+ * 

  *
  * In many usage scenarios it is faster and more memory efficient to use a
  * direct to task notification in place of a binary semaphore!
- * http://www.freertos.org/RTOS-task-notifications.html
+ * https://www.FreeRTOS.org/RTOS-task-notifications.html
  *
  * This old vSemaphoreCreateBinary() macro is now deprecated in favour of the
  * xSemaphoreCreateBinary() function.  Note that binary semaphores created using
@@ -71,52 +72,54 @@ typedef QueueHandle_t SemaphoreHandle_t;
  * @param xSemaphore Handle to the created semaphore.  Should be of type SemaphoreHandle_t.
  *
  * Example usage:
- 
- SemaphoreHandle_t xSemaphore = NULL;
-
- void vATask( void * pvParameters )
- {
-    // Semaphore cannot be used before a call to vSemaphoreCreateBinary ().
-    // This is a macro so pass the variable in directly.
-    vSemaphoreCreateBinary( xSemaphore );
-
-    if( xSemaphore != NULL )
-    {
-        // The semaphore was created successfully.
-        // The semaphore can now be used.
-    }
- }
- 

+ * 
+ * SemaphoreHandle_t xSemaphore = NULL;
+ *
+ * void vATask( void * pvParameters )
+ * {
+ *  // Semaphore cannot be used before a call to vSemaphoreCreateBinary ().
+ *  // This is a macro so pass the variable in directly.
+ *  vSemaphoreCreateBinary( xSemaphore );
+ *
+ *  if( xSemaphore != NULL )
+ *  {
+ *      // The semaphore was created successfully.
+ *      // The semaphore can now be used.
+ *  }
+ * }
+ * 

  * \defgroup vSemaphoreCreateBinary vSemaphoreCreateBinary
  * \ingroup Semaphores
  */
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-	#define vSemaphoreCreateBinary( xSemaphore )																							\
-		{																																	\
-			( xSemaphore ) = xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE );	\
-			if( ( xSemaphore ) != NULL )																									\
-			{																																\
-				( void ) xSemaphoreGive( ( xSemaphore ) );																					\
-			}																																\
-		}
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+    #define vSemaphoreCreateBinary( xSemaphore )                                                                                     \
+    {                                                                                                                                \
+        ( xSemaphore ) = xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE ); \
+        if( ( xSemaphore ) != NULL )                                                                                                 \
+        {                                                                                                                            \
+            ( void ) xSemaphoreGive( ( xSemaphore ) );                                                                               \
+        }                                                                                                                            \
+    }
 #endif
 
 /**
  * semphr. h
- * 
SemaphoreHandle_t xSemaphoreCreateBinary( void )

+ * 
+ * SemaphoreHandle_t xSemaphoreCreateBinary( void );
+ * 

  *
  * Creates a new binary semaphore instance, and returns a handle by which the
  * new semaphore can be referenced.
  *
  * In many usage scenarios it is faster and more memory efficient to use a
  * direct to task notification in place of a binary semaphore!
- * http://www.freertos.org/RTOS-task-notifications.html
+ * https://www.FreeRTOS.org/RTOS-task-notifications.html
  *
  * Internally, within the FreeRTOS implementation, binary semaphores use a block
  * of memory, in which the semaphore structure is stored.  If a binary semaphore
  * is created using xSemaphoreCreateBinary() then the required memory is
  * automatically dynamically allocated inside the xSemaphoreCreateBinary()
- * function.  (see http://www.freertos.org/a00111.html).  If a binary semaphore
+ * function.  (see https://www.FreeRTOS.org/a00111.html).  If a binary semaphore
  * is created using xSemaphoreCreateBinaryStatic() then the application writer
  * must provide the memory.  xSemaphoreCreateBinaryStatic() therefore allows a
  * binary semaphore to be created without using any dynamic memory allocation.
@@ -139,45 +142,47 @@ typedef QueueHandle_t SemaphoreHandle_t;
  * hold the semaphore's data structures could not be allocated.
  *
  * Example usage:
- 
- SemaphoreHandle_t xSemaphore = NULL;
-
- void vATask( void * pvParameters )
- {
-    // Semaphore cannot be used before a call to xSemaphoreCreateBinary().
-    // This is a macro so pass the variable in directly.
-    xSemaphore = xSemaphoreCreateBinary();
-
-    if( xSemaphore != NULL )
-    {
-        // The semaphore was created successfully.
-        // The semaphore can now be used.
-    }
- }
- 

+ * 
+ * SemaphoreHandle_t xSemaphore = NULL;
+ *
+ * void vATask( void * pvParameters )
+ * {
+ *  // Semaphore cannot be used before a call to xSemaphoreCreateBinary().
+ *  // This is a macro so pass the variable in directly.
+ *  xSemaphore = xSemaphoreCreateBinary();
+ *
+ *  if( xSemaphore != NULL )
+ *  {
+ *      // The semaphore was created successfully.
+ *      // The semaphore can now be used.
+ *  }
+ * }
+ * 

  * \defgroup xSemaphoreCreateBinary xSemaphoreCreateBinary
  * \ingroup Semaphores
  */
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-	#define xSemaphoreCreateBinary() xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE )
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+    #define xSemaphoreCreateBinary()    xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE )
 #endif
 
 /**
  * semphr. h
- * 
SemaphoreHandle_t xSemaphoreCreateBinaryStatic( StaticSemaphore_t *pxSemaphoreBuffer )

+ * 
+ * SemaphoreHandle_t xSemaphoreCreateBinaryStatic( StaticSemaphore_t *pxSemaphoreBuffer );
+ * 

  *
  * Creates a new binary semaphore instance, and returns a handle by which the
  * new semaphore can be referenced.
  *
  * NOTE: In many usage scenarios it is faster and more memory efficient to use a
  * direct to task notification in place of a binary semaphore!
- * http://www.freertos.org/RTOS-task-notifications.html
+ * https://www.FreeRTOS.org/RTOS-task-notifications.html
  *
  * Internally, within the FreeRTOS implementation, binary semaphores use a block
  * of memory, in which the semaphore structure is stored.  If a binary semaphore
  * is created using xSemaphoreCreateBinary() then the required memory is
  * automatically dynamically allocated inside the xSemaphoreCreateBinary()
- * function.  (see http://www.freertos.org/a00111.html).  If a binary semaphore
+ * function.  (see https://www.FreeRTOS.org/a00111.html).  If a binary semaphore
  * is created using xSemaphoreCreateBinaryStatic() then the application writer
  * must provide the memory.  xSemaphoreCreateBinaryStatic() therefore allows a
  * binary semaphore to be created without using any dynamic memory allocation.
@@ -197,36 +202,38 @@ typedef QueueHandle_t SemaphoreHandle_t;
  * returned.  If pxSemaphoreBuffer is NULL then NULL is returned.
  *
  * Example usage:
- 
- SemaphoreHandle_t xSemaphore = NULL;
- StaticSemaphore_t xSemaphoreBuffer;
-
- void vATask( void * pvParameters )
- {
-    // Semaphore cannot be used before a call to xSemaphoreCreateBinary().
-    // The semaphore's data structures will be placed in the xSemaphoreBuffer
-    // variable, the address of which is passed into the function.  The
-    // function's parameter is not NULL, so the function will not attempt any
-    // dynamic memory allocation, and therefore the function will not return
-    // return NULL.
-    xSemaphore = xSemaphoreCreateBinary( &xSemaphoreBuffer );
-
-    // Rest of task code goes here.
- }
- 

+ * 
+ * SemaphoreHandle_t xSemaphore = NULL;
+ * StaticSemaphore_t xSemaphoreBuffer;
+ *
+ * void vATask( void * pvParameters )
+ * {
+ *  // Semaphore cannot be used before a call to xSemaphoreCreateBinary().
+ *  // The semaphore's data structures will be placed in the xSemaphoreBuffer
+ *  // variable, the address of which is passed into the function.  The
+ *  // function's parameter is not NULL, so the function will not attempt any
+ *  // dynamic memory allocation, and therefore the function will not return
+ *  // return NULL.
+ *  xSemaphore = xSemaphoreCreateBinary( &xSemaphoreBuffer );
+ *
+ *  // Rest of task code goes here.
+ * }
+ * 

  * \defgroup xSemaphoreCreateBinaryStatic xSemaphoreCreateBinaryStatic
  * \ingroup Semaphores
  */
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-	#define xSemaphoreCreateBinaryStatic( pxStaticSemaphore ) xQueueGenericCreateStatic( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticSemaphore, queueQUEUE_TYPE_BINARY_SEMAPHORE )
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+    #define xSemaphoreCreateBinaryStatic( pxStaticSemaphore )    xQueueGenericCreateStatic( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticSemaphore, queueQUEUE_TYPE_BINARY_SEMAPHORE )
 #endif /* configSUPPORT_STATIC_ALLOCATION */
 
 /**
  * semphr. h
- * 
xSemaphoreTake(
+ * 
+ * xSemaphoreTake(
  *                   SemaphoreHandle_t xSemaphore,
  *                   TickType_t xBlockTime
- *               )

+ *               );
+ * 

  *
  * Macro to obtain a semaphore.  The semaphore must have previously been
  * created with a call to xSemaphoreCreateBinary(), xSemaphoreCreateMutex() or
@@ -245,55 +252,57 @@ typedef QueueHandle_t SemaphoreHandle_t;
  * if xBlockTime expired without the semaphore becoming available.
  *
  * Example usage:
- 
- SemaphoreHandle_t xSemaphore = NULL;
-
- // A task that creates a semaphore.
- void vATask( void * pvParameters )
- {
-    // Create the semaphore to guard a shared resource.
-    xSemaphore = xSemaphoreCreateBinary();
- }
-
- // A task that uses the semaphore.
- void vAnotherTask( void * pvParameters )
- {
-    // ... Do other things.
-
-    if( xSemaphore != NULL )
-    {
-        // See if we can obtain the semaphore.  If the semaphore is not available
-        // wait 10 ticks to see if it becomes free.
-        if( xSemaphoreTake( xSemaphore, ( TickType_t ) 10 ) == pdTRUE )
-        {
-            // We were able to obtain the semaphore and can now access the
-            // shared resource.
-
-            // ...
-
-            // We have finished accessing the shared resource.  Release the
-            // semaphore.
-            xSemaphoreGive( xSemaphore );
-        }
-        else
-        {
-            // We could not obtain the semaphore and can therefore not access
-            // the shared resource safely.
-        }
-    }
- }
- 

+ * 
+ * SemaphoreHandle_t xSemaphore = NULL;
+ *
+ * // A task that creates a semaphore.
+ * void vATask( void * pvParameters )
+ * {
+ *  // Create the semaphore to guard a shared resource.
+ *  xSemaphore = xSemaphoreCreateBinary();
+ * }
+ *
+ * // A task that uses the semaphore.
+ * void vAnotherTask( void * pvParameters )
+ * {
+ *  // ... Do other things.
+ *
+ *  if( xSemaphore != NULL )
+ *  {
+ *      // See if we can obtain the semaphore.  If the semaphore is not available
+ *      // wait 10 ticks to see if it becomes free.
+ *      if( xSemaphoreTake( xSemaphore, ( TickType_t ) 10 ) == pdTRUE )
+ *      {
+ *          // We were able to obtain the semaphore and can now access the
+ *          // shared resource.
+ *
+ *          // ...
+ *
+ *          // We have finished accessing the shared resource.  Release the
+ *          // semaphore.
+ *          xSemaphoreGive( xSemaphore );
+ *      }
+ *      else
+ *      {
+ *          // We could not obtain the semaphore and can therefore not access
+ *          // the shared resource safely.
+ *      }
+ *  }
+ * }
+ * 

  * \defgroup xSemaphoreTake xSemaphoreTake
  * \ingroup Semaphores
  */
-#define xSemaphoreTake( xSemaphore, xBlockTime )		xQueueSemaphoreTake( ( xSemaphore ), ( xBlockTime ) )
+#define xSemaphoreTake( xSemaphore, xBlockTime )    xQueueSemaphoreTake( ( xSemaphore ), ( xBlockTime ) )
 
 /**
  * semphr. h
+ * 
  * xSemaphoreTakeRecursive(
  *                          SemaphoreHandle_t xMutex,
  *                          TickType_t xBlockTime
- *                        )
+ *                        );
+ * 

  *
  * Macro to recursively obtain, or 'take', a mutex type semaphore.
  * The mutex must have previously been created using a call to
@@ -324,68 +333,70 @@ typedef QueueHandle_t SemaphoreHandle_t;
  * expired without the semaphore becoming available.
  *
  * Example usage:
- 
- SemaphoreHandle_t xMutex = NULL;
-
- // A task that creates a mutex.
- void vATask( void * pvParameters )
- {
-    // Create the mutex to guard a shared resource.
-    xMutex = xSemaphoreCreateRecursiveMutex();
- }
-
- // A task that uses the mutex.
- void vAnotherTask( void * pvParameters )
- {
-    // ... Do other things.
-
-    if( xMutex != NULL )
-    {
-        // See if we can obtain the mutex.  If the mutex is not available
-        // wait 10 ticks to see if it becomes free.
-        if( xSemaphoreTakeRecursive( xSemaphore, ( TickType_t ) 10 ) == pdTRUE )
-        {
-            // We were able to obtain the mutex and can now access the
-            // shared resource.
-
-            // ...
-            // For some reason due to the nature of the code further calls to
-            // xSemaphoreTakeRecursive() are made on the same mutex.  In real
-            // code these would not be just sequential calls as this would make
-            // no sense.  Instead the calls are likely to be buried inside
-            // a more complex call structure.
-            xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
-            xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
-
-            // The mutex has now been 'taken' three times, so will not be
-            // available to another task until it has also been given back
-            // three times.  Again it is unlikely that real code would have
-            // these calls sequentially, but instead buried in a more complex
-            // call structure.  This is just for illustrative purposes.
-            xSemaphoreGiveRecursive( xMutex );
-            xSemaphoreGiveRecursive( xMutex );
-            xSemaphoreGiveRecursive( xMutex );
-
-            // Now the mutex can be taken by other tasks.
-        }
-        else
-        {
-            // We could not obtain the mutex and can therefore not access
-            // the shared resource safely.
-        }
-    }
- }
- 

+ * 
+ * SemaphoreHandle_t xMutex = NULL;
+ *
+ * // A task that creates a mutex.
+ * void vATask( void * pvParameters )
+ * {
+ *  // Create the mutex to guard a shared resource.
+ *  xMutex = xSemaphoreCreateRecursiveMutex();
+ * }
+ *
+ * // A task that uses the mutex.
+ * void vAnotherTask( void * pvParameters )
+ * {
+ *  // ... Do other things.
+ *
+ *  if( xMutex != NULL )
+ *  {
+ *      // See if we can obtain the mutex.  If the mutex is not available
+ *      // wait 10 ticks to see if it becomes free.
+ *      if( xSemaphoreTakeRecursive( xSemaphore, ( TickType_t ) 10 ) == pdTRUE )
+ *      {
+ *          // We were able to obtain the mutex and can now access the
+ *          // shared resource.
+ *
+ *          // ...
+ *          // For some reason due to the nature of the code further calls to
+ *          // xSemaphoreTakeRecursive() are made on the same mutex.  In real
+ *          // code these would not be just sequential calls as this would make
+ *          // no sense.  Instead the calls are likely to be buried inside
+ *          // a more complex call structure.
+ *          xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
+ *          xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
+ *
+ *          // The mutex has now been 'taken' three times, so will not be
+ *          // available to another task until it has also been given back
+ *          // three times.  Again it is unlikely that real code would have
+ *          // these calls sequentially, but instead buried in a more complex
+ *          // call structure.  This is just for illustrative purposes.
+ *          xSemaphoreGiveRecursive( xMutex );
+ *          xSemaphoreGiveRecursive( xMutex );
+ *          xSemaphoreGiveRecursive( xMutex );
+ *
+ *          // Now the mutex can be taken by other tasks.
+ *      }
+ *      else
+ *      {
+ *          // We could not obtain the mutex and can therefore not access
+ *          // the shared resource safely.
+ *      }
+ *  }
+ * }
+ * 

  * \defgroup xSemaphoreTakeRecursive xSemaphoreTakeRecursive
  * \ingroup Semaphores
  */
-#if( configUSE_RECURSIVE_MUTEXES == 1 )
-	#define xSemaphoreTakeRecursive( xMutex, xBlockTime )	xQueueTakeMutexRecursive( ( xMutex ), ( xBlockTime ) )
+#if ( configUSE_RECURSIVE_MUTEXES == 1 )
+    #define xSemaphoreTakeRecursive( xMutex, xBlockTime )    xQueueTakeMutexRecursive( ( xMutex ), ( xBlockTime ) )
 #endif
 
 /**
  * semphr. h
- * 
xSemaphoreGive( SemaphoreHandle_t xSemaphore )

+ * 
+ * xSemaphoreGive( SemaphoreHandle_t xSemaphore );
+ * 

  *
  * Macro to release a semaphore.  The semaphore must have previously been
  * created with a call to xSemaphoreCreateBinary(), xSemaphoreCreateMutex() or
@@ -406,49 +417,51 @@ typedef QueueHandle_t SemaphoreHandle_t;
  * semaphore was not first obtained correctly.
  *
  * Example usage:
- 
- SemaphoreHandle_t xSemaphore = NULL;
-
- void vATask( void * pvParameters )
- {
-    // Create the semaphore to guard a shared resource.
-    xSemaphore = vSemaphoreCreateBinary();
-
-    if( xSemaphore != NULL )
-    {
-        if( xSemaphoreGive( xSemaphore ) != pdTRUE )
-        {
-            // We would expect this call to fail because we cannot give
-            // a semaphore without first "taking" it!
-        }
-
-        // Obtain the semaphore - don't block if the semaphore is not
-        // immediately available.
-        if( xSemaphoreTake( xSemaphore, ( TickType_t ) 0 ) )
-        {
-            // We now have the semaphore and can access the shared resource.
-
-            // ...
-
-            // We have finished accessing the shared resource so can free the
-            // semaphore.
-            if( xSemaphoreGive( xSemaphore ) != pdTRUE )
-            {
-                // We would not expect this call to fail because we must have
-                // obtained the semaphore to get here.
-            }
-        }
-    }
- }
- 

+ * 
+ * SemaphoreHandle_t xSemaphore = NULL;
+ *
+ * void vATask( void * pvParameters )
+ * {
+ *  // Create the semaphore to guard a shared resource.
+ *  xSemaphore = vSemaphoreCreateBinary();
+ *
+ *  if( xSemaphore != NULL )
+ *  {
+ *      if( xSemaphoreGive( xSemaphore ) != pdTRUE )
+ *      {
+ *          // We would expect this call to fail because we cannot give
+ *          // a semaphore without first "taking" it!
+ *      }
+ *
+ *      // Obtain the semaphore - don't block if the semaphore is not
+ *      // immediately available.
+ *      if( xSemaphoreTake( xSemaphore, ( TickType_t ) 0 ) )
+ *      {
+ *          // We now have the semaphore and can access the shared resource.
+ *
+ *          // ...
+ *
+ *          // We have finished accessing the shared resource so can free the
+ *          // semaphore.
+ *          if( xSemaphoreGive( xSemaphore ) != pdTRUE )
+ *          {
+ *              // We would not expect this call to fail because we must have
+ *              // obtained the semaphore to get here.
+ *          }
+ *      }
+ *  }
+ * }
+ * 

  * \defgroup xSemaphoreGive xSemaphoreGive
  * \ingroup Semaphores
  */
-#define xSemaphoreGive( xSemaphore )		xQueueGenericSend( ( QueueHandle_t ) ( xSemaphore ), NULL, semGIVE_BLOCK_TIME, queueSEND_TO_BACK )
+#define xSemaphoreGive( xSemaphore )    xQueueGenericSend( ( QueueHandle_t ) ( xSemaphore ), NULL, semGIVE_BLOCK_TIME, queueSEND_TO_BACK )
 
 /**
  * semphr. h
- * 
xSemaphoreGiveRecursive( SemaphoreHandle_t xMutex )

+ * 
+ * xSemaphoreGiveRecursive( SemaphoreHandle_t xMutex );
+ * 

  *
  * Macro to recursively release, or 'give', a mutex type semaphore.
  * The mutex must have previously been created using a call to
@@ -472,73 +485,74 @@ typedef QueueHandle_t SemaphoreHandle_t;
  * @return pdTRUE if the semaphore was given.
  *
  * Example usage:
- 
- SemaphoreHandle_t xMutex = NULL;
-
- // A task that creates a mutex.
- void vATask( void * pvParameters )
- {
-    // Create the mutex to guard a shared resource.
-    xMutex = xSemaphoreCreateRecursiveMutex();
- }
-
- // A task that uses the mutex.
- void vAnotherTask( void * pvParameters )
- {
-    // ... Do other things.
-
-    if( xMutex != NULL )
-    {
-        // See if we can obtain the mutex.  If the mutex is not available
-        // wait 10 ticks to see if it becomes free.
-        if( xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 ) == pdTRUE )
-        {
-            // We were able to obtain the mutex and can now access the
-            // shared resource.
-
-            // ...
-            // For some reason due to the nature of the code further calls to
-			// xSemaphoreTakeRecursive() are made on the same mutex.  In real
-			// code these would not be just sequential calls as this would make
-			// no sense.  Instead the calls are likely to be buried inside
-			// a more complex call structure.
-            xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
-            xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
-
-            // The mutex has now been 'taken' three times, so will not be
-			// available to another task until it has also been given back
-			// three times.  Again it is unlikely that real code would have
-			// these calls sequentially, it would be more likely that the calls
-			// to xSemaphoreGiveRecursive() would be called as a call stack
-			// unwound.  This is just for demonstrative purposes.
-            xSemaphoreGiveRecursive( xMutex );
-			xSemaphoreGiveRecursive( xMutex );
-			xSemaphoreGiveRecursive( xMutex );
-
-			// Now the mutex can be taken by other tasks.
-        }
-        else
-        {
-            // We could not obtain the mutex and can therefore not access
-            // the shared resource safely.
-        }
-    }
- }
- 

+ * 
+ * SemaphoreHandle_t xMutex = NULL;
+ *
+ * // A task that creates a mutex.
+ * void vATask( void * pvParameters )
+ * {
+ *  // Create the mutex to guard a shared resource.
+ *  xMutex = xSemaphoreCreateRecursiveMutex();
+ * }
+ *
+ * // A task that uses the mutex.
+ * void vAnotherTask( void * pvParameters )
+ * {
+ *  // ... Do other things.
+ *
+ *  if( xMutex != NULL )
+ *  {
+ *      // See if we can obtain the mutex.  If the mutex is not available
+ *      // wait 10 ticks to see if it becomes free.
+ *      if( xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 ) == pdTRUE )
+ *      {
+ *          // We were able to obtain the mutex and can now access the
+ *          // shared resource.
+ *
+ *          // ...
+ *          // For some reason due to the nature of the code further calls to
+ *          // xSemaphoreTakeRecursive() are made on the same mutex.  In real
+ *          // code these would not be just sequential calls as this would make
+ *          // no sense.  Instead the calls are likely to be buried inside
+ *          // a more complex call structure.
+ *          xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
+ *          xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
+ *
+ *          // The mutex has now been 'taken' three times, so will not be
+ *          // available to another task until it has also been given back
+ *          // three times.  Again it is unlikely that real code would have
+ *          // these calls sequentially, it would be more likely that the calls
+ *          // to xSemaphoreGiveRecursive() would be called as a call stack
+ *          // unwound.  This is just for demonstrative purposes.
+ *          xSemaphoreGiveRecursive( xMutex );
+ *          xSemaphoreGiveRecursive( xMutex );
+ *          xSemaphoreGiveRecursive( xMutex );
+ *
+ *          // Now the mutex can be taken by other tasks.
+ *      }
+ *      else
+ *      {
+ *          // We could not obtain the mutex and can therefore not access
+ *          // the shared resource safely.
+ *      }
+ *  }
+ * }
+ * 

  * \defgroup xSemaphoreGiveRecursive xSemaphoreGiveRecursive
  * \ingroup Semaphores
  */
-#if( configUSE_RECURSIVE_MUTEXES == 1 )
-	#define xSemaphoreGiveRecursive( xMutex )	xQueueGiveMutexRecursive( ( xMutex ) )
+#if ( configUSE_RECURSIVE_MUTEXES == 1 )
+    #define xSemaphoreGiveRecursive( xMutex )    xQueueGiveMutexRecursive( ( xMutex ) )
 #endif
 
 /**
  * semphr. h
  * 
- xSemaphoreGiveFromISR(
-                          SemaphoreHandle_t xSemaphore,
-                          BaseType_t *pxHigherPriorityTaskWoken
-                      )

+ * xSemaphoreGiveFromISR(
+ *                        SemaphoreHandle_t xSemaphore,
+ *                        BaseType_t *pxHigherPriorityTaskWoken
+ *                    );
+ * 

  *
  * Macro to  release a semaphore.  The semaphore must have previously been
  * created with a call to xSemaphoreCreateBinary() or xSemaphoreCreateCounting().
@@ -560,76 +574,77 @@ typedef QueueHandle_t SemaphoreHandle_t;
  * @return pdTRUE if the semaphore was successfully given, otherwise errQUEUE_FULL.
  *
  * Example usage:
- 
+ * 
  \#define LONG_TIME 0xffff
- \#define TICKS_TO_WAIT	10
- SemaphoreHandle_t xSemaphore = NULL;
-
- // Repetitive task.
- void vATask( void * pvParameters )
- {
-    for( ;; )
-    {
-        // We want this task to run every 10 ticks of a timer.  The semaphore
-        // was created before this task was started.
-
-        // Block waiting for the semaphore to become available.
-        if( xSemaphoreTake( xSemaphore, LONG_TIME ) == pdTRUE )
-        {
-            // It is time to execute.
-
-            // ...
-
-            // We have finished our task.  Return to the top of the loop where
-            // we will block on the semaphore until it is time to execute
-            // again.  Note when using the semaphore for synchronisation with an
-			// ISR in this manner there is no need to 'give' the semaphore back.
-        }
-    }
- }
-
- // Timer ISR
- void vTimerISR( void * pvParameters )
- {
- static uint8_t ucLocalTickCount = 0;
- static BaseType_t xHigherPriorityTaskWoken;
-
-    // A timer tick has occurred.
-
-    // ... Do other time functions.
-
-    // Is it time for vATask () to run?
-	xHigherPriorityTaskWoken = pdFALSE;
-    ucLocalTickCount++;
-    if( ucLocalTickCount >= TICKS_TO_WAIT )
-    {
-        // Unblock the task by releasing the semaphore.
-        xSemaphoreGiveFromISR( xSemaphore, &xHigherPriorityTaskWoken );
-
-        // Reset the count so we release the semaphore again in 10 ticks time.
-        ucLocalTickCount = 0;
-    }
-
-    if( xHigherPriorityTaskWoken != pdFALSE )
-    {
-        // We can force a context switch here.  Context switching from an
-        // ISR uses port specific syntax.  Check the demo task for your port
-        // to find the syntax required.
-    }
- }
- 

+ \#define TICKS_TO_WAIT 10
+ * SemaphoreHandle_t xSemaphore = NULL;
+ *
+ * // Repetitive task.
+ * void vATask( void * pvParameters )
+ * {
+ *  for( ;; )
+ *  {
+ *      // We want this task to run every 10 ticks of a timer.  The semaphore
+ *      // was created before this task was started.
+ *
+ *      // Block waiting for the semaphore to become available.
+ *      if( xSemaphoreTake( xSemaphore, LONG_TIME ) == pdTRUE )
+ *      {
+ *          // It is time to execute.
+ *
+ *          // ...
+ *
+ *          // We have finished our task.  Return to the top of the loop where
+ *          // we will block on the semaphore until it is time to execute
+ *          // again.  Note when using the semaphore for synchronisation with an
+ *          // ISR in this manner there is no need to 'give' the semaphore back.
+ *      }
+ *  }
+ * }
+ *
+ * // Timer ISR
+ * void vTimerISR( void * pvParameters )
+ * {
+ * static uint8_t ucLocalTickCount = 0;
+ * static BaseType_t xHigherPriorityTaskWoken;
+ *
+ *  // A timer tick has occurred.
+ *
+ *  // ... Do other time functions.
+ *
+ *  // Is it time for vATask () to run?
+ *  xHigherPriorityTaskWoken = pdFALSE;
+ *  ucLocalTickCount++;
+ *  if( ucLocalTickCount >= TICKS_TO_WAIT )
+ *  {
+ *      // Unblock the task by releasing the semaphore.
+ *      xSemaphoreGiveFromISR( xSemaphore, &xHigherPriorityTaskWoken );
+ *
+ *      // Reset the count so we release the semaphore again in 10 ticks time.
+ *      ucLocalTickCount = 0;
+ *  }
+ *
+ *  if( xHigherPriorityTaskWoken != pdFALSE )
+ *  {
+ *      // We can force a context switch here.  Context switching from an
+ *      // ISR uses port specific syntax.  Check the demo task for your port
+ *      // to find the syntax required.
+ *  }
+ * }
+ * 

  * \defgroup xSemaphoreGiveFromISR xSemaphoreGiveFromISR
  * \ingroup Semaphores
  */
-#define xSemaphoreGiveFromISR( xSemaphore, pxHigherPriorityTaskWoken )	xQueueGiveFromISR( ( QueueHandle_t ) ( xSemaphore ), ( pxHigherPriorityTaskWoken ) )
+#define xSemaphoreGiveFromISR( xSemaphore, pxHigherPriorityTaskWoken )    xQueueGiveFromISR( ( QueueHandle_t ) ( xSemaphore ), ( pxHigherPriorityTaskWoken ) )
 
 /**
  * semphr. h
  * 
- xSemaphoreTakeFromISR(
-                          SemaphoreHandle_t xSemaphore,
-                          BaseType_t *pxHigherPriorityTaskWoken
-                      )

+ * xSemaphoreTakeFromISR(
+ *                        SemaphoreHandle_t xSemaphore,
+ *                        BaseType_t *pxHigherPriorityTaskWoken
+ *                    );
+ * 

  *
  * Macro to  take a semaphore from an ISR.  The semaphore must have
  * previously been created with a call to xSemaphoreCreateBinary() or
@@ -655,11 +670,13 @@ typedef QueueHandle_t SemaphoreHandle_t;
  * @return pdTRUE if the semaphore was successfully taken, otherwise
  * pdFALSE
  */
-#define xSemaphoreTakeFromISR( xSemaphore, pxHigherPriorityTaskWoken )	xQueueReceiveFromISR( ( QueueHandle_t ) ( xSemaphore ), NULL, ( pxHigherPriorityTaskWoken ) )
+#define xSemaphoreTakeFromISR( xSemaphore, pxHigherPriorityTaskWoken )    xQueueReceiveFromISR( ( QueueHandle_t ) ( xSemaphore ), NULL, ( pxHigherPriorityTaskWoken ) )
 
 /**
  * semphr. h
- * 
SemaphoreHandle_t xSemaphoreCreateMutex( void )

+ * 
+ * SemaphoreHandle_t xSemaphoreCreateMutex( void );
+ * 

  *
  * Creates a new mutex type semaphore instance, and returns a handle by which
  * the new mutex can be referenced.
@@ -668,7 +685,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
  * of memory, in which the mutex structure is stored.  If a mutex is created
  * using xSemaphoreCreateMutex() then the required memory is automatically
  * dynamically allocated inside the xSemaphoreCreateMutex() function.  (see
- * http://www.freertos.org/a00111.html).  If a mutex is created using
+ * https://www.FreeRTOS.org/a00111.html).  If a mutex is created using
  * xSemaphoreCreateMutexStatic() then the application writer must provided the
  * memory.  xSemaphoreCreateMutexStatic() therefore allows a mutex to be created
  * without using any dynamic memory allocation.
@@ -693,32 +710,34 @@ typedef QueueHandle_t SemaphoreHandle_t;
  * data structures then NULL is returned.
  *
  * Example usage:
- 
- SemaphoreHandle_t xSemaphore;
-
- void vATask( void * pvParameters )
- {
-    // Semaphore cannot be used before a call to xSemaphoreCreateMutex().
-    // This is a macro so pass the variable in directly.
-    xSemaphore = xSemaphoreCreateMutex();
-
-    if( xSemaphore != NULL )
-    {
-        // The semaphore was created successfully.
-        // The semaphore can now be used.
-    }
- }
- 

+ * 
+ * SemaphoreHandle_t xSemaphore;
+ *
+ * void vATask( void * pvParameters )
+ * {
+ *  // Semaphore cannot be used before a call to xSemaphoreCreateMutex().
+ *  // This is a macro so pass the variable in directly.
+ *  xSemaphore = xSemaphoreCreateMutex();
+ *
+ *  if( xSemaphore != NULL )
+ *  {
+ *      // The semaphore was created successfully.
+ *      // The semaphore can now be used.
+ *  }
+ * }
+ * 

  * \defgroup xSemaphoreCreateMutex xSemaphoreCreateMutex
  * \ingroup Semaphores
  */
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-	#define xSemaphoreCreateMutex() xQueueCreateMutex( queueQUEUE_TYPE_MUTEX )
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+    #define xSemaphoreCreateMutex()    xQueueCreateMutex( queueQUEUE_TYPE_MUTEX )
 #endif
 
 /**
  * semphr. h
- * 
SemaphoreHandle_t xSemaphoreCreateMutexStatic( StaticSemaphore_t *pxMutexBuffer )

+ * 
+ * SemaphoreHandle_t xSemaphoreCreateMutexStatic( StaticSemaphore_t *pxMutexBuffer );
+ * 

  *
  * Creates a new mutex type semaphore instance, and returns a handle by which
  * the new mutex can be referenced.
@@ -727,7 +746,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
  * of memory, in which the mutex structure is stored.  If a mutex is created
  * using xSemaphoreCreateMutex() then the required memory is automatically
  * dynamically allocated inside the xSemaphoreCreateMutex() function.  (see
- * http://www.freertos.org/a00111.html).  If a mutex is created using
+ * https://www.FreeRTOS.org/a00111.html).  If a mutex is created using
  * xSemaphoreCreateMutexStatic() then the application writer must provided the
  * memory.  xSemaphoreCreateMutexStatic() therefore allows a mutex to be created
  * without using any dynamic memory allocation.
@@ -755,32 +774,34 @@ typedef QueueHandle_t SemaphoreHandle_t;
  * mutex is returned.  If pxMutexBuffer was NULL then NULL is returned.
  *
  * Example usage:
- 
- SemaphoreHandle_t xSemaphore;
- StaticSemaphore_t xMutexBuffer;
-
- void vATask( void * pvParameters )
- {
-    // A mutex cannot be used before it has been created.  xMutexBuffer is
-    // into xSemaphoreCreateMutexStatic() so no dynamic memory allocation is
-    // attempted.
-    xSemaphore = xSemaphoreCreateMutexStatic( &xMutexBuffer );
-
-    // As no dynamic memory allocation was performed, xSemaphore cannot be NULL,
-    // so there is no need to check it.
- }
- 

+ * 
+ * SemaphoreHandle_t xSemaphore;
+ * StaticSemaphore_t xMutexBuffer;
+ *
+ * void vATask( void * pvParameters )
+ * {
+ *  // A mutex cannot be used before it has been created.  xMutexBuffer is
+ *  // into xSemaphoreCreateMutexStatic() so no dynamic memory allocation is
+ *  // attempted.
+ *  xSemaphore = xSemaphoreCreateMutexStatic( &xMutexBuffer );
+ *
+ *  // As no dynamic memory allocation was performed, xSemaphore cannot be NULL,
+ *  // so there is no need to check it.
+ * }
+ * 

  * \defgroup xSemaphoreCreateMutexStatic xSemaphoreCreateMutexStatic
  * \ingroup Semaphores
  */
- #if( configSUPPORT_STATIC_ALLOCATION == 1 )
-	#define xSemaphoreCreateMutexStatic( pxMutexBuffer ) xQueueCreateMutexStatic( queueQUEUE_TYPE_MUTEX, ( pxMutexBuffer ) )
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+    #define xSemaphoreCreateMutexStatic( pxMutexBuffer )    xQueueCreateMutexStatic( queueQUEUE_TYPE_MUTEX, ( pxMutexBuffer ) )
 #endif /* configSUPPORT_STATIC_ALLOCATION */
 
 
 /**
  * semphr. h
- * 
SemaphoreHandle_t xSemaphoreCreateRecursiveMutex( void )

+ * 
+ * SemaphoreHandle_t xSemaphoreCreateRecursiveMutex( void );
+ * 

  *
  * Creates a new recursive mutex type semaphore instance, and returns a handle
  * by which the new recursive mutex can be referenced.
@@ -790,7 +811,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
  * created using xSemaphoreCreateRecursiveMutex() then the required memory is
  * automatically dynamically allocated inside the
  * xSemaphoreCreateRecursiveMutex() function.  (see
- * http://www.freertos.org/a00111.html).  If a recursive mutex is created using
+ * https://www.FreeRTOS.org/a00111.html).  If a recursive mutex is created using
  * xSemaphoreCreateRecursiveMutexStatic() then the application writer must
  * provide the memory that will get used by the mutex.
  * xSemaphoreCreateRecursiveMutexStatic() therefore allows a recursive mutex to
@@ -822,32 +843,34 @@ typedef QueueHandle_t SemaphoreHandle_t;
  * SemaphoreHandle_t.
  *
  * Example usage:
- 
- SemaphoreHandle_t xSemaphore;
-
- void vATask( void * pvParameters )
- {
-    // Semaphore cannot be used before a call to xSemaphoreCreateMutex().
-    // This is a macro so pass the variable in directly.
-    xSemaphore = xSemaphoreCreateRecursiveMutex();
-
-    if( xSemaphore != NULL )
-    {
-        // The semaphore was created successfully.
-        // The semaphore can now be used.
-    }
- }
- 

+ * 
+ * SemaphoreHandle_t xSemaphore;
+ *
+ * void vATask( void * pvParameters )
+ * {
+ *  // Semaphore cannot be used before a call to xSemaphoreCreateMutex().
+ *  // This is a macro so pass the variable in directly.
+ *  xSemaphore = xSemaphoreCreateRecursiveMutex();
+ *
+ *  if( xSemaphore != NULL )
+ *  {
+ *      // The semaphore was created successfully.
+ *      // The semaphore can now be used.
+ *  }
+ * }
+ * 

  * \defgroup xSemaphoreCreateRecursiveMutex xSemaphoreCreateRecursiveMutex
  * \ingroup Semaphores
  */
-#if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configUSE_RECURSIVE_MUTEXES == 1 ) )
-	#define xSemaphoreCreateRecursiveMutex() xQueueCreateMutex( queueQUEUE_TYPE_RECURSIVE_MUTEX )
+#if ( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configUSE_RECURSIVE_MUTEXES == 1 ) )
+    #define xSemaphoreCreateRecursiveMutex()    xQueueCreateMutex( queueQUEUE_TYPE_RECURSIVE_MUTEX )
 #endif
 
 /**
  * semphr. h
- * 
SemaphoreHandle_t xSemaphoreCreateRecursiveMutexStatic( StaticSemaphore_t *pxMutexBuffer )

+ * 
+ * SemaphoreHandle_t xSemaphoreCreateRecursiveMutexStatic( StaticSemaphore_t *pxMutexBuffer );
+ * 

  *
  * Creates a new recursive mutex type semaphore instance, and returns a handle
  * by which the new recursive mutex can be referenced.
@@ -857,7 +880,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
  * created using xSemaphoreCreateRecursiveMutex() then the required memory is
  * automatically dynamically allocated inside the
  * xSemaphoreCreateRecursiveMutex() function.  (see
- * http://www.freertos.org/a00111.html).  If a recursive mutex is created using
+ * https://www.FreeRTOS.org/a00111.html).  If a recursive mutex is created using
  * xSemaphoreCreateRecursiveMutexStatic() then the application writer must
  * provide the memory that will get used by the mutex.
  * xSemaphoreCreateRecursiveMutexStatic() therefore allows a recursive mutex to
@@ -894,47 +917,49 @@ typedef QueueHandle_t SemaphoreHandle_t;
  * returned.
  *
  * Example usage:
- 
- SemaphoreHandle_t xSemaphore;
- StaticSemaphore_t xMutexBuffer;
-
- void vATask( void * pvParameters )
- {
-    // A recursive semaphore cannot be used before it is created.  Here a
-    // recursive mutex is created using xSemaphoreCreateRecursiveMutexStatic().
-    // The address of xMutexBuffer is passed into the function, and will hold
-    // the mutexes data structures - so no dynamic memory allocation will be
-    // attempted.
-    xSemaphore = xSemaphoreCreateRecursiveMutexStatic( &xMutexBuffer );
-
-    // As no dynamic memory allocation was performed, xSemaphore cannot be NULL,
-    // so there is no need to check it.
- }
- 

+ * 
+ * SemaphoreHandle_t xSemaphore;
+ * StaticSemaphore_t xMutexBuffer;
+ *
+ * void vATask( void * pvParameters )
+ * {
+ *  // A recursive semaphore cannot be used before it is created.  Here a
+ *  // recursive mutex is created using xSemaphoreCreateRecursiveMutexStatic().
+ *  // The address of xMutexBuffer is passed into the function, and will hold
+ *  // the mutexes data structures - so no dynamic memory allocation will be
+ *  // attempted.
+ *  xSemaphore = xSemaphoreCreateRecursiveMutexStatic( &xMutexBuffer );
+ *
+ *  // As no dynamic memory allocation was performed, xSemaphore cannot be NULL,
+ *  // so there is no need to check it.
+ * }
+ * 

  * \defgroup xSemaphoreCreateRecursiveMutexStatic xSemaphoreCreateRecursiveMutexStatic
  * \ingroup Semaphores
  */
-#if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configUSE_RECURSIVE_MUTEXES == 1 ) )
-	#define xSemaphoreCreateRecursiveMutexStatic( pxStaticSemaphore ) xQueueCreateMutexStatic( queueQUEUE_TYPE_RECURSIVE_MUTEX, pxStaticSemaphore )
+#if ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configUSE_RECURSIVE_MUTEXES == 1 ) )
+    #define xSemaphoreCreateRecursiveMutexStatic( pxStaticSemaphore )    xQueueCreateMutexStatic( queueQUEUE_TYPE_RECURSIVE_MUTEX, pxStaticSemaphore )
 #endif /* configSUPPORT_STATIC_ALLOCATION */
 
 /**
  * semphr. h
- * 
SemaphoreHandle_t xSemaphoreCreateCounting( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount )

+ * 
+ * SemaphoreHandle_t xSemaphoreCreateCounting( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount );
+ * 

  *
  * Creates a new counting semaphore instance, and returns a handle by which the
  * new counting semaphore can be referenced.
  *
  * In many usage scenarios it is faster and more memory efficient to use a
  * direct to task notification in place of a counting semaphore!
- * http://www.freertos.org/RTOS-task-notifications.html
+ * https://www.FreeRTOS.org/RTOS-task-notifications.html
  *
  * Internally, within the FreeRTOS implementation, counting semaphores use a
  * block of memory, in which the counting semaphore structure is stored.  If a
  * counting semaphore is created using xSemaphoreCreateCounting() then the
  * required memory is automatically dynamically allocated inside the
  * xSemaphoreCreateCounting() function.  (see
- * http://www.freertos.org/a00111.html).  If a counting semaphore is created
+ * https://www.FreeRTOS.org/a00111.html).  If a counting semaphore is created
  * using xSemaphoreCreateCountingStatic() then the application writer can
  * instead optionally provide the memory that will get used by the counting
  * semaphore.  xSemaphoreCreateCountingStatic() therefore allows a counting
@@ -972,49 +997,51 @@ typedef QueueHandle_t SemaphoreHandle_t;
  *         created.
  *
  * Example usage:
- 
- SemaphoreHandle_t xSemaphore;
-
- void vATask( void * pvParameters )
- {
- SemaphoreHandle_t xSemaphore = NULL;
-
-    // Semaphore cannot be used before a call to xSemaphoreCreateCounting().
-    // The max value to which the semaphore can count should be 10, and the
-    // initial value assigned to the count should be 0.
-    xSemaphore = xSemaphoreCreateCounting( 10, 0 );
-
-    if( xSemaphore != NULL )
-    {
-        // The semaphore was created successfully.
-        // The semaphore can now be used.
-    }
- }
- 

+ * 
+ * SemaphoreHandle_t xSemaphore;
+ *
+ * void vATask( void * pvParameters )
+ * {
+ * SemaphoreHandle_t xSemaphore = NULL;
+ *
+ *  // Semaphore cannot be used before a call to xSemaphoreCreateCounting().
+ *  // The max value to which the semaphore can count should be 10, and the
+ *  // initial value assigned to the count should be 0.
+ *  xSemaphore = xSemaphoreCreateCounting( 10, 0 );
+ *
+ *  if( xSemaphore != NULL )
+ *  {
+ *      // The semaphore was created successfully.
+ *      // The semaphore can now be used.
+ *  }
+ * }
+ * 

  * \defgroup xSemaphoreCreateCounting xSemaphoreCreateCounting
  * \ingroup Semaphores
  */
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-	#define xSemaphoreCreateCounting( uxMaxCount, uxInitialCount ) xQueueCreateCountingSemaphore( ( uxMaxCount ), ( uxInitialCount ) )
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+    #define xSemaphoreCreateCounting( uxMaxCount, uxInitialCount )    xQueueCreateCountingSemaphore( ( uxMaxCount ), ( uxInitialCount ) )
 #endif
 
 /**
  * semphr. h
- * 
SemaphoreHandle_t xSemaphoreCreateCountingStatic( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount, StaticSemaphore_t *pxSemaphoreBuffer )

+ * 
+ * SemaphoreHandle_t xSemaphoreCreateCountingStatic( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount, StaticSemaphore_t *pxSemaphoreBuffer );
+ * 

  *
  * Creates a new counting semaphore instance, and returns a handle by which the
  * new counting semaphore can be referenced.
  *
  * In many usage scenarios it is faster and more memory efficient to use a
  * direct to task notification in place of a counting semaphore!
- * http://www.freertos.org/RTOS-task-notifications.html
+ * https://www.FreeRTOS.org/RTOS-task-notifications.html
  *
  * Internally, within the FreeRTOS implementation, counting semaphores use a
  * block of memory, in which the counting semaphore structure is stored.  If a
  * counting semaphore is created using xSemaphoreCreateCounting() then the
  * required memory is automatically dynamically allocated inside the
  * xSemaphoreCreateCounting() function.  (see
- * http://www.freertos.org/a00111.html).  If a counting semaphore is created
+ * https://www.FreeRTOS.org/a00111.html).  If a counting semaphore is created
  * using xSemaphoreCreateCountingStatic() then the application writer must
  * provide the memory.  xSemaphoreCreateCountingStatic() therefore allows a
  * counting semaphore to be created without using any dynamic memory allocation.
@@ -1056,36 +1083,38 @@ typedef QueueHandle_t SemaphoreHandle_t;
  * then NULL is returned.
  *
  * Example usage:
- 
- SemaphoreHandle_t xSemaphore;
- StaticSemaphore_t xSemaphoreBuffer;
-
- void vATask( void * pvParameters )
- {
- SemaphoreHandle_t xSemaphore = NULL;
-
-    // Counting semaphore cannot be used before they have been created.  Create
-    // a counting semaphore using xSemaphoreCreateCountingStatic().  The max
-    // value to which the semaphore can count is 10, and the initial value
-    // assigned to the count will be 0.  The address of xSemaphoreBuffer is
-    // passed in and will be used to hold the semaphore structure, so no dynamic
-    // memory allocation will be used.
-    xSemaphore = xSemaphoreCreateCounting( 10, 0, &xSemaphoreBuffer );
-
-    // No memory allocation was attempted so xSemaphore cannot be NULL, so there
-    // is no need to check its value.
- }
- 

+ * 
+ * SemaphoreHandle_t xSemaphore;
+ * StaticSemaphore_t xSemaphoreBuffer;
+ *
+ * void vATask( void * pvParameters )
+ * {
+ * SemaphoreHandle_t xSemaphore = NULL;
+ *
+ *  // Counting semaphore cannot be used before they have been created.  Create
+ *  // a counting semaphore using xSemaphoreCreateCountingStatic().  The max
+ *  // value to which the semaphore can count is 10, and the initial value
+ *  // assigned to the count will be 0.  The address of xSemaphoreBuffer is
+ *  // passed in and will be used to hold the semaphore structure, so no dynamic
+ *  // memory allocation will be used.
+ *  xSemaphore = xSemaphoreCreateCounting( 10, 0, &xSemaphoreBuffer );
+ *
+ *  // No memory allocation was attempted so xSemaphore cannot be NULL, so there
+ *  // is no need to check its value.
+ * }
+ * 

  * \defgroup xSemaphoreCreateCountingStatic xSemaphoreCreateCountingStatic
  * \ingroup Semaphores
  */
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-	#define xSemaphoreCreateCountingStatic( uxMaxCount, uxInitialCount, pxSemaphoreBuffer ) xQueueCreateCountingSemaphoreStatic( ( uxMaxCount ), ( uxInitialCount ), ( pxSemaphoreBuffer ) )
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+    #define xSemaphoreCreateCountingStatic( uxMaxCount, uxInitialCount, pxSemaphoreBuffer )    xQueueCreateCountingSemaphoreStatic( ( uxMaxCount ), ( uxInitialCount ), ( pxSemaphoreBuffer ) )
 #endif /* configSUPPORT_STATIC_ALLOCATION */
 
 /**
  * semphr. h
- * 
void vSemaphoreDelete( SemaphoreHandle_t xSemaphore );

+ * 
+ * void vSemaphoreDelete( SemaphoreHandle_t xSemaphore );
+ * 

  *
  * Delete a semaphore.  This function must be used with care.  For example,
  * do not delete a mutex type semaphore if the mutex is held by a task.
@@ -1095,11 +1124,13 @@ typedef QueueHandle_t SemaphoreHandle_t;
  * \defgroup vSemaphoreDelete vSemaphoreDelete
  * \ingroup Semaphores
  */
-#define vSemaphoreDelete( xSemaphore ) vQueueDelete( ( QueueHandle_t ) ( xSemaphore ) )
+#define vSemaphoreDelete( xSemaphore )                   vQueueDelete( ( QueueHandle_t ) ( xSemaphore ) )
 
 /**
  * semphr.h
- * 
TaskHandle_t xSemaphoreGetMutexHolder( SemaphoreHandle_t xMutex );

+ * 
+ * TaskHandle_t xSemaphoreGetMutexHolder( SemaphoreHandle_t xMutex );
+ * 

  *
  * If xMutex is indeed a mutex type semaphore, return the current mutex holder.
  * If xMutex is not a mutex type semaphore, or the mutex is available (not held
@@ -1110,22 +1141,26 @@ typedef QueueHandle_t SemaphoreHandle_t;
  * the holder may change between the function exiting and the returned value
  * being tested.
  */
-#define xSemaphoreGetMutexHolder( xSemaphore ) xQueueGetMutexHolder( ( xSemaphore ) )
+#define xSemaphoreGetMutexHolder( xSemaphore )           xQueueGetMutexHolder( ( xSemaphore ) )
 
 /**
  * semphr.h
- * 
TaskHandle_t xSemaphoreGetMutexHolderFromISR( SemaphoreHandle_t xMutex );

+ * 
+ * TaskHandle_t xSemaphoreGetMutexHolderFromISR( SemaphoreHandle_t xMutex );
+ * 

  *
  * If xMutex is indeed a mutex type semaphore, return the current mutex holder.
  * If xMutex is not a mutex type semaphore, or the mutex is available (not held
  * by a task), return NULL.
  *
  */
-#define xSemaphoreGetMutexHolderFromISR( xSemaphore ) xQueueGetMutexHolderFromISR( ( xSemaphore ) )
+#define xSemaphoreGetMutexHolderFromISR( xSemaphore )    xQueueGetMutexHolderFromISR( ( xSemaphore ) )
 
 /**
  * semphr.h
- * 
UBaseType_t uxSemaphoreGetCount( SemaphoreHandle_t xSemaphore );

+ * 
+ * UBaseType_t uxSemaphoreGetCount( SemaphoreHandle_t xSemaphore );
+ * 

  *
  * If the semaphore is a counting semaphore then uxSemaphoreGetCount() returns
  * its current count value.  If the semaphore is a binary semaphore then
@@ -1133,8 +1168,6 @@ typedef QueueHandle_t SemaphoreHandle_t;
  * semaphore is not available.
  *
  */
-#define uxSemaphoreGetCount( xSemaphore ) uxQueueMessagesWaiting( ( QueueHandle_t ) ( xSemaphore ) )
+#define uxSemaphoreGetCount( xSemaphore )                uxQueueMessagesWaiting( ( QueueHandle_t ) ( xSemaphore ) )
 
 #endif /* SEMAPHORE_H */
-
-
diff --git a/include/stack_macros.h b/include/stack_macros.h
index c505574dd..317d1e06c 100644
--- a/include/stack_macros.h
+++ b/include/stack_macros.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,10 +19,9 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef STACK_MACROS_H
@@ -44,86 +43,85 @@
 
 /*-----------------------------------------------------------*/
 
-#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) )
+#if ( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) )
 
-	/* Only the current stack state is to be checked. */
-	#define taskCHECK_FOR_STACK_OVERFLOW()																\
-	{																									\
-		/* Is the currently saved stack pointer within the stack limit? */								\
-		if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack )										\
-		{																								\
-			vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );	\
-		}																								\
-	}
+/* Only the current stack state is to be checked. */
+    #define taskCHECK_FOR_STACK_OVERFLOW()                                                            \
+    {                                                                                                 \
+        /* Is the currently saved stack pointer within the stack limit? */                            \
+        if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack )                                     \
+        {                                                                                             \
+            vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
+        }                                                                                             \
+    }
 
 #endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
 /*-----------------------------------------------------------*/
 
-#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) )
+#if ( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) )
 
-	/* Only the current stack state is to be checked. */
-	#define taskCHECK_FOR_STACK_OVERFLOW()																\
-	{																									\
-																										\
-		/* Is the currently saved stack pointer within the stack limit? */								\
-		if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack )									\
-		{																								\
-			vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );	\
-		}																								\
-	}
+/* Only the current stack state is to be checked. */
+    #define taskCHECK_FOR_STACK_OVERFLOW()                                                            \
+    {                                                                                                 \
+                                                                                                      \
+        /* Is the currently saved stack pointer within the stack limit? */                            \
+        if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack )                                \
+        {                                                                                             \
+            vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
+        }                                                                                             \
+    }
 
 #endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
 /*-----------------------------------------------------------*/
 
-#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) )
+#if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) )
 
-	#define taskCHECK_FOR_STACK_OVERFLOW()																\
-	{																									\
-		const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack;							\
-		const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5;											\
-																										\
-		if( ( pulStack[ 0 ] != ulCheckValue ) ||														\
-			( pulStack[ 1 ] != ulCheckValue ) ||														\
-			( pulStack[ 2 ] != ulCheckValue ) ||														\
-			( pulStack[ 3 ] != ulCheckValue ) )															\
-		{																								\
-			vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );	\
-		}																								\
-	}
+    #define taskCHECK_FOR_STACK_OVERFLOW()                                                            \
+    {                                                                                                 \
+        const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack;                       \
+        const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5;                                        \
+                                                                                                      \
+        if( ( pulStack[ 0 ] != ulCheckValue ) ||                                                      \
+            ( pulStack[ 1 ] != ulCheckValue ) ||                                                      \
+            ( pulStack[ 2 ] != ulCheckValue ) ||                                                      \
+            ( pulStack[ 3 ] != ulCheckValue ) )                                                       \
+        {                                                                                             \
+            vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
+        }                                                                                             \
+    }
 
 #endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
 /*-----------------------------------------------------------*/
 
-#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) )
+#if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) )
 
-	#define taskCHECK_FOR_STACK_OVERFLOW()																								\
-	{																																	\
-	int8_t *pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack;																		\
-	static const uint8_t ucExpectedStackBytes[] = {	tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
-													tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
-													tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
-													tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
-													tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE };	\
-																																		\
-																																		\
-		pcEndOfStack -= sizeof( ucExpectedStackBytes );																					\
-																																		\
-		/* Has the extremity of the task stack ever been written over? */																\
-		if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 )					\
-		{																																\
-			vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );									\
-		}																																\
-	}
+    #define taskCHECK_FOR_STACK_OVERFLOW()                                                                                                \
+    {                                                                                                                                     \
+        int8_t * pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack;                                                                  \
+        static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,   \
+                                                        tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,   \
+                                                        tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,   \
+                                                        tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,   \
+                                                        tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \
+                                                                                                                                          \
+                                                                                                                                          \
+        pcEndOfStack -= sizeof( ucExpectedStackBytes );                                                                                   \
+                                                                                                                                          \
+        /* Has the extremity of the task stack ever been written over? */                                                                 \
+        if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 )                     \
+        {                                                                                                                                 \
+            vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );                                     \
+        }                                                                                                                                 \
+    }
 
 #endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
 /*-----------------------------------------------------------*/
 
 /* Remove stack overflow macro if not being used. */
 #ifndef taskCHECK_FOR_STACK_OVERFLOW
-	#define taskCHECK_FOR_STACK_OVERFLOW()
+    #define taskCHECK_FOR_STACK_OVERFLOW()
 #endif
 
 
 
 #endif /* STACK_MACROS_H */
-
diff --git a/include/stream_buffer.h b/include/stream_buffer.h
index 3605703f4..2f56c483c 100644
--- a/include/stream_buffer.h
+++ b/include/stream_buffer.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,10 +19,9 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*
@@ -52,12 +51,14 @@
 #define STREAM_BUFFER_H
 
 #ifndef INC_FREERTOS_H
-	#error "include FreeRTOS.h must appear in source files before include stream_buffer.h"
+    #error "include FreeRTOS.h must appear in source files before include stream_buffer.h"
 #endif
 
+/* *INDENT-OFF* */
 #if defined( __cplusplus )
-extern "C" {
+    extern "C" {
 #endif
+/* *INDENT-ON* */
 
 /**
  * Type by which stream buffers are referenced.  For example, a call to
@@ -72,9 +73,9 @@ typedef struct StreamBufferDef_t * StreamBufferHandle_t;
 /**
  * message_buffer.h
  *
-
-StreamBufferHandle_t xStreamBufferCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes );
-

+ * 
+ * StreamBufferHandle_t xStreamBufferCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes );
+ * 

  *
  * Creates a new stream buffer using dynamically allocated memory.  See
  * xStreamBufferCreateStatic() for a version that uses statically allocated
@@ -108,43 +109,43 @@ StreamBufferHandle_t xStreamBufferCreate( size_t xBufferSizeBytes, size_t xTrigg
  * buffer.
  *
  * Example use:
-
-
-void vAFunction( void )
-{
-StreamBufferHandle_t xStreamBuffer;
-const size_t xStreamBufferSizeBytes = 100, xTriggerLevel = 10;
-
-    // Create a stream buffer that can hold 100 bytes.  The memory used to hold
-    // both the stream buffer structure and the data in the stream buffer is
-    // allocated dynamically.
-    xStreamBuffer = xStreamBufferCreate( xStreamBufferSizeBytes, xTriggerLevel );
-
-    if( xStreamBuffer == NULL )
-    {
-        // There was not enough heap memory space available to create the
-        // stream buffer.
-    }
-    else
-    {
-        // The stream buffer was created successfully and can now be used.
-    }
-}
-

+ * 
+ *
+ * void vAFunction( void )
+ * {
+ * StreamBufferHandle_t xStreamBuffer;
+ * const size_t xStreamBufferSizeBytes = 100, xTriggerLevel = 10;
+ *
+ *  // Create a stream buffer that can hold 100 bytes.  The memory used to hold
+ *  // both the stream buffer structure and the data in the stream buffer is
+ *  // allocated dynamically.
+ *  xStreamBuffer = xStreamBufferCreate( xStreamBufferSizeBytes, xTriggerLevel );
+ *
+ *  if( xStreamBuffer == NULL )
+ *  {
+ *      // There was not enough heap memory space available to create the
+ *      // stream buffer.
+ *  }
+ *  else
+ *  {
+ *      // The stream buffer was created successfully and can now be used.
+ *  }
+ * }
+ * 

  * \defgroup xStreamBufferCreate xStreamBufferCreate
  * \ingroup StreamBufferManagement
  */
-#define xStreamBufferCreate( xBufferSizeBytes, xTriggerLevelBytes ) xStreamBufferGenericCreate( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE )
+#define xStreamBufferCreate( xBufferSizeBytes, xTriggerLevelBytes )    xStreamBufferGenericCreate( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE )
 
 /**
  * stream_buffer.h
  *
-
-StreamBufferHandle_t xStreamBufferCreateStatic( size_t xBufferSizeBytes,
-                                                size_t xTriggerLevelBytes,
-                                                uint8_t *pucStreamBufferStorageArea,
-                                                StaticStreamBuffer_t *pxStaticStreamBuffer );
-

+ * 
+ * StreamBufferHandle_t xStreamBufferCreateStatic( size_t xBufferSizeBytes,
+ *                                              size_t xTriggerLevelBytes,
+ *                                              uint8_t *pucStreamBufferStorageArea,
+ *                                              StaticStreamBuffer_t *pxStaticStreamBuffer );
+ * 

  * Creates a new stream buffer using statically allocated memory.  See
  * xStreamBufferCreate() for a version that uses dynamically allocated memory.
  *
@@ -181,51 +182,52 @@ StreamBufferHandle_t xStreamBufferCreateStatic( size_t xBufferSizeBytes,
  * pxStaticstreamBuffer are NULL then NULL is returned.
  *
  * Example use:
-
-
-// Used to dimension the array used to hold the streams.  The available space
-// will actually be one less than this, so 999.
-#define STORAGE_SIZE_BYTES 1000
-
-// Defines the memory that will actually hold the streams within the stream
-// buffer.
-static uint8_t ucStorageBuffer[ STORAGE_SIZE_BYTES ];
-
-// The variable used to hold the stream buffer structure.
-StaticStreamBuffer_t xStreamBufferStruct;
-
-void MyFunction( void )
-{
-StreamBufferHandle_t xStreamBuffer;
-const size_t xTriggerLevel = 1;
-
-    xStreamBuffer = xStreamBufferCreateStatic( sizeof( ucBufferStorage ),
-                                               xTriggerLevel,
-                                               ucBufferStorage,
-                                               &xStreamBufferStruct );
-
-    // As neither the pucStreamBufferStorageArea or pxStaticStreamBuffer
-    // parameters were NULL, xStreamBuffer will not be NULL, and can be used to
-    // reference the created stream buffer in other stream buffer API calls.
-
-    // Other code that uses the stream buffer can go here.
-}
-
-

+ * 
+ *
+ * // Used to dimension the array used to hold the streams.  The available space
+ * // will actually be one less than this, so 999.
+ #define STORAGE_SIZE_BYTES 1000
+ *
+ * // Defines the memory that will actually hold the streams within the stream
+ * // buffer.
+ * static uint8_t ucStorageBuffer[ STORAGE_SIZE_BYTES ];
+ *
+ * // The variable used to hold the stream buffer structure.
+ * StaticStreamBuffer_t xStreamBufferStruct;
+ *
+ * void MyFunction( void )
+ * {
+ * StreamBufferHandle_t xStreamBuffer;
+ * const size_t xTriggerLevel = 1;
+ *
+ *  xStreamBuffer = xStreamBufferCreateStatic( sizeof( ucBufferStorage ),
+ *                                             xTriggerLevel,
+ *                                             ucBufferStorage,
+ *                                             &xStreamBufferStruct );
+ *
+ *  // As neither the pucStreamBufferStorageArea or pxStaticStreamBuffer
+ *  // parameters were NULL, xStreamBuffer will not be NULL, and can be used to
+ *  // reference the created stream buffer in other stream buffer API calls.
+ *
+ *  // Other code that uses the stream buffer can go here.
+ * }
+ *
+ * 

  * \defgroup xStreamBufferCreateStatic xStreamBufferCreateStatic
  * \ingroup StreamBufferManagement
  */
-#define xStreamBufferCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pucStreamBufferStorageArea, pxStaticStreamBuffer ) xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE, pucStreamBufferStorageArea, pxStaticStreamBuffer )
+#define xStreamBufferCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pucStreamBufferStorageArea, pxStaticStreamBuffer ) \
+    xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE, pucStreamBufferStorageArea, pxStaticStreamBuffer )
 
 /**
  * stream_buffer.h
  *
-
-size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
-                          const void *pvTxData,
-                          size_t xDataLengthBytes,
-                          TickType_t xTicksToWait );
-

+ * 
+ * size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
+ *                        const void *pvTxData,
+ *                        size_t xDataLengthBytes,
+ *                        TickType_t xTicksToWait );
+ * 

  *
  * Sends bytes to a stream buffer.  The bytes are copied into the stream buffer.
  *
@@ -275,54 +277,54 @@ size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
  * write as many bytes as possible.
  *
  * Example use:
-
-void vAFunction( StreamBufferHandle_t xStreamBuffer )
-{
-size_t xBytesSent;
-uint8_t ucArrayToSend[] = { 0, 1, 2, 3 };
-char *pcStringToSend = "String to send";
-const TickType_t x100ms = pdMS_TO_TICKS( 100 );
-
-    // Send an array to the stream buffer, blocking for a maximum of 100ms to
-    // wait for enough space to be available in the stream buffer.
-    xBytesSent = xStreamBufferSend( xStreamBuffer, ( void * ) ucArrayToSend, sizeof( ucArrayToSend ), x100ms );
-
-    if( xBytesSent != sizeof( ucArrayToSend ) )
-    {
-        // The call to xStreamBufferSend() times out before there was enough
-        // space in the buffer for the data to be written, but it did
-        // successfully write xBytesSent bytes.
-    }
-
-    // Send the string to the stream buffer.  Return immediately if there is not
-    // enough space in the buffer.
-    xBytesSent = xStreamBufferSend( xStreamBuffer, ( void * ) pcStringToSend, strlen( pcStringToSend ), 0 );
-
-    if( xBytesSent != strlen( pcStringToSend ) )
-    {
-        // The entire string could not be added to the stream buffer because
-        // there was not enough free space in the buffer, but xBytesSent bytes
-        // were sent.  Could try again to send the remaining bytes.
-    }
-}
-

+ * 
+ * void vAFunction( StreamBufferHandle_t xStreamBuffer )
+ * {
+ * size_t xBytesSent;
+ * uint8_t ucArrayToSend[] = { 0, 1, 2, 3 };
+ * char *pcStringToSend = "String to send";
+ * const TickType_t x100ms = pdMS_TO_TICKS( 100 );
+ *
+ *  // Send an array to the stream buffer, blocking for a maximum of 100ms to
+ *  // wait for enough space to be available in the stream buffer.
+ *  xBytesSent = xStreamBufferSend( xStreamBuffer, ( void * ) ucArrayToSend, sizeof( ucArrayToSend ), x100ms );
+ *
+ *  if( xBytesSent != sizeof( ucArrayToSend ) )
+ *  {
+ *      // The call to xStreamBufferSend() times out before there was enough
+ *      // space in the buffer for the data to be written, but it did
+ *      // successfully write xBytesSent bytes.
+ *  }
+ *
+ *  // Send the string to the stream buffer.  Return immediately if there is not
+ *  // enough space in the buffer.
+ *  xBytesSent = xStreamBufferSend( xStreamBuffer, ( void * ) pcStringToSend, strlen( pcStringToSend ), 0 );
+ *
+ *  if( xBytesSent != strlen( pcStringToSend ) )
+ *  {
+ *      // The entire string could not be added to the stream buffer because
+ *      // there was not enough free space in the buffer, but xBytesSent bytes
+ *      // were sent.  Could try again to send the remaining bytes.
+ *  }
+ * }
+ * 

  * \defgroup xStreamBufferSend xStreamBufferSend
  * \ingroup StreamBufferManagement
  */
 size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
-						  const void *pvTxData,
-						  size_t xDataLengthBytes,
-						  TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+                          const void * pvTxData,
+                          size_t xDataLengthBytes,
+                          TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
 
 /**
  * stream_buffer.h
  *
-
-size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
-                                 const void *pvTxData,
-                                 size_t xDataLengthBytes,
-                                 BaseType_t *pxHigherPriorityTaskWoken );
-

+ * 
+ * size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
+ *                               const void *pvTxData,
+ *                               size_t xDataLengthBytes,
+ *                               BaseType_t *pxHigherPriorityTaskWoken );
+ * 

  *
  * Interrupt safe version of the API function that sends a stream of bytes to
  * the stream buffer.
@@ -374,56 +376,56 @@ size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
  * space for all the bytes to be written.
  *
  * Example use:
-
-// A stream buffer that has already been created.
-StreamBufferHandle_t xStreamBuffer;
-
-void vAnInterruptServiceRoutine( void )
-{
-size_t xBytesSent;
-char *pcStringToSend = "String to send";
-BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE.
-
-    // Attempt to send the string to the stream buffer.
-    xBytesSent = xStreamBufferSendFromISR( xStreamBuffer,
-                                           ( void * ) pcStringToSend,
-                                           strlen( pcStringToSend ),
-                                           &xHigherPriorityTaskWoken );
-
-    if( xBytesSent != strlen( pcStringToSend ) )
-    {
-        // There was not enough free space in the stream buffer for the entire
-        // string to be written, ut xBytesSent bytes were written.
-    }
-
-    // If xHigherPriorityTaskWoken was set to pdTRUE inside
-    // xStreamBufferSendFromISR() then a task that has a priority above the
-    // priority of the currently executing task was unblocked and a context
-    // switch should be performed to ensure the ISR returns to the unblocked
-    // task.  In most FreeRTOS ports this is done by simply passing
-    // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the
-    // variables value, and perform the context switch if necessary.  Check the
-    // documentation for the port in use for port specific instructions.
-    taskYIELD_FROM_ISR( xHigherPriorityTaskWoken );
-}
-

+ * 
+ * // A stream buffer that has already been created.
+ * StreamBufferHandle_t xStreamBuffer;
+ *
+ * void vAnInterruptServiceRoutine( void )
+ * {
+ * size_t xBytesSent;
+ * char *pcStringToSend = "String to send";
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE.
+ *
+ *  // Attempt to send the string to the stream buffer.
+ *  xBytesSent = xStreamBufferSendFromISR( xStreamBuffer,
+ *                                         ( void * ) pcStringToSend,
+ *                                         strlen( pcStringToSend ),
+ *                                         &xHigherPriorityTaskWoken );
+ *
+ *  if( xBytesSent != strlen( pcStringToSend ) )
+ *  {
+ *      // There was not enough free space in the stream buffer for the entire
+ *      // string to be written, ut xBytesSent bytes were written.
+ *  }
+ *
+ *  // If xHigherPriorityTaskWoken was set to pdTRUE inside
+ *  // xStreamBufferSendFromISR() then a task that has a priority above the
+ *  // priority of the currently executing task was unblocked and a context
+ *  // switch should be performed to ensure the ISR returns to the unblocked
+ *  // task.  In most FreeRTOS ports this is done by simply passing
+ *  // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the
+ *  // variables value, and perform the context switch if necessary.  Check the
+ *  // documentation for the port in use for port specific instructions.
+ *  taskYIELD_FROM_ISR( xHigherPriorityTaskWoken );
+ * }
+ * 

  * \defgroup xStreamBufferSendFromISR xStreamBufferSendFromISR
  * \ingroup StreamBufferManagement
  */
 size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
-								 const void *pvTxData,
-								 size_t xDataLengthBytes,
-								 BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+                                 const void * pvTxData,
+                                 size_t xDataLengthBytes,
+                                 BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
 
 /**
  * stream_buffer.h
  *
-
-size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
-                             void *pvRxData,
-                             size_t xBufferLengthBytes,
-                             TickType_t xTicksToWait );
-

+ * 
+ * size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
+ *                           void *pvRxData,
+ *                           size_t xBufferLengthBytes,
+ *                           TickType_t xTicksToWait );
+ * 

  *
  * Receives bytes from a stream buffer.
  *
@@ -473,46 +475,46 @@ size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
  * out before xBufferLengthBytes were available.
  *
  * Example use:
-
-void vAFunction( StreamBuffer_t xStreamBuffer )
-{
-uint8_t ucRxData[ 20 ];
-size_t xReceivedBytes;
-const TickType_t xBlockTime = pdMS_TO_TICKS( 20 );
-
-    // Receive up to another sizeof( ucRxData ) bytes from the stream buffer.
-    // Wait in the Blocked state (so not using any CPU processing time) for a
-    // maximum of 100ms for the full sizeof( ucRxData ) number of bytes to be
-    // available.
-    xReceivedBytes = xStreamBufferReceive( xStreamBuffer,
-                                           ( void * ) ucRxData,
-                                           sizeof( ucRxData ),
-                                           xBlockTime );
-
-    if( xReceivedBytes > 0 )
-    {
-        // A ucRxData contains another xRecievedBytes bytes of data, which can
-        // be processed here....
-    }
-}
-

+ * 
+ * void vAFunction( StreamBuffer_t xStreamBuffer )
+ * {
+ * uint8_t ucRxData[ 20 ];
+ * size_t xReceivedBytes;
+ * const TickType_t xBlockTime = pdMS_TO_TICKS( 20 );
+ *
+ *  // Receive up to another sizeof( ucRxData ) bytes from the stream buffer.
+ *  // Wait in the Blocked state (so not using any CPU processing time) for a
+ *  // maximum of 100ms for the full sizeof( ucRxData ) number of bytes to be
+ *  // available.
+ *  xReceivedBytes = xStreamBufferReceive( xStreamBuffer,
+ *                                         ( void * ) ucRxData,
+ *                                         sizeof( ucRxData ),
+ *                                         xBlockTime );
+ *
+ *  if( xReceivedBytes > 0 )
+ *  {
+ *      // A ucRxData contains another xRecievedBytes bytes of data, which can
+ *      // be processed here....
+ *  }
+ * }
+ * 

  * \defgroup xStreamBufferReceive xStreamBufferReceive
  * \ingroup StreamBufferManagement
  */
 size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
-							 void *pvRxData,
-							 size_t xBufferLengthBytes,
-							 TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+                             void * pvRxData,
+                             size_t xBufferLengthBytes,
+                             TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
 
 /**
  * stream_buffer.h
  *
-
-size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
-                                    void *pvRxData,
-                                    size_t xBufferLengthBytes,
-                                    BaseType_t *pxHigherPriorityTaskWoken );
-

+ * 
+ * size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
+ *                                  void *pvRxData,
+ *                                  size_t xBufferLengthBytes,
+ *                                  BaseType_t *pxHigherPriorityTaskWoken );
+ * 

  *
  * An interrupt safe version of the API function that receives bytes from a
  * stream buffer.
@@ -549,53 +551,53 @@ size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
  * @return The number of bytes read from the stream buffer, if any.
  *
  * Example use:
-
-// A stream buffer that has already been created.
-StreamBuffer_t xStreamBuffer;
-
-void vAnInterruptServiceRoutine( void )
-{
-uint8_t ucRxData[ 20 ];
-size_t xReceivedBytes;
-BaseType_t xHigherPriorityTaskWoken = pdFALSE;  // Initialised to pdFALSE.
-
-    // Receive the next stream from the stream buffer.
-    xReceivedBytes = xStreamBufferReceiveFromISR( xStreamBuffer,
-                                                  ( void * ) ucRxData,
-                                                  sizeof( ucRxData ),
-                                                  &xHigherPriorityTaskWoken );
-
-    if( xReceivedBytes > 0 )
-    {
-        // ucRxData contains xReceivedBytes read from the stream buffer.
-        // Process the stream here....
-    }
-
-    // If xHigherPriorityTaskWoken was set to pdTRUE inside
-    // xStreamBufferReceiveFromISR() then a task that has a priority above the
-    // priority of the currently executing task was unblocked and a context
-    // switch should be performed to ensure the ISR returns to the unblocked
-    // task.  In most FreeRTOS ports this is done by simply passing
-    // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the
-    // variables value, and perform the context switch if necessary.  Check the
-    // documentation for the port in use for port specific instructions.
-    taskYIELD_FROM_ISR( xHigherPriorityTaskWoken );
-}
-

+ * 
+ * // A stream buffer that has already been created.
+ * StreamBuffer_t xStreamBuffer;
+ *
+ * void vAnInterruptServiceRoutine( void )
+ * {
+ * uint8_t ucRxData[ 20 ];
+ * size_t xReceivedBytes;
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;  // Initialised to pdFALSE.
+ *
+ *  // Receive the next stream from the stream buffer.
+ *  xReceivedBytes = xStreamBufferReceiveFromISR( xStreamBuffer,
+ *                                                ( void * ) ucRxData,
+ *                                                sizeof( ucRxData ),
+ *                                                &xHigherPriorityTaskWoken );
+ *
+ *  if( xReceivedBytes > 0 )
+ *  {
+ *      // ucRxData contains xReceivedBytes read from the stream buffer.
+ *      // Process the stream here....
+ *  }
+ *
+ *  // If xHigherPriorityTaskWoken was set to pdTRUE inside
+ *  // xStreamBufferReceiveFromISR() then a task that has a priority above the
+ *  // priority of the currently executing task was unblocked and a context
+ *  // switch should be performed to ensure the ISR returns to the unblocked
+ *  // task.  In most FreeRTOS ports this is done by simply passing
+ *  // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the
+ *  // variables value, and perform the context switch if necessary.  Check the
+ *  // documentation for the port in use for port specific instructions.
+ *  taskYIELD_FROM_ISR( xHigherPriorityTaskWoken );
+ * }
+ * 

  * \defgroup xStreamBufferReceiveFromISR xStreamBufferReceiveFromISR
  * \ingroup StreamBufferManagement
  */
 size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
-									void *pvRxData,
-									size_t xBufferLengthBytes,
-									BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+                                    void * pvRxData,
+                                    size_t xBufferLengthBytes,
+                                    BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
 
 /**
  * stream_buffer.h
  *
-
-void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer );
-

+ * 
+ * void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer );
+ * 

  *
  * Deletes a stream buffer that was previously created using a call to
  * xStreamBufferCreate() or xStreamBufferCreateStatic().  If the stream
@@ -615,9 +617,9 @@ void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTI
 /**
  * stream_buffer.h
  *
-
-BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer );
-

+ * 
+ * BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer );
+ * 

  *
  * Queries a stream buffer to see if it is full.  A stream buffer is full if it
  * does not have any free space, and therefore cannot accept any more data.
@@ -635,9 +637,9 @@ BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_
 /**
  * stream_buffer.h
  *
-
-BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer );
-

+ * 
+ * BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer );
+ * 

  *
  * Queries a stream buffer to see if it is empty.  A stream buffer is empty if
  * it does not contain any data.
@@ -655,9 +657,9 @@ BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED
 /**
  * stream_buffer.h
  *
-
-BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer );
-

+ * 
+ * BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer );
+ * 

  *
  * Resets a stream buffer to its initial, empty, state.  Any data that was in
  * the stream buffer is discarded.  A stream buffer can only be reset if there
@@ -678,9 +680,9 @@ BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_F
 /**
  * stream_buffer.h
  *
-
-size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer );
-

+ * 
+ * size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer );
+ * 

  *
  * Queries a stream buffer to see how much free space it contains, which is
  * equal to the amount of data that can be sent to the stream buffer before it
@@ -699,9 +701,9 @@ size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVIL
 /**
  * stream_buffer.h
  *
-
-size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer );
-

+ * 
+ * size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer );
+ * 

  *
  * Queries a stream buffer to see how much data it contains, which is equal to
  * the number of bytes that can be read from the stream buffer before the stream
@@ -720,9 +722,9 @@ size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILE
 /**
  * stream_buffer.h
  *
-
-BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel );
-

+ * 
+ * BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel );
+ * 

  *
  * A stream buffer's trigger level is the number of bytes that must be in the
  * stream buffer before a task that is blocked on the stream buffer to
@@ -752,14 +754,15 @@ BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, siz
  * \defgroup xStreamBufferSetTriggerLevel xStreamBufferSetTriggerLevel
  * \ingroup StreamBufferManagement
  */
-BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel ) PRIVILEGED_FUNCTION;
+BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer,
+                                         size_t xTriggerLevel ) PRIVILEGED_FUNCTION;
 
 /**
  * stream_buffer.h
  *
-
-BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
-

+ * 
+ * BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
+ * 

  *
  * For advanced users only.
  *
@@ -791,14 +794,15 @@ BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer
  * \defgroup xStreamBufferSendCompletedFromISR xStreamBufferSendCompletedFromISR
  * \ingroup StreamBufferManagement
  */
-BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer,
+                                              BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
 
 /**
  * stream_buffer.h
  *
-
-BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
-

+ * 
+ * BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
+ * 

  *
  * For advanced users only.
  *
@@ -831,29 +835,33 @@ BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuf
  * \defgroup xStreamBufferReceiveCompletedFromISR xStreamBufferReceiveCompletedFromISR
  * \ingroup StreamBufferManagement
  */
-BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer,
+                                                 BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
 
 /* Functions below here are not part of the public API. */
 StreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes,
-												 size_t xTriggerLevelBytes,
-												 BaseType_t xIsMessageBuffer ) PRIVILEGED_FUNCTION;
+                                                 size_t xTriggerLevelBytes,
+                                                 BaseType_t xIsMessageBuffer ) PRIVILEGED_FUNCTION;
 
 StreamBufferHandle_t xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
-													   size_t xTriggerLevelBytes,
-													   BaseType_t xIsMessageBuffer,
-													   uint8_t * const pucStreamBufferStorageArea,
-													   StaticStreamBuffer_t * const pxStaticStreamBuffer ) PRIVILEGED_FUNCTION;
+                                                       size_t xTriggerLevelBytes,
+                                                       BaseType_t xIsMessageBuffer,
+                                                       uint8_t * const pucStreamBufferStorageArea,
+                                                       StaticStreamBuffer_t * const pxStaticStreamBuffer ) PRIVILEGED_FUNCTION;
 
 size_t xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
 
-#if( configUSE_TRACE_FACILITY == 1 )
-	void vStreamBufferSetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer, UBaseType_t uxStreamBufferNumber ) PRIVILEGED_FUNCTION;
-	UBaseType_t uxStreamBufferGetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
-	uint8_t ucStreamBufferGetStreamBufferType( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+#if ( configUSE_TRACE_FACILITY == 1 )
+    void vStreamBufferSetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer,
+                                             UBaseType_t uxStreamBufferNumber ) PRIVILEGED_FUNCTION;
+    UBaseType_t uxStreamBufferGetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+    uint8_t ucStreamBufferGetStreamBufferType( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
 #endif
 
+/* *INDENT-OFF* */
 #if defined( __cplusplus )
-}
+    }
 #endif
+/* *INDENT-ON* */
 
-#endif	/* !defined( STREAM_BUFFER_H ) */
+#endif /* !defined( STREAM_BUFFER_H ) */
diff --git a/include/task.h b/include/task.h
index fe2a76732..730deec5a 100644
--- a/include/task.h
+++ b/include/task.h
@@ -1,2567 +1,3037 @@
-/*
- * FreeRTOS Kernel V10.3.1
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-
-#ifndef INC_TASK_H
-#define INC_TASK_H
-
-#ifndef INC_FREERTOS_H
-	#error "include FreeRTOS.h must appear in source files before include task.h"
-#endif
-
-#include "list.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*-----------------------------------------------------------
- * MACROS AND DEFINITIONS
- *----------------------------------------------------------*/
-
-#define tskKERNEL_VERSION_NUMBER "V10.3.1"
-#define tskKERNEL_VERSION_MAJOR 10
-#define tskKERNEL_VERSION_MINOR 3
-#define tskKERNEL_VERSION_BUILD 1
-
-/* MPU region parameters passed in ulParameters
- * of MemoryRegion_t struct. */
-#define tskMPU_REGION_READ_ONLY			( 1UL << 0UL )
-#define tskMPU_REGION_READ_WRITE		( 1UL << 1UL )
-#define tskMPU_REGION_EXECUTE_NEVER		( 1UL << 2UL )
-#define tskMPU_REGION_NORMAL_MEMORY		( 1UL << 3UL )
-#define tskMPU_REGION_DEVICE_MEMORY		( 1UL << 4UL )
-
-/**
- * task. h
- *
- * Type by which tasks are referenced.  For example, a call to xTaskCreate
- * returns (via a pointer parameter) an TaskHandle_t variable that can then
- * be used as a parameter to vTaskDelete to delete the task.
- *
- * \defgroup TaskHandle_t TaskHandle_t
- * \ingroup Tasks
- */
-struct tskTaskControlBlock; /* The old naming convention is used to prevent breaking kernel aware debuggers. */
-typedef struct tskTaskControlBlock* TaskHandle_t;
-
-/*
- * Defines the prototype to which the application task hook function must
- * conform.
- */
-typedef BaseType_t (*TaskHookFunction_t)( void * );
-
-/* Task states returned by eTaskGetState. */
-typedef enum
-{
-	eRunning = 0,	/* A task is querying the state of itself, so must be running. */
-	eReady,			/* The task being queried is in a read or pending ready list. */
-	eBlocked,		/* The task being queried is in the Blocked state. */
-	eSuspended,		/* The task being queried is in the Suspended state, or is in the Blocked state with an infinite time out. */
-	eDeleted,		/* The task being queried has been deleted, but its TCB has not yet been freed. */
-	eInvalid		/* Used as an 'invalid state' value. */
-} eTaskState;
-
-/* Actions that can be performed when vTaskNotify() is called. */
-typedef enum
-{
-	eNoAction = 0,				/* Notify the task without updating its notify value. */
-	eSetBits,					/* Set bits in the task's notification value. */
-	eIncrement,					/* Increment the task's notification value. */
-	eSetValueWithOverwrite,		/* Set the task's notification value to a specific value even if the previous value has not yet been read by the task. */
-	eSetValueWithoutOverwrite	/* Set the task's notification value if the previous value has been read by the task. */
-} eNotifyAction;
-
-/*
- * Used internally only.
- */
-typedef struct xTIME_OUT
-{
-	BaseType_t xOverflowCount;
-	TickType_t xTimeOnEntering;
-} TimeOut_t;
-
-/*
- * Defines the memory ranges allocated to the task when an MPU is used.
- */
-typedef struct xMEMORY_REGION
-{
-	void *pvBaseAddress;
-	uint32_t ulLengthInBytes;
-	uint32_t ulParameters;
-} MemoryRegion_t;
-
-/*
- * Parameters required to create an MPU protected task.
- */
-typedef struct xTASK_PARAMETERS
-{
-	TaskFunction_t pvTaskCode;
-	const char * const pcName;	/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-	configSTACK_DEPTH_TYPE usStackDepth;
-	void *pvParameters;
-	UBaseType_t uxPriority;
-	StackType_t *puxStackBuffer;
-	MemoryRegion_t xRegions[ portNUM_CONFIGURABLE_REGIONS ];
-	#if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
-		StaticTask_t * const pxTaskBuffer;
-	#endif
-} TaskParameters_t;
-
-/* Used with the uxTaskGetSystemState() function to return the state of each task
-in the system. */
-typedef struct xTASK_STATUS
-{
-	TaskHandle_t xHandle;			/* The handle of the task to which the rest of the information in the structure relates. */
-	const char *pcTaskName;			/* A pointer to the task's name.  This value will be invalid if the task was deleted since the structure was populated! */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-	UBaseType_t xTaskNumber;		/* A number unique to the task. */
-	eTaskState eCurrentState;		/* The state in which the task existed when the structure was populated. */
-	UBaseType_t uxCurrentPriority;	/* The priority at which the task was running (may be inherited) when the structure was populated. */
-	UBaseType_t uxBasePriority;		/* The priority to which the task will return if the task's current priority has been inherited to avoid unbounded priority inversion when obtaining a mutex.  Only valid if configUSE_MUTEXES is defined as 1 in FreeRTOSConfig.h. */
-	uint32_t ulRunTimeCounter;		/* The total run time allocated to the task so far, as defined by the run time stats clock.  See http://www.freertos.org/rtos-run-time-stats.html.  Only valid when configGENERATE_RUN_TIME_STATS is defined as 1 in FreeRTOSConfig.h. */
-	StackType_t *pxStackBase;		/* Points to the lowest address of the task's stack area. */
-	configSTACK_DEPTH_TYPE usStackHighWaterMark;	/* The minimum amount of stack space that has remained for the task since the task was created.  The closer this value is to zero the closer the task has come to overflowing its stack. */
-} TaskStatus_t;
-
-/* Possible return values for eTaskConfirmSleepModeStatus(). */
-typedef enum
-{
-	eAbortSleep = 0,		/* A task has been made ready or a context switch pended since portSUPPORESS_TICKS_AND_SLEEP() was called - abort entering a sleep mode. */
-	eStandardSleep,			/* Enter a sleep mode that will not last any longer than the expected idle time. */
-	eNoTasksWaitingTimeout	/* No tasks are waiting for a timeout so it is safe to enter a sleep mode that can only be exited by an external interrupt. */
-} eSleepModeStatus;
-
-/**
- * Defines the priority used by the idle task.  This must not be modified.
- *
- * \ingroup TaskUtils
- */
-#define tskIDLE_PRIORITY			( ( UBaseType_t ) 0U )
-
-/**
- * task. h
- *
- * Macro for forcing a context switch.
- *
- * \defgroup taskYIELD taskYIELD
- * \ingroup SchedulerControl
- */
-#define taskYIELD()					portYIELD()
-
-/**
- * task. h
- *
- * Macro to mark the start of a critical code region.  Preemptive context
- * switches cannot occur when in a critical region.
- *
- * NOTE: This may alter the stack (depending on the portable implementation)
- * so must be used with care!
- *
- * \defgroup taskENTER_CRITICAL taskENTER_CRITICAL
- * \ingroup SchedulerControl
- */
-#define taskENTER_CRITICAL()		portENTER_CRITICAL()
-#define taskENTER_CRITICAL_FROM_ISR() portSET_INTERRUPT_MASK_FROM_ISR()
-
-/**
- * task. h
- *
- * Macro to mark the end of a critical code region.  Preemptive context
- * switches cannot occur when in a critical region.
- *
- * NOTE: This may alter the stack (depending on the portable implementation)
- * so must be used with care!
- *
- * \defgroup taskEXIT_CRITICAL taskEXIT_CRITICAL
- * \ingroup SchedulerControl
- */
-#define taskEXIT_CRITICAL()			portEXIT_CRITICAL()
-#define taskEXIT_CRITICAL_FROM_ISR( x ) portCLEAR_INTERRUPT_MASK_FROM_ISR( x )
-/**
- * task. h
- *
- * Macro to disable all maskable interrupts.
- *
- * \defgroup taskDISABLE_INTERRUPTS taskDISABLE_INTERRUPTS
- * \ingroup SchedulerControl
- */
-#define taskDISABLE_INTERRUPTS()	portDISABLE_INTERRUPTS()
-
-/**
- * task. h
- *
- * Macro to enable microcontroller interrupts.
- *
- * \defgroup taskENABLE_INTERRUPTS taskENABLE_INTERRUPTS
- * \ingroup SchedulerControl
- */
-#define taskENABLE_INTERRUPTS()		portENABLE_INTERRUPTS()
-
-/* Definitions returned by xTaskGetSchedulerState().  taskSCHEDULER_SUSPENDED is
-0 to generate more optimal code when configASSERT() is defined as the constant
-is used in assert() statements. */
-#define taskSCHEDULER_SUSPENDED		( ( BaseType_t ) 0 )
-#define taskSCHEDULER_NOT_STARTED	( ( BaseType_t ) 1 )
-#define taskSCHEDULER_RUNNING		( ( BaseType_t ) 2 )
-
-
-/*-----------------------------------------------------------
- * TASK CREATION API
- *----------------------------------------------------------*/
-
-/**
- * task. h
- *
- BaseType_t xTaskCreate(
-							  TaskFunction_t pvTaskCode,
-							  const char * const pcName,
-							  configSTACK_DEPTH_TYPE usStackDepth,
-							  void *pvParameters,
-							  UBaseType_t uxPriority,
-							  TaskHandle_t *pvCreatedTask
-						  );

- *
- * Create a new task and add it to the list of tasks that are ready to run.
- *
- * Internally, within the FreeRTOS implementation, tasks use two blocks of
- * memory.  The first block is used to hold the task's data structures.  The
- * second block is used by the task as its stack.  If a task is created using
- * xTaskCreate() then both blocks of memory are automatically dynamically
- * allocated inside the xTaskCreate() function.  (see
- * http://www.freertos.org/a00111.html).  If a task is created using
- * xTaskCreateStatic() then the application writer must provide the required
- * memory.  xTaskCreateStatic() therefore allows a task to be created without
- * using any dynamic memory allocation.
- *
- * See xTaskCreateStatic() for a version that does not use any dynamic memory
- * allocation.
- *
- * xTaskCreate() can only be used to create a task that has unrestricted
- * access to the entire microcontroller memory map.  Systems that include MPU
- * support can alternatively create an MPU constrained task using
- * xTaskCreateRestricted().
- *
- * @param pvTaskCode Pointer to the task entry function.  Tasks
- * must be implemented to never return (i.e. continuous loop).
- *
- * @param pcName A descriptive name for the task.  This is mainly used to
- * facilitate debugging.  Max length defined by configMAX_TASK_NAME_LEN - default
- * is 16.
- *
- * @param usStackDepth The size of the task stack specified as the number of
- * variables the stack can hold - not the number of bytes.  For example, if
- * the stack is 16 bits wide and usStackDepth is defined as 100, 200 bytes
- * will be allocated for stack storage.
- *
- * @param pvParameters Pointer that will be used as the parameter for the task
- * being created.
- *
- * @param uxPriority The priority at which the task should run.  Systems that
- * include MPU support can optionally create tasks in a privileged (system)
- * mode by setting bit portPRIVILEGE_BIT of the priority parameter.  For
- * example, to create a privileged task at priority 2 the uxPriority parameter
- * should be set to ( 2 | portPRIVILEGE_BIT ).
- *
- * @param pvCreatedTask Used to pass back a handle by which the created task
- * can be referenced.
- *
- * @return pdPASS if the task was successfully created and added to a ready
- * list, otherwise an error code defined in the file projdefs.h
- *
- * Example usage:
-   
- // Task to be created.
- void vTaskCode( void * pvParameters )
- {
-	 for( ;; )
-	 {
-		 // Task code goes here.
-	 }
- }
-
- // Function that creates a task.
- void vOtherFunction( void )
- {
- static uint8_t ucParameterToPass;
- TaskHandle_t xHandle = NULL;
-
-	 // Create the task, storing the handle.  Note that the passed parameter ucParameterToPass
-	 // must exist for the lifetime of the task, so in this case is declared static.  If it was just an
-	 // an automatic stack variable it might no longer exist, or at least have been corrupted, by the time
-	 // the new task attempts to access it.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, &ucParameterToPass, tskIDLE_PRIORITY, &xHandle );
-	 configASSERT( xHandle );
-
-	 // Use the handle to delete the task.
-	 if( xHandle != NULL )
-	 {
-	 	vTaskDelete( xHandle );
-	 }
- }
-   

- * \defgroup xTaskCreate xTaskCreate
- * \ingroup Tasks
- */
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-	BaseType_t xTaskCreate(	TaskFunction_t pxTaskCode,
-							const char * const pcName,	/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-							const configSTACK_DEPTH_TYPE usStackDepth,
-							void * const pvParameters,
-							UBaseType_t uxPriority,
-							TaskHandle_t * const pxCreatedTask ) PRIVILEGED_FUNCTION;
-#endif
-
-/**
- * task. h
- *
- TaskHandle_t xTaskCreateStatic( TaskFunction_t pvTaskCode,
-								 const char * const pcName,
-								 uint32_t ulStackDepth,
-								 void *pvParameters,
-								 UBaseType_t uxPriority,
-								 StackType_t *pxStackBuffer,
-								 StaticTask_t *pxTaskBuffer );

- *
- * Create a new task and add it to the list of tasks that are ready to run.
- *
- * Internally, within the FreeRTOS implementation, tasks use two blocks of
- * memory.  The first block is used to hold the task's data structures.  The
- * second block is used by the task as its stack.  If a task is created using
- * xTaskCreate() then both blocks of memory are automatically dynamically
- * allocated inside the xTaskCreate() function.  (see
- * http://www.freertos.org/a00111.html).  If a task is created using
- * xTaskCreateStatic() then the application writer must provide the required
- * memory.  xTaskCreateStatic() therefore allows a task to be created without
- * using any dynamic memory allocation.
- *
- * @param pvTaskCode Pointer to the task entry function.  Tasks
- * must be implemented to never return (i.e. continuous loop).
- *
- * @param pcName A descriptive name for the task.  This is mainly used to
- * facilitate debugging.  The maximum length of the string is defined by
- * configMAX_TASK_NAME_LEN in FreeRTOSConfig.h.
- *
- * @param ulStackDepth The size of the task stack specified as the number of
- * variables the stack can hold - not the number of bytes.  For example, if
- * the stack is 32-bits wide and ulStackDepth is defined as 100 then 400 bytes
- * will be allocated for stack storage.
- *
- * @param pvParameters Pointer that will be used as the parameter for the task
- * being created.
- *
- * @param uxPriority The priority at which the task will run.
- *
- * @param pxStackBuffer Must point to a StackType_t array that has at least
- * ulStackDepth indexes - the array will then be used as the task's stack,
- * removing the need for the stack to be allocated dynamically.
- *
- * @param pxTaskBuffer Must point to a variable of type StaticTask_t, which will
- * then be used to hold the task's data structures, removing the need for the
- * memory to be allocated dynamically.
- *
- * @return If neither pxStackBuffer or pxTaskBuffer are NULL, then the task will
- * be created and a handle to the created task is returned.  If either
- * pxStackBuffer or pxTaskBuffer are NULL then the task will not be created and
- * NULL is returned.
- *
- * Example usage:
-   
-
-    // Dimensions the buffer that the task being created will use as its stack.
-    // NOTE:  This is the number of words the stack will hold, not the number of
-    // bytes.  For example, if each stack item is 32-bits, and this is set to 100,
-    // then 400 bytes (100 * 32-bits) will be allocated.
-    #define STACK_SIZE 200
-
-    // Structure that will hold the TCB of the task being created.
-    StaticTask_t xTaskBuffer;
-
-    // Buffer that the task being created will use as its stack.  Note this is
-    // an array of StackType_t variables.  The size of StackType_t is dependent on
-    // the RTOS port.
-    StackType_t xStack[ STACK_SIZE ];
-
-    // Function that implements the task being created.
-    void vTaskCode( void * pvParameters )
-    {
-        // The parameter value is expected to be 1 as 1 is passed in the
-        // pvParameters value in the call to xTaskCreateStatic().
-        configASSERT( ( uint32_t ) pvParameters == 1UL );
-
-        for( ;; )
-        {
-            // Task code goes here.
-        }
-    }
-
-    // Function that creates a task.
-    void vOtherFunction( void )
-    {
-        TaskHandle_t xHandle = NULL;
-
-        // Create the task without using any dynamic memory allocation.
-        xHandle = xTaskCreateStatic(
-                      vTaskCode,       // Function that implements the task.
-                      "NAME",          // Text name for the task.
-                      STACK_SIZE,      // Stack size in words, not bytes.
-                      ( void * ) 1,    // Parameter passed into the task.
-                      tskIDLE_PRIORITY,// Priority at which the task is created.
-                      xStack,          // Array to use as the task's stack.
-                      &xTaskBuffer );  // Variable to hold the task's data structure.
-
-        // puxStackBuffer and pxTaskBuffer were not NULL, so the task will have
-        // been created, and xHandle will be the task's handle.  Use the handle
-        // to suspend the task.
-        vTaskSuspend( xHandle );
-    }
-   

- * \defgroup xTaskCreateStatic xTaskCreateStatic
- * \ingroup Tasks
- */
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-	TaskHandle_t xTaskCreateStatic(	TaskFunction_t pxTaskCode,
-									const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-									const uint32_t ulStackDepth,
-									void * const pvParameters,
-									UBaseType_t uxPriority,
-									StackType_t * const puxStackBuffer,
-									StaticTask_t * const pxTaskBuffer ) PRIVILEGED_FUNCTION;
-#endif /* configSUPPORT_STATIC_ALLOCATION */
-
-/**
- * task. h
- *
- BaseType_t xTaskCreateRestricted( TaskParameters_t *pxTaskDefinition, TaskHandle_t *pxCreatedTask );

- *
- * Only available when configSUPPORT_DYNAMIC_ALLOCATION is set to 1.
- *
- * xTaskCreateRestricted() should only be used in systems that include an MPU
- * implementation.
- *
- * Create a new task and add it to the list of tasks that are ready to run.
- * The function parameters define the memory regions and associated access
- * permissions allocated to the task.
- *
- * See xTaskCreateRestrictedStatic() for a version that does not use any
- * dynamic memory allocation.
- *
- * @param pxTaskDefinition Pointer to a structure that contains a member
- * for each of the normal xTaskCreate() parameters (see the xTaskCreate() API
- * documentation) plus an optional stack buffer and the memory region
- * definitions.
- *
- * @param pxCreatedTask Used to pass back a handle by which the created task
- * can be referenced.
- *
- * @return pdPASS if the task was successfully created and added to a ready
- * list, otherwise an error code defined in the file projdefs.h
- *
- * Example usage:
-   
-// Create an TaskParameters_t structure that defines the task to be created.
-static const TaskParameters_t xCheckTaskParameters =
-{
-	vATask,		// pvTaskCode - the function that implements the task.
-	"ATask",	// pcName - just a text name for the task to assist debugging.
-	100,		// usStackDepth	- the stack size DEFINED IN WORDS.
-	NULL,		// pvParameters - passed into the task function as the function parameters.
-	( 1UL | portPRIVILEGE_BIT ),// uxPriority - task priority, set the portPRIVILEGE_BIT if the task should run in a privileged state.
-	cStackBuffer,// puxStackBuffer - the buffer to be used as the task stack.
-
-	// xRegions - Allocate up to three separate memory regions for access by
-	// the task, with appropriate access permissions.  Different processors have
-	// different memory alignment requirements - refer to the FreeRTOS documentation
-	// for full information.
-	{
-		// Base address					Length	Parameters
-		{ cReadWriteArray,				32,		portMPU_REGION_READ_WRITE },
-		{ cReadOnlyArray,				32,		portMPU_REGION_READ_ONLY },
-		{ cPrivilegedOnlyAccessArray,	128,	portMPU_REGION_PRIVILEGED_READ_WRITE }
-	}
-};
-
-int main( void )
-{
-TaskHandle_t xHandle;
-
-	// Create a task from the const structure defined above.  The task handle
-	// is requested (the second parameter is not NULL) but in this case just for
-	// demonstration purposes as its not actually used.
-	xTaskCreateRestricted( &xRegTest1Parameters, &xHandle );
-
-	// Start the scheduler.
-	vTaskStartScheduler();
-
-	// Will only get here if there was insufficient memory to create the idle
-	// and/or timer task.
-	for( ;; );
-}
-   

- * \defgroup xTaskCreateRestricted xTaskCreateRestricted
- * \ingroup Tasks
- */
-#if( portUSING_MPU_WRAPPERS == 1 )
-	BaseType_t xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) PRIVILEGED_FUNCTION;
-#endif
-
-/**
- * task. h
- *
- BaseType_t xTaskCreateRestrictedStatic( TaskParameters_t *pxTaskDefinition, TaskHandle_t *pxCreatedTask );

- *
- * Only available when configSUPPORT_STATIC_ALLOCATION is set to 1.
- *
- * xTaskCreateRestrictedStatic() should only be used in systems that include an
- * MPU implementation.
- *
- * Internally, within the FreeRTOS implementation, tasks use two blocks of
- * memory.  The first block is used to hold the task's data structures.  The
- * second block is used by the task as its stack.  If a task is created using
- * xTaskCreateRestricted() then the stack is provided by the application writer,
- * and the memory used to hold the task's data structure is automatically
- * dynamically allocated inside the xTaskCreateRestricted() function.  If a task
- * is created using xTaskCreateRestrictedStatic() then the application writer
- * must provide the memory used to hold the task's data structures too.
- * xTaskCreateRestrictedStatic() therefore allows a memory protected task to be
- * created without using any dynamic memory allocation.
- *
- * @param pxTaskDefinition Pointer to a structure that contains a member
- * for each of the normal xTaskCreate() parameters (see the xTaskCreate() API
- * documentation) plus an optional stack buffer and the memory region
- * definitions.  If configSUPPORT_STATIC_ALLOCATION is set to 1 the structure
- * contains an additional member, which is used to point to a variable of type
- * StaticTask_t - which is then used to hold the task's data structure.
- *
- * @param pxCreatedTask Used to pass back a handle by which the created task
- * can be referenced.
- *
- * @return pdPASS if the task was successfully created and added to a ready
- * list, otherwise an error code defined in the file projdefs.h
- *
- * Example usage:
-   
-// Create an TaskParameters_t structure that defines the task to be created.
-// The StaticTask_t variable is only included in the structure when
-// configSUPPORT_STATIC_ALLOCATION is set to 1.  The PRIVILEGED_DATA macro can
-// be used to force the variable into the RTOS kernel's privileged data area.
-static PRIVILEGED_DATA StaticTask_t xTaskBuffer;
-static const TaskParameters_t xCheckTaskParameters =
-{
-	vATask,		// pvTaskCode - the function that implements the task.
-	"ATask",	// pcName - just a text name for the task to assist debugging.
-	100,		// usStackDepth	- the stack size DEFINED IN WORDS.
-	NULL,		// pvParameters - passed into the task function as the function parameters.
-	( 1UL | portPRIVILEGE_BIT ),// uxPriority - task priority, set the portPRIVILEGE_BIT if the task should run in a privileged state.
-	cStackBuffer,// puxStackBuffer - the buffer to be used as the task stack.
-
-	// xRegions - Allocate up to three separate memory regions for access by
-	// the task, with appropriate access permissions.  Different processors have
-	// different memory alignment requirements - refer to the FreeRTOS documentation
-	// for full information.
-	{
-		// Base address					Length	Parameters
-		{ cReadWriteArray,				32,		portMPU_REGION_READ_WRITE },
-		{ cReadOnlyArray,				32,		portMPU_REGION_READ_ONLY },
-		{ cPrivilegedOnlyAccessArray,	128,	portMPU_REGION_PRIVILEGED_READ_WRITE }
-	}
-
-	&xTaskBuffer; // Holds the task's data structure.
-};
-
-int main( void )
-{
-TaskHandle_t xHandle;
-
-	// Create a task from the const structure defined above.  The task handle
-	// is requested (the second parameter is not NULL) but in this case just for
-	// demonstration purposes as its not actually used.
-	xTaskCreateRestricted( &xRegTest1Parameters, &xHandle );
-
-	// Start the scheduler.
-	vTaskStartScheduler();
-
-	// Will only get here if there was insufficient memory to create the idle
-	// and/or timer task.
-	for( ;; );
-}
-   

- * \defgroup xTaskCreateRestrictedStatic xTaskCreateRestrictedStatic
- * \ingroup Tasks
- */
-#if( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
-	BaseType_t xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) PRIVILEGED_FUNCTION;
-#endif
-
-/**
- * task. h
- *
- void vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions );

- *
- * Memory regions are assigned to a restricted task when the task is created by
- * a call to xTaskCreateRestricted().  These regions can be redefined using
- * vTaskAllocateMPURegions().
- *
- * @param xTask The handle of the task being updated.
- *
- * @param xRegions A pointer to an MemoryRegion_t structure that contains the
- * new memory region definitions.
- *
- * Example usage:
-   
-// Define an array of MemoryRegion_t structures that configures an MPU region
-// allowing read/write access for 1024 bytes starting at the beginning of the
-// ucOneKByte array.  The other two of the maximum 3 definable regions are
-// unused so set to zero.
-static const MemoryRegion_t xAltRegions[ portNUM_CONFIGURABLE_REGIONS ] =
-{
-	// Base address		Length		Parameters
-	{ ucOneKByte,		1024,		portMPU_REGION_READ_WRITE },
-	{ 0,				0,			0 },
-	{ 0,				0,			0 }
-};
-
-void vATask( void *pvParameters )
-{
-	// This task was created such that it has access to certain regions of
-	// memory as defined by the MPU configuration.  At some point it is
-	// desired that these MPU regions are replaced with that defined in the
-	// xAltRegions const struct above.  Use a call to vTaskAllocateMPURegions()
-	// for this purpose.  NULL is used as the task handle to indicate that this
-	// function should modify the MPU regions of the calling task.
-	vTaskAllocateMPURegions( NULL, xAltRegions );
-
-	// Now the task can continue its function, but from this point on can only
-	// access its stack and the ucOneKByte array (unless any other statically
-	// defined or shared regions have been declared elsewhere).
-}
-   

- * \defgroup xTaskCreateRestricted xTaskCreateRestricted
- * \ingroup Tasks
- */
-void vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
void vTaskDelete( TaskHandle_t xTask );

- *
- * INCLUDE_vTaskDelete must be defined as 1 for this function to be available.
- * See the configuration section for more information.
- *
- * Remove a task from the RTOS real time kernel's management.  The task being
- * deleted will be removed from all ready, blocked, suspended and event lists.
- *
- * NOTE:  The idle task is responsible for freeing the kernel allocated
- * memory from tasks that have been deleted.  It is therefore important that
- * the idle task is not starved of microcontroller processing time if your
- * application makes any calls to vTaskDelete ().  Memory allocated by the
- * task code is not automatically freed, and should be freed before the task
- * is deleted.
- *
- * See the demo application file death.c for sample code that utilises
- * vTaskDelete ().
- *
- * @param xTask The handle of the task to be deleted.  Passing NULL will
- * cause the calling task to be deleted.
- *
- * Example usage:
-   
- void vOtherFunction( void )
- {
- TaskHandle_t xHandle;
-
-	 // Create the task, storing the handle.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
-	 // Use the handle to delete the task.
-	 vTaskDelete( xHandle );
- }
-   

- * \defgroup vTaskDelete vTaskDelete
- * \ingroup Tasks
- */
-void vTaskDelete( TaskHandle_t xTaskToDelete ) PRIVILEGED_FUNCTION;
-
-/*-----------------------------------------------------------
- * TASK CONTROL API
- *----------------------------------------------------------*/
-
-/**
- * task. h
- * 
void vTaskDelay( const TickType_t xTicksToDelay );

- *
- * Delay a task for a given number of ticks.  The actual time that the
- * task remains blocked depends on the tick rate.  The constant
- * portTICK_PERIOD_MS can be used to calculate real time from the tick
- * rate - with the resolution of one tick period.
- *
- * INCLUDE_vTaskDelay must be defined as 1 for this function to be available.
- * See the configuration section for more information.
- *
- *
- * vTaskDelay() specifies a time at which the task wishes to unblock relative to
- * the time at which vTaskDelay() is called.  For example, specifying a block
- * period of 100 ticks will cause the task to unblock 100 ticks after
- * vTaskDelay() is called.  vTaskDelay() does not therefore provide a good method
- * of controlling the frequency of a periodic task as the path taken through the
- * code, as well as other task and interrupt activity, will effect the frequency
- * at which vTaskDelay() gets called and therefore the time at which the task
- * next executes.  See vTaskDelayUntil() for an alternative API function designed
- * to facilitate fixed frequency execution.  It does this by specifying an
- * absolute time (rather than a relative time) at which the calling task should
- * unblock.
- *
- * @param xTicksToDelay The amount of time, in tick periods, that
- * the calling task should block.
- *
- * Example usage:
-
- void vTaskFunction( void * pvParameters )
- {
- // Block for 500ms.
- const TickType_t xDelay = 500 / portTICK_PERIOD_MS;
-
-	 for( ;; )
-	 {
-		 // Simply toggle the LED every 500ms, blocking between each toggle.
-		 vToggleLED();
-		 vTaskDelay( xDelay );
-	 }
- }
-
- * \defgroup vTaskDelay vTaskDelay
- * \ingroup TaskCtrl
- */
-void vTaskDelay( const TickType_t xTicksToDelay ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
void vTaskDelayUntil( TickType_t *pxPreviousWakeTime, const TickType_t xTimeIncrement );

- *
- * INCLUDE_vTaskDelayUntil must be defined as 1 for this function to be available.
- * See the configuration section for more information.
- *
- * Delay a task until a specified time.  This function can be used by periodic
- * tasks to ensure a constant execution frequency.
- *
- * This function differs from vTaskDelay () in one important aspect:  vTaskDelay () will
- * cause a task to block for the specified number of ticks from the time vTaskDelay () is
- * called.  It is therefore difficult to use vTaskDelay () by itself to generate a fixed
- * execution frequency as the time between a task starting to execute and that task
- * calling vTaskDelay () may not be fixed [the task may take a different path though the
- * code between calls, or may get interrupted or preempted a different number of times
- * each time it executes].
- *
- * Whereas vTaskDelay () specifies a wake time relative to the time at which the function
- * is called, vTaskDelayUntil () specifies the absolute (exact) time at which it wishes to
- * unblock.
- *
- * The constant portTICK_PERIOD_MS can be used to calculate real time from the tick
- * rate - with the resolution of one tick period.
- *
- * @param pxPreviousWakeTime Pointer to a variable that holds the time at which the
- * task was last unblocked.  The variable must be initialised with the current time
- * prior to its first use (see the example below).  Following this the variable is
- * automatically updated within vTaskDelayUntil ().
- *
- * @param xTimeIncrement The cycle time period.  The task will be unblocked at
- * time *pxPreviousWakeTime + xTimeIncrement.  Calling vTaskDelayUntil with the
- * same xTimeIncrement parameter value will cause the task to execute with
- * a fixed interface period.
- *
- * Example usage:
-   
- // Perform an action every 10 ticks.
- void vTaskFunction( void * pvParameters )
- {
- TickType_t xLastWakeTime;
- const TickType_t xFrequency = 10;
-
-	 // Initialise the xLastWakeTime variable with the current time.
-	 xLastWakeTime = xTaskGetTickCount ();
-	 for( ;; )
-	 {
-		 // Wait for the next cycle.
-		 vTaskDelayUntil( &xLastWakeTime, xFrequency );
-
-		 // Perform action here.
-	 }
- }
-   

- * \defgroup vTaskDelayUntil vTaskDelayUntil
- * \ingroup TaskCtrl
- */
-void vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, const TickType_t xTimeIncrement ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
BaseType_t xTaskAbortDelay( TaskHandle_t xTask );

- *
- * INCLUDE_xTaskAbortDelay must be defined as 1 in FreeRTOSConfig.h for this
- * function to be available.
- *
- * A task will enter the Blocked state when it is waiting for an event.  The
- * event it is waiting for can be a temporal event (waiting for a time), such
- * as when vTaskDelay() is called, or an event on an object, such as when
- * xQueueReceive() or ulTaskNotifyTake() is called.  If the handle of a task
- * that is in the Blocked state is used in a call to xTaskAbortDelay() then the
- * task will leave the Blocked state, and return from whichever function call
- * placed the task into the Blocked state.
- *
- * There is no 'FromISR' version of this function as an interrupt would need to
- * know which object a task was blocked on in order to know which actions to
- * take.  For example, if the task was blocked on a queue the interrupt handler
- * would then need to know if the queue was locked.
- *
- * @param xTask The handle of the task to remove from the Blocked state.
- *
- * @return If the task referenced by xTask was not in the Blocked state then
- * pdFAIL is returned.  Otherwise pdPASS is returned.
- *
- * \defgroup xTaskAbortDelay xTaskAbortDelay
- * \ingroup TaskCtrl
- */
-BaseType_t xTaskAbortDelay( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
UBaseType_t uxTaskPriorityGet( const TaskHandle_t xTask );

- *
- * INCLUDE_uxTaskPriorityGet must be defined as 1 for this function to be available.
- * See the configuration section for more information.
- *
- * Obtain the priority of any task.
- *
- * @param xTask Handle of the task to be queried.  Passing a NULL
- * handle results in the priority of the calling task being returned.
- *
- * @return The priority of xTask.
- *
- * Example usage:
-   
- void vAFunction( void )
- {
- TaskHandle_t xHandle;
-
-	 // Create a task, storing the handle.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
-	 // ...
-
-	 // Use the handle to obtain the priority of the created task.
-	 // It was created with tskIDLE_PRIORITY, but may have changed
-	 // it itself.
-	 if( uxTaskPriorityGet( xHandle ) != tskIDLE_PRIORITY )
-	 {
-		 // The task has changed it's priority.
-	 }
-
-	 // ...
-
-	 // Is our priority higher than the created task?
-	 if( uxTaskPriorityGet( xHandle ) < uxTaskPriorityGet( NULL ) )
-	 {
-		 // Our priority (obtained using NULL handle) is higher.
-	 }
- }
-   

- * \defgroup uxTaskPriorityGet uxTaskPriorityGet
- * \ingroup TaskCtrl
- */
-UBaseType_t uxTaskPriorityGet( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
UBaseType_t uxTaskPriorityGetFromISR( const TaskHandle_t xTask );

- *
- * A version of uxTaskPriorityGet() that can be used from an ISR.
- */
-UBaseType_t uxTaskPriorityGetFromISR( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
eTaskState eTaskGetState( TaskHandle_t xTask );

- *
- * INCLUDE_eTaskGetState must be defined as 1 for this function to be available.
- * See the configuration section for more information.
- *
- * Obtain the state of any task.  States are encoded by the eTaskState
- * enumerated type.
- *
- * @param xTask Handle of the task to be queried.
- *
- * @return The state of xTask at the time the function was called.  Note the
- * state of the task might change between the function being called, and the
- * functions return value being tested by the calling task.
- */
-eTaskState eTaskGetState( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
void vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState );

- *
- * configUSE_TRACE_FACILITY must be defined as 1 for this function to be
- * available.  See the configuration section for more information.
- *
- * Populates a TaskStatus_t structure with information about a task.
- *
- * @param xTask Handle of the task being queried.  If xTask is NULL then
- * information will be returned about the calling task.
- *
- * @param pxTaskStatus A pointer to the TaskStatus_t structure that will be
- * filled with information about the task referenced by the handle passed using
- * the xTask parameter.
- *
- * @xGetFreeStackSpace The TaskStatus_t structure contains a member to report
- * the stack high water mark of the task being queried.  Calculating the stack
- * high water mark takes a relatively long time, and can make the system
- * temporarily unresponsive - so the xGetFreeStackSpace parameter is provided to
- * allow the high water mark checking to be skipped.  The high watermark value
- * will only be written to the TaskStatus_t structure if xGetFreeStackSpace is
- * not set to pdFALSE;
- *
- * @param eState The TaskStatus_t structure contains a member to report the
- * state of the task being queried.  Obtaining the task state is not as fast as
- * a simple assignment - so the eState parameter is provided to allow the state
- * information to be omitted from the TaskStatus_t structure.  To obtain state
- * information then set eState to eInvalid - otherwise the value passed in
- * eState will be reported as the task state in the TaskStatus_t structure.
- *
- * Example usage:
-   
- void vAFunction( void )
- {
- TaskHandle_t xHandle;
- TaskStatus_t xTaskDetails;
-
-    // Obtain the handle of a task from its name.
-    xHandle = xTaskGetHandle( "Task_Name" );
-
-    // Check the handle is not NULL.
-    configASSERT( xHandle );
-
-    // Use the handle to obtain further information about the task.
-    vTaskGetInfo( xHandle,
-                  &xTaskDetails,
-                  pdTRUE, // Include the high water mark in xTaskDetails.
-                  eInvalid ); // Include the task state in xTaskDetails.
- }
-   

- * \defgroup vTaskGetInfo vTaskGetInfo
- * \ingroup TaskCtrl
- */
-void vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
void vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority );

- *
- * INCLUDE_vTaskPrioritySet must be defined as 1 for this function to be available.
- * See the configuration section for more information.
- *
- * Set the priority of any task.
- *
- * A context switch will occur before the function returns if the priority
- * being set is higher than the currently executing task.
- *
- * @param xTask Handle to the task for which the priority is being set.
- * Passing a NULL handle results in the priority of the calling task being set.
- *
- * @param uxNewPriority The priority to which the task will be set.
- *
- * Example usage:
-   
- void vAFunction( void )
- {
- TaskHandle_t xHandle;
-
-	 // Create a task, storing the handle.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
-	 // ...
-
-	 // Use the handle to raise the priority of the created task.
-	 vTaskPrioritySet( xHandle, tskIDLE_PRIORITY + 1 );
-
-	 // ...
-
-	 // Use a NULL handle to raise our priority to the same value.
-	 vTaskPrioritySet( NULL, tskIDLE_PRIORITY + 1 );
- }
-   

- * \defgroup vTaskPrioritySet vTaskPrioritySet
- * \ingroup TaskCtrl
- */
-void vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
void vTaskSuspend( TaskHandle_t xTaskToSuspend );

- *
- * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available.
- * See the configuration section for more information.
- *
- * Suspend any task.  When suspended a task will never get any microcontroller
- * processing time, no matter what its priority.
- *
- * Calls to vTaskSuspend are not accumulative -
- * i.e. calling vTaskSuspend () twice on the same task still only requires one
- * call to vTaskResume () to ready the suspended task.
- *
- * @param xTaskToSuspend Handle to the task being suspended.  Passing a NULL
- * handle will cause the calling task to be suspended.
- *
- * Example usage:
-   
- void vAFunction( void )
- {
- TaskHandle_t xHandle;
-
-	 // Create a task, storing the handle.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
-	 // ...
-
-	 // Use the handle to suspend the created task.
-	 vTaskSuspend( xHandle );
-
-	 // ...
-
-	 // The created task will not run during this period, unless
-	 // another task calls vTaskResume( xHandle ).
-
-	 //...
-
-
-	 // Suspend ourselves.
-	 vTaskSuspend( NULL );
-
-	 // We cannot get here unless another task calls vTaskResume
-	 // with our handle as the parameter.
- }
-   

- * \defgroup vTaskSuspend vTaskSuspend
- * \ingroup TaskCtrl
- */
-void vTaskSuspend( TaskHandle_t xTaskToSuspend ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
void vTaskResume( TaskHandle_t xTaskToResume );

- *
- * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available.
- * See the configuration section for more information.
- *
- * Resumes a suspended task.
- *
- * A task that has been suspended by one or more calls to vTaskSuspend ()
- * will be made available for running again by a single call to
- * vTaskResume ().
- *
- * @param xTaskToResume Handle to the task being readied.
- *
- * Example usage:
-   
- void vAFunction( void )
- {
- TaskHandle_t xHandle;
-
-	 // Create a task, storing the handle.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
-	 // ...
-
-	 // Use the handle to suspend the created task.
-	 vTaskSuspend( xHandle );
-
-	 // ...
-
-	 // The created task will not run during this period, unless
-	 // another task calls vTaskResume( xHandle ).
-
-	 //...
-
-
-	 // Resume the suspended task ourselves.
-	 vTaskResume( xHandle );
-
-	 // The created task will once again get microcontroller processing
-	 // time in accordance with its priority within the system.
- }
-   

- * \defgroup vTaskResume vTaskResume
- * \ingroup TaskCtrl
- */
-void vTaskResume( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
void xTaskResumeFromISR( TaskHandle_t xTaskToResume );

- *
- * INCLUDE_xTaskResumeFromISR must be defined as 1 for this function to be
- * available.  See the configuration section for more information.
- *
- * An implementation of vTaskResume() that can be called from within an ISR.
- *
- * A task that has been suspended by one or more calls to vTaskSuspend ()
- * will be made available for running again by a single call to
- * xTaskResumeFromISR ().
- *
- * xTaskResumeFromISR() should not be used to synchronise a task with an
- * interrupt if there is a chance that the interrupt could arrive prior to the
- * task being suspended - as this can lead to interrupts being missed. Use of a
- * semaphore as a synchronisation mechanism would avoid this eventuality.
- *
- * @param xTaskToResume Handle to the task being readied.
- *
- * @return pdTRUE if resuming the task should result in a context switch,
- * otherwise pdFALSE. This is used by the ISR to determine if a context switch
- * may be required following the ISR.
- *
- * \defgroup vTaskResumeFromISR vTaskResumeFromISR
- * \ingroup TaskCtrl
- */
-BaseType_t xTaskResumeFromISR( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION;
-
-/*-----------------------------------------------------------
- * SCHEDULER CONTROL
- *----------------------------------------------------------*/
-
-/**
- * task. h
- * 
void vTaskStartScheduler( void );

- *
- * Starts the real time kernel tick processing.  After calling the kernel
- * has control over which tasks are executed and when.
- *
- * See the demo application file main.c for an example of creating
- * tasks and starting the kernel.
- *
- * Example usage:
-   
- void vAFunction( void )
- {
-	 // Create at least one task before starting the kernel.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
-
-	 // Start the real time kernel with preemption.
-	 vTaskStartScheduler ();
-
-	 // Will not get here unless a task calls vTaskEndScheduler ()
- }
-   

- *
- * \defgroup vTaskStartScheduler vTaskStartScheduler
- * \ingroup SchedulerControl
- */
-void vTaskStartScheduler( void ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
void vTaskEndScheduler( void );

- *
- * NOTE:  At the time of writing only the x86 real mode port, which runs on a PC
- * in place of DOS, implements this function.
- *
- * Stops the real time kernel tick.  All created tasks will be automatically
- * deleted and multitasking (either preemptive or cooperative) will
- * stop.  Execution then resumes from the point where vTaskStartScheduler ()
- * was called, as if vTaskStartScheduler () had just returned.
- *
- * See the demo application file main. c in the demo/PC directory for an
- * example that uses vTaskEndScheduler ().
- *
- * vTaskEndScheduler () requires an exit function to be defined within the
- * portable layer (see vPortEndScheduler () in port. c for the PC port).  This
- * performs hardware specific operations such as stopping the kernel tick.
- *
- * vTaskEndScheduler () will cause all of the resources allocated by the
- * kernel to be freed - but will not free resources allocated by application
- * tasks.
- *
- * Example usage:
-   
- void vTaskCode( void * pvParameters )
- {
-	 for( ;; )
-	 {
-		 // Task code goes here.
-
-		 // At some point we want to end the real time kernel processing
-		 // so call ...
-		 vTaskEndScheduler ();
-	 }
- }
-
- void vAFunction( void )
- {
-	 // Create at least one task before starting the kernel.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
-
-	 // Start the real time kernel with preemption.
-	 vTaskStartScheduler ();
-
-	 // Will only get here when the vTaskCode () task has called
-	 // vTaskEndScheduler ().  When we get here we are back to single task
-	 // execution.
- }
-   

- *
- * \defgroup vTaskEndScheduler vTaskEndScheduler
- * \ingroup SchedulerControl
- */
-void vTaskEndScheduler( void ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
void vTaskSuspendAll( void );

- *
- * Suspends the scheduler without disabling interrupts.  Context switches will
- * not occur while the scheduler is suspended.
- *
- * After calling vTaskSuspendAll () the calling task will continue to execute
- * without risk of being swapped out until a call to xTaskResumeAll () has been
- * made.
- *
- * API functions that have the potential to cause a context switch (for example,
- * vTaskDelayUntil(), xQueueSend(), etc.) must not be called while the scheduler
- * is suspended.
- *
- * Example usage:
-   
- void vTask1( void * pvParameters )
- {
-	 for( ;; )
-	 {
-		 // Task code goes here.
-
-		 // ...
-
-		 // At some point the task wants to perform a long operation during
-		 // which it does not want to get swapped out.  It cannot use
-		 // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the
-		 // operation may cause interrupts to be missed - including the
-		 // ticks.
-
-		 // Prevent the real time kernel swapping out the task.
-		 vTaskSuspendAll ();
-
-		 // Perform the operation here.  There is no need to use critical
-		 // sections as we have all the microcontroller processing time.
-		 // During this time interrupts will still operate and the kernel
-		 // tick count will be maintained.
-
-		 // ...
-
-		 // The operation is complete.  Restart the kernel.
-		 xTaskResumeAll ();
-	 }
- }
-   

- * \defgroup vTaskSuspendAll vTaskSuspendAll
- * \ingroup SchedulerControl
- */
-void vTaskSuspendAll( void ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
BaseType_t xTaskResumeAll( void );

- *
- * Resumes scheduler activity after it was suspended by a call to
- * vTaskSuspendAll().
- *
- * xTaskResumeAll() only resumes the scheduler.  It does not unsuspend tasks
- * that were previously suspended by a call to vTaskSuspend().
- *
- * @return If resuming the scheduler caused a context switch then pdTRUE is
- *		  returned, otherwise pdFALSE is returned.
- *
- * Example usage:
-   
- void vTask1( void * pvParameters )
- {
-	 for( ;; )
-	 {
-		 // Task code goes here.
-
-		 // ...
-
-		 // At some point the task wants to perform a long operation during
-		 // which it does not want to get swapped out.  It cannot use
-		 // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the
-		 // operation may cause interrupts to be missed - including the
-		 // ticks.
-
-		 // Prevent the real time kernel swapping out the task.
-		 vTaskSuspendAll ();
-
-		 // Perform the operation here.  There is no need to use critical
-		 // sections as we have all the microcontroller processing time.
-		 // During this time interrupts will still operate and the real
-		 // time kernel tick count will be maintained.
-
-		 // ...
-
-		 // The operation is complete.  Restart the kernel.  We want to force
-		 // a context switch - but there is no point if resuming the scheduler
-		 // caused a context switch already.
-		 if( !xTaskResumeAll () )
-		 {
-			  taskYIELD ();
-		 }
-	 }
- }
-   

- * \defgroup xTaskResumeAll xTaskResumeAll
- * \ingroup SchedulerControl
- */
-BaseType_t xTaskResumeAll( void ) PRIVILEGED_FUNCTION;
-
-/*-----------------------------------------------------------
- * TASK UTILITIES
- *----------------------------------------------------------*/
-
-/**
- * task. h
- * 
TickType_t xTaskGetTickCount( void );

- *
- * @return The count of ticks since vTaskStartScheduler was called.
- *
- * \defgroup xTaskGetTickCount xTaskGetTickCount
- * \ingroup TaskUtils
- */
-TickType_t xTaskGetTickCount( void ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
TickType_t xTaskGetTickCountFromISR( void );

- *
- * @return The count of ticks since vTaskStartScheduler was called.
- *
- * This is a version of xTaskGetTickCount() that is safe to be called from an
- * ISR - provided that TickType_t is the natural word size of the
- * microcontroller being used or interrupt nesting is either not supported or
- * not being used.
- *
- * \defgroup xTaskGetTickCountFromISR xTaskGetTickCountFromISR
- * \ingroup TaskUtils
- */
-TickType_t xTaskGetTickCountFromISR( void ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
uint16_t uxTaskGetNumberOfTasks( void );

- *
- * @return The number of tasks that the real time kernel is currently managing.
- * This includes all ready, blocked and suspended tasks.  A task that
- * has been deleted but not yet freed by the idle task will also be
- * included in the count.
- *
- * \defgroup uxTaskGetNumberOfTasks uxTaskGetNumberOfTasks
- * \ingroup TaskUtils
- */
-UBaseType_t uxTaskGetNumberOfTasks( void ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
char *pcTaskGetName( TaskHandle_t xTaskToQuery );

- *
- * @return The text (human readable) name of the task referenced by the handle
- * xTaskToQuery.  A task can query its own name by either passing in its own
- * handle, or by setting xTaskToQuery to NULL.
- *
- * \defgroup pcTaskGetName pcTaskGetName
- * \ingroup TaskUtils
- */
-char *pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-
-/**
- * task. h
- * 
TaskHandle_t xTaskGetHandle( const char *pcNameToQuery );

- *
- * NOTE:  This function takes a relatively long time to complete and should be
- * used sparingly.
- *
- * @return The handle of the task that has the human readable name pcNameToQuery.
- * NULL is returned if no matching name is found.  INCLUDE_xTaskGetHandle
- * must be set to 1 in FreeRTOSConfig.h for pcTaskGetHandle() to be available.
- *
- * \defgroup pcTaskGetHandle pcTaskGetHandle
- * \ingroup TaskUtils
- */
-TaskHandle_t xTaskGetHandle( const char *pcNameToQuery ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-
-/**
- * task.h
- * 
UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask );

- *
- * INCLUDE_uxTaskGetStackHighWaterMark must be set to 1 in FreeRTOSConfig.h for
- * this function to be available.
- *
- * Returns the high water mark of the stack associated with xTask.  That is,
- * the minimum free stack space there has been (in words, so on a 32 bit machine
- * a value of 1 means 4 bytes) since the task started.  The smaller the returned
- * number the closer the task has come to overflowing its stack.
- *
- * uxTaskGetStackHighWaterMark() and uxTaskGetStackHighWaterMark2() are the
- * same except for their return type.  Using configSTACK_DEPTH_TYPE allows the
- * user to determine the return type.  It gets around the problem of the value
- * overflowing on 8-bit types without breaking backward compatibility for
- * applications that expect an 8-bit return type.
- *
- * @param xTask Handle of the task associated with the stack to be checked.
- * Set xTask to NULL to check the stack of the calling task.
- *
- * @return The smallest amount of free stack space there has been (in words, so
- * actual spaces on the stack rather than bytes) since the task referenced by
- * xTask was created.
- */
-UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
-
-/**
- * task.h
- * 
configSTACK_DEPTH_TYPE uxTaskGetStackHighWaterMark2( TaskHandle_t xTask );

- *
- * INCLUDE_uxTaskGetStackHighWaterMark2 must be set to 1 in FreeRTOSConfig.h for
- * this function to be available.
- *
- * Returns the high water mark of the stack associated with xTask.  That is,
- * the minimum free stack space there has been (in words, so on a 32 bit machine
- * a value of 1 means 4 bytes) since the task started.  The smaller the returned
- * number the closer the task has come to overflowing its stack.
- *
- * uxTaskGetStackHighWaterMark() and uxTaskGetStackHighWaterMark2() are the
- * same except for their return type.  Using configSTACK_DEPTH_TYPE allows the
- * user to determine the return type.  It gets around the problem of the value
- * overflowing on 8-bit types without breaking backward compatibility for
- * applications that expect an 8-bit return type.
- *
- * @param xTask Handle of the task associated with the stack to be checked.
- * Set xTask to NULL to check the stack of the calling task.
- *
- * @return The smallest amount of free stack space there has been (in words, so
- * actual spaces on the stack rather than bytes) since the task referenced by
- * xTask was created.
- */
-configSTACK_DEPTH_TYPE uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
-
-/* When using trace macros it is sometimes necessary to include task.h before
-FreeRTOS.h.  When this is done TaskHookFunction_t will not yet have been defined,
-so the following two prototypes will cause a compilation error.  This can be
-fixed by simply guarding against the inclusion of these two prototypes unless
-they are explicitly required by the configUSE_APPLICATION_TASK_TAG configuration
-constant. */
-#ifdef configUSE_APPLICATION_TASK_TAG
-	#if configUSE_APPLICATION_TASK_TAG == 1
-		/**
-		 * task.h
-		 * 
void vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction );

-		 *
-		 * Sets pxHookFunction to be the task hook function used by the task xTask.
-		 * Passing xTask as NULL has the effect of setting the calling tasks hook
-		 * function.
-		 */
-		void vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction ) PRIVILEGED_FUNCTION;
-
-		/**
-		 * task.h
-		 * 
void xTaskGetApplicationTaskTag( TaskHandle_t xTask );

-		 *
-		 * Returns the pxHookFunction value assigned to the task xTask.  Do not
-		 * call from an interrupt service routine - call
-		 * xTaskGetApplicationTaskTagFromISR() instead.
-		 */
-		TaskHookFunction_t xTaskGetApplicationTaskTag( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
-
-		/**
-		 * task.h
-		 * 
void xTaskGetApplicationTaskTagFromISR( TaskHandle_t xTask );

-		 *
-		 * Returns the pxHookFunction value assigned to the task xTask.  Can
-		 * be called from an interrupt service routine.
-		 */
-		TaskHookFunction_t xTaskGetApplicationTaskTagFromISR( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
-	#endif /* configUSE_APPLICATION_TASK_TAG ==1 */
-#endif /* ifdef configUSE_APPLICATION_TASK_TAG */
-
-#if( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 )
-
-	/* Each task contains an array of pointers that is dimensioned by the
-	configNUM_THREAD_LOCAL_STORAGE_POINTERS setting in FreeRTOSConfig.h.  The
-	kernel does not use the pointers itself, so the application writer can use
-	the pointers for any purpose they wish.  The following two functions are
-	used to set and query a pointer respectively. */
-	void vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue ) PRIVILEGED_FUNCTION;
-	void *pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex ) PRIVILEGED_FUNCTION;
-
-#endif
-
-/**
- * task.h
- * 
BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter );

- *
- * Calls the hook function associated with xTask.  Passing xTask as NULL has
- * the effect of calling the Running tasks (the calling task) hook function.
- *
- * pvParameter is passed to the hook function for the task to interpret as it
- * wants.  The return value is the value returned by the task hook function
- * registered by the user.
- */
-BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter ) PRIVILEGED_FUNCTION;
-
-/**
- * xTaskGetIdleTaskHandle() is only available if
- * INCLUDE_xTaskGetIdleTaskHandle is set to 1 in FreeRTOSConfig.h.
- *
- * Simply returns the handle of the idle task.  It is not valid to call
- * xTaskGetIdleTaskHandle() before the scheduler has been started.
- */
-TaskHandle_t xTaskGetIdleTaskHandle( void ) PRIVILEGED_FUNCTION;
-
-/**
- * configUSE_TRACE_FACILITY must be defined as 1 in FreeRTOSConfig.h for
- * uxTaskGetSystemState() to be available.
- *
- * uxTaskGetSystemState() populates an TaskStatus_t structure for each task in
- * the system.  TaskStatus_t structures contain, among other things, members
- * for the task handle, task name, task priority, task state, and total amount
- * of run time consumed by the task.  See the TaskStatus_t structure
- * definition in this file for the full member list.
- *
- * NOTE:  This function is intended for debugging use only as its use results in
- * the scheduler remaining suspended for an extended period.
- *
- * @param pxTaskStatusArray A pointer to an array of TaskStatus_t structures.
- * The array must contain at least one TaskStatus_t structure for each task
- * that is under the control of the RTOS.  The number of tasks under the control
- * of the RTOS can be determined using the uxTaskGetNumberOfTasks() API function.
- *
- * @param uxArraySize The size of the array pointed to by the pxTaskStatusArray
- * parameter.  The size is specified as the number of indexes in the array, or
- * the number of TaskStatus_t structures contained in the array, not by the
- * number of bytes in the array.
- *
- * @param pulTotalRunTime If configGENERATE_RUN_TIME_STATS is set to 1 in
- * FreeRTOSConfig.h then *pulTotalRunTime is set by uxTaskGetSystemState() to the
- * total run time (as defined by the run time stats clock, see
- * http://www.freertos.org/rtos-run-time-stats.html) since the target booted.
- * pulTotalRunTime can be set to NULL to omit the total run time information.
- *
- * @return The number of TaskStatus_t structures that were populated by
- * uxTaskGetSystemState().  This should equal the number returned by the
- * uxTaskGetNumberOfTasks() API function, but will be zero if the value passed
- * in the uxArraySize parameter was too small.
- *
- * Example usage:
-   
-    // This example demonstrates how a human readable table of run time stats
-	// information is generated from raw data provided by uxTaskGetSystemState().
-	// The human readable table is written to pcWriteBuffer
-	void vTaskGetRunTimeStats( char *pcWriteBuffer )
-	{
-	TaskStatus_t *pxTaskStatusArray;
-	volatile UBaseType_t uxArraySize, x;
-	uint32_t ulTotalRunTime, ulStatsAsPercentage;
-
-		// Make sure the write buffer does not contain a string.
-		*pcWriteBuffer = 0x00;
-
-		// Take a snapshot of the number of tasks in case it changes while this
-		// function is executing.
-		uxArraySize = uxTaskGetNumberOfTasks();
-
-		// Allocate a TaskStatus_t structure for each task.  An array could be
-		// allocated statically at compile time.
-		pxTaskStatusArray = pvPortMalloc( uxArraySize * sizeof( TaskStatus_t ) );
-
-		if( pxTaskStatusArray != NULL )
-		{
-			// Generate raw status information about each task.
-			uxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, &ulTotalRunTime );
-
-			// For percentage calculations.
-			ulTotalRunTime /= 100UL;
-
-			// Avoid divide by zero errors.
-			if( ulTotalRunTime > 0 )
-			{
-				// For each populated position in the pxTaskStatusArray array,
-				// format the raw data as human readable ASCII data
-				for( x = 0; x < uxArraySize; x++ )
-				{
-					// What percentage of the total run time has the task used?
-					// This will always be rounded down to the nearest integer.
-					// ulTotalRunTimeDiv100 has already been divided by 100.
-					ulStatsAsPercentage = pxTaskStatusArray[ x ].ulRunTimeCounter / ulTotalRunTime;
-
-					if( ulStatsAsPercentage > 0UL )
-					{
-						sprintf( pcWriteBuffer, "%s\t\t%lu\t\t%lu%%\r\n", pxTaskStatusArray[ x ].pcTaskName, pxTaskStatusArray[ x ].ulRunTimeCounter, ulStatsAsPercentage );
-					}
-					else
-					{
-						// If the percentage is zero here then the task has
-						// consumed less than 1% of the total run time.
-						sprintf( pcWriteBuffer, "%s\t\t%lu\t\t<1%%\r\n", pxTaskStatusArray[ x ].pcTaskName, pxTaskStatusArray[ x ].ulRunTimeCounter );
-					}
-
-					pcWriteBuffer += strlen( ( char * ) pcWriteBuffer );
-				}
-			}
-
-			// The array is no longer needed, free the memory it consumes.
-			vPortFree( pxTaskStatusArray );
-		}
-	}
-	

- */
-UBaseType_t uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, const UBaseType_t uxArraySize, uint32_t * const pulTotalRunTime ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
void vTaskList( char *pcWriteBuffer );

- *
- * configUSE_TRACE_FACILITY and configUSE_STATS_FORMATTING_FUNCTIONS must
- * both be defined as 1 for this function to be available.  See the
- * configuration section of the FreeRTOS.org website for more information.
- *
- * NOTE 1: This function will disable interrupts for its duration.  It is
- * not intended for normal application runtime use but as a debug aid.
- *
- * Lists all the current tasks, along with their current state and stack
- * usage high water mark.
- *
- * Tasks are reported as blocked ('B'), ready ('R'), deleted ('D') or
- * suspended ('S').
- *
- * PLEASE NOTE:
- *
- * This function is provided for convenience only, and is used by many of the
- * demo applications.  Do not consider it to be part of the scheduler.
- *
- * vTaskList() calls uxTaskGetSystemState(), then formats part of the
- * uxTaskGetSystemState() output into a human readable table that displays task
- * names, states and stack usage.
- *
- * vTaskList() has a dependency on the sprintf() C library function that might
- * bloat the code size, use a lot of stack, and provide different results on
- * different platforms.  An alternative, tiny, third party, and limited
- * functionality implementation of sprintf() is provided in many of the
- * FreeRTOS/Demo sub-directories in a file called printf-stdarg.c (note
- * printf-stdarg.c does not provide a full snprintf() implementation!).
- *
- * It is recommended that production systems call uxTaskGetSystemState()
- * directly to get access to raw stats data, rather than indirectly through a
- * call to vTaskList().
- *
- * @param pcWriteBuffer A buffer into which the above mentioned details
- * will be written, in ASCII form.  This buffer is assumed to be large
- * enough to contain the generated report.  Approximately 40 bytes per
- * task should be sufficient.
- *
- * \defgroup vTaskList vTaskList
- * \ingroup TaskUtils
- */
-void vTaskList( char * pcWriteBuffer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-
-/**
- * task. h
- * 
void vTaskGetRunTimeStats( char *pcWriteBuffer );

- *
- * configGENERATE_RUN_TIME_STATS and configUSE_STATS_FORMATTING_FUNCTIONS
- * must both be defined as 1 for this function to be available.  The application
- * must also then provide definitions for
- * portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and portGET_RUN_TIME_COUNTER_VALUE()
- * to configure a peripheral timer/counter and return the timers current count
- * value respectively.  The counter should be at least 10 times the frequency of
- * the tick count.
- *
- * NOTE 1: This function will disable interrupts for its duration.  It is
- * not intended for normal application runtime use but as a debug aid.
- *
- * Setting configGENERATE_RUN_TIME_STATS to 1 will result in a total
- * accumulated execution time being stored for each task.  The resolution
- * of the accumulated time value depends on the frequency of the timer
- * configured by the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() macro.
- * Calling vTaskGetRunTimeStats() writes the total execution time of each
- * task into a buffer, both as an absolute count value and as a percentage
- * of the total system execution time.
- *
- * NOTE 2:
- *
- * This function is provided for convenience only, and is used by many of the
- * demo applications.  Do not consider it to be part of the scheduler.
- *
- * vTaskGetRunTimeStats() calls uxTaskGetSystemState(), then formats part of the
- * uxTaskGetSystemState() output into a human readable table that displays the
- * amount of time each task has spent in the Running state in both absolute and
- * percentage terms.
- *
- * vTaskGetRunTimeStats() has a dependency on the sprintf() C library function
- * that might bloat the code size, use a lot of stack, and provide different
- * results on different platforms.  An alternative, tiny, third party, and
- * limited functionality implementation of sprintf() is provided in many of the
- * FreeRTOS/Demo sub-directories in a file called printf-stdarg.c (note
- * printf-stdarg.c does not provide a full snprintf() implementation!).
- *
- * It is recommended that production systems call uxTaskGetSystemState() directly
- * to get access to raw stats data, rather than indirectly through a call to
- * vTaskGetRunTimeStats().
- *
- * @param pcWriteBuffer A buffer into which the execution times will be
- * written, in ASCII form.  This buffer is assumed to be large enough to
- * contain the generated report.  Approximately 40 bytes per task should
- * be sufficient.
- *
- * \defgroup vTaskGetRunTimeStats vTaskGetRunTimeStats
- * \ingroup TaskUtils
- */
-void vTaskGetRunTimeStats( char *pcWriteBuffer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-
-/**
-* task. h
-* 
uint32_t ulTaskGetIdleRunTimeCounter( void );

-*
-* configGENERATE_RUN_TIME_STATS and configUSE_STATS_FORMATTING_FUNCTIONS
-* must both be defined as 1 for this function to be available.  The application
-* must also then provide definitions for
-* portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and portGET_RUN_TIME_COUNTER_VALUE()
-* to configure a peripheral timer/counter and return the timers current count
-* value respectively.  The counter should be at least 10 times the frequency of
-* the tick count.
-*
-* Setting configGENERATE_RUN_TIME_STATS to 1 will result in a total
-* accumulated execution time being stored for each task.  The resolution
-* of the accumulated time value depends on the frequency of the timer
-* configured by the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() macro.
-* While uxTaskGetSystemState() and vTaskGetRunTimeStats() writes the total
-* execution time of each task into a buffer, ulTaskGetIdleRunTimeCounter()
-* returns the total execution time of just the idle task.
-*
-* @return The total run time of the idle task.  This is the amount of time the
-* idle task has actually been executing.  The unit of time is dependent on the
-* frequency configured using the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and
-* portGET_RUN_TIME_COUNTER_VALUE() macros.
-*
-* \defgroup ulTaskGetIdleRunTimeCounter ulTaskGetIdleRunTimeCounter
-* \ingroup TaskUtils
-*/
-uint32_t ulTaskGetIdleRunTimeCounter( void ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
BaseType_t xTaskNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction );

- *
- * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this
- * function to be available.
- *
- * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private
- * "notification value", which is a 32-bit unsigned integer (uint32_t).
- *
- * Events can be sent to a task using an intermediary object.  Examples of such
- * objects are queues, semaphores, mutexes and event groups.  Task notifications
- * are a method of sending an event directly to a task without the need for such
- * an intermediary object.
- *
- * A notification sent to a task can optionally perform an action, such as
- * update, overwrite or increment the task's notification value.  In that way
- * task notifications can be used to send data to a task, or be used as light
- * weight and fast binary or counting semaphores.
- *
- * A notification sent to a task will remain pending until it is cleared by the
- * task calling xTaskNotifyWait() or ulTaskNotifyTake().  If the task was
- * already in the Blocked state to wait for a notification when the notification
- * arrives then the task will automatically be removed from the Blocked state
- * (unblocked) and the notification cleared.
- *
- * A task can use xTaskNotifyWait() to [optionally] block to wait for a
- * notification to be pending, or ulTaskNotifyTake() to [optionally] block
- * to wait for its notification value to have a non-zero value.  The task does
- * not consume any CPU time while it is in the Blocked state.
- *
- * See http://www.FreeRTOS.org/RTOS-task-notifications.html for details.
- *
- * @param xTaskToNotify The handle of the task being notified.  The handle to a
- * task can be returned from the xTaskCreate() API function used to create the
- * task, and the handle of the currently running task can be obtained by calling
- * xTaskGetCurrentTaskHandle().
- *
- * @param ulValue Data that can be sent with the notification.  How the data is
- * used depends on the value of the eAction parameter.
- *
- * @param eAction Specifies how the notification updates the task's notification
- * value, if at all.  Valid values for eAction are as follows:
- *
- * eSetBits -
- * The task's notification value is bitwise ORed with ulValue.  xTaskNofify()
- * always returns pdPASS in this case.
- *
- * eIncrement -
- * The task's notification value is incremented.  ulValue is not used and
- * xTaskNotify() always returns pdPASS in this case.
- *
- * eSetValueWithOverwrite -
- * The task's notification value is set to the value of ulValue, even if the
- * task being notified had not yet processed the previous notification (the
- * task already had a notification pending).  xTaskNotify() always returns
- * pdPASS in this case.
- *
- * eSetValueWithoutOverwrite -
- * If the task being notified did not already have a notification pending then
- * the task's notification value is set to ulValue and xTaskNotify() will
- * return pdPASS.  If the task being notified already had a notification
- * pending then no action is performed and pdFAIL is returned.
- *
- * eNoAction -
- * The task receives a notification without its notification value being
- * updated.  ulValue is not used and xTaskNotify() always returns pdPASS in
- * this case.
- *
- *  pulPreviousNotificationValue -
- *  Can be used to pass out the subject task's notification value before any
- *  bits are modified by the notify function.
- *
- * @return Dependent on the value of eAction.  See the description of the
- * eAction parameter.
- *
- * \defgroup xTaskNotify xTaskNotify
- * \ingroup TaskNotifications
- */
-BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue ) PRIVILEGED_FUNCTION;
-#define xTaskNotify( xTaskToNotify, ulValue, eAction ) xTaskGenericNotify( ( xTaskToNotify ), ( ulValue ), ( eAction ), NULL )
-#define xTaskNotifyAndQuery( xTaskToNotify, ulValue, eAction, pulPreviousNotifyValue ) xTaskGenericNotify( ( xTaskToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotifyValue ) )
-
-/**
- * task. h
- * 
BaseType_t xTaskNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, BaseType_t *pxHigherPriorityTaskWoken );

- *
- * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this
- * function to be available.
- *
- * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private
- * "notification value", which is a 32-bit unsigned integer (uint32_t).
- *
- * A version of xTaskNotify() that can be used from an interrupt service routine
- * (ISR).
- *
- * Events can be sent to a task using an intermediary object.  Examples of such
- * objects are queues, semaphores, mutexes and event groups.  Task notifications
- * are a method of sending an event directly to a task without the need for such
- * an intermediary object.
- *
- * A notification sent to a task can optionally perform an action, such as
- * update, overwrite or increment the task's notification value.  In that way
- * task notifications can be used to send data to a task, or be used as light
- * weight and fast binary or counting semaphores.
- *
- * A notification sent to a task will remain pending until it is cleared by the
- * task calling xTaskNotifyWait() or ulTaskNotifyTake().  If the task was
- * already in the Blocked state to wait for a notification when the notification
- * arrives then the task will automatically be removed from the Blocked state
- * (unblocked) and the notification cleared.
- *
- * A task can use xTaskNotifyWait() to [optionally] block to wait for a
- * notification to be pending, or ulTaskNotifyTake() to [optionally] block
- * to wait for its notification value to have a non-zero value.  The task does
- * not consume any CPU time while it is in the Blocked state.
- *
- * See http://www.FreeRTOS.org/RTOS-task-notifications.html for details.
- *
- * @param xTaskToNotify The handle of the task being notified.  The handle to a
- * task can be returned from the xTaskCreate() API function used to create the
- * task, and the handle of the currently running task can be obtained by calling
- * xTaskGetCurrentTaskHandle().
- *
- * @param ulValue Data that can be sent with the notification.  How the data is
- * used depends on the value of the eAction parameter.
- *
- * @param eAction Specifies how the notification updates the task's notification
- * value, if at all.  Valid values for eAction are as follows:
- *
- * eSetBits -
- * The task's notification value is bitwise ORed with ulValue.  xTaskNofify()
- * always returns pdPASS in this case.
- *
- * eIncrement -
- * The task's notification value is incremented.  ulValue is not used and
- * xTaskNotify() always returns pdPASS in this case.
- *
- * eSetValueWithOverwrite -
- * The task's notification value is set to the value of ulValue, even if the
- * task being notified had not yet processed the previous notification (the
- * task already had a notification pending).  xTaskNotify() always returns
- * pdPASS in this case.
- *
- * eSetValueWithoutOverwrite -
- * If the task being notified did not already have a notification pending then
- * the task's notification value is set to ulValue and xTaskNotify() will
- * return pdPASS.  If the task being notified already had a notification
- * pending then no action is performed and pdFAIL is returned.
- *
- * eNoAction -
- * The task receives a notification without its notification value being
- * updated.  ulValue is not used and xTaskNotify() always returns pdPASS in
- * this case.
- *
- * @param pxHigherPriorityTaskWoken  xTaskNotifyFromISR() will set
- * *pxHigherPriorityTaskWoken to pdTRUE if sending the notification caused the
- * task to which the notification was sent to leave the Blocked state, and the
- * unblocked task has a priority higher than the currently running task.  If
- * xTaskNotifyFromISR() sets this value to pdTRUE then a context switch should
- * be requested before the interrupt is exited.  How a context switch is
- * requested from an ISR is dependent on the port - see the documentation page
- * for the port in use.
- *
- * @return Dependent on the value of eAction.  See the description of the
- * eAction parameter.
- *
- * \defgroup xTaskNotify xTaskNotify
- * \ingroup TaskNotifications
- */
-BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
-#define xTaskNotifyFromISR( xTaskToNotify, ulValue, eAction, pxHigherPriorityTaskWoken ) xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( ulValue ), ( eAction ), NULL, ( pxHigherPriorityTaskWoken ) )
-#define xTaskNotifyAndQueryFromISR( xTaskToNotify, ulValue, eAction, pulPreviousNotificationValue, pxHigherPriorityTaskWoken ) xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotificationValue ), ( pxHigherPriorityTaskWoken ) )
-
-/**
- * task. h
- * 
BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait );

- *
- * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this
- * function to be available.
- *
- * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private
- * "notification value", which is a 32-bit unsigned integer (uint32_t).
- *
- * Events can be sent to a task using an intermediary object.  Examples of such
- * objects are queues, semaphores, mutexes and event groups.  Task notifications
- * are a method of sending an event directly to a task without the need for such
- * an intermediary object.
- *
- * A notification sent to a task can optionally perform an action, such as
- * update, overwrite or increment the task's notification value.  In that way
- * task notifications can be used to send data to a task, or be used as light
- * weight and fast binary or counting semaphores.
- *
- * A notification sent to a task will remain pending until it is cleared by the
- * task calling xTaskNotifyWait() or ulTaskNotifyTake().  If the task was
- * already in the Blocked state to wait for a notification when the notification
- * arrives then the task will automatically be removed from the Blocked state
- * (unblocked) and the notification cleared.
- *
- * A task can use xTaskNotifyWait() to [optionally] block to wait for a
- * notification to be pending, or ulTaskNotifyTake() to [optionally] block
- * to wait for its notification value to have a non-zero value.  The task does
- * not consume any CPU time while it is in the Blocked state.
- *
- * See http://www.FreeRTOS.org/RTOS-task-notifications.html for details.
- *
- * @param ulBitsToClearOnEntry Bits that are set in ulBitsToClearOnEntry value
- * will be cleared in the calling task's notification value before the task
- * checks to see if any notifications are pending, and optionally blocks if no
- * notifications are pending.  Setting ulBitsToClearOnEntry to ULONG_MAX (if
- * limits.h is included) or 0xffffffffUL (if limits.h is not included) will have
- * the effect of resetting the task's notification value to 0.  Setting
- * ulBitsToClearOnEntry to 0 will leave the task's notification value unchanged.
- *
- * @param ulBitsToClearOnExit If a notification is pending or received before
- * the calling task exits the xTaskNotifyWait() function then the task's
- * notification value (see the xTaskNotify() API function) is passed out using
- * the pulNotificationValue parameter.  Then any bits that are set in
- * ulBitsToClearOnExit will be cleared in the task's notification value (note
- * *pulNotificationValue is set before any bits are cleared).  Setting
- * ulBitsToClearOnExit to ULONG_MAX (if limits.h is included) or 0xffffffffUL
- * (if limits.h is not included) will have the effect of resetting the task's
- * notification value to 0 before the function exits.  Setting
- * ulBitsToClearOnExit to 0 will leave the task's notification value unchanged
- * when the function exits (in which case the value passed out in
- * pulNotificationValue will match the task's notification value).
- *
- * @param pulNotificationValue Used to pass the task's notification value out
- * of the function.  Note the value passed out will not be effected by the
- * clearing of any bits caused by ulBitsToClearOnExit being non-zero.
- *
- * @param xTicksToWait The maximum amount of time that the task should wait in
- * the Blocked state for a notification to be received, should a notification
- * not already be pending when xTaskNotifyWait() was called.  The task
- * will not consume any processing time while it is in the Blocked state.  This
- * is specified in kernel ticks, the macro pdMS_TO_TICSK( value_in_ms ) can be
- * used to convert a time specified in milliseconds to a time specified in
- * ticks.
- *
- * @return If a notification was received (including notifications that were
- * already pending when xTaskNotifyWait was called) then pdPASS is
- * returned.  Otherwise pdFAIL is returned.
- *
- * \defgroup xTaskNotifyWait xTaskNotifyWait
- * \ingroup TaskNotifications
- */
-BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
BaseType_t xTaskNotifyGive( TaskHandle_t xTaskToNotify );

- *
- * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this macro
- * to be available.
- *
- * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private
- * "notification value", which is a 32-bit unsigned integer (uint32_t).
- *
- * Events can be sent to a task using an intermediary object.  Examples of such
- * objects are queues, semaphores, mutexes and event groups.  Task notifications
- * are a method of sending an event directly to a task without the need for such
- * an intermediary object.
- *
- * A notification sent to a task can optionally perform an action, such as
- * update, overwrite or increment the task's notification value.  In that way
- * task notifications can be used to send data to a task, or be used as light
- * weight and fast binary or counting semaphores.
- *
- * xTaskNotifyGive() is a helper macro intended for use when task notifications
- * are used as light weight and faster binary or counting semaphore equivalents.
- * Actual FreeRTOS semaphores are given using the xSemaphoreGive() API function,
- * the equivalent action that instead uses a task notification is
- * xTaskNotifyGive().
- *
- * When task notifications are being used as a binary or counting semaphore
- * equivalent then the task being notified should wait for the notification
- * using the ulTaskNotificationTake() API function rather than the
- * xTaskNotifyWait() API function.
- *
- * See http://www.FreeRTOS.org/RTOS-task-notifications.html for more details.
- *
- * @param xTaskToNotify The handle of the task being notified.  The handle to a
- * task can be returned from the xTaskCreate() API function used to create the
- * task, and the handle of the currently running task can be obtained by calling
- * xTaskGetCurrentTaskHandle().
- *
- * @return xTaskNotifyGive() is a macro that calls xTaskNotify() with the
- * eAction parameter set to eIncrement - so pdPASS is always returned.
- *
- * \defgroup xTaskNotifyGive xTaskNotifyGive
- * \ingroup TaskNotifications
- */
-#define xTaskNotifyGive( xTaskToNotify ) xTaskGenericNotify( ( xTaskToNotify ), ( 0 ), eIncrement, NULL )
-
-/**
- * task. h
- * 
void vTaskNotifyGiveFromISR( TaskHandle_t xTaskHandle, BaseType_t *pxHigherPriorityTaskWoken );
- *
- * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this macro
- * to be available.
- *
- * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private
- * "notification value", which is a 32-bit unsigned integer (uint32_t).
- *
- * A version of xTaskNotifyGive() that can be called from an interrupt service
- * routine (ISR).
- *
- * Events can be sent to a task using an intermediary object.  Examples of such
- * objects are queues, semaphores, mutexes and event groups.  Task notifications
- * are a method of sending an event directly to a task without the need for such
- * an intermediary object.
- *
- * A notification sent to a task can optionally perform an action, such as
- * update, overwrite or increment the task's notification value.  In that way
- * task notifications can be used to send data to a task, or be used as light
- * weight and fast binary or counting semaphores.
- *
- * vTaskNotifyGiveFromISR() is intended for use when task notifications are
- * used as light weight and faster binary or counting semaphore equivalents.
- * Actual FreeRTOS semaphores are given from an ISR using the
- * xSemaphoreGiveFromISR() API function, the equivalent action that instead uses
- * a task notification is vTaskNotifyGiveFromISR().
- *
- * When task notifications are being used as a binary or counting semaphore
- * equivalent then the task being notified should wait for the notification
- * using the ulTaskNotificationTake() API function rather than the
- * xTaskNotifyWait() API function.
- *
- * See http://www.FreeRTOS.org/RTOS-task-notifications.html for more details.
- *
- * @param xTaskToNotify The handle of the task being notified.  The handle to a
- * task can be returned from the xTaskCreate() API function used to create the
- * task, and the handle of the currently running task can be obtained by calling
- * xTaskGetCurrentTaskHandle().
- *
- * @param pxHigherPriorityTaskWoken  vTaskNotifyGiveFromISR() will set
- * *pxHigherPriorityTaskWoken to pdTRUE if sending the notification caused the
- * task to which the notification was sent to leave the Blocked state, and the
- * unblocked task has a priority higher than the currently running task.  If
- * vTaskNotifyGiveFromISR() sets this value to pdTRUE then a context switch
- * should be requested before the interrupt is exited.  How a context switch is
- * requested from an ISR is dependent on the port - see the documentation page
- * for the port in use.
- *
- * \defgroup xTaskNotifyWait xTaskNotifyWait
- * \ingroup TaskNotifications
- */
-void vTaskNotifyGiveFromISR( TaskHandle_t xTaskToNotify, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
uint32_t ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait );

- *
- * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this
- * function to be available.
- *
- * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private
- * "notification value", which is a 32-bit unsigned integer (uint32_t).
- *
- * Events can be sent to a task using an intermediary object.  Examples of such
- * objects are queues, semaphores, mutexes and event groups.  Task notifications
- * are a method of sending an event directly to a task without the need for such
- * an intermediary object.
- *
- * A notification sent to a task can optionally perform an action, such as
- * update, overwrite or increment the task's notification value.  In that way
- * task notifications can be used to send data to a task, or be used as light
- * weight and fast binary or counting semaphores.
- *
- * ulTaskNotifyTake() is intended for use when a task notification is used as a
- * faster and lighter weight binary or counting semaphore alternative.  Actual
- * FreeRTOS semaphores are taken using the xSemaphoreTake() API function, the
- * equivalent action that instead uses a task notification is
- * ulTaskNotifyTake().
- *
- * When a task is using its notification value as a binary or counting semaphore
- * other tasks should send notifications to it using the xTaskNotifyGive()
- * macro, or xTaskNotify() function with the eAction parameter set to
- * eIncrement.
- *
- * ulTaskNotifyTake() can either clear the task's notification value to
- * zero on exit, in which case the notification value acts like a binary
- * semaphore, or decrement the task's notification value on exit, in which case
- * the notification value acts like a counting semaphore.
- *
- * A task can use ulTaskNotifyTake() to [optionally] block to wait for a
- * the task's notification value to be non-zero.  The task does not consume any
- * CPU time while it is in the Blocked state.
- *
- * Where as xTaskNotifyWait() will return when a notification is pending,
- * ulTaskNotifyTake() will return when the task's notification value is
- * not zero.
- *
- * See http://www.FreeRTOS.org/RTOS-task-notifications.html for details.
- *
- * @param xClearCountOnExit if xClearCountOnExit is pdFALSE then the task's
- * notification value is decremented when the function exits.  In this way the
- * notification value acts like a counting semaphore.  If xClearCountOnExit is
- * not pdFALSE then the task's notification value is cleared to zero when the
- * function exits.  In this way the notification value acts like a binary
- * semaphore.
- *
- * @param xTicksToWait The maximum amount of time that the task should wait in
- * the Blocked state for the task's notification value to be greater than zero,
- * should the count not already be greater than zero when
- * ulTaskNotifyTake() was called.  The task will not consume any processing
- * time while it is in the Blocked state.  This is specified in kernel ticks,
- * the macro pdMS_TO_TICSK( value_in_ms ) can be used to convert a time
- * specified in milliseconds to a time specified in ticks.
- *
- * @return The task's notification count before it is either cleared to zero or
- * decremented (see the xClearCountOnExit parameter).
- *
- * \defgroup ulTaskNotifyTake ulTaskNotifyTake
- * \ingroup TaskNotifications
- */
-uint32_t ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask );

- *
- * If the notification state of the task referenced by the handle xTask is
- * eNotified, then set the task's notification state to eNotWaitingNotification.
- * The task's notification value is not altered.  Set xTask to NULL to clear the
- * notification state of the calling task.
- *
- * @return pdTRUE if the task's notification state was set to
- * eNotWaitingNotification, otherwise pdFALSE.
- * \defgroup xTaskNotifyStateClear xTaskNotifyStateClear
- * \ingroup TaskNotifications
- */
-BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask );
-
-/**
- * task. h
- * 
uint32_t ulTaskNotifyValueClear( TaskHandle_t xTask, uint32_t ulBitsToClear );

- *
- * Clears the bits specified by the ulBitsToClear bit mask in the notification
- * value of the task referenced by xTask.
- *
- * @param xTask The handle of the RTOS task that will have bits in its notification
- * value cleared. Set xTask to NULL to clear bits in the notification value of the
- * calling task.  To obtain a task's handle create the task using xTaskCreate() and
- * make use of the pxCreatedTask parameter, or create the task using
- * xTaskCreateStatic() and store the returned value, or use the task's name in a call
- * to xTaskGetHandle().
- *
- * @param ulBitsToClear Bit mask of the bits to clear in the notification value of
- * xTask. Set a bit to 1 to clear the corresponding bits in the task's notification
- * value. Set ulBitsToClear to 0xffffffff (UINT_MAX on 32-bit architectures) to clear
- * the notification value to 0.  Set ulBitsToClear to 0 to query the task's
- * notification value without clearing any bits.
-
- *
- * @return The value of the target task's notification value before the bits
- * specified by ulBitsToClear were cleared.
- * \defgroup ulTaskNotifyValueClear ulTaskNotifyValueClear
- * \ingroup TaskNotifications
- */
-uint32_t ulTaskNotifyValueClear( TaskHandle_t xTask, uint32_t ulBitsToClear ) PRIVILEGED_FUNCTION;
-
-/**
- * task.h
- * 
void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut )

- *
- * Capture the current time for future use with xTaskCheckForTimeOut().
- *
- * @param pxTimeOut Pointer to a timeout object into which the current time
- * is to be captured.  The captured time includes the tick count and the number
- * of times the tick count has overflowed since the system first booted.
- * \defgroup vTaskSetTimeOutState vTaskSetTimeOutState
- * \ingroup TaskCtrl
- */
-void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNCTION;
-
-/**
- * task.h
- * 
BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait );

- *
- * Determines if pxTicksToWait ticks has passed since a time was captured
- * using a call to vTaskSetTimeOutState().  The captured time includes the tick
- * count and the number of times the tick count has overflowed.
- *
- * @param pxTimeOut The time status as captured previously using
- * vTaskSetTimeOutState. If the timeout has not yet occurred, it is updated
- * to reflect the current time status.
- * @param pxTicksToWait The number of ticks to check for timeout i.e. if
- * pxTicksToWait ticks have passed since pxTimeOut was last updated (either by
- * vTaskSetTimeOutState() or xTaskCheckForTimeOut()), the timeout has occurred.
- * If the timeout has not occurred, pxTIcksToWait is updated to reflect the
- * number of remaining ticks.
- *
- * @return If timeout has occurred, pdTRUE is returned. Otherwise pdFALSE is
- * returned and pxTicksToWait is updated to reflect the number of remaining
- * ticks.
- *
- * @see https://www.freertos.org/xTaskCheckForTimeOut.html
- *
- * Example Usage:
- * 
-	// Driver library function used to receive uxWantedBytes from an Rx buffer
-	// that is filled by a UART interrupt. If there are not enough bytes in the
-	// Rx buffer then the task enters the Blocked state until it is notified that
-	// more data has been placed into the buffer. If there is still not enough
-	// data then the task re-enters the Blocked state, and xTaskCheckForTimeOut()
-	// is used to re-calculate the Block time to ensure the total amount of time
-	// spent in the Blocked state does not exceed MAX_TIME_TO_WAIT. This
-	// continues until either the buffer contains at least uxWantedBytes bytes,
-	// or the total amount of time spent in the Blocked state reaches
-	// MAX_TIME_TO_WAIT – at which point the task reads however many bytes are
-	// available up to a maximum of uxWantedBytes.
-
-	size_t xUART_Receive( uint8_t *pucBuffer, size_t uxWantedBytes )
-	{
-	size_t uxReceived = 0;
-	TickType_t xTicksToWait = MAX_TIME_TO_WAIT;
-	TimeOut_t xTimeOut;
-
-		// Initialize xTimeOut.  This records the time at which this function
-		// was entered.
-		vTaskSetTimeOutState( &xTimeOut );
-
-		// Loop until the buffer contains the wanted number of bytes, or a
-		// timeout occurs.
-		while( UART_bytes_in_rx_buffer( pxUARTInstance ) < uxWantedBytes )
-		{
-			// The buffer didn't contain enough data so this task is going to
-			// enter the Blocked state. Adjusting xTicksToWait to account for
-			// any time that has been spent in the Blocked state within this
-			// function so far to ensure the total amount of time spent in the
-			// Blocked state does not exceed MAX_TIME_TO_WAIT.
-			if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) != pdFALSE )
-			{
-				//Timed out before the wanted number of bytes were available,
-				// exit the loop.
-				break;
-			}
-
-			// Wait for a maximum of xTicksToWait ticks to be notified that the
-			// receive interrupt has placed more data into the buffer.
-			ulTaskNotifyTake( pdTRUE, xTicksToWait );
-		}
-
-		// Attempt to read uxWantedBytes from the receive buffer into pucBuffer.
-		// The actual number of bytes read (which might be less than
-		// uxWantedBytes) is returned.
-		uxReceived = UART_read_from_receive_buffer( pxUARTInstance,
-													pucBuffer,
-													uxWantedBytes );
-
-		return uxReceived;
-	}
- 

- * \defgroup xTaskCheckForTimeOut xTaskCheckForTimeOut
- * \ingroup TaskCtrl
- */
-BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait ) PRIVILEGED_FUNCTION;
-
-/**
- * task.h
- * 
BaseType_t xTaskCatchUpTicks( TickType_t xTicksToCatchUp );

- *
- * This function corrects the tick count value after the application code has held
- * interrupts disabled for an extended period resulting in tick interrupts having
- * been missed.
- *
- * This function is similar to vTaskStepTick(), however, unlike
- * vTaskStepTick(), xTaskCatchUpTicks() may move the tick count forward past a
- * time at which a task should be removed from the blocked state.  That means
- * tasks may have to be removed from the blocked state as the tick count is
- * moved.
- *
- * @param xTicksToCatchUp The number of tick interrupts that have been missed due to
- * interrupts being disabled.  Its value is not computed automatically, so must be
- * computed by the application writer.
- *
- * @return pdTRUE if moving the tick count forward resulted in a task leaving the
- * blocked state and a context switch being performed.  Otherwise pdFALSE.
- *
- * \defgroup xTaskCatchUpTicks xTaskCatchUpTicks
- * \ingroup TaskCtrl
- */
-BaseType_t xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) PRIVILEGED_FUNCTION;
-
-
-/*-----------------------------------------------------------
- * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES
- *----------------------------------------------------------*/
-
-/*
- * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS ONLY
- * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS
- * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
- *
- * Called from the real time kernel tick (either preemptive or cooperative),
- * this increments the tick count and checks if any tasks that are blocked
- * for a finite period required removing from a blocked list and placing on
- * a ready list.  If a non-zero value is returned then a context switch is
- * required because either:
- *   + A task was removed from a blocked list because its timeout had expired,
- *     or
- *   + Time slicing is in use and there is a task of equal priority to the
- *     currently running task.
- */
-BaseType_t xTaskIncrementTick( void ) PRIVILEGED_FUNCTION;
-
-/*
- * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS AN
- * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
- *
- * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.
- *
- * Removes the calling task from the ready list and places it both
- * on the list of tasks waiting for a particular event, and the
- * list of delayed tasks.  The task will be removed from both lists
- * and replaced on the ready list should either the event occur (and
- * there be no higher priority tasks waiting on the same event) or
- * the delay period expires.
- *
- * The 'unordered' version replaces the event list item value with the
- * xItemValue value, and inserts the list item at the end of the list.
- *
- * The 'ordered' version uses the existing event list item value (which is the
- * owning tasks priority) to insert the list item into the event list is task
- * priority order.
- *
- * @param pxEventList The list containing tasks that are blocked waiting
- * for the event to occur.
- *
- * @param xItemValue The item value to use for the event list item when the
- * event list is not ordered by task priority.
- *
- * @param xTicksToWait The maximum amount of time that the task should wait
- * for the event to occur.  This is specified in kernel ticks,the constant
- * portTICK_PERIOD_MS can be used to convert kernel ticks into a real time
- * period.
- */
-void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
-void vTaskPlaceOnUnorderedEventList( List_t * pxEventList, const TickType_t xItemValue, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
-
-/*
- * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS AN
- * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
- *
- * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.
- *
- * This function performs nearly the same function as vTaskPlaceOnEventList().
- * The difference being that this function does not permit tasks to block
- * indefinitely, whereas vTaskPlaceOnEventList() does.
- *
- */
-void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely ) PRIVILEGED_FUNCTION;
-
-/*
- * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS AN
- * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
- *
- * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.
- *
- * Removes a task from both the specified event list and the list of blocked
- * tasks, and places it on a ready queue.
- *
- * xTaskRemoveFromEventList()/vTaskRemoveFromUnorderedEventList() will be called
- * if either an event occurs to unblock a task, or the block timeout period
- * expires.
- *
- * xTaskRemoveFromEventList() is used when the event list is in task priority
- * order.  It removes the list item from the head of the event list as that will
- * have the highest priority owning task of all the tasks on the event list.
- * vTaskRemoveFromUnorderedEventList() is used when the event list is not
- * ordered and the event list items hold something other than the owning tasks
- * priority.  In this case the event list item value is updated to the value
- * passed in the xItemValue parameter.
- *
- * @return pdTRUE if the task being removed has a higher priority than the task
- * making the call, otherwise pdFALSE.
- */
-BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList ) PRIVILEGED_FUNCTION;
-void vTaskRemoveFromUnorderedEventList( ListItem_t * pxEventListItem, const TickType_t xItemValue ) PRIVILEGED_FUNCTION;
-
-/*
- * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS ONLY
- * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS
- * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
- *
- * Sets the pointer to the current TCB to the TCB of the highest priority task
- * that is ready to run.
- */
-portDONT_DISCARD void vTaskSwitchContext( void ) PRIVILEGED_FUNCTION;
-
-/*
- * THESE FUNCTIONS MUST NOT BE USED FROM APPLICATION CODE.  THEY ARE USED BY
- * THE EVENT BITS MODULE.
- */
-TickType_t uxTaskResetEventItemValue( void ) PRIVILEGED_FUNCTION;
-
-/*
- * Return the handle of the calling task.
- */
-TaskHandle_t xTaskGetCurrentTaskHandle( void ) PRIVILEGED_FUNCTION;
-
-/*
- * Shortcut used by the queue implementation to prevent unnecessary call to
- * taskYIELD();
- */
-void vTaskMissedYield( void ) PRIVILEGED_FUNCTION;
-
-/*
- * Returns the scheduler state as taskSCHEDULER_RUNNING,
- * taskSCHEDULER_NOT_STARTED or taskSCHEDULER_SUSPENDED.
- */
-BaseType_t xTaskGetSchedulerState( void ) PRIVILEGED_FUNCTION;
-
-/*
- * Raises the priority of the mutex holder to that of the calling task should
- * the mutex holder have a priority less than the calling task.
- */
-BaseType_t xTaskPriorityInherit( TaskHandle_t const pxMutexHolder ) PRIVILEGED_FUNCTION;
-
-/*
- * Set the priority of a task back to its proper priority in the case that it
- * inherited a higher priority while it was holding a semaphore.
- */
-BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder ) PRIVILEGED_FUNCTION;
-
-/*
- * If a higher priority task attempting to obtain a mutex caused a lower
- * priority task to inherit the higher priority task's priority - but the higher
- * priority task then timed out without obtaining the mutex, then the lower
- * priority task will disinherit the priority again - but only down as far as
- * the highest priority task that is still waiting for the mutex (if there were
- * more than one task waiting for the mutex).
- */
-void vTaskPriorityDisinheritAfterTimeout( TaskHandle_t const pxMutexHolder, UBaseType_t uxHighestPriorityWaitingTask ) PRIVILEGED_FUNCTION;
-
-/*
- * Get the uxTCBNumber assigned to the task referenced by the xTask parameter.
- */
-UBaseType_t uxTaskGetTaskNumber( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
-
-/*
- * Set the uxTaskNumber of the task referenced by the xTask parameter to
- * uxHandle.
- */
-void vTaskSetTaskNumber( TaskHandle_t xTask, const UBaseType_t uxHandle ) PRIVILEGED_FUNCTION;
-
-/*
- * Only available when configUSE_TICKLESS_IDLE is set to 1.
- * If tickless mode is being used, or a low power mode is implemented, then
- * the tick interrupt will not execute during idle periods.  When this is the
- * case, the tick count value maintained by the scheduler needs to be kept up
- * to date with the actual execution time by being skipped forward by a time
- * equal to the idle period.
- */
-void vTaskStepTick( const TickType_t xTicksToJump ) PRIVILEGED_FUNCTION;
-
-/*
- * Only available when configUSE_TICKLESS_IDLE is set to 1.
- * Provided for use within portSUPPRESS_TICKS_AND_SLEEP() to allow the port
- * specific sleep function to determine if it is ok to proceed with the sleep,
- * and if it is ok to proceed, if it is ok to sleep indefinitely.
- *
- * This function is necessary because portSUPPRESS_TICKS_AND_SLEEP() is only
- * called with the scheduler suspended, not from within a critical section.  It
- * is therefore possible for an interrupt to request a context switch between
- * portSUPPRESS_TICKS_AND_SLEEP() and the low power mode actually being
- * entered.  eTaskConfirmSleepModeStatus() should be called from a short
- * critical section between the timer being stopped and the sleep mode being
- * entered to ensure it is ok to proceed into the sleep mode.
- */
-eSleepModeStatus eTaskConfirmSleepModeStatus( void ) PRIVILEGED_FUNCTION;
-
-/*
- * For internal use only.  Increment the mutex held count when a mutex is
- * taken and return the handle of the task that has taken the mutex.
- */
-TaskHandle_t pvTaskIncrementMutexHeldCount( void ) PRIVILEGED_FUNCTION;
-
-/*
- * For internal use only.  Same as vTaskSetTimeOutState(), but without a critial
- * section.
- */
-void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNCTION;
-
-
-#ifdef __cplusplus
-}
-#endif
-#endif /* INC_TASK_H */
-
-
-
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+
+#ifndef INC_TASK_H
+#define INC_TASK_H
+
+#ifndef INC_FREERTOS_H
+    #error "include FreeRTOS.h must appear in source files before include task.h"
+#endif
+
+#include "list.h"
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/*-----------------------------------------------------------
+* MACROS AND DEFINITIONS
+*----------------------------------------------------------*/
+
+#define tskKERNEL_VERSION_NUMBER       "V10.4.1"
+#define tskKERNEL_VERSION_MAJOR        10
+#define tskKERNEL_VERSION_MINOR        4
+#define tskKERNEL_VERSION_BUILD        1
+
+/* MPU region parameters passed in ulParameters
+ * of MemoryRegion_t struct. */
+#define tskMPU_REGION_READ_ONLY        ( 1UL << 0UL )
+#define tskMPU_REGION_READ_WRITE       ( 1UL << 1UL )
+#define tskMPU_REGION_EXECUTE_NEVER    ( 1UL << 2UL )
+#define tskMPU_REGION_NORMAL_MEMORY    ( 1UL << 3UL )
+#define tskMPU_REGION_DEVICE_MEMORY    ( 1UL << 4UL )
+
+/* The direct to task notification feature used to have only a single notification
+ * per task.  Now there is an array of notifications per task that is dimensioned by
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES.  For backward compatibility, any use of the
+ * original direct to task notification defaults to using the first index in the
+ * array. */
+#define tskDEFAULT_INDEX_TO_NOTIFY     ( 0 )
+
+/**
+ * task. h
+ *
+ * Type by which tasks are referenced.  For example, a call to xTaskCreate
+ * returns (via a pointer parameter) an TaskHandle_t variable that can then
+ * be used as a parameter to vTaskDelete to delete the task.
+ *
+ * \defgroup TaskHandle_t TaskHandle_t
+ * \ingroup Tasks
+ */
+struct tskTaskControlBlock;     /* The old naming convention is used to prevent breaking kernel aware debuggers. */
+typedef struct tskTaskControlBlock * TaskHandle_t;
+
+/*
+ * Defines the prototype to which the application task hook function must
+ * conform.
+ */
+typedef BaseType_t (* TaskHookFunction_t)( void * );
+
+/* Task states returned by eTaskGetState. */
+typedef enum
+{
+    eRunning = 0,     /* A task is querying the state of itself, so must be running. */
+    eReady,           /* The task being queried is in a read or pending ready list. */
+    eBlocked,         /* The task being queried is in the Blocked state. */
+    eSuspended,       /* The task being queried is in the Suspended state, or is in the Blocked state with an infinite time out. */
+    eDeleted,         /* The task being queried has been deleted, but its TCB has not yet been freed. */
+    eInvalid          /* Used as an 'invalid state' value. */
+} eTaskState;
+
+/* Actions that can be performed when vTaskNotify() is called. */
+typedef enum
+{
+    eNoAction = 0,                /* Notify the task without updating its notify value. */
+    eSetBits,                     /* Set bits in the task's notification value. */
+    eIncrement,                   /* Increment the task's notification value. */
+    eSetValueWithOverwrite,       /* Set the task's notification value to a specific value even if the previous value has not yet been read by the task. */
+    eSetValueWithoutOverwrite     /* Set the task's notification value if the previous value has been read by the task. */
+} eNotifyAction;
+
+/*
+ * Used internally only.
+ */
+typedef struct xTIME_OUT
+{
+    BaseType_t xOverflowCount;
+    TickType_t xTimeOnEntering;
+} TimeOut_t;
+
+/*
+ * Defines the memory ranges allocated to the task when an MPU is used.
+ */
+typedef struct xMEMORY_REGION
+{
+    void * pvBaseAddress;
+    uint32_t ulLengthInBytes;
+    uint32_t ulParameters;
+} MemoryRegion_t;
+
+/*
+ * Parameters required to create an MPU protected task.
+ */
+typedef struct xTASK_PARAMETERS
+{
+    TaskFunction_t pvTaskCode;
+    const char * const pcName;     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+    configSTACK_DEPTH_TYPE usStackDepth;
+    void * pvParameters;
+    UBaseType_t uxPriority;
+    StackType_t * puxStackBuffer;
+    MemoryRegion_t xRegions[ portNUM_CONFIGURABLE_REGIONS ];
+    #if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
+        StaticTask_t * const pxTaskBuffer;
+    #endif
+} TaskParameters_t;
+
+/* Used with the uxTaskGetSystemState() function to return the state of each task
+ * in the system. */
+typedef struct xTASK_STATUS
+{
+    TaskHandle_t xHandle;                            /* The handle of the task to which the rest of the information in the structure relates. */
+    const char * pcTaskName;                         /* A pointer to the task's name.  This value will be invalid if the task was deleted since the structure was populated! */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+    UBaseType_t xTaskNumber;                         /* A number unique to the task. */
+    eTaskState eCurrentState;                        /* The state in which the task existed when the structure was populated. */
+    UBaseType_t uxCurrentPriority;                   /* The priority at which the task was running (may be inherited) when the structure was populated. */
+    UBaseType_t uxBasePriority;                      /* The priority to which the task will return if the task's current priority has been inherited to avoid unbounded priority inversion when obtaining a mutex.  Only valid if configUSE_MUTEXES is defined as 1 in FreeRTOSConfig.h. */
+    uint32_t ulRunTimeCounter;                       /* The total run time allocated to the task so far, as defined by the run time stats clock.  See https://www.FreeRTOS.org/rtos-run-time-stats.html.  Only valid when configGENERATE_RUN_TIME_STATS is defined as 1 in FreeRTOSConfig.h. */
+    StackType_t * pxStackBase;                       /* Points to the lowest address of the task's stack area. */
+    configSTACK_DEPTH_TYPE usStackHighWaterMark;     /* The minimum amount of stack space that has remained for the task since the task was created.  The closer this value is to zero the closer the task has come to overflowing its stack. */
+} TaskStatus_t;
+
+/* Possible return values for eTaskConfirmSleepModeStatus(). */
+typedef enum
+{
+    eAbortSleep = 0,           /* A task has been made ready or a context switch pended since portSUPPORESS_TICKS_AND_SLEEP() was called - abort entering a sleep mode. */
+    eStandardSleep,            /* Enter a sleep mode that will not last any longer than the expected idle time. */
+    eNoTasksWaitingTimeout     /* No tasks are waiting for a timeout so it is safe to enter a sleep mode that can only be exited by an external interrupt. */
+} eSleepModeStatus;
+
+/**
+ * Defines the priority used by the idle task.  This must not be modified.
+ *
+ * \ingroup TaskUtils
+ */
+#define tskIDLE_PRIORITY    ( ( UBaseType_t ) 0U )
+
+/**
+ * task. h
+ *
+ * Macro for forcing a context switch.
+ *
+ * \defgroup taskYIELD taskYIELD
+ * \ingroup SchedulerControl
+ */
+#define taskYIELD()                        portYIELD()
+
+/**
+ * task. h
+ *
+ * Macro to mark the start of a critical code region.  Preemptive context
+ * switches cannot occur when in a critical region.
+ *
+ * NOTE: This may alter the stack (depending on the portable implementation)
+ * so must be used with care!
+ *
+ * \defgroup taskENTER_CRITICAL taskENTER_CRITICAL
+ * \ingroup SchedulerControl
+ */
+#define taskENTER_CRITICAL()               portENTER_CRITICAL()
+#define taskENTER_CRITICAL_FROM_ISR()      portSET_INTERRUPT_MASK_FROM_ISR()
+
+/**
+ * task. h
+ *
+ * Macro to mark the end of a critical code region.  Preemptive context
+ * switches cannot occur when in a critical region.
+ *
+ * NOTE: This may alter the stack (depending on the portable implementation)
+ * so must be used with care!
+ *
+ * \defgroup taskEXIT_CRITICAL taskEXIT_CRITICAL
+ * \ingroup SchedulerControl
+ */
+#define taskEXIT_CRITICAL()                portEXIT_CRITICAL()
+#define taskEXIT_CRITICAL_FROM_ISR( x )    portCLEAR_INTERRUPT_MASK_FROM_ISR( x )
+
+/**
+ * task. h
+ *
+ * Macro to disable all maskable interrupts.
+ *
+ * \defgroup taskDISABLE_INTERRUPTS taskDISABLE_INTERRUPTS
+ * \ingroup SchedulerControl
+ */
+#define taskDISABLE_INTERRUPTS()           portDISABLE_INTERRUPTS()
+
+/**
+ * task. h
+ *
+ * Macro to enable microcontroller interrupts.
+ *
+ * \defgroup taskENABLE_INTERRUPTS taskENABLE_INTERRUPTS
+ * \ingroup SchedulerControl
+ */
+#define taskENABLE_INTERRUPTS()            portENABLE_INTERRUPTS()
+
+/* Definitions returned by xTaskGetSchedulerState().  taskSCHEDULER_SUSPENDED is
+ * 0 to generate more optimal code when configASSERT() is defined as the constant
+ * is used in assert() statements. */
+#define taskSCHEDULER_SUSPENDED      ( ( BaseType_t ) 0 )
+#define taskSCHEDULER_NOT_STARTED    ( ( BaseType_t ) 1 )
+#define taskSCHEDULER_RUNNING        ( ( BaseType_t ) 2 )
+
+
+/*-----------------------------------------------------------
+* TASK CREATION API
+*----------------------------------------------------------*/
+
+/**
+ * task. h
+ * 
+ * BaseType_t xTaskCreate(
+ *                            TaskFunction_t pvTaskCode,
+ *                            const char * const pcName,
+ *                            configSTACK_DEPTH_TYPE usStackDepth,
+ *                            void *pvParameters,
+ *                            UBaseType_t uxPriority,
+ *                            TaskHandle_t *pvCreatedTask
+ *                        );
+ * 

+ *
+ * Create a new task and add it to the list of tasks that are ready to run.
+ *
+ * Internally, within the FreeRTOS implementation, tasks use two blocks of
+ * memory.  The first block is used to hold the task's data structures.  The
+ * second block is used by the task as its stack.  If a task is created using
+ * xTaskCreate() then both blocks of memory are automatically dynamically
+ * allocated inside the xTaskCreate() function.  (see
+ * https://www.FreeRTOS.org/a00111.html).  If a task is created using
+ * xTaskCreateStatic() then the application writer must provide the required
+ * memory.  xTaskCreateStatic() therefore allows a task to be created without
+ * using any dynamic memory allocation.
+ *
+ * See xTaskCreateStatic() for a version that does not use any dynamic memory
+ * allocation.
+ *
+ * xTaskCreate() can only be used to create a task that has unrestricted
+ * access to the entire microcontroller memory map.  Systems that include MPU
+ * support can alternatively create an MPU constrained task using
+ * xTaskCreateRestricted().
+ *
+ * @param pvTaskCode Pointer to the task entry function.  Tasks
+ * must be implemented to never return (i.e. continuous loop).
+ *
+ * @param pcName A descriptive name for the task.  This is mainly used to
+ * facilitate debugging.  Max length defined by configMAX_TASK_NAME_LEN - default
+ * is 16.
+ *
+ * @param usStackDepth The size of the task stack specified as the number of
+ * variables the stack can hold - not the number of bytes.  For example, if
+ * the stack is 16 bits wide and usStackDepth is defined as 100, 200 bytes
+ * will be allocated for stack storage.
+ *
+ * @param pvParameters Pointer that will be used as the parameter for the task
+ * being created.
+ *
+ * @param uxPriority The priority at which the task should run.  Systems that
+ * include MPU support can optionally create tasks in a privileged (system)
+ * mode by setting bit portPRIVILEGE_BIT of the priority parameter.  For
+ * example, to create a privileged task at priority 2 the uxPriority parameter
+ * should be set to ( 2 | portPRIVILEGE_BIT ).
+ *
+ * @param pvCreatedTask Used to pass back a handle by which the created task
+ * can be referenced.
+ *
+ * @return pdPASS if the task was successfully created and added to a ready
+ * list, otherwise an error code defined in the file projdefs.h
+ *
+ * Example usage:
+ * 
+ * // Task to be created.
+ * void vTaskCode( void * pvParameters )
+ * {
+ *   for( ;; )
+ *   {
+ *       // Task code goes here.
+ *   }
+ * }
+ *
+ * // Function that creates a task.
+ * void vOtherFunction( void )
+ * {
+ * static uint8_t ucParameterToPass;
+ * TaskHandle_t xHandle = NULL;
+ *
+ *   // Create the task, storing the handle.  Note that the passed parameter ucParameterToPass
+ *   // must exist for the lifetime of the task, so in this case is declared static.  If it was just an
+ *   // an automatic stack variable it might no longer exist, or at least have been corrupted, by the time
+ *   // the new task attempts to access it.
+ *   xTaskCreate( vTaskCode, "NAME", STACK_SIZE, &ucParameterToPass, tskIDLE_PRIORITY, &xHandle );
+ *   configASSERT( xHandle );
+ *
+ *   // Use the handle to delete the task.
+ *   if( xHandle != NULL )
+ *   {
+ *      vTaskDelete( xHandle );
+ *   }
+ * }
+ * 

+ * \defgroup xTaskCreate xTaskCreate
+ * \ingroup Tasks
+ */
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+    BaseType_t xTaskCreate( TaskFunction_t pxTaskCode,
+                            const char * const pcName,     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+                            const configSTACK_DEPTH_TYPE usStackDepth,
+                            void * const pvParameters,
+                            UBaseType_t uxPriority,
+                            TaskHandle_t * const pxCreatedTask ) PRIVILEGED_FUNCTION;
+#endif
+
+/**
+ * task. h
+ * 
+ * TaskHandle_t xTaskCreateStatic( TaskFunction_t pvTaskCode,
+ *                               const char * const pcName,
+ *                               uint32_t ulStackDepth,
+ *                               void *pvParameters,
+ *                               UBaseType_t uxPriority,
+ *                               StackType_t *pxStackBuffer,
+ *                               StaticTask_t *pxTaskBuffer );
+ * 

+ *
+ * Create a new task and add it to the list of tasks that are ready to run.
+ *
+ * Internally, within the FreeRTOS implementation, tasks use two blocks of
+ * memory.  The first block is used to hold the task's data structures.  The
+ * second block is used by the task as its stack.  If a task is created using
+ * xTaskCreate() then both blocks of memory are automatically dynamically
+ * allocated inside the xTaskCreate() function.  (see
+ * https://www.FreeRTOS.org/a00111.html).  If a task is created using
+ * xTaskCreateStatic() then the application writer must provide the required
+ * memory.  xTaskCreateStatic() therefore allows a task to be created without
+ * using any dynamic memory allocation.
+ *
+ * @param pvTaskCode Pointer to the task entry function.  Tasks
+ * must be implemented to never return (i.e. continuous loop).
+ *
+ * @param pcName A descriptive name for the task.  This is mainly used to
+ * facilitate debugging.  The maximum length of the string is defined by
+ * configMAX_TASK_NAME_LEN in FreeRTOSConfig.h.
+ *
+ * @param ulStackDepth The size of the task stack specified as the number of
+ * variables the stack can hold - not the number of bytes.  For example, if
+ * the stack is 32-bits wide and ulStackDepth is defined as 100 then 400 bytes
+ * will be allocated for stack storage.
+ *
+ * @param pvParameters Pointer that will be used as the parameter for the task
+ * being created.
+ *
+ * @param uxPriority The priority at which the task will run.
+ *
+ * @param pxStackBuffer Must point to a StackType_t array that has at least
+ * ulStackDepth indexes - the array will then be used as the task's stack,
+ * removing the need for the stack to be allocated dynamically.
+ *
+ * @param pxTaskBuffer Must point to a variable of type StaticTask_t, which will
+ * then be used to hold the task's data structures, removing the need for the
+ * memory to be allocated dynamically.
+ *
+ * @return If neither pxStackBuffer or pxTaskBuffer are NULL, then the task will
+ * be created and a handle to the created task is returned.  If either
+ * pxStackBuffer or pxTaskBuffer are NULL then the task will not be created and
+ * NULL is returned.
+ *
+ * Example usage:
+ * 
+ *
+ *  // Dimensions the buffer that the task being created will use as its stack.
+ *  // NOTE:  This is the number of words the stack will hold, not the number of
+ *  // bytes.  For example, if each stack item is 32-bits, and this is set to 100,
+ *  // then 400 bytes (100 * 32-bits) will be allocated.
+ #define STACK_SIZE 200
+ *
+ *  // Structure that will hold the TCB of the task being created.
+ *  StaticTask_t xTaskBuffer;
+ *
+ *  // Buffer that the task being created will use as its stack.  Note this is
+ *  // an array of StackType_t variables.  The size of StackType_t is dependent on
+ *  // the RTOS port.
+ *  StackType_t xStack[ STACK_SIZE ];
+ *
+ *  // Function that implements the task being created.
+ *  void vTaskCode( void * pvParameters )
+ *  {
+ *      // The parameter value is expected to be 1 as 1 is passed in the
+ *      // pvParameters value in the call to xTaskCreateStatic().
+ *      configASSERT( ( uint32_t ) pvParameters == 1UL );
+ *
+ *      for( ;; )
+ *      {
+ *          // Task code goes here.
+ *      }
+ *  }
+ *
+ *  // Function that creates a task.
+ *  void vOtherFunction( void )
+ *  {
+ *      TaskHandle_t xHandle = NULL;
+ *
+ *      // Create the task without using any dynamic memory allocation.
+ *      xHandle = xTaskCreateStatic(
+ *                    vTaskCode,       // Function that implements the task.
+ *                    "NAME",          // Text name for the task.
+ *                    STACK_SIZE,      // Stack size in words, not bytes.
+ *                    ( void * ) 1,    // Parameter passed into the task.
+ *                    tskIDLE_PRIORITY,// Priority at which the task is created.
+ *                    xStack,          // Array to use as the task's stack.
+ *                    &xTaskBuffer );  // Variable to hold the task's data structure.
+ *
+ *      // puxStackBuffer and pxTaskBuffer were not NULL, so the task will have
+ *      // been created, and xHandle will be the task's handle.  Use the handle
+ *      // to suspend the task.
+ *      vTaskSuspend( xHandle );
+ *  }
+ * 

+ * \defgroup xTaskCreateStatic xTaskCreateStatic
+ * \ingroup Tasks
+ */
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+    TaskHandle_t xTaskCreateStatic( TaskFunction_t pxTaskCode,
+                                    const char * const pcName,     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+                                    const uint32_t ulStackDepth,
+                                    void * const pvParameters,
+                                    UBaseType_t uxPriority,
+                                    StackType_t * const puxStackBuffer,
+                                    StaticTask_t * const pxTaskBuffer ) PRIVILEGED_FUNCTION;
+#endif /* configSUPPORT_STATIC_ALLOCATION */
+
+/**
+ * task. h
+ * 
+ * BaseType_t xTaskCreateRestricted( TaskParameters_t *pxTaskDefinition, TaskHandle_t *pxCreatedTask );
+ * 

+ *
+ * Only available when configSUPPORT_DYNAMIC_ALLOCATION is set to 1.
+ *
+ * xTaskCreateRestricted() should only be used in systems that include an MPU
+ * implementation.
+ *
+ * Create a new task and add it to the list of tasks that are ready to run.
+ * The function parameters define the memory regions and associated access
+ * permissions allocated to the task.
+ *
+ * See xTaskCreateRestrictedStatic() for a version that does not use any
+ * dynamic memory allocation.
+ *
+ * @param pxTaskDefinition Pointer to a structure that contains a member
+ * for each of the normal xTaskCreate() parameters (see the xTaskCreate() API
+ * documentation) plus an optional stack buffer and the memory region
+ * definitions.
+ *
+ * @param pxCreatedTask Used to pass back a handle by which the created task
+ * can be referenced.
+ *
+ * @return pdPASS if the task was successfully created and added to a ready
+ * list, otherwise an error code defined in the file projdefs.h
+ *
+ * Example usage:
+ * 
+ * // Create an TaskParameters_t structure that defines the task to be created.
+ * static const TaskParameters_t xCheckTaskParameters =
+ * {
+ *  vATask,     // pvTaskCode - the function that implements the task.
+ *  "ATask",    // pcName - just a text name for the task to assist debugging.
+ *  100,        // usStackDepth - the stack size DEFINED IN WORDS.
+ *  NULL,       // pvParameters - passed into the task function as the function parameters.
+ *  ( 1UL | portPRIVILEGE_BIT ),// uxPriority - task priority, set the portPRIVILEGE_BIT if the task should run in a privileged state.
+ *  cStackBuffer,// puxStackBuffer - the buffer to be used as the task stack.
+ *
+ *  // xRegions - Allocate up to three separate memory regions for access by
+ *  // the task, with appropriate access permissions.  Different processors have
+ *  // different memory alignment requirements - refer to the FreeRTOS documentation
+ *  // for full information.
+ *  {
+ *      // Base address                 Length  Parameters
+ *      { cReadWriteArray,              32,     portMPU_REGION_READ_WRITE },
+ *      { cReadOnlyArray,               32,     portMPU_REGION_READ_ONLY },
+ *      { cPrivilegedOnlyAccessArray,   128,    portMPU_REGION_PRIVILEGED_READ_WRITE }
+ *  }
+ * };
+ *
+ * int main( void )
+ * {
+ * TaskHandle_t xHandle;
+ *
+ *  // Create a task from the const structure defined above.  The task handle
+ *  // is requested (the second parameter is not NULL) but in this case just for
+ *  // demonstration purposes as its not actually used.
+ *  xTaskCreateRestricted( &xRegTest1Parameters, &xHandle );
+ *
+ *  // Start the scheduler.
+ *  vTaskStartScheduler();
+ *
+ *  // Will only get here if there was insufficient memory to create the idle
+ *  // and/or timer task.
+ *  for( ;; );
+ * }
+ * 

+ * \defgroup xTaskCreateRestricted xTaskCreateRestricted
+ * \ingroup Tasks
+ */
+#if ( portUSING_MPU_WRAPPERS == 1 )
+    BaseType_t xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition,
+                                      TaskHandle_t * pxCreatedTask ) PRIVILEGED_FUNCTION;
+#endif
+
+/**
+ * task. h
+ * 
+ * BaseType_t xTaskCreateRestrictedStatic( TaskParameters_t *pxTaskDefinition, TaskHandle_t *pxCreatedTask );
+ * 

+ *
+ * Only available when configSUPPORT_STATIC_ALLOCATION is set to 1.
+ *
+ * xTaskCreateRestrictedStatic() should only be used in systems that include an
+ * MPU implementation.
+ *
+ * Internally, within the FreeRTOS implementation, tasks use two blocks of
+ * memory.  The first block is used to hold the task's data structures.  The
+ * second block is used by the task as its stack.  If a task is created using
+ * xTaskCreateRestricted() then the stack is provided by the application writer,
+ * and the memory used to hold the task's data structure is automatically
+ * dynamically allocated inside the xTaskCreateRestricted() function.  If a task
+ * is created using xTaskCreateRestrictedStatic() then the application writer
+ * must provide the memory used to hold the task's data structures too.
+ * xTaskCreateRestrictedStatic() therefore allows a memory protected task to be
+ * created without using any dynamic memory allocation.
+ *
+ * @param pxTaskDefinition Pointer to a structure that contains a member
+ * for each of the normal xTaskCreate() parameters (see the xTaskCreate() API
+ * documentation) plus an optional stack buffer and the memory region
+ * definitions.  If configSUPPORT_STATIC_ALLOCATION is set to 1 the structure
+ * contains an additional member, which is used to point to a variable of type
+ * StaticTask_t - which is then used to hold the task's data structure.
+ *
+ * @param pxCreatedTask Used to pass back a handle by which the created task
+ * can be referenced.
+ *
+ * @return pdPASS if the task was successfully created and added to a ready
+ * list, otherwise an error code defined in the file projdefs.h
+ *
+ * Example usage:
+ * 
+ * // Create an TaskParameters_t structure that defines the task to be created.
+ * // The StaticTask_t variable is only included in the structure when
+ * // configSUPPORT_STATIC_ALLOCATION is set to 1.  The PRIVILEGED_DATA macro can
+ * // be used to force the variable into the RTOS kernel's privileged data area.
+ * static PRIVILEGED_DATA StaticTask_t xTaskBuffer;
+ * static const TaskParameters_t xCheckTaskParameters =
+ * {
+ *  vATask,     // pvTaskCode - the function that implements the task.
+ *  "ATask",    // pcName - just a text name for the task to assist debugging.
+ *  100,        // usStackDepth - the stack size DEFINED IN WORDS.
+ *  NULL,       // pvParameters - passed into the task function as the function parameters.
+ *  ( 1UL | portPRIVILEGE_BIT ),// uxPriority - task priority, set the portPRIVILEGE_BIT if the task should run in a privileged state.
+ *  cStackBuffer,// puxStackBuffer - the buffer to be used as the task stack.
+ *
+ *  // xRegions - Allocate up to three separate memory regions for access by
+ *  // the task, with appropriate access permissions.  Different processors have
+ *  // different memory alignment requirements - refer to the FreeRTOS documentation
+ *  // for full information.
+ *  {
+ *      // Base address                 Length  Parameters
+ *      { cReadWriteArray,              32,     portMPU_REGION_READ_WRITE },
+ *      { cReadOnlyArray,               32,     portMPU_REGION_READ_ONLY },
+ *      { cPrivilegedOnlyAccessArray,   128,    portMPU_REGION_PRIVILEGED_READ_WRITE }
+ *  }
+ *
+ *  &xTaskBuffer; // Holds the task's data structure.
+ * };
+ *
+ * int main( void )
+ * {
+ * TaskHandle_t xHandle;
+ *
+ *  // Create a task from the const structure defined above.  The task handle
+ *  // is requested (the second parameter is not NULL) but in this case just for
+ *  // demonstration purposes as its not actually used.
+ *  xTaskCreateRestricted( &xRegTest1Parameters, &xHandle );
+ *
+ *  // Start the scheduler.
+ *  vTaskStartScheduler();
+ *
+ *  // Will only get here if there was insufficient memory to create the idle
+ *  // and/or timer task.
+ *  for( ;; );
+ * }
+ * 

+ * \defgroup xTaskCreateRestrictedStatic xTaskCreateRestrictedStatic
+ * \ingroup Tasks
+ */
+#if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
+    BaseType_t xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition,
+                                            TaskHandle_t * pxCreatedTask ) PRIVILEGED_FUNCTION;
+#endif
+
+/**
+ * task. h
+ * 
+ * void vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions );
+ * 

+ *
+ * Memory regions are assigned to a restricted task when the task is created by
+ * a call to xTaskCreateRestricted().  These regions can be redefined using
+ * vTaskAllocateMPURegions().
+ *
+ * @param xTask The handle of the task being updated.
+ *
+ * @param xRegions A pointer to an MemoryRegion_t structure that contains the
+ * new memory region definitions.
+ *
+ * Example usage:
+ * 
+ * // Define an array of MemoryRegion_t structures that configures an MPU region
+ * // allowing read/write access for 1024 bytes starting at the beginning of the
+ * // ucOneKByte array.  The other two of the maximum 3 definable regions are
+ * // unused so set to zero.
+ * static const MemoryRegion_t xAltRegions[ portNUM_CONFIGURABLE_REGIONS ] =
+ * {
+ *  // Base address     Length      Parameters
+ *  { ucOneKByte,       1024,       portMPU_REGION_READ_WRITE },
+ *  { 0,                0,          0 },
+ *  { 0,                0,          0 }
+ * };
+ *
+ * void vATask( void *pvParameters )
+ * {
+ *  // This task was created such that it has access to certain regions of
+ *  // memory as defined by the MPU configuration.  At some point it is
+ *  // desired that these MPU regions are replaced with that defined in the
+ *  // xAltRegions const struct above.  Use a call to vTaskAllocateMPURegions()
+ *  // for this purpose.  NULL is used as the task handle to indicate that this
+ *  // function should modify the MPU regions of the calling task.
+ *  vTaskAllocateMPURegions( NULL, xAltRegions );
+ *
+ *  // Now the task can continue its function, but from this point on can only
+ *  // access its stack and the ucOneKByte array (unless any other statically
+ *  // defined or shared regions have been declared elsewhere).
+ * }
+ * 

+ * \defgroup xTaskCreateRestricted xTaskCreateRestricted
+ * \ingroup Tasks
+ */
+void vTaskAllocateMPURegions( TaskHandle_t xTask,
+                              const MemoryRegion_t * const pxRegions ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
+ * void vTaskDelete( TaskHandle_t xTask );
+ * 

+ *
+ * INCLUDE_vTaskDelete must be defined as 1 for this function to be available.
+ * See the configuration section for more information.
+ *
+ * Remove a task from the RTOS real time kernel's management.  The task being
+ * deleted will be removed from all ready, blocked, suspended and event lists.
+ *
+ * NOTE:  The idle task is responsible for freeing the kernel allocated
+ * memory from tasks that have been deleted.  It is therefore important that
+ * the idle task is not starved of microcontroller processing time if your
+ * application makes any calls to vTaskDelete ().  Memory allocated by the
+ * task code is not automatically freed, and should be freed before the task
+ * is deleted.
+ *
+ * See the demo application file death.c for sample code that utilises
+ * vTaskDelete ().
+ *
+ * @param xTask The handle of the task to be deleted.  Passing NULL will
+ * cause the calling task to be deleted.
+ *
+ * Example usage:
+ * 
+ * void vOtherFunction( void )
+ * {
+ * TaskHandle_t xHandle;
+ *
+ *   // Create the task, storing the handle.
+ *   xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
+ *
+ *   // Use the handle to delete the task.
+ *   vTaskDelete( xHandle );
+ * }
+ * 

+ * \defgroup vTaskDelete vTaskDelete
+ * \ingroup Tasks
+ */
+void vTaskDelete( TaskHandle_t xTaskToDelete ) PRIVILEGED_FUNCTION;
+
+/*-----------------------------------------------------------
+* TASK CONTROL API
+*----------------------------------------------------------*/
+
+/**
+ * task. h
+ * 
+ * void vTaskDelay( const TickType_t xTicksToDelay );
+ * 

+ *
+ * Delay a task for a given number of ticks.  The actual time that the
+ * task remains blocked depends on the tick rate.  The constant
+ * portTICK_PERIOD_MS can be used to calculate real time from the tick
+ * rate - with the resolution of one tick period.
+ *
+ * INCLUDE_vTaskDelay must be defined as 1 for this function to be available.
+ * See the configuration section for more information.
+ *
+ *
+ * vTaskDelay() specifies a time at which the task wishes to unblock relative to
+ * the time at which vTaskDelay() is called.  For example, specifying a block
+ * period of 100 ticks will cause the task to unblock 100 ticks after
+ * vTaskDelay() is called.  vTaskDelay() does not therefore provide a good method
+ * of controlling the frequency of a periodic task as the path taken through the
+ * code, as well as other task and interrupt activity, will effect the frequency
+ * at which vTaskDelay() gets called and therefore the time at which the task
+ * next executes.  See vTaskDelayUntil() for an alternative API function designed
+ * to facilitate fixed frequency execution.  It does this by specifying an
+ * absolute time (rather than a relative time) at which the calling task should
+ * unblock.
+ *
+ * @param xTicksToDelay The amount of time, in tick periods, that
+ * the calling task should block.
+ *
+ * Example usage:
+ *
+ * void vTaskFunction( void * pvParameters )
+ * {
+ * // Block for 500ms.
+ * const TickType_t xDelay = 500 / portTICK_PERIOD_MS;
+ *
+ *   for( ;; )
+ *   {
+ *       // Simply toggle the LED every 500ms, blocking between each toggle.
+ *       vToggleLED();
+ *       vTaskDelay( xDelay );
+ *   }
+ * }
+ *
+ * \defgroup vTaskDelay vTaskDelay
+ * \ingroup TaskCtrl
+ */
+void vTaskDelay( const TickType_t xTicksToDelay ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
+ * void vTaskDelayUntil( TickType_t *pxPreviousWakeTime, const TickType_t xTimeIncrement );
+ * 

+ *
+ * INCLUDE_vTaskDelayUntil must be defined as 1 for this function to be available.
+ * See the configuration section for more information.
+ *
+ * Delay a task until a specified time.  This function can be used by periodic
+ * tasks to ensure a constant execution frequency.
+ *
+ * This function differs from vTaskDelay () in one important aspect:  vTaskDelay () will
+ * cause a task to block for the specified number of ticks from the time vTaskDelay () is
+ * called.  It is therefore difficult to use vTaskDelay () by itself to generate a fixed
+ * execution frequency as the time between a task starting to execute and that task
+ * calling vTaskDelay () may not be fixed [the task may take a different path though the
+ * code between calls, or may get interrupted or preempted a different number of times
+ * each time it executes].
+ *
+ * Whereas vTaskDelay () specifies a wake time relative to the time at which the function
+ * is called, vTaskDelayUntil () specifies the absolute (exact) time at which it wishes to
+ * unblock.
+ *
+ * The constant portTICK_PERIOD_MS can be used to calculate real time from the tick
+ * rate - with the resolution of one tick period.
+ *
+ * @param pxPreviousWakeTime Pointer to a variable that holds the time at which the
+ * task was last unblocked.  The variable must be initialised with the current time
+ * prior to its first use (see the example below).  Following this the variable is
+ * automatically updated within vTaskDelayUntil ().
+ *
+ * @param xTimeIncrement The cycle time period.  The task will be unblocked at
+ * time *pxPreviousWakeTime + xTimeIncrement.  Calling vTaskDelayUntil with the
+ * same xTimeIncrement parameter value will cause the task to execute with
+ * a fixed interface period.
+ *
+ * Example usage:
+ * 
+ * // Perform an action every 10 ticks.
+ * void vTaskFunction( void * pvParameters )
+ * {
+ * TickType_t xLastWakeTime;
+ * const TickType_t xFrequency = 10;
+ *
+ *   // Initialise the xLastWakeTime variable with the current time.
+ *   xLastWakeTime = xTaskGetTickCount ();
+ *   for( ;; )
+ *   {
+ *       // Wait for the next cycle.
+ *       vTaskDelayUntil( &xLastWakeTime, xFrequency );
+ *
+ *       // Perform action here.
+ *   }
+ * }
+ * 

+ * \defgroup vTaskDelayUntil vTaskDelayUntil
+ * \ingroup TaskCtrl
+ */
+void vTaskDelayUntil( TickType_t * const pxPreviousWakeTime,
+                      const TickType_t xTimeIncrement ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
+ * BaseType_t xTaskAbortDelay( TaskHandle_t xTask );
+ * 

+ *
+ * INCLUDE_xTaskAbortDelay must be defined as 1 in FreeRTOSConfig.h for this
+ * function to be available.
+ *
+ * A task will enter the Blocked state when it is waiting for an event.  The
+ * event it is waiting for can be a temporal event (waiting for a time), such
+ * as when vTaskDelay() is called, or an event on an object, such as when
+ * xQueueReceive() or ulTaskNotifyTake() is called.  If the handle of a task
+ * that is in the Blocked state is used in a call to xTaskAbortDelay() then the
+ * task will leave the Blocked state, and return from whichever function call
+ * placed the task into the Blocked state.
+ *
+ * There is no 'FromISR' version of this function as an interrupt would need to
+ * know which object a task was blocked on in order to know which actions to
+ * take.  For example, if the task was blocked on a queue the interrupt handler
+ * would then need to know if the queue was locked.
+ *
+ * @param xTask The handle of the task to remove from the Blocked state.
+ *
+ * @return If the task referenced by xTask was not in the Blocked state then
+ * pdFAIL is returned.  Otherwise pdPASS is returned.
+ *
+ * \defgroup xTaskAbortDelay xTaskAbortDelay
+ * \ingroup TaskCtrl
+ */
+BaseType_t xTaskAbortDelay( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
+ * UBaseType_t uxTaskPriorityGet( const TaskHandle_t xTask );
+ * 

+ *
+ * INCLUDE_uxTaskPriorityGet must be defined as 1 for this function to be available.
+ * See the configuration section for more information.
+ *
+ * Obtain the priority of any task.
+ *
+ * @param xTask Handle of the task to be queried.  Passing a NULL
+ * handle results in the priority of the calling task being returned.
+ *
+ * @return The priority of xTask.
+ *
+ * Example usage:
+ * 
+ * void vAFunction( void )
+ * {
+ * TaskHandle_t xHandle;
+ *
+ *   // Create a task, storing the handle.
+ *   xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
+ *
+ *   // ...
+ *
+ *   // Use the handle to obtain the priority of the created task.
+ *   // It was created with tskIDLE_PRIORITY, but may have changed
+ *   // it itself.
+ *   if( uxTaskPriorityGet( xHandle ) != tskIDLE_PRIORITY )
+ *   {
+ *       // The task has changed it's priority.
+ *   }
+ *
+ *   // ...
+ *
+ *   // Is our priority higher than the created task?
+ *   if( uxTaskPriorityGet( xHandle ) < uxTaskPriorityGet( NULL ) )
+ *   {
+ *       // Our priority (obtained using NULL handle) is higher.
+ *   }
+ * }
+ * 

+ * \defgroup uxTaskPriorityGet uxTaskPriorityGet
+ * \ingroup TaskCtrl
+ */
+UBaseType_t uxTaskPriorityGet( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
+ * UBaseType_t uxTaskPriorityGetFromISR( const TaskHandle_t xTask );
+ * 

+ *
+ * A version of uxTaskPriorityGet() that can be used from an ISR.
+ */
+UBaseType_t uxTaskPriorityGetFromISR( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
+ * eTaskState eTaskGetState( TaskHandle_t xTask );
+ * 

+ *
+ * INCLUDE_eTaskGetState must be defined as 1 for this function to be available.
+ * See the configuration section for more information.
+ *
+ * Obtain the state of any task.  States are encoded by the eTaskState
+ * enumerated type.
+ *
+ * @param xTask Handle of the task to be queried.
+ *
+ * @return The state of xTask at the time the function was called.  Note the
+ * state of the task might change between the function being called, and the
+ * functions return value being tested by the calling task.
+ */
+eTaskState eTaskGetState( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
+ * void vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState );
+ * 

+ *
+ * configUSE_TRACE_FACILITY must be defined as 1 for this function to be
+ * available.  See the configuration section for more information.
+ *
+ * Populates a TaskStatus_t structure with information about a task.
+ *
+ * @param xTask Handle of the task being queried.  If xTask is NULL then
+ * information will be returned about the calling task.
+ *
+ * @param pxTaskStatus A pointer to the TaskStatus_t structure that will be
+ * filled with information about the task referenced by the handle passed using
+ * the xTask parameter.
+ *
+ * @xGetFreeStackSpace The TaskStatus_t structure contains a member to report
+ * the stack high water mark of the task being queried.  Calculating the stack
+ * high water mark takes a relatively long time, and can make the system
+ * temporarily unresponsive - so the xGetFreeStackSpace parameter is provided to
+ * allow the high water mark checking to be skipped.  The high watermark value
+ * will only be written to the TaskStatus_t structure if xGetFreeStackSpace is
+ * not set to pdFALSE;
+ *
+ * @param eState The TaskStatus_t structure contains a member to report the
+ * state of the task being queried.  Obtaining the task state is not as fast as
+ * a simple assignment - so the eState parameter is provided to allow the state
+ * information to be omitted from the TaskStatus_t structure.  To obtain state
+ * information then set eState to eInvalid - otherwise the value passed in
+ * eState will be reported as the task state in the TaskStatus_t structure.
+ *
+ * Example usage:
+ * 
+ * void vAFunction( void )
+ * {
+ * TaskHandle_t xHandle;
+ * TaskStatus_t xTaskDetails;
+ *
+ *  // Obtain the handle of a task from its name.
+ *  xHandle = xTaskGetHandle( "Task_Name" );
+ *
+ *  // Check the handle is not NULL.
+ *  configASSERT( xHandle );
+ *
+ *  // Use the handle to obtain further information about the task.
+ *  vTaskGetInfo( xHandle,
+ *                &xTaskDetails,
+ *                pdTRUE, // Include the high water mark in xTaskDetails.
+ *                eInvalid ); // Include the task state in xTaskDetails.
+ * }
+ * 

+ * \defgroup vTaskGetInfo vTaskGetInfo
+ * \ingroup TaskCtrl
+ */
+void vTaskGetInfo( TaskHandle_t xTask,
+                   TaskStatus_t * pxTaskStatus,
+                   BaseType_t xGetFreeStackSpace,
+                   eTaskState eState ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
+ * void vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority );
+ * 

+ *
+ * INCLUDE_vTaskPrioritySet must be defined as 1 for this function to be available.
+ * See the configuration section for more information.
+ *
+ * Set the priority of any task.
+ *
+ * A context switch will occur before the function returns if the priority
+ * being set is higher than the currently executing task.
+ *
+ * @param xTask Handle to the task for which the priority is being set.
+ * Passing a NULL handle results in the priority of the calling task being set.
+ *
+ * @param uxNewPriority The priority to which the task will be set.
+ *
+ * Example usage:
+ * 
+ * void vAFunction( void )
+ * {
+ * TaskHandle_t xHandle;
+ *
+ *   // Create a task, storing the handle.
+ *   xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
+ *
+ *   // ...
+ *
+ *   // Use the handle to raise the priority of the created task.
+ *   vTaskPrioritySet( xHandle, tskIDLE_PRIORITY + 1 );
+ *
+ *   // ...
+ *
+ *   // Use a NULL handle to raise our priority to the same value.
+ *   vTaskPrioritySet( NULL, tskIDLE_PRIORITY + 1 );
+ * }
+ * 

+ * \defgroup vTaskPrioritySet vTaskPrioritySet
+ * \ingroup TaskCtrl
+ */
+void vTaskPrioritySet( TaskHandle_t xTask,
+                       UBaseType_t uxNewPriority ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
+ * void vTaskSuspend( TaskHandle_t xTaskToSuspend );
+ * 

+ *
+ * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available.
+ * See the configuration section for more information.
+ *
+ * Suspend any task.  When suspended a task will never get any microcontroller
+ * processing time, no matter what its priority.
+ *
+ * Calls to vTaskSuspend are not accumulative -
+ * i.e. calling vTaskSuspend () twice on the same task still only requires one
+ * call to vTaskResume () to ready the suspended task.
+ *
+ * @param xTaskToSuspend Handle to the task being suspended.  Passing a NULL
+ * handle will cause the calling task to be suspended.
+ *
+ * Example usage:
+ * 
+ * void vAFunction( void )
+ * {
+ * TaskHandle_t xHandle;
+ *
+ *   // Create a task, storing the handle.
+ *   xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
+ *
+ *   // ...
+ *
+ *   // Use the handle to suspend the created task.
+ *   vTaskSuspend( xHandle );
+ *
+ *   // ...
+ *
+ *   // The created task will not run during this period, unless
+ *   // another task calls vTaskResume( xHandle ).
+ *
+ *   //...
+ *
+ *
+ *   // Suspend ourselves.
+ *   vTaskSuspend( NULL );
+ *
+ *   // We cannot get here unless another task calls vTaskResume
+ *   // with our handle as the parameter.
+ * }
+ * 

+ * \defgroup vTaskSuspend vTaskSuspend
+ * \ingroup TaskCtrl
+ */
+void vTaskSuspend( TaskHandle_t xTaskToSuspend ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
+ * void vTaskResume( TaskHandle_t xTaskToResume );
+ * 

+ *
+ * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available.
+ * See the configuration section for more information.
+ *
+ * Resumes a suspended task.
+ *
+ * A task that has been suspended by one or more calls to vTaskSuspend ()
+ * will be made available for running again by a single call to
+ * vTaskResume ().
+ *
+ * @param xTaskToResume Handle to the task being readied.
+ *
+ * Example usage:
+ * 
+ * void vAFunction( void )
+ * {
+ * TaskHandle_t xHandle;
+ *
+ *   // Create a task, storing the handle.
+ *   xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
+ *
+ *   // ...
+ *
+ *   // Use the handle to suspend the created task.
+ *   vTaskSuspend( xHandle );
+ *
+ *   // ...
+ *
+ *   // The created task will not run during this period, unless
+ *   // another task calls vTaskResume( xHandle ).
+ *
+ *   //...
+ *
+ *
+ *   // Resume the suspended task ourselves.
+ *   vTaskResume( xHandle );
+ *
+ *   // The created task will once again get microcontroller processing
+ *   // time in accordance with its priority within the system.
+ * }
+ * 

+ * \defgroup vTaskResume vTaskResume
+ * \ingroup TaskCtrl
+ */
+void vTaskResume( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
+ * void xTaskResumeFromISR( TaskHandle_t xTaskToResume );
+ * 

+ *
+ * INCLUDE_xTaskResumeFromISR must be defined as 1 for this function to be
+ * available.  See the configuration section for more information.
+ *
+ * An implementation of vTaskResume() that can be called from within an ISR.
+ *
+ * A task that has been suspended by one or more calls to vTaskSuspend ()
+ * will be made available for running again by a single call to
+ * xTaskResumeFromISR ().
+ *
+ * xTaskResumeFromISR() should not be used to synchronise a task with an
+ * interrupt if there is a chance that the interrupt could arrive prior to the
+ * task being suspended - as this can lead to interrupts being missed. Use of a
+ * semaphore as a synchronisation mechanism would avoid this eventuality.
+ *
+ * @param xTaskToResume Handle to the task being readied.
+ *
+ * @return pdTRUE if resuming the task should result in a context switch,
+ * otherwise pdFALSE. This is used by the ISR to determine if a context switch
+ * may be required following the ISR.
+ *
+ * \defgroup vTaskResumeFromISR vTaskResumeFromISR
+ * \ingroup TaskCtrl
+ */
+BaseType_t xTaskResumeFromISR( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION;
+
+/*-----------------------------------------------------------
+* SCHEDULER CONTROL
+*----------------------------------------------------------*/
+
+/**
+ * task. h
+ * 
+ * void vTaskStartScheduler( void );
+ * 

+ *
+ * Starts the real time kernel tick processing.  After calling the kernel
+ * has control over which tasks are executed and when.
+ *
+ * See the demo application file main.c for an example of creating
+ * tasks and starting the kernel.
+ *
+ * Example usage:
+ * 
+ * void vAFunction( void )
+ * {
+ *   // Create at least one task before starting the kernel.
+ *   xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
+ *
+ *   // Start the real time kernel with preemption.
+ *   vTaskStartScheduler ();
+ *
+ *   // Will not get here unless a task calls vTaskEndScheduler ()
+ * }
+ * 

+ *
+ * \defgroup vTaskStartScheduler vTaskStartScheduler
+ * \ingroup SchedulerControl
+ */
+void vTaskStartScheduler( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
+ * void vTaskEndScheduler( void );
+ * 

+ *
+ * NOTE:  At the time of writing only the x86 real mode port, which runs on a PC
+ * in place of DOS, implements this function.
+ *
+ * Stops the real time kernel tick.  All created tasks will be automatically
+ * deleted and multitasking (either preemptive or cooperative) will
+ * stop.  Execution then resumes from the point where vTaskStartScheduler ()
+ * was called, as if vTaskStartScheduler () had just returned.
+ *
+ * See the demo application file main. c in the demo/PC directory for an
+ * example that uses vTaskEndScheduler ().
+ *
+ * vTaskEndScheduler () requires an exit function to be defined within the
+ * portable layer (see vPortEndScheduler () in port. c for the PC port).  This
+ * performs hardware specific operations such as stopping the kernel tick.
+ *
+ * vTaskEndScheduler () will cause all of the resources allocated by the
+ * kernel to be freed - but will not free resources allocated by application
+ * tasks.
+ *
+ * Example usage:
+ * 
+ * void vTaskCode( void * pvParameters )
+ * {
+ *   for( ;; )
+ *   {
+ *       // Task code goes here.
+ *
+ *       // At some point we want to end the real time kernel processing
+ *       // so call ...
+ *       vTaskEndScheduler ();
+ *   }
+ * }
+ *
+ * void vAFunction( void )
+ * {
+ *   // Create at least one task before starting the kernel.
+ *   xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
+ *
+ *   // Start the real time kernel with preemption.
+ *   vTaskStartScheduler ();
+ *
+ *   // Will only get here when the vTaskCode () task has called
+ *   // vTaskEndScheduler ().  When we get here we are back to single task
+ *   // execution.
+ * }
+ * 

+ *
+ * \defgroup vTaskEndScheduler vTaskEndScheduler
+ * \ingroup SchedulerControl
+ */
+void vTaskEndScheduler( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
+ * void vTaskSuspendAll( void );
+ * 

+ *
+ * Suspends the scheduler without disabling interrupts.  Context switches will
+ * not occur while the scheduler is suspended.
+ *
+ * After calling vTaskSuspendAll () the calling task will continue to execute
+ * without risk of being swapped out until a call to xTaskResumeAll () has been
+ * made.
+ *
+ * API functions that have the potential to cause a context switch (for example,
+ * vTaskDelayUntil(), xQueueSend(), etc.) must not be called while the scheduler
+ * is suspended.
+ *
+ * Example usage:
+ * 
+ * void vTask1( void * pvParameters )
+ * {
+ *   for( ;; )
+ *   {
+ *       // Task code goes here.
+ *
+ *       // ...
+ *
+ *       // At some point the task wants to perform a long operation during
+ *       // which it does not want to get swapped out.  It cannot use
+ *       // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the
+ *       // operation may cause interrupts to be missed - including the
+ *       // ticks.
+ *
+ *       // Prevent the real time kernel swapping out the task.
+ *       vTaskSuspendAll ();
+ *
+ *       // Perform the operation here.  There is no need to use critical
+ *       // sections as we have all the microcontroller processing time.
+ *       // During this time interrupts will still operate and the kernel
+ *       // tick count will be maintained.
+ *
+ *       // ...
+ *
+ *       // The operation is complete.  Restart the kernel.
+ *       xTaskResumeAll ();
+ *   }
+ * }
+ * 

+ * \defgroup vTaskSuspendAll vTaskSuspendAll
+ * \ingroup SchedulerControl
+ */
+void vTaskSuspendAll( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
+ * BaseType_t xTaskResumeAll( void );
+ * 

+ *
+ * Resumes scheduler activity after it was suspended by a call to
+ * vTaskSuspendAll().
+ *
+ * xTaskResumeAll() only resumes the scheduler.  It does not unsuspend tasks
+ * that were previously suspended by a call to vTaskSuspend().
+ *
+ * @return If resuming the scheduler caused a context switch then pdTRUE is
+ *         returned, otherwise pdFALSE is returned.
+ *
+ * Example usage:
+ * 
+ * void vTask1( void * pvParameters )
+ * {
+ *   for( ;; )
+ *   {
+ *       // Task code goes here.
+ *
+ *       // ...
+ *
+ *       // At some point the task wants to perform a long operation during
+ *       // which it does not want to get swapped out.  It cannot use
+ *       // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the
+ *       // operation may cause interrupts to be missed - including the
+ *       // ticks.
+ *
+ *       // Prevent the real time kernel swapping out the task.
+ *       vTaskSuspendAll ();
+ *
+ *       // Perform the operation here.  There is no need to use critical
+ *       // sections as we have all the microcontroller processing time.
+ *       // During this time interrupts will still operate and the real
+ *       // time kernel tick count will be maintained.
+ *
+ *       // ...
+ *
+ *       // The operation is complete.  Restart the kernel.  We want to force
+ *       // a context switch - but there is no point if resuming the scheduler
+ *       // caused a context switch already.
+ *       if( !xTaskResumeAll () )
+ *       {
+ *            taskYIELD ();
+ *       }
+ *   }
+ * }
+ * 

+ * \defgroup xTaskResumeAll xTaskResumeAll
+ * \ingroup SchedulerControl
+ */
+BaseType_t xTaskResumeAll( void ) PRIVILEGED_FUNCTION;
+
+/*-----------------------------------------------------------
+* TASK UTILITIES
+*----------------------------------------------------------*/
+
+/**
+ * task. h
+ * 
TickType_t xTaskGetTickCount( void );

+ *
+ * @return The count of ticks since vTaskStartScheduler was called.
+ *
+ * \defgroup xTaskGetTickCount xTaskGetTickCount
+ * \ingroup TaskUtils
+ */
+TickType_t xTaskGetTickCount( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
TickType_t xTaskGetTickCountFromISR( void );

+ *
+ * @return The count of ticks since vTaskStartScheduler was called.
+ *
+ * This is a version of xTaskGetTickCount() that is safe to be called from an
+ * ISR - provided that TickType_t is the natural word size of the
+ * microcontroller being used or interrupt nesting is either not supported or
+ * not being used.
+ *
+ * \defgroup xTaskGetTickCountFromISR xTaskGetTickCountFromISR
+ * \ingroup TaskUtils
+ */
+TickType_t xTaskGetTickCountFromISR( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
uint16_t uxTaskGetNumberOfTasks( void );

+ *
+ * @return The number of tasks that the real time kernel is currently managing.
+ * This includes all ready, blocked and suspended tasks.  A task that
+ * has been deleted but not yet freed by the idle task will also be
+ * included in the count.
+ *
+ * \defgroup uxTaskGetNumberOfTasks uxTaskGetNumberOfTasks
+ * \ingroup TaskUtils
+ */
+UBaseType_t uxTaskGetNumberOfTasks( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
char *pcTaskGetName( TaskHandle_t xTaskToQuery );

+ *
+ * @return The text (human readable) name of the task referenced by the handle
+ * xTaskToQuery.  A task can query its own name by either passing in its own
+ * handle, or by setting xTaskToQuery to NULL.
+ *
+ * \defgroup pcTaskGetName pcTaskGetName
+ * \ingroup TaskUtils
+ */
+char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+
+/**
+ * task. h
+ * 
TaskHandle_t xTaskGetHandle( const char *pcNameToQuery );

+ *
+ * NOTE:  This function takes a relatively long time to complete and should be
+ * used sparingly.
+ *
+ * @return The handle of the task that has the human readable name pcNameToQuery.
+ * NULL is returned if no matching name is found.  INCLUDE_xTaskGetHandle
+ * must be set to 1 in FreeRTOSConfig.h for pcTaskGetHandle() to be available.
+ *
+ * \defgroup pcTaskGetHandle pcTaskGetHandle
+ * \ingroup TaskUtils
+ */
+TaskHandle_t xTaskGetHandle( const char * pcNameToQuery ) PRIVILEGED_FUNCTION;     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+
+/**
+ * task.h
+ * 
UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask );

+ *
+ * INCLUDE_uxTaskGetStackHighWaterMark must be set to 1 in FreeRTOSConfig.h for
+ * this function to be available.
+ *
+ * Returns the high water mark of the stack associated with xTask.  That is,
+ * the minimum free stack space there has been (in words, so on a 32 bit machine
+ * a value of 1 means 4 bytes) since the task started.  The smaller the returned
+ * number the closer the task has come to overflowing its stack.
+ *
+ * uxTaskGetStackHighWaterMark() and uxTaskGetStackHighWaterMark2() are the
+ * same except for their return type.  Using configSTACK_DEPTH_TYPE allows the
+ * user to determine the return type.  It gets around the problem of the value
+ * overflowing on 8-bit types without breaking backward compatibility for
+ * applications that expect an 8-bit return type.
+ *
+ * @param xTask Handle of the task associated with the stack to be checked.
+ * Set xTask to NULL to check the stack of the calling task.
+ *
+ * @return The smallest amount of free stack space there has been (in words, so
+ * actual spaces on the stack rather than bytes) since the task referenced by
+ * xTask was created.
+ */
+UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+/**
+ * task.h
+ * 
configSTACK_DEPTH_TYPE uxTaskGetStackHighWaterMark2( TaskHandle_t xTask );

+ *
+ * INCLUDE_uxTaskGetStackHighWaterMark2 must be set to 1 in FreeRTOSConfig.h for
+ * this function to be available.
+ *
+ * Returns the high water mark of the stack associated with xTask.  That is,
+ * the minimum free stack space there has been (in words, so on a 32 bit machine
+ * a value of 1 means 4 bytes) since the task started.  The smaller the returned
+ * number the closer the task has come to overflowing its stack.
+ *
+ * uxTaskGetStackHighWaterMark() and uxTaskGetStackHighWaterMark2() are the
+ * same except for their return type.  Using configSTACK_DEPTH_TYPE allows the
+ * user to determine the return type.  It gets around the problem of the value
+ * overflowing on 8-bit types without breaking backward compatibility for
+ * applications that expect an 8-bit return type.
+ *
+ * @param xTask Handle of the task associated with the stack to be checked.
+ * Set xTask to NULL to check the stack of the calling task.
+ *
+ * @return The smallest amount of free stack space there has been (in words, so
+ * actual spaces on the stack rather than bytes) since the task referenced by
+ * xTask was created.
+ */
+configSTACK_DEPTH_TYPE uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+/* When using trace macros it is sometimes necessary to include task.h before
+ * FreeRTOS.h.  When this is done TaskHookFunction_t will not yet have been defined,
+ * so the following two prototypes will cause a compilation error.  This can be
+ * fixed by simply guarding against the inclusion of these two prototypes unless
+ * they are explicitly required by the configUSE_APPLICATION_TASK_TAG configuration
+ * constant. */
+#ifdef configUSE_APPLICATION_TASK_TAG
+    #if configUSE_APPLICATION_TASK_TAG == 1
+
+/**
+ * task.h
+ * 
+ * void vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction );
+ * 

+ *
+ * Sets pxHookFunction to be the task hook function used by the task xTask.
+ * Passing xTask as NULL has the effect of setting the calling tasks hook
+ * function.
+ */
+        void vTaskSetApplicationTaskTag( TaskHandle_t xTask,
+                                         TaskHookFunction_t pxHookFunction ) PRIVILEGED_FUNCTION;
+
+/**
+ * task.h
+ * 
+ * void xTaskGetApplicationTaskTag( TaskHandle_t xTask );
+ * 

+ *
+ * Returns the pxHookFunction value assigned to the task xTask.  Do not
+ * call from an interrupt service routine - call
+ * xTaskGetApplicationTaskTagFromISR() instead.
+ */
+        TaskHookFunction_t xTaskGetApplicationTaskTag( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+/**
+ * task.h
+ * 
+ * void xTaskGetApplicationTaskTagFromISR( TaskHandle_t xTask );
+ * 

+ *
+ * Returns the pxHookFunction value assigned to the task xTask.  Can
+ * be called from an interrupt service routine.
+ */
+        TaskHookFunction_t xTaskGetApplicationTaskTagFromISR( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+    #endif /* configUSE_APPLICATION_TASK_TAG ==1 */
+#endif /* ifdef configUSE_APPLICATION_TASK_TAG */
+
+#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 )
+
+/* Each task contains an array of pointers that is dimensioned by the
+ * configNUM_THREAD_LOCAL_STORAGE_POINTERS setting in FreeRTOSConfig.h.  The
+ * kernel does not use the pointers itself, so the application writer can use
+ * the pointers for any purpose they wish.  The following two functions are
+ * used to set and query a pointer respectively. */
+    void vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet,
+                                            BaseType_t xIndex,
+                                            void * pvValue ) PRIVILEGED_FUNCTION;
+    void * pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery,
+                                               BaseType_t xIndex ) PRIVILEGED_FUNCTION;
+
+#endif
+
+#if ( configCHECK_FOR_STACK_OVERFLOW > 0 )
+ 
+     /**
+      * task.h
+      * 
void vApplicationStackOverflowHook( TaskHandle_t xTask char *pcTaskName); 

+      * 
+      * The application stack overflow hook is called when a stack overflow is detected for a task.
+      * 
+      * Details on stack overflow detection can be found here: https://www.FreeRTOS.org/Stacks-and-stack-overflow-checking.html
+      *  
+      * @param xTask the task that just exceeded its stack boundaries.
+      * @param pcTaskName A character string containing the name of the offending task.
+      */
+     void vApplicationStackOverflowHook( TaskHandle_t xTask,
+                                               char * pcTaskName ); 
+ 
+#endif 
+ 
+#if  (  configUSE_TICK_HOOK > 0 )
+    /** 
+     *  task.h
+     *  
void vApplicationTickHook( void ); 

+     * 
+     * This hook function is called in the system tick handler after any OS work is completed.
+     */
+    void vApplicationTickHook( void ); /*lint !e526 Symbol not defined as it is an application callback. */
+
+#endif
+
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+    /**
+     * task.h
+     * 
void vApplicationGetIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer, StackType_t ** ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize ) 

+     * 
+     * This function is used to provide a statically allocated block of memory to FreeRTOS to hold the Idle Task TCB.  This function is required when 
+     * configSUPPORT_STATIC_ALLOCATION is set.  For more information see this URI: https://www.FreeRTOS.org/a00110.html#configSUPPORT_STATIC_ALLOCATION
+     * 
+     * @param ppxIdleTaskTCBBuffer A handle to a statically allocated TCB buffer
+     * @param ppxIdleTaskStackBuffer A handle to a statically allocated Stack buffer for thie idle task
+     * @param pulIdleTaskStackSize A pointer to the number of elements that will fit in the allocated stack buffer
+     */
+    void vApplicationGetIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer,
+                                               StackType_t ** ppxIdleTaskStackBuffer,
+                                               uint32_t * pulIdleTaskStackSize ); /*lint !e526 Symbol not defined as it is an application callback. */
+#endif
+
+/**
+ * task.h
+ * 
+ * BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter );
+ * 

+ *
+ * Calls the hook function associated with xTask.  Passing xTask as NULL has
+ * the effect of calling the Running tasks (the calling task) hook function.
+ *
+ * pvParameter is passed to the hook function for the task to interpret as it
+ * wants.  The return value is the value returned by the task hook function
+ * registered by the user.
+ */
+BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask,
+                                         void * pvParameter ) PRIVILEGED_FUNCTION;
+
+/**
+ * xTaskGetIdleTaskHandle() is only available if
+ * INCLUDE_xTaskGetIdleTaskHandle is set to 1 in FreeRTOSConfig.h.
+ *
+ * Simply returns the handle of the idle task.  It is not valid to call
+ * xTaskGetIdleTaskHandle() before the scheduler has been started.
+ */
+TaskHandle_t xTaskGetIdleTaskHandle( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * configUSE_TRACE_FACILITY must be defined as 1 in FreeRTOSConfig.h for
+ * uxTaskGetSystemState() to be available.
+ *
+ * uxTaskGetSystemState() populates an TaskStatus_t structure for each task in
+ * the system.  TaskStatus_t structures contain, among other things, members
+ * for the task handle, task name, task priority, task state, and total amount
+ * of run time consumed by the task.  See the TaskStatus_t structure
+ * definition in this file for the full member list.
+ *
+ * NOTE:  This function is intended for debugging use only as its use results in
+ * the scheduler remaining suspended for an extended period.
+ *
+ * @param pxTaskStatusArray A pointer to an array of TaskStatus_t structures.
+ * The array must contain at least one TaskStatus_t structure for each task
+ * that is under the control of the RTOS.  The number of tasks under the control
+ * of the RTOS can be determined using the uxTaskGetNumberOfTasks() API function.
+ *
+ * @param uxArraySize The size of the array pointed to by the pxTaskStatusArray
+ * parameter.  The size is specified as the number of indexes in the array, or
+ * the number of TaskStatus_t structures contained in the array, not by the
+ * number of bytes in the array.
+ *
+ * @param pulTotalRunTime If configGENERATE_RUN_TIME_STATS is set to 1 in
+ * FreeRTOSConfig.h then *pulTotalRunTime is set by uxTaskGetSystemState() to the
+ * total run time (as defined by the run time stats clock, see
+ * https://www.FreeRTOS.org/rtos-run-time-stats.html) since the target booted.
+ * pulTotalRunTime can be set to NULL to omit the total run time information.
+ *
+ * @return The number of TaskStatus_t structures that were populated by
+ * uxTaskGetSystemState().  This should equal the number returned by the
+ * uxTaskGetNumberOfTasks() API function, but will be zero if the value passed
+ * in the uxArraySize parameter was too small.
+ *
+ * Example usage:
+ * 
+ *  // This example demonstrates how a human readable table of run time stats
+ *  // information is generated from raw data provided by uxTaskGetSystemState().
+ *  // The human readable table is written to pcWriteBuffer
+ *  void vTaskGetRunTimeStats( char *pcWriteBuffer )
+ *  {
+ *  TaskStatus_t *pxTaskStatusArray;
+ *  volatile UBaseType_t uxArraySize, x;
+ *  uint32_t ulTotalRunTime, ulStatsAsPercentage;
+ *
+ *      // Make sure the write buffer does not contain a string.
+ * pcWriteBuffer = 0x00;
+ *
+ *      // Take a snapshot of the number of tasks in case it changes while this
+ *      // function is executing.
+ *      uxArraySize = uxTaskGetNumberOfTasks();
+ *
+ *      // Allocate a TaskStatus_t structure for each task.  An array could be
+ *      // allocated statically at compile time.
+ *      pxTaskStatusArray = pvPortMalloc( uxArraySize * sizeof( TaskStatus_t ) );
+ *
+ *      if( pxTaskStatusArray != NULL )
+ *      {
+ *          // Generate raw status information about each task.
+ *          uxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, &ulTotalRunTime );
+ *
+ *          // For percentage calculations.
+ *          ulTotalRunTime /= 100UL;
+ *
+ *          // Avoid divide by zero errors.
+ *          if( ulTotalRunTime > 0 )
+ *          {
+ *              // For each populated position in the pxTaskStatusArray array,
+ *              // format the raw data as human readable ASCII data
+ *              for( x = 0; x < uxArraySize; x++ )
+ *              {
+ *                  // What percentage of the total run time has the task used?
+ *                  // This will always be rounded down to the nearest integer.
+ *                  // ulTotalRunTimeDiv100 has already been divided by 100.
+ *                  ulStatsAsPercentage = pxTaskStatusArray[ x ].ulRunTimeCounter / ulTotalRunTime;
+ *
+ *                  if( ulStatsAsPercentage > 0UL )
+ *                  {
+ *                      sprintf( pcWriteBuffer, "%s\t\t%lu\t\t%lu%%\r\n", pxTaskStatusArray[ x ].pcTaskName, pxTaskStatusArray[ x ].ulRunTimeCounter, ulStatsAsPercentage );
+ *                  }
+ *                  else
+ *                  {
+ *                      // If the percentage is zero here then the task has
+ *                      // consumed less than 1% of the total run time.
+ *                      sprintf( pcWriteBuffer, "%s\t\t%lu\t\t<1%%\r\n", pxTaskStatusArray[ x ].pcTaskName, pxTaskStatusArray[ x ].ulRunTimeCounter );
+ *                  }
+ *
+ *                  pcWriteBuffer += strlen( ( char * ) pcWriteBuffer );
+ *              }
+ *          }
+ *
+ *          // The array is no longer needed, free the memory it consumes.
+ *          vPortFree( pxTaskStatusArray );
+ *      }
+ *  }
+ *  

+ */
+UBaseType_t uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray,
+                                  const UBaseType_t uxArraySize,
+                                  uint32_t * const pulTotalRunTime ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
void vTaskList( char *pcWriteBuffer );

+ *
+ * configUSE_TRACE_FACILITY and configUSE_STATS_FORMATTING_FUNCTIONS must
+ * both be defined as 1 for this function to be available.  See the
+ * configuration section of the FreeRTOS.org website for more information.
+ *
+ * NOTE 1: This function will disable interrupts for its duration.  It is
+ * not intended for normal application runtime use but as a debug aid.
+ *
+ * Lists all the current tasks, along with their current state and stack
+ * usage high water mark.
+ *
+ * Tasks are reported as blocked ('B'), ready ('R'), deleted ('D') or
+ * suspended ('S').
+ *
+ * PLEASE NOTE:
+ *
+ * This function is provided for convenience only, and is used by many of the
+ * demo applications.  Do not consider it to be part of the scheduler.
+ *
+ * vTaskList() calls uxTaskGetSystemState(), then formats part of the
+ * uxTaskGetSystemState() output into a human readable table that displays task
+ * names, states and stack usage.
+ *
+ * vTaskList() has a dependency on the sprintf() C library function that might
+ * bloat the code size, use a lot of stack, and provide different results on
+ * different platforms.  An alternative, tiny, third party, and limited
+ * functionality implementation of sprintf() is provided in many of the
+ * FreeRTOS/Demo sub-directories in a file called printf-stdarg.c (note
+ * printf-stdarg.c does not provide a full snprintf() implementation!).
+ *
+ * It is recommended that production systems call uxTaskGetSystemState()
+ * directly to get access to raw stats data, rather than indirectly through a
+ * call to vTaskList().
+ *
+ * @param pcWriteBuffer A buffer into which the above mentioned details
+ * will be written, in ASCII form.  This buffer is assumed to be large
+ * enough to contain the generated report.  Approximately 40 bytes per
+ * task should be sufficient.
+ *
+ * \defgroup vTaskList vTaskList
+ * \ingroup TaskUtils
+ */
+void vTaskList( char * pcWriteBuffer ) PRIVILEGED_FUNCTION;     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+
+/**
+ * task. h
+ * 
void vTaskGetRunTimeStats( char *pcWriteBuffer );

+ *
+ * configGENERATE_RUN_TIME_STATS and configUSE_STATS_FORMATTING_FUNCTIONS
+ * must both be defined as 1 for this function to be available.  The application
+ * must also then provide definitions for
+ * portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and portGET_RUN_TIME_COUNTER_VALUE()
+ * to configure a peripheral timer/counter and return the timers current count
+ * value respectively.  The counter should be at least 10 times the frequency of
+ * the tick count.
+ *
+ * NOTE 1: This function will disable interrupts for its duration.  It is
+ * not intended for normal application runtime use but as a debug aid.
+ *
+ * Setting configGENERATE_RUN_TIME_STATS to 1 will result in a total
+ * accumulated execution time being stored for each task.  The resolution
+ * of the accumulated time value depends on the frequency of the timer
+ * configured by the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() macro.
+ * Calling vTaskGetRunTimeStats() writes the total execution time of each
+ * task into a buffer, both as an absolute count value and as a percentage
+ * of the total system execution time.
+ *
+ * NOTE 2:
+ *
+ * This function is provided for convenience only, and is used by many of the
+ * demo applications.  Do not consider it to be part of the scheduler.
+ *
+ * vTaskGetRunTimeStats() calls uxTaskGetSystemState(), then formats part of the
+ * uxTaskGetSystemState() output into a human readable table that displays the
+ * amount of time each task has spent in the Running state in both absolute and
+ * percentage terms.
+ *
+ * vTaskGetRunTimeStats() has a dependency on the sprintf() C library function
+ * that might bloat the code size, use a lot of stack, and provide different
+ * results on different platforms.  An alternative, tiny, third party, and
+ * limited functionality implementation of sprintf() is provided in many of the
+ * FreeRTOS/Demo sub-directories in a file called printf-stdarg.c (note
+ * printf-stdarg.c does not provide a full snprintf() implementation!).
+ *
+ * It is recommended that production systems call uxTaskGetSystemState() directly
+ * to get access to raw stats data, rather than indirectly through a call to
+ * vTaskGetRunTimeStats().
+ *
+ * @param pcWriteBuffer A buffer into which the execution times will be
+ * written, in ASCII form.  This buffer is assumed to be large enough to
+ * contain the generated report.  Approximately 40 bytes per task should
+ * be sufficient.
+ *
+ * \defgroup vTaskGetRunTimeStats vTaskGetRunTimeStats
+ * \ingroup TaskUtils
+ */
+void vTaskGetRunTimeStats( char * pcWriteBuffer ) PRIVILEGED_FUNCTION;     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+
+/**
+ * task. h
+ * 
uint32_t ulTaskGetIdleRunTimeCounter( void );

+ *
+ * configGENERATE_RUN_TIME_STATS and configUSE_STATS_FORMATTING_FUNCTIONS
+ * must both be defined as 1 for this function to be available.  The application
+ * must also then provide definitions for
+ * portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and portGET_RUN_TIME_COUNTER_VALUE()
+ * to configure a peripheral timer/counter and return the timers current count
+ * value respectively.  The counter should be at least 10 times the frequency of
+ * the tick count.
+ *
+ * Setting configGENERATE_RUN_TIME_STATS to 1 will result in a total
+ * accumulated execution time being stored for each task.  The resolution
+ * of the accumulated time value depends on the frequency of the timer
+ * configured by the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() macro.
+ * While uxTaskGetSystemState() and vTaskGetRunTimeStats() writes the total
+ * execution time of each task into a buffer, ulTaskGetIdleRunTimeCounter()
+ * returns the total execution time of just the idle task.
+ *
+ * @return The total run time of the idle task.  This is the amount of time the
+ * idle task has actually been executing.  The unit of time is dependent on the
+ * frequency configured using the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and
+ * portGET_RUN_TIME_COUNTER_VALUE() macros.
+ *
+ * \defgroup ulTaskGetIdleRunTimeCounter ulTaskGetIdleRunTimeCounter
+ * \ingroup TaskUtils
+ */
+uint32_t ulTaskGetIdleRunTimeCounter( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
BaseType_t xTaskNotifyIndexed( TaskHandle_t xTaskToNotify, UBaseType_t uxIndexToNotify, uint32_t ulValue, eNotifyAction eAction );

+ * 
BaseType_t xTaskNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction );

+ *
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
+ *
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for these
+ * functions to be available.
+ *
+ * Sends a direct to task notification to a task, with an optional value and
+ * action.
+ *
+ * Each task has a private array of "notification values" (or 'notifications'),
+ * each of which is a 32-bit unsigned integer (uint32_t).  The constant
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
+ * array, and (for backward compatibility) defaults to 1 if left undefined.
+ * Prior to FreeRTOS V10.4.0 there was only one notification value per task.
+ *
+ * Events can be sent to a task using an intermediary object.  Examples of such
+ * objects are queues, semaphores, mutexes and event groups.  Task notifications
+ * are a method of sending an event directly to a task without the need for such
+ * an intermediary object.
+ *
+ * A notification sent to a task can optionally perform an action, such as
+ * update, overwrite or increment one of the task's notification values.  In
+ * that way task notifications can be used to send data to a task, or be used as
+ * light weight and fast binary or counting semaphores.
+ *
+ * A task can use xTaskNotifyWaitIndexed() to [optionally] block to wait for a
+ * notification to be pending, or ulTaskNotifyTakeIndexed() to [optionally] block
+ * to wait for a notification value to have a non-zero value.  The task does
+ * not consume any CPU time while it is in the Blocked state.
+ *
+ * A notification sent to a task will remain pending until it is cleared by the
+ * task calling xTaskNotifyWaitIndexed() or ulTaskNotifyTakeIndexed() (or their
+ * un-indexed equivalents).  If the task was already in the Blocked state to
+ * wait for a notification when the notification arrives then the task will
+ * automatically be removed from the Blocked state (unblocked) and the
+ * notification cleared.
+ *
+ * **NOTE** Each notification within the array operates independently - a task
+ * can only block on one notification within the array at a time and will not be
+ * unblocked by a notification sent to any other array index.
+ *
+ * Backward compatibility information:
+ * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and
+ * all task notification API functions operated on that value. Replacing the
+ * single notification value with an array of notification values necessitated a
+ * new set of API functions that could address specific notifications within the
+ * array.  xTaskNotify() is the original API function, and remains backward
+ * compatible by always operating on the notification value at index 0 in the
+ * array. Calling xTaskNotify() is equivalent to calling xTaskNotifyIndexed()
+ * with the uxIndexToNotify parameter set to 0.
+ *
+ * @param xTaskToNotify The handle of the task being notified.  The handle to a
+ * task can be returned from the xTaskCreate() API function used to create the
+ * task, and the handle of the currently running task can be obtained by calling
+ * xTaskGetCurrentTaskHandle().
+ *
+ * @param uxIndexToNotify The index within the target task's array of
+ * notification values to which the notification is to be sent.  uxIndexToNotify
+ * must be less than configTASK_NOTIFICATION_ARRAY_ENTRIES.  xTaskNotify() does
+ * not have this parameter and always sends notifications to index 0.
+ *
+ * @param ulValue Data that can be sent with the notification.  How the data is
+ * used depends on the value of the eAction parameter.
+ *
+ * @param eAction Specifies how the notification updates the task's notification
+ * value, if at all.  Valid values for eAction are as follows:
+ *
+ * eSetBits -
+ * The target notification value is bitwise ORed with ulValue.
+ * xTaskNofifyIndexed() always returns pdPASS in this case.
+ *
+ * eIncrement -
+ * The target notification value is incremented.  ulValue is not used and
+ * xTaskNotifyIndexed() always returns pdPASS in this case.
+ *
+ * eSetValueWithOverwrite -
+ * The target notification value is set to the value of ulValue, even if the
+ * task being notified had not yet processed the previous notification at the
+ * same array index (the task already had a notification pending at that index).
+ * xTaskNotifyIndexed() always returns pdPASS in this case.
+ *
+ * eSetValueWithoutOverwrite -
+ * If the task being notified did not already have a notification pending at the
+ * same array index then the target notification value is set to ulValue and
+ * xTaskNotifyIndexed() will return pdPASS.  If the task being notified already
+ * had a notification pending at the same array index then no action is
+ * performed and pdFAIL is returned.
+ *
+ * eNoAction -
+ * The task receives a notification at the specified array index without the
+ * notification value at that index being updated.  ulValue is not used and
+ * xTaskNotifyIndexed() always returns pdPASS in this case.
+ *
+ * pulPreviousNotificationValue -
+ * Can be used to pass out the subject task's notification value before any
+ * bits are modified by the notify function.
+ *
+ * @return Dependent on the value of eAction.  See the description of the
+ * eAction parameter.
+ *
+ * \defgroup xTaskNotifyIndexed xTaskNotifyIndexed
+ * \ingroup TaskNotifications
+ */
+BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify,
+                               UBaseType_t uxIndexToNotify,
+                               uint32_t ulValue,
+                               eNotifyAction eAction,
+                               uint32_t * pulPreviousNotificationValue ) PRIVILEGED_FUNCTION;
+#define xTaskNotify( xTaskToNotify, ulValue, eAction ) \
+    xTaskGenericNotify( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulValue ), ( eAction ), NULL )
+#define xTaskNotifyIndexed( xTaskToNotify, uxIndexToNotify, ulValue, eAction ) \
+    xTaskGenericNotify( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), NULL )
+
+/**
+ * task. h
+ * 
BaseType_t xTaskNotifyAndQueryIndexed( TaskHandle_t xTaskToNotify, UBaseType_t uxIndexToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotifyValue );

+ * 
BaseType_t xTaskNotifyAndQuery( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotifyValue );

+ *
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
+ *
+ * xTaskNotifyAndQueryIndexed() performs the same operation as
+ * xTaskNotifyIndexed() with the addition that it also returns the subject
+ * task's prior notification value (the notification value at the time the
+ * function is called rather than when the function returns) in the additional
+ * pulPreviousNotifyValue parameter.
+ *
+ * xTaskNotifyAndQuery() performs the same operation as xTaskNotify() with the
+ * addition that it also returns the subject task's prior notification value
+ * (the notification value as it was at the time the function is called, rather
+ * than when the function returns) in the additional pulPreviousNotifyValue
+ * parameter.
+ *
+ * \defgroup xTaskNotifyAndQueryIndexed xTaskNotifyAndQueryIndexed
+ * \ingroup TaskNotifications
+ */
+#define xTaskNotifyAndQuery( xTaskToNotify, ulValue, eAction, pulPreviousNotifyValue ) \
+    xTaskGenericNotify( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulValue ), ( eAction ), ( pulPreviousNotifyValue ) )
+#define xTaskNotifyAndQueryIndexed( xTaskToNotify, uxIndexToNotify, ulValue, eAction, pulPreviousNotifyValue ) \
+    xTaskGenericNotify( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotifyValue ) )
+
+/**
+ * task. h
+ * 
BaseType_t xTaskNotifyIndexedFromISR( TaskHandle_t xTaskToNotify, UBaseType_t uxIndexToNotify, uint32_t ulValue, eNotifyAction eAction, BaseType_t *pxHigherPriorityTaskWoken );

+ * 
BaseType_t xTaskNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, BaseType_t *pxHigherPriorityTaskWoken );

+ *
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
+ *
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for these
+ * functions to be available.
+ *
+ * A version of xTaskNotifyIndexed() that can be used from an interrupt service
+ * routine (ISR).
+ *
+ * Each task has a private array of "notification values" (or 'notifications'),
+ * each of which is a 32-bit unsigned integer (uint32_t).  The constant
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
+ * array, and (for backward compatibility) defaults to 1 if left undefined.
+ * Prior to FreeRTOS V10.4.0 there was only one notification value per task.
+ *
+ * Events can be sent to a task using an intermediary object.  Examples of such
+ * objects are queues, semaphores, mutexes and event groups.  Task notifications
+ * are a method of sending an event directly to a task without the need for such
+ * an intermediary object.
+ *
+ * A notification sent to a task can optionally perform an action, such as
+ * update, overwrite or increment one of the task's notification values.  In
+ * that way task notifications can be used to send data to a task, or be used as
+ * light weight and fast binary or counting semaphores.
+ *
+ * A task can use xTaskNotifyWaitIndexed() to [optionally] block to wait for a
+ * notification to be pending, or ulTaskNotifyTakeIndexed() to [optionally] block
+ * to wait for a notification value to have a non-zero value.  The task does
+ * not consume any CPU time while it is in the Blocked state.
+ *
+ * A notification sent to a task will remain pending until it is cleared by the
+ * task calling xTaskNotifyWaitIndexed() or ulTaskNotifyTakeIndexed() (or their
+ * un-indexed equivalents).  If the task was already in the Blocked state to
+ * wait for a notification when the notification arrives then the task will
+ * automatically be removed from the Blocked state (unblocked) and the
+ * notification cleared.
+ *
+ * **NOTE** Each notification within the array operates independently - a task
+ * can only block on one notification within the array at a time and will not be
+ * unblocked by a notification sent to any other array index.
+ *
+ * Backward compatibility information:
+ * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and
+ * all task notification API functions operated on that value. Replacing the
+ * single notification value with an array of notification values necessitated a
+ * new set of API functions that could address specific notifications within the
+ * array.  xTaskNotifyFromISR() is the original API function, and remains
+ * backward compatible by always operating on the notification value at index 0
+ * within the array. Calling xTaskNotifyFromISR() is equivalent to calling
+ * xTaskNotifyIndexedFromISR() with the uxIndexToNotify parameter set to 0.
+ *
+ * @param uxIndexToNotify The index within the target task's array of
+ * notification values to which the notification is to be sent.  uxIndexToNotify
+ * must be less than configTASK_NOTIFICATION_ARRAY_ENTRIES.  xTaskNotifyFromISR()
+ * does not have this parameter and always sends notifications to index 0.
+ *
+ * @param xTaskToNotify The handle of the task being notified.  The handle to a
+ * task can be returned from the xTaskCreate() API function used to create the
+ * task, and the handle of the currently running task can be obtained by calling
+ * xTaskGetCurrentTaskHandle().
+ *
+ * @param ulValue Data that can be sent with the notification.  How the data is
+ * used depends on the value of the eAction parameter.
+ *
+ * @param eAction Specifies how the notification updates the task's notification
+ * value, if at all.  Valid values for eAction are as follows:
+ *
+ * eSetBits -
+ * The task's notification value is bitwise ORed with ulValue.  xTaskNofify()
+ * always returns pdPASS in this case.
+ *
+ * eIncrement -
+ * The task's notification value is incremented.  ulValue is not used and
+ * xTaskNotify() always returns pdPASS in this case.
+ *
+ * eSetValueWithOverwrite -
+ * The task's notification value is set to the value of ulValue, even if the
+ * task being notified had not yet processed the previous notification (the
+ * task already had a notification pending).  xTaskNotify() always returns
+ * pdPASS in this case.
+ *
+ * eSetValueWithoutOverwrite -
+ * If the task being notified did not already have a notification pending then
+ * the task's notification value is set to ulValue and xTaskNotify() will
+ * return pdPASS.  If the task being notified already had a notification
+ * pending then no action is performed and pdFAIL is returned.
+ *
+ * eNoAction -
+ * The task receives a notification without its notification value being
+ * updated.  ulValue is not used and xTaskNotify() always returns pdPASS in
+ * this case.
+ *
+ * @param pxHigherPriorityTaskWoken  xTaskNotifyFromISR() will set
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending the notification caused the
+ * task to which the notification was sent to leave the Blocked state, and the
+ * unblocked task has a priority higher than the currently running task.  If
+ * xTaskNotifyFromISR() sets this value to pdTRUE then a context switch should
+ * be requested before the interrupt is exited.  How a context switch is
+ * requested from an ISR is dependent on the port - see the documentation page
+ * for the port in use.
+ *
+ * @return Dependent on the value of eAction.  See the description of the
+ * eAction parameter.
+ *
+ * \defgroup xTaskNotifyIndexedFromISR xTaskNotifyIndexedFromISR
+ * \ingroup TaskNotifications
+ */
+BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify,
+                                      UBaseType_t uxIndexToNotify,
+                                      uint32_t ulValue,
+                                      eNotifyAction eAction,
+                                      uint32_t * pulPreviousNotificationValue,
+                                      BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+#define xTaskNotifyFromISR( xTaskToNotify, ulValue, eAction, pxHigherPriorityTaskWoken ) \
+    xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulValue ), ( eAction ), NULL, ( pxHigherPriorityTaskWoken ) )
+#define xTaskNotifyIndexedFromISR( xTaskToNotify, uxIndexToNotify, ulValue, eAction, pxHigherPriorityTaskWoken ) \
+    xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), NULL, ( pxHigherPriorityTaskWoken ) )
+
+/**
+ * task. h
+ * 
BaseType_t xTaskNotifyAndQueryIndexedFromISR( TaskHandle_t xTaskToNotify, UBaseType_t uxIndexToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken );

+ * 
BaseType_t xTaskNotifyAndQueryFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken );

+ *
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
+ *
+ * xTaskNotifyAndQueryIndexedFromISR() performs the same operation as
+ * xTaskNotifyIndexedFromISR() with the addition that it also returns the
+ * subject task's prior notification value (the notification value at the time
+ * the function is called rather than at the time the function returns) in the
+ * additional pulPreviousNotifyValue parameter.
+ *
+ * xTaskNotifyAndQueryFromISR() performs the same operation as
+ * xTaskNotifyFromISR() with the addition that it also returns the subject
+ * task's prior notification value (the notification value at the time the
+ * function is called rather than at the time the function returns) in the
+ * additional pulPreviousNotifyValue parameter.
+ *
+ * \defgroup xTaskNotifyAndQueryIndexedFromISR xTaskNotifyAndQueryIndexedFromISR
+ * \ingroup TaskNotifications
+ */
+#define xTaskNotifyAndQueryIndexedFromISR( xTaskToNotify, uxIndexToNotify, ulValue, eAction, pulPreviousNotificationValue, pxHigherPriorityTaskWoken ) \
+    xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotificationValue ), ( pxHigherPriorityTaskWoken ) )
+#define xTaskNotifyAndQueryFromISR( xTaskToNotify, ulValue, eAction, pulPreviousNotificationValue, pxHigherPriorityTaskWoken ) \
+    xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulValue ), ( eAction ), ( pulPreviousNotificationValue ), ( pxHigherPriorityTaskWoken ) )
+
+/**
+ * task. h
+ * 
+ * BaseType_t xTaskNotifyWaitIndexed( UBaseType_t uxIndexToWaitOn, uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait );
+ *
+ * BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait );
+ * 

+ *
+ * Waits for a direct to task notification to be pending at a given index within
+ * an array of direct to task notifications.
+ *
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
+ *
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this
+ * function to be available.
+ *
+ * Each task has a private array of "notification values" (or 'notifications'),
+ * each of which is a 32-bit unsigned integer (uint32_t).  The constant
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
+ * array, and (for backward compatibility) defaults to 1 if left undefined.
+ * Prior to FreeRTOS V10.4.0 there was only one notification value per task.
+ *
+ * Events can be sent to a task using an intermediary object.  Examples of such
+ * objects are queues, semaphores, mutexes and event groups.  Task notifications
+ * are a method of sending an event directly to a task without the need for such
+ * an intermediary object.
+ *
+ * A notification sent to a task can optionally perform an action, such as
+ * update, overwrite or increment one of the task's notification values.  In
+ * that way task notifications can be used to send data to a task, or be used as
+ * light weight and fast binary or counting semaphores.
+ *
+ * A notification sent to a task will remain pending until it is cleared by the
+ * task calling xTaskNotifyWaitIndexed() or ulTaskNotifyTakeIndexed() (or their
+ * un-indexed equivalents).  If the task was already in the Blocked state to
+ * wait for a notification when the notification arrives then the task will
+ * automatically be removed from the Blocked state (unblocked) and the
+ * notification cleared.
+ *
+ * A task can use xTaskNotifyWaitIndexed() to [optionally] block to wait for a
+ * notification to be pending, or ulTaskNotifyTakeIndexed() to [optionally] block
+ * to wait for a notification value to have a non-zero value.  The task does
+ * not consume any CPU time while it is in the Blocked state.
+ *
+ * **NOTE** Each notification within the array operates independently - a task
+ * can only block on one notification within the array at a time and will not be
+ * unblocked by a notification sent to any other array index.
+ *
+ * Backward compatibility information:
+ * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and
+ * all task notification API functions operated on that value. Replacing the
+ * single notification value with an array of notification values necessitated a
+ * new set of API functions that could address specific notifications within the
+ * array.  xTaskNotifyWait() is the original API function, and remains backward
+ * compatible by always operating on the notification value at index 0 in the
+ * array. Calling xTaskNotifyWait() is equivalent to calling
+ * xTaskNotifyWaitIndexed() with the uxIndexToWaitOn parameter set to 0.
+ *
+ * @param uxIndexToWaitOn The index within the calling task's array of
+ * notification values on which the calling task will wait for a notification to
+ * be received.  uxIndexToWaitOn must be less than
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES.  xTaskNotifyWait() does
+ * not have this parameter and always waits for notifications on index 0.
+ *
+ * @param ulBitsToClearOnEntry Bits that are set in ulBitsToClearOnEntry value
+ * will be cleared in the calling task's notification value before the task
+ * checks to see if any notifications are pending, and optionally blocks if no
+ * notifications are pending.  Setting ulBitsToClearOnEntry to ULONG_MAX (if
+ * limits.h is included) or 0xffffffffUL (if limits.h is not included) will have
+ * the effect of resetting the task's notification value to 0.  Setting
+ * ulBitsToClearOnEntry to 0 will leave the task's notification value unchanged.
+ *
+ * @param ulBitsToClearOnExit If a notification is pending or received before
+ * the calling task exits the xTaskNotifyWait() function then the task's
+ * notification value (see the xTaskNotify() API function) is passed out using
+ * the pulNotificationValue parameter.  Then any bits that are set in
+ * ulBitsToClearOnExit will be cleared in the task's notification value (note
+ * *pulNotificationValue is set before any bits are cleared).  Setting
+ * ulBitsToClearOnExit to ULONG_MAX (if limits.h is included) or 0xffffffffUL
+ * (if limits.h is not included) will have the effect of resetting the task's
+ * notification value to 0 before the function exits.  Setting
+ * ulBitsToClearOnExit to 0 will leave the task's notification value unchanged
+ * when the function exits (in which case the value passed out in
+ * pulNotificationValue will match the task's notification value).
+ *
+ * @param pulNotificationValue Used to pass the task's notification value out
+ * of the function.  Note the value passed out will not be effected by the
+ * clearing of any bits caused by ulBitsToClearOnExit being non-zero.
+ *
+ * @param xTicksToWait The maximum amount of time that the task should wait in
+ * the Blocked state for a notification to be received, should a notification
+ * not already be pending when xTaskNotifyWait() was called.  The task
+ * will not consume any processing time while it is in the Blocked state.  This
+ * is specified in kernel ticks, the macro pdMS_TO_TICSK( value_in_ms ) can be
+ * used to convert a time specified in milliseconds to a time specified in
+ * ticks.
+ *
+ * @return If a notification was received (including notifications that were
+ * already pending when xTaskNotifyWait was called) then pdPASS is
+ * returned.  Otherwise pdFAIL is returned.
+ *
+ * \defgroup xTaskNotifyWaitIndexed xTaskNotifyWaitIndexed
+ * \ingroup TaskNotifications
+ */
+BaseType_t xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn,
+                                   uint32_t ulBitsToClearOnEntry,
+                                   uint32_t ulBitsToClearOnExit,
+                                   uint32_t * pulNotificationValue,
+                                   TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+#define xTaskNotifyWait( ulBitsToClearOnEntry, ulBitsToClearOnExit, pulNotificationValue, xTicksToWait ) \
+    xTaskGenericNotifyWait( tskDEFAULT_INDEX_TO_NOTIFY, ( ulBitsToClearOnEntry ), ( ulBitsToClearOnExit ), ( pulNotificationValue ), ( xTicksToWait ) )
+#define xTaskNotifyWaitIndexed( uxIndexToWaitOn, ulBitsToClearOnEntry, ulBitsToClearOnExit, pulNotificationValue, xTicksToWait ) \
+    xTaskGenericNotifyWait( ( uxIndexToWaitOn ), ( ulBitsToClearOnEntry ), ( ulBitsToClearOnExit ), ( pulNotificationValue ), ( xTicksToWait ) )
+
+/**
+ * task. h
+ * 
BaseType_t xTaskNotifyGiveIndexed( TaskHandle_t xTaskToNotify, UBaseType_t uxIndexToNotify );

+ * 
BaseType_t xTaskNotifyGive( TaskHandle_t xTaskToNotify );

+ *
+ * Sends a direct to task notification to a particular index in the target
+ * task's notification array in a manner similar to giving a counting semaphore.
+ *
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for more details.
+ *
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for these
+ * macros to be available.
+ *
+ * Each task has a private array of "notification values" (or 'notifications'),
+ * each of which is a 32-bit unsigned integer (uint32_t).  The constant
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
+ * array, and (for backward compatibility) defaults to 1 if left undefined.
+ * Prior to FreeRTOS V10.4.0 there was only one notification value per task.
+ *
+ * Events can be sent to a task using an intermediary object.  Examples of such
+ * objects are queues, semaphores, mutexes and event groups.  Task notifications
+ * are a method of sending an event directly to a task without the need for such
+ * an intermediary object.
+ *
+ * A notification sent to a task can optionally perform an action, such as
+ * update, overwrite or increment one of the task's notification values.  In
+ * that way task notifications can be used to send data to a task, or be used as
+ * light weight and fast binary or counting semaphores.
+ *
+ * xTaskNotifyGiveIndexed() is a helper macro intended for use when task
+ * notifications are used as light weight and faster binary or counting
+ * semaphore equivalents.  Actual FreeRTOS semaphores are given using the
+ * xSemaphoreGive() API function, the equivalent action that instead uses a task
+ * notification is xTaskNotifyGiveIndexed().
+ *
+ * When task notifications are being used as a binary or counting semaphore
+ * equivalent then the task being notified should wait for the notification
+ * using the ulTaskNotificationTakeIndexed() API function rather than the
+ * xTaskNotifyWaitIndexed() API function.
+ *
+ * **NOTE** Each notification within the array operates independently - a task
+ * can only block on one notification within the array at a time and will not be
+ * unblocked by a notification sent to any other array index.
+ *
+ * Backward compatibility information:
+ * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and
+ * all task notification API functions operated on that value. Replacing the
+ * single notification value with an array of notification values necessitated a
+ * new set of API functions that could address specific notifications within the
+ * array.  xTaskNotifyGive() is the original API function, and remains backward
+ * compatible by always operating on the notification value at index 0 in the
+ * array. Calling xTaskNotifyGive() is equivalent to calling
+ * xTaskNotifyGiveIndexed() with the uxIndexToNotify parameter set to 0.
+ *
+ * @param xTaskToNotify The handle of the task being notified.  The handle to a
+ * task can be returned from the xTaskCreate() API function used to create the
+ * task, and the handle of the currently running task can be obtained by calling
+ * xTaskGetCurrentTaskHandle().
+ *
+ * @param uxIndexToNotify The index within the target task's array of
+ * notification values to which the notification is to be sent.  uxIndexToNotify
+ * must be less than configTASK_NOTIFICATION_ARRAY_ENTRIES.  xTaskNotifyGive()
+ * does not have this parameter and always sends notifications to index 0.
+ *
+ * @return xTaskNotifyGive() is a macro that calls xTaskNotify() with the
+ * eAction parameter set to eIncrement - so pdPASS is always returned.
+ *
+ * \defgroup xTaskNotifyGiveIndexed xTaskNotifyGiveIndexed
+ * \ingroup TaskNotifications
+ */
+#define xTaskNotifyGive( xTaskToNotify ) \
+    xTaskGenericNotify( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( 0 ), eIncrement, NULL )
+#define xTaskNotifyGiveIndexed( xTaskToNotify, uxIndexToNotify ) \
+    xTaskGenericNotify( ( xTaskToNotify ), ( uxIndexToNotify ), ( 0 ), eIncrement, NULL )
+
+/**
+ * task. h
+ * 
void vTaskNotifyGiveIndexedFromISR( TaskHandle_t xTaskHandle, UBaseType_t uxIndexToNotify, BaseType_t *pxHigherPriorityTaskWoken );

+ * 
void vTaskNotifyGiveFromISR( TaskHandle_t xTaskHandle, BaseType_t *pxHigherPriorityTaskWoken );

+ *
+ * A version of xTaskNotifyGiveIndexed() that can be called from an interrupt
+ * service routine (ISR).
+ *
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for more details.
+ *
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this macro
+ * to be available.
+ *
+ * Each task has a private array of "notification values" (or 'notifications'),
+ * each of which is a 32-bit unsigned integer (uint32_t).  The constant
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
+ * array, and (for backward compatibility) defaults to 1 if left undefined.
+ * Prior to FreeRTOS V10.4.0 there was only one notification value per task.
+ *
+ * Events can be sent to a task using an intermediary object.  Examples of such
+ * objects are queues, semaphores, mutexes and event groups.  Task notifications
+ * are a method of sending an event directly to a task without the need for such
+ * an intermediary object.
+ *
+ * A notification sent to a task can optionally perform an action, such as
+ * update, overwrite or increment one of the task's notification values.  In
+ * that way task notifications can be used to send data to a task, or be used as
+ * light weight and fast binary or counting semaphores.
+ *
+ * vTaskNotifyGiveIndexedFromISR() is intended for use when task notifications
+ * are used as light weight and faster binary or counting semaphore equivalents.
+ * Actual FreeRTOS semaphores are given from an ISR using the
+ * xSemaphoreGiveFromISR() API function, the equivalent action that instead uses
+ * a task notification is vTaskNotifyGiveIndexedFromISR().
+ *
+ * When task notifications are being used as a binary or counting semaphore
+ * equivalent then the task being notified should wait for the notification
+ * using the ulTaskNotificationTakeIndexed() API function rather than the
+ * xTaskNotifyWaitIndexed() API function.
+ *
+ * **NOTE** Each notification within the array operates independently - a task
+ * can only block on one notification within the array at a time and will not be
+ * unblocked by a notification sent to any other array index.
+ *
+ * Backward compatibility information:
+ * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and
+ * all task notification API functions operated on that value. Replacing the
+ * single notification value with an array of notification values necessitated a
+ * new set of API functions that could address specific notifications within the
+ * array.  xTaskNotifyFromISR() is the original API function, and remains
+ * backward compatible by always operating on the notification value at index 0
+ * within the array. Calling xTaskNotifyGiveFromISR() is equivalent to calling
+ * xTaskNotifyGiveIndexedFromISR() with the uxIndexToNotify parameter set to 0.
+ *
+ * @param xTaskToNotify The handle of the task being notified.  The handle to a
+ * task can be returned from the xTaskCreate() API function used to create the
+ * task, and the handle of the currently running task can be obtained by calling
+ * xTaskGetCurrentTaskHandle().
+ *
+ * @param uxIndexToNotify The index within the target task's array of
+ * notification values to which the notification is to be sent.  uxIndexToNotify
+ * must be less than configTASK_NOTIFICATION_ARRAY_ENTRIES.
+ * xTaskNotifyGiveFromISR() does not have this parameter and always sends
+ * notifications to index 0.
+ *
+ * @param pxHigherPriorityTaskWoken  vTaskNotifyGiveFromISR() will set
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending the notification caused the
+ * task to which the notification was sent to leave the Blocked state, and the
+ * unblocked task has a priority higher than the currently running task.  If
+ * vTaskNotifyGiveFromISR() sets this value to pdTRUE then a context switch
+ * should be requested before the interrupt is exited.  How a context switch is
+ * requested from an ISR is dependent on the port - see the documentation page
+ * for the port in use.
+ *
+ * \defgroup vTaskNotifyGiveIndexedFromISR vTaskNotifyGiveIndexedFromISR
+ * \ingroup TaskNotifications
+ */
+void vTaskGenericNotifyGiveFromISR( TaskHandle_t xTaskToNotify,
+                                    UBaseType_t uxIndexToNotify,
+                                    BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+#define vTaskNotifyGiveFromISR( xTaskToNotify, pxHigherPriorityTaskWoken ) \
+    vTaskGenericNotifyGiveFromISR( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( pxHigherPriorityTaskWoken ) );
+#define vTaskNotifyGiveIndexedFromISR( xTaskToNotify, uxIndexToNotify, pxHigherPriorityTaskWoken ) \
+    vTaskGenericNotifyGiveFromISR( ( xTaskToNotify ), ( uxIndexToNotify ), ( pxHigherPriorityTaskWoken ) );
+
+/**
+ * task. h
+ * 
+ * uint32_t ulTaskNotifyTakeIndexed( UBaseType_t uxIndexToWaitOn, BaseType_t xClearCountOnExit, TickType_t xTicksToWait );
+ * 
+ * uint32_t ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait );
+ * 

+ *
+ * Waits for a direct to task notification on a particular index in the calling
+ * task's notification array in a manner similar to taking a counting semaphore.
+ *
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
+ *
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this
+ * function to be available.
+ *
+ * Each task has a private array of "notification values" (or 'notifications'),
+ * each of which is a 32-bit unsigned integer (uint32_t).  The constant
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
+ * array, and (for backward compatibility) defaults to 1 if left undefined.
+ * Prior to FreeRTOS V10.4.0 there was only one notification value per task.
+ *
+ * Events can be sent to a task using an intermediary object.  Examples of such
+ * objects are queues, semaphores, mutexes and event groups.  Task notifications
+ * are a method of sending an event directly to a task without the need for such
+ * an intermediary object.
+ *
+ * A notification sent to a task can optionally perform an action, such as
+ * update, overwrite or increment one of the task's notification values.  In
+ * that way task notifications can be used to send data to a task, or be used as
+ * light weight and fast binary or counting semaphores.
+ *
+ * ulTaskNotifyTakeIndexed() is intended for use when a task notification is
+ * used as a faster and lighter weight binary or counting semaphore alternative.
+ * Actual FreeRTOS semaphores are taken using the xSemaphoreTake() API function,
+ * the equivalent action that instead uses a task notification is
+ * ulTaskNotifyTakeIndexed().
+ *
+ * When a task is using its notification value as a binary or counting semaphore
+ * other tasks should send notifications to it using the xTaskNotifyGiveIndexed()
+ * macro, or xTaskNotifyIndex() function with the eAction parameter set to
+ * eIncrement.
+ *
+ * ulTaskNotifyTakeIndexed() can either clear the task's notification value at
+ * the array index specified by the uxIndexToWaitOn parameter to zero on exit,
+ * in which case the notification value acts like a binary semaphore, or
+ * decrement the notification value on exit, in which case the notification
+ * value acts like a counting semaphore.
+ *
+ * A task can use ulTaskNotifyTakeIndexed() to [optionally] block to wait for
+ * the task's notification value to be non-zero.  The task does not consume any
+ * CPU time while it is in the Blocked state.
+ *
+ * Where as xTaskNotifyWaitIndexed() will return when a notification is pending,
+ * ulTaskNotifyTakeIndexed() will return when the task's notification value is
+ * not zero.
+ *
+ * **NOTE** Each notification within the array operates independently - a task
+ * can only block on one notification within the array at a time and will not be
+ * unblocked by a notification sent to any other array index.
+ *
+ * Backward compatibility information:
+ * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and
+ * all task notification API functions operated on that value. Replacing the
+ * single notification value with an array of notification values necessitated a
+ * new set of API functions that could address specific notifications within the
+ * array.  ulTaskNotifyTake() is the original API function, and remains backward
+ * compatible by always operating on the notification value at index 0 in the
+ * array. Calling ulTaskNotifyTake() is equivalent to calling
+ * ulTaskNotifyTakeIndexed() with the uxIndexToWaitOn parameter set to 0.
+ *
+ * @param uxIndexToWaitOn The index within the calling task's array of
+ * notification values on which the calling task will wait for a notification to
+ * be non-zero.  uxIndexToWaitOn must be less than
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES.  xTaskNotifyTake() does
+ * not have this parameter and always waits for notifications on index 0.
+ *
+ * @param xClearCountOnExit if xClearCountOnExit is pdFALSE then the task's
+ * notification value is decremented when the function exits.  In this way the
+ * notification value acts like a counting semaphore.  If xClearCountOnExit is
+ * not pdFALSE then the task's notification value is cleared to zero when the
+ * function exits.  In this way the notification value acts like a binary
+ * semaphore.
+ *
+ * @param xTicksToWait The maximum amount of time that the task should wait in
+ * the Blocked state for the task's notification value to be greater than zero,
+ * should the count not already be greater than zero when
+ * ulTaskNotifyTake() was called.  The task will not consume any processing
+ * time while it is in the Blocked state.  This is specified in kernel ticks,
+ * the macro pdMS_TO_TICSK( value_in_ms ) can be used to convert a time
+ * specified in milliseconds to a time specified in ticks.
+ *
+ * @return The task's notification count before it is either cleared to zero or
+ * decremented (see the xClearCountOnExit parameter).
+ *
+ * \defgroup ulTaskNotifyTakeIndexed ulTaskNotifyTakeIndexed
+ * \ingroup TaskNotifications
+ */
+uint32_t ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn,
+                                  BaseType_t xClearCountOnExit,
+                                  TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+#define ulTaskNotifyTake( xClearCountOnExit, xTicksToWait ) \
+    ulTaskGenericNotifyTake( ( tskDEFAULT_INDEX_TO_NOTIFY ), ( xClearCountOnExit ), ( xTicksToWait ) )
+#define ulTaskNotifyTakeIndexed( uxIndexToWaitOn, xClearCountOnExit, xTicksToWait ) \
+    ulTaskGenericNotifyTake( ( uxIndexToWaitOn ), ( xClearCountOnExit ), ( xTicksToWait ) )
+
+/**
+ * task. h
+ * 
+ * BaseType_t xTaskNotifyStateClearIndexed( TaskHandle_t xTask, UBaseType_t uxIndexToCLear );
+ * 
+ * BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask );
+ * 

+ *
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
+ *
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for these
+ * functions to be available.
+ *
+ * Each task has a private array of "notification values" (or 'notifications'),
+ * each of which is a 32-bit unsigned integer (uint32_t).  The constant
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
+ * array, and (for backward compatibility) defaults to 1 if left undefined.
+ * Prior to FreeRTOS V10.4.0 there was only one notification value per task.
+ *
+ * If a notification is sent to an index within the array of notifications then
+ * the notification at that index is said to be 'pending' until it is read or
+ * explicitly cleared by the receiving task.  xTaskNotifyStateClearIndexed()
+ * is the function that clears a pending notification without reading the
+ * notification value.  The notification value at the same array index is not
+ * altered.  Set xTask to NULL to clear the notification state of the calling
+ * task.
+ *
+ * Backward compatibility information:
+ * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and
+ * all task notification API functions operated on that value. Replacing the
+ * single notification value with an array of notification values necessitated a
+ * new set of API functions that could address specific notifications within the
+ * array.  xTaskNotifyStateClear() is the original API function, and remains
+ * backward compatible by always operating on the notification value at index 0
+ * within the array. Calling xTaskNotifyStateClear() is equivalent to calling
+ * xTaskNotifyStateClearIndexed() with the uxIndexToNotify parameter set to 0.
+ *
+ * @param xTask The handle of the RTOS task that will have a notification state
+ * cleared.  Set xTask to NULL to clear a notification state in the calling
+ * task.  To obtain a task's handle create the task using xTaskCreate() and
+ * make use of the pxCreatedTask parameter, or create the task using
+ * xTaskCreateStatic() and store the returned value, or use the task's name in
+ * a call to xTaskGetHandle().
+ *
+ * @param uxIndexToClear The index within the target task's array of
+ * notification values to act upon.  For example, setting uxIndexToClear to 1
+ * will clear the state of the notification at index 1 within the array.
+ * uxIndexToClear must be less than configTASK_NOTIFICATION_ARRAY_ENTRIES.
+ * ulTaskNotifyStateClear() does not have this parameter and always acts on the
+ * notification at index 0.
+ *
+ * @return pdTRUE if the task's notification state was set to
+ * eNotWaitingNotification, otherwise pdFALSE.
+ *
+ * \defgroup xTaskNotifyStateClearIndexed xTaskNotifyStateClearIndexed
+ * \ingroup TaskNotifications
+ */
+BaseType_t xTaskGenericNotifyStateClear( TaskHandle_t xTask,
+                                         UBaseType_t uxIndexToClear ) PRIVILEGED_FUNCTION;
+#define xTaskNotifyStateClear( xTask ) \
+    xTaskGenericNotifyStateClear( ( xTask ), ( tskDEFAULT_INDEX_TO_NOTIFY ) )
+#define xTaskNotifyStateClearIndexed( xTask, uxIndexToClear ) \
+    xTaskGenericNotifyStateClear( ( xTask ), ( uxIndexToClear ) )
+
+/**
+ * task. h
+ * 
+ * uint32_t ulTaskNotifyValueClearIndexed( TaskHandle_t xTask, UBaseType_t uxIndexToClear, uint32_t ulBitsToClear );
+ * 
+ * uint32_t ulTaskNotifyValueClear( TaskHandle_t xTask, uint32_t ulBitsToClear );
+ * 

+ *
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
+ *
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for these
+ * functions to be available.
+ *
+ * Each task has a private array of "notification values" (or 'notifications'),
+ * each of which is a 32-bit unsigned integer (uint32_t).  The constant
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
+ * array, and (for backward compatibility) defaults to 1 if left undefined.
+ * Prior to FreeRTOS V10.4.0 there was only one notification value per task.
+ *
+ * ulTaskNotifyValueClearIndexed() clears the bits specified by the
+ * ulBitsToClear bit mask in the notification value at array index uxIndexToClear
+ * of the task referenced by xTask.
+ *
+ * Backward compatibility information:
+ * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and
+ * all task notification API functions operated on that value. Replacing the
+ * single notification value with an array of notification values necessitated a
+ * new set of API functions that could address specific notifications within the
+ * array.  ulTaskNotifyValueClear() is the original API function, and remains
+ * backward compatible by always operating on the notification value at index 0
+ * within the array. Calling ulTaskNotifyValueClear() is equivalent to calling
+ * ulTaskNotifyValueClearIndexed() with the uxIndexToClear parameter set to 0.
+ *
+ * @param xTask The handle of the RTOS task that will have bits in one of its
+ * notification values cleared. Set xTask to NULL to clear bits in a
+ * notification value of the calling task.  To obtain a task's handle create the
+ * task using xTaskCreate() and make use of the pxCreatedTask parameter, or
+ * create the task using xTaskCreateStatic() and store the returned value, or
+ * use the task's name in a call to xTaskGetHandle().
+ *
+ * @param uxIndexToClear The index within the target task's array of
+ * notification values in which to clear the bits.  uxIndexToClear
+ * must be less than configTASK_NOTIFICATION_ARRAY_ENTRIES.
+ * ulTaskNotifyValueClear() does not have this parameter and always clears bits
+ * in the notification value at index 0.
+ *
+ * @param ulBitsToClear Bit mask of the bits to clear in the notification value of
+ * xTask. Set a bit to 1 to clear the corresponding bits in the task's notification
+ * value. Set ulBitsToClear to 0xffffffff (UINT_MAX on 32-bit architectures) to clear
+ * the notification value to 0.  Set ulBitsToClear to 0 to query the task's
+ * notification value without clearing any bits.
+ *
+ *
+ * @return The value of the target task's notification value before the bits
+ * specified by ulBitsToClear were cleared.
+ * \defgroup ulTaskNotifyValueClear ulTaskNotifyValueClear
+ * \ingroup TaskNotifications
+ */
+uint32_t ulTaskGenericNotifyValueClear( TaskHandle_t xTask,
+                                        UBaseType_t uxIndexToClear,
+                                        uint32_t ulBitsToClear ) PRIVILEGED_FUNCTION;
+#define ulTaskNotifyValueClear( xTask, ulBitsToClear ) \
+    ulTaskGenericNotifyValueClear( ( xTask ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulBitsToClear ) )
+#define ulTaskNotifyValueClearIndexed( xTask, uxIndexToClear, ulBitsToClear ) \
+    ulTaskGenericNotifyValueClear( ( xTask ), ( uxIndexToClear ), ( ulBitsToClear ) )
+
+/**
+ * task.h
+ * 
+ * void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut );
+ * 

+ *
+ * Capture the current time for future use with xTaskCheckForTimeOut().
+ *
+ * @param pxTimeOut Pointer to a timeout object into which the current time
+ * is to be captured.  The captured time includes the tick count and the number
+ * of times the tick count has overflowed since the system first booted.
+ * \defgroup vTaskSetTimeOutState vTaskSetTimeOutState
+ * \ingroup TaskCtrl
+ */
+void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNCTION;
+
+/**
+ * task.h
+ * 
+ * BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait );
+ * 

+ *
+ * Determines if pxTicksToWait ticks has passed since a time was captured
+ * using a call to vTaskSetTimeOutState().  The captured time includes the tick
+ * count and the number of times the tick count has overflowed.
+ *
+ * @param pxTimeOut The time status as captured previously using
+ * vTaskSetTimeOutState. If the timeout has not yet occurred, it is updated
+ * to reflect the current time status.
+ * @param pxTicksToWait The number of ticks to check for timeout i.e. if
+ * pxTicksToWait ticks have passed since pxTimeOut was last updated (either by
+ * vTaskSetTimeOutState() or xTaskCheckForTimeOut()), the timeout has occurred.
+ * If the timeout has not occurred, pxTIcksToWait is updated to reflect the
+ * number of remaining ticks.
+ *
+ * @return If timeout has occurred, pdTRUE is returned. Otherwise pdFALSE is
+ * returned and pxTicksToWait is updated to reflect the number of remaining
+ * ticks.
+ *
+ * @see https://www.FreeRTOS.org/xTaskCheckForTimeOut.html
+ *
+ * Example Usage:
+ * 
+ *  // Driver library function used to receive uxWantedBytes from an Rx buffer
+ *  // that is filled by a UART interrupt. If there are not enough bytes in the
+ *  // Rx buffer then the task enters the Blocked state until it is notified that
+ *  // more data has been placed into the buffer. If there is still not enough
+ *  // data then the task re-enters the Blocked state, and xTaskCheckForTimeOut()
+ *  // is used to re-calculate the Block time to ensure the total amount of time
+ *  // spent in the Blocked state does not exceed MAX_TIME_TO_WAIT. This
+ *  // continues until either the buffer contains at least uxWantedBytes bytes,
+ *  // or the total amount of time spent in the Blocked state reaches
+ *  // MAX_TIME_TO_WAIT – at which point the task reads however many bytes are
+ *  // available up to a maximum of uxWantedBytes.
+ *
+ *  size_t xUART_Receive( uint8_t *pucBuffer, size_t uxWantedBytes )
+ *  {
+ *  size_t uxReceived = 0;
+ *  TickType_t xTicksToWait = MAX_TIME_TO_WAIT;
+ *  TimeOut_t xTimeOut;
+ *
+ *      // Initialize xTimeOut.  This records the time at which this function
+ *      // was entered.
+ *      vTaskSetTimeOutState( &xTimeOut );
+ *
+ *      // Loop until the buffer contains the wanted number of bytes, or a
+ *      // timeout occurs.
+ *      while( UART_bytes_in_rx_buffer( pxUARTInstance ) < uxWantedBytes )
+ *      {
+ *          // The buffer didn't contain enough data so this task is going to
+ *          // enter the Blocked state. Adjusting xTicksToWait to account for
+ *          // any time that has been spent in the Blocked state within this
+ *          // function so far to ensure the total amount of time spent in the
+ *          // Blocked state does not exceed MAX_TIME_TO_WAIT.
+ *          if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) != pdFALSE )
+ *          {
+ *              //Timed out before the wanted number of bytes were available,
+ *              // exit the loop.
+ *              break;
+ *          }
+ *
+ *          // Wait for a maximum of xTicksToWait ticks to be notified that the
+ *          // receive interrupt has placed more data into the buffer.
+ *          ulTaskNotifyTake( pdTRUE, xTicksToWait );
+ *      }
+ *
+ *      // Attempt to read uxWantedBytes from the receive buffer into pucBuffer.
+ *      // The actual number of bytes read (which might be less than
+ *      // uxWantedBytes) is returned.
+ *      uxReceived = UART_read_from_receive_buffer( pxUARTInstance,
+ *                                                  pucBuffer,
+ *                                                  uxWantedBytes );
+ *
+ *      return uxReceived;
+ *  }
+ * 

+ * \defgroup xTaskCheckForTimeOut xTaskCheckForTimeOut
+ * \ingroup TaskCtrl
+ */
+BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut,
+                                 TickType_t * const pxTicksToWait ) PRIVILEGED_FUNCTION;
+
+/**
+ * task.h
+ * 
+ * BaseType_t xTaskCatchUpTicks( TickType_t xTicksToCatchUp );
+ * 

+ *
+ * This function corrects the tick count value after the application code has held
+ * interrupts disabled for an extended period resulting in tick interrupts having
+ * been missed.
+ *
+ * This function is similar to vTaskStepTick(), however, unlike
+ * vTaskStepTick(), xTaskCatchUpTicks() may move the tick count forward past a
+ * time at which a task should be removed from the blocked state.  That means
+ * tasks may have to be removed from the blocked state as the tick count is
+ * moved.
+ *
+ * @param xTicksToCatchUp The number of tick interrupts that have been missed due to
+ * interrupts being disabled.  Its value is not computed automatically, so must be
+ * computed by the application writer.
+ *
+ * @return pdTRUE if moving the tick count forward resulted in a task leaving the
+ * blocked state and a context switch being performed.  Otherwise pdFALSE.
+ *
+ * \defgroup xTaskCatchUpTicks xTaskCatchUpTicks
+ * \ingroup TaskCtrl
+ */
+BaseType_t xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) PRIVILEGED_FUNCTION;
+
+
+/*-----------------------------------------------------------
+* SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES
+*----------------------------------------------------------*/
+
+/*
+ * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS ONLY
+ * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS
+ * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
+ *
+ * Called from the real time kernel tick (either preemptive or cooperative),
+ * this increments the tick count and checks if any tasks that are blocked
+ * for a finite period required removing from a blocked list and placing on
+ * a ready list.  If a non-zero value is returned then a context switch is
+ * required because either:
+ *   + A task was removed from a blocked list because its timeout had expired,
+ *     or
+ *   + Time slicing is in use and there is a task of equal priority to the
+ *     currently running task.
+ */
+BaseType_t xTaskIncrementTick( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS AN
+ * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
+ *
+ * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.
+ *
+ * Removes the calling task from the ready list and places it both
+ * on the list of tasks waiting for a particular event, and the
+ * list of delayed tasks.  The task will be removed from both lists
+ * and replaced on the ready list should either the event occur (and
+ * there be no higher priority tasks waiting on the same event) or
+ * the delay period expires.
+ *
+ * The 'unordered' version replaces the event list item value with the
+ * xItemValue value, and inserts the list item at the end of the list.
+ *
+ * The 'ordered' version uses the existing event list item value (which is the
+ * owning tasks priority) to insert the list item into the event list is task
+ * priority order.
+ *
+ * @param pxEventList The list containing tasks that are blocked waiting
+ * for the event to occur.
+ *
+ * @param xItemValue The item value to use for the event list item when the
+ * event list is not ordered by task priority.
+ *
+ * @param xTicksToWait The maximum amount of time that the task should wait
+ * for the event to occur.  This is specified in kernel ticks,the constant
+ * portTICK_PERIOD_MS can be used to convert kernel ticks into a real time
+ * period.
+ */
+void vTaskPlaceOnEventList( List_t * const pxEventList,
+                            const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+void vTaskPlaceOnUnorderedEventList( List_t * pxEventList,
+                                     const TickType_t xItemValue,
+                                     const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/*
+ * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS AN
+ * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
+ *
+ * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.
+ *
+ * This function performs nearly the same function as vTaskPlaceOnEventList().
+ * The difference being that this function does not permit tasks to block
+ * indefinitely, whereas vTaskPlaceOnEventList() does.
+ *
+ */
+void vTaskPlaceOnEventListRestricted( List_t * const pxEventList,
+                                      TickType_t xTicksToWait,
+                                      const BaseType_t xWaitIndefinitely ) PRIVILEGED_FUNCTION;
+
+/*
+ * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS AN
+ * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
+ *
+ * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.
+ *
+ * Removes a task from both the specified event list and the list of blocked
+ * tasks, and places it on a ready queue.
+ *
+ * xTaskRemoveFromEventList()/vTaskRemoveFromUnorderedEventList() will be called
+ * if either an event occurs to unblock a task, or the block timeout period
+ * expires.
+ *
+ * xTaskRemoveFromEventList() is used when the event list is in task priority
+ * order.  It removes the list item from the head of the event list as that will
+ * have the highest priority owning task of all the tasks on the event list.
+ * vTaskRemoveFromUnorderedEventList() is used when the event list is not
+ * ordered and the event list items hold something other than the owning tasks
+ * priority.  In this case the event list item value is updated to the value
+ * passed in the xItemValue parameter.
+ *
+ * @return pdTRUE if the task being removed has a higher priority than the task
+ * making the call, otherwise pdFALSE.
+ */
+BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList ) PRIVILEGED_FUNCTION;
+void vTaskRemoveFromUnorderedEventList( ListItem_t * pxEventListItem,
+                                        const TickType_t xItemValue ) PRIVILEGED_FUNCTION;
+
+/*
+ * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS ONLY
+ * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS
+ * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
+ *
+ * Sets the pointer to the current TCB to the TCB of the highest priority task
+ * that is ready to run.
+ */
+portDONT_DISCARD void vTaskSwitchContext( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * THESE FUNCTIONS MUST NOT BE USED FROM APPLICATION CODE.  THEY ARE USED BY
+ * THE EVENT BITS MODULE.
+ */
+TickType_t uxTaskResetEventItemValue( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * Return the handle of the calling task.
+ */
+TaskHandle_t xTaskGetCurrentTaskHandle( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * Shortcut used by the queue implementation to prevent unnecessary call to
+ * taskYIELD();
+ */
+void vTaskMissedYield( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * Returns the scheduler state as taskSCHEDULER_RUNNING,
+ * taskSCHEDULER_NOT_STARTED or taskSCHEDULER_SUSPENDED.
+ */
+BaseType_t xTaskGetSchedulerState( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * Raises the priority of the mutex holder to that of the calling task should
+ * the mutex holder have a priority less than the calling task.
+ */
+BaseType_t xTaskPriorityInherit( TaskHandle_t const pxMutexHolder ) PRIVILEGED_FUNCTION;
+
+/*
+ * Set the priority of a task back to its proper priority in the case that it
+ * inherited a higher priority while it was holding a semaphore.
+ */
+BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder ) PRIVILEGED_FUNCTION;
+
+/*
+ * If a higher priority task attempting to obtain a mutex caused a lower
+ * priority task to inherit the higher priority task's priority - but the higher
+ * priority task then timed out without obtaining the mutex, then the lower
+ * priority task will disinherit the priority again - but only down as far as
+ * the highest priority task that is still waiting for the mutex (if there were
+ * more than one task waiting for the mutex).
+ */
+void vTaskPriorityDisinheritAfterTimeout( TaskHandle_t const pxMutexHolder,
+                                          UBaseType_t uxHighestPriorityWaitingTask ) PRIVILEGED_FUNCTION;
+
+/*
+ * Get the uxTCBNumber assigned to the task referenced by the xTask parameter.
+ */
+UBaseType_t uxTaskGetTaskNumber( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+/*
+ * Set the uxTaskNumber of the task referenced by the xTask parameter to
+ * uxHandle.
+ */
+void vTaskSetTaskNumber( TaskHandle_t xTask,
+                         const UBaseType_t uxHandle ) PRIVILEGED_FUNCTION;
+
+/*
+ * Only available when configUSE_TICKLESS_IDLE is set to 1.
+ * If tickless mode is being used, or a low power mode is implemented, then
+ * the tick interrupt will not execute during idle periods.  When this is the
+ * case, the tick count value maintained by the scheduler needs to be kept up
+ * to date with the actual execution time by being skipped forward by a time
+ * equal to the idle period.
+ */
+void vTaskStepTick( const TickType_t xTicksToJump ) PRIVILEGED_FUNCTION;
+
+/*
+ * Only available when configUSE_TICKLESS_IDLE is set to 1.
+ * Provided for use within portSUPPRESS_TICKS_AND_SLEEP() to allow the port
+ * specific sleep function to determine if it is ok to proceed with the sleep,
+ * and if it is ok to proceed, if it is ok to sleep indefinitely.
+ *
+ * This function is necessary because portSUPPRESS_TICKS_AND_SLEEP() is only
+ * called with the scheduler suspended, not from within a critical section.  It
+ * is therefore possible for an interrupt to request a context switch between
+ * portSUPPRESS_TICKS_AND_SLEEP() and the low power mode actually being
+ * entered.  eTaskConfirmSleepModeStatus() should be called from a short
+ * critical section between the timer being stopped and the sleep mode being
+ * entered to ensure it is ok to proceed into the sleep mode.
+ */
+eSleepModeStatus eTaskConfirmSleepModeStatus( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * For internal use only.  Increment the mutex held count when a mutex is
+ * taken and return the handle of the task that has taken the mutex.
+ */
+TaskHandle_t pvTaskIncrementMutexHeldCount( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * For internal use only.  Same as vTaskSetTimeOutState(), but without a critical
+ * section.
+ */
+void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNCTION;
+
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+#endif /* INC_TASK_H */
diff --git a/include/timers.h b/include/timers.h
index 9ee2a0ce6..ba5c41326 100644
--- a/include/timers.h
+++ b/include/timers.h
@@ -1,1309 +1,1351 @@
-/*
- * FreeRTOS Kernel V10.3.1
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-
-#ifndef TIMERS_H
-#define TIMERS_H
-
-#ifndef INC_FREERTOS_H
-	#error "include FreeRTOS.h must appear in source files before include timers.h"
-#endif
-
-/*lint -save -e537 This headers are only multiply included if the application code
-happens to also be including task.h. */
-#include "task.h"
-/*lint -restore */
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*-----------------------------------------------------------
- * MACROS AND DEFINITIONS
- *----------------------------------------------------------*/
-
-/* IDs for commands that can be sent/received on the timer queue.  These are to
-be used solely through the macros that make up the public software timer API,
-as defined below.  The commands that are sent from interrupts must use the
-highest numbers as tmrFIRST_FROM_ISR_COMMAND is used to determine if the task
-or interrupt version of the queue send function should be used. */
-#define tmrCOMMAND_EXECUTE_CALLBACK_FROM_ISR 	( ( BaseType_t ) -2 )
-#define tmrCOMMAND_EXECUTE_CALLBACK				( ( BaseType_t ) -1 )
-#define tmrCOMMAND_START_DONT_TRACE				( ( BaseType_t ) 0 )
-#define tmrCOMMAND_START					    ( ( BaseType_t ) 1 )
-#define tmrCOMMAND_RESET						( ( BaseType_t ) 2 )
-#define tmrCOMMAND_STOP							( ( BaseType_t ) 3 )
-#define tmrCOMMAND_CHANGE_PERIOD				( ( BaseType_t ) 4 )
-#define tmrCOMMAND_DELETE						( ( BaseType_t ) 5 )
-
-#define tmrFIRST_FROM_ISR_COMMAND				( ( BaseType_t ) 6 )
-#define tmrCOMMAND_START_FROM_ISR				( ( BaseType_t ) 6 )
-#define tmrCOMMAND_RESET_FROM_ISR				( ( BaseType_t ) 7 )
-#define tmrCOMMAND_STOP_FROM_ISR				( ( BaseType_t ) 8 )
-#define tmrCOMMAND_CHANGE_PERIOD_FROM_ISR		( ( BaseType_t ) 9 )
-
-
-/**
- * Type by which software timers are referenced.  For example, a call to
- * xTimerCreate() returns an TimerHandle_t variable that can then be used to
- * reference the subject timer in calls to other software timer API functions
- * (for example, xTimerStart(), xTimerReset(), etc.).
- */
-struct tmrTimerControl; /* The old naming convention is used to prevent breaking kernel aware debuggers. */
-typedef struct tmrTimerControl * TimerHandle_t;
-
-/*
- * Defines the prototype to which timer callback functions must conform.
- */
-typedef void (*TimerCallbackFunction_t)( TimerHandle_t xTimer );
-
-/*
- * Defines the prototype to which functions used with the
- * xTimerPendFunctionCallFromISR() function must conform.
- */
-typedef void (*PendedFunction_t)( void *, uint32_t );
-
-/**
- * TimerHandle_t xTimerCreate( 	const char * const pcTimerName,
- * 								TickType_t xTimerPeriodInTicks,
- * 								UBaseType_t uxAutoReload,
- * 								void * pvTimerID,
- * 								TimerCallbackFunction_t pxCallbackFunction );
- *
- * Creates a new software timer instance, and returns a handle by which the
- * created software timer can be referenced.
- *
- * Internally, within the FreeRTOS implementation, software timers use a block
- * of memory, in which the timer data structure is stored.  If a software timer
- * is created using xTimerCreate() then the required memory is automatically
- * dynamically allocated inside the xTimerCreate() function.  (see
- * http://www.freertos.org/a00111.html).  If a software timer is created using
- * xTimerCreateStatic() then the application writer must provide the memory that
- * will get used by the software timer.  xTimerCreateStatic() therefore allows a
- * software timer to be created without using any dynamic memory allocation.
- *
- * Timers are created in the dormant state.  The xTimerStart(), xTimerReset(),
- * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and
- * xTimerChangePeriodFromISR() API functions can all be used to transition a
- * timer into the active state.
- *
- * @param pcTimerName A text name that is assigned to the timer.  This is done
- * purely to assist debugging.  The kernel itself only ever references a timer
- * by its handle, and never by its name.
- *
- * @param xTimerPeriodInTicks The timer period.  The time is defined in tick
- * periods so the constant portTICK_PERIOD_MS can be used to convert a time that
- * has been specified in milliseconds.  For example, if the timer must expire
- * after 100 ticks, then xTimerPeriodInTicks should be set to 100.
- * Alternatively, if the timer must expire after 500ms, then xPeriod can be set
- * to ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than or
- * equal to 1000.  Time timer period must be greater than 0.
- *
- * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will
- * expire repeatedly with a frequency set by the xTimerPeriodInTicks parameter.
- * If uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and
- * enter the dormant state after it expires.
- *
- * @param pvTimerID An identifier that is assigned to the timer being created.
- * Typically this would be used in the timer callback function to identify which
- * timer expired when the same callback function is assigned to more than one
- * timer.
- *
- * @param pxCallbackFunction The function to call when the timer expires.
- * Callback functions must have the prototype defined by TimerCallbackFunction_t,
- * which is	"void vCallbackFunction( TimerHandle_t xTimer );".
- *
- * @return If the timer is successfully created then a handle to the newly
- * created timer is returned.  If the timer cannot be created because there is
- * insufficient FreeRTOS heap remaining to allocate the timer
- * structures then NULL is returned.
- *
- * Example usage:
- * @verbatim
- * #define NUM_TIMERS 5
- *
- * // An array to hold handles to the created timers.
- * TimerHandle_t xTimers[ NUM_TIMERS ];
- *
- * // An array to hold a count of the number of times each timer expires.
- * int32_t lExpireCounters[ NUM_TIMERS ] = { 0 };
- *
- * // Define a callback function that will be used by multiple timer instances.
- * // The callback function does nothing but count the number of times the
- * // associated timer expires, and stop the timer once the timer has expired
- * // 10 times.
- * void vTimerCallback( TimerHandle_t pxTimer )
- * {
- * int32_t lArrayIndex;
- * const int32_t xMaxExpiryCountBeforeStopping = 10;
- *
- * 	   // Optionally do something if the pxTimer parameter is NULL.
- * 	   configASSERT( pxTimer );
- *
- *     // Which timer expired?
- *     lArrayIndex = ( int32_t ) pvTimerGetTimerID( pxTimer );
- *
- *     // Increment the number of times that pxTimer has expired.
- *     lExpireCounters[ lArrayIndex ] += 1;
- *
- *     // If the timer has expired 10 times then stop it from running.
- *     if( lExpireCounters[ lArrayIndex ] == xMaxExpiryCountBeforeStopping )
- *     {
- *         // Do not use a block time if calling a timer API function from a
- *         // timer callback function, as doing so could cause a deadlock!
- *         xTimerStop( pxTimer, 0 );
- *     }
- * }
- *
- * void main( void )
- * {
- * int32_t x;
- *
- *     // Create then start some timers.  Starting the timers before the scheduler
- *     // has been started means the timers will start running immediately that
- *     // the scheduler starts.
- *     for( x = 0; x < NUM_TIMERS; x++ )
- *     {
- *         xTimers[ x ] = xTimerCreate(    "Timer",       // Just a text name, not used by the kernel.
- *                                         ( 100 * x ),   // The timer period in ticks.
- *                                         pdTRUE,        // The timers will auto-reload themselves when they expire.
- *                                         ( void * ) x,  // Assign each timer a unique id equal to its array index.
- *                                         vTimerCallback // Each timer calls the same callback when it expires.
- *                                     );
- *
- *         if( xTimers[ x ] == NULL )
- *         {
- *             // The timer was not created.
- *         }
- *         else
- *         {
- *             // Start the timer.  No block time is specified, and even if one was
- *             // it would be ignored because the scheduler has not yet been
- *             // started.
- *             if( xTimerStart( xTimers[ x ], 0 ) != pdPASS )
- *             {
- *                 // The timer could not be set into the Active state.
- *             }
- *         }
- *     }
- *
- *     // ...
- *     // Create tasks here.
- *     // ...
- *
- *     // Starting the scheduler will start the timers running as they have already
- *     // been set into the active state.
- *     vTaskStartScheduler();
- *
- *     // Should not reach here.
- *     for( ;; );
- * }
- * @endverbatim
- */
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-	TimerHandle_t xTimerCreate(	const char * const pcTimerName,			/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-								const TickType_t xTimerPeriodInTicks,
-								const UBaseType_t uxAutoReload,
-								void * const pvTimerID,
-								TimerCallbackFunction_t pxCallbackFunction ) PRIVILEGED_FUNCTION;
-#endif
-
-/**
- * TimerHandle_t xTimerCreateStatic(const char * const pcTimerName,
- * 									TickType_t xTimerPeriodInTicks,
- * 									UBaseType_t uxAutoReload,
- * 									void * pvTimerID,
- * 									TimerCallbackFunction_t pxCallbackFunction,
- *									StaticTimer_t *pxTimerBuffer );
- *
- * Creates a new software timer instance, and returns a handle by which the
- * created software timer can be referenced.
- *
- * Internally, within the FreeRTOS implementation, software timers use a block
- * of memory, in which the timer data structure is stored.  If a software timer
- * is created using xTimerCreate() then the required memory is automatically
- * dynamically allocated inside the xTimerCreate() function.  (see
- * http://www.freertos.org/a00111.html).  If a software timer is created using
- * xTimerCreateStatic() then the application writer must provide the memory that
- * will get used by the software timer.  xTimerCreateStatic() therefore allows a
- * software timer to be created without using any dynamic memory allocation.
- *
- * Timers are created in the dormant state.  The xTimerStart(), xTimerReset(),
- * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and
- * xTimerChangePeriodFromISR() API functions can all be used to transition a
- * timer into the active state.
- *
- * @param pcTimerName A text name that is assigned to the timer.  This is done
- * purely to assist debugging.  The kernel itself only ever references a timer
- * by its handle, and never by its name.
- *
- * @param xTimerPeriodInTicks The timer period.  The time is defined in tick
- * periods so the constant portTICK_PERIOD_MS can be used to convert a time that
- * has been specified in milliseconds.  For example, if the timer must expire
- * after 100 ticks, then xTimerPeriodInTicks should be set to 100.
- * Alternatively, if the timer must expire after 500ms, then xPeriod can be set
- * to ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than or
- * equal to 1000.  The timer period must be greater than 0.
- *
- * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will
- * expire repeatedly with a frequency set by the xTimerPeriodInTicks parameter.
- * If uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and
- * enter the dormant state after it expires.
- *
- * @param pvTimerID An identifier that is assigned to the timer being created.
- * Typically this would be used in the timer callback function to identify which
- * timer expired when the same callback function is assigned to more than one
- * timer.
- *
- * @param pxCallbackFunction The function to call when the timer expires.
- * Callback functions must have the prototype defined by TimerCallbackFunction_t,
- * which is "void vCallbackFunction( TimerHandle_t xTimer );".
- *
- * @param pxTimerBuffer Must point to a variable of type StaticTimer_t, which
- * will be then be used to hold the software timer's data structures, removing
- * the need for the memory to be allocated dynamically.
- *
- * @return If the timer is created then a handle to the created timer is
- * returned.  If pxTimerBuffer was NULL then NULL is returned.
- *
- * Example usage:
- * @verbatim
- *
- * // The buffer used to hold the software timer's data structure.
- * static StaticTimer_t xTimerBuffer;
- *
- * // A variable that will be incremented by the software timer's callback
- * // function.
- * UBaseType_t uxVariableToIncrement = 0;
- *
- * // A software timer callback function that increments a variable passed to
- * // it when the software timer was created.  After the 5th increment the
- * // callback function stops the software timer.
- * static void prvTimerCallback( TimerHandle_t xExpiredTimer )
- * {
- * UBaseType_t *puxVariableToIncrement;
- * BaseType_t xReturned;
- *
- *     // Obtain the address of the variable to increment from the timer ID.
- *     puxVariableToIncrement = ( UBaseType_t * ) pvTimerGetTimerID( xExpiredTimer );
- *
- *     // Increment the variable to show the timer callback has executed.
- *     ( *puxVariableToIncrement )++;
- *
- *     // If this callback has executed the required number of times, stop the
- *     // timer.
- *     if( *puxVariableToIncrement == 5 )
- *     {
- *         // This is called from a timer callback so must not block.
- *         xTimerStop( xExpiredTimer, staticDONT_BLOCK );
- *     }
- * }
- *
- *
- * void main( void )
- * {
- *     // Create the software time.  xTimerCreateStatic() has an extra parameter
- *     // than the normal xTimerCreate() API function.  The parameter is a pointer
- *     // to the StaticTimer_t structure that will hold the software timer
- *     // structure.  If the parameter is passed as NULL then the structure will be
- *     // allocated dynamically, just as if xTimerCreate() had been called.
- *     xTimer = xTimerCreateStatic( "T1",             // Text name for the task.  Helps debugging only.  Not used by FreeRTOS.
- *                                  xTimerPeriod,     // The period of the timer in ticks.
- *                                  pdTRUE,           // This is an auto-reload timer.
- *                                  ( void * ) &uxVariableToIncrement,    // A variable incremented by the software timer's callback function
- *                                  prvTimerCallback, // The function to execute when the timer expires.
- *                                  &xTimerBuffer );  // The buffer that will hold the software timer structure.
- *
- *     // The scheduler has not started yet so a block time is not used.
- *     xReturned = xTimerStart( xTimer, 0 );
- *
- *     // ...
- *     // Create tasks here.
- *     // ...
- *
- *     // Starting the scheduler will start the timers running as they have already
- *     // been set into the active state.
- *     vTaskStartScheduler();
- *
- *     // Should not reach here.
- *     for( ;; );
- * }
- * @endverbatim
- */
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-	TimerHandle_t xTimerCreateStatic(	const char * const pcTimerName,			/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-										const TickType_t xTimerPeriodInTicks,
-										const UBaseType_t uxAutoReload,
-										void * const pvTimerID,
-										TimerCallbackFunction_t pxCallbackFunction,
-										StaticTimer_t *pxTimerBuffer ) PRIVILEGED_FUNCTION;
-#endif /* configSUPPORT_STATIC_ALLOCATION */
-
-/**
- * void *pvTimerGetTimerID( TimerHandle_t xTimer );
- *
- * Returns the ID assigned to the timer.
- *
- * IDs are assigned to timers using the pvTimerID parameter of the call to
- * xTimerCreated() that was used to create the timer, and by calling the
- * vTimerSetTimerID() API function.
- *
- * If the same callback function is assigned to multiple timers then the timer
- * ID can be used as time specific (timer local) storage.
- *
- * @param xTimer The timer being queried.
- *
- * @return The ID assigned to the timer being queried.
- *
- * Example usage:
- *
- * See the xTimerCreate() API function example usage scenario.
- */
-void *pvTimerGetTimerID( const TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
-
-/**
- * void vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID );
- *
- * Sets the ID assigned to the timer.
- *
- * IDs are assigned to timers using the pvTimerID parameter of the call to
- * xTimerCreated() that was used to create the timer.
- *
- * If the same callback function is assigned to multiple timers then the timer
- * ID can be used as time specific (timer local) storage.
- *
- * @param xTimer The timer being updated.
- *
- * @param pvNewID The ID to assign to the timer.
- *
- * Example usage:
- *
- * See the xTimerCreate() API function example usage scenario.
- */
-void vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID ) PRIVILEGED_FUNCTION;
-
-/**
- * BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer );
- *
- * Queries a timer to see if it is active or dormant.
- *
- * A timer will be dormant if:
- *     1) It has been created but not started, or
- *     2) It is an expired one-shot timer that has not been restarted.
- *
- * Timers are created in the dormant state.  The xTimerStart(), xTimerReset(),
- * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and
- * xTimerChangePeriodFromISR() API functions can all be used to transition a timer into the
- * active state.
- *
- * @param xTimer The timer being queried.
- *
- * @return pdFALSE will be returned if the timer is dormant.  A value other than
- * pdFALSE will be returned if the timer is active.
- *
- * Example usage:
- * @verbatim
- * // This function assumes xTimer has already been created.
- * void vAFunction( TimerHandle_t xTimer )
- * {
- *     if( xTimerIsTimerActive( xTimer ) != pdFALSE ) // or more simply and equivalently "if( xTimerIsTimerActive( xTimer ) )"
- *     {
- *         // xTimer is active, do something.
- *     }
- *     else
- *     {
- *         // xTimer is not active, do something else.
- *     }
- * }
- * @endverbatim
- */
-BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
-
-/**
- * TaskHandle_t xTimerGetTimerDaemonTaskHandle( void );
- *
- * Simply returns the handle of the timer service/daemon task.  It it not valid
- * to call xTimerGetTimerDaemonTaskHandle() before the scheduler has been started.
- */
-TaskHandle_t xTimerGetTimerDaemonTaskHandle( void ) PRIVILEGED_FUNCTION;
-
-/**
- * BaseType_t xTimerStart( TimerHandle_t xTimer, TickType_t xTicksToWait );
- *
- * Timer functionality is provided by a timer service/daemon task.  Many of the
- * public FreeRTOS timer API functions send commands to the timer service task
- * through a queue called the timer command queue.  The timer command queue is
- * private to the kernel itself and is not directly accessible to application
- * code.  The length of the timer command queue is set by the
- * configTIMER_QUEUE_LENGTH configuration constant.
- *
- * xTimerStart() starts a timer that was previously created using the
- * xTimerCreate() API function.  If the timer had already been started and was
- * already in the active state, then xTimerStart() has equivalent functionality
- * to the xTimerReset() API function.
- *
- * Starting a timer ensures the timer is in the active state.  If the timer
- * is not stopped, deleted, or reset in the mean time, the callback function
- * associated with the timer will get called 'n' ticks after xTimerStart() was
- * called, where 'n' is the timers defined period.
- *
- * It is valid to call xTimerStart() before the scheduler has been started, but
- * when this is done the timer will not actually start until the scheduler is
- * started, and the timers expiry time will be relative to when the scheduler is
- * started, not relative to when xTimerStart() was called.
- *
- * The configUSE_TIMERS configuration constant must be set to 1 for xTimerStart()
- * to be available.
- *
- * @param xTimer The handle of the timer being started/restarted.
- *
- * @param xTicksToWait Specifies the time, in ticks, that the calling task should
- * be held in the Blocked state to wait for the start command to be successfully
- * sent to the timer command queue, should the queue already be full when
- * xTimerStart() was called.  xTicksToWait is ignored if xTimerStart() is called
- * before the scheduler is started.
- *
- * @return pdFAIL will be returned if the start command could not be sent to
- * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
- * be returned if the command was successfully sent to the timer command queue.
- * When the command is actually processed will depend on the priority of the
- * timer service/daemon task relative to other tasks in the system, although the
- * timers expiry time is relative to when xTimerStart() is actually called.  The
- * timer service/daemon task priority is set by the configTIMER_TASK_PRIORITY
- * configuration constant.
- *
- * Example usage:
- *
- * See the xTimerCreate() API function example usage scenario.
- *
- */
-#define xTimerStart( xTimer, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START, ( xTaskGetTickCount() ), NULL, ( xTicksToWait ) )
-
-/**
- * BaseType_t xTimerStop( TimerHandle_t xTimer, TickType_t xTicksToWait );
- *
- * Timer functionality is provided by a timer service/daemon task.  Many of the
- * public FreeRTOS timer API functions send commands to the timer service task
- * through a queue called the timer command queue.  The timer command queue is
- * private to the kernel itself and is not directly accessible to application
- * code.  The length of the timer command queue is set by the
- * configTIMER_QUEUE_LENGTH configuration constant.
- *
- * xTimerStop() stops a timer that was previously started using either of the
- * The xTimerStart(), xTimerReset(), xTimerStartFromISR(), xTimerResetFromISR(),
- * xTimerChangePeriod() or xTimerChangePeriodFromISR() API functions.
- *
- * Stopping a timer ensures the timer is not in the active state.
- *
- * The configUSE_TIMERS configuration constant must be set to 1 for xTimerStop()
- * to be available.
- *
- * @param xTimer The handle of the timer being stopped.
- *
- * @param xTicksToWait Specifies the time, in ticks, that the calling task should
- * be held in the Blocked state to wait for the stop command to be successfully
- * sent to the timer command queue, should the queue already be full when
- * xTimerStop() was called.  xTicksToWait is ignored if xTimerStop() is called
- * before the scheduler is started.
- *
- * @return pdFAIL will be returned if the stop command could not be sent to
- * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
- * be returned if the command was successfully sent to the timer command queue.
- * When the command is actually processed will depend on the priority of the
- * timer service/daemon task relative to other tasks in the system.  The timer
- * service/daemon task priority is set by the configTIMER_TASK_PRIORITY
- * configuration constant.
- *
- * Example usage:
- *
- * See the xTimerCreate() API function example usage scenario.
- *
- */
-#define xTimerStop( xTimer, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP, 0U, NULL, ( xTicksToWait ) )
-
-/**
- * BaseType_t xTimerChangePeriod( 	TimerHandle_t xTimer,
- *										TickType_t xNewPeriod,
- *										TickType_t xTicksToWait );
- *
- * Timer functionality is provided by a timer service/daemon task.  Many of the
- * public FreeRTOS timer API functions send commands to the timer service task
- * through a queue called the timer command queue.  The timer command queue is
- * private to the kernel itself and is not directly accessible to application
- * code.  The length of the timer command queue is set by the
- * configTIMER_QUEUE_LENGTH configuration constant.
- *
- * xTimerChangePeriod() changes the period of a timer that was previously
- * created using the xTimerCreate() API function.
- *
- * xTimerChangePeriod() can be called to change the period of an active or
- * dormant state timer.
- *
- * The configUSE_TIMERS configuration constant must be set to 1 for
- * xTimerChangePeriod() to be available.
- *
- * @param xTimer The handle of the timer that is having its period changed.
- *
- * @param xNewPeriod The new period for xTimer. Timer periods are specified in
- * tick periods, so the constant portTICK_PERIOD_MS can be used to convert a time
- * that has been specified in milliseconds.  For example, if the timer must
- * expire after 100 ticks, then xNewPeriod should be set to 100.  Alternatively,
- * if the timer must expire after 500ms, then xNewPeriod can be set to
- * ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than
- * or equal to 1000.
- *
- * @param xTicksToWait Specifies the time, in ticks, that the calling task should
- * be held in the Blocked state to wait for the change period command to be
- * successfully sent to the timer command queue, should the queue already be
- * full when xTimerChangePeriod() was called.  xTicksToWait is ignored if
- * xTimerChangePeriod() is called before the scheduler is started.
- *
- * @return pdFAIL will be returned if the change period command could not be
- * sent to the timer command queue even after xTicksToWait ticks had passed.
- * pdPASS will be returned if the command was successfully sent to the timer
- * command queue.  When the command is actually processed will depend on the
- * priority of the timer service/daemon task relative to other tasks in the
- * system.  The timer service/daemon task priority is set by the
- * configTIMER_TASK_PRIORITY configuration constant.
- *
- * Example usage:
- * @verbatim
- * // This function assumes xTimer has already been created.  If the timer
- * // referenced by xTimer is already active when it is called, then the timer
- * // is deleted.  If the timer referenced by xTimer is not active when it is
- * // called, then the period of the timer is set to 500ms and the timer is
- * // started.
- * void vAFunction( TimerHandle_t xTimer )
- * {
- *     if( xTimerIsTimerActive( xTimer ) != pdFALSE ) // or more simply and equivalently "if( xTimerIsTimerActive( xTimer ) )"
- *     {
- *         // xTimer is already active - delete it.
- *         xTimerDelete( xTimer );
- *     }
- *     else
- *     {
- *         // xTimer is not active, change its period to 500ms.  This will also
- *         // cause the timer to start.  Block for a maximum of 100 ticks if the
- *         // change period command cannot immediately be sent to the timer
- *         // command queue.
- *         if( xTimerChangePeriod( xTimer, 500 / portTICK_PERIOD_MS, 100 ) == pdPASS )
- *         {
- *             // The command was successfully sent.
- *         }
- *         else
- *         {
- *             // The command could not be sent, even after waiting for 100 ticks
- *             // to pass.  Take appropriate action here.
- *         }
- *     }
- * }
- * @endverbatim
- */
- #define xTimerChangePeriod( xTimer, xNewPeriod, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD, ( xNewPeriod ), NULL, ( xTicksToWait ) )
-
-/**
- * BaseType_t xTimerDelete( TimerHandle_t xTimer, TickType_t xTicksToWait );
- *
- * Timer functionality is provided by a timer service/daemon task.  Many of the
- * public FreeRTOS timer API functions send commands to the timer service task
- * through a queue called the timer command queue.  The timer command queue is
- * private to the kernel itself and is not directly accessible to application
- * code.  The length of the timer command queue is set by the
- * configTIMER_QUEUE_LENGTH configuration constant.
- *
- * xTimerDelete() deletes a timer that was previously created using the
- * xTimerCreate() API function.
- *
- * The configUSE_TIMERS configuration constant must be set to 1 for
- * xTimerDelete() to be available.
- *
- * @param xTimer The handle of the timer being deleted.
- *
- * @param xTicksToWait Specifies the time, in ticks, that the calling task should
- * be held in the Blocked state to wait for the delete command to be
- * successfully sent to the timer command queue, should the queue already be
- * full when xTimerDelete() was called.  xTicksToWait is ignored if xTimerDelete()
- * is called before the scheduler is started.
- *
- * @return pdFAIL will be returned if the delete command could not be sent to
- * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
- * be returned if the command was successfully sent to the timer command queue.
- * When the command is actually processed will depend on the priority of the
- * timer service/daemon task relative to other tasks in the system.  The timer
- * service/daemon task priority is set by the configTIMER_TASK_PRIORITY
- * configuration constant.
- *
- * Example usage:
- *
- * See the xTimerChangePeriod() API function example usage scenario.
- */
-#define xTimerDelete( xTimer, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_DELETE, 0U, NULL, ( xTicksToWait ) )
-
-/**
- * BaseType_t xTimerReset( TimerHandle_t xTimer, TickType_t xTicksToWait );
- *
- * Timer functionality is provided by a timer service/daemon task.  Many of the
- * public FreeRTOS timer API functions send commands to the timer service task
- * through a queue called the timer command queue.  The timer command queue is
- * private to the kernel itself and is not directly accessible to application
- * code.  The length of the timer command queue is set by the
- * configTIMER_QUEUE_LENGTH configuration constant.
- *
- * xTimerReset() re-starts a timer that was previously created using the
- * xTimerCreate() API function.  If the timer had already been started and was
- * already in the active state, then xTimerReset() will cause the timer to
- * re-evaluate its expiry time so that it is relative to when xTimerReset() was
- * called.  If the timer was in the dormant state then xTimerReset() has
- * equivalent functionality to the xTimerStart() API function.
- *
- * Resetting a timer ensures the timer is in the active state.  If the timer
- * is not stopped, deleted, or reset in the mean time, the callback function
- * associated with the timer will get called 'n' ticks after xTimerReset() was
- * called, where 'n' is the timers defined period.
- *
- * It is valid to call xTimerReset() before the scheduler has been started, but
- * when this is done the timer will not actually start until the scheduler is
- * started, and the timers expiry time will be relative to when the scheduler is
- * started, not relative to when xTimerReset() was called.
- *
- * The configUSE_TIMERS configuration constant must be set to 1 for xTimerReset()
- * to be available.
- *
- * @param xTimer The handle of the timer being reset/started/restarted.
- *
- * @param xTicksToWait Specifies the time, in ticks, that the calling task should
- * be held in the Blocked state to wait for the reset command to be successfully
- * sent to the timer command queue, should the queue already be full when
- * xTimerReset() was called.  xTicksToWait is ignored if xTimerReset() is called
- * before the scheduler is started.
- *
- * @return pdFAIL will be returned if the reset command could not be sent to
- * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
- * be returned if the command was successfully sent to the timer command queue.
- * When the command is actually processed will depend on the priority of the
- * timer service/daemon task relative to other tasks in the system, although the
- * timers expiry time is relative to when xTimerStart() is actually called.  The
- * timer service/daemon task priority is set by the configTIMER_TASK_PRIORITY
- * configuration constant.
- *
- * Example usage:
- * @verbatim
- * // When a key is pressed, an LCD back-light is switched on.  If 5 seconds pass
- * // without a key being pressed, then the LCD back-light is switched off.  In
- * // this case, the timer is a one-shot timer.
- *
- * TimerHandle_t xBacklightTimer = NULL;
- *
- * // The callback function assigned to the one-shot timer.  In this case the
- * // parameter is not used.
- * void vBacklightTimerCallback( TimerHandle_t pxTimer )
- * {
- *     // The timer expired, therefore 5 seconds must have passed since a key
- *     // was pressed.  Switch off the LCD back-light.
- *     vSetBacklightState( BACKLIGHT_OFF );
- * }
- *
- * // The key press event handler.
- * void vKeyPressEventHandler( char cKey )
- * {
- *     // Ensure the LCD back-light is on, then reset the timer that is
- *     // responsible for turning the back-light off after 5 seconds of
- *     // key inactivity.  Wait 10 ticks for the command to be successfully sent
- *     // if it cannot be sent immediately.
- *     vSetBacklightState( BACKLIGHT_ON );
- *     if( xTimerReset( xBacklightTimer, 100 ) != pdPASS )
- *     {
- *         // The reset command was not executed successfully.  Take appropriate
- *         // action here.
- *     }
- *
- *     // Perform the rest of the key processing here.
- * }
- *
- * void main( void )
- * {
- * int32_t x;
- *
- *     // Create then start the one-shot timer that is responsible for turning
- *     // the back-light off if no keys are pressed within a 5 second period.
- *     xBacklightTimer = xTimerCreate( "BacklightTimer",           // Just a text name, not used by the kernel.
- *                                     ( 5000 / portTICK_PERIOD_MS), // The timer period in ticks.
- *                                     pdFALSE,                    // The timer is a one-shot timer.
- *                                     0,                          // The id is not used by the callback so can take any value.
- *                                     vBacklightTimerCallback     // The callback function that switches the LCD back-light off.
- *                                   );
- *
- *     if( xBacklightTimer == NULL )
- *     {
- *         // The timer was not created.
- *     }
- *     else
- *     {
- *         // Start the timer.  No block time is specified, and even if one was
- *         // it would be ignored because the scheduler has not yet been
- *         // started.
- *         if( xTimerStart( xBacklightTimer, 0 ) != pdPASS )
- *         {
- *             // The timer could not be set into the Active state.
- *         }
- *     }
- *
- *     // ...
- *     // Create tasks here.
- *     // ...
- *
- *     // Starting the scheduler will start the timer running as it has already
- *     // been set into the active state.
- *     vTaskStartScheduler();
- *
- *     // Should not reach here.
- *     for( ;; );
- * }
- * @endverbatim
- */
-#define xTimerReset( xTimer, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_RESET, ( xTaskGetTickCount() ), NULL, ( xTicksToWait ) )
-
-/**
- * BaseType_t xTimerStartFromISR( 	TimerHandle_t xTimer,
- *									BaseType_t *pxHigherPriorityTaskWoken );
- *
- * A version of xTimerStart() that can be called from an interrupt service
- * routine.
- *
- * @param xTimer The handle of the timer being started/restarted.
- *
- * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
- * of its time in the Blocked state, waiting for messages to arrive on the timer
- * command queue.  Calling xTimerStartFromISR() writes a message to the timer
- * command queue, so has the potential to transition the timer service/daemon
- * task out of the Blocked state.  If calling xTimerStartFromISR() causes the
- * timer service/daemon task to leave the Blocked state, and the timer service/
- * daemon task has a priority equal to or greater than the currently executing
- * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will
- * get set to pdTRUE internally within the xTimerStartFromISR() function.  If
- * xTimerStartFromISR() sets this value to pdTRUE then a context switch should
- * be performed before the interrupt exits.
- *
- * @return pdFAIL will be returned if the start command could not be sent to
- * the timer command queue.  pdPASS will be returned if the command was
- * successfully sent to the timer command queue.  When the command is actually
- * processed will depend on the priority of the timer service/daemon task
- * relative to other tasks in the system, although the timers expiry time is
- * relative to when xTimerStartFromISR() is actually called.  The timer
- * service/daemon task priority is set by the configTIMER_TASK_PRIORITY
- * configuration constant.
- *
- * Example usage:
- * @verbatim
- * // This scenario assumes xBacklightTimer has already been created.  When a
- * // key is pressed, an LCD back-light is switched on.  If 5 seconds pass
- * // without a key being pressed, then the LCD back-light is switched off.  In
- * // this case, the timer is a one-shot timer, and unlike the example given for
- * // the xTimerReset() function, the key press event handler is an interrupt
- * // service routine.
- *
- * // The callback function assigned to the one-shot timer.  In this case the
- * // parameter is not used.
- * void vBacklightTimerCallback( TimerHandle_t pxTimer )
- * {
- *     // The timer expired, therefore 5 seconds must have passed since a key
- *     // was pressed.  Switch off the LCD back-light.
- *     vSetBacklightState( BACKLIGHT_OFF );
- * }
- *
- * // The key press interrupt service routine.
- * void vKeyPressEventInterruptHandler( void )
- * {
- * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
- *
- *     // Ensure the LCD back-light is on, then restart the timer that is
- *     // responsible for turning the back-light off after 5 seconds of
- *     // key inactivity.  This is an interrupt service routine so can only
- *     // call FreeRTOS API functions that end in "FromISR".
- *     vSetBacklightState( BACKLIGHT_ON );
- *
- *     // xTimerStartFromISR() or xTimerResetFromISR() could be called here
- *     // as both cause the timer to re-calculate its expiry time.
- *     // xHigherPriorityTaskWoken was initialised to pdFALSE when it was
- *     // declared (in this function).
- *     if( xTimerStartFromISR( xBacklightTimer, &xHigherPriorityTaskWoken ) != pdPASS )
- *     {
- *         // The start command was not executed successfully.  Take appropriate
- *         // action here.
- *     }
- *
- *     // Perform the rest of the key processing here.
- *
- *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
- *     // should be performed.  The syntax required to perform a context switch
- *     // from inside an ISR varies from port to port, and from compiler to
- *     // compiler.  Inspect the demos for the port you are using to find the
- *     // actual syntax required.
- *     if( xHigherPriorityTaskWoken != pdFALSE )
- *     {
- *         // Call the interrupt safe yield function here (actual function
- *         // depends on the FreeRTOS port being used).
- *     }
- * }
- * @endverbatim
- */
-#define xTimerStartFromISR( xTimer, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START_FROM_ISR, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U )
-
-/**
- * BaseType_t xTimerStopFromISR( 	TimerHandle_t xTimer,
- *									BaseType_t *pxHigherPriorityTaskWoken );
- *
- * A version of xTimerStop() that can be called from an interrupt service
- * routine.
- *
- * @param xTimer The handle of the timer being stopped.
- *
- * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
- * of its time in the Blocked state, waiting for messages to arrive on the timer
- * command queue.  Calling xTimerStopFromISR() writes a message to the timer
- * command queue, so has the potential to transition the timer service/daemon
- * task out of the Blocked state.  If calling xTimerStopFromISR() causes the
- * timer service/daemon task to leave the Blocked state, and the timer service/
- * daemon task has a priority equal to or greater than the currently executing
- * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will
- * get set to pdTRUE internally within the xTimerStopFromISR() function.  If
- * xTimerStopFromISR() sets this value to pdTRUE then a context switch should
- * be performed before the interrupt exits.
- *
- * @return pdFAIL will be returned if the stop command could not be sent to
- * the timer command queue.  pdPASS will be returned if the command was
- * successfully sent to the timer command queue.  When the command is actually
- * processed will depend on the priority of the timer service/daemon task
- * relative to other tasks in the system.  The timer service/daemon task
- * priority is set by the configTIMER_TASK_PRIORITY configuration constant.
- *
- * Example usage:
- * @verbatim
- * // This scenario assumes xTimer has already been created and started.  When
- * // an interrupt occurs, the timer should be simply stopped.
- *
- * // The interrupt service routine that stops the timer.
- * void vAnExampleInterruptServiceRoutine( void )
- * {
- * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
- *
- *     // The interrupt has occurred - simply stop the timer.
- *     // xHigherPriorityTaskWoken was set to pdFALSE where it was defined
- *     // (within this function).  As this is an interrupt service routine, only
- *     // FreeRTOS API functions that end in "FromISR" can be used.
- *     if( xTimerStopFromISR( xTimer, &xHigherPriorityTaskWoken ) != pdPASS )
- *     {
- *         // The stop command was not executed successfully.  Take appropriate
- *         // action here.
- *     }
- *
- *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
- *     // should be performed.  The syntax required to perform a context switch
- *     // from inside an ISR varies from port to port, and from compiler to
- *     // compiler.  Inspect the demos for the port you are using to find the
- *     // actual syntax required.
- *     if( xHigherPriorityTaskWoken != pdFALSE )
- *     {
- *         // Call the interrupt safe yield function here (actual function
- *         // depends on the FreeRTOS port being used).
- *     }
- * }
- * @endverbatim
- */
-#define xTimerStopFromISR( xTimer, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP_FROM_ISR, 0, ( pxHigherPriorityTaskWoken ), 0U )
-
-/**
- * BaseType_t xTimerChangePeriodFromISR( TimerHandle_t xTimer,
- *										 TickType_t xNewPeriod,
- *										 BaseType_t *pxHigherPriorityTaskWoken );
- *
- * A version of xTimerChangePeriod() that can be called from an interrupt
- * service routine.
- *
- * @param xTimer The handle of the timer that is having its period changed.
- *
- * @param xNewPeriod The new period for xTimer. Timer periods are specified in
- * tick periods, so the constant portTICK_PERIOD_MS can be used to convert a time
- * that has been specified in milliseconds.  For example, if the timer must
- * expire after 100 ticks, then xNewPeriod should be set to 100.  Alternatively,
- * if the timer must expire after 500ms, then xNewPeriod can be set to
- * ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than
- * or equal to 1000.
- *
- * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
- * of its time in the Blocked state, waiting for messages to arrive on the timer
- * command queue.  Calling xTimerChangePeriodFromISR() writes a message to the
- * timer command queue, so has the potential to transition the timer service/
- * daemon task out of the Blocked state.  If calling xTimerChangePeriodFromISR()
- * causes the timer service/daemon task to leave the Blocked state, and the
- * timer service/daemon task has a priority equal to or greater than the
- * currently executing task (the task that was interrupted), then
- * *pxHigherPriorityTaskWoken will get set to pdTRUE internally within the
- * xTimerChangePeriodFromISR() function.  If xTimerChangePeriodFromISR() sets
- * this value to pdTRUE then a context switch should be performed before the
- * interrupt exits.
- *
- * @return pdFAIL will be returned if the command to change the timers period
- * could not be sent to the timer command queue.  pdPASS will be returned if the
- * command was successfully sent to the timer command queue.  When the command
- * is actually processed will depend on the priority of the timer service/daemon
- * task relative to other tasks in the system.  The timer service/daemon task
- * priority is set by the configTIMER_TASK_PRIORITY configuration constant.
- *
- * Example usage:
- * @verbatim
- * // This scenario assumes xTimer has already been created and started.  When
- * // an interrupt occurs, the period of xTimer should be changed to 500ms.
- *
- * // The interrupt service routine that changes the period of xTimer.
- * void vAnExampleInterruptServiceRoutine( void )
- * {
- * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
- *
- *     // The interrupt has occurred - change the period of xTimer to 500ms.
- *     // xHigherPriorityTaskWoken was set to pdFALSE where it was defined
- *     // (within this function).  As this is an interrupt service routine, only
- *     // FreeRTOS API functions that end in "FromISR" can be used.
- *     if( xTimerChangePeriodFromISR( xTimer, &xHigherPriorityTaskWoken ) != pdPASS )
- *     {
- *         // The command to change the timers period was not executed
- *         // successfully.  Take appropriate action here.
- *     }
- *
- *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
- *     // should be performed.  The syntax required to perform a context switch
- *     // from inside an ISR varies from port to port, and from compiler to
- *     // compiler.  Inspect the demos for the port you are using to find the
- *     // actual syntax required.
- *     if( xHigherPriorityTaskWoken != pdFALSE )
- *     {
- *         // Call the interrupt safe yield function here (actual function
- *         // depends on the FreeRTOS port being used).
- *     }
- * }
- * @endverbatim
- */
-#define xTimerChangePeriodFromISR( xTimer, xNewPeriod, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD_FROM_ISR, ( xNewPeriod ), ( pxHigherPriorityTaskWoken ), 0U )
-
-/**
- * BaseType_t xTimerResetFromISR( 	TimerHandle_t xTimer,
- *									BaseType_t *pxHigherPriorityTaskWoken );
- *
- * A version of xTimerReset() that can be called from an interrupt service
- * routine.
- *
- * @param xTimer The handle of the timer that is to be started, reset, or
- * restarted.
- *
- * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
- * of its time in the Blocked state, waiting for messages to arrive on the timer
- * command queue.  Calling xTimerResetFromISR() writes a message to the timer
- * command queue, so has the potential to transition the timer service/daemon
- * task out of the Blocked state.  If calling xTimerResetFromISR() causes the
- * timer service/daemon task to leave the Blocked state, and the timer service/
- * daemon task has a priority equal to or greater than the currently executing
- * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will
- * get set to pdTRUE internally within the xTimerResetFromISR() function.  If
- * xTimerResetFromISR() sets this value to pdTRUE then a context switch should
- * be performed before the interrupt exits.
- *
- * @return pdFAIL will be returned if the reset command could not be sent to
- * the timer command queue.  pdPASS will be returned if the command was
- * successfully sent to the timer command queue.  When the command is actually
- * processed will depend on the priority of the timer service/daemon task
- * relative to other tasks in the system, although the timers expiry time is
- * relative to when xTimerResetFromISR() is actually called.  The timer service/daemon
- * task priority is set by the configTIMER_TASK_PRIORITY configuration constant.
- *
- * Example usage:
- * @verbatim
- * // This scenario assumes xBacklightTimer has already been created.  When a
- * // key is pressed, an LCD back-light is switched on.  If 5 seconds pass
- * // without a key being pressed, then the LCD back-light is switched off.  In
- * // this case, the timer is a one-shot timer, and unlike the example given for
- * // the xTimerReset() function, the key press event handler is an interrupt
- * // service routine.
- *
- * // The callback function assigned to the one-shot timer.  In this case the
- * // parameter is not used.
- * void vBacklightTimerCallback( TimerHandle_t pxTimer )
- * {
- *     // The timer expired, therefore 5 seconds must have passed since a key
- *     // was pressed.  Switch off the LCD back-light.
- *     vSetBacklightState( BACKLIGHT_OFF );
- * }
- *
- * // The key press interrupt service routine.
- * void vKeyPressEventInterruptHandler( void )
- * {
- * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
- *
- *     // Ensure the LCD back-light is on, then reset the timer that is
- *     // responsible for turning the back-light off after 5 seconds of
- *     // key inactivity.  This is an interrupt service routine so can only
- *     // call FreeRTOS API functions that end in "FromISR".
- *     vSetBacklightState( BACKLIGHT_ON );
- *
- *     // xTimerStartFromISR() or xTimerResetFromISR() could be called here
- *     // as both cause the timer to re-calculate its expiry time.
- *     // xHigherPriorityTaskWoken was initialised to pdFALSE when it was
- *     // declared (in this function).
- *     if( xTimerResetFromISR( xBacklightTimer, &xHigherPriorityTaskWoken ) != pdPASS )
- *     {
- *         // The reset command was not executed successfully.  Take appropriate
- *         // action here.
- *     }
- *
- *     // Perform the rest of the key processing here.
- *
- *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
- *     // should be performed.  The syntax required to perform a context switch
- *     // from inside an ISR varies from port to port, and from compiler to
- *     // compiler.  Inspect the demos for the port you are using to find the
- *     // actual syntax required.
- *     if( xHigherPriorityTaskWoken != pdFALSE )
- *     {
- *         // Call the interrupt safe yield function here (actual function
- *         // depends on the FreeRTOS port being used).
- *     }
- * }
- * @endverbatim
- */
-#define xTimerResetFromISR( xTimer, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_RESET_FROM_ISR, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U )
-
-
-/**
- * BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend,
- *                                          void *pvParameter1,
- *                                          uint32_t ulParameter2,
- *                                          BaseType_t *pxHigherPriorityTaskWoken );
- *
- *
- * Used from application interrupt service routines to defer the execution of a
- * function to the RTOS daemon task (the timer service task, hence this function
- * is implemented in timers.c and is prefixed with 'Timer').
- *
- * Ideally an interrupt service routine (ISR) is kept as short as possible, but
- * sometimes an ISR either has a lot of processing to do, or needs to perform
- * processing that is not deterministic.  In these cases
- * xTimerPendFunctionCallFromISR() can be used to defer processing of a function
- * to the RTOS daemon task.
- *
- * A mechanism is provided that allows the interrupt to return directly to the
- * task that will subsequently execute the pended callback function.  This
- * allows the callback function to execute contiguously in time with the
- * interrupt - just as if the callback had executed in the interrupt itself.
- *
- * @param xFunctionToPend The function to execute from the timer service/
- * daemon task.  The function must conform to the PendedFunction_t
- * prototype.
- *
- * @param pvParameter1 The value of the callback function's first parameter.
- * The parameter has a void * type to allow it to be used to pass any type.
- * For example, unsigned longs can be cast to a void *, or the void * can be
- * used to point to a structure.
- *
- * @param ulParameter2 The value of the callback function's second parameter.
- *
- * @param pxHigherPriorityTaskWoken As mentioned above, calling this function
- * will result in a message being sent to the timer daemon task.  If the
- * priority of the timer daemon task (which is set using
- * configTIMER_TASK_PRIORITY in FreeRTOSConfig.h) is higher than the priority of
- * the currently running task (the task the interrupt interrupted) then
- * *pxHigherPriorityTaskWoken will be set to pdTRUE within
- * xTimerPendFunctionCallFromISR(), indicating that a context switch should be
- * requested before the interrupt exits.  For that reason
- * *pxHigherPriorityTaskWoken must be initialised to pdFALSE.  See the
- * example code below.
- *
- * @return pdPASS is returned if the message was successfully sent to the
- * timer daemon task, otherwise pdFALSE is returned.
- *
- * Example usage:
- * @verbatim
- *
- *	// The callback function that will execute in the context of the daemon task.
- *  // Note callback functions must all use this same prototype.
- *  void vProcessInterface( void *pvParameter1, uint32_t ulParameter2 )
- *	{
- *		BaseType_t xInterfaceToService;
- *
- *		// The interface that requires servicing is passed in the second
- *      // parameter.  The first parameter is not used in this case.
- *		xInterfaceToService = ( BaseType_t ) ulParameter2;
- *
- *		// ...Perform the processing here...
- *	}
- *
- *	// An ISR that receives data packets from multiple interfaces
- *  void vAnISR( void )
- *	{
- *		BaseType_t xInterfaceToService, xHigherPriorityTaskWoken;
- *
- *		// Query the hardware to determine which interface needs processing.
- *		xInterfaceToService = prvCheckInterfaces();
- *
- *      // The actual processing is to be deferred to a task.  Request the
- *      // vProcessInterface() callback function is executed, passing in the
- *		// number of the interface that needs processing.  The interface to
- *		// service is passed in the second parameter.  The first parameter is
- *		// not used in this case.
- *		xHigherPriorityTaskWoken = pdFALSE;
- *		xTimerPendFunctionCallFromISR( vProcessInterface, NULL, ( uint32_t ) xInterfaceToService, &xHigherPriorityTaskWoken );
- *
- *		// If xHigherPriorityTaskWoken is now set to pdTRUE then a context
- *		// switch should be requested.  The macro used is port specific and will
- *		// be either portYIELD_FROM_ISR() or portEND_SWITCHING_ISR() - refer to
- *		// the documentation page for the port being used.
- *		portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
- *
- *	}
- * @endverbatim
- */
-BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
-
- /**
-  * BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend,
-  *                                    void *pvParameter1,
-  *                                    uint32_t ulParameter2,
-  *                                    TickType_t xTicksToWait );
-  *
-  *
-  * Used to defer the execution of a function to the RTOS daemon task (the timer
-  * service task, hence this function is implemented in timers.c and is prefixed
-  * with 'Timer').
-  *
-  * @param xFunctionToPend The function to execute from the timer service/
-  * daemon task.  The function must conform to the PendedFunction_t
-  * prototype.
-  *
-  * @param pvParameter1 The value of the callback function's first parameter.
-  * The parameter has a void * type to allow it to be used to pass any type.
-  * For example, unsigned longs can be cast to a void *, or the void * can be
-  * used to point to a structure.
-  *
-  * @param ulParameter2 The value of the callback function's second parameter.
-  *
-  * @param xTicksToWait Calling this function will result in a message being
-  * sent to the timer daemon task on a queue.  xTicksToWait is the amount of
-  * time the calling task should remain in the Blocked state (so not using any
-  * processing time) for space to become available on the timer queue if the
-  * queue is found to be full.
-  *
-  * @return pdPASS is returned if the message was successfully sent to the
-  * timer daemon task, otherwise pdFALSE is returned.
-  *
-  */
-BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
-
-/**
- * const char * const pcTimerGetName( TimerHandle_t xTimer );
- *
- * Returns the name that was assigned to a timer when the timer was created.
- *
- * @param xTimer The handle of the timer being queried.
- *
- * @return The name assigned to the timer specified by the xTimer parameter.
- */
-const char * pcTimerGetName( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-
-/**
- * void vTimerSetReloadMode( TimerHandle_t xTimer, const UBaseType_t uxAutoReload );
- *
- * Updates a timer to be either an auto-reload timer, in which case the timer
- * automatically resets itself each time it expires, or a one-shot timer, in
- * which case the timer will only expire once unless it is manually restarted.
- *
- * @param xTimer The handle of the timer being updated.
- *
- * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will
- * expire repeatedly with a frequency set by the timer's period (see the
- * xTimerPeriodInTicks parameter of the xTimerCreate() API function).  If
- * uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and
- * enter the dormant state after it expires.
- */
-void vTimerSetReloadMode( TimerHandle_t xTimer, const UBaseType_t uxAutoReload ) PRIVILEGED_FUNCTION;
-
-/**
-* UBaseType_t uxTimerGetReloadMode( TimerHandle_t xTimer );
-*
-* Queries a timer to determine if it is an auto-reload timer, in which case the timer
-* automatically resets itself each time it expires, or a one-shot timer, in
-* which case the timer will only expire once unless it is manually restarted.
-*
-* @param xTimer The handle of the timer being queried.
-*
-* @return If the timer is an auto-reload timer then pdTRUE is returned, otherwise
-* pdFALSE is returned.
-*/
-UBaseType_t uxTimerGetReloadMode( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
-
-/**
- * TickType_t xTimerGetPeriod( TimerHandle_t xTimer );
- *
- * Returns the period of a timer.
- *
- * @param xTimer The handle of the timer being queried.
- *
- * @return The period of the timer in ticks.
- */
-TickType_t xTimerGetPeriod( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
-
-/**
-* TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer );
-*
-* Returns the time in ticks at which the timer will expire.  If this is less
-* than the current tick count then the expiry time has overflowed from the
-* current time.
-*
-* @param xTimer The handle of the timer being queried.
-*
-* @return If the timer is running then the time in ticks at which the timer
-* will next expire is returned.  If the timer is not running then the return
-* value is undefined.
-*/
-TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
-
-/*
- * Functions beyond this part are not part of the public API and are intended
- * for use by the kernel only.
- */
-BaseType_t xTimerCreateTimerTask( void ) PRIVILEGED_FUNCTION;
-BaseType_t xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
-
-#if( configUSE_TRACE_FACILITY == 1 )
-	void vTimerSetTimerNumber( TimerHandle_t xTimer, UBaseType_t uxTimerNumber ) PRIVILEGED_FUNCTION;
-	UBaseType_t uxTimerGetTimerNumber( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
-#endif
-
-#ifdef __cplusplus
-}
-#endif
-#endif /* TIMERS_H */
-
-
-
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+
+#ifndef TIMERS_H
+#define TIMERS_H
+
+#ifndef INC_FREERTOS_H
+    #error "include FreeRTOS.h must appear in source files before include timers.h"
+#endif
+
+/*lint -save -e537 This headers are only multiply included if the application code
+ * happens to also be including task.h. */
+#include "task.h"
+/*lint -restore */
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/*-----------------------------------------------------------
+* MACROS AND DEFINITIONS
+*----------------------------------------------------------*/
+
+/* IDs for commands that can be sent/received on the timer queue.  These are to
+ * be used solely through the macros that make up the public software timer API,
+ * as defined below.  The commands that are sent from interrupts must use the
+ * highest numbers as tmrFIRST_FROM_ISR_COMMAND is used to determine if the task
+ * or interrupt version of the queue send function should be used. */
+#define tmrCOMMAND_EXECUTE_CALLBACK_FROM_ISR    ( ( BaseType_t ) -2 )
+#define tmrCOMMAND_EXECUTE_CALLBACK             ( ( BaseType_t ) -1 )
+#define tmrCOMMAND_START_DONT_TRACE             ( ( BaseType_t ) 0 )
+#define tmrCOMMAND_START                        ( ( BaseType_t ) 1 )
+#define tmrCOMMAND_RESET                        ( ( BaseType_t ) 2 )
+#define tmrCOMMAND_STOP                         ( ( BaseType_t ) 3 )
+#define tmrCOMMAND_CHANGE_PERIOD                ( ( BaseType_t ) 4 )
+#define tmrCOMMAND_DELETE                       ( ( BaseType_t ) 5 )
+
+#define tmrFIRST_FROM_ISR_COMMAND               ( ( BaseType_t ) 6 )
+#define tmrCOMMAND_START_FROM_ISR               ( ( BaseType_t ) 6 )
+#define tmrCOMMAND_RESET_FROM_ISR               ( ( BaseType_t ) 7 )
+#define tmrCOMMAND_STOP_FROM_ISR                ( ( BaseType_t ) 8 )
+#define tmrCOMMAND_CHANGE_PERIOD_FROM_ISR       ( ( BaseType_t ) 9 )
+
+
+/**
+ * Type by which software timers are referenced.  For example, a call to
+ * xTimerCreate() returns an TimerHandle_t variable that can then be used to
+ * reference the subject timer in calls to other software timer API functions
+ * (for example, xTimerStart(), xTimerReset(), etc.).
+ */
+struct tmrTimerControl; /* The old naming convention is used to prevent breaking kernel aware debuggers. */
+typedef struct tmrTimerControl * TimerHandle_t;
+
+/*
+ * Defines the prototype to which timer callback functions must conform.
+ */
+typedef void (* TimerCallbackFunction_t)( TimerHandle_t xTimer );
+
+/*
+ * Defines the prototype to which functions used with the
+ * xTimerPendFunctionCallFromISR() function must conform.
+ */
+typedef void (* PendedFunction_t)( void *,
+                                   uint32_t );
+
+/**
+ * TimerHandle_t xTimerCreate(  const char * const pcTimerName,
+ *                              TickType_t xTimerPeriodInTicks,
+ *                              UBaseType_t uxAutoReload,
+ *                              void * pvTimerID,
+ *                              TimerCallbackFunction_t pxCallbackFunction );
+ *
+ * Creates a new software timer instance, and returns a handle by which the
+ * created software timer can be referenced.
+ *
+ * Internally, within the FreeRTOS implementation, software timers use a block
+ * of memory, in which the timer data structure is stored.  If a software timer
+ * is created using xTimerCreate() then the required memory is automatically
+ * dynamically allocated inside the xTimerCreate() function.  (see
+ * https://www.FreeRTOS.org/a00111.html).  If a software timer is created using
+ * xTimerCreateStatic() then the application writer must provide the memory that
+ * will get used by the software timer.  xTimerCreateStatic() therefore allows a
+ * software timer to be created without using any dynamic memory allocation.
+ *
+ * Timers are created in the dormant state.  The xTimerStart(), xTimerReset(),
+ * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and
+ * xTimerChangePeriodFromISR() API functions can all be used to transition a
+ * timer into the active state.
+ *
+ * @param pcTimerName A text name that is assigned to the timer.  This is done
+ * purely to assist debugging.  The kernel itself only ever references a timer
+ * by its handle, and never by its name.
+ *
+ * @param xTimerPeriodInTicks The timer period.  The time is defined in tick
+ * periods so the constant portTICK_PERIOD_MS can be used to convert a time that
+ * has been specified in milliseconds.  For example, if the timer must expire
+ * after 100 ticks, then xTimerPeriodInTicks should be set to 100.
+ * Alternatively, if the timer must expire after 500ms, then xPeriod can be set
+ * to ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than or
+ * equal to 1000.  Time timer period must be greater than 0.
+ *
+ * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will
+ * expire repeatedly with a frequency set by the xTimerPeriodInTicks parameter.
+ * If uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and
+ * enter the dormant state after it expires.
+ *
+ * @param pvTimerID An identifier that is assigned to the timer being created.
+ * Typically this would be used in the timer callback function to identify which
+ * timer expired when the same callback function is assigned to more than one
+ * timer.
+ *
+ * @param pxCallbackFunction The function to call when the timer expires.
+ * Callback functions must have the prototype defined by TimerCallbackFunction_t,
+ * which is "void vCallbackFunction( TimerHandle_t xTimer );".
+ *
+ * @return If the timer is successfully created then a handle to the newly
+ * created timer is returned.  If the timer cannot be created because there is
+ * insufficient FreeRTOS heap remaining to allocate the timer
+ * structures then NULL is returned.
+ *
+ * Example usage:
+ * @verbatim
+ * #define NUM_TIMERS 5
+ *
+ * // An array to hold handles to the created timers.
+ * TimerHandle_t xTimers[ NUM_TIMERS ];
+ *
+ * // An array to hold a count of the number of times each timer expires.
+ * int32_t lExpireCounters[ NUM_TIMERS ] = { 0 };
+ *
+ * // Define a callback function that will be used by multiple timer instances.
+ * // The callback function does nothing but count the number of times the
+ * // associated timer expires, and stop the timer once the timer has expired
+ * // 10 times.
+ * void vTimerCallback( TimerHandle_t pxTimer )
+ * {
+ * int32_t lArrayIndex;
+ * const int32_t xMaxExpiryCountBeforeStopping = 10;
+ *
+ *     // Optionally do something if the pxTimer parameter is NULL.
+ *     configASSERT( pxTimer );
+ *
+ *     // Which timer expired?
+ *     lArrayIndex = ( int32_t ) pvTimerGetTimerID( pxTimer );
+ *
+ *     // Increment the number of times that pxTimer has expired.
+ *     lExpireCounters[ lArrayIndex ] += 1;
+ *
+ *     // If the timer has expired 10 times then stop it from running.
+ *     if( lExpireCounters[ lArrayIndex ] == xMaxExpiryCountBeforeStopping )
+ *     {
+ *         // Do not use a block time if calling a timer API function from a
+ *         // timer callback function, as doing so could cause a deadlock!
+ *         xTimerStop( pxTimer, 0 );
+ *     }
+ * }
+ *
+ * void main( void )
+ * {
+ * int32_t x;
+ *
+ *     // Create then start some timers.  Starting the timers before the scheduler
+ *     // has been started means the timers will start running immediately that
+ *     // the scheduler starts.
+ *     for( x = 0; x < NUM_TIMERS; x++ )
+ *     {
+ *         xTimers[ x ] = xTimerCreate(    "Timer",       // Just a text name, not used by the kernel.
+ *                                         ( 100 * x ),   // The timer period in ticks.
+ *                                         pdTRUE,        // The timers will auto-reload themselves when they expire.
+ *                                         ( void * ) x,  // Assign each timer a unique id equal to its array index.
+ *                                         vTimerCallback // Each timer calls the same callback when it expires.
+ *                                     );
+ *
+ *         if( xTimers[ x ] == NULL )
+ *         {
+ *             // The timer was not created.
+ *         }
+ *         else
+ *         {
+ *             // Start the timer.  No block time is specified, and even if one was
+ *             // it would be ignored because the scheduler has not yet been
+ *             // started.
+ *             if( xTimerStart( xTimers[ x ], 0 ) != pdPASS )
+ *             {
+ *                 // The timer could not be set into the Active state.
+ *             }
+ *         }
+ *     }
+ *
+ *     // ...
+ *     // Create tasks here.
+ *     // ...
+ *
+ *     // Starting the scheduler will start the timers running as they have already
+ *     // been set into the active state.
+ *     vTaskStartScheduler();
+ *
+ *     // Should not reach here.
+ *     for( ;; );
+ * }
+ * @endverbatim
+ */
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+    TimerHandle_t xTimerCreate( const char * const pcTimerName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+                                const TickType_t xTimerPeriodInTicks,
+                                const UBaseType_t uxAutoReload,
+                                void * const pvTimerID,
+                                TimerCallbackFunction_t pxCallbackFunction ) PRIVILEGED_FUNCTION;
+#endif
+
+/**
+ * TimerHandle_t xTimerCreateStatic(const char * const pcTimerName,
+ *                                  TickType_t xTimerPeriodInTicks,
+ *                                  UBaseType_t uxAutoReload,
+ *                                  void * pvTimerID,
+ *                                  TimerCallbackFunction_t pxCallbackFunction,
+ *                                  StaticTimer_t *pxTimerBuffer );
+ *
+ * Creates a new software timer instance, and returns a handle by which the
+ * created software timer can be referenced.
+ *
+ * Internally, within the FreeRTOS implementation, software timers use a block
+ * of memory, in which the timer data structure is stored.  If a software timer
+ * is created using xTimerCreate() then the required memory is automatically
+ * dynamically allocated inside the xTimerCreate() function.  (see
+ * https://www.FreeRTOS.org/a00111.html).  If a software timer is created using
+ * xTimerCreateStatic() then the application writer must provide the memory that
+ * will get used by the software timer.  xTimerCreateStatic() therefore allows a
+ * software timer to be created without using any dynamic memory allocation.
+ *
+ * Timers are created in the dormant state.  The xTimerStart(), xTimerReset(),
+ * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and
+ * xTimerChangePeriodFromISR() API functions can all be used to transition a
+ * timer into the active state.
+ *
+ * @param pcTimerName A text name that is assigned to the timer.  This is done
+ * purely to assist debugging.  The kernel itself only ever references a timer
+ * by its handle, and never by its name.
+ *
+ * @param xTimerPeriodInTicks The timer period.  The time is defined in tick
+ * periods so the constant portTICK_PERIOD_MS can be used to convert a time that
+ * has been specified in milliseconds.  For example, if the timer must expire
+ * after 100 ticks, then xTimerPeriodInTicks should be set to 100.
+ * Alternatively, if the timer must expire after 500ms, then xPeriod can be set
+ * to ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than or
+ * equal to 1000.  The timer period must be greater than 0.
+ *
+ * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will
+ * expire repeatedly with a frequency set by the xTimerPeriodInTicks parameter.
+ * If uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and
+ * enter the dormant state after it expires.
+ *
+ * @param pvTimerID An identifier that is assigned to the timer being created.
+ * Typically this would be used in the timer callback function to identify which
+ * timer expired when the same callback function is assigned to more than one
+ * timer.
+ *
+ * @param pxCallbackFunction The function to call when the timer expires.
+ * Callback functions must have the prototype defined by TimerCallbackFunction_t,
+ * which is "void vCallbackFunction( TimerHandle_t xTimer );".
+ *
+ * @param pxTimerBuffer Must point to a variable of type StaticTimer_t, which
+ * will be then be used to hold the software timer's data structures, removing
+ * the need for the memory to be allocated dynamically.
+ *
+ * @return If the timer is created then a handle to the created timer is
+ * returned.  If pxTimerBuffer was NULL then NULL is returned.
+ *
+ * Example usage:
+ * @verbatim
+ *
+ * // The buffer used to hold the software timer's data structure.
+ * static StaticTimer_t xTimerBuffer;
+ *
+ * // A variable that will be incremented by the software timer's callback
+ * // function.
+ * UBaseType_t uxVariableToIncrement = 0;
+ *
+ * // A software timer callback function that increments a variable passed to
+ * // it when the software timer was created.  After the 5th increment the
+ * // callback function stops the software timer.
+ * static void prvTimerCallback( TimerHandle_t xExpiredTimer )
+ * {
+ * UBaseType_t *puxVariableToIncrement;
+ * BaseType_t xReturned;
+ *
+ *     // Obtain the address of the variable to increment from the timer ID.
+ *     puxVariableToIncrement = ( UBaseType_t * ) pvTimerGetTimerID( xExpiredTimer );
+ *
+ *     // Increment the variable to show the timer callback has executed.
+ *     ( *puxVariableToIncrement )++;
+ *
+ *     // If this callback has executed the required number of times, stop the
+ *     // timer.
+ *     if( *puxVariableToIncrement == 5 )
+ *     {
+ *         // This is called from a timer callback so must not block.
+ *         xTimerStop( xExpiredTimer, staticDONT_BLOCK );
+ *     }
+ * }
+ *
+ *
+ * void main( void )
+ * {
+ *     // Create the software time.  xTimerCreateStatic() has an extra parameter
+ *     // than the normal xTimerCreate() API function.  The parameter is a pointer
+ *     // to the StaticTimer_t structure that will hold the software timer
+ *     // structure.  If the parameter is passed as NULL then the structure will be
+ *     // allocated dynamically, just as if xTimerCreate() had been called.
+ *     xTimer = xTimerCreateStatic( "T1",             // Text name for the task.  Helps debugging only.  Not used by FreeRTOS.
+ *                                  xTimerPeriod,     // The period of the timer in ticks.
+ *                                  pdTRUE,           // This is an auto-reload timer.
+ *                                  ( void * ) &uxVariableToIncrement,    // A variable incremented by the software timer's callback function
+ *                                  prvTimerCallback, // The function to execute when the timer expires.
+ *                                  &xTimerBuffer );  // The buffer that will hold the software timer structure.
+ *
+ *     // The scheduler has not started yet so a block time is not used.
+ *     xReturned = xTimerStart( xTimer, 0 );
+ *
+ *     // ...
+ *     // Create tasks here.
+ *     // ...
+ *
+ *     // Starting the scheduler will start the timers running as they have already
+ *     // been set into the active state.
+ *     vTaskStartScheduler();
+ *
+ *     // Should not reach here.
+ *     for( ;; );
+ * }
+ * @endverbatim
+ */
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+    TimerHandle_t xTimerCreateStatic( const char * const pcTimerName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+                                      const TickType_t xTimerPeriodInTicks,
+                                      const UBaseType_t uxAutoReload,
+                                      void * const pvTimerID,
+                                      TimerCallbackFunction_t pxCallbackFunction,
+                                      StaticTimer_t * pxTimerBuffer ) PRIVILEGED_FUNCTION;
+#endif /* configSUPPORT_STATIC_ALLOCATION */
+
+/**
+ * void *pvTimerGetTimerID( TimerHandle_t xTimer );
+ *
+ * Returns the ID assigned to the timer.
+ *
+ * IDs are assigned to timers using the pvTimerID parameter of the call to
+ * xTimerCreated() that was used to create the timer, and by calling the
+ * vTimerSetTimerID() API function.
+ *
+ * If the same callback function is assigned to multiple timers then the timer
+ * ID can be used as time specific (timer local) storage.
+ *
+ * @param xTimer The timer being queried.
+ *
+ * @return The ID assigned to the timer being queried.
+ *
+ * Example usage:
+ *
+ * See the xTimerCreate() API function example usage scenario.
+ */
+void * pvTimerGetTimerID( const TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
+
+/**
+ * void vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID );
+ *
+ * Sets the ID assigned to the timer.
+ *
+ * IDs are assigned to timers using the pvTimerID parameter of the call to
+ * xTimerCreated() that was used to create the timer.
+ *
+ * If the same callback function is assigned to multiple timers then the timer
+ * ID can be used as time specific (timer local) storage.
+ *
+ * @param xTimer The timer being updated.
+ *
+ * @param pvNewID The ID to assign to the timer.
+ *
+ * Example usage:
+ *
+ * See the xTimerCreate() API function example usage scenario.
+ */
+void vTimerSetTimerID( TimerHandle_t xTimer,
+                       void * pvNewID ) PRIVILEGED_FUNCTION;
+
+/**
+ * BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer );
+ *
+ * Queries a timer to see if it is active or dormant.
+ *
+ * A timer will be dormant if:
+ *     1) It has been created but not started, or
+ *     2) It is an expired one-shot timer that has not been restarted.
+ *
+ * Timers are created in the dormant state.  The xTimerStart(), xTimerReset(),
+ * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and
+ * xTimerChangePeriodFromISR() API functions can all be used to transition a timer into the
+ * active state.
+ *
+ * @param xTimer The timer being queried.
+ *
+ * @return pdFALSE will be returned if the timer is dormant.  A value other than
+ * pdFALSE will be returned if the timer is active.
+ *
+ * Example usage:
+ * @verbatim
+ * // This function assumes xTimer has already been created.
+ * void vAFunction( TimerHandle_t xTimer )
+ * {
+ *     if( xTimerIsTimerActive( xTimer ) != pdFALSE ) // or more simply and equivalently "if( xTimerIsTimerActive( xTimer ) )"
+ *     {
+ *         // xTimer is active, do something.
+ *     }
+ *     else
+ *     {
+ *         // xTimer is not active, do something else.
+ *     }
+ * }
+ * @endverbatim
+ */
+BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
+
+/**
+ * TaskHandle_t xTimerGetTimerDaemonTaskHandle( void );
+ *
+ * Simply returns the handle of the timer service/daemon task.  It it not valid
+ * to call xTimerGetTimerDaemonTaskHandle() before the scheduler has been started.
+ */
+TaskHandle_t xTimerGetTimerDaemonTaskHandle( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * BaseType_t xTimerStart( TimerHandle_t xTimer, TickType_t xTicksToWait );
+ *
+ * Timer functionality is provided by a timer service/daemon task.  Many of the
+ * public FreeRTOS timer API functions send commands to the timer service task
+ * through a queue called the timer command queue.  The timer command queue is
+ * private to the kernel itself and is not directly accessible to application
+ * code.  The length of the timer command queue is set by the
+ * configTIMER_QUEUE_LENGTH configuration constant.
+ *
+ * xTimerStart() starts a timer that was previously created using the
+ * xTimerCreate() API function.  If the timer had already been started and was
+ * already in the active state, then xTimerStart() has equivalent functionality
+ * to the xTimerReset() API function.
+ *
+ * Starting a timer ensures the timer is in the active state.  If the timer
+ * is not stopped, deleted, or reset in the mean time, the callback function
+ * associated with the timer will get called 'n' ticks after xTimerStart() was
+ * called, where 'n' is the timers defined period.
+ *
+ * It is valid to call xTimerStart() before the scheduler has been started, but
+ * when this is done the timer will not actually start until the scheduler is
+ * started, and the timers expiry time will be relative to when the scheduler is
+ * started, not relative to when xTimerStart() was called.
+ *
+ * The configUSE_TIMERS configuration constant must be set to 1 for xTimerStart()
+ * to be available.
+ *
+ * @param xTimer The handle of the timer being started/restarted.
+ *
+ * @param xTicksToWait Specifies the time, in ticks, that the calling task should
+ * be held in the Blocked state to wait for the start command to be successfully
+ * sent to the timer command queue, should the queue already be full when
+ * xTimerStart() was called.  xTicksToWait is ignored if xTimerStart() is called
+ * before the scheduler is started.
+ *
+ * @return pdFAIL will be returned if the start command could not be sent to
+ * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
+ * be returned if the command was successfully sent to the timer command queue.
+ * When the command is actually processed will depend on the priority of the
+ * timer service/daemon task relative to other tasks in the system, although the
+ * timers expiry time is relative to when xTimerStart() is actually called.  The
+ * timer service/daemon task priority is set by the configTIMER_TASK_PRIORITY
+ * configuration constant.
+ *
+ * Example usage:
+ *
+ * See the xTimerCreate() API function example usage scenario.
+ *
+ */
+#define xTimerStart( xTimer, xTicksToWait ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START, ( xTaskGetTickCount() ), NULL, ( xTicksToWait ) )
+
+/**
+ * BaseType_t xTimerStop( TimerHandle_t xTimer, TickType_t xTicksToWait );
+ *
+ * Timer functionality is provided by a timer service/daemon task.  Many of the
+ * public FreeRTOS timer API functions send commands to the timer service task
+ * through a queue called the timer command queue.  The timer command queue is
+ * private to the kernel itself and is not directly accessible to application
+ * code.  The length of the timer command queue is set by the
+ * configTIMER_QUEUE_LENGTH configuration constant.
+ *
+ * xTimerStop() stops a timer that was previously started using either of the
+ * The xTimerStart(), xTimerReset(), xTimerStartFromISR(), xTimerResetFromISR(),
+ * xTimerChangePeriod() or xTimerChangePeriodFromISR() API functions.
+ *
+ * Stopping a timer ensures the timer is not in the active state.
+ *
+ * The configUSE_TIMERS configuration constant must be set to 1 for xTimerStop()
+ * to be available.
+ *
+ * @param xTimer The handle of the timer being stopped.
+ *
+ * @param xTicksToWait Specifies the time, in ticks, that the calling task should
+ * be held in the Blocked state to wait for the stop command to be successfully
+ * sent to the timer command queue, should the queue already be full when
+ * xTimerStop() was called.  xTicksToWait is ignored if xTimerStop() is called
+ * before the scheduler is started.
+ *
+ * @return pdFAIL will be returned if the stop command could not be sent to
+ * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
+ * be returned if the command was successfully sent to the timer command queue.
+ * When the command is actually processed will depend on the priority of the
+ * timer service/daemon task relative to other tasks in the system.  The timer
+ * service/daemon task priority is set by the configTIMER_TASK_PRIORITY
+ * configuration constant.
+ *
+ * Example usage:
+ *
+ * See the xTimerCreate() API function example usage scenario.
+ *
+ */
+#define xTimerStop( xTimer, xTicksToWait ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP, 0U, NULL, ( xTicksToWait ) )
+
+/**
+ * BaseType_t xTimerChangePeriod(   TimerHandle_t xTimer,
+ *                                  TickType_t xNewPeriod,
+ *                                  TickType_t xTicksToWait );
+ *
+ * Timer functionality is provided by a timer service/daemon task.  Many of the
+ * public FreeRTOS timer API functions send commands to the timer service task
+ * through a queue called the timer command queue.  The timer command queue is
+ * private to the kernel itself and is not directly accessible to application
+ * code.  The length of the timer command queue is set by the
+ * configTIMER_QUEUE_LENGTH configuration constant.
+ *
+ * xTimerChangePeriod() changes the period of a timer that was previously
+ * created using the xTimerCreate() API function.
+ *
+ * xTimerChangePeriod() can be called to change the period of an active or
+ * dormant state timer.
+ *
+ * The configUSE_TIMERS configuration constant must be set to 1 for
+ * xTimerChangePeriod() to be available.
+ *
+ * @param xTimer The handle of the timer that is having its period changed.
+ *
+ * @param xNewPeriod The new period for xTimer. Timer periods are specified in
+ * tick periods, so the constant portTICK_PERIOD_MS can be used to convert a time
+ * that has been specified in milliseconds.  For example, if the timer must
+ * expire after 100 ticks, then xNewPeriod should be set to 100.  Alternatively,
+ * if the timer must expire after 500ms, then xNewPeriod can be set to
+ * ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than
+ * or equal to 1000.
+ *
+ * @param xTicksToWait Specifies the time, in ticks, that the calling task should
+ * be held in the Blocked state to wait for the change period command to be
+ * successfully sent to the timer command queue, should the queue already be
+ * full when xTimerChangePeriod() was called.  xTicksToWait is ignored if
+ * xTimerChangePeriod() is called before the scheduler is started.
+ *
+ * @return pdFAIL will be returned if the change period command could not be
+ * sent to the timer command queue even after xTicksToWait ticks had passed.
+ * pdPASS will be returned if the command was successfully sent to the timer
+ * command queue.  When the command is actually processed will depend on the
+ * priority of the timer service/daemon task relative to other tasks in the
+ * system.  The timer service/daemon task priority is set by the
+ * configTIMER_TASK_PRIORITY configuration constant.
+ *
+ * Example usage:
+ * @verbatim
+ * // This function assumes xTimer has already been created.  If the timer
+ * // referenced by xTimer is already active when it is called, then the timer
+ * // is deleted.  If the timer referenced by xTimer is not active when it is
+ * // called, then the period of the timer is set to 500ms and the timer is
+ * // started.
+ * void vAFunction( TimerHandle_t xTimer )
+ * {
+ *     if( xTimerIsTimerActive( xTimer ) != pdFALSE ) // or more simply and equivalently "if( xTimerIsTimerActive( xTimer ) )"
+ *     {
+ *         // xTimer is already active - delete it.
+ *         xTimerDelete( xTimer );
+ *     }
+ *     else
+ *     {
+ *         // xTimer is not active, change its period to 500ms.  This will also
+ *         // cause the timer to start.  Block for a maximum of 100 ticks if the
+ *         // change period command cannot immediately be sent to the timer
+ *         // command queue.
+ *         if( xTimerChangePeriod( xTimer, 500 / portTICK_PERIOD_MS, 100 ) == pdPASS )
+ *         {
+ *             // The command was successfully sent.
+ *         }
+ *         else
+ *         {
+ *             // The command could not be sent, even after waiting for 100 ticks
+ *             // to pass.  Take appropriate action here.
+ *         }
+ *     }
+ * }
+ * @endverbatim
+ */
+#define xTimerChangePeriod( xTimer, xNewPeriod, xTicksToWait ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD, ( xNewPeriod ), NULL, ( xTicksToWait ) )
+
+/**
+ * BaseType_t xTimerDelete( TimerHandle_t xTimer, TickType_t xTicksToWait );
+ *
+ * Timer functionality is provided by a timer service/daemon task.  Many of the
+ * public FreeRTOS timer API functions send commands to the timer service task
+ * through a queue called the timer command queue.  The timer command queue is
+ * private to the kernel itself and is not directly accessible to application
+ * code.  The length of the timer command queue is set by the
+ * configTIMER_QUEUE_LENGTH configuration constant.
+ *
+ * xTimerDelete() deletes a timer that was previously created using the
+ * xTimerCreate() API function.
+ *
+ * The configUSE_TIMERS configuration constant must be set to 1 for
+ * xTimerDelete() to be available.
+ *
+ * @param xTimer The handle of the timer being deleted.
+ *
+ * @param xTicksToWait Specifies the time, in ticks, that the calling task should
+ * be held in the Blocked state to wait for the delete command to be
+ * successfully sent to the timer command queue, should the queue already be
+ * full when xTimerDelete() was called.  xTicksToWait is ignored if xTimerDelete()
+ * is called before the scheduler is started.
+ *
+ * @return pdFAIL will be returned if the delete command could not be sent to
+ * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
+ * be returned if the command was successfully sent to the timer command queue.
+ * When the command is actually processed will depend on the priority of the
+ * timer service/daemon task relative to other tasks in the system.  The timer
+ * service/daemon task priority is set by the configTIMER_TASK_PRIORITY
+ * configuration constant.
+ *
+ * Example usage:
+ *
+ * See the xTimerChangePeriod() API function example usage scenario.
+ */
+#define xTimerDelete( xTimer, xTicksToWait ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_DELETE, 0U, NULL, ( xTicksToWait ) )
+
+/**
+ * BaseType_t xTimerReset( TimerHandle_t xTimer, TickType_t xTicksToWait );
+ *
+ * Timer functionality is provided by a timer service/daemon task.  Many of the
+ * public FreeRTOS timer API functions send commands to the timer service task
+ * through a queue called the timer command queue.  The timer command queue is
+ * private to the kernel itself and is not directly accessible to application
+ * code.  The length of the timer command queue is set by the
+ * configTIMER_QUEUE_LENGTH configuration constant.
+ *
+ * xTimerReset() re-starts a timer that was previously created using the
+ * xTimerCreate() API function.  If the timer had already been started and was
+ * already in the active state, then xTimerReset() will cause the timer to
+ * re-evaluate its expiry time so that it is relative to when xTimerReset() was
+ * called.  If the timer was in the dormant state then xTimerReset() has
+ * equivalent functionality to the xTimerStart() API function.
+ *
+ * Resetting a timer ensures the timer is in the active state.  If the timer
+ * is not stopped, deleted, or reset in the mean time, the callback function
+ * associated with the timer will get called 'n' ticks after xTimerReset() was
+ * called, where 'n' is the timers defined period.
+ *
+ * It is valid to call xTimerReset() before the scheduler has been started, but
+ * when this is done the timer will not actually start until the scheduler is
+ * started, and the timers expiry time will be relative to when the scheduler is
+ * started, not relative to when xTimerReset() was called.
+ *
+ * The configUSE_TIMERS configuration constant must be set to 1 for xTimerReset()
+ * to be available.
+ *
+ * @param xTimer The handle of the timer being reset/started/restarted.
+ *
+ * @param xTicksToWait Specifies the time, in ticks, that the calling task should
+ * be held in the Blocked state to wait for the reset command to be successfully
+ * sent to the timer command queue, should the queue already be full when
+ * xTimerReset() was called.  xTicksToWait is ignored if xTimerReset() is called
+ * before the scheduler is started.
+ *
+ * @return pdFAIL will be returned if the reset command could not be sent to
+ * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
+ * be returned if the command was successfully sent to the timer command queue.
+ * When the command is actually processed will depend on the priority of the
+ * timer service/daemon task relative to other tasks in the system, although the
+ * timers expiry time is relative to when xTimerStart() is actually called.  The
+ * timer service/daemon task priority is set by the configTIMER_TASK_PRIORITY
+ * configuration constant.
+ *
+ * Example usage:
+ * @verbatim
+ * // When a key is pressed, an LCD back-light is switched on.  If 5 seconds pass
+ * // without a key being pressed, then the LCD back-light is switched off.  In
+ * // this case, the timer is a one-shot timer.
+ *
+ * TimerHandle_t xBacklightTimer = NULL;
+ *
+ * // The callback function assigned to the one-shot timer.  In this case the
+ * // parameter is not used.
+ * void vBacklightTimerCallback( TimerHandle_t pxTimer )
+ * {
+ *     // The timer expired, therefore 5 seconds must have passed since a key
+ *     // was pressed.  Switch off the LCD back-light.
+ *     vSetBacklightState( BACKLIGHT_OFF );
+ * }
+ *
+ * // The key press event handler.
+ * void vKeyPressEventHandler( char cKey )
+ * {
+ *     // Ensure the LCD back-light is on, then reset the timer that is
+ *     // responsible for turning the back-light off after 5 seconds of
+ *     // key inactivity.  Wait 10 ticks for the command to be successfully sent
+ *     // if it cannot be sent immediately.
+ *     vSetBacklightState( BACKLIGHT_ON );
+ *     if( xTimerReset( xBacklightTimer, 100 ) != pdPASS )
+ *     {
+ *         // The reset command was not executed successfully.  Take appropriate
+ *         // action here.
+ *     }
+ *
+ *     // Perform the rest of the key processing here.
+ * }
+ *
+ * void main( void )
+ * {
+ * int32_t x;
+ *
+ *     // Create then start the one-shot timer that is responsible for turning
+ *     // the back-light off if no keys are pressed within a 5 second period.
+ *     xBacklightTimer = xTimerCreate( "BacklightTimer",           // Just a text name, not used by the kernel.
+ *                                     ( 5000 / portTICK_PERIOD_MS), // The timer period in ticks.
+ *                                     pdFALSE,                    // The timer is a one-shot timer.
+ *                                     0,                          // The id is not used by the callback so can take any value.
+ *                                     vBacklightTimerCallback     // The callback function that switches the LCD back-light off.
+ *                                   );
+ *
+ *     if( xBacklightTimer == NULL )
+ *     {
+ *         // The timer was not created.
+ *     }
+ *     else
+ *     {
+ *         // Start the timer.  No block time is specified, and even if one was
+ *         // it would be ignored because the scheduler has not yet been
+ *         // started.
+ *         if( xTimerStart( xBacklightTimer, 0 ) != pdPASS )
+ *         {
+ *             // The timer could not be set into the Active state.
+ *         }
+ *     }
+ *
+ *     // ...
+ *     // Create tasks here.
+ *     // ...
+ *
+ *     // Starting the scheduler will start the timer running as it has already
+ *     // been set into the active state.
+ *     vTaskStartScheduler();
+ *
+ *     // Should not reach here.
+ *     for( ;; );
+ * }
+ * @endverbatim
+ */
+#define xTimerReset( xTimer, xTicksToWait ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_RESET, ( xTaskGetTickCount() ), NULL, ( xTicksToWait ) )
+
+/**
+ * BaseType_t xTimerStartFromISR(   TimerHandle_t xTimer,
+ *                                  BaseType_t *pxHigherPriorityTaskWoken );
+ *
+ * A version of xTimerStart() that can be called from an interrupt service
+ * routine.
+ *
+ * @param xTimer The handle of the timer being started/restarted.
+ *
+ * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
+ * of its time in the Blocked state, waiting for messages to arrive on the timer
+ * command queue.  Calling xTimerStartFromISR() writes a message to the timer
+ * command queue, so has the potential to transition the timer service/daemon
+ * task out of the Blocked state.  If calling xTimerStartFromISR() causes the
+ * timer service/daemon task to leave the Blocked state, and the timer service/
+ * daemon task has a priority equal to or greater than the currently executing
+ * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will
+ * get set to pdTRUE internally within the xTimerStartFromISR() function.  If
+ * xTimerStartFromISR() sets this value to pdTRUE then a context switch should
+ * be performed before the interrupt exits.
+ *
+ * @return pdFAIL will be returned if the start command could not be sent to
+ * the timer command queue.  pdPASS will be returned if the command was
+ * successfully sent to the timer command queue.  When the command is actually
+ * processed will depend on the priority of the timer service/daemon task
+ * relative to other tasks in the system, although the timers expiry time is
+ * relative to when xTimerStartFromISR() is actually called.  The timer
+ * service/daemon task priority is set by the configTIMER_TASK_PRIORITY
+ * configuration constant.
+ *
+ * Example usage:
+ * @verbatim
+ * // This scenario assumes xBacklightTimer has already been created.  When a
+ * // key is pressed, an LCD back-light is switched on.  If 5 seconds pass
+ * // without a key being pressed, then the LCD back-light is switched off.  In
+ * // this case, the timer is a one-shot timer, and unlike the example given for
+ * // the xTimerReset() function, the key press event handler is an interrupt
+ * // service routine.
+ *
+ * // The callback function assigned to the one-shot timer.  In this case the
+ * // parameter is not used.
+ * void vBacklightTimerCallback( TimerHandle_t pxTimer )
+ * {
+ *     // The timer expired, therefore 5 seconds must have passed since a key
+ *     // was pressed.  Switch off the LCD back-light.
+ *     vSetBacklightState( BACKLIGHT_OFF );
+ * }
+ *
+ * // The key press interrupt service routine.
+ * void vKeyPressEventInterruptHandler( void )
+ * {
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+ *
+ *     // Ensure the LCD back-light is on, then restart the timer that is
+ *     // responsible for turning the back-light off after 5 seconds of
+ *     // key inactivity.  This is an interrupt service routine so can only
+ *     // call FreeRTOS API functions that end in "FromISR".
+ *     vSetBacklightState( BACKLIGHT_ON );
+ *
+ *     // xTimerStartFromISR() or xTimerResetFromISR() could be called here
+ *     // as both cause the timer to re-calculate its expiry time.
+ *     // xHigherPriorityTaskWoken was initialised to pdFALSE when it was
+ *     // declared (in this function).
+ *     if( xTimerStartFromISR( xBacklightTimer, &xHigherPriorityTaskWoken ) != pdPASS )
+ *     {
+ *         // The start command was not executed successfully.  Take appropriate
+ *         // action here.
+ *     }
+ *
+ *     // Perform the rest of the key processing here.
+ *
+ *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
+ *     // should be performed.  The syntax required to perform a context switch
+ *     // from inside an ISR varies from port to port, and from compiler to
+ *     // compiler.  Inspect the demos for the port you are using to find the
+ *     // actual syntax required.
+ *     if( xHigherPriorityTaskWoken != pdFALSE )
+ *     {
+ *         // Call the interrupt safe yield function here (actual function
+ *         // depends on the FreeRTOS port being used).
+ *     }
+ * }
+ * @endverbatim
+ */
+#define xTimerStartFromISR( xTimer, pxHigherPriorityTaskWoken ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START_FROM_ISR, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U )
+
+/**
+ * BaseType_t xTimerStopFromISR(    TimerHandle_t xTimer,
+ *                                  BaseType_t *pxHigherPriorityTaskWoken );
+ *
+ * A version of xTimerStop() that can be called from an interrupt service
+ * routine.
+ *
+ * @param xTimer The handle of the timer being stopped.
+ *
+ * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
+ * of its time in the Blocked state, waiting for messages to arrive on the timer
+ * command queue.  Calling xTimerStopFromISR() writes a message to the timer
+ * command queue, so has the potential to transition the timer service/daemon
+ * task out of the Blocked state.  If calling xTimerStopFromISR() causes the
+ * timer service/daemon task to leave the Blocked state, and the timer service/
+ * daemon task has a priority equal to or greater than the currently executing
+ * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will
+ * get set to pdTRUE internally within the xTimerStopFromISR() function.  If
+ * xTimerStopFromISR() sets this value to pdTRUE then a context switch should
+ * be performed before the interrupt exits.
+ *
+ * @return pdFAIL will be returned if the stop command could not be sent to
+ * the timer command queue.  pdPASS will be returned if the command was
+ * successfully sent to the timer command queue.  When the command is actually
+ * processed will depend on the priority of the timer service/daemon task
+ * relative to other tasks in the system.  The timer service/daemon task
+ * priority is set by the configTIMER_TASK_PRIORITY configuration constant.
+ *
+ * Example usage:
+ * @verbatim
+ * // This scenario assumes xTimer has already been created and started.  When
+ * // an interrupt occurs, the timer should be simply stopped.
+ *
+ * // The interrupt service routine that stops the timer.
+ * void vAnExampleInterruptServiceRoutine( void )
+ * {
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+ *
+ *     // The interrupt has occurred - simply stop the timer.
+ *     // xHigherPriorityTaskWoken was set to pdFALSE where it was defined
+ *     // (within this function).  As this is an interrupt service routine, only
+ *     // FreeRTOS API functions that end in "FromISR" can be used.
+ *     if( xTimerStopFromISR( xTimer, &xHigherPriorityTaskWoken ) != pdPASS )
+ *     {
+ *         // The stop command was not executed successfully.  Take appropriate
+ *         // action here.
+ *     }
+ *
+ *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
+ *     // should be performed.  The syntax required to perform a context switch
+ *     // from inside an ISR varies from port to port, and from compiler to
+ *     // compiler.  Inspect the demos for the port you are using to find the
+ *     // actual syntax required.
+ *     if( xHigherPriorityTaskWoken != pdFALSE )
+ *     {
+ *         // Call the interrupt safe yield function here (actual function
+ *         // depends on the FreeRTOS port being used).
+ *     }
+ * }
+ * @endverbatim
+ */
+#define xTimerStopFromISR( xTimer, pxHigherPriorityTaskWoken ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP_FROM_ISR, 0, ( pxHigherPriorityTaskWoken ), 0U )
+
+/**
+ * BaseType_t xTimerChangePeriodFromISR( TimerHandle_t xTimer,
+ *                                       TickType_t xNewPeriod,
+ *                                       BaseType_t *pxHigherPriorityTaskWoken );
+ *
+ * A version of xTimerChangePeriod() that can be called from an interrupt
+ * service routine.
+ *
+ * @param xTimer The handle of the timer that is having its period changed.
+ *
+ * @param xNewPeriod The new period for xTimer. Timer periods are specified in
+ * tick periods, so the constant portTICK_PERIOD_MS can be used to convert a time
+ * that has been specified in milliseconds.  For example, if the timer must
+ * expire after 100 ticks, then xNewPeriod should be set to 100.  Alternatively,
+ * if the timer must expire after 500ms, then xNewPeriod can be set to
+ * ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than
+ * or equal to 1000.
+ *
+ * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
+ * of its time in the Blocked state, waiting for messages to arrive on the timer
+ * command queue.  Calling xTimerChangePeriodFromISR() writes a message to the
+ * timer command queue, so has the potential to transition the timer service/
+ * daemon task out of the Blocked state.  If calling xTimerChangePeriodFromISR()
+ * causes the timer service/daemon task to leave the Blocked state, and the
+ * timer service/daemon task has a priority equal to or greater than the
+ * currently executing task (the task that was interrupted), then
+ * *pxHigherPriorityTaskWoken will get set to pdTRUE internally within the
+ * xTimerChangePeriodFromISR() function.  If xTimerChangePeriodFromISR() sets
+ * this value to pdTRUE then a context switch should be performed before the
+ * interrupt exits.
+ *
+ * @return pdFAIL will be returned if the command to change the timers period
+ * could not be sent to the timer command queue.  pdPASS will be returned if the
+ * command was successfully sent to the timer command queue.  When the command
+ * is actually processed will depend on the priority of the timer service/daemon
+ * task relative to other tasks in the system.  The timer service/daemon task
+ * priority is set by the configTIMER_TASK_PRIORITY configuration constant.
+ *
+ * Example usage:
+ * @verbatim
+ * // This scenario assumes xTimer has already been created and started.  When
+ * // an interrupt occurs, the period of xTimer should be changed to 500ms.
+ *
+ * // The interrupt service routine that changes the period of xTimer.
+ * void vAnExampleInterruptServiceRoutine( void )
+ * {
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+ *
+ *     // The interrupt has occurred - change the period of xTimer to 500ms.
+ *     // xHigherPriorityTaskWoken was set to pdFALSE where it was defined
+ *     // (within this function).  As this is an interrupt service routine, only
+ *     // FreeRTOS API functions that end in "FromISR" can be used.
+ *     if( xTimerChangePeriodFromISR( xTimer, &xHigherPriorityTaskWoken ) != pdPASS )
+ *     {
+ *         // The command to change the timers period was not executed
+ *         // successfully.  Take appropriate action here.
+ *     }
+ *
+ *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
+ *     // should be performed.  The syntax required to perform a context switch
+ *     // from inside an ISR varies from port to port, and from compiler to
+ *     // compiler.  Inspect the demos for the port you are using to find the
+ *     // actual syntax required.
+ *     if( xHigherPriorityTaskWoken != pdFALSE )
+ *     {
+ *         // Call the interrupt safe yield function here (actual function
+ *         // depends on the FreeRTOS port being used).
+ *     }
+ * }
+ * @endverbatim
+ */
+#define xTimerChangePeriodFromISR( xTimer, xNewPeriod, pxHigherPriorityTaskWoken ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD_FROM_ISR, ( xNewPeriod ), ( pxHigherPriorityTaskWoken ), 0U )
+
+/**
+ * BaseType_t xTimerResetFromISR(   TimerHandle_t xTimer,
+ *                                  BaseType_t *pxHigherPriorityTaskWoken );
+ *
+ * A version of xTimerReset() that can be called from an interrupt service
+ * routine.
+ *
+ * @param xTimer The handle of the timer that is to be started, reset, or
+ * restarted.
+ *
+ * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
+ * of its time in the Blocked state, waiting for messages to arrive on the timer
+ * command queue.  Calling xTimerResetFromISR() writes a message to the timer
+ * command queue, so has the potential to transition the timer service/daemon
+ * task out of the Blocked state.  If calling xTimerResetFromISR() causes the
+ * timer service/daemon task to leave the Blocked state, and the timer service/
+ * daemon task has a priority equal to or greater than the currently executing
+ * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will
+ * get set to pdTRUE internally within the xTimerResetFromISR() function.  If
+ * xTimerResetFromISR() sets this value to pdTRUE then a context switch should
+ * be performed before the interrupt exits.
+ *
+ * @return pdFAIL will be returned if the reset command could not be sent to
+ * the timer command queue.  pdPASS will be returned if the command was
+ * successfully sent to the timer command queue.  When the command is actually
+ * processed will depend on the priority of the timer service/daemon task
+ * relative to other tasks in the system, although the timers expiry time is
+ * relative to when xTimerResetFromISR() is actually called.  The timer service/daemon
+ * task priority is set by the configTIMER_TASK_PRIORITY configuration constant.
+ *
+ * Example usage:
+ * @verbatim
+ * // This scenario assumes xBacklightTimer has already been created.  When a
+ * // key is pressed, an LCD back-light is switched on.  If 5 seconds pass
+ * // without a key being pressed, then the LCD back-light is switched off.  In
+ * // this case, the timer is a one-shot timer, and unlike the example given for
+ * // the xTimerReset() function, the key press event handler is an interrupt
+ * // service routine.
+ *
+ * // The callback function assigned to the one-shot timer.  In this case the
+ * // parameter is not used.
+ * void vBacklightTimerCallback( TimerHandle_t pxTimer )
+ * {
+ *     // The timer expired, therefore 5 seconds must have passed since a key
+ *     // was pressed.  Switch off the LCD back-light.
+ *     vSetBacklightState( BACKLIGHT_OFF );
+ * }
+ *
+ * // The key press interrupt service routine.
+ * void vKeyPressEventInterruptHandler( void )
+ * {
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+ *
+ *     // Ensure the LCD back-light is on, then reset the timer that is
+ *     // responsible for turning the back-light off after 5 seconds of
+ *     // key inactivity.  This is an interrupt service routine so can only
+ *     // call FreeRTOS API functions that end in "FromISR".
+ *     vSetBacklightState( BACKLIGHT_ON );
+ *
+ *     // xTimerStartFromISR() or xTimerResetFromISR() could be called here
+ *     // as both cause the timer to re-calculate its expiry time.
+ *     // xHigherPriorityTaskWoken was initialised to pdFALSE when it was
+ *     // declared (in this function).
+ *     if( xTimerResetFromISR( xBacklightTimer, &xHigherPriorityTaskWoken ) != pdPASS )
+ *     {
+ *         // The reset command was not executed successfully.  Take appropriate
+ *         // action here.
+ *     }
+ *
+ *     // Perform the rest of the key processing here.
+ *
+ *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
+ *     // should be performed.  The syntax required to perform a context switch
+ *     // from inside an ISR varies from port to port, and from compiler to
+ *     // compiler.  Inspect the demos for the port you are using to find the
+ *     // actual syntax required.
+ *     if( xHigherPriorityTaskWoken != pdFALSE )
+ *     {
+ *         // Call the interrupt safe yield function here (actual function
+ *         // depends on the FreeRTOS port being used).
+ *     }
+ * }
+ * @endverbatim
+ */
+#define xTimerResetFromISR( xTimer, pxHigherPriorityTaskWoken ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_RESET_FROM_ISR, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U )
+
+
+/**
+ * BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend,
+ *                                          void *pvParameter1,
+ *                                          uint32_t ulParameter2,
+ *                                          BaseType_t *pxHigherPriorityTaskWoken );
+ *
+ *
+ * Used from application interrupt service routines to defer the execution of a
+ * function to the RTOS daemon task (the timer service task, hence this function
+ * is implemented in timers.c and is prefixed with 'Timer').
+ *
+ * Ideally an interrupt service routine (ISR) is kept as short as possible, but
+ * sometimes an ISR either has a lot of processing to do, or needs to perform
+ * processing that is not deterministic.  In these cases
+ * xTimerPendFunctionCallFromISR() can be used to defer processing of a function
+ * to the RTOS daemon task.
+ *
+ * A mechanism is provided that allows the interrupt to return directly to the
+ * task that will subsequently execute the pended callback function.  This
+ * allows the callback function to execute contiguously in time with the
+ * interrupt - just as if the callback had executed in the interrupt itself.
+ *
+ * @param xFunctionToPend The function to execute from the timer service/
+ * daemon task.  The function must conform to the PendedFunction_t
+ * prototype.
+ *
+ * @param pvParameter1 The value of the callback function's first parameter.
+ * The parameter has a void * type to allow it to be used to pass any type.
+ * For example, unsigned longs can be cast to a void *, or the void * can be
+ * used to point to a structure.
+ *
+ * @param ulParameter2 The value of the callback function's second parameter.
+ *
+ * @param pxHigherPriorityTaskWoken As mentioned above, calling this function
+ * will result in a message being sent to the timer daemon task.  If the
+ * priority of the timer daemon task (which is set using
+ * configTIMER_TASK_PRIORITY in FreeRTOSConfig.h) is higher than the priority of
+ * the currently running task (the task the interrupt interrupted) then
+ * *pxHigherPriorityTaskWoken will be set to pdTRUE within
+ * xTimerPendFunctionCallFromISR(), indicating that a context switch should be
+ * requested before the interrupt exits.  For that reason
+ * *pxHigherPriorityTaskWoken must be initialised to pdFALSE.  See the
+ * example code below.
+ *
+ * @return pdPASS is returned if the message was successfully sent to the
+ * timer daemon task, otherwise pdFALSE is returned.
+ *
+ * Example usage:
+ * @verbatim
+ *
+ *  // The callback function that will execute in the context of the daemon task.
+ *  // Note callback functions must all use this same prototype.
+ *  void vProcessInterface( void *pvParameter1, uint32_t ulParameter2 )
+ *  {
+ *      BaseType_t xInterfaceToService;
+ *
+ *      // The interface that requires servicing is passed in the second
+ *      // parameter.  The first parameter is not used in this case.
+ *      xInterfaceToService = ( BaseType_t ) ulParameter2;
+ *
+ *      // ...Perform the processing here...
+ *  }
+ *
+ *  // An ISR that receives data packets from multiple interfaces
+ *  void vAnISR( void )
+ *  {
+ *      BaseType_t xInterfaceToService, xHigherPriorityTaskWoken;
+ *
+ *      // Query the hardware to determine which interface needs processing.
+ *      xInterfaceToService = prvCheckInterfaces();
+ *
+ *      // The actual processing is to be deferred to a task.  Request the
+ *      // vProcessInterface() callback function is executed, passing in the
+ *      // number of the interface that needs processing.  The interface to
+ *      // service is passed in the second parameter.  The first parameter is
+ *      // not used in this case.
+ *      xHigherPriorityTaskWoken = pdFALSE;
+ *      xTimerPendFunctionCallFromISR( vProcessInterface, NULL, ( uint32_t ) xInterfaceToService, &xHigherPriorityTaskWoken );
+ *
+ *      // If xHigherPriorityTaskWoken is now set to pdTRUE then a context
+ *      // switch should be requested.  The macro used is port specific and will
+ *      // be either portYIELD_FROM_ISR() or portEND_SWITCHING_ISR() - refer to
+ *      // the documentation page for the port being used.
+ *      portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
+ *
+ *  }
+ * @endverbatim
+ */
+BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend,
+                                          void * pvParameter1,
+                                          uint32_t ulParameter2,
+                                          BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+
+/**
+ * BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend,
+ *                                    void *pvParameter1,
+ *                                    uint32_t ulParameter2,
+ *                                    TickType_t xTicksToWait );
+ *
+ *
+ * Used to defer the execution of a function to the RTOS daemon task (the timer
+ * service task, hence this function is implemented in timers.c and is prefixed
+ * with 'Timer').
+ *
+ * @param xFunctionToPend The function to execute from the timer service/
+ * daemon task.  The function must conform to the PendedFunction_t
+ * prototype.
+ *
+ * @param pvParameter1 The value of the callback function's first parameter.
+ * The parameter has a void * type to allow it to be used to pass any type.
+ * For example, unsigned longs can be cast to a void *, or the void * can be
+ * used to point to a structure.
+ *
+ * @param ulParameter2 The value of the callback function's second parameter.
+ *
+ * @param xTicksToWait Calling this function will result in a message being
+ * sent to the timer daemon task on a queue.  xTicksToWait is the amount of
+ * time the calling task should remain in the Blocked state (so not using any
+ * processing time) for space to become available on the timer queue if the
+ * queue is found to be full.
+ *
+ * @return pdPASS is returned if the message was successfully sent to the
+ * timer daemon task, otherwise pdFALSE is returned.
+ *
+ */
+BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend,
+                                   void * pvParameter1,
+                                   uint32_t ulParameter2,
+                                   TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/**
+ * const char * const pcTimerGetName( TimerHandle_t xTimer );
+ *
+ * Returns the name that was assigned to a timer when the timer was created.
+ *
+ * @param xTimer The handle of the timer being queried.
+ *
+ * @return The name assigned to the timer specified by the xTimer parameter.
+ */
+const char * pcTimerGetName( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+
+/**
+ * void vTimerSetReloadMode( TimerHandle_t xTimer, const UBaseType_t uxAutoReload );
+ *
+ * Updates a timer to be either an auto-reload timer, in which case the timer
+ * automatically resets itself each time it expires, or a one-shot timer, in
+ * which case the timer will only expire once unless it is manually restarted.
+ *
+ * @param xTimer The handle of the timer being updated.
+ *
+ * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will
+ * expire repeatedly with a frequency set by the timer's period (see the
+ * xTimerPeriodInTicks parameter of the xTimerCreate() API function).  If
+ * uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and
+ * enter the dormant state after it expires.
+ */
+void vTimerSetReloadMode( TimerHandle_t xTimer,
+                          const UBaseType_t uxAutoReload ) PRIVILEGED_FUNCTION;
+
+/**
+ * UBaseType_t uxTimerGetReloadMode( TimerHandle_t xTimer );
+ *
+ * Queries a timer to determine if it is an auto-reload timer, in which case the timer
+ * automatically resets itself each time it expires, or a one-shot timer, in
+ * which case the timer will only expire once unless it is manually restarted.
+ *
+ * @param xTimer The handle of the timer being queried.
+ *
+ * @return If the timer is an auto-reload timer then pdTRUE is returned, otherwise
+ * pdFALSE is returned.
+ */
+UBaseType_t uxTimerGetReloadMode( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
+
+/**
+ * TickType_t xTimerGetPeriod( TimerHandle_t xTimer );
+ *
+ * Returns the period of a timer.
+ *
+ * @param xTimer The handle of the timer being queried.
+ *
+ * @return The period of the timer in ticks.
+ */
+TickType_t xTimerGetPeriod( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
+
+/**
+ * TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer );
+ *
+ * Returns the time in ticks at which the timer will expire.  If this is less
+ * than the current tick count then the expiry time has overflowed from the
+ * current time.
+ *
+ * @param xTimer The handle of the timer being queried.
+ *
+ * @return If the timer is running then the time in ticks at which the timer
+ * will next expire is returned.  If the timer is not running then the return
+ * value is undefined.
+ */
+TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
+
+/*
+ * Functions beyond this part are not part of the public API and are intended
+ * for use by the kernel only.
+ */
+BaseType_t xTimerCreateTimerTask( void ) PRIVILEGED_FUNCTION;
+BaseType_t xTimerGenericCommand( TimerHandle_t xTimer,
+                                 const BaseType_t xCommandID,
+                                 const TickType_t xOptionalValue,
+                                 BaseType_t * const pxHigherPriorityTaskWoken,
+                                 const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+#if ( configUSE_TRACE_FACILITY == 1 )
+    void vTimerSetTimerNumber( TimerHandle_t xTimer,
+                               UBaseType_t uxTimerNumber ) PRIVILEGED_FUNCTION;
+    UBaseType_t uxTimerGetTimerNumber( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
+#endif
+
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+
+    /**
+     * task.h
+     * 
void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer, StackType_t ** ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize ) 

+     * 
+     * This function is used to provide a statically allocated block of memory to FreeRTOS to hold the Timer Task TCB.  This function is required when 
+     * configSUPPORT_STATIC_ALLOCATION is set.  For more information see this URI: https://www.FreeRTOS.org/a00110.html#configSUPPORT_STATIC_ALLOCATION
+     * 
+     * @param ppxTimerTaskTCBBuffer   A handle to a statically allocated TCB buffer
+     * @param ppxTimerTaskStackBuffer A handle to a statically allocated Stack buffer for thie idle task
+     * @param pulTimerTaskStackSize   A pointer to the number of elements that will fit in the allocated stack buffer
+     */
+    void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer,
+                                          StackType_t ** ppxTimerTaskStackBuffer,
+                                              uint32_t * pulTimerTaskStackSize );
+
+#endif
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+#endif /* TIMERS_H */
diff --git a/lexicon.txt b/lexicon.txt
new file mode 100644
index 000000000..8cb6e9f9b
--- /dev/null
+++ b/lexicon.txt
@@ -0,0 +1,3082 @@
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+cfgmainoscstartuptime
+cfgmckreg
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+cfgmessagectrl
+cfgmessagectrlreg
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+disablecan
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+disablemainoscillator
+disablepck
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+enableep
+enableit
+enablemainoscillator
+enablepck
+enableperiphclock
+enablerx
+enabletx
+enametoolong
+endbusres
+endian
+endif
+endinit
+endint
+endrx
+endtx
+endverbatim
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+getmainclockfreqreg
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+xregion
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diff --git a/list.c b/list.c
index 0e0e72d82..5d1dc9e79 100644
--- a/list.c
+++ b/list.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,180 +19,192 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 
 #include 
+
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
+ * all the API functions to use the MPU wrappers.  That should only be done when
+ * task.h is included from an application file. */
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
 #include "FreeRTOS.h"
 #include "list.h"
 
+/* Lint e9021, e961 and e750 are suppressed as a MISRA exception justified
+ * because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be
+ * defined for the header files above, but not in this file, in order to
+ * generate the correct privileged Vs unprivileged linkage and placement. */
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750 !e9021. */
+
 /*-----------------------------------------------------------
- * PUBLIC LIST API documented in list.h
- *----------------------------------------------------------*/
+* PUBLIC LIST API documented in list.h
+*----------------------------------------------------------*/
 
 void vListInitialise( List_t * const pxList )
 {
-	/* The list structure contains a list item which is used to mark the
-	end of the list.  To initialise the list the list end is inserted
-	as the only list entry. */
-	pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd );			/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
+    /* The list structure contains a list item which is used to mark the
+     * end of the list.  To initialise the list the list end is inserted
+     * as the only list entry. */
+    pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 
-	/* The list end value is the highest possible value in the list to
-	ensure it remains at the end of the list. */
-	pxList->xListEnd.xItemValue = portMAX_DELAY;
+    /* The list end value is the highest possible value in the list to
+     * ensure it remains at the end of the list. */
+    pxList->xListEnd.xItemValue = portMAX_DELAY;
 
-	/* The list end next and previous pointers point to itself so we know
-	when the list is empty. */
-	pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd );	/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
-	pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
+    /* The list end next and previous pointers point to itself so we know
+     * when the list is empty. */
+    pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd );     /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
+    pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 
-	pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
+    pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
 
-	/* Write known values into the list if
-	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
-	listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
-	listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
+    /* Write known values into the list if
+     * configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+    listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
+    listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
 }
 /*-----------------------------------------------------------*/
 
 void vListInitialiseItem( ListItem_t * const pxItem )
 {
-	/* Make sure the list item is not recorded as being on a list. */
-	pxItem->pxContainer = NULL;
+    /* Make sure the list item is not recorded as being on a list. */
+    pxItem->pxContainer = NULL;
 
-	/* Write known values into the list item if
-	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
-	listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
-	listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
+    /* Write known values into the list item if
+     * configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+    listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
+    listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
 }
 /*-----------------------------------------------------------*/
 
-void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem )
+void vListInsertEnd( List_t * const pxList,
+                     ListItem_t * const pxNewListItem )
 {
-ListItem_t * const pxIndex = pxList->pxIndex;
+    ListItem_t * const pxIndex = pxList->pxIndex;
 
-	/* Only effective when configASSERT() is also defined, these tests may catch
-	the list data structures being overwritten in memory.  They will not catch
-	data errors caused by incorrect configuration or use of FreeRTOS. */
-	listTEST_LIST_INTEGRITY( pxList );
-	listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
+    /* Only effective when configASSERT() is also defined, these tests may catch
+     * the list data structures being overwritten in memory.  They will not catch
+     * data errors caused by incorrect configuration or use of FreeRTOS. */
+    listTEST_LIST_INTEGRITY( pxList );
+    listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
 
-	/* Insert a new list item into pxList, but rather than sort the list,
-	makes the new list item the last item to be removed by a call to
-	listGET_OWNER_OF_NEXT_ENTRY(). */
-	pxNewListItem->pxNext = pxIndex;
-	pxNewListItem->pxPrevious = pxIndex->pxPrevious;
+    /* Insert a new list item into pxList, but rather than sort the list,
+     * makes the new list item the last item to be removed by a call to
+     * listGET_OWNER_OF_NEXT_ENTRY(). */
+    pxNewListItem->pxNext = pxIndex;
+    pxNewListItem->pxPrevious = pxIndex->pxPrevious;
 
-	/* Only used during decision coverage testing. */
-	mtCOVERAGE_TEST_DELAY();
+    /* Only used during decision coverage testing. */
+    mtCOVERAGE_TEST_DELAY();
 
-	pxIndex->pxPrevious->pxNext = pxNewListItem;
-	pxIndex->pxPrevious = pxNewListItem;
+    pxIndex->pxPrevious->pxNext = pxNewListItem;
+    pxIndex->pxPrevious = pxNewListItem;
 
-	/* Remember which list the item is in. */
-	pxNewListItem->pxContainer = pxList;
+    /* Remember which list the item is in. */
+    pxNewListItem->pxContainer = pxList;
 
-	( pxList->uxNumberOfItems )++;
+    ( pxList->uxNumberOfItems )++;
 }
 /*-----------------------------------------------------------*/
 
-void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem )
+void vListInsert( List_t * const pxList,
+                  ListItem_t * const pxNewListItem )
 {
-ListItem_t *pxIterator;
-const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
+    ListItem_t * pxIterator;
+    const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
 
-	/* Only effective when configASSERT() is also defined, these tests may catch
-	the list data structures being overwritten in memory.  They will not catch
-	data errors caused by incorrect configuration or use of FreeRTOS. */
-	listTEST_LIST_INTEGRITY( pxList );
-	listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
+    /* Only effective when configASSERT() is also defined, these tests may catch
+     * the list data structures being overwritten in memory.  They will not catch
+     * data errors caused by incorrect configuration or use of FreeRTOS. */
+    listTEST_LIST_INTEGRITY( pxList );
+    listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
 
-	/* Insert the new list item into the list, sorted in xItemValue order.
+    /* Insert the new list item into the list, sorted in xItemValue order.
+     *
+     * If the list already contains a list item with the same item value then the
+     * new list item should be placed after it.  This ensures that TCBs which are
+     * stored in ready lists (all of which have the same xItemValue value) get a
+     * share of the CPU.  However, if the xItemValue is the same as the back marker
+     * the iteration loop below will not end.  Therefore the value is checked
+     * first, and the algorithm slightly modified if necessary. */
+    if( xValueOfInsertion == portMAX_DELAY )
+    {
+        pxIterator = pxList->xListEnd.pxPrevious;
+    }
+    else
+    {
+        /* *** NOTE ***********************************************************
+        *  If you find your application is crashing here then likely causes are
+        *  listed below.  In addition see https://www.FreeRTOS.org/FAQHelp.html for
+        *  more tips, and ensure configASSERT() is defined!
+        *  https://www.FreeRTOS.org/a00110.html#configASSERT
+        *
+        *   1) Stack overflow -
+        *      see https://www.FreeRTOS.org/Stacks-and-stack-overflow-checking.html
+        *   2) Incorrect interrupt priority assignment, especially on Cortex-M
+        *      parts where numerically high priority values denote low actual
+        *      interrupt priorities, which can seem counter intuitive.  See
+        *      https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html and the definition
+        *      of configMAX_SYSCALL_INTERRUPT_PRIORITY on
+        *      https://www.FreeRTOS.org/a00110.html
+        *   3) Calling an API function from within a critical section or when
+        *      the scheduler is suspended, or calling an API function that does
+        *      not end in "FromISR" from an interrupt.
+        *   4) Using a queue or semaphore before it has been initialised or
+        *      before the scheduler has been started (are interrupts firing
+        *      before vTaskStartScheduler() has been called?).
+        **********************************************************************/
 
-	If the list already contains a list item with the same item value then the
-	new list item should be placed after it.  This ensures that TCBs which are
-	stored in ready lists (all of which have the same xItemValue value) get a
-	share of the CPU.  However, if the xItemValue is the same as the back marker
-	the iteration loop below will not end.  Therefore the value is checked
-	first, and the algorithm slightly modified if necessary. */
-	if( xValueOfInsertion == portMAX_DELAY )
-	{
-		pxIterator = pxList->xListEnd.pxPrevious;
-	}
-	else
-	{
-		/* *** NOTE ***********************************************************
-		If you find your application is crashing here then likely causes are
-		listed below.  In addition see https://www.freertos.org/FAQHelp.html for
-		more tips, and ensure configASSERT() is defined!
-		https://www.freertos.org/a00110.html#configASSERT
+        for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */
+        {
+            /* There is nothing to do here, just iterating to the wanted
+             * insertion position. */
+        }
+    }
 
-			1) Stack overflow -
-			   see https://www.freertos.org/Stacks-and-stack-overflow-checking.html
-			2) Incorrect interrupt priority assignment, especially on Cortex-M
-			   parts where numerically high priority values denote low actual
-			   interrupt priorities, which can seem counter intuitive.  See
-			   https://www.freertos.org/RTOS-Cortex-M3-M4.html and the definition
-			   of configMAX_SYSCALL_INTERRUPT_PRIORITY on
-			   https://www.freertos.org/a00110.html
-			3) Calling an API function from within a critical section or when
-			   the scheduler is suspended, or calling an API function that does
-			   not end in "FromISR" from an interrupt.
-			4) Using a queue or semaphore before it has been initialised or
-			   before the scheduler has been started (are interrupts firing
-			   before vTaskStartScheduler() has been called?).
-		**********************************************************************/
+    pxNewListItem->pxNext = pxIterator->pxNext;
+    pxNewListItem->pxNext->pxPrevious = pxNewListItem;
+    pxNewListItem->pxPrevious = pxIterator;
+    pxIterator->pxNext = pxNewListItem;
 
-		for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */
-		{
-			/* There is nothing to do here, just iterating to the wanted
-			insertion position. */
-		}
-	}
+    /* Remember which list the item is in.  This allows fast removal of the
+     * item later. */
+    pxNewListItem->pxContainer = pxList;
 
-	pxNewListItem->pxNext = pxIterator->pxNext;
-	pxNewListItem->pxNext->pxPrevious = pxNewListItem;
-	pxNewListItem->pxPrevious = pxIterator;
-	pxIterator->pxNext = pxNewListItem;
-
-	/* Remember which list the item is in.  This allows fast removal of the
-	item later. */
-	pxNewListItem->pxContainer = pxList;
-
-	( pxList->uxNumberOfItems )++;
+    ( pxList->uxNumberOfItems )++;
 }
 /*-----------------------------------------------------------*/
 
 UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
 {
 /* The list item knows which list it is in.  Obtain the list from the list
-item. */
-List_t * const pxList = pxItemToRemove->pxContainer;
+ * item. */
+    List_t * const pxList = pxItemToRemove->pxContainer;
 
-	pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
-	pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
+    pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
+    pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
 
-	/* Only used during decision coverage testing. */
-	mtCOVERAGE_TEST_DELAY();
+    /* Only used during decision coverage testing. */
+    mtCOVERAGE_TEST_DELAY();
 
-	/* Make sure the index is left pointing to a valid item. */
-	if( pxList->pxIndex == pxItemToRemove )
-	{
-		pxList->pxIndex = pxItemToRemove->pxPrevious;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    /* Make sure the index is left pointing to a valid item. */
+    if( pxList->pxIndex == pxItemToRemove )
+    {
+        pxList->pxIndex = pxItemToRemove->pxPrevious;
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	pxItemToRemove->pxContainer = NULL;
-	( pxList->uxNumberOfItems )--;
+    pxItemToRemove->pxContainer = NULL;
+    ( pxList->uxNumberOfItems )--;
 
-	return pxList->uxNumberOfItems;
+    return pxList->uxNumberOfItems;
 }
 /*-----------------------------------------------------------*/
-
diff --git a/portable/ARMv8M/copy_files.py b/portable/ARMv8M/copy_files.py
index dad5d50da..134680d5c 100644
--- a/portable/ARMv8M/copy_files.py
+++ b/portable/ARMv8M/copy_files.py
@@ -1,5 +1,5 @@
 #/*
-# * FreeRTOS Kernel V10.3.1
+# * FreeRTOS Kernel V10.4.1
 # * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 # *
 # * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 # * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 # * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 # *
-# * http://www.FreeRTOS.org
-# * http://aws.amazon.com/freertos
+# * https://www.FreeRTOS.org
+# * https://github.com/FreeRTOS
 # *
 # * 1 tab == 4 spaces!
 # */
diff --git a/portable/ARMv8M/non_secure/port.c b/portable/ARMv8M/non_secure/port.c
index ba6bd2602..fd6d46f13 100644
--- a/portable/ARMv8M/non_secure/port.c
+++ b/portable/ARMv8M/non_secure/port.c
@@ -1,1149 +1,1192 @@
-/*
- * FreeRTOS Kernel V10.3.1
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
- * all the API functions to use the MPU wrappers. That should only be done when
- * task.h is included from an application file. */
-#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-/* Scheduler includes. */
-#include "FreeRTOS.h"
-#include "task.h"
-
-/* MPU wrappers includes. */
-#include "mpu_wrappers.h"
-
-/* Portasm includes. */
-#include "portasm.h"
-
-#if( configENABLE_TRUSTZONE == 1 )
-	/* Secure components includes. */
-	#include "secure_context.h"
-	#include "secure_init.h"
-#endif /* configENABLE_TRUSTZONE */
-
-#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-/**
- * The FreeRTOS Cortex M33 port can be configured to run on the Secure Side only
- * i.e. the processor boots as secure and never jumps to the non-secure side.
- * The Trust Zone support in the port must be disabled in order to run FreeRTOS
- * on the secure side. The following are the valid configuration seetings:
- *
- * 1. Run FreeRTOS on the Secure Side:
- *		configRUN_FREERTOS_SECURE_ONLY = 1 and configENABLE_TRUSTZONE = 0
- *
- * 2. Run FreeRTOS on the Non-Secure Side with Secure Side function call support:
- *		configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 1
- *
- * 3. Run FreeRTOS on the Non-Secure Side only i.e. no Secure Side function call support:
- *		configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 0
- */
-#if( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) )
-	#error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side.
-#endif
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Constants required to manipulate the NVIC.
- */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portMIN_INTERRUPT_PRIORITY			( 255UL )
-#define portNVIC_PENDSV_PRI					( portMIN_INTERRUPT_PRIORITY << 16UL )
-#define portNVIC_SYSTICK_PRI				( portMIN_INTERRUPT_PRIORITY << 24UL )
-#ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ			configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT		( 1UL << 2UL )
-#else
-	/* The way the SysTick is clocked is not modified in case it is not the
-	 * same a the core. */
-	#define portNVIC_SYSTICK_CLK_BIT		( 0 )
-#endif
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Constants required to manipulate the SCB.
- */
-#define portSCB_SYS_HANDLER_CTRL_STATE_REG	( * ( volatile uint32_t * ) 0xe000ed24 )
-#define portSCB_MEM_FAULT_ENABLE_BIT		( 1UL << 16UL )
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Constants required to manipulate the FPU.
- */
-#define portCPACR							( ( volatile uint32_t * ) 0xe000ed88 )	/* Coprocessor Access Control Register. */
-#define portCPACR_CP10_VALUE				( 3UL )
-#define portCPACR_CP11_VALUE				portCPACR_CP10_VALUE
-#define portCPACR_CP10_POS					( 20UL )
-#define portCPACR_CP11_POS					( 22UL )
-
-#define portFPCCR							( ( volatile uint32_t * ) 0xe000ef34 )	/* Floating Point Context Control Register. */
-#define portFPCCR_ASPEN_POS					( 31UL )
-#define portFPCCR_ASPEN_MASK				( 1UL << portFPCCR_ASPEN_POS )
-#define portFPCCR_LSPEN_POS					( 30UL )
-#define portFPCCR_LSPEN_MASK				( 1UL << portFPCCR_LSPEN_POS )
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Constants required to manipulate the MPU.
- */
-#define portMPU_TYPE_REG					( * ( ( volatile uint32_t * ) 0xe000ed90 ) )
-#define portMPU_CTRL_REG					( * ( ( volatile uint32_t * ) 0xe000ed94 ) )
-#define portMPU_RNR_REG						( * ( ( volatile uint32_t * ) 0xe000ed98 ) )
-
-#define portMPU_RBAR_REG					( * ( ( volatile uint32_t * ) 0xe000ed9c ) )
-#define portMPU_RLAR_REG					( * ( ( volatile uint32_t * ) 0xe000eda0 ) )
-
-#define portMPU_RBAR_A1_REG					( * ( ( volatile uint32_t * ) 0xe000eda4 ) )
-#define portMPU_RLAR_A1_REG					( * ( ( volatile uint32_t * ) 0xe000eda8 ) )
-
-#define portMPU_RBAR_A2_REG					( * ( ( volatile uint32_t * ) 0xe000edac ) )
-#define portMPU_RLAR_A2_REG					( * ( ( volatile uint32_t * ) 0xe000edb0 ) )
-
-#define portMPU_RBAR_A3_REG					( * ( ( volatile uint32_t * ) 0xe000edb4 ) )
-#define portMPU_RLAR_A3_REG					( * ( ( volatile uint32_t * ) 0xe000edb8 ) )
-
-#define portMPU_MAIR0_REG					( * ( ( volatile uint32_t * ) 0xe000edc0 ) )
-#define portMPU_MAIR1_REG					( * ( ( volatile uint32_t * ) 0xe000edc4 ) )
-
-#define portMPU_RBAR_ADDRESS_MASK			( 0xffffffe0 ) /* Must be 32-byte aligned. */
-#define portMPU_RLAR_ADDRESS_MASK			( 0xffffffe0 ) /* Must be 32-byte aligned. */
-
-#define portMPU_MAIR_ATTR0_POS				( 0UL )
-#define portMPU_MAIR_ATTR0_MASK				( 0x000000ff )
-
-#define portMPU_MAIR_ATTR1_POS				( 8UL )
-#define portMPU_MAIR_ATTR1_MASK				( 0x0000ff00 )
-
-#define portMPU_MAIR_ATTR2_POS				( 16UL )
-#define portMPU_MAIR_ATTR2_MASK				( 0x00ff0000 )
-
-#define portMPU_MAIR_ATTR3_POS				( 24UL )
-#define portMPU_MAIR_ATTR3_MASK				( 0xff000000 )
-
-#define portMPU_MAIR_ATTR4_POS				( 0UL )
-#define portMPU_MAIR_ATTR4_MASK				( 0x000000ff )
-
-#define portMPU_MAIR_ATTR5_POS				( 8UL )
-#define portMPU_MAIR_ATTR5_MASK				( 0x0000ff00 )
-
-#define portMPU_MAIR_ATTR6_POS				( 16UL )
-#define portMPU_MAIR_ATTR6_MASK				( 0x00ff0000 )
-
-#define portMPU_MAIR_ATTR7_POS				( 24UL )
-#define portMPU_MAIR_ATTR7_MASK				( 0xff000000 )
-
-#define portMPU_RLAR_ATTR_INDEX0			( 0UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX1			( 1UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX2			( 2UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX3			( 3UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX4			( 4UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX5			( 5UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX6			( 6UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX7			( 7UL << 1UL )
-
-#define portMPU_RLAR_REGION_ENABLE			( 1UL )
-
-/* Enable privileged access to unmapped region. */
-#define portMPU_PRIV_BACKGROUND_ENABLE_BIT	( 1UL << 2UL )
-
-/* Enable MPU. */
-#define portMPU_ENABLE_BIT					( 1UL << 0UL )
-
-/* Expected value of the portMPU_TYPE register. */
-#define portEXPECTED_MPU_TYPE_VALUE			( 8UL << 8UL ) /* 8 regions, unified. */
-/*-----------------------------------------------------------*/
-
-/**
- * @brief The maximum 24-bit number.
- *
- * It is needed because the systick is a 24-bit counter.
- */
-#define portMAX_24_BIT_NUMBER				( 0xffffffUL )
-
-/**
- * @brief A fiddle factor to estimate the number of SysTick counts that would
- * have occurred while the SysTick counter is stopped during tickless idle
- * calculations.
- */
-#define portMISSED_COUNTS_FACTOR			( 45UL )
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Constants required to set up the initial stack.
- */
-#define portINITIAL_XPSR					( 0x01000000 )
-
-#if( configRUN_FREERTOS_SECURE_ONLY == 1 )
-	/**
-	 * @brief Initial EXC_RETURN value.
-	 *
-	 *     FF         FF         FF         FD
-	 * 1111 1111  1111 1111  1111 1111  1111 1101
-	 *
-	 * Bit[6] - 1 --> The exception was taken from the Secure state.
-	 * Bit[5] - 1 --> Do not skip stacking of additional state context.
-	 * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
-	 * Bit[3] - 1 --> Return to the Thread mode.
-	 * Bit[2] - 1 --> Restore registers from the process stack.
-	 * Bit[1] - 0 --> Reserved, 0.
-	 * Bit[0] - 1 --> The exception was taken to the Secure state.
-	 */
-	#define portINITIAL_EXC_RETURN			( 0xfffffffd )
-#else
-	/**
-	 * @brief Initial EXC_RETURN value.
-	 *
-	 *     FF         FF         FF         BC
-	 * 1111 1111  1111 1111  1111 1111  1011 1100
-	 *
-	 * Bit[6] - 0 --> The exception was taken from the Non-Secure state.
-	 * Bit[5] - 1 --> Do not skip stacking of additional state context.
-	 * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
-	 * Bit[3] - 1 --> Return to the Thread mode.
-	 * Bit[2] - 1 --> Restore registers from the process stack.
-	 * Bit[1] - 0 --> Reserved, 0.
-	 * Bit[0] - 0 --> The exception was taken to the Non-Secure state.
-	 */
-	#define portINITIAL_EXC_RETURN			( 0xffffffbc )
-#endif /* configRUN_FREERTOS_SECURE_ONLY */
-
-/**
- * @brief CONTROL register privileged bit mask.
- *
- * Bit[0] in CONTROL register tells the privilege:
- *  Bit[0] = 0 ==> The task is privileged.
- *  Bit[0] = 1 ==> The task is not privileged.
- */
-#define portCONTROL_PRIVILEGED_MASK			( 1UL << 0UL )
-
-/**
- * @brief Initial CONTROL register values.
- */
-#define portINITIAL_CONTROL_UNPRIVILEGED	( 0x3 )
-#define portINITIAL_CONTROL_PRIVILEGED		( 0x2 )
-
-/**
- * @brief Let the user override the pre-loading of the initial LR with the
- * address of prvTaskExitError() in case it messes up unwinding of the stack
- * in the debugger.
- */
-#ifdef configTASK_RETURN_ADDRESS
-	#define portTASK_RETURN_ADDRESS			configTASK_RETURN_ADDRESS
-#else
-	#define portTASK_RETURN_ADDRESS			prvTaskExitError
-#endif
-
-/**
- * @brief If portPRELOAD_REGISTERS then registers will be given an initial value
- * when a task is created. This helps in debugging at the cost of code size.
- */
-#define portPRELOAD_REGISTERS				1
-
-/**
- * @brief A task is created without a secure context, and must call
- * portALLOCATE_SECURE_CONTEXT() to give itself a secure context before it makes
- * any secure calls.
- */
-#define portNO_SECURE_CONTEXT				0
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Used to catch tasks that attempt to return from their implementing
- * function.
- */
-static void prvTaskExitError( void );
-
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Setup the Memory Protection Unit (MPU).
-	 */
-	static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
-#endif /* configENABLE_MPU */
-
-#if( configENABLE_FPU == 1 )
-	/**
-	 * @brief Setup the Floating Point Unit (FPU).
-	 */
-	static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;
-#endif /* configENABLE_FPU */
-
-/**
- * @brief Setup the timer to generate the tick interrupts.
- *
- * The implementation in this file is weak to allow application writers to
- * change the timer used to generate the tick interrupt.
- */
-void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;
-
-/**
- * @brief Checks whether the current execution context is interrupt.
- *
- * @return pdTRUE if the current execution context is interrupt, pdFALSE
- * otherwise.
- */
-BaseType_t xPortIsInsideInterrupt( void );
-
-/**
- * @brief Yield the processor.
- */
-void vPortYield( void ) PRIVILEGED_FUNCTION;
-
-/**
- * @brief Enter critical section.
- */
-void vPortEnterCritical( void ) PRIVILEGED_FUNCTION;
-
-/**
- * @brief Exit from critical section.
- */
-void vPortExitCritical( void ) PRIVILEGED_FUNCTION;
-
-/**
- * @brief SysTick handler.
- */
-void SysTick_Handler( void ) PRIVILEGED_FUNCTION;
-
-/**
- * @brief C part of SVC handler.
- */
-portDONT_DISCARD void vPortSVCHandler_C( uint32_t *pulCallerStackAddress ) PRIVILEGED_FUNCTION;
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Each task maintains its own interrupt status in the critical nesting
- * variable.
- */
-static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
-
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Saved as part of the task context to indicate which context the
-	 * task is using on the secure side.
-	 */
-	portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
-#endif /* configENABLE_TRUSTZONE */
-
-#if( configUSE_TICKLESS_IDLE == 1 )
-	/**
-	 * @brief The number of SysTick increments that make up one tick period.
-	 */
-	static uint32_t ulTimerCountsForOneTick = 0;
-
-	/**
-	 * @brief The maximum number of tick periods that can be suppressed is
-	 * limited by the 24 bit resolution of the SysTick timer.
-	 */
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
-
-	/**
-	 * @brief Compensate for the CPU cycles that pass while the SysTick is
-	 * stopped (low power functionality only).
-	 */
-	static uint32_t ulStoppedTimerCompensation = 0;
-#endif /* configUSE_TICKLESS_IDLE */
-/*-----------------------------------------------------------*/
-
-#if( configUSE_TICKLESS_IDLE == 1 )
-	__attribute__(( weak )) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-	{
-	uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
-	TickType_t xModifiableIdleTime;
-
-		/* Make sure the SysTick reload value does not overflow the counter. */
-		if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-		{
-			xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-		}
-
-		/* Stop the SysTick momentarily. The time the SysTick is stopped for is
-		 * accounted for as best it can be, but using the tickless mode will
-		 * inevitably result in some tiny drift of the time maintained by the
-		 * kernel with respect to calendar time. */
-		portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
-
-		/* Calculate the reload value required to wait xExpectedIdleTime
-		 * tick periods. -1 is used because this code will execute part way
-		 * through one of the tick periods. */
-		ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-		if( ulReloadValue > ulStoppedTimerCompensation )
-		{
-			ulReloadValue -= ulStoppedTimerCompensation;
-		}
-
-		/* Enter a critical section but don't use the taskENTER_CRITICAL()
-		 * method as that will mask interrupts that should exit sleep mode. */
-		__asm volatile( "cpsid i" ::: "memory" );
-		__asm volatile( "dsb" );
-		__asm volatile( "isb" );
-
-		/* If a context switch is pending or a task is waiting for the scheduler
-		 * to be un-suspended then abandon the low power entry. */
-		if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-		{
-			/* Restart from whatever is left in the count register to complete
-			 * this tick period. */
-			portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
-
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-
-			/* Reset the reload register to the value required for normal tick
-			 * periods. */
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
-
-			/* Re-enable interrupts - see comments above the cpsid instruction()
-			 * above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-		else
-		{
-			/* Set the new reload value. */
-			portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
-
-			/* Clear the SysTick count flag and set the count value back to
-			 * zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-
-			/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
-			 * set its parameter to 0 to indicate that its implementation
-			 * contains its own wait for interrupt or wait for event
-			 * instruction, and so wfi should not be executed again. However,
-			 * the original expected idle time variable must remain unmodified,
-			 * so a copy is taken. */
-			xModifiableIdleTime = xExpectedIdleTime;
-			configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-			if( xModifiableIdleTime > 0 )
-			{
-				__asm volatile( "dsb" ::: "memory" );
-				__asm volatile( "wfi" );
-				__asm volatile( "isb" );
-			}
-			configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
-
-			/* Re-enable interrupts to allow the interrupt that brought the MCU
-			 * out of sleep mode to execute immediately. See comments above
-			 * the cpsid instruction above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
-
-			/* Disable interrupts again because the clock is about to be stopped
-			 * and interrupts that execute while the clock is stopped will
-			 * increase any slippage between the time maintained by the RTOS and
-			 * calendar time. */
-			__asm volatile( "cpsid i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
-
-			/* Disable the SysTick clock without reading the
-			 * portNVIC_SYSTICK_CTRL_REG register to ensure the
-			 * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
-			 * Again, the time the SysTick is stopped for is accounted for as
-			 * best it can be, but using the tickless mode will inevitably
-			 * result in some tiny drift of the time maintained by the kernel
-			 * with respect to calendar time*/
-			portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
-
-			/* Determine if the SysTick clock has already counted to zero and
-			 * been set back to the current reload value (the reload back being
-			 * correct for the entire expected idle time) or if the SysTick is
-			 * yet to count to zero (in which case an interrupt other than the
-			 * SysTick must have brought the system out of sleep mode). */
-			if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-			{
-				uint32_t ulCalculatedLoadValue;
-
-				/* The tick interrupt is already pending, and the SysTick count
-				 * reloaded with ulReloadValue.  Reset the
-				 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
-				 * period. */
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
-
-				/* Don't allow a tiny value, or values that have somehow
-				 * underflowed because the post sleep hook did something
-				 * that took too long. */
-				if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-				{
-					ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-				}
-
-				portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
-
-				/* As the pending tick will be processed as soon as this
-				 * function exits, the tick value maintained by the tick is
-				 * stepped forward by one less than the time spent waiting. */
-				ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-			}
-			else
-			{
-				/* Something other than the tick interrupt ended the sleep.
-				 * Work out how long the sleep lasted rounded to complete tick
-				 * periods (not the ulReload value which accounted for part
-				 * ticks). */
-				ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
-
-				/* How many complete tick periods passed while the processor
-				 * was waiting? */
-				ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
-
-				/* The reload value is set to whatever fraction of a single tick
-				 * period remains. */
-				portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-			}
-
-			/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
-			 * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
-			 * value. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-			vTaskStepTick( ulCompleteTickPeriods );
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
-
-			/* Exit with interrupts enabled. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-	}
-#endif /* configUSE_TICKLESS_IDLE */
-/*-----------------------------------------------------------*/
-
-__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
-{
-	/* Calculate the constants required to configure the tick interrupt. */
-	#if( configUSE_TICKLESS_IDLE == 1 )
-	{
-		ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
-		xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
-	}
-	#endif /* configUSE_TICKLESS_IDLE */
-
-	/* Stop and reset the SysTick. */
-	portNVIC_SYSTICK_CTRL_REG = 0UL;
-	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-
-	/* Configure SysTick to interrupt at the requested rate. */
-	portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
-}
-/*-----------------------------------------------------------*/
-
-static void prvTaskExitError( void )
-{
-volatile uint32_t ulDummy = 0UL;
-
-	/* A function that implements a task must not exit or attempt to return to
-	 * its caller as there is nothing to return to. If a task wants to exit it
-	 * should instead call vTaskDelete( NULL ). Artificially force an assert()
-	 * to be triggered if configASSERT() is defined, then stop here so
-	 * application writers can catch the error. */
-	configASSERT( ulCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
-
-	while( ulDummy == 0 )
-	{
-		/* This file calls prvTaskExitError() after the scheduler has been
-		 * started to remove a compiler warning about the function being
-		 * defined but never called.  ulDummy is used purely to quieten other
-		 * warnings about code appearing after this function is called - making
-		 * ulDummy volatile makes the compiler think the function could return
-		 * and therefore not output an 'unreachable code' warning for code that
-		 * appears after it. */
-	}
-}
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_MPU == 1 )
-	static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
-	{
-	#if defined( __ARMCC_VERSION )
-		/* Declaration when these variable are defined in code instead of being
-		 * exported from linker scripts. */
-		extern uint32_t * __privileged_functions_start__;
-		extern uint32_t * __privileged_functions_end__;
-		extern uint32_t * __syscalls_flash_start__;
-		extern uint32_t * __syscalls_flash_end__;
-		extern uint32_t * __unprivileged_flash_start__;
-		extern uint32_t * __unprivileged_flash_end__;
-		extern uint32_t * __privileged_sram_start__;
-		extern uint32_t * __privileged_sram_end__;
-	#else
-		/* Declaration when these variable are exported from linker scripts. */
-		extern uint32_t __privileged_functions_start__[];
-		extern uint32_t __privileged_functions_end__[];
-		extern uint32_t __syscalls_flash_start__[];
-		extern uint32_t __syscalls_flash_end__[];
-		extern uint32_t __unprivileged_flash_start__[];
-		extern uint32_t __unprivileged_flash_end__[];
-		extern uint32_t __privileged_sram_start__[];
-		extern uint32_t __privileged_sram_end__[];
-	#endif /* defined( __ARMCC_VERSION ) */
-
-		/* Check that the MPU is present. */
-		if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
-		{
-			/* MAIR0 - Index 0. */
-			portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
-			/* MAIR0 - Index 1. */
-			portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
-
-			/* Setup privileged flash as Read Only so that privileged tasks can
-			 * read it but not modify. */
-			portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_PRIVILEGED_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
-
-			/* Setup unprivileged flash as Read Only by both privileged and
-			 * unprivileged tasks. All tasks can read it but no-one can modify. */
-			portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
-
-			/* Setup unprivileged syscalls flash as Read Only by both privileged
-			 * and unprivileged tasks. All tasks can read it but no-one can modify. */
-			portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
-
-			/* Setup RAM containing kernel data for privileged access only. */
-			portMPU_RNR_REG = portPRIVILEGED_RAM_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
-								( portMPU_REGION_EXECUTE_NEVER );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
-
-			/* Enable mem fault. */
-			portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
-
-			/* Enable MPU with privileged background access i.e. unmapped
-			 * regions have privileged access. */
-			portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
-		}
-	}
-#endif /* configENABLE_MPU */
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_FPU == 1 )
-	static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
-	{
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			/* Enable non-secure access to the FPU. */
-			SecureInit_EnableNSFPUAccess();
-		}
-		#endif /* configENABLE_TRUSTZONE */
-
-		/* CP10 = 11 ==> Full access to FPU i.e. both privileged and
-		 * unprivileged code should be able to access FPU. CP11 should be
-		 * programmed to the same value as CP10. */
-		*( portCPACR ) |=	(	( portCPACR_CP10_VALUE << portCPACR_CP10_POS ) |
-								( portCPACR_CP11_VALUE << portCPACR_CP11_POS )
-							);
-
-		/* ASPEN = 1 ==> Hardware should automatically preserve floating point
-		 * context on exception entry and restore on exception return.
-		 * LSPEN = 1 ==> Enable lazy context save of FP state. */
-		*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
-	}
-#endif /* configENABLE_FPU */
-/*-----------------------------------------------------------*/
-
-void vPortYield( void ) /* PRIVILEGED_FUNCTION */
-{
-	/* Set a PendSV to request a context switch. */
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-
-	/* Barriers are normally not required but do ensure the code is
-	 * completely within the specified behaviour for the architecture. */
-	__asm volatile( "dsb" ::: "memory" );
-	__asm volatile( "isb" );
-}
-/*-----------------------------------------------------------*/
-
-void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */
-{
-	portDISABLE_INTERRUPTS();
-	ulCriticalNesting++;
-
-	/* Barriers are normally not required but do ensure the code is
-	 * completely within the specified behaviour for the architecture. */
-	__asm volatile( "dsb" ::: "memory" );
-	__asm volatile( "isb" );
-}
-/*-----------------------------------------------------------*/
-
-void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */
-{
-	configASSERT( ulCriticalNesting );
-	ulCriticalNesting--;
-
-	if( ulCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
-}
-/*-----------------------------------------------------------*/
-
-void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
-{
-uint32_t ulPreviousMask;
-
-	ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* Pend a context switch. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
-}
-/*-----------------------------------------------------------*/
-
-void vPortSVCHandler_C( uint32_t *pulCallerStackAddress ) /* PRIVILEGED_FUNCTION portDONT_DISCARD */
-{
-#if( configENABLE_MPU == 1 )
-	#if defined( __ARMCC_VERSION )
-		/* Declaration when these variable are defined in code instead of being
-		 * exported from linker scripts. */
-		extern uint32_t * __syscalls_flash_start__;
-		extern uint32_t * __syscalls_flash_end__;
-	#else
-		/* Declaration when these variable are exported from linker scripts. */
-		extern uint32_t __syscalls_flash_start__[];
-		extern uint32_t __syscalls_flash_end__[];
-	#endif /* defined( __ARMCC_VERSION ) */
-#endif /* configENABLE_MPU */
-
-uint32_t ulPC;
-
-#if( configENABLE_TRUSTZONE == 1 )
-	uint32_t ulR0;
-	#if( configENABLE_MPU == 1 )
-		uint32_t ulControl, ulIsTaskPrivileged;
-	#endif /* configENABLE_MPU */
-#endif /* configENABLE_TRUSTZONE */
-uint8_t ucSVCNumber;
-
-	/* Register are stored on the stack in the following order - R0, R1, R2, R3,
-	 * R12, LR, PC, xPSR. */
-	ulPC = pulCallerStackAddress[ 6 ];
-	ucSVCNumber = ( ( uint8_t *) ulPC )[ -2 ];
-
-	switch( ucSVCNumber )
-	{
-		#if( configENABLE_TRUSTZONE == 1 )
-			case portSVC_ALLOCATE_SECURE_CONTEXT:
-			{
-				/* R0 contains the stack size passed as parameter to the
-				 * vPortAllocateSecureContext function. */
-				ulR0 = pulCallerStackAddress[ 0 ];
-
-				#if( configENABLE_MPU == 1 )
-				{
-					/* Read the CONTROL register value. */
-					__asm volatile ( "mrs %0, control"  : "=r" ( ulControl ) );
-
-					/* The task that raised the SVC is privileged if Bit[0]
-					 * in the CONTROL register is 0. */
-					ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 );
-
-					/* Allocate and load a context for the secure task. */
-					xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged );
-				}
-				#else
-				{
-					/* Allocate and load a context for the secure task. */
-					xSecureContext = SecureContext_AllocateContext( ulR0 );
-				}
-				#endif /* configENABLE_MPU */
-
-				configASSERT( xSecureContext != NULL );
-				SecureContext_LoadContext( xSecureContext );
-			}
-			break;
-
-			case portSVC_FREE_SECURE_CONTEXT:
-			{
-				/* R0 contains the secure context handle to be freed. */
-				ulR0 = pulCallerStackAddress[ 0 ];
-
-				/* Free the secure context. */
-				SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 );
-			}
-			break;
-		#endif /* configENABLE_TRUSTZONE */
-
-		case portSVC_START_SCHEDULER:
-		{
-			#if( configENABLE_TRUSTZONE == 1 )
-			{
-				/* De-prioritize the non-secure exceptions so that the
-				 * non-secure pendSV runs at the lowest priority. */
-				SecureInit_DePrioritizeNSExceptions();
-
-				/* Initialize the secure context management system. */
-				SecureContext_Init();
-			}
-			#endif /* configENABLE_TRUSTZONE */
-
-			#if( configENABLE_FPU == 1 )
-			{
-				/* Setup the Floating Point Unit (FPU). */
-				prvSetupFPU();
-			}
-			#endif /* configENABLE_FPU */
-
-			/* Setup the context of the first task so that the first task starts
-			 * executing. */
-			vRestoreContextOfFirstTask();
-		}
-		break;
-
-		#if( configENABLE_MPU == 1 )
-			case portSVC_RAISE_PRIVILEGE:
-			{
-				/* Only raise the privilege, if the svc was raised from any of
-				 * the system calls. */
-				if( ulPC >= ( uint32_t ) __syscalls_flash_start__ &&
-					ulPC <= ( uint32_t ) __syscalls_flash_end__ )
-				{
-					vRaisePrivilege();
-				}
-			}
-			break;
-		#endif /* configENABLE_MPU */
-
-		default:
-		{
-			/* Incorrect SVC call. */
-			configASSERT( pdFALSE );
-		}
-	}
-}
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_MPU == 1 )
-	StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */
-#else
-	StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters ) /* PRIVILEGED_FUNCTION */
-#endif /* configENABLE_MPU */
-{
-	/* Simulate the stack frame as it would be created by a context switch
-	 * interrupt. */
-	#if( portPRELOAD_REGISTERS == 0 )
-	{
-		pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-		*pxTopOfStack = portINITIAL_XPSR;							/* xPSR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxCode;						/* PC */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
-		pxTopOfStack -= 5;											/* R12, R3, R2 and R1. */
-		*pxTopOfStack = ( StackType_t ) pvParameters;				/* R0 */
-		pxTopOfStack -= 9;											/* R11..R4, EXC_RETURN. */
-		*pxTopOfStack = portINITIAL_EXC_RETURN;
-
-		#if( configENABLE_MPU == 1 )
-		{
-			pxTopOfStack--;
-			if( xRunPrivileged == pdTRUE )
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED;		/* Slot used to hold this task's CONTROL value. */
-			}
-			else
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED;	/* Slot used to hold this task's CONTROL value. */
-			}
-		}
-		#endif /* configENABLE_MPU */
-
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxEndOfStack;	/* Slot used to hold this task's PSPLIM value. */
-
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			pxTopOfStack--;
-			*pxTopOfStack = portNO_SECURE_CONTEXT;		/* Slot used to hold this task's xSecureContext value. */
-		}
-		#endif /* configENABLE_TRUSTZONE */
-	}
-	#else /* portPRELOAD_REGISTERS */
-	{
-		pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-		*pxTopOfStack = portINITIAL_XPSR;							/* xPSR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxCode;						/* PC */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x12121212UL;				/* R12 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x03030303UL;				/* R3 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x02020202UL;				/* R2 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x01010101UL;				/* R1 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pvParameters;				/* R0 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x11111111UL;				/* R11 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x10101010UL;				/* R10 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x09090909UL;				/* R09 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x08080808UL;				/* R08 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x07070707UL;				/* R07 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x06060606UL;				/* R06 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x05050505UL;				/* R05 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x04040404UL;				/* R04 */
-		pxTopOfStack--;
-		*pxTopOfStack = portINITIAL_EXC_RETURN;						/* EXC_RETURN */
-
-		#if( configENABLE_MPU == 1 )
-		{
-			pxTopOfStack--;
-			if( xRunPrivileged == pdTRUE )
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED;		/* Slot used to hold this task's CONTROL value. */
-			}
-			else
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED;	/* Slot used to hold this task's CONTROL value. */
-			}
-		}
-		#endif /* configENABLE_MPU */
-
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxEndOfStack;	/* Slot used to hold this task's PSPLIM value. */
-
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			pxTopOfStack--;
-			*pxTopOfStack = portNO_SECURE_CONTEXT;		/* Slot used to hold this task's xSecureContext value. */
-		}
-		#endif /* configENABLE_TRUSTZONE */
-	}
-	#endif /* portPRELOAD_REGISTERS */
-
-	return pxTopOfStack;
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
-{
-	/* Make PendSV, CallSV and SysTick the same priority as the kernel. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
-
-	#if( configENABLE_MPU == 1 )
-	{
-		/* Setup the Memory Protection Unit (MPU). */
-		prvSetupMPU();
-	}
-	#endif /* configENABLE_MPU */
-
-	/* Start the timer that generates the tick ISR. Interrupts are disabled
-	 * here already. */
-	vPortSetupTimerInterrupt();
-
-	/* Initialize the critical nesting count ready for the first task. */
-	ulCriticalNesting = 0;
-
-	/* Start the first task. */
-	vStartFirstTask();
-
-	/* Should never get here as the tasks will now be executing. Call the task
-	 * exit error function to prevent compiler warnings about a static function
-	 * not being called in the case that the application writer overrides this
-	 * functionality by defining configTASK_RETURN_ADDRESS. Call
-	 * vTaskSwitchContext() so link time optimization does not remove the
-	 * symbol. */
-	vTaskSwitchContext();
-	prvTaskExitError();
-
-	/* Should not get here. */
-	return 0;
-}
-/*-----------------------------------------------------------*/
-
-void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
-{
-	/* Not implemented in ports where there is nothing to return to.
-	 * Artificially force an assert. */
-	configASSERT( ulCriticalNesting == 1000UL );
-}
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_MPU == 1 )
-	void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t ulStackDepth )
-	{
-	uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
-	int32_t lIndex = 0;
-
-		/* Setup MAIR0. */
-		xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
-		xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
-
-		/* This function is called automatically when the task is created - in
-		 * which case the stack region parameters will be valid.  At all other
-		 * times the stack parameters will not be valid and it is assumed that
-		 * the stack region has already been configured. */
-		if( ulStackDepth > 0 )
-		{
-			/* Define the region that allows access to the stack. */
-			ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK;
-			ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1;
-			ulRegionEndAddress  &= portMPU_RLAR_ADDRESS_MASK;
-
-			xMPUSettings->xRegionsSettings[ 0 ].ulRBAR =	( ulRegionStartAddress ) |
-															( portMPU_REGION_NON_SHAREABLE ) |
-															( portMPU_REGION_READ_WRITE ) |
-															( portMPU_REGION_EXECUTE_NEVER );
-
-			xMPUSettings->xRegionsSettings[ 0 ].ulRLAR =	( ulRegionEndAddress ) |
-															( portMPU_RLAR_ATTR_INDEX0 ) |
-															( portMPU_RLAR_REGION_ENABLE );
-		}
-
-		/* User supplied configurable regions. */
-		for( ulRegionNumber = 1; ulRegionNumber <= portNUM_CONFIGURABLE_REGIONS; ulRegionNumber++ )
-		{
-			/* If xRegions is NULL i.e. the task has not specified any MPU
-			 * region, the else part ensures that all the configurable MPU
-			 * regions are invalidated. */
-			if( ( xRegions != NULL ) && ( xRegions[ lIndex ].ulLengthInBytes > 0UL ) )
-			{
-				/* Translate the generic region definition contained in xRegions
-				 * into the ARMv8 specific MPU settings that are then stored in
-				 * xMPUSettings. */
-				ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK;
-				ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1;
-				ulRegionEndAddress  &= portMPU_RLAR_ADDRESS_MASK;
-
-				/* Start address. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR =	( ulRegionStartAddress ) |
-																			( portMPU_REGION_NON_SHAREABLE );
-
-				/* RO/RW. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_READ_ONLY ) != 0 )
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_ONLY );
-				}
-				else
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_WRITE );
-				}
-
-				/* XN. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_EXECUTE_NEVER ) != 0 )
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_EXECUTE_NEVER );
-				}
-
-				/* End Address. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR =	( ulRegionEndAddress ) |
-																			( portMPU_RLAR_REGION_ENABLE );
-
-				/* Normal memory/ Device memory. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
-				{
-					/* Attr1 in MAIR0 is configured as device memory. */
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX1;
-				}
-				else
-				{
-					/* Attr1 in MAIR0 is configured as normal memory. */
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
-				}
-			}
-			else
-			{
-				/* Invalidate the region. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = 0UL;
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = 0UL;
-			}
-
-			lIndex++;
-		}
-	}
-#endif /* configENABLE_MPU */
-/*-----------------------------------------------------------*/
-
-BaseType_t xPortIsInsideInterrupt( void )
-{
-uint32_t ulCurrentInterrupt;
-BaseType_t xReturn;
-
-	/* Obtain the number of the currently executing interrupt. Interrupt Program
-	 * Status Register (IPSR) holds the exception number of the currently-executing
-	 * exception or zero for Thread mode.*/
-	__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
-
-	if( ulCurrentInterrupt == 0 )
-	{
-		xReturn = pdFALSE;
-	}
-	else
-	{
-		xReturn = pdTRUE;
-	}
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
\ No newline at end of file
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
+ * all the API functions to use the MPU wrappers. That should only be done when
+ * task.h is included from an application file. */
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+/* Scheduler includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+
+/* MPU wrappers includes. */
+#include "mpu_wrappers.h"
+
+/* Portasm includes. */
+#include "portasm.h"
+
+#if ( configENABLE_TRUSTZONE == 1 )
+    /* Secure components includes. */
+    #include "secure_context.h"
+    #include "secure_init.h"
+#endif /* configENABLE_TRUSTZONE */
+
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+/**
+ * The FreeRTOS Cortex M33 port can be configured to run on the Secure Side only
+ * i.e. the processor boots as secure and never jumps to the non-secure side.
+ * The Trust Zone support in the port must be disabled in order to run FreeRTOS
+ * on the secure side. The following are the valid configuration seetings:
+ *
+ * 1. Run FreeRTOS on the Secure Side:
+ *    configRUN_FREERTOS_SECURE_ONLY = 1 and configENABLE_TRUSTZONE = 0
+ *
+ * 2. Run FreeRTOS on the Non-Secure Side with Secure Side function call support:
+ *    configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 1
+ *
+ * 3. Run FreeRTOS on the Non-Secure Side only i.e. no Secure Side function call support:
+ *    configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 0
+ */
+#if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) )
+    #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side.
+#endif
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Constants required to manipulate the NVIC.
+ */
+#define portNVIC_SYSTICK_CTRL_REG             ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG             ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG    ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SHPR3_REG                    ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_ENABLE_BIT           ( 1UL << 0UL )
+#define portNVIC_SYSTICK_INT_BIT              ( 1UL << 1UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT       ( 1UL << 16UL )
+#define portMIN_INTERRUPT_PRIORITY            ( 255UL )
+#define portNVIC_PENDSV_PRI                   ( portMIN_INTERRUPT_PRIORITY << 16UL )
+#define portNVIC_SYSTICK_PRI                  ( portMIN_INTERRUPT_PRIORITY << 24UL )
+#ifndef configSYSTICK_CLOCK_HZ
+    #define configSYSTICK_CLOCK_HZ            configCPU_CLOCK_HZ
+    /* Ensure the SysTick is clocked at the same frequency as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT          ( 1UL << 2UL )
+#else
+
+/* The way the SysTick is clocked is not modified in case it is not the
+ * same a the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 0 )
+#endif
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Constants required to manipulate the SCB.
+ */
+#define portSCB_SYS_HANDLER_CTRL_STATE_REG    ( *( volatile uint32_t * ) 0xe000ed24 )
+#define portSCB_MEM_FAULT_ENABLE_BIT          ( 1UL << 16UL )
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Constants required to manipulate the FPU.
+ */
+#define portCPACR               ( ( volatile uint32_t * ) 0xe000ed88 )              /* Coprocessor Access Control Register. */
+#define portCPACR_CP10_VALUE    ( 3UL )
+#define portCPACR_CP11_VALUE    portCPACR_CP10_VALUE
+#define portCPACR_CP10_POS      ( 20UL )
+#define portCPACR_CP11_POS      ( 22UL )
+
+#define portFPCCR               ( ( volatile uint32_t * ) 0xe000ef34 )              /* Floating Point Context Control Register. */
+#define portFPCCR_ASPEN_POS     ( 31UL )
+#define portFPCCR_ASPEN_MASK    ( 1UL << portFPCCR_ASPEN_POS )
+#define portFPCCR_LSPEN_POS     ( 30UL )
+#define portFPCCR_LSPEN_MASK    ( 1UL << portFPCCR_LSPEN_POS )
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Constants required to manipulate the MPU.
+ */
+#define portMPU_TYPE_REG                      ( *( ( volatile uint32_t * ) 0xe000ed90 ) )
+#define portMPU_CTRL_REG                      ( *( ( volatile uint32_t * ) 0xe000ed94 ) )
+#define portMPU_RNR_REG                       ( *( ( volatile uint32_t * ) 0xe000ed98 ) )
+
+#define portMPU_RBAR_REG                      ( *( ( volatile uint32_t * ) 0xe000ed9c ) )
+#define portMPU_RLAR_REG                      ( *( ( volatile uint32_t * ) 0xe000eda0 ) )
+
+#define portMPU_RBAR_A1_REG                   ( *( ( volatile uint32_t * ) 0xe000eda4 ) )
+#define portMPU_RLAR_A1_REG                   ( *( ( volatile uint32_t * ) 0xe000eda8 ) )
+
+#define portMPU_RBAR_A2_REG                   ( *( ( volatile uint32_t * ) 0xe000edac ) )
+#define portMPU_RLAR_A2_REG                   ( *( ( volatile uint32_t * ) 0xe000edb0 ) )
+
+#define portMPU_RBAR_A3_REG                   ( *( ( volatile uint32_t * ) 0xe000edb4 ) )
+#define portMPU_RLAR_A3_REG                   ( *( ( volatile uint32_t * ) 0xe000edb8 ) )
+
+#define portMPU_MAIR0_REG                     ( *( ( volatile uint32_t * ) 0xe000edc0 ) )
+#define portMPU_MAIR1_REG                     ( *( ( volatile uint32_t * ) 0xe000edc4 ) )
+
+#define portMPU_RBAR_ADDRESS_MASK             ( 0xffffffe0 ) /* Must be 32-byte aligned. */
+#define portMPU_RLAR_ADDRESS_MASK             ( 0xffffffe0 ) /* Must be 32-byte aligned. */
+
+#define portMPU_MAIR_ATTR0_POS                ( 0UL )
+#define portMPU_MAIR_ATTR0_MASK               ( 0x000000ff )
+
+#define portMPU_MAIR_ATTR1_POS                ( 8UL )
+#define portMPU_MAIR_ATTR1_MASK               ( 0x0000ff00 )
+
+#define portMPU_MAIR_ATTR2_POS                ( 16UL )
+#define portMPU_MAIR_ATTR2_MASK               ( 0x00ff0000 )
+
+#define portMPU_MAIR_ATTR3_POS                ( 24UL )
+#define portMPU_MAIR_ATTR3_MASK               ( 0xff000000 )
+
+#define portMPU_MAIR_ATTR4_POS                ( 0UL )
+#define portMPU_MAIR_ATTR4_MASK               ( 0x000000ff )
+
+#define portMPU_MAIR_ATTR5_POS                ( 8UL )
+#define portMPU_MAIR_ATTR5_MASK               ( 0x0000ff00 )
+
+#define portMPU_MAIR_ATTR6_POS                ( 16UL )
+#define portMPU_MAIR_ATTR6_MASK               ( 0x00ff0000 )
+
+#define portMPU_MAIR_ATTR7_POS                ( 24UL )
+#define portMPU_MAIR_ATTR7_MASK               ( 0xff000000 )
+
+#define portMPU_RLAR_ATTR_INDEX0              ( 0UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX1              ( 1UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX2              ( 2UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX3              ( 3UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX4              ( 4UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX5              ( 5UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX6              ( 6UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX7              ( 7UL << 1UL )
+
+#define portMPU_RLAR_REGION_ENABLE            ( 1UL )
+
+/* Enable privileged access to unmapped region. */
+#define portMPU_PRIV_BACKGROUND_ENABLE_BIT    ( 1UL << 2UL )
+
+/* Enable MPU. */
+#define portMPU_ENABLE_BIT                    ( 1UL << 0UL )
+
+/* Expected value of the portMPU_TYPE register. */
+#define portEXPECTED_MPU_TYPE_VALUE           ( 8UL << 8UL ) /* 8 regions, unified. */
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief The maximum 24-bit number.
+ *
+ * It is needed because the systick is a 24-bit counter.
+ */
+#define portMAX_24_BIT_NUMBER       ( 0xffffffUL )
+
+/**
+ * @brief A fiddle factor to estimate the number of SysTick counts that would
+ * have occurred while the SysTick counter is stopped during tickless idle
+ * calculations.
+ */
+#define portMISSED_COUNTS_FACTOR    ( 45UL )
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Constants required to set up the initial stack.
+ */
+#define portINITIAL_XPSR    ( 0x01000000 )
+
+#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
+
+/**
+ * @brief Initial EXC_RETURN value.
+ *
+ *     FF         FF         FF         FD
+ * 1111 1111  1111 1111  1111 1111  1111 1101
+ *
+ * Bit[6] - 1 --> The exception was taken from the Secure state.
+ * Bit[5] - 1 --> Do not skip stacking of additional state context.
+ * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
+ * Bit[3] - 1 --> Return to the Thread mode.
+ * Bit[2] - 1 --> Restore registers from the process stack.
+ * Bit[1] - 0 --> Reserved, 0.
+ * Bit[0] - 1 --> The exception was taken to the Secure state.
+ */
+    #define portINITIAL_EXC_RETURN    ( 0xfffffffd )
+#else
+
+/**
+ * @brief Initial EXC_RETURN value.
+ *
+ *     FF         FF         FF         BC
+ * 1111 1111  1111 1111  1111 1111  1011 1100
+ *
+ * Bit[6] - 0 --> The exception was taken from the Non-Secure state.
+ * Bit[5] - 1 --> Do not skip stacking of additional state context.
+ * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
+ * Bit[3] - 1 --> Return to the Thread mode.
+ * Bit[2] - 1 --> Restore registers from the process stack.
+ * Bit[1] - 0 --> Reserved, 0.
+ * Bit[0] - 0 --> The exception was taken to the Non-Secure state.
+ */
+    #define portINITIAL_EXC_RETURN    ( 0xffffffbc )
+#endif /* configRUN_FREERTOS_SECURE_ONLY */
+
+/**
+ * @brief CONTROL register privileged bit mask.
+ *
+ * Bit[0] in CONTROL register tells the privilege:
+ *  Bit[0] = 0 ==> The task is privileged.
+ *  Bit[0] = 1 ==> The task is not privileged.
+ */
+#define portCONTROL_PRIVILEGED_MASK         ( 1UL << 0UL )
+
+/**
+ * @brief Initial CONTROL register values.
+ */
+#define portINITIAL_CONTROL_UNPRIVILEGED    ( 0x3 )
+#define portINITIAL_CONTROL_PRIVILEGED      ( 0x2 )
+
+/**
+ * @brief Let the user override the pre-loading of the initial LR with the
+ * address of prvTaskExitError() in case it messes up unwinding of the stack
+ * in the debugger.
+ */
+#ifdef configTASK_RETURN_ADDRESS
+    #define portTASK_RETURN_ADDRESS    configTASK_RETURN_ADDRESS
+#else
+    #define portTASK_RETURN_ADDRESS    prvTaskExitError
+#endif
+
+/**
+ * @brief If portPRELOAD_REGISTERS then registers will be given an initial value
+ * when a task is created. This helps in debugging at the cost of code size.
+ */
+#define portPRELOAD_REGISTERS    1
+
+/**
+ * @brief A task is created without a secure context, and must call
+ * portALLOCATE_SECURE_CONTEXT() to give itself a secure context before it makes
+ * any secure calls.
+ */
+#define portNO_SECURE_CONTEXT    0
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Used to catch tasks that attempt to return from their implementing
+ * function.
+ */
+static void prvTaskExitError( void );
+
+#if ( configENABLE_MPU == 1 )
+
+/**
+ * @brief Setup the Memory Protection Unit (MPU).
+ */
+    static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
+#endif /* configENABLE_MPU */
+
+#if ( configENABLE_FPU == 1 )
+
+/**
+ * @brief Setup the Floating Point Unit (FPU).
+ */
+    static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;
+#endif /* configENABLE_FPU */
+
+/**
+ * @brief Setup the timer to generate the tick interrupts.
+ *
+ * The implementation in this file is weak to allow application writers to
+ * change the timer used to generate the tick interrupt.
+ */
+void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * @brief Checks whether the current execution context is interrupt.
+ *
+ * @return pdTRUE if the current execution context is interrupt, pdFALSE
+ * otherwise.
+ */
+BaseType_t xPortIsInsideInterrupt( void );
+
+/**
+ * @brief Yield the processor.
+ */
+void vPortYield( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * @brief Enter critical section.
+ */
+void vPortEnterCritical( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * @brief Exit from critical section.
+ */
+void vPortExitCritical( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * @brief SysTick handler.
+ */
+void SysTick_Handler( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * @brief C part of SVC handler.
+ */
+portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIVILEGED_FUNCTION;
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Each task maintains its own interrupt status in the critical nesting
+ * variable.
+ */
+PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
+
+#if ( configENABLE_TRUSTZONE == 1 )
+
+/**
+ * @brief Saved as part of the task context to indicate which context the
+ * task is using on the secure side.
+ */
+    PRIVILEGED_DATA portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
+#endif /* configENABLE_TRUSTZONE */
+
+#if ( configUSE_TICKLESS_IDLE == 1 )
+
+/**
+ * @brief The number of SysTick increments that make up one tick period.
+ */
+    PRIVILEGED_DATA static uint32_t ulTimerCountsForOneTick = 0;
+
+/**
+ * @brief The maximum number of tick periods that can be suppressed is
+ * limited by the 24 bit resolution of the SysTick timer.
+ */
+    PRIVILEGED_DATA static uint32_t xMaximumPossibleSuppressedTicks = 0;
+
+/**
+ * @brief Compensate for the CPU cycles that pass while the SysTick is
+ * stopped (low power functionality only).
+ */
+    PRIVILEGED_DATA static uint32_t ulStoppedTimerCompensation = 0;
+#endif /* configUSE_TICKLESS_IDLE */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+    {
+        uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+        TickType_t xModifiableIdleTime;
+
+        /* Make sure the SysTick reload value does not overflow the counter. */
+        if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+        {
+            xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+        }
+
+        /* Stop the SysTick momentarily. The time the SysTick is stopped for is
+         * accounted for as best it can be, but using the tickless mode will
+         * inevitably result in some tiny drift of the time maintained by the
+         * kernel with respect to calendar time. */
+        portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+
+        /* Calculate the reload value required to wait xExpectedIdleTime
+         * tick periods. -1 is used because this code will execute part way
+         * through one of the tick periods. */
+        ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
+
+        if( ulReloadValue > ulStoppedTimerCompensation )
+        {
+            ulReloadValue -= ulStoppedTimerCompensation;
+        }
+
+        /* Enter a critical section but don't use the taskENTER_CRITICAL()
+         * method as that will mask interrupts that should exit sleep mode. */
+        __asm volatile ( "cpsid i" ::: "memory" );
+        __asm volatile ( "dsb" );
+        __asm volatile ( "isb" );
+
+        /* If a context switch is pending or a task is waiting for the scheduler
+         * to be un-suspended then abandon the low power entry. */
+        if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+        {
+            /* Restart from whatever is left in the count register to complete
+             * this tick period. */
+            portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+
+            /* Reset the reload register to the value required for normal tick
+             * periods. */
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Re-enable interrupts - see comments above the cpsid instruction()
+             * above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+        else
+        {
+            /* Set the new reload value. */
+            portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+
+            /* Clear the SysTick count flag and set the count value back to
+             * zero. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+
+            /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
+             * set its parameter to 0 to indicate that its implementation
+             * contains its own wait for interrupt or wait for event
+             * instruction, and so wfi should not be executed again. However,
+             * the original expected idle time variable must remain unmodified,
+             * so a copy is taken. */
+            xModifiableIdleTime = xExpectedIdleTime;
+            configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
+
+            if( xModifiableIdleTime > 0 )
+            {
+                __asm volatile ( "dsb" ::: "memory" );
+                __asm volatile ( "wfi" );
+                __asm volatile ( "isb" );
+            }
+
+            configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+
+            /* Re-enable interrupts to allow the interrupt that brought the MCU
+             * out of sleep mode to execute immediately. See comments above
+             * the cpsid instruction above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
+
+            /* Disable interrupts again because the clock is about to be stopped
+             * and interrupts that execute while the clock is stopped will
+             * increase any slippage between the time maintained by the RTOS and
+             * calendar time. */
+            __asm volatile ( "cpsid i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
+
+            /* Disable the SysTick clock without reading the
+             * portNVIC_SYSTICK_CTRL_REG register to ensure the
+             * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
+             * Again, the time the SysTick is stopped for is accounted for as
+             * best it can be, but using the tickless mode will inevitably
+             * result in some tiny drift of the time maintained by the kernel
+             * with respect to calendar time*/
+            portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+
+            /* Determine if the SysTick clock has already counted to zero and
+             * been set back to the current reload value (the reload back being
+             * correct for the entire expected idle time) or if the SysTick is
+             * yet to count to zero (in which case an interrupt other than the
+             * SysTick must have brought the system out of sleep mode). */
+            if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+            {
+                uint32_t ulCalculatedLoadValue;
+
+                /* The tick interrupt is already pending, and the SysTick count
+                 * reloaded with ulReloadValue.  Reset the
+                 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+                 * period. */
+                ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+
+                /* Don't allow a tiny value, or values that have somehow
+                 * underflowed because the post sleep hook did something
+                 * that took too long. */
+                if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+                {
+                    ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+                }
+
+                portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+
+                /* As the pending tick will be processed as soon as this
+                 * function exits, the tick value maintained by the tick is
+                 * stepped forward by one less than the time spent waiting. */
+                ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+            }
+            else
+            {
+                /* Something other than the tick interrupt ended the sleep.
+                 * Work out how long the sleep lasted rounded to complete tick
+                 * periods (not the ulReload value which accounted for part
+                 * ticks). */
+                ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+                /* How many complete tick periods passed while the processor
+                 * was waiting? */
+                ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+                /* The reload value is set to whatever fraction of a single tick
+                 * period remains. */
+                portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+            }
+
+            /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+             * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+             * value. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            vTaskStepTick( ulCompleteTickPeriods );
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Exit with interrupts enabled. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+    }
+#endif /* configUSE_TICKLESS_IDLE */
+/*-----------------------------------------------------------*/
+
+__attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
+{
+    /* Calculate the constants required to configure the tick interrupt. */
+    #if ( configUSE_TICKLESS_IDLE == 1 )
+        {
+            ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+            xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+            ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+        }
+    #endif /* configUSE_TICKLESS_IDLE */
+
+    /* Stop and reset the SysTick. */
+    portNVIC_SYSTICK_CTRL_REG = 0UL;
+    portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+
+    /* Configure SysTick to interrupt at the requested rate. */
+    portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+    portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
+}
+/*-----------------------------------------------------------*/
+
+static void prvTaskExitError( void )
+{
+    volatile uint32_t ulDummy = 0UL;
+
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to. If a task wants to exit it
+     * should instead call vTaskDelete( NULL ). Artificially force an assert()
+     * to be triggered if configASSERT() is defined, then stop here so
+     * application writers can catch the error. */
+    configASSERT( ulCriticalNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
+
+    while( ulDummy == 0 )
+    {
+        /* This file calls prvTaskExitError() after the scheduler has been
+         * started to remove a compiler warning about the function being
+         * defined but never called.  ulDummy is used purely to quieten other
+         * warnings about code appearing after this function is called - making
+         * ulDummy volatile makes the compiler think the function could return
+         * and therefore not output an 'unreachable code' warning for code that
+         * appears after it. */
+    }
+}
+/*-----------------------------------------------------------*/
+
+#if ( configENABLE_MPU == 1 )
+    static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
+    {
+        #if defined( __ARMCC_VERSION )
+
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __privileged_functions_start__;
+            extern uint32_t * __privileged_functions_end__;
+            extern uint32_t * __syscalls_flash_start__;
+            extern uint32_t * __syscalls_flash_end__;
+            extern uint32_t * __unprivileged_flash_start__;
+            extern uint32_t * __unprivileged_flash_end__;
+            extern uint32_t * __privileged_sram_start__;
+            extern uint32_t * __privileged_sram_end__;
+        #else /* if defined( __ARMCC_VERSION ) */
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __privileged_functions_start__[];
+            extern uint32_t __privileged_functions_end__[];
+            extern uint32_t __syscalls_flash_start__[];
+            extern uint32_t __syscalls_flash_end__[];
+            extern uint32_t __unprivileged_flash_start__[];
+            extern uint32_t __unprivileged_flash_end__[];
+            extern uint32_t __privileged_sram_start__[];
+            extern uint32_t __privileged_sram_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
+
+        /* Check that the MPU is present. */
+        if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
+        {
+            /* MAIR0 - Index 0. */
+            portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
+            /* MAIR0 - Index 1. */
+            portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
+
+            /* Setup privileged flash as Read Only so that privileged tasks can
+             * read it but not modify. */
+            portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_PRIVILEGED_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
+
+            /* Setup unprivileged flash as Read Only by both privileged and
+             * unprivileged tasks. All tasks can read it but no-one can modify. */
+            portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
+
+            /* Setup unprivileged syscalls flash as Read Only by both privileged
+             * and unprivileged tasks. All tasks can read it but no-one can modify. */
+            portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
+
+            /* Setup RAM containing kernel data for privileged access only. */
+            portMPU_RNR_REG = portPRIVILEGED_RAM_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
+                               ( portMPU_REGION_EXECUTE_NEVER );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
+
+            /* Enable mem fault. */
+            portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
+
+            /* Enable MPU with privileged background access i.e. unmapped
+             * regions have privileged access. */
+            portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
+        }
+    }
+#endif /* configENABLE_MPU */
+/*-----------------------------------------------------------*/
+
+#if ( configENABLE_FPU == 1 )
+    static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
+    {
+        #if ( configENABLE_TRUSTZONE == 1 )
+            {
+                /* Enable non-secure access to the FPU. */
+                SecureInit_EnableNSFPUAccess();
+            }
+        #endif /* configENABLE_TRUSTZONE */
+
+        /* CP10 = 11 ==> Full access to FPU i.e. both privileged and
+         * unprivileged code should be able to access FPU. CP11 should be
+         * programmed to the same value as CP10. */
+        *( portCPACR ) |= ( ( portCPACR_CP10_VALUE << portCPACR_CP10_POS ) |
+                            ( portCPACR_CP11_VALUE << portCPACR_CP11_POS )
+                            );
+
+        /* ASPEN = 1 ==> Hardware should automatically preserve floating point
+         * context on exception entry and restore on exception return.
+         * LSPEN = 1 ==> Enable lazy context save of FP state. */
+        *( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
+    }
+#endif /* configENABLE_FPU */
+/*-----------------------------------------------------------*/
+
+void vPortYield( void ) /* PRIVILEGED_FUNCTION */
+{
+    /* Set a PendSV to request a context switch. */
+    portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+
+    /* Barriers are normally not required but do ensure the code is
+     * completely within the specified behaviour for the architecture. */
+    __asm volatile ( "dsb" ::: "memory" );
+    __asm volatile ( "isb" );
+}
+/*-----------------------------------------------------------*/
+
+void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */
+{
+    portDISABLE_INTERRUPTS();
+    ulCriticalNesting++;
+
+    /* Barriers are normally not required but do ensure the code is
+     * completely within the specified behaviour for the architecture. */
+    __asm volatile ( "dsb" ::: "memory" );
+    __asm volatile ( "isb" );
+}
+/*-----------------------------------------------------------*/
+
+void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */
+{
+    configASSERT( ulCriticalNesting );
+    ulCriticalNesting--;
+
+    if( ulCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
+}
+/*-----------------------------------------------------------*/
+
+void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
+{
+    uint32_t ulPreviousMask;
+
+    ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* Pend a context switch. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
+}
+/*-----------------------------------------------------------*/
+
+void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTION portDONT_DISCARD */
+{
+    #if ( configENABLE_MPU == 1 )
+        #if defined( __ARMCC_VERSION )
+
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __syscalls_flash_start__;
+            extern uint32_t * __syscalls_flash_end__;
+        #else
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __syscalls_flash_start__[];
+            extern uint32_t __syscalls_flash_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
+    #endif /* configENABLE_MPU */
+
+    uint32_t ulPC;
+
+    #if ( configENABLE_TRUSTZONE == 1 )
+        uint32_t ulR0;
+        #if ( configENABLE_MPU == 1 )
+            uint32_t ulControl, ulIsTaskPrivileged;
+        #endif /* configENABLE_MPU */
+    #endif /* configENABLE_TRUSTZONE */
+    uint8_t ucSVCNumber;
+
+    /* Register are stored on the stack in the following order - R0, R1, R2, R3,
+     * R12, LR, PC, xPSR. */
+    ulPC = pulCallerStackAddress[ 6 ];
+    ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ];
+
+    switch( ucSVCNumber )
+    {
+        #if ( configENABLE_TRUSTZONE == 1 )
+            case portSVC_ALLOCATE_SECURE_CONTEXT:
+
+                /* R0 contains the stack size passed as parameter to the
+                 * vPortAllocateSecureContext function. */
+                ulR0 = pulCallerStackAddress[ 0 ];
+
+                #if ( configENABLE_MPU == 1 )
+                    {
+                        /* Read the CONTROL register value. */
+                        __asm volatile ( "mrs %0, control"  : "=r" ( ulControl ) );
+
+                        /* The task that raised the SVC is privileged if Bit[0]
+                         * in the CONTROL register is 0. */
+                        ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 );
+
+                        /* Allocate and load a context for the secure task. */
+                        xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged );
+                    }
+                #else /* if ( configENABLE_MPU == 1 ) */
+                    {
+                        /* Allocate and load a context for the secure task. */
+                        xSecureContext = SecureContext_AllocateContext( ulR0 );
+                    }
+                #endif /* configENABLE_MPU */
+
+                configASSERT( xSecureContext != NULL );
+                SecureContext_LoadContext( xSecureContext );
+                break;
+
+            case portSVC_FREE_SECURE_CONTEXT:
+                /* R0 contains the secure context handle to be freed. */
+                ulR0 = pulCallerStackAddress[ 0 ];
+
+                /* Free the secure context. */
+                SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 );
+                break;
+        #endif /* configENABLE_TRUSTZONE */
+
+        case portSVC_START_SCHEDULER:
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    /* De-prioritize the non-secure exceptions so that the
+                     * non-secure pendSV runs at the lowest priority. */
+                    SecureInit_DePrioritizeNSExceptions();
+
+                    /* Initialize the secure context management system. */
+                    SecureContext_Init();
+                }
+            #endif /* configENABLE_TRUSTZONE */
+
+            #if ( configENABLE_FPU == 1 )
+                {
+                    /* Setup the Floating Point Unit (FPU). */
+                    prvSetupFPU();
+                }
+            #endif /* configENABLE_FPU */
+
+            /* Setup the context of the first task so that the first task starts
+             * executing. */
+            vRestoreContextOfFirstTask();
+            break;
+
+            #if ( configENABLE_MPU == 1 )
+                case portSVC_RAISE_PRIVILEGE:
+
+                    /* Only raise the privilege, if the svc was raised from any of
+                     * the system calls. */
+                    if( ( ulPC >= ( uint32_t ) __syscalls_flash_start__ ) &&
+                        ( ulPC <= ( uint32_t ) __syscalls_flash_end__ ) )
+                    {
+                        vRaisePrivilege();
+                    }
+                    break;
+            #endif /* configENABLE_MPU */
+
+        default:
+            /* Incorrect SVC call. */
+            configASSERT( pdFALSE );
+    }
+}
+/*-----------------------------------------------------------*/
+/* *INDENT-OFF* */
+#if ( configENABLE_MPU == 1 )
+    StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                         StackType_t * pxEndOfStack,
+                                         TaskFunction_t pxCode,
+                                         void * pvParameters,
+                                         BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */
+#else
+    StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                         StackType_t * pxEndOfStack,
+                                         TaskFunction_t pxCode,
+                                         void * pvParameters ) /* PRIVILEGED_FUNCTION */
+#endif /* configENABLE_MPU */
+/* *INDENT-ON* */
+{
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
+    #if ( portPRELOAD_REGISTERS == 0 )
+        {
+            pxTopOfStack--;                                          /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+            *pxTopOfStack = portINITIAL_XPSR;                        /* xPSR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxCode;                  /* PC */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
+            pxTopOfStack -= 5;                                       /* R12, R3, R2 and R1. */
+            *pxTopOfStack = ( StackType_t ) pvParameters;            /* R0 */
+            pxTopOfStack -= 9;                                       /* R11..R4, EXC_RETURN. */
+            *pxTopOfStack = portINITIAL_EXC_RETURN;
+
+            #if ( configENABLE_MPU == 1 )
+                {
+                    pxTopOfStack--;
+
+                    if( xRunPrivileged == pdTRUE )
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                    else
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                }
+            #endif /* configENABLE_MPU */
+
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */
+
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    pxTopOfStack--;
+                    *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */
+                }
+            #endif /* configENABLE_TRUSTZONE */
+        }
+    #else /* portPRELOAD_REGISTERS */
+        {
+            pxTopOfStack--;                                          /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+            *pxTopOfStack = portINITIAL_XPSR;                        /* xPSR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxCode;                  /* PC */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x12121212UL;            /* R12 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x03030303UL;            /* R3 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x02020202UL;            /* R2 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x01010101UL;            /* R1 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pvParameters;            /* R0 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x11111111UL;            /* R11 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x10101010UL;            /* R10 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x09090909UL;            /* R09 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x08080808UL;            /* R08 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x07070707UL;            /* R07 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x06060606UL;            /* R06 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x05050505UL;            /* R05 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x04040404UL;            /* R04 */
+            pxTopOfStack--;
+            *pxTopOfStack = portINITIAL_EXC_RETURN;                  /* EXC_RETURN */
+
+            #if ( configENABLE_MPU == 1 )
+                {
+                    pxTopOfStack--;
+
+                    if( xRunPrivileged == pdTRUE )
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                    else
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                }
+            #endif /* configENABLE_MPU */
+
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */
+
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    pxTopOfStack--;
+                    *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */
+                }
+            #endif /* configENABLE_TRUSTZONE */
+        }
+    #endif /* portPRELOAD_REGISTERS */
+
+    return pxTopOfStack;
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
+{
+    /* Make PendSV, CallSV and SysTick the same priority as the kernel. */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
+
+    #if ( configENABLE_MPU == 1 )
+        {
+            /* Setup the Memory Protection Unit (MPU). */
+            prvSetupMPU();
+        }
+    #endif /* configENABLE_MPU */
+
+    /* Start the timer that generates the tick ISR. Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
+
+    /* Initialize the critical nesting count ready for the first task. */
+    ulCriticalNesting = 0;
+
+    /* Start the first task. */
+    vStartFirstTask();
+
+    /* Should never get here as the tasks will now be executing. Call the task
+     * exit error function to prevent compiler warnings about a static function
+     * not being called in the case that the application writer overrides this
+     * functionality by defining configTASK_RETURN_ADDRESS. Call
+     * vTaskSwitchContext() so link time optimization does not remove the
+     * symbol. */
+    vTaskSwitchContext();
+    prvTaskExitError();
+
+    /* Should not get here. */
+    return 0;
+}
+/*-----------------------------------------------------------*/
+
+void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
+{
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( ulCriticalNesting == 1000UL );
+}
+/*-----------------------------------------------------------*/
+
+#if ( configENABLE_MPU == 1 )
+    void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
+                                    const struct xMEMORY_REGION * const xRegions,
+                                    StackType_t * pxBottomOfStack,
+                                    uint32_t ulStackDepth )
+    {
+        uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
+        int32_t lIndex = 0;
+
+        #if defined( __ARMCC_VERSION )
+
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __privileged_sram_start__;
+            extern uint32_t * __privileged_sram_end__;
+        #else
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __privileged_sram_start__[];
+            extern uint32_t __privileged_sram_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
+
+        /* Setup MAIR0. */
+        xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
+        xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
+
+        /* This function is called automatically when the task is created - in
+         * which case the stack region parameters will be valid.  At all other
+         * times the stack parameters will not be valid and it is assumed that
+         * the stack region has already been configured. */
+        if( ulStackDepth > 0 )
+        {
+            ulRegionStartAddress = ( uint32_t ) pxBottomOfStack;
+            ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1;
+
+            /* If the stack is within the privileged SRAM, do not protect it
+             * using a separate MPU region. This is needed because privileged
+             * SRAM is already protected using an MPU region and ARMv8-M does
+             * not allow overlapping MPU regions. */
+            if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
+                ( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
+            {
+                xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
+                xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;
+            }
+            else
+            {
+                /* Define the region that allows access to the stack. */
+                ulRegionStartAddress &= portMPU_RBAR_ADDRESS_MASK;
+                ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK;
+
+                xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) |
+                                                             ( portMPU_REGION_NON_SHAREABLE ) |
+                                                             ( portMPU_REGION_READ_WRITE ) |
+                                                             ( portMPU_REGION_EXECUTE_NEVER );
+
+                xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = ( ulRegionEndAddress ) |
+                                                             ( portMPU_RLAR_ATTR_INDEX0 ) |
+                                                             ( portMPU_RLAR_REGION_ENABLE );
+            }
+        }
+
+        /* User supplied configurable regions. */
+        for( ulRegionNumber = 1; ulRegionNumber <= portNUM_CONFIGURABLE_REGIONS; ulRegionNumber++ )
+        {
+            /* If xRegions is NULL i.e. the task has not specified any MPU
+             * region, the else part ensures that all the configurable MPU
+             * regions are invalidated. */
+            if( ( xRegions != NULL ) && ( xRegions[ lIndex ].ulLengthInBytes > 0UL ) )
+            {
+                /* Translate the generic region definition contained in xRegions
+                 * into the ARMv8 specific MPU settings that are then stored in
+                 * xMPUSettings. */
+                ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK;
+                ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1;
+                ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK;
+
+                /* Start address. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = ( ulRegionStartAddress ) |
+                                                                          ( portMPU_REGION_NON_SHAREABLE );
+
+                /* RO/RW. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_READ_ONLY ) != 0 )
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_ONLY );
+                }
+                else
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_WRITE );
+                }
+
+                /* XN. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_EXECUTE_NEVER ) != 0 )
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_EXECUTE_NEVER );
+                }
+
+                /* End Address. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
+                                                                          ( portMPU_RLAR_REGION_ENABLE );
+
+                /* Normal memory/ Device memory. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
+                {
+                    /* Attr1 in MAIR0 is configured as device memory. */
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX1;
+                }
+                else
+                {
+                    /* Attr1 in MAIR0 is configured as normal memory. */
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
+                }
+            }
+            else
+            {
+                /* Invalidate the region. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = 0UL;
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = 0UL;
+            }
+
+            lIndex++;
+        }
+    }
+#endif /* configENABLE_MPU */
+/*-----------------------------------------------------------*/
+
+BaseType_t xPortIsInsideInterrupt( void )
+{
+    uint32_t ulCurrentInterrupt;
+    BaseType_t xReturn;
+
+    /* Obtain the number of the currently executing interrupt. Interrupt Program
+     * Status Register (IPSR) holds the exception number of the currently-executing
+     * exception or zero for Thread mode.*/
+    __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
+
+    if( ulCurrentInterrupt == 0 )
+    {
+        xReturn = pdFALSE;
+    }
+    else
+    {
+        xReturn = pdTRUE;
+    }
+
+    return xReturn;
+}
+/*-----------------------------------------------------------*/
diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c
index 1c649a182..5f9bcd897 100644
--- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c
+++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -39,415 +39,415 @@
  * header files. */
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
-#if( configENABLE_FPU == 1 )
-	#error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
+#if ( configENABLE_FPU == 1 )
+    #error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
 #endif
 
 void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	.syntax unified									\n"
-	"													\n"
-	"	ldr  r2, pxCurrentTCBConst2						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr  r3, [r2]									\n" /* Read pxCurrentTCB. */
-	"	ldr  r0, [r3]									\n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	dmb												\n" /* Complete outstanding transfers before disabling MPU. */
-	"	ldr r2, xMPUCTRLConst2							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	movs r5, #1										\n" /* r5 = 1. */
-	"	bics r4, r5										\n" /* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Disable MPU. */
-	"													\n"
-	"	adds r3, #4										\n" /* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
-	"	ldr  r4, [r3]									\n" /* r4 = *r3 i.e. r4 = MAIR0. */
-	"	ldr  r2, xMAIR0Const2							\n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-	"	str  r4, [r2]									\n" /* Program MAIR0. */
-	"	ldr  r2, xRNRConst2								\n" /* r2 = 0xe000ed98 [Location of RNR]. */
-	"	adds r3, #4										\n" /* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
-	"	movs r5, #4										\n" /* r5 = 4. */
-	"	str  r5, [r2]									\n" /* Program RNR = 4. */
-	"	ldmia r3!, {r6,r7}								\n" /* Read first set of RBAR/RLAR from TCB. */
-	"	ldr  r4, xRBARConst2							\n" /* r4 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r4!, {r6,r7}								\n" /* Write first set of RBAR/RLAR registers. */
-	"	movs r5, #5										\n" /* r5 = 5. */
-	"	str  r5, [r2]									\n" /* Program RNR = 5. */
-	"	ldmia r3!, {r6,r7}								\n" /* Read second set of RBAR/RLAR from TCB. */
-	"	ldr  r4, xRBARConst2							\n" /* r4 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r4!, {r6,r7}								\n" /* Write second set of RBAR/RLAR registers. */
-	"	movs r5, #6										\n" /* r5 = 6. */
-	"	str  r5, [r2]									\n" /* Program RNR = 6. */
-	"	ldmia r3!, {r6,r7}								\n" /* Read third set of RBAR/RLAR from TCB. */
-	"	ldr  r4, xRBARConst2							\n" /* r4 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r4!, {r6,r7}								\n" /* Write third set of RBAR/RLAR registers. */
-	"	movs r5, #7										\n" /* r5 = 7. */
-	"	str  r5, [r2]									\n" /* Program RNR = 7. */
-	"	ldmia r3!, {r6,r7}								\n" /* Read fourth set of RBAR/RLAR from TCB. */
-	"	ldr  r4, xRBARConst2							\n" /* r4 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r4!, {r6,r7}								\n" /* Write fourth set of RBAR/RLAR registers. */
-	"													\n"
-	"	ldr r2, xMPUCTRLConst2							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	movs r5, #1										\n" /* r5 = 1. */
-	"	orrs r4, r5										\n" /* r4 = r4 | r5 i.e. Set the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Enable MPU. */
-	"	dsb												\n" /* Force memory writes before continuing. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	ldm  r0!, {r1-r4}								\n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */
-	"	ldr  r5, xSecureContextConst2					\n"
-	"	str  r1, [r5]									\n" /* Set xSecureContext to this task's value for the same. */
-	"	msr  psplim, r2									\n" /* Set this task's PSPLIM value. */
-	"	msr  control, r3								\n" /* Set this task's CONTROL value. */
-	"	adds r0, #32									\n" /* Discard everything up to r0. */
-	"	msr  psp, r0									\n" /* This is now the new top of stack to use in the task. */
-	"	isb												\n"
-	"	bx   r4											\n" /* Finally, branch to EXC_RETURN. */
-	#else /* configENABLE_MPU */
-	"	ldm  r0!, {r1-r3}								\n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
-	"	ldr  r4, xSecureContextConst2					\n"
-	"	str  r1, [r4]									\n" /* Set xSecureContext to this task's value for the same. */
-	"	msr  psplim, r2									\n" /* Set this task's PSPLIM value. */
-	"	movs r1, #2										\n" /* r1 = 2. */
-	"	msr  CONTROL, r1								\n" /* Switch to use PSP in the thread mode. */
-	"	adds r0, #32									\n" /* Discard everything up to r0. */
-	"	msr  psp, r0									\n" /* This is now the new top of stack to use in the task. */
-	"	isb												\n"
-	"	bx   r3											\n" /* Finally, branch to EXC_RETURN. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	"	.align 4										\n"
-	"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
-	"xSecureContextConst2: .word xSecureContext			\n"
-	#if( configENABLE_MPU == 1 )
-	"xMPUCTRLConst2: .word 0xe000ed94					\n"
-	"xMAIR0Const2: .word 0xe000edc0						\n"
-	"xRNRConst2: .word 0xe000ed98						\n"
-	"xRBARConst2: .word 0xe000ed9c						\n"
-	#endif /* configENABLE_MPU */
-	);
+    __asm volatile
+    (
+        "	.syntax unified									\n"
+        "													\n"
+        "	ldr  r2, pxCurrentTCBConst2						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr  r3, [r2]									\n"/* Read pxCurrentTCB. */
+        "	ldr  r0, [r3]									\n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	dmb												\n"/* Complete outstanding transfers before disabling MPU. */
+            "	ldr r2, xMPUCTRLConst2							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	movs r5, #1										\n"/* r5 = 1. */
+            "	bics r4, r5										\n"/* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */
+            "	str r4, [r2]									\n"/* Disable MPU. */
+            "													\n"
+            "	adds r3, #4										\n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
+            "	ldr  r4, [r3]									\n"/* r4 = *r3 i.e. r4 = MAIR0. */
+            "	ldr  r2, xMAIR0Const2							\n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "	str  r4, [r2]									\n"/* Program MAIR0. */
+            "	ldr  r2, xRNRConst2								\n"/* r2 = 0xe000ed98 [Location of RNR]. */
+            "	adds r3, #4										\n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
+            "	movs r5, #4										\n"/* r5 = 4. */
+            "	str  r5, [r2]									\n"/* Program RNR = 4. */
+            "	ldmia r3!, {r6,r7}								\n"/* Read first set of RBAR/RLAR from TCB. */
+            "	ldr  r4, xRBARConst2							\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r4!, {r6,r7}								\n"/* Write first set of RBAR/RLAR registers. */
+            "	movs r5, #5										\n"/* r5 = 5. */
+            "	str  r5, [r2]									\n"/* Program RNR = 5. */
+            "	ldmia r3!, {r6,r7}								\n"/* Read second set of RBAR/RLAR from TCB. */
+            "	ldr  r4, xRBARConst2							\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r4!, {r6,r7}								\n"/* Write second set of RBAR/RLAR registers. */
+            "	movs r5, #6										\n"/* r5 = 6. */
+            "	str  r5, [r2]									\n"/* Program RNR = 6. */
+            "	ldmia r3!, {r6,r7}								\n"/* Read third set of RBAR/RLAR from TCB. */
+            "	ldr  r4, xRBARConst2							\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r4!, {r6,r7}								\n"/* Write third set of RBAR/RLAR registers. */
+            "	movs r5, #7										\n"/* r5 = 7. */
+            "	str  r5, [r2]									\n"/* Program RNR = 7. */
+            "	ldmia r3!, {r6,r7}								\n"/* Read fourth set of RBAR/RLAR from TCB. */
+            "	ldr  r4, xRBARConst2							\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r4!, {r6,r7}								\n"/* Write fourth set of RBAR/RLAR registers. */
+            "													\n"
+            "	ldr r2, xMPUCTRLConst2							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	movs r5, #1										\n"/* r5 = 1. */
+            "	orrs r4, r5										\n"/* r4 = r4 | r5 i.e. Set the bit 0 in r4. */
+            "	str r4, [r2]									\n"/* Enable MPU. */
+            "	dsb												\n"/* Force memory writes before continuing. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	ldm  r0!, {r1-r4}								\n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */
+            "	ldr  r5, xSecureContextConst2					\n"
+            "	str  r1, [r5]									\n"/* Set xSecureContext to this task's value for the same. */
+            "	msr  psplim, r2									\n"/* Set this task's PSPLIM value. */
+            "	msr  control, r3								\n"/* Set this task's CONTROL value. */
+            "	adds r0, #32									\n"/* Discard everything up to r0. */
+            "	msr  psp, r0									\n"/* This is now the new top of stack to use in the task. */
+            "	isb												\n"
+            "	bx   r4											\n"/* Finally, branch to EXC_RETURN. */
+        #else /* configENABLE_MPU */
+            "	ldm  r0!, {r1-r3}								\n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
+            "	ldr  r4, xSecureContextConst2					\n"
+            "	str  r1, [r4]									\n"/* Set xSecureContext to this task's value for the same. */
+            "	msr  psplim, r2									\n"/* Set this task's PSPLIM value. */
+            "	movs r1, #2										\n"/* r1 = 2. */
+            "	msr  CONTROL, r1								\n"/* Switch to use PSP in the thread mode. */
+            "	adds r0, #32									\n"/* Discard everything up to r0. */
+            "	msr  psp, r0									\n"/* This is now the new top of stack to use in the task. */
+            "	isb												\n"
+            "	bx   r3											\n"/* Finally, branch to EXC_RETURN. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        "	.align 4										\n"
+        "pxCurrentTCBConst2: .word pxCurrentTCB				\n"
+        "xSecureContextConst2: .word xSecureContext			\n"
+        #if ( configENABLE_MPU == 1 )
+            "xMPUCTRLConst2: .word 0xe000ed94					\n"
+            "xMAIR0Const2: .word 0xe000edc0						\n"
+            "xRNRConst2: .word 0xe000ed98						\n"
+            "xRBARConst2: .word 0xe000ed9c						\n"
+        #endif /* configENABLE_MPU */
+    );
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
 {
-	__asm volatile
-	(
-	"	mrs r0, control									\n" /* r0 = CONTROL. */
-	"	movs r1, #1										\n" /* r1 = 1. */
-	"	tst r0, r1										\n" /* Perform r0 & r1 (bitwise AND) and update the conditions flag. */
-	"	beq running_privileged							\n" /* If the result of previous AND operation was 0, branch. */
-	"	movs r0, #0										\n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
-	"	bx lr											\n" /* Return. */
-	" running_privileged:								\n"
-	"	movs r0, #1										\n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
-	"	bx lr											\n" /* Return. */
-	"													\n"
-	"	.align 4										\n"
-	::: "r0", "r1", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, control									\n"/* r0 = CONTROL. */
+        "	movs r1, #1										\n"/* r1 = 1. */
+        "	tst r0, r1										\n"/* Perform r0 & r1 (bitwise AND) and update the conditions flag. */
+        "	beq running_privileged							\n"/* If the result of previous AND operation was 0, branch. */
+        "	movs r0, #0										\n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
+        "	bx lr											\n"/* Return. */
+        " running_privileged:								\n"
+        "	movs r0, #1										\n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
+        "	bx lr											\n"/* Return. */
+        "													\n"
+        "	.align 4										\n"
+        ::: "r0", "r1", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	 __asm volatile
-	(
-	"	mrs r0, control									\n" /* Read the CONTROL register. */
-	"	movs r1, #1										\n" /* r1 = 1. */
-	"	bics r0, r1										\n" /* Clear the bit 0. */
-	"	msr control, r0									\n" /* Write back the new CONTROL value. */
-	"	bx lr											\n" /* Return to the caller. */
-	::: "r0", "r1", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, control									\n"/* Read the CONTROL register. */
+        "	movs r1, #1										\n"/* r1 = 1. */
+        "	bics r0, r1										\n"/* Clear the bit 0. */
+        "	msr control, r0									\n"/* Write back the new CONTROL value. */
+        "	bx lr											\n"/* Return to the caller. */
+        ::: "r0", "r1", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vResetPrivilege( void ) /* __attribute__ (( naked )) */
 {
-	__asm volatile
-	(
-	"	mrs r0, control									\n" /* r0 = CONTROL. */
-	"	movs r1, #1										\n" /* r1 = 1. */
-	"	orrs r0, r1										\n" /* r0 = r0 | r1. */
-	"	msr control, r0									\n" /* CONTROL = r0. */
-	"	bx lr											\n" /* Return to the caller. */
-	:::"r0", "r1", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, control									\n"/* r0 = CONTROL. */
+        "	movs r1, #1										\n"/* r1 = 1. */
+        "	orrs r0, r1										\n"/* r0 = r0 | r1. */
+        "	msr control, r0									\n"/* CONTROL = r0. */
+        "	bx lr											\n"/* Return to the caller. */
+        ::: "r0", "r1", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	ldr r0, xVTORConst								\n" /* Use the NVIC offset register to locate the stack. */
-	"	ldr r0, [r0]									\n" /* Read the VTOR register which gives the address of vector table. */
-	"	ldr r0, [r0]									\n" /* The first entry in vector table is stack pointer. */
-	"	msr msp, r0										\n" /* Set the MSP back to the start of the stack. */
-	"	cpsie i											\n" /* Globally enable interrupts. */
-	"	dsb												\n"
-	"	isb												\n"
-	"	svc %0											\n" /* System call to start the first task. */
-	"	nop												\n"
-	"													\n"
-	"   .align 4										\n"
-	"xVTORConst: .word 0xe000ed08						\n"
-	:: "i" ( portSVC_START_SCHEDULER ) : "memory"
-	);
+    __asm volatile
+    (
+        "	ldr r0, xVTORConst								\n"/* Use the NVIC offset register to locate the stack. */
+        "	ldr r0, [r0]									\n"/* Read the VTOR register which gives the address of vector table. */
+        "	ldr r0, [r0]									\n"/* The first entry in vector table is stack pointer. */
+        "	msr msp, r0										\n"/* Set the MSP back to the start of the stack. */
+        "	cpsie i											\n"/* Globally enable interrupts. */
+        "	dsb												\n"
+        "	isb												\n"
+        "	svc %0											\n"/* System call to start the first task. */
+        "	nop												\n"
+        "													\n"
+        "   .align 4										\n"
+        "xVTORConst: .word 0xe000ed08						\n"
+        ::"i" ( portSVC_START_SCHEDULER ) : "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	mrs r0, PRIMASK									\n"
-	"	cpsid i											\n"
-	"	bx lr											\n"
-	::: "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, PRIMASK									\n"
+        "	cpsid i											\n"
+        "	bx lr											\n"
+        ::: "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	msr PRIMASK, r0									\n"
-	"	bx lr											\n"
-	::: "memory"
-	);
+    __asm volatile
+    (
+        "	msr PRIMASK, r0									\n"
+        "	bx lr											\n"
+        ::: "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	.syntax unified									\n"
-	"	.extern SecureContext_SaveContext				\n"
-	"	.extern SecureContext_LoadContext				\n"
-	"													\n"
-	"	mrs r1, psp										\n" /* Read PSP in r1. */
-	"	ldr r2, xSecureContextConst						\n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
-	"	ldr r0, [r2]									\n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
-	"													\n"
-	"	cbz r0, save_ns_context							\n" /* No secure context to save. */
-	"	push {r0-r2, r14}								\n"
-	"	bl SecureContext_SaveContext					\n"
-	"	pop {r0-r3}										\n" /* LR is now in r3. */
-	"	mov lr, r3										\n" /* LR = r3. */
-	"	lsls r2, r3, #25								\n" /* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-	"	bpl save_ns_context								\n" /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-	"	ldr r3, pxCurrentTCBConst						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr r2, [r3]									\n" /* Read pxCurrentTCB. */
-	#if( configENABLE_MPU == 1 )
-	"	subs r1, r1, #16								\n" /* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
-	"	str r1, [r2]									\n" /* Save the new top of stack in TCB. */
-	"	mrs r2, psplim									\n" /* r2 = PSPLIM. */
-	"	mrs r3, control									\n" /* r3 = CONTROL. */
-	"	mov r4, lr										\n" /* r4 = LR/EXC_RETURN. */
-	"	stmia r1!, {r0, r2-r4}							\n" /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
-	#else /* configENABLE_MPU */
-	"	subs r1, r1, #12								\n" /* Make space for xSecureContext, PSPLIM and LR on the stack. */
-	"	str r1, [r2]									\n" /* Save the new top of stack in TCB. */
-	"	mrs r2, psplim									\n" /* r2 = PSPLIM. */
-	"	mov r3, lr										\n" /* r3 = LR/EXC_RETURN. */
-	"	stmia r1!, {r0, r2-r3}							\n" /* Store xSecureContext, PSPLIM and LR on the stack. */
-	#endif /* configENABLE_MPU */
-	"	b select_next_task								\n"
-	"													\n"
-	" save_ns_context:									\n"
-	"	ldr r3, pxCurrentTCBConst						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr r2, [r3]									\n" /* Read pxCurrentTCB. */
-	#if( configENABLE_MPU == 1 )
-	"	subs r1, r1, #48								\n" /* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
-	"	str r1, [r2]									\n" /* Save the new top of stack in TCB. */
-	"	adds r1, r1, #16								\n" /* r1 = r1 + 16. */
-	"	stmia r1!, {r4-r7}								\n" /* Store the low registers that are not saved automatically. */
-	"	mov r4, r8										\n" /* r4 = r8. */
-	"	mov r5, r9										\n" /* r5 = r9. */
-	"	mov r6, r10										\n" /* r6 = r10. */
-	"	mov r7, r11										\n" /* r7 = r11. */
-	"	stmia r1!, {r4-r7}								\n" /* Store the high registers that are not saved automatically. */
-	"	mrs r2, psplim									\n" /* r2 = PSPLIM. */
-	"	mrs r3, control									\n" /* r3 = CONTROL. */
-	"	mov r4, lr										\n" /* r4 = LR/EXC_RETURN. */
-	"	subs r1, r1, #48								\n" /* r1 = r1 - 48. */
-	"	stmia r1!, {r0, r2-r4}							\n" /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
-	#else /* configENABLE_MPU */
-	"	subs r1, r1, #44								\n" /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
-	"	str r1, [r2]									\n" /* Save the new top of stack in TCB. */
-	"	mrs r2, psplim									\n" /* r2 = PSPLIM. */
-	"	mov r3, lr										\n" /* r3 = LR/EXC_RETURN. */
-	"	stmia r1!, {r0, r2-r7}							\n" /* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */
-	"	mov r4, r8										\n" /* r4 = r8. */
-	"	mov r5, r9										\n" /* r5 = r9. */
-	"	mov r6, r10										\n" /* r6 = r10. */
-	"	mov r7, r11										\n" /* r7 = r11. */
-	"	stmia r1!, {r4-r7}								\n" /* Store the high registers that are not saved automatically. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	" select_next_task:									\n"
-	"	cpsid i											\n"
-	"	bl vTaskSwitchContext							\n"
-	"	cpsie i											\n"
-	"													\n"
-	"	ldr r2, pxCurrentTCBConst						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr r3, [r2]									\n" /* Read pxCurrentTCB. */
-	"	ldr r1, [r3]									\n" /* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	dmb												\n" /* Complete outstanding transfers before disabling MPU. */
-	"	ldr r2, xMPUCTRLConst							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	movs r5, #1										\n" /* r5 = 1. */
-	"	bics r4, r5										\n" /* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Disable MPU. */
-	"													\n"
-	"	adds r3, #4										\n" /* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
-	"	ldr r4, [r3]									\n" /* r4 = *r3 i.e. r4 = MAIR0. */
-	"	ldr r2, xMAIR0Const								\n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-	"	str r4, [r2]									\n" /* Program MAIR0. */
-	"	ldr r2, xRNRConst								\n" /* r2 = 0xe000ed98 [Location of RNR]. */
-	"	adds r3, #4										\n" /* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
-	"	movs r5, #4										\n" /* r5 = 4. */
-	"	str  r5, [r2]									\n" /* Program RNR = 4. */
-	"	ldmia r3!, {r6,r7}								\n" /* Read first set of RBAR/RLAR from TCB. */
-	"	ldr  r4, xRBARConst								\n" /* r4 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r4!, {r6,r7}								\n" /* Write first set of RBAR/RLAR registers. */
-	"	movs r5, #5										\n" /* r5 = 5. */
-	"	str  r5, [r2]									\n" /* Program RNR = 5. */
-	"	ldmia r3!, {r6,r7}								\n" /* Read second set of RBAR/RLAR from TCB. */
-	"	ldr  r4, xRBARConst								\n" /* r4 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r4!, {r6,r7}								\n" /* Write second set of RBAR/RLAR registers. */
-	"	movs r5, #6										\n" /* r5 = 6. */
-	"	str  r5, [r2]									\n" /* Program RNR = 6. */
-	"	ldmia r3!, {r6,r7}								\n" /* Read third set of RBAR/RLAR from TCB. */
-	"	ldr  r4, xRBARConst								\n" /* r4 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r4!, {r6,r7}								\n" /* Write third set of RBAR/RLAR registers. */
-	"	movs r5, #7										\n" /* r5 = 7. */
-	"	str  r5, [r2]									\n" /* Program RNR = 7. */
-	"	ldmia r3!, {r6,r7}								\n" /* Read fourth set of RBAR/RLAR from TCB. */
-	"	ldr  r4, xRBARConst								\n" /* r4 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r4!, {r6,r7}								\n" /* Write fourth set of RBAR/RLAR registers. */
-	"													\n"
-	"	ldr r2, xMPUCTRLConst							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	movs r5, #1										\n" /* r5 = 1. */
-	"	orrs r4, r5										\n" /* r4 = r4 | r5 i.e. Set the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Enable MPU. */
-	"	dsb												\n" /* Force memory writes before continuing. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	ldmia r1!, {r0, r2-r4}							\n" /* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */
-	"	msr psplim, r2									\n" /* Restore the PSPLIM register value for the task. */
-	"	msr control, r3									\n" /* Restore the CONTROL register value for the task. */
-	"	mov lr, r4										\n" /* LR = r4. */
-	"	ldr r2, xSecureContextConst						\n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
-	"	str r0, [r2]									\n" /* Restore the task's xSecureContext. */
-	"	cbz r0, restore_ns_context						\n" /* If there is no secure context for the task, restore the non-secure context. */
-	"	push {r1,r4}									\n"
-	"	bl SecureContext_LoadContext					\n" /* Restore the secure context. */
-	"	pop {r1,r4}										\n"
-	"	mov lr, r4										\n" /* LR = r4. */
-	"	lsls r2, r4, #25								\n" /* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-	"	bpl restore_ns_context							\n" /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-	"	msr psp, r1										\n" /* Remember the new top of stack for the task. */
-	"	bx lr											\n"
-	#else /* configENABLE_MPU */
-	"	ldmia r1!, {r0, r2-r3}							\n" /* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */
-	"	msr psplim, r2									\n" /* Restore the PSPLIM register value for the task. */
-	"	mov lr, r3										\n" /* LR = r3. */
-	"	ldr r2, xSecureContextConst						\n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
-	"	str r0, [r2]									\n" /* Restore the task's xSecureContext. */
-	"	cbz r0, restore_ns_context						\n" /* If there is no secure context for the task, restore the non-secure context. */
-	"	push {r1,r3}									\n"
-	"	bl SecureContext_LoadContext					\n" /* Restore the secure context. */
-	"	pop {r1,r3}										\n"
-	"	mov lr, r3										\n" /* LR = r3. */
-	"	lsls r2, r3, #25								\n" /* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-	"	bpl restore_ns_context							\n" /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-	"	msr psp, r1										\n" /* Remember the new top of stack for the task. */
-	"	bx lr											\n"
-	#endif /* configENABLE_MPU */
-	"													\n"
-	" restore_ns_context:								\n"
-	"	adds r1, r1, #16								\n" /* Move to the high registers. */
-	"	ldmia r1!, {r4-r7}								\n" /* Restore the high registers that are not automatically restored. */
-	"	mov r8, r4										\n" /* r8 = r4. */
-	"	mov r9, r5										\n" /* r9 = r5. */
-	"	mov r10, r6										\n" /* r10 = r6. */
-	"	mov r11, r7										\n" /* r11 = r7. */
-	"	msr psp, r1										\n" /* Remember the new top of stack for the task. */
-	"	subs r1, r1, #32								\n" /* Go back to the low registers. */
-	"	ldmia r1!, {r4-r7}								\n" /* Restore the low registers that are not automatically restored. */
-	"	bx lr											\n"
-	"													\n"
-	"	.align 4										\n"
-	"pxCurrentTCBConst: .word pxCurrentTCB				\n"
-	"xSecureContextConst: .word xSecureContext			\n"
-	#if( configENABLE_MPU == 1 )
-	"xMPUCTRLConst: .word 0xe000ed94					\n"
-	"xMAIR0Const: .word 0xe000edc0						\n"
-	"xRNRConst: .word 0xe000ed98						\n"
-	"xRBARConst: .word 0xe000ed9c						\n"
-	#endif /* configENABLE_MPU */
-	);
+    __asm volatile
+    (
+        "	.syntax unified									\n"
+        "	.extern SecureContext_SaveContext				\n"
+        "	.extern SecureContext_LoadContext				\n"
+        "													\n"
+        "	mrs r1, psp										\n"/* Read PSP in r1. */
+        "	ldr r2, xSecureContextConst						\n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+        "	ldr r0, [r2]									\n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
+        "													\n"
+        "	cbz r0, save_ns_context							\n"/* No secure context to save. */
+        "	push {r0-r2, r14}								\n"
+        "	bl SecureContext_SaveContext					\n"
+        "	pop {r0-r3}										\n"/* LR is now in r3. */
+        "	mov lr, r3										\n"/* LR = r3. */
+        "	lsls r2, r3, #25								\n"/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+        "	bpl save_ns_context								\n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+        "	ldr r3, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr r2, [r3]									\n"/* Read pxCurrentTCB. */
+        #if ( configENABLE_MPU == 1 )
+            "	subs r1, r1, #16								\n"/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
+            "	str r1, [r2]									\n"/* Save the new top of stack in TCB. */
+            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
+            "	mrs r3, control									\n"/* r3 = CONTROL. */
+            "	mov r4, lr										\n"/* r4 = LR/EXC_RETURN. */
+            "	stmia r1!, {r0, r2-r4}							\n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
+        #else /* configENABLE_MPU */
+            "	subs r1, r1, #12								\n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */
+            "	str r1, [r2]									\n"/* Save the new top of stack in TCB. */
+            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
+            "	mov r3, lr										\n"/* r3 = LR/EXC_RETURN. */
+            "	stmia r1!, {r0, r2-r3}							\n"/* Store xSecureContext, PSPLIM and LR on the stack. */
+        #endif /* configENABLE_MPU */
+        "	b select_next_task								\n"
+        "													\n"
+        " save_ns_context:									\n"
+        "	ldr r3, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr r2, [r3]									\n"/* Read pxCurrentTCB. */
+        #if ( configENABLE_MPU == 1 )
+            "	subs r1, r1, #48								\n"/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
+            "	str r1, [r2]									\n"/* Save the new top of stack in TCB. */
+            "	adds r1, r1, #16								\n"/* r1 = r1 + 16. */
+            "	stmia r1!, {r4-r7}								\n"/* Store the low registers that are not saved automatically. */
+            "	mov r4, r8										\n"/* r4 = r8. */
+            "	mov r5, r9										\n"/* r5 = r9. */
+            "	mov r6, r10										\n"/* r6 = r10. */
+            "	mov r7, r11										\n"/* r7 = r11. */
+            "	stmia r1!, {r4-r7}								\n"/* Store the high registers that are not saved automatically. */
+            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
+            "	mrs r3, control									\n"/* r3 = CONTROL. */
+            "	mov r4, lr										\n"/* r4 = LR/EXC_RETURN. */
+            "	subs r1, r1, #48								\n"/* r1 = r1 - 48. */
+            "	stmia r1!, {r0, r2-r4}							\n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
+        #else /* configENABLE_MPU */
+            "	subs r1, r1, #44								\n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
+            "	str r1, [r2]									\n"/* Save the new top of stack in TCB. */
+            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
+            "	mov r3, lr										\n"/* r3 = LR/EXC_RETURN. */
+            "	stmia r1!, {r0, r2-r7}							\n"/* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */
+            "	mov r4, r8										\n"/* r4 = r8. */
+            "	mov r5, r9										\n"/* r5 = r9. */
+            "	mov r6, r10										\n"/* r6 = r10. */
+            "	mov r7, r11										\n"/* r7 = r11. */
+            "	stmia r1!, {r4-r7}								\n"/* Store the high registers that are not saved automatically. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        " select_next_task:									\n"
+        "	cpsid i											\n"
+        "	bl vTaskSwitchContext							\n"
+        "	cpsie i											\n"
+        "													\n"
+        "	ldr r2, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr r3, [r2]									\n"/* Read pxCurrentTCB. */
+        "	ldr r1, [r3]									\n"/* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	dmb												\n"/* Complete outstanding transfers before disabling MPU. */
+            "	ldr r2, xMPUCTRLConst							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	movs r5, #1										\n"/* r5 = 1. */
+            "	bics r4, r5										\n"/* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */
+            "	str r4, [r2]									\n"/* Disable MPU. */
+            "													\n"
+            "	adds r3, #4										\n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
+            "	ldr r4, [r3]									\n"/* r4 = *r3 i.e. r4 = MAIR0. */
+            "	ldr r2, xMAIR0Const								\n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "	str r4, [r2]									\n"/* Program MAIR0. */
+            "	ldr r2, xRNRConst								\n"/* r2 = 0xe000ed98 [Location of RNR]. */
+            "	adds r3, #4										\n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
+            "	movs r5, #4										\n"/* r5 = 4. */
+            "	str  r5, [r2]									\n"/* Program RNR = 4. */
+            "	ldmia r3!, {r6,r7}								\n"/* Read first set of RBAR/RLAR from TCB. */
+            "	ldr  r4, xRBARConst								\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r4!, {r6,r7}								\n"/* Write first set of RBAR/RLAR registers. */
+            "	movs r5, #5										\n"/* r5 = 5. */
+            "	str  r5, [r2]									\n"/* Program RNR = 5. */
+            "	ldmia r3!, {r6,r7}								\n"/* Read second set of RBAR/RLAR from TCB. */
+            "	ldr  r4, xRBARConst								\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r4!, {r6,r7}								\n"/* Write second set of RBAR/RLAR registers. */
+            "	movs r5, #6										\n"/* r5 = 6. */
+            "	str  r5, [r2]									\n"/* Program RNR = 6. */
+            "	ldmia r3!, {r6,r7}								\n"/* Read third set of RBAR/RLAR from TCB. */
+            "	ldr  r4, xRBARConst								\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r4!, {r6,r7}								\n"/* Write third set of RBAR/RLAR registers. */
+            "	movs r5, #7										\n"/* r5 = 7. */
+            "	str  r5, [r2]									\n"/* Program RNR = 7. */
+            "	ldmia r3!, {r6,r7}								\n"/* Read fourth set of RBAR/RLAR from TCB. */
+            "	ldr  r4, xRBARConst								\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r4!, {r6,r7}								\n"/* Write fourth set of RBAR/RLAR registers. */
+            "													\n"
+            "	ldr r2, xMPUCTRLConst							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	movs r5, #1										\n"/* r5 = 1. */
+            "	orrs r4, r5										\n"/* r4 = r4 | r5 i.e. Set the bit 0 in r4. */
+            "	str r4, [r2]									\n"/* Enable MPU. */
+            "	dsb												\n"/* Force memory writes before continuing. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	ldmia r1!, {r0, r2-r4}							\n"/* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */
+            "	msr psplim, r2									\n"/* Restore the PSPLIM register value for the task. */
+            "	msr control, r3									\n"/* Restore the CONTROL register value for the task. */
+            "	mov lr, r4										\n"/* LR = r4. */
+            "	ldr r2, xSecureContextConst						\n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            "	str r0, [r2]									\n"/* Restore the task's xSecureContext. */
+            "	cbz r0, restore_ns_context						\n"/* If there is no secure context for the task, restore the non-secure context. */
+            "	push {r1,r4}									\n"
+            "	bl SecureContext_LoadContext					\n"/* Restore the secure context. */
+            "	pop {r1,r4}										\n"
+            "	mov lr, r4										\n"/* LR = r4. */
+            "	lsls r2, r4, #25								\n"/* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+            "	bpl restore_ns_context							\n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+            "	msr psp, r1										\n"/* Remember the new top of stack for the task. */
+            "	bx lr											\n"
+        #else /* configENABLE_MPU */
+            "	ldmia r1!, {r0, r2-r3}							\n"/* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */
+            "	msr psplim, r2									\n"/* Restore the PSPLIM register value for the task. */
+            "	mov lr, r3										\n"/* LR = r3. */
+            "	ldr r2, xSecureContextConst						\n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            "	str r0, [r2]									\n"/* Restore the task's xSecureContext. */
+            "	cbz r0, restore_ns_context						\n"/* If there is no secure context for the task, restore the non-secure context. */
+            "	push {r1,r3}									\n"
+            "	bl SecureContext_LoadContext					\n"/* Restore the secure context. */
+            "	pop {r1,r3}										\n"
+            "	mov lr, r3										\n"/* LR = r3. */
+            "	lsls r2, r3, #25								\n"/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+            "	bpl restore_ns_context							\n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+            "	msr psp, r1										\n"/* Remember the new top of stack for the task. */
+            "	bx lr											\n"
+        #endif /* configENABLE_MPU */
+        "													\n"
+        " restore_ns_context:								\n"
+        "	adds r1, r1, #16								\n"/* Move to the high registers. */
+        "	ldmia r1!, {r4-r7}								\n"/* Restore the high registers that are not automatically restored. */
+        "	mov r8, r4										\n"/* r8 = r4. */
+        "	mov r9, r5										\n"/* r9 = r5. */
+        "	mov r10, r6										\n"/* r10 = r6. */
+        "	mov r11, r7										\n"/* r11 = r7. */
+        "	msr psp, r1										\n"/* Remember the new top of stack for the task. */
+        "	subs r1, r1, #32								\n"/* Go back to the low registers. */
+        "	ldmia r1!, {r4-r7}								\n"/* Restore the low registers that are not automatically restored. */
+        "	bx lr											\n"
+        "													\n"
+        "	.align 4										\n"
+        "pxCurrentTCBConst: .word pxCurrentTCB				\n"
+        "xSecureContextConst: .word xSecureContext			\n"
+        #if ( configENABLE_MPU == 1 )
+            "xMPUCTRLConst: .word 0xe000ed94					\n"
+            "xMAIR0Const: .word 0xe000edc0						\n"
+            "xRNRConst: .word 0xe000ed98						\n"
+            "xRBARConst: .word 0xe000ed9c						\n"
+        #endif /* configENABLE_MPU */
+    );
 }
 /*-----------------------------------------------------------*/
 
 void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	movs r0, #4										\n"
-	"	mov r1, lr										\n"
-	"	tst r0, r1										\n"
-	"	beq stacking_used_msp							\n"
-	"	mrs r0, psp										\n"
-	"	ldr r2, svchandler_address_const				\n"
-	"	bx r2											\n"
-	" stacking_used_msp:								\n"
-	"	mrs r0, msp										\n"
-	"	ldr r2, svchandler_address_const				\n"
-	"	bx r2											\n"
-	"													\n"
-	"	.align 4										\n"
-	"svchandler_address_const: .word vPortSVCHandler_C	\n"
-	);
+    __asm volatile
+    (
+        "	movs r0, #4										\n"
+        "	mov r1, lr										\n"
+        "	tst r0, r1										\n"
+        "	beq stacking_used_msp							\n"
+        "	mrs r0, psp										\n"
+        "	ldr r2, svchandler_address_const				\n"
+        "	bx r2											\n"
+        " stacking_used_msp:								\n"
+        "	mrs r0, msp										\n"
+        "	ldr r2, svchandler_address_const				\n"
+        "	bx r2											\n"
+        "													\n"
+        "	.align 4										\n"
+        "svchandler_address_const: .word vPortSVCHandler_C	\n"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attribute__ (( naked )) */
 {
-	__asm volatile
-	(
-	"	svc %0											\n" /* Secure context is allocated in the supervisor call. */
-	"	bx lr											\n" /* Return. */
-	:: "i" ( portSVC_ALLOCATE_SECURE_CONTEXT ) : "memory"
-	);
+    __asm volatile
+    (
+        "	svc %0											\n"/* Secure context is allocated in the supervisor call. */
+        "	bx lr											\n"/* Return. */
+        ::"i" ( portSVC_ALLOCATE_SECURE_CONTEXT ) : "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
-void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	ldr r1, [r0]									\n" /* The first item in the TCB is the top of the stack. */
-	"	ldr r0, [r1]									\n" /* The first item on the stack is the task's xSecureContext. */
-	"	cmp r0, #0										\n" /* Raise svc if task's xSecureContext is not NULL. */
-	"	beq free_secure_context							\n"
-	"	bx lr											\n" /* There is no secure context (xSecureContext is NULL). */
-	" free_secure_context:								\n"
-	"	svc %0											\n" /* Secure context is freed in the supervisor call. */
-	"	bx lr											\n" /* Return. */
-	:: "i" ( portSVC_FREE_SECURE_CONTEXT ) : "memory"
-	);
+    __asm volatile
+    (
+        "	ldr r1, [r0]									\n"/* The first item in the TCB is the top of the stack. */
+        "	ldr r0, [r1]									\n"/* The first item on the stack is the task's xSecureContext. */
+        "	cmp r0, #0										\n"/* Raise svc if task's xSecureContext is not NULL. */
+        "	beq free_secure_context							\n"
+        "	bx lr											\n"/* There is no secure context (xSecureContext is NULL). */
+        " free_secure_context:								\n"
+        "	svc %0											\n"/* Secure context is freed in the supervisor call. */
+        "	bx lr											\n"/* Return. */
+        ::"i" ( portSVC_FREE_SECURE_CONTEXT ) : "memory"
+    );
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h
index 2e8bba256..fc12cf1a3 100644
--- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h
+++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,18 +19,18 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*------------------------------------------------------------------------------
  * Port specific definitions.
@@ -42,109 +42,109 @@ extern "C" {
  *------------------------------------------------------------------------------
  */
 
-#ifndef configENABLE_FPU
-	#error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
-#endif /* configENABLE_FPU */
+    #ifndef configENABLE_FPU
+        #error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
+    #endif /* configENABLE_FPU */
 
-#ifndef configENABLE_MPU
-	#error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
-#endif /* configENABLE_MPU */
+    #ifndef configENABLE_MPU
+        #error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
+    #endif /* configENABLE_MPU */
 
-#ifndef configENABLE_TRUSTZONE
-	#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
-#endif /* configENABLE_TRUSTZONE */
+    #ifndef configENABLE_TRUSTZONE
+        #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
+    #endif /* configENABLE_TRUSTZONE */
 
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Type definitions.
  */
-#define portCHAR											char
-#define portFLOAT											float
-#define portDOUBLE											double
-#define portLONG											long
-#define portSHORT											short
-#define portSTACK_TYPE										uint32_t
-#define portBASE_TYPE										long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE										StackType_t;
-typedef long												BaseType_t;
-typedef unsigned long										UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	 * not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC							1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * Architecture specifics.
  */
-#define portARCH_NAME										"Cortex-M23"
-#define portSTACK_GROWTH									( -1 )
-#define portTICK_PERIOD_MS									( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT									8
-#define portNOP()
-#define portINLINE											__inline
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE								inline __attribute__(( always_inline ))
-#endif
-#define portHAS_STACK_OVERFLOW_CHECKING						1
-#define portDONT_DISCARD									__attribute__(( used ))
+    #define portARCH_NAME                      "Cortex-M23"
+    #define portSTACK_GROWTH                   ( -1 )
+    #define portTICK_PERIOD_MS                 ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT                 8
+    #define portNOP()
+    #define portINLINE                         __inline
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE               inline __attribute__( ( always_inline ) )
+    #endif
+    #define portHAS_STACK_OVERFLOW_CHECKING    1
+    #define portDONT_DISCARD                   __attribute__( ( used ) )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Extern declarations.
  */
-extern BaseType_t xPortIsInsideInterrupt( void );
+    extern BaseType_t xPortIsInsideInterrupt( void );
 
-extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
 
-extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
-extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
 
-extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
 
-#if( configENABLE_TRUSTZONE == 1 )
-	extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
-	extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
-#endif /* configENABLE_TRUSTZONE */
+    #if ( configENABLE_TRUSTZONE == 1 )
+        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
+        extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
+    #endif /* configENABLE_TRUSTZONE */
 
-#if( configENABLE_MPU == 1 )
-	extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
-	extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
+        extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief MPU specific constants.
  */
-#if( configENABLE_MPU == 1 )
-	#define portUSING_MPU_WRAPPERS							1
-	#define portPRIVILEGE_BIT								( 0x80000000UL )
-#else
-	#define portPRIVILEGE_BIT								( 0x0UL )
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        #define portUSING_MPU_WRAPPERS    1
+        #define portPRIVILEGE_BIT         ( 0x80000000UL )
+    #else
+        #define portPRIVILEGE_BIT         ( 0x0UL )
+    #endif /* configENABLE_MPU */
 
 
 /* MPU regions. */
-#define portPRIVILEGED_FLASH_REGION							( 0UL )
-#define portUNPRIVILEGED_FLASH_REGION						( 1UL )
-#define portUNPRIVILEGED_SYSCALLS_REGION					( 2UL )
-#define portPRIVILEGED_RAM_REGION							( 3UL )
-#define portSTACK_REGION									( 4UL )
-#define portFIRST_CONFIGURABLE_REGION						( 5UL )
-#define portLAST_CONFIGURABLE_REGION						( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS						( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS								( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
+    #define portPRIVILEGED_FLASH_REGION                   ( 0UL )
+    #define portUNPRIVILEGED_FLASH_REGION                 ( 1UL )
+    #define portUNPRIVILEGED_SYSCALLS_REGION              ( 2UL )
+    #define portPRIVILEGED_RAM_REGION                     ( 3UL )
+    #define portSTACK_REGION                              ( 4UL )
+    #define portFIRST_CONFIGURABLE_REGION                 ( 5UL )
+    #define portLAST_CONFIGURABLE_REGION                  ( 7UL )
+    #define portNUM_CONFIGURABLE_REGIONS                  ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
+    #define portTOTAL_NUM_REGIONS                         ( portNUM_CONFIGURABLE_REGIONS + 1 )   /* Plus one to make space for the stack region. */
 
 /* Device memory attributes used in MPU_MAIR registers.
  *
@@ -156,155 +156,157 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
  *				11 --> Device-GRE
  *  Bit[1:0] - 00, Reserved.
  */
-#define portMPU_DEVICE_MEMORY_nGnRnE						( 0x00 ) /* 0000 0000 */
-#define portMPU_DEVICE_MEMORY_nGnRE							( 0x04 ) /* 0000 0100 */
-#define portMPU_DEVICE_MEMORY_nGRE							( 0x08 ) /* 0000 1000 */
-#define portMPU_DEVICE_MEMORY_GRE							( 0x0C ) /* 0000 1100 */
+    #define portMPU_DEVICE_MEMORY_nGnRnE                  ( 0x00 )   /* 0000 0000 */
+    #define portMPU_DEVICE_MEMORY_nGnRE                   ( 0x04 )   /* 0000 0100 */
+    #define portMPU_DEVICE_MEMORY_nGRE                    ( 0x08 )   /* 0000 1000 */
+    #define portMPU_DEVICE_MEMORY_GRE                     ( 0x0C )   /* 0000 1100 */
 
 /* Normal memory attributes used in MPU_MAIR registers. */
-#define portMPU_NORMAL_MEMORY_NON_CACHEABLE					( 0x44 ) /* Non-cacheable. */
-#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE			( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
+    #define portMPU_NORMAL_MEMORY_NON_CACHEABLE           ( 0x44 )   /* Non-cacheable. */
+    #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE    ( 0xFF )   /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
 
 /* Attributes used in MPU_RBAR registers. */
-#define portMPU_REGION_NON_SHAREABLE						( 0UL << 3UL )
-#define portMPU_REGION_INNER_SHAREABLE						( 1UL << 3UL )
-#define portMPU_REGION_OUTER_SHAREABLE						( 2UL << 3UL )
+    #define portMPU_REGION_NON_SHAREABLE                  ( 0UL << 3UL )
+    #define portMPU_REGION_INNER_SHAREABLE                ( 1UL << 3UL )
+    #define portMPU_REGION_OUTER_SHAREABLE                ( 2UL << 3UL )
 
-#define portMPU_REGION_PRIVILEGED_READ_WRITE				( 0UL << 1UL )
-#define portMPU_REGION_READ_WRITE							( 1UL << 1UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY					( 2UL << 1UL )
-#define portMPU_REGION_READ_ONLY							( 3UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_WRITE          ( 0UL << 1UL )
+    #define portMPU_REGION_READ_WRITE                     ( 1UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_ONLY           ( 2UL << 1UL )
+    #define portMPU_REGION_READ_ONLY                      ( 3UL << 1UL )
 
-#define portMPU_REGION_EXECUTE_NEVER						( 1UL )
+    #define portMPU_REGION_EXECUTE_NEVER                  ( 1UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Settings to define an MPU region.
  */
-typedef struct MPURegionSettings
-{
-	uint32_t ulRBAR;	/**< RBAR for the region. */
-	uint32_t ulRLAR;	/**< RLAR for the region. */
-} MPURegionSettings_t;
+    typedef struct MPURegionSettings
+    {
+        uint32_t ulRBAR; /**< RBAR for the region. */
+        uint32_t ulRLAR; /**< RLAR for the region. */
+    } MPURegionSettings_t;
 
 /**
  * @brief MPU settings as stored in the TCB.
  */
-typedef struct MPU_SETTINGS
-{
-	uint32_t ulMAIR0;	/**< MAIR0 for the task containing attributes for all the 4 per task regions. */
-	MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
-} xMPU_SETTINGS;
+    typedef struct MPU_SETTINGS
+    {
+        uint32_t ulMAIR0;                                              /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
+        MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
+    } xMPU_SETTINGS;
 /*-----------------------------------------------------------*/
 
 /**
  * @brief SVC numbers.
  */
-#define portSVC_ALLOCATE_SECURE_CONTEXT						0
-#define portSVC_FREE_SECURE_CONTEXT							1
-#define portSVC_START_SCHEDULER								2
-#define portSVC_RAISE_PRIVILEGE								3
+    #define portSVC_ALLOCATE_SECURE_CONTEXT    0
+    #define portSVC_FREE_SECURE_CONTEXT        1
+    #define portSVC_START_SCHEDULER            2
+    #define portSVC_RAISE_PRIVILEGE            3
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Scheduler utilities.
  */
-#define portYIELD()											vPortYield()
-#define portNVIC_INT_CTRL_REG								( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT								( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired )			if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x )								portEND_SWITCHING_ISR( x )
+    #define portYIELD()                                 vPortYield()
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Critical section management.
  */
-#define portSET_INTERRUPT_MASK_FROM_ISR()					ulSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)				vClearInterruptMask( x )
-#define portDISABLE_INTERRUPTS()							__asm volatile ( " cpsid i " ::: "memory" )
-#define portENABLE_INTERRUPTS()								__asm volatile ( " cpsie i " ::: "memory" )
-#define portENTER_CRITICAL()								vPortEnterCritical()
-#define portEXIT_CRITICAL()									vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulSetInterruptMask()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vClearInterruptMask( x )
+    #define portDISABLE_INTERRUPTS()                  __asm volatile ( " cpsid i " ::: "memory" )
+    #define portENABLE_INTERRUPTS()                   __asm volatile ( " cpsie i " ::: "memory" )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Tickless idle/low power functionality.
  */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Task function macros as described on the FreeRTOS.org WEB site.
  */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters )		void vFunction( void *pvParameters )
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Allocate a secure context for the task.
-	 *
-	 * Tasks are not created with a secure context. Any task that is going to call
-	 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
-	 * secure context before it calls any secure function.
-	 *
-	 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
-	 */
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )	vPortAllocateSecureContext( ulSecureStackSize )
+    #if ( configENABLE_TRUSTZONE == 1 )
 
-	/**
-	 * @brief Called when a task is deleted to delete the task's secure context,
-	 * if it has one.
-	 *
-	 * @param[in] pxTCB The TCB of the task being deleted.
-	 */
-	#define portCLEAN_UP_TCB( pxTCB )							vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-#else
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-	#define portCLEAN_UP_TCB( pxTCB )
-#endif /* configENABLE_TRUSTZONE */
+/**
+ * @brief Allocate a secure context for the task.
+ *
+ * Tasks are not created with a secure context. Any task that is going to call
+ * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
+ * secure context before it calls any secure function.
+ *
+ * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
+ */
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )    vPortAllocateSecureContext( ulSecureStackSize )
+
+/**
+ * @brief Called when a task is deleted to delete the task's secure context,
+ * if it has one.
+ *
+ * @param[in] pxTCB The TCB of the task being deleted.
+ */
+        #define portCLEAN_UP_TCB( pxTCB )                           vPortFreeSecureContext( ( uint32_t * ) pxTCB )
+    #else
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
+        #define portCLEAN_UP_TCB( pxTCB )
+    #endif /* configENABLE_TRUSTZONE */
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Checks whether or not the processor is privileged.
-	 *
-	 * @return 1 if the processor is already privileged, 0 otherwise.
-	 */
-	#define portIS_PRIVILEGED()									xIsPrivileged()
+    #if ( configENABLE_MPU == 1 )
 
-	/**
-	 * @brief Raise an SVC request to raise privilege.
-	 *
-	 * The SVC handler checks that the SVC was raised from a system call and only
-	 * then it raises the privilege. If this is called from any other place,
-	 * the privilege is not raised.
-	 */
-	#define portRAISE_PRIVILEGE()								__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+/**
+ * @brief Checks whether or not the processor is privileged.
+ *
+ * @return 1 if the processor is already privileged, 0 otherwise.
+ */
+        #define portIS_PRIVILEGED()      xIsPrivileged()
 
-	/**
-	 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
-	 * register.
-	 */
-	#define portRESET_PRIVILEGE()								vResetPrivilege()
-#else
-	#define portIS_PRIVILEGED()
-	#define portRAISE_PRIVILEGE()
-	#define portRESET_PRIVILEGE()
-#endif /* configENABLE_MPU */
+/**
+ * @brief Raise an SVC request to raise privilege.
+ *
+ * The SVC handler checks that the SVC was raised from a system call and only
+ * then it raises the privilege. If this is called from any other place,
+ * the privilege is not raised.
+ */
+        #define portRAISE_PRIVILEGE()    __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+
+/**
+ * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
+ * register.
+ */
+        #define portRESET_PRIVILEGE()    vResetPrivilege()
+    #else
+        #define portIS_PRIVILEGED()
+        #define portRAISE_PRIVILEGE()
+        #define portRESET_PRIVILEGE()
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Barriers.
  */
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
+    #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
 /*-----------------------------------------------------------*/
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c
index a34ef5185..fe79a141d 100644
--- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c
+++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -39,328 +39,328 @@
  * header files. */
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
-#if( configENABLE_FPU == 1 )
-	#error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
+#if ( configENABLE_FPU == 1 )
+    #error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
 #endif
 
 void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	.syntax unified									\n"
-	"													\n"
-	"	ldr  r2, pxCurrentTCBConst2						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr  r1, [r2]									\n" /* Read pxCurrentTCB. */
-	"	ldr  r0, [r1]									\n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	dmb												\n" /* Complete outstanding transfers before disabling MPU. */
-	"	ldr r2, xMPUCTRLConst2							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r3, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	movs r4, #1										\n" /* r4 = 1. */
-	"	bics r3, r4										\n" /* r3 = r3 & ~r4 i.e. Clear the bit 0 in r3. */
-	"	str r3, [r2]									\n" /* Disable MPU. */
-	"													\n"
-	"	adds r1, #4										\n" /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
-	"	ldr  r4, [r1]									\n" /* r4 = *r1 i.e. r4 = MAIR0. */
-	"	ldr  r2, xMAIR0Const2							\n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-	"	str  r4, [r2]									\n" /* Program MAIR0. */
-	"	ldr  r2, xRNRConst2								\n" /* r2 = 0xe000ed98 [Location of RNR]. */
-	"	adds r1, #4										\n" /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
-	"	movs r4, #4										\n" /* r4 = 4. */
-	"	str  r4, [r2]									\n" /* Program RNR = 4. */
-	"	ldmia r1!, {r5,r6}								\n" /* Read first set of RBAR/RLAR from TCB. */
-	"	ldr  r3, xRBARConst2							\n" /* r3 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r3!, {r5,r6}								\n" /* Write first set of RBAR/RLAR registers. */
-	"	movs r4, #5										\n" /* r4 = 5. */
-	"	str  r4, [r2]									\n" /* Program RNR = 5. */
-	"	ldmia r1!, {r5,r6}								\n" /* Read second set of RBAR/RLAR from TCB. */
-	"	ldr  r3, xRBARConst2							\n" /* r3 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r3!, {r5,r6}								\n" /* Write second set of RBAR/RLAR registers. */
-	"	movs r4, #6										\n" /* r4 = 6. */
-	"	str  r4, [r2]									\n" /* Program RNR = 6. */
-	"	ldmia r1!, {r5,r6}								\n" /* Read third set of RBAR/RLAR from TCB. */
-	"	ldr  r3, xRBARConst2							\n" /* r3 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r3!, {r5,r6}								\n" /* Write third set of RBAR/RLAR registers. */
-	"	movs r4, #7										\n" /* r4 = 7. */
-	"	str  r4, [r2]									\n" /* Program RNR = 7. */
-	"	ldmia r1!, {r5,r6}								\n" /* Read fourth set of RBAR/RLAR from TCB. */
-	"	ldr  r3, xRBARConst2							\n" /* r3 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r3!, {r5,r6}								\n" /* Write fourth set of RBAR/RLAR registers. */
-	"													\n"
-	"	ldr r2, xMPUCTRLConst2							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r3, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	movs r4, #1										\n" /* r4 = 1. */
-	"	orrs r3, r4										\n" /* r3 = r3 | r4 i.e. Set the bit 0 in r3. */
-	"	str r3, [r2]									\n" /* Enable MPU. */
-	"	dsb												\n" /* Force memory writes before continuing. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	ldm  r0!, {r1-r3}								\n" /* Read from stack - r1 = PSPLIM, r2 = CONTROL and r3 = EXC_RETURN. */
-	"	msr  psplim, r1									\n" /* Set this task's PSPLIM value. */
-	"	msr  control, r2								\n" /* Set this task's CONTROL value. */
-	"	adds r0, #32									\n" /* Discard everything up to r0. */
-	"	msr  psp, r0									\n" /* This is now the new top of stack to use in the task. */
-	"	isb												\n"
-	"	bx   r3											\n" /* Finally, branch to EXC_RETURN. */
-	#else /* configENABLE_MPU */
-	"	ldm  r0!, {r1-r2}								\n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
-	"	msr  psplim, r1									\n" /* Set this task's PSPLIM value. */
-	"	movs r1, #2										\n" /* r1 = 2. */
-	"	msr  CONTROL, r1								\n" /* Switch to use PSP in the thread mode. */
-	"	adds r0, #32									\n" /* Discard everything up to r0. */
-	"	msr  psp, r0									\n" /* This is now the new top of stack to use in the task. */
-	"	isb												\n"
-	"	bx   r2											\n" /* Finally, branch to EXC_RETURN. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	"	.align 4										\n"
-	"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
-	#if( configENABLE_MPU == 1 )
-	"xMPUCTRLConst2: .word 0xe000ed94					\n"
-	"xMAIR0Const2: .word 0xe000edc0						\n"
-	"xRNRConst2: .word 0xe000ed98						\n"
-	"xRBARConst2: .word 0xe000ed9c						\n"
-	#endif /* configENABLE_MPU */
-	);
+    __asm volatile
+    (
+        "	.syntax unified									\n"
+        "													\n"
+        "	ldr  r2, pxCurrentTCBConst2						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr  r1, [r2]									\n"/* Read pxCurrentTCB. */
+        "	ldr  r0, [r1]									\n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	dmb												\n"/* Complete outstanding transfers before disabling MPU. */
+            "	ldr r2, xMPUCTRLConst2							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r3, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	movs r4, #1										\n"/* r4 = 1. */
+            "	bics r3, r4										\n"/* r3 = r3 & ~r4 i.e. Clear the bit 0 in r3. */
+            "	str r3, [r2]									\n"/* Disable MPU. */
+            "													\n"
+            "	adds r1, #4										\n"/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
+            "	ldr  r4, [r1]									\n"/* r4 = *r1 i.e. r4 = MAIR0. */
+            "	ldr  r2, xMAIR0Const2							\n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "	str  r4, [r2]									\n"/* Program MAIR0. */
+            "	ldr  r2, xRNRConst2								\n"/* r2 = 0xe000ed98 [Location of RNR]. */
+            "	adds r1, #4										\n"/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
+            "	movs r4, #4										\n"/* r4 = 4. */
+            "	str  r4, [r2]									\n"/* Program RNR = 4. */
+            "	ldmia r1!, {r5,r6}								\n"/* Read first set of RBAR/RLAR from TCB. */
+            "	ldr  r3, xRBARConst2							\n"/* r3 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r3!, {r5,r6}								\n"/* Write first set of RBAR/RLAR registers. */
+            "	movs r4, #5										\n"/* r4 = 5. */
+            "	str  r4, [r2]									\n"/* Program RNR = 5. */
+            "	ldmia r1!, {r5,r6}								\n"/* Read second set of RBAR/RLAR from TCB. */
+            "	ldr  r3, xRBARConst2							\n"/* r3 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r3!, {r5,r6}								\n"/* Write second set of RBAR/RLAR registers. */
+            "	movs r4, #6										\n"/* r4 = 6. */
+            "	str  r4, [r2]									\n"/* Program RNR = 6. */
+            "	ldmia r1!, {r5,r6}								\n"/* Read third set of RBAR/RLAR from TCB. */
+            "	ldr  r3, xRBARConst2							\n"/* r3 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r3!, {r5,r6}								\n"/* Write third set of RBAR/RLAR registers. */
+            "	movs r4, #7										\n"/* r4 = 7. */
+            "	str  r4, [r2]									\n"/* Program RNR = 7. */
+            "	ldmia r1!, {r5,r6}								\n"/* Read fourth set of RBAR/RLAR from TCB. */
+            "	ldr  r3, xRBARConst2							\n"/* r3 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r3!, {r5,r6}								\n"/* Write fourth set of RBAR/RLAR registers. */
+            "													\n"
+            "	ldr r2, xMPUCTRLConst2							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r3, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	movs r4, #1										\n"/* r4 = 1. */
+            "	orrs r3, r4										\n"/* r3 = r3 | r4 i.e. Set the bit 0 in r3. */
+            "	str r3, [r2]									\n"/* Enable MPU. */
+            "	dsb												\n"/* Force memory writes before continuing. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	ldm  r0!, {r1-r3}								\n"/* Read from stack - r1 = PSPLIM, r2 = CONTROL and r3 = EXC_RETURN. */
+            "	msr  psplim, r1									\n"/* Set this task's PSPLIM value. */
+            "	msr  control, r2								\n"/* Set this task's CONTROL value. */
+            "	adds r0, #32									\n"/* Discard everything up to r0. */
+            "	msr  psp, r0									\n"/* This is now the new top of stack to use in the task. */
+            "	isb												\n"
+            "	bx   r3											\n"/* Finally, branch to EXC_RETURN. */
+        #else /* configENABLE_MPU */
+            "	ldm  r0!, {r1-r2}								\n"/* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
+            "	msr  psplim, r1									\n"/* Set this task's PSPLIM value. */
+            "	movs r1, #2										\n"/* r1 = 2. */
+            "	msr  CONTROL, r1								\n"/* Switch to use PSP in the thread mode. */
+            "	adds r0, #32									\n"/* Discard everything up to r0. */
+            "	msr  psp, r0									\n"/* This is now the new top of stack to use in the task. */
+            "	isb												\n"
+            "	bx   r2											\n"/* Finally, branch to EXC_RETURN. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        "	.align 4										\n"
+        "pxCurrentTCBConst2: .word pxCurrentTCB				\n"
+        #if ( configENABLE_MPU == 1 )
+            "xMPUCTRLConst2: .word 0xe000ed94					\n"
+            "xMAIR0Const2: .word 0xe000edc0						\n"
+            "xRNRConst2: .word 0xe000ed98						\n"
+            "xRBARConst2: .word 0xe000ed9c						\n"
+        #endif /* configENABLE_MPU */
+    );
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
 {
-	__asm volatile
-	(
-	"	mrs r0, control									\n" /* r0 = CONTROL. */
-	"	movs r1, #1										\n" /* r1 = 1. */
-	"	tst r0, r1										\n" /* Perform r0 & r1 (bitwise AND) and update the conditions flag. */
-	"	beq running_privileged							\n" /* If the result of previous AND operation was 0, branch. */
-	"	movs r0, #0										\n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
-	"	bx lr											\n" /* Return. */
-	" running_privileged:								\n"
-	"	movs r0, #1										\n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
-	"	bx lr											\n" /* Return. */
-	"													\n"
-	"	.align 4										\n"
-	::: "r0", "r1", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, control									\n"/* r0 = CONTROL. */
+        "	movs r1, #1										\n"/* r1 = 1. */
+        "	tst r0, r1										\n"/* Perform r0 & r1 (bitwise AND) and update the conditions flag. */
+        "	beq running_privileged							\n"/* If the result of previous AND operation was 0, branch. */
+        "	movs r0, #0										\n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
+        "	bx lr											\n"/* Return. */
+        " running_privileged:								\n"
+        "	movs r0, #1										\n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
+        "	bx lr											\n"/* Return. */
+        "													\n"
+        "	.align 4										\n"
+        ::: "r0", "r1", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	 __asm volatile
-	(
-	"	mrs  r0, control								\n" /* Read the CONTROL register. */
-	"	movs r1, #1										\n" /* r1 = 1. */
-	"	bics r0, r1										\n" /* Clear the bit 0. */
-	"	msr  control, r0								\n" /* Write back the new CONTROL value. */
-	"	bx lr											\n" /* Return to the caller. */
-	::: "r0", "r1", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs  r0, control								\n"/* Read the CONTROL register. */
+        "	movs r1, #1										\n"/* r1 = 1. */
+        "	bics r0, r1										\n"/* Clear the bit 0. */
+        "	msr  control, r0								\n"/* Write back the new CONTROL value. */
+        "	bx lr											\n"/* Return to the caller. */
+        ::: "r0", "r1", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vResetPrivilege( void ) /* __attribute__ (( naked )) */
 {
-	__asm volatile
-	(
-	"	mrs r0, control									\n" /* r0 = CONTROL. */
-	"	movs r1, #1										\n" /* r1 = 1. */
-	"	orrs r0, r1										\n" /* r0 = r0 | r1. */
-	"	msr control, r0									\n" /* CONTROL = r0. */
-	"	bx lr											\n" /* Return to the caller. */
-	:::"r0", "r1", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, control									\n"/* r0 = CONTROL. */
+        "	movs r1, #1										\n"/* r1 = 1. */
+        "	orrs r0, r1										\n"/* r0 = r0 | r1. */
+        "	msr control, r0									\n"/* CONTROL = r0. */
+        "	bx lr											\n"/* Return to the caller. */
+        ::: "r0", "r1", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	ldr r0, xVTORConst								\n" /* Use the NVIC offset register to locate the stack. */
-	"	ldr r0, [r0]									\n" /* Read the VTOR register which gives the address of vector table. */
-	"	ldr r0, [r0]									\n" /* The first entry in vector table is stack pointer. */
-	"	msr msp, r0										\n" /* Set the MSP back to the start of the stack. */
-	"	cpsie i											\n" /* Globally enable interrupts. */
-	"	dsb												\n"
-	"	isb												\n"
-	"	svc %0											\n" /* System call to start the first task. */
-	"	nop												\n"
-	"													\n"
-	"   .align 4										\n"
-	"xVTORConst: .word 0xe000ed08						\n"
-	:: "i" ( portSVC_START_SCHEDULER ) : "memory"
-	);
+    __asm volatile
+    (
+        "	ldr r0, xVTORConst								\n"/* Use the NVIC offset register to locate the stack. */
+        "	ldr r0, [r0]									\n"/* Read the VTOR register which gives the address of vector table. */
+        "	ldr r0, [r0]									\n"/* The first entry in vector table is stack pointer. */
+        "	msr msp, r0										\n"/* Set the MSP back to the start of the stack. */
+        "	cpsie i											\n"/* Globally enable interrupts. */
+        "	dsb												\n"
+        "	isb												\n"
+        "	svc %0											\n"/* System call to start the first task. */
+        "	nop												\n"
+        "													\n"
+        "   .align 4										\n"
+        "xVTORConst: .word 0xe000ed08						\n"
+        ::"i" ( portSVC_START_SCHEDULER ) : "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	mrs r0, PRIMASK									\n"
-	"	cpsid i											\n"
-	"	bx lr											\n"
-	::: "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, PRIMASK									\n"
+        "	cpsid i											\n"
+        "	bx lr											\n"
+        ::: "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	msr PRIMASK, r0									\n"
-	"	bx lr											\n"
-	::: "memory"
-	);
+    __asm volatile
+    (
+        "	msr PRIMASK, r0									\n"
+        "	bx lr											\n"
+        ::: "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	.syntax unified									\n"
-	"													\n"
-	"	mrs r0, psp										\n" /* Read PSP in r0. */
-	"	ldr r2, pxCurrentTCBConst						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr r1, [r2]									\n" /* Read pxCurrentTCB. */
-	#if( configENABLE_MPU == 1 )
-	"	subs r0, r0, #44								\n" /* Make space for PSPLIM, CONTROL, LR and the remaining registers on the stack. */
-	"	str r0, [r1]									\n" /* Save the new top of stack in TCB. */
-	"	mrs r1, psplim									\n" /* r1 = PSPLIM. */
-	"	mrs r2, control									\n" /* r2 = CONTROL. */
-	"	mov r3, lr										\n" /* r3 = LR/EXC_RETURN. */
-	"	stmia r0!, {r1-r7}								\n" /* Store on the stack - PSPLIM, CONTROL, LR and low registers that are not automatically saved. */
-	"	mov r4, r8										\n" /* r4 = r8. */
-	"	mov r5, r9										\n" /* r5 = r9. */
-	"	mov r6, r10										\n" /* r6 = r10. */
-	"	mov r7, r11										\n" /* r7 = r11. */
-	"	stmia r0!, {r4-r7}								\n" /* Store the high registers that are not saved automatically. */
-	#else /* configENABLE_MPU */
-	"	subs r0, r0, #40								\n" /* Make space for PSPLIM, LR and the remaining registers on the stack. */
-	"	str r0, [r1]									\n" /* Save the new top of stack in TCB. */
-	"	mrs r2, psplim									\n" /* r2 = PSPLIM. */
-	"	mov r3, lr										\n" /* r3 = LR/EXC_RETURN. */
-	"	stmia r0!, {r2-r7}								\n" /* Store on the stack - PSPLIM, LR and low registers that are not automatically saved. */
-	"	mov r4, r8										\n" /* r4 = r8. */
-	"	mov r5, r9										\n" /* r5 = r9. */
-	"	mov r6, r10										\n" /* r6 = r10. */
-	"	mov r7, r11										\n" /* r7 = r11. */
-	"	stmia r0!, {r4-r7}								\n" /* Store the high registers that are not saved automatically. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	"	cpsid i											\n"
-	"	bl vTaskSwitchContext							\n"
-	"	cpsie i											\n"
-	"													\n"
-	"	ldr r2, pxCurrentTCBConst						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr r1, [r2]									\n" /* Read pxCurrentTCB. */
-	"	ldr r0, [r1]									\n" /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	dmb												\n" /* Complete outstanding transfers before disabling MPU. */
-	"	ldr r2, xMPUCTRLConst							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r3, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	movs r4, #1										\n" /* r4 = 1. */
-	"	bics r3, r4										\n" /* r3 = r3 & ~r4 i.e. Clear the bit 0 in r3. */
-	"	str r3, [r2]									\n" /* Disable MPU. */
-	"													\n"
-	"	adds r1, #4										\n" /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
-	"	ldr  r4, [r1]									\n" /* r4 = *r1 i.e. r4 = MAIR0. */
-	"	ldr  r2, xMAIR0Const							\n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-	"	str  r4, [r2]									\n" /* Program MAIR0. */
-	"	ldr  r2, xRNRConst								\n" /* r2 = 0xe000ed98 [Location of RNR]. */
-	"	adds r1, #4										\n" /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
-	"	movs r4, #4										\n" /* r4 = 4. */
-	"	str  r4, [r2]									\n" /* Program RNR = 4. */
-	"	ldmia r1!, {r5,r6}								\n" /* Read first set of RBAR/RLAR from TCB. */
-	"	ldr  r3, xRBARConst								\n" /* r3 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r3!, {r5,r6}								\n" /* Write first set of RBAR/RLAR registers. */
-	"	movs r4, #5										\n" /* r4 = 5. */
-	"	str  r4, [r2]									\n" /* Program RNR = 5. */
-	"	ldmia r1!, {r5,r6}								\n" /* Read second set of RBAR/RLAR from TCB. */
-	"	ldr  r3, xRBARConst								\n" /* r3 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r3!, {r5,r6}								\n" /* Write second set of RBAR/RLAR registers. */
-	"	movs r4, #6										\n" /* r4 = 6. */
-	"	str  r4, [r2]									\n" /* Program RNR = 6. */
-	"	ldmia r1!, {r5,r6}								\n" /* Read third set of RBAR/RLAR from TCB. */
-	"	ldr  r3, xRBARConst								\n" /* r3 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r3!, {r5,r6}								\n" /* Write third set of RBAR/RLAR registers. */
-	"	movs r4, #7										\n" /* r4 = 7. */
-	"	str  r4, [r2]									\n" /* Program RNR = 7. */
-	"	ldmia r1!, {r5,r6}								\n" /* Read fourth set of RBAR/RLAR from TCB. */
-	"	ldr  r3, xRBARConst								\n" /* r3 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r3!, {r5,r6}								\n" /* Write fourth set of RBAR/RLAR registers. */
-	"													\n"
-	"	ldr r2, xMPUCTRLConst							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r3, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	movs r4, #1										\n" /* r4 = 1. */
-	"	orrs r3, r4										\n" /* r3 = r3 | r4 i.e. Set the bit 0 in r3. */
-	"	str r3, [r2]									\n" /* Enable MPU. */
-	"	dsb												\n" /* Force memory writes before continuing. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	adds r0, r0, #28								\n" /* Move to the high registers. */
-	"	ldmia r0!, {r4-r7}								\n" /* Restore the high registers that are not automatically restored. */
-	"	mov r8, r4										\n" /* r8 = r4. */
-	"	mov r9, r5										\n" /* r9 = r5. */
-	"	mov r10, r6										\n" /* r10 = r6. */
-	"	mov r11, r7										\n" /* r11 = r7. */
-	"	msr psp, r0										\n" /* Remember the new top of stack for the task. */
-	"	subs r0, r0, #44								\n" /* Move to the starting of the saved context. */
-	"	ldmia r0!, {r1-r7}								\n" /* Read from stack - r1 = PSPLIM, r2 = CONTROL, r3 = LR and r4-r7 restored. */
-	"	msr psplim, r1									\n" /* Restore the PSPLIM register value for the task. */
-	"	msr control, r2									\n" /* Restore the CONTROL register value for the task. */
-	"	bx r3											\n"
-	#else /* configENABLE_MPU */
-	"	adds r0, r0, #24								\n" /* Move to the high registers. */
-	"	ldmia r0!, {r4-r7}								\n" /* Restore the high registers that are not automatically restored. */
-	"	mov r8, r4										\n" /* r8 = r4. */
-	"	mov r9, r5										\n" /* r9 = r5. */
-	"	mov r10, r6										\n" /* r10 = r6. */
-	"	mov r11, r7										\n" /* r11 = r7. */
-	"	msr psp, r0										\n" /* Remember the new top of stack for the task. */
-	"	subs r0, r0, #40								\n" /* Move to the starting of the saved context. */
-	"	ldmia r0!, {r2-r7}								\n" /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r7 restored. */
-	"	msr psplim, r2									\n" /* Restore the PSPLIM register value for the task. */
-	"	bx r3											\n"
-	#endif /* configENABLE_MPU */
-	"													\n"
-	"	.align 4										\n"
-	"pxCurrentTCBConst: .word pxCurrentTCB				\n"
-	#if( configENABLE_MPU == 1 )
-	"xMPUCTRLConst: .word 0xe000ed94					\n"
-	"xMAIR0Const: .word 0xe000edc0						\n"
-	"xRNRConst: .word 0xe000ed98						\n"
-	"xRBARConst: .word 0xe000ed9c						\n"
-	#endif /* configENABLE_MPU */
-	);
+    __asm volatile
+    (
+        "	.syntax unified									\n"
+        "													\n"
+        "	mrs r0, psp										\n"/* Read PSP in r0. */
+        "	ldr r2, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr r1, [r2]									\n"/* Read pxCurrentTCB. */
+        #if ( configENABLE_MPU == 1 )
+            "	subs r0, r0, #44								\n"/* Make space for PSPLIM, CONTROL, LR and the remaining registers on the stack. */
+            "	str r0, [r1]									\n"/* Save the new top of stack in TCB. */
+            "	mrs r1, psplim									\n"/* r1 = PSPLIM. */
+            "	mrs r2, control									\n"/* r2 = CONTROL. */
+            "	mov r3, lr										\n"/* r3 = LR/EXC_RETURN. */
+            "	stmia r0!, {r1-r7}								\n"/* Store on the stack - PSPLIM, CONTROL, LR and low registers that are not automatically saved. */
+            "	mov r4, r8										\n"/* r4 = r8. */
+            "	mov r5, r9										\n"/* r5 = r9. */
+            "	mov r6, r10										\n"/* r6 = r10. */
+            "	mov r7, r11										\n"/* r7 = r11. */
+            "	stmia r0!, {r4-r7}								\n"/* Store the high registers that are not saved automatically. */
+        #else /* configENABLE_MPU */
+            "	subs r0, r0, #40								\n"/* Make space for PSPLIM, LR and the remaining registers on the stack. */
+            "	str r0, [r1]									\n"/* Save the new top of stack in TCB. */
+            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
+            "	mov r3, lr										\n"/* r3 = LR/EXC_RETURN. */
+            "	stmia r0!, {r2-r7}								\n"/* Store on the stack - PSPLIM, LR and low registers that are not automatically saved. */
+            "	mov r4, r8										\n"/* r4 = r8. */
+            "	mov r5, r9										\n"/* r5 = r9. */
+            "	mov r6, r10										\n"/* r6 = r10. */
+            "	mov r7, r11										\n"/* r7 = r11. */
+            "	stmia r0!, {r4-r7}								\n"/* Store the high registers that are not saved automatically. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        "	cpsid i											\n"
+        "	bl vTaskSwitchContext							\n"
+        "	cpsie i											\n"
+        "													\n"
+        "	ldr r2, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr r1, [r2]									\n"/* Read pxCurrentTCB. */
+        "	ldr r0, [r1]									\n"/* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	dmb												\n"/* Complete outstanding transfers before disabling MPU. */
+            "	ldr r2, xMPUCTRLConst							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r3, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	movs r4, #1										\n"/* r4 = 1. */
+            "	bics r3, r4										\n"/* r3 = r3 & ~r4 i.e. Clear the bit 0 in r3. */
+            "	str r3, [r2]									\n"/* Disable MPU. */
+            "													\n"
+            "	adds r1, #4										\n"/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
+            "	ldr  r4, [r1]									\n"/* r4 = *r1 i.e. r4 = MAIR0. */
+            "	ldr  r2, xMAIR0Const							\n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "	str  r4, [r2]									\n"/* Program MAIR0. */
+            "	ldr  r2, xRNRConst								\n"/* r2 = 0xe000ed98 [Location of RNR]. */
+            "	adds r1, #4										\n"/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
+            "	movs r4, #4										\n"/* r4 = 4. */
+            "	str  r4, [r2]									\n"/* Program RNR = 4. */
+            "	ldmia r1!, {r5,r6}								\n"/* Read first set of RBAR/RLAR from TCB. */
+            "	ldr  r3, xRBARConst								\n"/* r3 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r3!, {r5,r6}								\n"/* Write first set of RBAR/RLAR registers. */
+            "	movs r4, #5										\n"/* r4 = 5. */
+            "	str  r4, [r2]									\n"/* Program RNR = 5. */
+            "	ldmia r1!, {r5,r6}								\n"/* Read second set of RBAR/RLAR from TCB. */
+            "	ldr  r3, xRBARConst								\n"/* r3 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r3!, {r5,r6}								\n"/* Write second set of RBAR/RLAR registers. */
+            "	movs r4, #6										\n"/* r4 = 6. */
+            "	str  r4, [r2]									\n"/* Program RNR = 6. */
+            "	ldmia r1!, {r5,r6}								\n"/* Read third set of RBAR/RLAR from TCB. */
+            "	ldr  r3, xRBARConst								\n"/* r3 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r3!, {r5,r6}								\n"/* Write third set of RBAR/RLAR registers. */
+            "	movs r4, #7										\n"/* r4 = 7. */
+            "	str  r4, [r2]									\n"/* Program RNR = 7. */
+            "	ldmia r1!, {r5,r6}								\n"/* Read fourth set of RBAR/RLAR from TCB. */
+            "	ldr  r3, xRBARConst								\n"/* r3 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r3!, {r5,r6}								\n"/* Write fourth set of RBAR/RLAR registers. */
+            "													\n"
+            "	ldr r2, xMPUCTRLConst							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r3, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	movs r4, #1										\n"/* r4 = 1. */
+            "	orrs r3, r4										\n"/* r3 = r3 | r4 i.e. Set the bit 0 in r3. */
+            "	str r3, [r2]									\n"/* Enable MPU. */
+            "	dsb												\n"/* Force memory writes before continuing. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	adds r0, r0, #28								\n"/* Move to the high registers. */
+            "	ldmia r0!, {r4-r7}								\n"/* Restore the high registers that are not automatically restored. */
+            "	mov r8, r4										\n"/* r8 = r4. */
+            "	mov r9, r5										\n"/* r9 = r5. */
+            "	mov r10, r6										\n"/* r10 = r6. */
+            "	mov r11, r7										\n"/* r11 = r7. */
+            "	msr psp, r0										\n"/* Remember the new top of stack for the task. */
+            "	subs r0, r0, #44								\n"/* Move to the starting of the saved context. */
+            "	ldmia r0!, {r1-r7}								\n"/* Read from stack - r1 = PSPLIM, r2 = CONTROL, r3 = LR and r4-r7 restored. */
+            "	msr psplim, r1									\n"/* Restore the PSPLIM register value for the task. */
+            "	msr control, r2									\n"/* Restore the CONTROL register value for the task. */
+            "	bx r3											\n"
+        #else /* configENABLE_MPU */
+            "	adds r0, r0, #24								\n"/* Move to the high registers. */
+            "	ldmia r0!, {r4-r7}								\n"/* Restore the high registers that are not automatically restored. */
+            "	mov r8, r4										\n"/* r8 = r4. */
+            "	mov r9, r5										\n"/* r9 = r5. */
+            "	mov r10, r6										\n"/* r10 = r6. */
+            "	mov r11, r7										\n"/* r11 = r7. */
+            "	msr psp, r0										\n"/* Remember the new top of stack for the task. */
+            "	subs r0, r0, #40								\n"/* Move to the starting of the saved context. */
+            "	ldmia r0!, {r2-r7}								\n"/* Read from stack - r2 = PSPLIM, r3 = LR and r4-r7 restored. */
+            "	msr psplim, r2									\n"/* Restore the PSPLIM register value for the task. */
+            "	bx r3											\n"
+        #endif /* configENABLE_MPU */
+        "													\n"
+        "	.align 4										\n"
+        "pxCurrentTCBConst: .word pxCurrentTCB				\n"
+        #if ( configENABLE_MPU == 1 )
+            "xMPUCTRLConst: .word 0xe000ed94					\n"
+            "xMAIR0Const: .word 0xe000edc0						\n"
+            "xRNRConst: .word 0xe000ed98						\n"
+            "xRBARConst: .word 0xe000ed9c						\n"
+        #endif /* configENABLE_MPU */
+    );
 }
 /*-----------------------------------------------------------*/
 
 void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	movs r0, #4										\n"
-	"	mov r1, lr										\n"
-	"	tst r0, r1										\n"
-	"	beq stacking_used_msp							\n"
-	"	mrs r0, psp										\n"
-	"	ldr r2, svchandler_address_const				\n"
-	"	bx r2											\n"
-	" stacking_used_msp:								\n"
-	"	mrs r0, msp										\n"
-	"	ldr r2, svchandler_address_const				\n"
-	"	bx r2											\n"
-	"													\n"
-	"	.align 4										\n"
-	"svchandler_address_const: .word vPortSVCHandler_C	\n"
-	);
+    __asm volatile
+    (
+        "	movs r0, #4										\n"
+        "	mov r1, lr										\n"
+        "	tst r0, r1										\n"
+        "	beq stacking_used_msp							\n"
+        "	mrs r0, psp										\n"
+        "	ldr r2, svchandler_address_const				\n"
+        "	bx r2											\n"
+        " stacking_used_msp:								\n"
+        "	mrs r0, msp										\n"
+        "	ldr r2, svchandler_address_const				\n"
+        "	bx r2											\n"
+        "													\n"
+        "	.align 4										\n"
+        "svchandler_address_const: .word vPortSVCHandler_C	\n"
+    );
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h
index 2e8bba256..fc12cf1a3 100644
--- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h
+++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,18 +19,18 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*------------------------------------------------------------------------------
  * Port specific definitions.
@@ -42,109 +42,109 @@ extern "C" {
  *------------------------------------------------------------------------------
  */
 
-#ifndef configENABLE_FPU
-	#error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
-#endif /* configENABLE_FPU */
+    #ifndef configENABLE_FPU
+        #error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
+    #endif /* configENABLE_FPU */
 
-#ifndef configENABLE_MPU
-	#error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
-#endif /* configENABLE_MPU */
+    #ifndef configENABLE_MPU
+        #error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
+    #endif /* configENABLE_MPU */
 
-#ifndef configENABLE_TRUSTZONE
-	#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
-#endif /* configENABLE_TRUSTZONE */
+    #ifndef configENABLE_TRUSTZONE
+        #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
+    #endif /* configENABLE_TRUSTZONE */
 
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Type definitions.
  */
-#define portCHAR											char
-#define portFLOAT											float
-#define portDOUBLE											double
-#define portLONG											long
-#define portSHORT											short
-#define portSTACK_TYPE										uint32_t
-#define portBASE_TYPE										long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE										StackType_t;
-typedef long												BaseType_t;
-typedef unsigned long										UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	 * not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC							1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * Architecture specifics.
  */
-#define portARCH_NAME										"Cortex-M23"
-#define portSTACK_GROWTH									( -1 )
-#define portTICK_PERIOD_MS									( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT									8
-#define portNOP()
-#define portINLINE											__inline
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE								inline __attribute__(( always_inline ))
-#endif
-#define portHAS_STACK_OVERFLOW_CHECKING						1
-#define portDONT_DISCARD									__attribute__(( used ))
+    #define portARCH_NAME                      "Cortex-M23"
+    #define portSTACK_GROWTH                   ( -1 )
+    #define portTICK_PERIOD_MS                 ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT                 8
+    #define portNOP()
+    #define portINLINE                         __inline
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE               inline __attribute__( ( always_inline ) )
+    #endif
+    #define portHAS_STACK_OVERFLOW_CHECKING    1
+    #define portDONT_DISCARD                   __attribute__( ( used ) )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Extern declarations.
  */
-extern BaseType_t xPortIsInsideInterrupt( void );
+    extern BaseType_t xPortIsInsideInterrupt( void );
 
-extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
 
-extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
-extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
 
-extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
 
-#if( configENABLE_TRUSTZONE == 1 )
-	extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
-	extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
-#endif /* configENABLE_TRUSTZONE */
+    #if ( configENABLE_TRUSTZONE == 1 )
+        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
+        extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
+    #endif /* configENABLE_TRUSTZONE */
 
-#if( configENABLE_MPU == 1 )
-	extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
-	extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
+        extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief MPU specific constants.
  */
-#if( configENABLE_MPU == 1 )
-	#define portUSING_MPU_WRAPPERS							1
-	#define portPRIVILEGE_BIT								( 0x80000000UL )
-#else
-	#define portPRIVILEGE_BIT								( 0x0UL )
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        #define portUSING_MPU_WRAPPERS    1
+        #define portPRIVILEGE_BIT         ( 0x80000000UL )
+    #else
+        #define portPRIVILEGE_BIT         ( 0x0UL )
+    #endif /* configENABLE_MPU */
 
 
 /* MPU regions. */
-#define portPRIVILEGED_FLASH_REGION							( 0UL )
-#define portUNPRIVILEGED_FLASH_REGION						( 1UL )
-#define portUNPRIVILEGED_SYSCALLS_REGION					( 2UL )
-#define portPRIVILEGED_RAM_REGION							( 3UL )
-#define portSTACK_REGION									( 4UL )
-#define portFIRST_CONFIGURABLE_REGION						( 5UL )
-#define portLAST_CONFIGURABLE_REGION						( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS						( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS								( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
+    #define portPRIVILEGED_FLASH_REGION                   ( 0UL )
+    #define portUNPRIVILEGED_FLASH_REGION                 ( 1UL )
+    #define portUNPRIVILEGED_SYSCALLS_REGION              ( 2UL )
+    #define portPRIVILEGED_RAM_REGION                     ( 3UL )
+    #define portSTACK_REGION                              ( 4UL )
+    #define portFIRST_CONFIGURABLE_REGION                 ( 5UL )
+    #define portLAST_CONFIGURABLE_REGION                  ( 7UL )
+    #define portNUM_CONFIGURABLE_REGIONS                  ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
+    #define portTOTAL_NUM_REGIONS                         ( portNUM_CONFIGURABLE_REGIONS + 1 )   /* Plus one to make space for the stack region. */
 
 /* Device memory attributes used in MPU_MAIR registers.
  *
@@ -156,155 +156,157 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
  *				11 --> Device-GRE
  *  Bit[1:0] - 00, Reserved.
  */
-#define portMPU_DEVICE_MEMORY_nGnRnE						( 0x00 ) /* 0000 0000 */
-#define portMPU_DEVICE_MEMORY_nGnRE							( 0x04 ) /* 0000 0100 */
-#define portMPU_DEVICE_MEMORY_nGRE							( 0x08 ) /* 0000 1000 */
-#define portMPU_DEVICE_MEMORY_GRE							( 0x0C ) /* 0000 1100 */
+    #define portMPU_DEVICE_MEMORY_nGnRnE                  ( 0x00 )   /* 0000 0000 */
+    #define portMPU_DEVICE_MEMORY_nGnRE                   ( 0x04 )   /* 0000 0100 */
+    #define portMPU_DEVICE_MEMORY_nGRE                    ( 0x08 )   /* 0000 1000 */
+    #define portMPU_DEVICE_MEMORY_GRE                     ( 0x0C )   /* 0000 1100 */
 
 /* Normal memory attributes used in MPU_MAIR registers. */
-#define portMPU_NORMAL_MEMORY_NON_CACHEABLE					( 0x44 ) /* Non-cacheable. */
-#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE			( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
+    #define portMPU_NORMAL_MEMORY_NON_CACHEABLE           ( 0x44 )   /* Non-cacheable. */
+    #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE    ( 0xFF )   /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
 
 /* Attributes used in MPU_RBAR registers. */
-#define portMPU_REGION_NON_SHAREABLE						( 0UL << 3UL )
-#define portMPU_REGION_INNER_SHAREABLE						( 1UL << 3UL )
-#define portMPU_REGION_OUTER_SHAREABLE						( 2UL << 3UL )
+    #define portMPU_REGION_NON_SHAREABLE                  ( 0UL << 3UL )
+    #define portMPU_REGION_INNER_SHAREABLE                ( 1UL << 3UL )
+    #define portMPU_REGION_OUTER_SHAREABLE                ( 2UL << 3UL )
 
-#define portMPU_REGION_PRIVILEGED_READ_WRITE				( 0UL << 1UL )
-#define portMPU_REGION_READ_WRITE							( 1UL << 1UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY					( 2UL << 1UL )
-#define portMPU_REGION_READ_ONLY							( 3UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_WRITE          ( 0UL << 1UL )
+    #define portMPU_REGION_READ_WRITE                     ( 1UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_ONLY           ( 2UL << 1UL )
+    #define portMPU_REGION_READ_ONLY                      ( 3UL << 1UL )
 
-#define portMPU_REGION_EXECUTE_NEVER						( 1UL )
+    #define portMPU_REGION_EXECUTE_NEVER                  ( 1UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Settings to define an MPU region.
  */
-typedef struct MPURegionSettings
-{
-	uint32_t ulRBAR;	/**< RBAR for the region. */
-	uint32_t ulRLAR;	/**< RLAR for the region. */
-} MPURegionSettings_t;
+    typedef struct MPURegionSettings
+    {
+        uint32_t ulRBAR; /**< RBAR for the region. */
+        uint32_t ulRLAR; /**< RLAR for the region. */
+    } MPURegionSettings_t;
 
 /**
  * @brief MPU settings as stored in the TCB.
  */
-typedef struct MPU_SETTINGS
-{
-	uint32_t ulMAIR0;	/**< MAIR0 for the task containing attributes for all the 4 per task regions. */
-	MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
-} xMPU_SETTINGS;
+    typedef struct MPU_SETTINGS
+    {
+        uint32_t ulMAIR0;                                              /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
+        MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
+    } xMPU_SETTINGS;
 /*-----------------------------------------------------------*/
 
 /**
  * @brief SVC numbers.
  */
-#define portSVC_ALLOCATE_SECURE_CONTEXT						0
-#define portSVC_FREE_SECURE_CONTEXT							1
-#define portSVC_START_SCHEDULER								2
-#define portSVC_RAISE_PRIVILEGE								3
+    #define portSVC_ALLOCATE_SECURE_CONTEXT    0
+    #define portSVC_FREE_SECURE_CONTEXT        1
+    #define portSVC_START_SCHEDULER            2
+    #define portSVC_RAISE_PRIVILEGE            3
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Scheduler utilities.
  */
-#define portYIELD()											vPortYield()
-#define portNVIC_INT_CTRL_REG								( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT								( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired )			if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x )								portEND_SWITCHING_ISR( x )
+    #define portYIELD()                                 vPortYield()
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Critical section management.
  */
-#define portSET_INTERRUPT_MASK_FROM_ISR()					ulSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)				vClearInterruptMask( x )
-#define portDISABLE_INTERRUPTS()							__asm volatile ( " cpsid i " ::: "memory" )
-#define portENABLE_INTERRUPTS()								__asm volatile ( " cpsie i " ::: "memory" )
-#define portENTER_CRITICAL()								vPortEnterCritical()
-#define portEXIT_CRITICAL()									vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulSetInterruptMask()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vClearInterruptMask( x )
+    #define portDISABLE_INTERRUPTS()                  __asm volatile ( " cpsid i " ::: "memory" )
+    #define portENABLE_INTERRUPTS()                   __asm volatile ( " cpsie i " ::: "memory" )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Tickless idle/low power functionality.
  */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Task function macros as described on the FreeRTOS.org WEB site.
  */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters )		void vFunction( void *pvParameters )
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Allocate a secure context for the task.
-	 *
-	 * Tasks are not created with a secure context. Any task that is going to call
-	 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
-	 * secure context before it calls any secure function.
-	 *
-	 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
-	 */
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )	vPortAllocateSecureContext( ulSecureStackSize )
+    #if ( configENABLE_TRUSTZONE == 1 )
 
-	/**
-	 * @brief Called when a task is deleted to delete the task's secure context,
-	 * if it has one.
-	 *
-	 * @param[in] pxTCB The TCB of the task being deleted.
-	 */
-	#define portCLEAN_UP_TCB( pxTCB )							vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-#else
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-	#define portCLEAN_UP_TCB( pxTCB )
-#endif /* configENABLE_TRUSTZONE */
+/**
+ * @brief Allocate a secure context for the task.
+ *
+ * Tasks are not created with a secure context. Any task that is going to call
+ * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
+ * secure context before it calls any secure function.
+ *
+ * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
+ */
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )    vPortAllocateSecureContext( ulSecureStackSize )
+
+/**
+ * @brief Called when a task is deleted to delete the task's secure context,
+ * if it has one.
+ *
+ * @param[in] pxTCB The TCB of the task being deleted.
+ */
+        #define portCLEAN_UP_TCB( pxTCB )                           vPortFreeSecureContext( ( uint32_t * ) pxTCB )
+    #else
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
+        #define portCLEAN_UP_TCB( pxTCB )
+    #endif /* configENABLE_TRUSTZONE */
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Checks whether or not the processor is privileged.
-	 *
-	 * @return 1 if the processor is already privileged, 0 otherwise.
-	 */
-	#define portIS_PRIVILEGED()									xIsPrivileged()
+    #if ( configENABLE_MPU == 1 )
 
-	/**
-	 * @brief Raise an SVC request to raise privilege.
-	 *
-	 * The SVC handler checks that the SVC was raised from a system call and only
-	 * then it raises the privilege. If this is called from any other place,
-	 * the privilege is not raised.
-	 */
-	#define portRAISE_PRIVILEGE()								__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+/**
+ * @brief Checks whether or not the processor is privileged.
+ *
+ * @return 1 if the processor is already privileged, 0 otherwise.
+ */
+        #define portIS_PRIVILEGED()      xIsPrivileged()
 
-	/**
-	 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
-	 * register.
-	 */
-	#define portRESET_PRIVILEGE()								vResetPrivilege()
-#else
-	#define portIS_PRIVILEGED()
-	#define portRAISE_PRIVILEGE()
-	#define portRESET_PRIVILEGE()
-#endif /* configENABLE_MPU */
+/**
+ * @brief Raise an SVC request to raise privilege.
+ *
+ * The SVC handler checks that the SVC was raised from a system call and only
+ * then it raises the privilege. If this is called from any other place,
+ * the privilege is not raised.
+ */
+        #define portRAISE_PRIVILEGE()    __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+
+/**
+ * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
+ * register.
+ */
+        #define portRESET_PRIVILEGE()    vResetPrivilege()
+    #else
+        #define portIS_PRIVILEGED()
+        #define portRAISE_PRIVILEGE()
+        #define portRESET_PRIVILEGE()
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Barriers.
  */
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
+    #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
 /*-----------------------------------------------------------*/
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c
index 443dc184e..dcb7d8554 100644
--- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c
+++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -41,370 +41,370 @@
 
 void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	.syntax unified									\n"
-	"													\n"
-	"	ldr  r2, pxCurrentTCBConst2						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr  r3, [r2]									\n" /* Read pxCurrentTCB. */
-	"	ldr  r0, [r3]									\n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	dmb												\n" /* Complete outstanding transfers before disabling MPU. */
-	"	ldr r2, xMPUCTRLConst2							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	bic r4, #1										\n" /* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Disable MPU. */
-	"													\n"
-	"	adds r3, #4										\n" /* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
-	"	ldr  r4, [r3]									\n" /* r4 = *r3 i.e. r4 = MAIR0. */
-	"	ldr  r2, xMAIR0Const2							\n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-	"	str  r4, [r2]									\n" /* Program MAIR0. */
-	"	ldr  r2, xRNRConst2								\n" /* r2 = 0xe000ed98 [Location of RNR]. */
-	"	movs r4, #4										\n" /* r4 = 4. */
-	"	str  r4, [r2]									\n" /* Program RNR = 4. */
-	"	adds r3, #4										\n" /* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
-	"	ldr  r2, xRBARConst2							\n" /* r2 = 0xe000ed9c [Location of RBAR]. */
-	"	ldmia r3!, {r4-r11}								\n" /* Read 4 set of RBAR/RLAR registers from TCB. */
-	"	stmia r2!, {r4-r11}								\n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-	"													\n"
-	"	ldr r2, xMPUCTRLConst2							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	orr r4, #1										\n" /* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Enable MPU. */
-	"	dsb												\n" /* Force memory writes before continuing. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	ldm  r0!, {r1-r4}								\n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */
-	"	ldr  r5, xSecureContextConst2					\n"
-	"	str  r1, [r5]									\n" /* Set xSecureContext to this task's value for the same. */
-	"	msr  psplim, r2									\n" /* Set this task's PSPLIM value. */
-	"	msr  control, r3								\n" /* Set this task's CONTROL value. */
-	"	adds r0, #32									\n" /* Discard everything up to r0. */
-	"	msr  psp, r0									\n" /* This is now the new top of stack to use in the task. */
-	"	isb												\n"
-	"	bx   r4											\n" /* Finally, branch to EXC_RETURN. */
-	#else /* configENABLE_MPU */
-	"	ldm  r0!, {r1-r3}								\n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
-	"	ldr  r4, xSecureContextConst2					\n"
-	"	str  r1, [r4]									\n" /* Set xSecureContext to this task's value for the same. */
-	"	msr  psplim, r2									\n" /* Set this task's PSPLIM value. */
-	"	movs r1, #2										\n" /* r1 = 2. */
-	"	msr  CONTROL, r1								\n" /* Switch to use PSP in the thread mode. */
-	"	adds r0, #32									\n" /* Discard everything up to r0. */
-	"	msr  psp, r0									\n" /* This is now the new top of stack to use in the task. */
-	"	isb												\n"
-	"	bx   r3											\n" /* Finally, branch to EXC_RETURN. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	"	.align 4										\n"
-	"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
-	"xSecureContextConst2: .word xSecureContext			\n"
-	#if( configENABLE_MPU == 1 )
-	"xMPUCTRLConst2: .word 0xe000ed94					\n"
-	"xMAIR0Const2: .word 0xe000edc0						\n"
-	"xRNRConst2: .word 0xe000ed98						\n"
-	"xRBARConst2: .word 0xe000ed9c						\n"
-	#endif /* configENABLE_MPU */
-	);
+    __asm volatile
+    (
+        "	.syntax unified									\n"
+        "													\n"
+        "	ldr  r2, pxCurrentTCBConst2						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr  r3, [r2]									\n"/* Read pxCurrentTCB. */
+        "	ldr  r0, [r3]									\n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	dmb												\n"/* Complete outstanding transfers before disabling MPU. */
+            "	ldr r2, xMPUCTRLConst2							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	bic r4, #1										\n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
+            "	str r4, [r2]									\n"/* Disable MPU. */
+            "													\n"
+            "	adds r3, #4										\n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
+            "	ldr  r4, [r3]									\n"/* r4 = *r3 i.e. r4 = MAIR0. */
+            "	ldr  r2, xMAIR0Const2							\n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "	str  r4, [r2]									\n"/* Program MAIR0. */
+            "	ldr  r2, xRNRConst2								\n"/* r2 = 0xe000ed98 [Location of RNR]. */
+            "	movs r4, #4										\n"/* r4 = 4. */
+            "	str  r4, [r2]									\n"/* Program RNR = 4. */
+            "	adds r3, #4										\n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
+            "	ldr  r2, xRBARConst2							\n"/* r2 = 0xe000ed9c [Location of RBAR]. */
+            "	ldmia r3!, {r4-r11}								\n"/* Read 4 set of RBAR/RLAR registers from TCB. */
+            "	stmia r2!, {r4-r11}								\n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "													\n"
+            "	ldr r2, xMPUCTRLConst2							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	orr r4, #1										\n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
+            "	str r4, [r2]									\n"/* Enable MPU. */
+            "	dsb												\n"/* Force memory writes before continuing. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	ldm  r0!, {r1-r4}								\n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */
+            "	ldr  r5, xSecureContextConst2					\n"
+            "	str  r1, [r5]									\n"/* Set xSecureContext to this task's value for the same. */
+            "	msr  psplim, r2									\n"/* Set this task's PSPLIM value. */
+            "	msr  control, r3								\n"/* Set this task's CONTROL value. */
+            "	adds r0, #32									\n"/* Discard everything up to r0. */
+            "	msr  psp, r0									\n"/* This is now the new top of stack to use in the task. */
+            "	isb												\n"
+            "	bx   r4											\n"/* Finally, branch to EXC_RETURN. */
+        #else /* configENABLE_MPU */
+            "	ldm  r0!, {r1-r3}								\n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
+            "	ldr  r4, xSecureContextConst2					\n"
+            "	str  r1, [r4]									\n"/* Set xSecureContext to this task's value for the same. */
+            "	msr  psplim, r2									\n"/* Set this task's PSPLIM value. */
+            "	movs r1, #2										\n"/* r1 = 2. */
+            "	msr  CONTROL, r1								\n"/* Switch to use PSP in the thread mode. */
+            "	adds r0, #32									\n"/* Discard everything up to r0. */
+            "	msr  psp, r0									\n"/* This is now the new top of stack to use in the task. */
+            "	isb												\n"
+            "	bx   r3											\n"/* Finally, branch to EXC_RETURN. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        "	.align 4										\n"
+        "pxCurrentTCBConst2: .word pxCurrentTCB				\n"
+        "xSecureContextConst2: .word xSecureContext			\n"
+        #if ( configENABLE_MPU == 1 )
+            "xMPUCTRLConst2: .word 0xe000ed94					\n"
+            "xMAIR0Const2: .word 0xe000edc0						\n"
+            "xRNRConst2: .word 0xe000ed98						\n"
+            "xRBARConst2: .word 0xe000ed9c						\n"
+        #endif /* configENABLE_MPU */
+    );
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
 {
-	__asm volatile
-	(
-	"	mrs r0, control									\n" /* r0 = CONTROL. */
-	"	tst r0, #1										\n" /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
-	"	ite ne											\n"
-	"	movne r0, #0									\n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
-	"	moveq r0, #1									\n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
-	"	bx lr											\n" /* Return. */
-	"													\n"
-	"	.align 4										\n"
-	::: "r0", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, control									\n"/* r0 = CONTROL. */
+        "	tst r0, #1										\n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
+        "	ite ne											\n"
+        "	movne r0, #0									\n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
+        "	moveq r0, #1									\n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
+        "	bx lr											\n"/* Return. */
+        "													\n"
+        "	.align 4										\n"
+        ::: "r0", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	 __asm volatile
-	(
-	"	mrs r0, control									\n" /* Read the CONTROL register. */
-	"	bic r0, #1										\n" /* Clear the bit 0. */
-	"	msr control, r0									\n" /* Write back the new CONTROL value. */
-	"	bx lr											\n" /* Return to the caller. */
-	::: "r0", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, control									\n"/* Read the CONTROL register. */
+        "	bic r0, #1										\n"/* Clear the bit 0. */
+        "	msr control, r0									\n"/* Write back the new CONTROL value. */
+        "	bx lr											\n"/* Return to the caller. */
+        ::: "r0", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vResetPrivilege( void ) /* __attribute__ (( naked )) */
 {
-	__asm volatile
-	(
-	"	mrs r0, control									\n" /* r0 = CONTROL. */
-	"	orr r0, #1										\n" /* r0 = r0 | 1. */
-	"	msr control, r0									\n" /* CONTROL = r0. */
-	"	bx lr											\n" /* Return to the caller. */
-	:::"r0", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, control									\n"/* r0 = CONTROL. */
+        "	orr r0, #1										\n"/* r0 = r0 | 1. */
+        "	msr control, r0									\n"/* CONTROL = r0. */
+        "	bx lr											\n"/* Return to the caller. */
+        ::: "r0", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	ldr r0, xVTORConst								\n" /* Use the NVIC offset register to locate the stack. */
-	"	ldr r0, [r0]									\n" /* Read the VTOR register which gives the address of vector table. */
-	"	ldr r0, [r0]									\n" /* The first entry in vector table is stack pointer. */
-	"	msr msp, r0										\n" /* Set the MSP back to the start of the stack. */
-	"	cpsie i											\n" /* Globally enable interrupts. */
-	"	cpsie f											\n"
-	"	dsb												\n"
-	"	isb												\n"
-	"	svc %0											\n" /* System call to start the first task. */
-	"	nop												\n"
-	"													\n"
-	"   .align 4										\n"
-	"xVTORConst: .word 0xe000ed08						\n"
-	:: "i" ( portSVC_START_SCHEDULER ) : "memory"
-	);
+    __asm volatile
+    (
+        "	ldr r0, xVTORConst								\n"/* Use the NVIC offset register to locate the stack. */
+        "	ldr r0, [r0]									\n"/* Read the VTOR register which gives the address of vector table. */
+        "	ldr r0, [r0]									\n"/* The first entry in vector table is stack pointer. */
+        "	msr msp, r0										\n"/* Set the MSP back to the start of the stack. */
+        "	cpsie i											\n"/* Globally enable interrupts. */
+        "	cpsie f											\n"
+        "	dsb												\n"
+        "	isb												\n"
+        "	svc %0											\n"/* System call to start the first task. */
+        "	nop												\n"
+        "													\n"
+        "   .align 4										\n"
+        "xVTORConst: .word 0xe000ed08						\n"
+        ::"i" ( portSVC_START_SCHEDULER ) : "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	mrs r0, basepri									\n" /* r0 = basepri. Return original basepri value. */
-	"	mov r1, %0										\n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-	"	msr basepri, r1									\n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-	"	dsb												\n"
-	"	isb												\n"
-	"	bx lr											\n" /* Return. */
-	:: "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, basepri									\n"/* r0 = basepri. Return original basepri value. */
+        "	mov r1, %0										\n"/* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+        "	msr basepri, r1									\n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+        "	dsb												\n"
+        "	isb												\n"
+        "	bx lr											\n"/* Return. */
+        ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	msr basepri, r0									\n" /* basepri = ulMask. */
-	"	dsb												\n"
-	"	isb												\n"
-	"	bx lr											\n" /* Return. */
-	::: "memory"
-	);
+    __asm volatile
+    (
+        "	msr basepri, r0									\n"/* basepri = ulMask. */
+        "	dsb												\n"
+        "	isb												\n"
+        "	bx lr											\n"/* Return. */
+        ::: "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	.syntax unified									\n"
-	"	.extern SecureContext_SaveContext				\n"
-	"	.extern SecureContext_LoadContext				\n"
-	"													\n"
-	"	mrs r1, psp										\n" /* Read PSP in r1. */
-	"	ldr r2, xSecureContextConst						\n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
-	"	ldr r0, [r2]									\n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
-	"													\n"
-	"	cbz r0, save_ns_context							\n" /* No secure context to save. */
-	"	push {r0-r2, r14}								\n"
-	"	bl SecureContext_SaveContext					\n"
-	"	pop {r0-r3}										\n" /* LR is now in r3. */
-	"	mov lr, r3										\n" /* LR = r3. */
-	"	lsls r2, r3, #25								\n" /* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-	"	bpl save_ns_context								\n" /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-	"	ldr r3, pxCurrentTCBConst						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr r2, [r3]									\n" /* Read pxCurrentTCB. */
-	#if( configENABLE_MPU == 1 )
-	"	subs r1, r1, #16								\n" /* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
-	"	str r1, [r2]									\n" /* Save the new top of stack in TCB. */
-	"	mrs r2, psplim									\n" /* r2 = PSPLIM. */
-	"	mrs r3, control									\n" /* r3 = CONTROL. */
-	"	mov r4, lr										\n" /* r4 = LR/EXC_RETURN. */
-	"	stmia r1!, {r0, r2-r4}							\n" /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
-	#else /* configENABLE_MPU */
-	"	subs r1, r1, #12								\n" /* Make space for xSecureContext, PSPLIM and LR on the stack. */
-	"	str r1, [r2]									\n" /* Save the new top of stack in TCB. */
-	"	mrs r2, psplim									\n" /* r2 = PSPLIM. */
-	"	mov r3, lr										\n" /* r3 = LR/EXC_RETURN. */
-	"	stmia r1!, {r0, r2-r3}							\n" /* Store xSecureContext, PSPLIM and LR on the stack. */
-	#endif /* configENABLE_MPU */
-	"	b select_next_task								\n"
-	"													\n"
-	" save_ns_context:									\n"
-	"	ldr r3, pxCurrentTCBConst						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr r2, [r3]									\n" /* Read pxCurrentTCB. */
-	#if( configENABLE_FPU == 1 )
-	"	tst lr, #0x10									\n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
-	"	it eq											\n"
-	"	vstmdbeq r1!, {s16-s31}							\n" /* Store the FPU registers which are not saved automatically. */
-	#endif /* configENABLE_FPU */
-	#if( configENABLE_MPU == 1 )
-	"	subs r1, r1, #48								\n" /* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
-	"	str r1, [r2]									\n" /* Save the new top of stack in TCB. */
-	"	adds r1, r1, #16								\n" /* r1 = r1 + 16. */
-	"	stm r1, {r4-r11}								\n" /* Store the registers that are not saved automatically. */
-	"	mrs r2, psplim									\n" /* r2 = PSPLIM. */
-	"	mrs r3, control									\n" /* r3 = CONTROL. */
-	"	mov r4, lr										\n" /* r4 = LR/EXC_RETURN. */
-	"	subs r1, r1, #16								\n" /* r1 = r1 - 16. */
-	"	stm r1, {r0, r2-r4}								\n" /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
-	#else /* configENABLE_MPU */
-	"	subs r1, r1, #44								\n" /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
-	"	str r1, [r2]									\n" /* Save the new top of stack in TCB. */
-	"	adds r1, r1, #12								\n" /* r1 = r1 + 12. */
-	"	stm r1, {r4-r11}								\n" /* Store the registers that are not saved automatically. */
-	"	mrs r2, psplim									\n" /* r2 = PSPLIM. */
-	"	mov r3, lr										\n" /* r3 = LR/EXC_RETURN. */
-	"	subs r1, r1, #12								\n" /* r1 = r1 - 12. */
-	"	stmia r1!, {r0, r2-r3}							\n" /* Store xSecureContext, PSPLIM and LR on the stack. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	" select_next_task:									\n"
-	"	mov r0, %0										\n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
-	"	msr basepri, r0									\n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-	"	dsb												\n"
-	"	isb												\n"
-	"	bl vTaskSwitchContext							\n"
-	"	mov r0, #0										\n" /* r0 = 0. */
-	"	msr basepri, r0									\n" /* Enable interrupts. */
-	"													\n"
-	"	ldr r2, pxCurrentTCBConst						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr r3, [r2]									\n" /* Read pxCurrentTCB. */
-	"	ldr r1, [r3]									\n" /* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	dmb												\n" /* Complete outstanding transfers before disabling MPU. */
-	"	ldr r2, xMPUCTRLConst							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	bic r4, #1										\n" /* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Disable MPU. */
-	"													\n"
-	"	adds r3, #4										\n" /* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
-	"	ldr r4, [r3]									\n" /* r4 = *r3 i.e. r4 = MAIR0. */
-	"	ldr r2, xMAIR0Const								\n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-	"	str r4, [r2]									\n" /* Program MAIR0. */
-	"	ldr r2, xRNRConst								\n" /* r2 = 0xe000ed98 [Location of RNR]. */
-	"	movs r4, #4										\n" /* r4 = 4. */
-	"	str r4, [r2]									\n" /* Program RNR = 4. */
-	"	adds r3, #4										\n" /* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
-	"	ldr  r2, xRBARConst								\n" /* r2 = 0xe000ed9c [Location of RBAR]. */
-	"	ldmia r3!, {r4-r11}								\n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
-	"	stmia r2!, {r4-r11}								\n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-	"													\n"
-	"	ldr r2, xMPUCTRLConst							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	orr r4, #1										\n" /* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Enable MPU. */
-	"	dsb												\n" /* Force memory writes before continuing. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	ldmia r1!, {r0, r2-r4}							\n" /* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */
-	"	msr psplim, r2									\n" /* Restore the PSPLIM register value for the task. */
-	"	msr control, r3									\n" /* Restore the CONTROL register value for the task. */
-	"	mov lr, r4										\n" /* LR = r4. */
-	"	ldr r2, xSecureContextConst						\n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
-	"	str r0, [r2]									\n" /* Restore the task's xSecureContext. */
-	"	cbz r0, restore_ns_context						\n" /* If there is no secure context for the task, restore the non-secure context. */
-	"	push {r1,r4}									\n"
-	"	bl SecureContext_LoadContext					\n" /* Restore the secure context. */
-	"	pop {r1,r4}										\n"
-	"	mov lr, r4										\n" /* LR = r4. */
-	"	lsls r2, r4, #25								\n" /* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-	"	bpl restore_ns_context							\n" /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-	"	msr psp, r1										\n" /* Remember the new top of stack for the task. */
-	"	bx lr											\n"
-	#else /* configENABLE_MPU */
-	"	ldmia r1!, {r0, r2-r3}							\n" /* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */
-	"	msr psplim, r2									\n" /* Restore the PSPLIM register value for the task. */
-	"	mov lr, r3										\n" /* LR = r3. */
-	"	ldr r2, xSecureContextConst						\n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
-	"	str r0, [r2]									\n" /* Restore the task's xSecureContext. */
-	"	cbz r0, restore_ns_context						\n" /* If there is no secure context for the task, restore the non-secure context. */
-	"	push {r1,r3}									\n"
-	"	bl SecureContext_LoadContext					\n" /* Restore the secure context. */
-	"	pop {r1,r3}										\n"
-	"	mov lr, r3										\n" /* LR = r3. */
-	"	lsls r2, r3, #25								\n" /* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-	"	bpl restore_ns_context							\n" /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-	"	msr psp, r1										\n" /* Remember the new top of stack for the task. */
-	"	bx lr											\n"
-	#endif /* configENABLE_MPU */
-	"													\n"
-	" restore_ns_context:								\n"
-	"	ldmia r1!, {r4-r11}								\n" /* Restore the registers that are not automatically restored. */
-	#if( configENABLE_FPU == 1 )
-	"	tst lr, #0x10									\n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
-	"	it eq											\n"
-	"	vldmiaeq r1!, {s16-s31}							\n" /* Restore the FPU registers which are not restored automatically. */
-	#endif /* configENABLE_FPU */
-	"	msr psp, r1										\n" /* Remember the new top of stack for the task. */
-	"	bx lr											\n"
-	"													\n"
-	"	.align 4										\n"
-	"pxCurrentTCBConst: .word pxCurrentTCB				\n"
-	"xSecureContextConst: .word xSecureContext			\n"
-	#if( configENABLE_MPU == 1 )
-	"xMPUCTRLConst: .word 0xe000ed94					\n"
-	"xMAIR0Const: .word 0xe000edc0						\n"
-	"xRNRConst: .word 0xe000ed98						\n"
-	"xRBARConst: .word 0xe000ed9c						\n"
-	#endif /* configENABLE_MPU */
-	:: "i"( configMAX_SYSCALL_INTERRUPT_PRIORITY )
-	);
+    __asm volatile
+    (
+        "	.syntax unified									\n"
+        "	.extern SecureContext_SaveContext				\n"
+        "	.extern SecureContext_LoadContext				\n"
+        "													\n"
+        "	mrs r1, psp										\n"/* Read PSP in r1. */
+        "	ldr r2, xSecureContextConst						\n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+        "	ldr r0, [r2]									\n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
+        "													\n"
+        "	cbz r0, save_ns_context							\n"/* No secure context to save. */
+        "	push {r0-r2, r14}								\n"
+        "	bl SecureContext_SaveContext					\n"
+        "	pop {r0-r3}										\n"/* LR is now in r3. */
+        "	mov lr, r3										\n"/* LR = r3. */
+        "	lsls r2, r3, #25								\n"/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+        "	bpl save_ns_context								\n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+        "	ldr r3, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr r2, [r3]									\n"/* Read pxCurrentTCB. */
+        #if ( configENABLE_MPU == 1 )
+            "	subs r1, r1, #16								\n"/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
+            "	str r1, [r2]									\n"/* Save the new top of stack in TCB. */
+            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
+            "	mrs r3, control									\n"/* r3 = CONTROL. */
+            "	mov r4, lr										\n"/* r4 = LR/EXC_RETURN. */
+            "	stmia r1!, {r0, r2-r4}							\n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
+        #else /* configENABLE_MPU */
+            "	subs r1, r1, #12								\n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */
+            "	str r1, [r2]									\n"/* Save the new top of stack in TCB. */
+            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
+            "	mov r3, lr										\n"/* r3 = LR/EXC_RETURN. */
+            "	stmia r1!, {r0, r2-r3}							\n"/* Store xSecureContext, PSPLIM and LR on the stack. */
+        #endif /* configENABLE_MPU */
+        "	b select_next_task								\n"
+        "													\n"
+        " save_ns_context:									\n"
+        "	ldr r3, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr r2, [r3]									\n"/* Read pxCurrentTCB. */
+        #if ( configENABLE_FPU == 1 )
+            "	tst lr, #0x10									\n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
+            "	it eq											\n"
+            "	vstmdbeq r1!, {s16-s31}							\n"/* Store the FPU registers which are not saved automatically. */
+        #endif /* configENABLE_FPU */
+        #if ( configENABLE_MPU == 1 )
+            "	subs r1, r1, #48								\n"/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
+            "	str r1, [r2]									\n"/* Save the new top of stack in TCB. */
+            "	adds r1, r1, #16								\n"/* r1 = r1 + 16. */
+            "	stm r1, {r4-r11}								\n"/* Store the registers that are not saved automatically. */
+            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
+            "	mrs r3, control									\n"/* r3 = CONTROL. */
+            "	mov r4, lr										\n"/* r4 = LR/EXC_RETURN. */
+            "	subs r1, r1, #16								\n"/* r1 = r1 - 16. */
+            "	stm r1, {r0, r2-r4}								\n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
+        #else /* configENABLE_MPU */
+            "	subs r1, r1, #44								\n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
+            "	str r1, [r2]									\n"/* Save the new top of stack in TCB. */
+            "	adds r1, r1, #12								\n"/* r1 = r1 + 12. */
+            "	stm r1, {r4-r11}								\n"/* Store the registers that are not saved automatically. */
+            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
+            "	mov r3, lr										\n"/* r3 = LR/EXC_RETURN. */
+            "	subs r1, r1, #12								\n"/* r1 = r1 - 12. */
+            "	stmia r1!, {r0, r2-r3}							\n"/* Store xSecureContext, PSPLIM and LR on the stack. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        " select_next_task:									\n"
+        "	mov r0, %0										\n"/* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
+        "	msr basepri, r0									\n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+        "	dsb												\n"
+        "	isb												\n"
+        "	bl vTaskSwitchContext							\n"
+        "	mov r0, #0										\n"/* r0 = 0. */
+        "	msr basepri, r0									\n"/* Enable interrupts. */
+        "													\n"
+        "	ldr r2, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr r3, [r2]									\n"/* Read pxCurrentTCB. */
+        "	ldr r1, [r3]									\n"/* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	dmb												\n"/* Complete outstanding transfers before disabling MPU. */
+            "	ldr r2, xMPUCTRLConst							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	bic r4, #1										\n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
+            "	str r4, [r2]									\n"/* Disable MPU. */
+            "													\n"
+            "	adds r3, #4										\n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
+            "	ldr r4, [r3]									\n"/* r4 = *r3 i.e. r4 = MAIR0. */
+            "	ldr r2, xMAIR0Const								\n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "	str r4, [r2]									\n"/* Program MAIR0. */
+            "	ldr r2, xRNRConst								\n"/* r2 = 0xe000ed98 [Location of RNR]. */
+            "	movs r4, #4										\n"/* r4 = 4. */
+            "	str r4, [r2]									\n"/* Program RNR = 4. */
+            "	adds r3, #4										\n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
+            "	ldr  r2, xRBARConst								\n"/* r2 = 0xe000ed9c [Location of RBAR]. */
+            "	ldmia r3!, {r4-r11}								\n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
+            "	stmia r2!, {r4-r11}								\n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "													\n"
+            "	ldr r2, xMPUCTRLConst							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	orr r4, #1										\n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
+            "	str r4, [r2]									\n"/* Enable MPU. */
+            "	dsb												\n"/* Force memory writes before continuing. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	ldmia r1!, {r0, r2-r4}							\n"/* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */
+            "	msr psplim, r2									\n"/* Restore the PSPLIM register value for the task. */
+            "	msr control, r3									\n"/* Restore the CONTROL register value for the task. */
+            "	mov lr, r4										\n"/* LR = r4. */
+            "	ldr r2, xSecureContextConst						\n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            "	str r0, [r2]									\n"/* Restore the task's xSecureContext. */
+            "	cbz r0, restore_ns_context						\n"/* If there is no secure context for the task, restore the non-secure context. */
+            "	push {r1,r4}									\n"
+            "	bl SecureContext_LoadContext					\n"/* Restore the secure context. */
+            "	pop {r1,r4}										\n"
+            "	mov lr, r4										\n"/* LR = r4. */
+            "	lsls r2, r4, #25								\n"/* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+            "	bpl restore_ns_context							\n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+            "	msr psp, r1										\n"/* Remember the new top of stack for the task. */
+            "	bx lr											\n"
+        #else /* configENABLE_MPU */
+            "	ldmia r1!, {r0, r2-r3}							\n"/* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */
+            "	msr psplim, r2									\n"/* Restore the PSPLIM register value for the task. */
+            "	mov lr, r3										\n"/* LR = r3. */
+            "	ldr r2, xSecureContextConst						\n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            "	str r0, [r2]									\n"/* Restore the task's xSecureContext. */
+            "	cbz r0, restore_ns_context						\n"/* If there is no secure context for the task, restore the non-secure context. */
+            "	push {r1,r3}									\n"
+            "	bl SecureContext_LoadContext					\n"/* Restore the secure context. */
+            "	pop {r1,r3}										\n"
+            "	mov lr, r3										\n"/* LR = r3. */
+            "	lsls r2, r3, #25								\n"/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+            "	bpl restore_ns_context							\n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+            "	msr psp, r1										\n"/* Remember the new top of stack for the task. */
+            "	bx lr											\n"
+        #endif /* configENABLE_MPU */
+        "													\n"
+        " restore_ns_context:								\n"
+        "	ldmia r1!, {r4-r11}								\n"/* Restore the registers that are not automatically restored. */
+        #if ( configENABLE_FPU == 1 )
+            "	tst lr, #0x10									\n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
+            "	it eq											\n"
+            "	vldmiaeq r1!, {s16-s31}							\n"/* Restore the FPU registers which are not restored automatically. */
+        #endif /* configENABLE_FPU */
+        "	msr psp, r1										\n"/* Remember the new top of stack for the task. */
+        "	bx lr											\n"
+        "													\n"
+        "	.align 4										\n"
+        "pxCurrentTCBConst: .word pxCurrentTCB				\n"
+        "xSecureContextConst: .word xSecureContext			\n"
+        #if ( configENABLE_MPU == 1 )
+            "xMPUCTRLConst: .word 0xe000ed94					\n"
+            "xMAIR0Const: .word 0xe000edc0						\n"
+            "xRNRConst: .word 0xe000ed98						\n"
+            "xRBARConst: .word 0xe000ed9c						\n"
+        #endif /* configENABLE_MPU */
+        ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
+    );
 }
 /*-----------------------------------------------------------*/
 
 void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	tst lr, #4										\n"
-	"	ite eq											\n"
-	"	mrseq r0, msp									\n"
-	"	mrsne r0, psp									\n"
-	"	ldr r1, svchandler_address_const				\n"
-	"	bx r1											\n"
-	"													\n"
-	"	.align 4										\n"
-	"svchandler_address_const: .word vPortSVCHandler_C	\n"
-	);
+    __asm volatile
+    (
+        "	tst lr, #4										\n"
+        "	ite eq											\n"
+        "	mrseq r0, msp									\n"
+        "	mrsne r0, psp									\n"
+        "	ldr r1, svchandler_address_const				\n"
+        "	bx r1											\n"
+        "													\n"
+        "	.align 4										\n"
+        "svchandler_address_const: .word vPortSVCHandler_C	\n"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attribute__ (( naked )) */
 {
-	__asm volatile
-	(
-	"	svc %0											\n" /* Secure context is allocated in the supervisor call. */
-	"	bx lr											\n" /* Return. */
-	:: "i" ( portSVC_ALLOCATE_SECURE_CONTEXT ) : "memory"
-	);
+    __asm volatile
+    (
+        "	svc %0											\n"/* Secure context is allocated in the supervisor call. */
+        "	bx lr											\n"/* Return. */
+        ::"i" ( portSVC_ALLOCATE_SECURE_CONTEXT ) : "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
-void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	ldr r1, [r0]									\n" /* The first item in the TCB is the top of the stack. */
-	"	ldr r0, [r1]									\n" /* The first item on the stack is the task's xSecureContext. */
-	"	cmp r0, #0										\n" /* Raise svc if task's xSecureContext is not NULL. */
-	"	it ne											\n"
-	"	svcne %0										\n" /* Secure context is freed in the supervisor call. */
-	"	bx lr											\n" /* Return. */
-	:: "i" ( portSVC_FREE_SECURE_CONTEXT ) : "memory"
-	);
+    __asm volatile
+    (
+        "	ldr r1, [r0]									\n"/* The first item in the TCB is the top of the stack. */
+        "	ldr r0, [r1]									\n"/* The first item on the stack is the task's xSecureContext. */
+        "	cmp r0, #0										\n"/* Raise svc if task's xSecureContext is not NULL. */
+        "	it ne											\n"
+        "	svcne %0										\n"/* Secure context is freed in the supervisor call. */
+        "	bx lr											\n"/* Return. */
+        ::"i" ( portSVC_FREE_SECURE_CONTEXT ) : "memory"
+    );
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h
index 64fea84e2..851c22c8a 100644
--- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h
+++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,18 +19,18 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*------------------------------------------------------------------------------
  * Port specific definitions.
@@ -42,109 +42,109 @@ extern "C" {
  *------------------------------------------------------------------------------
  */
 
-#ifndef configENABLE_FPU
-	#error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
-#endif /* configENABLE_FPU */
+    #ifndef configENABLE_FPU
+        #error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
+    #endif /* configENABLE_FPU */
 
-#ifndef configENABLE_MPU
-	#error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
-#endif /* configENABLE_MPU */
+    #ifndef configENABLE_MPU
+        #error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
+    #endif /* configENABLE_MPU */
 
-#ifndef configENABLE_TRUSTZONE
-	#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
-#endif /* configENABLE_TRUSTZONE */
+    #ifndef configENABLE_TRUSTZONE
+        #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
+    #endif /* configENABLE_TRUSTZONE */
 
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Type definitions.
  */
-#define portCHAR											char
-#define portFLOAT											float
-#define portDOUBLE											double
-#define portLONG											long
-#define portSHORT											short
-#define portSTACK_TYPE										uint32_t
-#define portBASE_TYPE										long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE										StackType_t;
-typedef long												BaseType_t;
-typedef unsigned long										UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	 * not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC							1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * Architecture specifics.
  */
-#define portARCH_NAME										"Cortex-M33"
-#define portSTACK_GROWTH									( -1 )
-#define portTICK_PERIOD_MS									( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT									8
-#define portNOP()
-#define portINLINE											__inline
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE								inline __attribute__(( always_inline ))
-#endif
-#define portHAS_STACK_OVERFLOW_CHECKING						1
-#define portDONT_DISCARD									__attribute__(( used ))
+    #define portARCH_NAME                      "Cortex-M33"
+    #define portSTACK_GROWTH                   ( -1 )
+    #define portTICK_PERIOD_MS                 ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT                 8
+    #define portNOP()
+    #define portINLINE                         __inline
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE               inline __attribute__( ( always_inline ) )
+    #endif
+    #define portHAS_STACK_OVERFLOW_CHECKING    1
+    #define portDONT_DISCARD                   __attribute__( ( used ) )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Extern declarations.
  */
-extern BaseType_t xPortIsInsideInterrupt( void );
+    extern BaseType_t xPortIsInsideInterrupt( void );
 
-extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
 
-extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
-extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
 
-extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
 
-#if( configENABLE_TRUSTZONE == 1 )
-	extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
-	extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
-#endif /* configENABLE_TRUSTZONE */
+    #if ( configENABLE_TRUSTZONE == 1 )
+        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
+        extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
+    #endif /* configENABLE_TRUSTZONE */
 
-#if( configENABLE_MPU == 1 )
-	extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
-	extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
+        extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief MPU specific constants.
  */
-#if( configENABLE_MPU == 1 )
-	#define portUSING_MPU_WRAPPERS							1
-	#define portPRIVILEGE_BIT								( 0x80000000UL )
-#else
-	#define portPRIVILEGE_BIT								( 0x0UL )
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        #define portUSING_MPU_WRAPPERS    1
+        #define portPRIVILEGE_BIT         ( 0x80000000UL )
+    #else
+        #define portPRIVILEGE_BIT         ( 0x0UL )
+    #endif /* configENABLE_MPU */
 
 
 /* MPU regions. */
-#define portPRIVILEGED_FLASH_REGION							( 0UL )
-#define portUNPRIVILEGED_FLASH_REGION						( 1UL )
-#define portUNPRIVILEGED_SYSCALLS_REGION					( 2UL )
-#define portPRIVILEGED_RAM_REGION							( 3UL )
-#define portSTACK_REGION									( 4UL )
-#define portFIRST_CONFIGURABLE_REGION						( 5UL )
-#define portLAST_CONFIGURABLE_REGION						( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS						( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS								( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
+    #define portPRIVILEGED_FLASH_REGION                   ( 0UL )
+    #define portUNPRIVILEGED_FLASH_REGION                 ( 1UL )
+    #define portUNPRIVILEGED_SYSCALLS_REGION              ( 2UL )
+    #define portPRIVILEGED_RAM_REGION                     ( 3UL )
+    #define portSTACK_REGION                              ( 4UL )
+    #define portFIRST_CONFIGURABLE_REGION                 ( 5UL )
+    #define portLAST_CONFIGURABLE_REGION                  ( 7UL )
+    #define portNUM_CONFIGURABLE_REGIONS                  ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
+    #define portTOTAL_NUM_REGIONS                         ( portNUM_CONFIGURABLE_REGIONS + 1 )   /* Plus one to make space for the stack region. */
 
 /* Device memory attributes used in MPU_MAIR registers.
  *
@@ -156,155 +156,157 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
  *				11 --> Device-GRE
  *  Bit[1:0] - 00, Reserved.
  */
-#define portMPU_DEVICE_MEMORY_nGnRnE						( 0x00 ) /* 0000 0000 */
-#define portMPU_DEVICE_MEMORY_nGnRE							( 0x04 ) /* 0000 0100 */
-#define portMPU_DEVICE_MEMORY_nGRE							( 0x08 ) /* 0000 1000 */
-#define portMPU_DEVICE_MEMORY_GRE							( 0x0C ) /* 0000 1100 */
+    #define portMPU_DEVICE_MEMORY_nGnRnE                  ( 0x00 )   /* 0000 0000 */
+    #define portMPU_DEVICE_MEMORY_nGnRE                   ( 0x04 )   /* 0000 0100 */
+    #define portMPU_DEVICE_MEMORY_nGRE                    ( 0x08 )   /* 0000 1000 */
+    #define portMPU_DEVICE_MEMORY_GRE                     ( 0x0C )   /* 0000 1100 */
 
 /* Normal memory attributes used in MPU_MAIR registers. */
-#define portMPU_NORMAL_MEMORY_NON_CACHEABLE					( 0x44 ) /* Non-cacheable. */
-#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE			( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
+    #define portMPU_NORMAL_MEMORY_NON_CACHEABLE           ( 0x44 )   /* Non-cacheable. */
+    #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE    ( 0xFF )   /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
 
 /* Attributes used in MPU_RBAR registers. */
-#define portMPU_REGION_NON_SHAREABLE						( 0UL << 3UL )
-#define portMPU_REGION_INNER_SHAREABLE						( 1UL << 3UL )
-#define portMPU_REGION_OUTER_SHAREABLE						( 2UL << 3UL )
+    #define portMPU_REGION_NON_SHAREABLE                  ( 0UL << 3UL )
+    #define portMPU_REGION_INNER_SHAREABLE                ( 1UL << 3UL )
+    #define portMPU_REGION_OUTER_SHAREABLE                ( 2UL << 3UL )
 
-#define portMPU_REGION_PRIVILEGED_READ_WRITE				( 0UL << 1UL )
-#define portMPU_REGION_READ_WRITE							( 1UL << 1UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY					( 2UL << 1UL )
-#define portMPU_REGION_READ_ONLY							( 3UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_WRITE          ( 0UL << 1UL )
+    #define portMPU_REGION_READ_WRITE                     ( 1UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_ONLY           ( 2UL << 1UL )
+    #define portMPU_REGION_READ_ONLY                      ( 3UL << 1UL )
 
-#define portMPU_REGION_EXECUTE_NEVER						( 1UL )
+    #define portMPU_REGION_EXECUTE_NEVER                  ( 1UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Settings to define an MPU region.
  */
-typedef struct MPURegionSettings
-{
-	uint32_t ulRBAR;	/**< RBAR for the region. */
-	uint32_t ulRLAR;	/**< RLAR for the region. */
-} MPURegionSettings_t;
+    typedef struct MPURegionSettings
+    {
+        uint32_t ulRBAR; /**< RBAR for the region. */
+        uint32_t ulRLAR; /**< RLAR for the region. */
+    } MPURegionSettings_t;
 
 /**
  * @brief MPU settings as stored in the TCB.
  */
-typedef struct MPU_SETTINGS
-{
-	uint32_t ulMAIR0;	/**< MAIR0 for the task containing attributes for all the 4 per task regions. */
-	MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
-} xMPU_SETTINGS;
+    typedef struct MPU_SETTINGS
+    {
+        uint32_t ulMAIR0;                                              /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
+        MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
+    } xMPU_SETTINGS;
 /*-----------------------------------------------------------*/
 
 /**
  * @brief SVC numbers.
  */
-#define portSVC_ALLOCATE_SECURE_CONTEXT						0
-#define portSVC_FREE_SECURE_CONTEXT							1
-#define portSVC_START_SCHEDULER								2
-#define portSVC_RAISE_PRIVILEGE								3
+    #define portSVC_ALLOCATE_SECURE_CONTEXT    0
+    #define portSVC_FREE_SECURE_CONTEXT        1
+    #define portSVC_START_SCHEDULER            2
+    #define portSVC_RAISE_PRIVILEGE            3
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Scheduler utilities.
  */
-#define portYIELD()											vPortYield()
-#define portNVIC_INT_CTRL_REG								( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT								( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired )			if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x )								portEND_SWITCHING_ISR( x )
+    #define portYIELD()                                 vPortYield()
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Critical section management.
  */
-#define portSET_INTERRUPT_MASK_FROM_ISR()					ulSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )				vClearInterruptMask( x )
-#define portDISABLE_INTERRUPTS()							ulSetInterruptMask()
-#define portENABLE_INTERRUPTS()								vClearInterruptMask( 0 )
-#define portENTER_CRITICAL()								vPortEnterCritical()
-#define portEXIT_CRITICAL()									vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulSetInterruptMask()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vClearInterruptMask( x )
+    #define portDISABLE_INTERRUPTS()                  ulSetInterruptMask()
+    #define portENABLE_INTERRUPTS()                   vClearInterruptMask( 0 )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Tickless idle/low power functionality.
  */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Task function macros as described on the FreeRTOS.org WEB site.
  */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters )		void vFunction( void *pvParameters )
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Allocate a secure context for the task.
-	 *
-	 * Tasks are not created with a secure context. Any task that is going to call
-	 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
-	 * secure context before it calls any secure function.
-	 *
-	 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
-	 */
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )	vPortAllocateSecureContext( ulSecureStackSize )
+    #if ( configENABLE_TRUSTZONE == 1 )
 
-	/**
-	 * @brief Called when a task is deleted to delete the task's secure context,
-	 * if it has one.
-	 *
-	 * @param[in] pxTCB The TCB of the task being deleted.
-	 */
-	#define portCLEAN_UP_TCB( pxTCB )							vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-#else
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-	#define portCLEAN_UP_TCB( pxTCB )
-#endif /* configENABLE_TRUSTZONE */
+/**
+ * @brief Allocate a secure context for the task.
+ *
+ * Tasks are not created with a secure context. Any task that is going to call
+ * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
+ * secure context before it calls any secure function.
+ *
+ * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
+ */
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )    vPortAllocateSecureContext( ulSecureStackSize )
+
+/**
+ * @brief Called when a task is deleted to delete the task's secure context,
+ * if it has one.
+ *
+ * @param[in] pxTCB The TCB of the task being deleted.
+ */
+        #define portCLEAN_UP_TCB( pxTCB )                           vPortFreeSecureContext( ( uint32_t * ) pxTCB )
+    #else
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
+        #define portCLEAN_UP_TCB( pxTCB )
+    #endif /* configENABLE_TRUSTZONE */
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Checks whether or not the processor is privileged.
-	 *
-	 * @return 1 if the processor is already privileged, 0 otherwise.
-	 */
-	#define portIS_PRIVILEGED()									xIsPrivileged()
+    #if ( configENABLE_MPU == 1 )
 
-	/**
-	 * @brief Raise an SVC request to raise privilege.
-	 *
-	 * The SVC handler checks that the SVC was raised from a system call and only
-	 * then it raises the privilege. If this is called from any other place,
-	 * the privilege is not raised.
-	 */
-	#define portRAISE_PRIVILEGE()								__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+/**
+ * @brief Checks whether or not the processor is privileged.
+ *
+ * @return 1 if the processor is already privileged, 0 otherwise.
+ */
+        #define portIS_PRIVILEGED()      xIsPrivileged()
 
-	/**
-	 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
-	 * register.
-	 */
-	#define portRESET_PRIVILEGE()								vResetPrivilege()
-#else
-	#define portIS_PRIVILEGED()
-	#define portRAISE_PRIVILEGE()
-	#define portRESET_PRIVILEGE()
-#endif /* configENABLE_MPU */
+/**
+ * @brief Raise an SVC request to raise privilege.
+ *
+ * The SVC handler checks that the SVC was raised from a system call and only
+ * then it raises the privilege. If this is called from any other place,
+ * the privilege is not raised.
+ */
+        #define portRAISE_PRIVILEGE()    __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+
+/**
+ * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
+ * register.
+ */
+        #define portRESET_PRIVILEGE()    vResetPrivilege()
+    #else
+        #define portIS_PRIVILEGED()
+        #define portRAISE_PRIVILEGE()
+        #define portRESET_PRIVILEGE()
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Barriers.
  */
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
+    #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
 /*-----------------------------------------------------------*/
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c
index 1e3a4fc43..6038c5734 100644
--- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c
+++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -41,276 +41,276 @@
 
 void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	.syntax unified									\n"
-	"													\n"
-	"	ldr  r2, pxCurrentTCBConst2						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr  r1, [r2]									\n" /* Read pxCurrentTCB. */
-	"	ldr  r0, [r1]									\n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	dmb												\n" /* Complete outstanding transfers before disabling MPU. */
-	"	ldr r2, xMPUCTRLConst2							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	bic r4, #1										\n" /* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Disable MPU. */
-	"													\n"
-	"	adds r1, #4										\n" /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
-	"	ldr  r3, [r1]									\n" /* r3 = *r1 i.e. r3 = MAIR0. */
-	"	ldr  r2, xMAIR0Const2							\n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-	"	str  r3, [r2]									\n" /* Program MAIR0. */
-	"	ldr  r2, xRNRConst2								\n" /* r2 = 0xe000ed98 [Location of RNR]. */
-	"	movs r3, #4										\n" /* r3 = 4. */
-	"	str  r3, [r2]									\n" /* Program RNR = 4. */
-	"	adds r1, #4										\n" /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
-	"	ldr  r2, xRBARConst2							\n" /* r2 = 0xe000ed9c [Location of RBAR]. */
-	"	ldmia r1!, {r4-r11}								\n" /* Read 4 set of RBAR/RLAR registers from TCB. */
-	"	stmia r2!, {r4-r11}								\n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-	"													\n"
-	"	ldr r2, xMPUCTRLConst2							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	orr r4, #1										\n" /* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Enable MPU. */
-	"	dsb												\n" /* Force memory writes before continuing. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	ldm  r0!, {r1-r3}								\n" /* Read from stack - r1 = PSPLIM, r2 = CONTROL and r3 = EXC_RETURN. */
-	"	msr  psplim, r1									\n" /* Set this task's PSPLIM value. */
-	"	msr  control, r2								\n" /* Set this task's CONTROL value. */
-	"	adds r0, #32									\n" /* Discard everything up to r0. */
-	"	msr  psp, r0									\n" /* This is now the new top of stack to use in the task. */
-	"	isb												\n"
-	"	bx   r3											\n" /* Finally, branch to EXC_RETURN. */
-	#else /* configENABLE_MPU */
-	"	ldm  r0!, {r1-r2}								\n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
-	"	msr  psplim, r1									\n" /* Set this task's PSPLIM value. */
-	"	movs r1, #2										\n" /* r1 = 2. */
-	"	msr  CONTROL, r1								\n" /* Switch to use PSP in the thread mode. */
-	"	adds r0, #32									\n" /* Discard everything up to r0. */
-	"	msr  psp, r0									\n" /* This is now the new top of stack to use in the task. */
-	"	isb												\n"
-	"	bx   r2											\n" /* Finally, branch to EXC_RETURN. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	"	.align 4										\n"
-	"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
-	#if( configENABLE_MPU == 1 )
-	"xMPUCTRLConst2: .word 0xe000ed94					\n"
-	"xMAIR0Const2: .word 0xe000edc0						\n"
-	"xRNRConst2: .word 0xe000ed98						\n"
-	"xRBARConst2: .word 0xe000ed9c						\n"
-	#endif /* configENABLE_MPU */
-	);
+    __asm volatile
+    (
+        "	.syntax unified									\n"
+        "													\n"
+        "	ldr  r2, pxCurrentTCBConst2						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr  r1, [r2]									\n"/* Read pxCurrentTCB. */
+        "	ldr  r0, [r1]									\n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	dmb												\n"/* Complete outstanding transfers before disabling MPU. */
+            "	ldr r2, xMPUCTRLConst2							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	bic r4, #1										\n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
+            "	str r4, [r2]									\n"/* Disable MPU. */
+            "													\n"
+            "	adds r1, #4										\n"/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
+            "	ldr  r3, [r1]									\n"/* r3 = *r1 i.e. r3 = MAIR0. */
+            "	ldr  r2, xMAIR0Const2							\n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "	str  r3, [r2]									\n"/* Program MAIR0. */
+            "	ldr  r2, xRNRConst2								\n"/* r2 = 0xe000ed98 [Location of RNR]. */
+            "	movs r3, #4										\n"/* r3 = 4. */
+            "	str  r3, [r2]									\n"/* Program RNR = 4. */
+            "	adds r1, #4										\n"/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
+            "	ldr  r2, xRBARConst2							\n"/* r2 = 0xe000ed9c [Location of RBAR]. */
+            "	ldmia r1!, {r4-r11}								\n"/* Read 4 set of RBAR/RLAR registers from TCB. */
+            "	stmia r2!, {r4-r11}								\n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "													\n"
+            "	ldr r2, xMPUCTRLConst2							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	orr r4, #1										\n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
+            "	str r4, [r2]									\n"/* Enable MPU. */
+            "	dsb												\n"/* Force memory writes before continuing. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	ldm  r0!, {r1-r3}								\n"/* Read from stack - r1 = PSPLIM, r2 = CONTROL and r3 = EXC_RETURN. */
+            "	msr  psplim, r1									\n"/* Set this task's PSPLIM value. */
+            "	msr  control, r2								\n"/* Set this task's CONTROL value. */
+            "	adds r0, #32									\n"/* Discard everything up to r0. */
+            "	msr  psp, r0									\n"/* This is now the new top of stack to use in the task. */
+            "	isb												\n"
+            "	bx   r3											\n"/* Finally, branch to EXC_RETURN. */
+        #else /* configENABLE_MPU */
+            "	ldm  r0!, {r1-r2}								\n"/* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
+            "	msr  psplim, r1									\n"/* Set this task's PSPLIM value. */
+            "	movs r1, #2										\n"/* r1 = 2. */
+            "	msr  CONTROL, r1								\n"/* Switch to use PSP in the thread mode. */
+            "	adds r0, #32									\n"/* Discard everything up to r0. */
+            "	msr  psp, r0									\n"/* This is now the new top of stack to use in the task. */
+            "	isb												\n"
+            "	bx   r2											\n"/* Finally, branch to EXC_RETURN. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        "	.align 4										\n"
+        "pxCurrentTCBConst2: .word pxCurrentTCB				\n"
+        #if ( configENABLE_MPU == 1 )
+            "xMPUCTRLConst2: .word 0xe000ed94					\n"
+            "xMAIR0Const2: .word 0xe000edc0						\n"
+            "xRNRConst2: .word 0xe000ed98						\n"
+            "xRBARConst2: .word 0xe000ed9c						\n"
+        #endif /* configENABLE_MPU */
+    );
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
 {
-	__asm volatile
-	(
-	"	mrs r0, control									\n" /* r0 = CONTROL. */
-	"	tst r0, #1										\n" /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
-	"	ite ne											\n"
-	"	movne r0, #0									\n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
-	"	moveq r0, #1									\n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
-	"	bx lr											\n" /* Return. */
-	"													\n"
-	"	.align 4										\n"
-	::: "r0", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, control									\n"/* r0 = CONTROL. */
+        "	tst r0, #1										\n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
+        "	ite ne											\n"
+        "	movne r0, #0									\n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
+        "	moveq r0, #1									\n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
+        "	bx lr											\n"/* Return. */
+        "													\n"
+        "	.align 4										\n"
+        ::: "r0", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	 __asm volatile
-	(
-	"	mrs  r0, control								\n" /* Read the CONTROL register. */
-	"	bic r0, #1										\n" /* Clear the bit 0. */
-	"	msr  control, r0								\n" /* Write back the new CONTROL value. */
-	"	bx lr											\n" /* Return to the caller. */
-	::: "r0", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs  r0, control								\n"/* Read the CONTROL register. */
+        "	bic r0, #1										\n"/* Clear the bit 0. */
+        "	msr  control, r0								\n"/* Write back the new CONTROL value. */
+        "	bx lr											\n"/* Return to the caller. */
+        ::: "r0", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vResetPrivilege( void ) /* __attribute__ (( naked )) */
 {
-	__asm volatile
-	(
-	"	mrs r0, control									\n" /* r0 = CONTROL. */
-	"	orr r0, #1										\n" /* r0 = r0 | 1. */
-	"	msr control, r0									\n" /* CONTROL = r0. */
-	"	bx lr											\n" /* Return to the caller. */
-	:::"r0", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, control									\n"/* r0 = CONTROL. */
+        "	orr r0, #1										\n"/* r0 = r0 | 1. */
+        "	msr control, r0									\n"/* CONTROL = r0. */
+        "	bx lr											\n"/* Return to the caller. */
+        ::: "r0", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	ldr r0, xVTORConst								\n" /* Use the NVIC offset register to locate the stack. */
-	"	ldr r0, [r0]									\n" /* Read the VTOR register which gives the address of vector table. */
-	"	ldr r0, [r0]									\n" /* The first entry in vector table is stack pointer. */
-	"	msr msp, r0										\n" /* Set the MSP back to the start of the stack. */
-	"	cpsie i											\n" /* Globally enable interrupts. */
-	"	cpsie f											\n"
-	"	dsb												\n"
-	"	isb												\n"
-	"	svc %0											\n" /* System call to start the first task. */
-	"	nop												\n"
-	"													\n"
-	"   .align 4										\n"
-	"xVTORConst: .word 0xe000ed08						\n"
-	:: "i" ( portSVC_START_SCHEDULER ) : "memory"
-	);
+    __asm volatile
+    (
+        "	ldr r0, xVTORConst								\n"/* Use the NVIC offset register to locate the stack. */
+        "	ldr r0, [r0]									\n"/* Read the VTOR register which gives the address of vector table. */
+        "	ldr r0, [r0]									\n"/* The first entry in vector table is stack pointer. */
+        "	msr msp, r0										\n"/* Set the MSP back to the start of the stack. */
+        "	cpsie i											\n"/* Globally enable interrupts. */
+        "	cpsie f											\n"
+        "	dsb												\n"
+        "	isb												\n"
+        "	svc %0											\n"/* System call to start the first task. */
+        "	nop												\n"
+        "													\n"
+        "   .align 4										\n"
+        "xVTORConst: .word 0xe000ed08						\n"
+        ::"i" ( portSVC_START_SCHEDULER ) : "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	mrs r0, basepri									\n" /* r0 = basepri. Return original basepri value. */
-	"	mov r1, %0										\n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-	"	msr basepri, r1									\n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-	"	dsb												\n"
-	"	isb												\n"
-	"	bx lr											\n" /* Return. */
-	:: "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, basepri									\n"/* r0 = basepri. Return original basepri value. */
+        "	mov r1, %0										\n"/* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+        "	msr basepri, r1									\n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+        "	dsb												\n"
+        "	isb												\n"
+        "	bx lr											\n"/* Return. */
+        ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	msr basepri, r0									\n" /* basepri = ulMask. */
-	"	dsb												\n"
-	"	isb												\n"
-	"	bx lr											\n" /* Return. */
-	::: "memory"
-	);
+    __asm volatile
+    (
+        "	msr basepri, r0									\n"/* basepri = ulMask. */
+        "	dsb												\n"
+        "	isb												\n"
+        "	bx lr											\n"/* Return. */
+        ::: "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	.syntax unified									\n"
-	"													\n"
-	"	mrs r0, psp										\n" /* Read PSP in r0. */
-	#if( configENABLE_FPU == 1 )
-	"	tst lr, #0x10									\n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
-	"	it eq											\n"
-	"	vstmdbeq r0!, {s16-s31}							\n" /* Store the FPU registers which are not saved automatically. */
-	#endif /* configENABLE_FPU */
-	#if( configENABLE_MPU == 1 )
-	"	mrs r1, psplim									\n" /* r1 = PSPLIM. */
-	"	mrs r2, control									\n" /* r2 = CONTROL. */
-	"	mov r3, lr										\n" /* r3 = LR/EXC_RETURN. */
-	"	stmdb r0!, {r1-r11}								\n" /* Store on the stack - PSPLIM, CONTROL, LR and registers that are not automatically saved. */
-	#else /* configENABLE_MPU */
-	"	mrs r2, psplim									\n" /* r2 = PSPLIM. */
-	"	mov r3, lr										\n" /* r3 = LR/EXC_RETURN. */
-	"	stmdb r0!, {r2-r11}								\n" /* Store on the stack - PSPLIM, LR and registers that are not automatically saved. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	"	ldr r2, pxCurrentTCBConst						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr r1, [r2]									\n" /* Read pxCurrentTCB. */
-	"	str r0, [r1]									\n" /* Save the new top of stack in TCB. */
-	"													\n"
-	"	mov r0, %0										\n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
-	"	msr basepri, r0									\n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-	"	dsb												\n"
-	"	isb												\n"
-	"	bl vTaskSwitchContext							\n"
-	"	mov r0, #0										\n" /* r0 = 0. */
-	"	msr basepri, r0									\n" /* Enable interrupts. */
-	"													\n"
-	"	ldr r2, pxCurrentTCBConst						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr r1, [r2]									\n" /* Read pxCurrentTCB. */
-	"	ldr r0, [r1]									\n" /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	dmb												\n" /* Complete outstanding transfers before disabling MPU. */
-	"	ldr r2, xMPUCTRLConst							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	bic r4, #1										\n" /* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Disable MPU. */
-	"													\n"
-	"	adds r1, #4										\n" /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
-	"	ldr r3, [r1]									\n" /* r3 = *r1 i.e. r3 = MAIR0. */
-	"	ldr r2, xMAIR0Const								\n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-	"	str r3, [r2]									\n" /* Program MAIR0. */
-	"	ldr r2, xRNRConst								\n" /* r2 = 0xe000ed98 [Location of RNR]. */
-	"	movs r3, #4										\n" /* r3 = 4. */
-	"	str r3, [r2]									\n" /* Program RNR = 4. */
-	"	adds r1, #4										\n" /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
-	"	ldr r2, xRBARConst								\n" /* r2 = 0xe000ed9c [Location of RBAR]. */
-	"	ldmia r1!, {r4-r11}								\n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
-	"	stmia r2!, {r4-r11}								\n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-	"													\n"
-	"	ldr r2, xMPUCTRLConst							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	orr r4, #1										\n" /* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Enable MPU. */
-	"	dsb												\n" /* Force memory writes before continuing. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	ldmia r0!, {r1-r11}								\n" /* Read from stack - r1 = PSPLIM, r2 = CONTROL, r3 = LR and r4-r11 restored. */
-	#else /* configENABLE_MPU */
-	"	ldmia r0!, {r2-r11}								\n" /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	#if( configENABLE_FPU == 1 )
-	"	tst r3, #0x10									\n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
-	"	it eq											\n"
-	"	vldmiaeq r0!, {s16-s31}							\n" /* Restore the FPU registers which are not restored automatically. */
-	#endif /* configENABLE_FPU */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	msr psplim, r1									\n" /* Restore the PSPLIM register value for the task. */
-	"	msr control, r2									\n" /* Restore the CONTROL register value for the task. */
-	#else /* configENABLE_MPU */
-	"	msr psplim, r2									\n" /* Restore the PSPLIM register value for the task. */
-	#endif /* configENABLE_MPU */
-	"	msr psp, r0										\n" /* Remember the new top of stack for the task. */
-	"	bx r3											\n"
-	"													\n"
-	"	.align 4										\n"
-	"pxCurrentTCBConst: .word pxCurrentTCB				\n"
-	#if( configENABLE_MPU == 1 )
-	"xMPUCTRLConst: .word 0xe000ed94					\n"
-	"xMAIR0Const: .word 0xe000edc0						\n"
-	"xRNRConst: .word 0xe000ed98						\n"
-	"xRBARConst: .word 0xe000ed9c						\n"
-	#endif /* configENABLE_MPU */
-	:: "i"( configMAX_SYSCALL_INTERRUPT_PRIORITY )
-	);
+    __asm volatile
+    (
+        "	.syntax unified									\n"
+        "													\n"
+        "	mrs r0, psp										\n"/* Read PSP in r0. */
+        #if ( configENABLE_FPU == 1 )
+            "	tst lr, #0x10									\n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
+            "	it eq											\n"
+            "	vstmdbeq r0!, {s16-s31}							\n"/* Store the FPU registers which are not saved automatically. */
+        #endif /* configENABLE_FPU */
+        #if ( configENABLE_MPU == 1 )
+            "	mrs r1, psplim									\n"/* r1 = PSPLIM. */
+            "	mrs r2, control									\n"/* r2 = CONTROL. */
+            "	mov r3, lr										\n"/* r3 = LR/EXC_RETURN. */
+            "	stmdb r0!, {r1-r11}								\n"/* Store on the stack - PSPLIM, CONTROL, LR and registers that are not automatically saved. */
+        #else /* configENABLE_MPU */
+            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
+            "	mov r3, lr										\n"/* r3 = LR/EXC_RETURN. */
+            "	stmdb r0!, {r2-r11}								\n"/* Store on the stack - PSPLIM, LR and registers that are not automatically saved. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        "	ldr r2, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr r1, [r2]									\n"/* Read pxCurrentTCB. */
+        "	str r0, [r1]									\n"/* Save the new top of stack in TCB. */
+        "													\n"
+        "	mov r0, %0										\n"/* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
+        "	msr basepri, r0									\n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+        "	dsb												\n"
+        "	isb												\n"
+        "	bl vTaskSwitchContext							\n"
+        "	mov r0, #0										\n"/* r0 = 0. */
+        "	msr basepri, r0									\n"/* Enable interrupts. */
+        "													\n"
+        "	ldr r2, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr r1, [r2]									\n"/* Read pxCurrentTCB. */
+        "	ldr r0, [r1]									\n"/* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	dmb												\n"/* Complete outstanding transfers before disabling MPU. */
+            "	ldr r2, xMPUCTRLConst							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	bic r4, #1										\n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
+            "	str r4, [r2]									\n"/* Disable MPU. */
+            "													\n"
+            "	adds r1, #4										\n"/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
+            "	ldr r3, [r1]									\n"/* r3 = *r1 i.e. r3 = MAIR0. */
+            "	ldr r2, xMAIR0Const								\n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "	str r3, [r2]									\n"/* Program MAIR0. */
+            "	ldr r2, xRNRConst								\n"/* r2 = 0xe000ed98 [Location of RNR]. */
+            "	movs r3, #4										\n"/* r3 = 4. */
+            "	str r3, [r2]									\n"/* Program RNR = 4. */
+            "	adds r1, #4										\n"/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
+            "	ldr r2, xRBARConst								\n"/* r2 = 0xe000ed9c [Location of RBAR]. */
+            "	ldmia r1!, {r4-r11}								\n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
+            "	stmia r2!, {r4-r11}								\n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "													\n"
+            "	ldr r2, xMPUCTRLConst							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	orr r4, #1										\n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
+            "	str r4, [r2]									\n"/* Enable MPU. */
+            "	dsb												\n"/* Force memory writes before continuing. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	ldmia r0!, {r1-r11}								\n"/* Read from stack - r1 = PSPLIM, r2 = CONTROL, r3 = LR and r4-r11 restored. */
+        #else /* configENABLE_MPU */
+            "	ldmia r0!, {r2-r11}								\n"/* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        #if ( configENABLE_FPU == 1 )
+            "	tst r3, #0x10									\n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
+            "	it eq											\n"
+            "	vldmiaeq r0!, {s16-s31}							\n"/* Restore the FPU registers which are not restored automatically. */
+        #endif /* configENABLE_FPU */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	msr psplim, r1									\n"/* Restore the PSPLIM register value for the task. */
+            "	msr control, r2									\n"/* Restore the CONTROL register value for the task. */
+        #else /* configENABLE_MPU */
+            "	msr psplim, r2									\n"/* Restore the PSPLIM register value for the task. */
+        #endif /* configENABLE_MPU */
+        "	msr psp, r0										\n"/* Remember the new top of stack for the task. */
+        "	bx r3											\n"
+        "													\n"
+        "	.align 4										\n"
+        "pxCurrentTCBConst: .word pxCurrentTCB				\n"
+        #if ( configENABLE_MPU == 1 )
+            "xMPUCTRLConst: .word 0xe000ed94					\n"
+            "xMAIR0Const: .word 0xe000edc0						\n"
+            "xRNRConst: .word 0xe000ed98						\n"
+            "xRBARConst: .word 0xe000ed9c						\n"
+        #endif /* configENABLE_MPU */
+        ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
+    );
 }
 /*-----------------------------------------------------------*/
 
 void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	tst lr, #4										\n"
-	"	ite eq											\n"
-	"	mrseq r0, msp									\n"
-	"	mrsne r0, psp									\n"
-	"	ldr r1, svchandler_address_const				\n"
-	"	bx r1											\n"
-	"													\n"
-	"	.align 4										\n"
-	"svchandler_address_const: .word vPortSVCHandler_C	\n"
-	);
+    __asm volatile
+    (
+        "	tst lr, #4										\n"
+        "	ite eq											\n"
+        "	mrseq r0, msp									\n"
+        "	mrsne r0, psp									\n"
+        "	ldr r1, svchandler_address_const				\n"
+        "	bx r1											\n"
+        "													\n"
+        "	.align 4										\n"
+        "svchandler_address_const: .word vPortSVCHandler_C	\n"
+    );
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h
index d2c849c77..851c22c8a 100644
--- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h
+++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,18 +19,18 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*------------------------------------------------------------------------------
  * Port specific definitions.
@@ -42,109 +42,109 @@ extern "C" {
  *------------------------------------------------------------------------------
  */
 
-#ifndef configENABLE_FPU
-	#error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
-#endif /* configENABLE_FPU */
+    #ifndef configENABLE_FPU
+        #error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
+    #endif /* configENABLE_FPU */
 
-#ifndef configENABLE_MPU
-	#error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
-#endif /* configENABLE_MPU */
+    #ifndef configENABLE_MPU
+        #error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
+    #endif /* configENABLE_MPU */
 
-#ifndef configENABLE_TRUSTZONE
-	#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
-#endif /* configENABLE_TRUSTZONE */
+    #ifndef configENABLE_TRUSTZONE
+        #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
+    #endif /* configENABLE_TRUSTZONE */
 
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Type definitions.
  */
-#define portCHAR											char
-#define portFLOAT											float
-#define portDOUBLE											double
-#define portLONG											long
-#define portSHORT											short
-#define portSTACK_TYPE										uint32_t
-#define portBASE_TYPE										long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE										StackType_t;
-typedef long												BaseType_t;
-typedef unsigned long										UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	 * not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC							1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * Architecture specifics.
  */
-#define portARCH_NAME										"Cortex-M33"
-#define portSTACK_GROWTH									( -1 )
-#define portTICK_PERIOD_MS									( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT									8
-#define portNOP()
-#define portINLINE											__inline
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE								inline __attribute__(( always_inline ))
-#endif
-#define portHAS_STACK_OVERFLOW_CHECKING						1
-#define portDONT_DISCARD									__attribute__(( used ))
+    #define portARCH_NAME                      "Cortex-M33"
+    #define portSTACK_GROWTH                   ( -1 )
+    #define portTICK_PERIOD_MS                 ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT                 8
+    #define portNOP()
+    #define portINLINE                         __inline
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE               inline __attribute__( ( always_inline ) )
+    #endif
+    #define portHAS_STACK_OVERFLOW_CHECKING    1
+    #define portDONT_DISCARD                   __attribute__( ( used ) )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Extern declarations.
  */
-extern BaseType_t xPortIsInsideInterrupt( void );
+    extern BaseType_t xPortIsInsideInterrupt( void );
 
-extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
 
-extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
-extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
 
-extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
 
-#if( configENABLE_TRUSTZONE == 1 )
-	extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
-	extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
-#endif /* configENABLE_TRUSTZONE */
+    #if ( configENABLE_TRUSTZONE == 1 )
+        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
+        extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
+    #endif /* configENABLE_TRUSTZONE */
 
-#if( configENABLE_MPU == 1 )
-	extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
-	extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
+        extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief MPU specific constants.
  */
-#if( configENABLE_MPU == 1 )
-	#define portUSING_MPU_WRAPPERS							1
-	#define portPRIVILEGE_BIT								( 0x80000000UL )
-#else
-	#define portPRIVILEGE_BIT								( 0x0UL )
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        #define portUSING_MPU_WRAPPERS    1
+        #define portPRIVILEGE_BIT         ( 0x80000000UL )
+    #else
+        #define portPRIVILEGE_BIT         ( 0x0UL )
+    #endif /* configENABLE_MPU */
 
 
 /* MPU regions. */
-#define portPRIVILEGED_FLASH_REGION							( 0UL )
-#define portUNPRIVILEGED_FLASH_REGION						( 1UL )
-#define portUNPRIVILEGED_SYSCALLS_REGION					( 2UL )
-#define portPRIVILEGED_RAM_REGION							( 3UL )
-#define portSTACK_REGION									( 4UL )
-#define portFIRST_CONFIGURABLE_REGION						( 5UL )
-#define portLAST_CONFIGURABLE_REGION						( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS						( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS								( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
+    #define portPRIVILEGED_FLASH_REGION                   ( 0UL )
+    #define portUNPRIVILEGED_FLASH_REGION                 ( 1UL )
+    #define portUNPRIVILEGED_SYSCALLS_REGION              ( 2UL )
+    #define portPRIVILEGED_RAM_REGION                     ( 3UL )
+    #define portSTACK_REGION                              ( 4UL )
+    #define portFIRST_CONFIGURABLE_REGION                 ( 5UL )
+    #define portLAST_CONFIGURABLE_REGION                  ( 7UL )
+    #define portNUM_CONFIGURABLE_REGIONS                  ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
+    #define portTOTAL_NUM_REGIONS                         ( portNUM_CONFIGURABLE_REGIONS + 1 )   /* Plus one to make space for the stack region. */
 
 /* Device memory attributes used in MPU_MAIR registers.
  *
@@ -156,155 +156,157 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
  *				11 --> Device-GRE
  *  Bit[1:0] - 00, Reserved.
  */
-#define portMPU_DEVICE_MEMORY_nGnRnE						( 0x00 ) /* 0000 0000 */
-#define portMPU_DEVICE_MEMORY_nGnRE							( 0x04 ) /* 0000 0100 */
-#define portMPU_DEVICE_MEMORY_nGRE							( 0x08 ) /* 0000 1000 */
-#define portMPU_DEVICE_MEMORY_GRE							( 0x0C ) /* 0000 1100 */
+    #define portMPU_DEVICE_MEMORY_nGnRnE                  ( 0x00 )   /* 0000 0000 */
+    #define portMPU_DEVICE_MEMORY_nGnRE                   ( 0x04 )   /* 0000 0100 */
+    #define portMPU_DEVICE_MEMORY_nGRE                    ( 0x08 )   /* 0000 1000 */
+    #define portMPU_DEVICE_MEMORY_GRE                     ( 0x0C )   /* 0000 1100 */
 
 /* Normal memory attributes used in MPU_MAIR registers. */
-#define portMPU_NORMAL_MEMORY_NON_CACHEABLE					( 0x44 ) /* Non-cacheable. */
-#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE			( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
+    #define portMPU_NORMAL_MEMORY_NON_CACHEABLE           ( 0x44 )   /* Non-cacheable. */
+    #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE    ( 0xFF )   /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
 
 /* Attributes used in MPU_RBAR registers. */
-#define portMPU_REGION_NON_SHAREABLE						( 0UL << 3UL )
-#define portMPU_REGION_INNER_SHAREABLE						( 1UL << 3UL )
-#define portMPU_REGION_OUTER_SHAREABLE						( 2UL << 3UL )
+    #define portMPU_REGION_NON_SHAREABLE                  ( 0UL << 3UL )
+    #define portMPU_REGION_INNER_SHAREABLE                ( 1UL << 3UL )
+    #define portMPU_REGION_OUTER_SHAREABLE                ( 2UL << 3UL )
 
-#define portMPU_REGION_PRIVILEGED_READ_WRITE				( 0UL << 1UL )
-#define portMPU_REGION_READ_WRITE							( 1UL << 1UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY					( 2UL << 1UL )
-#define portMPU_REGION_READ_ONLY							( 3UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_WRITE          ( 0UL << 1UL )
+    #define portMPU_REGION_READ_WRITE                     ( 1UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_ONLY           ( 2UL << 1UL )
+    #define portMPU_REGION_READ_ONLY                      ( 3UL << 1UL )
 
-#define portMPU_REGION_EXECUTE_NEVER						( 1UL )
+    #define portMPU_REGION_EXECUTE_NEVER                  ( 1UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Settings to define an MPU region.
  */
-typedef struct MPURegionSettings
-{
-	uint32_t ulRBAR;	/**< RBAR for the region. */
-	uint32_t ulRLAR;	/**< RLAR for the region. */
-} MPURegionSettings_t;
+    typedef struct MPURegionSettings
+    {
+        uint32_t ulRBAR; /**< RBAR for the region. */
+        uint32_t ulRLAR; /**< RLAR for the region. */
+    } MPURegionSettings_t;
 
 /**
  * @brief MPU settings as stored in the TCB.
  */
-typedef struct MPU_SETTINGS
-{
-	uint32_t ulMAIR0;	/**< MAIR0 for the task containing attributes for all the 4 per task regions. */
-	MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
-} xMPU_SETTINGS;
+    typedef struct MPU_SETTINGS
+    {
+        uint32_t ulMAIR0;                                              /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
+        MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
+    } xMPU_SETTINGS;
 /*-----------------------------------------------------------*/
 
 /**
  * @brief SVC numbers.
  */
-#define portSVC_ALLOCATE_SECURE_CONTEXT						0
-#define portSVC_FREE_SECURE_CONTEXT							1
-#define portSVC_START_SCHEDULER								2
-#define portSVC_RAISE_PRIVILEGE								3
+    #define portSVC_ALLOCATE_SECURE_CONTEXT    0
+    #define portSVC_FREE_SECURE_CONTEXT        1
+    #define portSVC_START_SCHEDULER            2
+    #define portSVC_RAISE_PRIVILEGE            3
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Scheduler utilities.
  */
-#define portYIELD()											vPortYield()
-#define portNVIC_INT_CTRL_REG								( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT								( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired )			if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x )								portEND_SWITCHING_ISR( x )
+    #define portYIELD()                                 vPortYield()
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Critical section management.
  */
-#define portSET_INTERRUPT_MASK_FROM_ISR()					ulSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)				vClearInterruptMask( x )
-#define portDISABLE_INTERRUPTS()							ulSetInterruptMask()
-#define portENABLE_INTERRUPTS()								vClearInterruptMask( 0 )
-#define portENTER_CRITICAL()								vPortEnterCritical()
-#define portEXIT_CRITICAL()									vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulSetInterruptMask()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vClearInterruptMask( x )
+    #define portDISABLE_INTERRUPTS()                  ulSetInterruptMask()
+    #define portENABLE_INTERRUPTS()                   vClearInterruptMask( 0 )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Tickless idle/low power functionality.
  */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Task function macros as described on the FreeRTOS.org WEB site.
  */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters )		void vFunction( void *pvParameters )
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Allocate a secure context for the task.
-	 *
-	 * Tasks are not created with a secure context. Any task that is going to call
-	 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
-	 * secure context before it calls any secure function.
-	 *
-	 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
-	 */
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )	vPortAllocateSecureContext( ulSecureStackSize )
+    #if ( configENABLE_TRUSTZONE == 1 )
 
-	/**
-	 * @brief Called when a task is deleted to delete the task's secure context,
-	 * if it has one.
-	 *
-	 * @param[in] pxTCB The TCB of the task being deleted.
-	 */
-	#define portCLEAN_UP_TCB( pxTCB )							vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-#else
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-	#define portCLEAN_UP_TCB( pxTCB )
-#endif /* configENABLE_TRUSTZONE */
+/**
+ * @brief Allocate a secure context for the task.
+ *
+ * Tasks are not created with a secure context. Any task that is going to call
+ * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
+ * secure context before it calls any secure function.
+ *
+ * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
+ */
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )    vPortAllocateSecureContext( ulSecureStackSize )
+
+/**
+ * @brief Called when a task is deleted to delete the task's secure context,
+ * if it has one.
+ *
+ * @param[in] pxTCB The TCB of the task being deleted.
+ */
+        #define portCLEAN_UP_TCB( pxTCB )                           vPortFreeSecureContext( ( uint32_t * ) pxTCB )
+    #else
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
+        #define portCLEAN_UP_TCB( pxTCB )
+    #endif /* configENABLE_TRUSTZONE */
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Checks whether or not the processor is privileged.
-	 *
-	 * @return 1 if the processor is already privileged, 0 otherwise.
-	 */
-	#define portIS_PRIVILEGED()									xIsPrivileged()
+    #if ( configENABLE_MPU == 1 )
 
-	/**
-	 * @brief Raise an SVC request to raise privilege.
-	 *
-	 * The SVC handler checks that the SVC was raised from a system call and only
-	 * then it raises the privilege. If this is called from any other place,
-	 * the privilege is not raised.
-	 */
-	#define portRAISE_PRIVILEGE()								__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+/**
+ * @brief Checks whether or not the processor is privileged.
+ *
+ * @return 1 if the processor is already privileged, 0 otherwise.
+ */
+        #define portIS_PRIVILEGED()      xIsPrivileged()
 
-	/**
-	 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
-	 * register.
-	 */
-	#define portRESET_PRIVILEGE()								vResetPrivilege()
-#else
-	#define portIS_PRIVILEGED()
-	#define portRAISE_PRIVILEGE()
-	#define portRESET_PRIVILEGE()
-#endif /* configENABLE_MPU */
+/**
+ * @brief Raise an SVC request to raise privilege.
+ *
+ * The SVC handler checks that the SVC was raised from a system call and only
+ * then it raises the privilege. If this is called from any other place,
+ * the privilege is not raised.
+ */
+        #define portRAISE_PRIVILEGE()    __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+
+/**
+ * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
+ * register.
+ */
+        #define portRESET_PRIVILEGE()    vResetPrivilege()
+    #else
+        #define portIS_PRIVILEGED()
+        #define portRAISE_PRIVILEGE()
+        #define portRESET_PRIVILEGE()
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Barriers.
  */
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
+    #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
 /*-----------------------------------------------------------*/
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s
index 65360e90e..1703d85df 100644
--- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s
+++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h
index badf77062..e0346c4d3 100644
--- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h
+++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,18 +19,18 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*------------------------------------------------------------------------------
  * Port specific definitions.
@@ -42,109 +42,109 @@ extern "C" {
  *------------------------------------------------------------------------------
  */
 
-#ifndef configENABLE_FPU
-	#error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
-#endif /* configENABLE_FPU */
+    #ifndef configENABLE_FPU
+        #error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
+    #endif /* configENABLE_FPU */
 
-#ifndef configENABLE_MPU
-	#error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
-#endif /* configENABLE_MPU */
+    #ifndef configENABLE_MPU
+        #error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
+    #endif /* configENABLE_MPU */
 
-#ifndef configENABLE_TRUSTZONE
-	#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
-#endif /* configENABLE_TRUSTZONE */
+    #ifndef configENABLE_TRUSTZONE
+        #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
+    #endif /* configENABLE_TRUSTZONE */
 
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Type definitions.
  */
-#define portCHAR											char
-#define portFLOAT											float
-#define portDOUBLE											double
-#define portLONG											long
-#define portSHORT											short
-#define portSTACK_TYPE										uint32_t
-#define portBASE_TYPE										long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE										StackType_t;
-typedef long												BaseType_t;
-typedef unsigned long										UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	 * not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC							1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * Architecture specifics.
  */
-#define portARCH_NAME										"Cortex-M23"
-#define portSTACK_GROWTH									( -1 )
-#define portTICK_PERIOD_MS									( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT									8
-#define portNOP()
-#define portINLINE											__inline
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE								inline __attribute__(( always_inline ))
-#endif
-#define portHAS_STACK_OVERFLOW_CHECKING						1
-#define portDONT_DISCARD									__root
+    #define portARCH_NAME                      "Cortex-M23"
+    #define portSTACK_GROWTH                   ( -1 )
+    #define portTICK_PERIOD_MS                 ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT                 8
+    #define portNOP()
+    #define portINLINE                         __inline
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE               inline __attribute__( ( always_inline ) )
+    #endif
+    #define portHAS_STACK_OVERFLOW_CHECKING    1
+    #define portDONT_DISCARD                   __root
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Extern declarations.
  */
-extern BaseType_t xPortIsInsideInterrupt( void );
+    extern BaseType_t xPortIsInsideInterrupt( void );
 
-extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
 
-extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
-extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
 
-extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
 
-#if( configENABLE_TRUSTZONE == 1 )
-	extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
-	extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
-#endif /* configENABLE_TRUSTZONE */
+    #if ( configENABLE_TRUSTZONE == 1 )
+        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
+        extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
+    #endif /* configENABLE_TRUSTZONE */
 
-#if( configENABLE_MPU == 1 )
-	extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
-	extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
+        extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief MPU specific constants.
  */
-#if( configENABLE_MPU == 1 )
-	#define portUSING_MPU_WRAPPERS							1
-	#define portPRIVILEGE_BIT								( 0x80000000UL )
-#else
-	#define portPRIVILEGE_BIT								( 0x0UL )
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        #define portUSING_MPU_WRAPPERS    1
+        #define portPRIVILEGE_BIT         ( 0x80000000UL )
+    #else
+        #define portPRIVILEGE_BIT         ( 0x0UL )
+    #endif /* configENABLE_MPU */
 
 
 /* MPU regions. */
-#define portPRIVILEGED_FLASH_REGION							( 0UL )
-#define portUNPRIVILEGED_FLASH_REGION						( 1UL )
-#define portUNPRIVILEGED_SYSCALLS_REGION					( 2UL )
-#define portPRIVILEGED_RAM_REGION							( 3UL )
-#define portSTACK_REGION									( 4UL )
-#define portFIRST_CONFIGURABLE_REGION						( 5UL )
-#define portLAST_CONFIGURABLE_REGION						( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS						( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS								( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
+    #define portPRIVILEGED_FLASH_REGION                   ( 0UL )
+    #define portUNPRIVILEGED_FLASH_REGION                 ( 1UL )
+    #define portUNPRIVILEGED_SYSCALLS_REGION              ( 2UL )
+    #define portPRIVILEGED_RAM_REGION                     ( 3UL )
+    #define portSTACK_REGION                              ( 4UL )
+    #define portFIRST_CONFIGURABLE_REGION                 ( 5UL )
+    #define portLAST_CONFIGURABLE_REGION                  ( 7UL )
+    #define portNUM_CONFIGURABLE_REGIONS                  ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
+    #define portTOTAL_NUM_REGIONS                         ( portNUM_CONFIGURABLE_REGIONS + 1 )   /* Plus one to make space for the stack region. */
 
 /* Device memory attributes used in MPU_MAIR registers.
  *
@@ -156,162 +156,164 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
  *				11 --> Device-GRE
  *  Bit[1:0] - 00, Reserved.
  */
-#define portMPU_DEVICE_MEMORY_nGnRnE						( 0x00 ) /* 0000 0000 */
-#define portMPU_DEVICE_MEMORY_nGnRE							( 0x04 ) /* 0000 0100 */
-#define portMPU_DEVICE_MEMORY_nGRE							( 0x08 ) /* 0000 1000 */
-#define portMPU_DEVICE_MEMORY_GRE							( 0x0C ) /* 0000 1100 */
+    #define portMPU_DEVICE_MEMORY_nGnRnE                  ( 0x00 )   /* 0000 0000 */
+    #define portMPU_DEVICE_MEMORY_nGnRE                   ( 0x04 )   /* 0000 0100 */
+    #define portMPU_DEVICE_MEMORY_nGRE                    ( 0x08 )   /* 0000 1000 */
+    #define portMPU_DEVICE_MEMORY_GRE                     ( 0x0C )   /* 0000 1100 */
 
 /* Normal memory attributes used in MPU_MAIR registers. */
-#define portMPU_NORMAL_MEMORY_NON_CACHEABLE					( 0x44 ) /* Non-cacheable. */
-#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE			( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
+    #define portMPU_NORMAL_MEMORY_NON_CACHEABLE           ( 0x44 )   /* Non-cacheable. */
+    #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE    ( 0xFF )   /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
 
 /* Attributes used in MPU_RBAR registers. */
-#define portMPU_REGION_NON_SHAREABLE						( 0UL << 3UL )
-#define portMPU_REGION_INNER_SHAREABLE						( 1UL << 3UL )
-#define portMPU_REGION_OUTER_SHAREABLE						( 2UL << 3UL )
+    #define portMPU_REGION_NON_SHAREABLE                  ( 0UL << 3UL )
+    #define portMPU_REGION_INNER_SHAREABLE                ( 1UL << 3UL )
+    #define portMPU_REGION_OUTER_SHAREABLE                ( 2UL << 3UL )
 
-#define portMPU_REGION_PRIVILEGED_READ_WRITE				( 0UL << 1UL )
-#define portMPU_REGION_READ_WRITE							( 1UL << 1UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY					( 2UL << 1UL )
-#define portMPU_REGION_READ_ONLY							( 3UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_WRITE          ( 0UL << 1UL )
+    #define portMPU_REGION_READ_WRITE                     ( 1UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_ONLY           ( 2UL << 1UL )
+    #define portMPU_REGION_READ_ONLY                      ( 3UL << 1UL )
 
-#define portMPU_REGION_EXECUTE_NEVER						( 1UL )
+    #define portMPU_REGION_EXECUTE_NEVER                  ( 1UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Settings to define an MPU region.
  */
-typedef struct MPURegionSettings
-{
-	uint32_t ulRBAR;	/**< RBAR for the region. */
-	uint32_t ulRLAR;	/**< RLAR for the region. */
-} MPURegionSettings_t;
+    typedef struct MPURegionSettings
+    {
+        uint32_t ulRBAR; /**< RBAR for the region. */
+        uint32_t ulRLAR; /**< RLAR for the region. */
+    } MPURegionSettings_t;
 
 /**
  * @brief MPU settings as stored in the TCB.
  */
-typedef struct MPU_SETTINGS
-{
-	uint32_t ulMAIR0;	/**< MAIR0 for the task containing attributes for all the 4 per task regions. */
-	MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
-} xMPU_SETTINGS;
+    typedef struct MPU_SETTINGS
+    {
+        uint32_t ulMAIR0;                                              /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
+        MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
+    } xMPU_SETTINGS;
 /*-----------------------------------------------------------*/
 
 /**
  * @brief SVC numbers.
  */
-#define portSVC_ALLOCATE_SECURE_CONTEXT						0
-#define portSVC_FREE_SECURE_CONTEXT							1
-#define portSVC_START_SCHEDULER								2
-#define portSVC_RAISE_PRIVILEGE								3
+    #define portSVC_ALLOCATE_SECURE_CONTEXT    0
+    #define portSVC_FREE_SECURE_CONTEXT        1
+    #define portSVC_START_SCHEDULER            2
+    #define portSVC_RAISE_PRIVILEGE            3
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Scheduler utilities.
  */
-#define portYIELD()											vPortYield()
-#define portNVIC_INT_CTRL_REG								( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT								( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired )			if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x )								portEND_SWITCHING_ISR( x )
+    #define portYIELD()                                 vPortYield()
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Tickless idle/low power functionality.
  */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Critical section management.
  */
-#define portSET_INTERRUPT_MASK_FROM_ISR()					ulSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)				vClearInterruptMask( x )
-#define portDISABLE_INTERRUPTS()							__asm volatile ( " cpsid i " ::: "memory" )
-#define portENABLE_INTERRUPTS()								__asm volatile ( " cpsie i " ::: "memory" )
-#define portENTER_CRITICAL()								vPortEnterCritical()
-#define portEXIT_CRITICAL()									vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulSetInterruptMask()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vClearInterruptMask( x )
+    #define portDISABLE_INTERRUPTS()                  __asm volatile ( " cpsid i " ::: "memory" )
+    #define portENABLE_INTERRUPTS()                   __asm volatile ( " cpsie i " ::: "memory" )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Task function macros as described on the FreeRTOS.org WEB site.
  */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters )		void vFunction( void *pvParameters )
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Allocate a secure context for the task.
-	 *
-	 * Tasks are not created with a secure context. Any task that is going to call
-	 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
-	 * secure context before it calls any secure function.
-	 *
-	 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
-	 */
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )	vPortAllocateSecureContext( ulSecureStackSize )
+    #if ( configENABLE_TRUSTZONE == 1 )
 
-	/**
-	 * @brief Called when a task is deleted to delete the task's secure context,
-	 * if it has one.
-	 *
-	 * @param[in] pxTCB The TCB of the task being deleted.
-	 */
-	#define portCLEAN_UP_TCB( pxTCB )							vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-#else
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-	#define portCLEAN_UP_TCB( pxTCB )
-#endif /* configENABLE_TRUSTZONE */
+/**
+ * @brief Allocate a secure context for the task.
+ *
+ * Tasks are not created with a secure context. Any task that is going to call
+ * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
+ * secure context before it calls any secure function.
+ *
+ * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
+ */
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )    vPortAllocateSecureContext( ulSecureStackSize )
+
+/**
+ * @brief Called when a task is deleted to delete the task's secure context,
+ * if it has one.
+ *
+ * @param[in] pxTCB The TCB of the task being deleted.
+ */
+        #define portCLEAN_UP_TCB( pxTCB )                           vPortFreeSecureContext( ( uint32_t * ) pxTCB )
+    #else
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
+        #define portCLEAN_UP_TCB( pxTCB )
+    #endif /* configENABLE_TRUSTZONE */
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Checks whether or not the processor is privileged.
-	 *
-	 * @return 1 if the processor is already privileged, 0 otherwise.
-	 */
-	#define portIS_PRIVILEGED()									xIsPrivileged()
+    #if ( configENABLE_MPU == 1 )
 
-	/**
-	 * @brief Raise an SVC request to raise privilege.
-	 *
-	 * The SVC handler checks that the SVC was raised from a system call and only
-	 * then it raises the privilege. If this is called from any other place,
-	 * the privilege is not raised.
-	 */
-	#define portRAISE_PRIVILEGE()								__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+/**
+ * @brief Checks whether or not the processor is privileged.
+ *
+ * @return 1 if the processor is already privileged, 0 otherwise.
+ */
+        #define portIS_PRIVILEGED()      xIsPrivileged()
 
-	/**
-	 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
-	 * register.
-	 */
-	#define portRESET_PRIVILEGE()								vResetPrivilege()
-#else
-	#define portIS_PRIVILEGED()
-	#define portRAISE_PRIVILEGE()
-	#define portRESET_PRIVILEGE()
-#endif /* configENABLE_MPU */
+/**
+ * @brief Raise an SVC request to raise privilege.
+ *
+ * The SVC handler checks that the SVC was raised from a system call and only
+ * then it raises the privilege. If this is called from any other place,
+ * the privilege is not raised.
+ */
+        #define portRAISE_PRIVILEGE()    __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+
+/**
+ * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
+ * register.
+ */
+        #define portRESET_PRIVILEGE()    vResetPrivilege()
+    #else
+        #define portIS_PRIVILEGED()
+        #define portRAISE_PRIVILEGE()
+        #define portRESET_PRIVILEGE()
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Barriers.
  */
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
+    #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
 /*-----------------------------------------------------------*/
 
 /* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
  * the source code because to do so would cause other compilers to generate
  * warnings. */
-#pragma diag_suppress=Be006
-#pragma diag_suppress=Pa082
+    #pragma diag_suppress=Be006
+    #pragma diag_suppress=Pa082
 /*-----------------------------------------------------------*/
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s
index 61eb269c0..6068e3d05 100644
--- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s
+++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h
index b4598d526..7c6955817 100644
--- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h
+++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,18 +19,18 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*------------------------------------------------------------------------------
  * Port specific definitions.
@@ -42,109 +42,109 @@ extern "C" {
  *------------------------------------------------------------------------------
  */
 
-#ifndef configENABLE_FPU
-	#error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
-#endif /* configENABLE_FPU */
+    #ifndef configENABLE_FPU
+        #error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
+    #endif /* configENABLE_FPU */
 
-#ifndef configENABLE_MPU
-	#error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
-#endif /* configENABLE_MPU */
+    #ifndef configENABLE_MPU
+        #error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
+    #endif /* configENABLE_MPU */
 
-#ifndef configENABLE_TRUSTZONE
-	#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
-#endif /* configENABLE_TRUSTZONE */
+    #ifndef configENABLE_TRUSTZONE
+        #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
+    #endif /* configENABLE_TRUSTZONE */
 
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Type definitions.
  */
-#define portCHAR											char
-#define portFLOAT											float
-#define portDOUBLE											double
-#define portLONG											long
-#define portSHORT											short
-#define portSTACK_TYPE										uint32_t
-#define portBASE_TYPE										long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE										StackType_t;
-typedef long												BaseType_t;
-typedef unsigned long										UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	 * not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC							1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * Architecture specifics.
  */
-#define portARCH_NAME										"Cortex-M23"
-#define portSTACK_GROWTH									( -1 )
-#define portTICK_PERIOD_MS									( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT									8
-#define portNOP()
-#define portINLINE											__inline
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE								inline __attribute__(( always_inline ))
-#endif
-#define portHAS_STACK_OVERFLOW_CHECKING						1
-#define portDONT_DISCARD									__root
+    #define portARCH_NAME                      "Cortex-M23"
+    #define portSTACK_GROWTH                   ( -1 )
+    #define portTICK_PERIOD_MS                 ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT                 8
+    #define portNOP()
+    #define portINLINE                         __inline
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE               inline __attribute__( ( always_inline ) )
+    #endif
+    #define portHAS_STACK_OVERFLOW_CHECKING    1
+    #define portDONT_DISCARD                   __root
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Extern declarations.
  */
-extern BaseType_t xPortIsInsideInterrupt( void );
+    extern BaseType_t xPortIsInsideInterrupt( void );
 
-extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
 
-extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
-extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
 
-extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
 
-#if( configENABLE_TRUSTZONE == 1 )
-	extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
-	extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
-#endif /* configENABLE_TRUSTZONE */
+    #if ( configENABLE_TRUSTZONE == 1 )
+        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
+        extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
+    #endif /* configENABLE_TRUSTZONE */
 
-#if( configENABLE_MPU == 1 )
-	extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
-	extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
+        extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief MPU specific constants.
  */
-#if( configENABLE_MPU == 1 )
-	#define portUSING_MPU_WRAPPERS							1
-	#define portPRIVILEGE_BIT								( 0x80000000UL )
-#else
-	#define portPRIVILEGE_BIT								( 0x0UL )
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        #define portUSING_MPU_WRAPPERS    1
+        #define portPRIVILEGE_BIT         ( 0x80000000UL )
+    #else
+        #define portPRIVILEGE_BIT         ( 0x0UL )
+    #endif /* configENABLE_MPU */
 
 
 /* MPU regions. */
-#define portPRIVILEGED_FLASH_REGION							( 0UL )
-#define portUNPRIVILEGED_FLASH_REGION						( 1UL )
-#define portUNPRIVILEGED_SYSCALLS_REGION					( 2UL )
-#define portPRIVILEGED_RAM_REGION							( 3UL )
-#define portSTACK_REGION									( 4UL )
-#define portFIRST_CONFIGURABLE_REGION						( 5UL )
-#define portLAST_CONFIGURABLE_REGION						( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS						( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS								( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
+    #define portPRIVILEGED_FLASH_REGION                   ( 0UL )
+    #define portUNPRIVILEGED_FLASH_REGION                 ( 1UL )
+    #define portUNPRIVILEGED_SYSCALLS_REGION              ( 2UL )
+    #define portPRIVILEGED_RAM_REGION                     ( 3UL )
+    #define portSTACK_REGION                              ( 4UL )
+    #define portFIRST_CONFIGURABLE_REGION                 ( 5UL )
+    #define portLAST_CONFIGURABLE_REGION                  ( 7UL )
+    #define portNUM_CONFIGURABLE_REGIONS                  ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
+    #define portTOTAL_NUM_REGIONS                         ( portNUM_CONFIGURABLE_REGIONS + 1 )   /* Plus one to make space for the stack region. */
 
 /* Device memory attributes used in MPU_MAIR registers.
  *
@@ -156,162 +156,164 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
  *				11 --> Device-GRE
  *  Bit[1:0] - 00, Reserved.
  */
-#define portMPU_DEVICE_MEMORY_nGnRnE						( 0x00 ) /* 0000 0000 */
-#define portMPU_DEVICE_MEMORY_nGnRE							( 0x04 ) /* 0000 0100 */
-#define portMPU_DEVICE_MEMORY_nGRE							( 0x08 ) /* 0000 1000 */
-#define portMPU_DEVICE_MEMORY_GRE							( 0x0C ) /* 0000 1100 */
+    #define portMPU_DEVICE_MEMORY_nGnRnE                  ( 0x00 )   /* 0000 0000 */
+    #define portMPU_DEVICE_MEMORY_nGnRE                   ( 0x04 )   /* 0000 0100 */
+    #define portMPU_DEVICE_MEMORY_nGRE                    ( 0x08 )   /* 0000 1000 */
+    #define portMPU_DEVICE_MEMORY_GRE                     ( 0x0C )   /* 0000 1100 */
 
 /* Normal memory attributes used in MPU_MAIR registers. */
-#define portMPU_NORMAL_MEMORY_NON_CACHEABLE					( 0x44 ) /* Non-cacheable. */
-#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE			( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
+    #define portMPU_NORMAL_MEMORY_NON_CACHEABLE           ( 0x44 )   /* Non-cacheable. */
+    #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE    ( 0xFF )   /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
 
 /* Attributes used in MPU_RBAR registers. */
-#define portMPU_REGION_NON_SHAREABLE						( 0UL << 3UL )
-#define portMPU_REGION_INNER_SHAREABLE						( 1UL << 3UL )
-#define portMPU_REGION_OUTER_SHAREABLE						( 2UL << 3UL )
+    #define portMPU_REGION_NON_SHAREABLE                  ( 0UL << 3UL )
+    #define portMPU_REGION_INNER_SHAREABLE                ( 1UL << 3UL )
+    #define portMPU_REGION_OUTER_SHAREABLE                ( 2UL << 3UL )
 
-#define portMPU_REGION_PRIVILEGED_READ_WRITE				( 0UL << 1UL )
-#define portMPU_REGION_READ_WRITE							( 1UL << 1UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY					( 2UL << 1UL )
-#define portMPU_REGION_READ_ONLY							( 3UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_WRITE          ( 0UL << 1UL )
+    #define portMPU_REGION_READ_WRITE                     ( 1UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_ONLY           ( 2UL << 1UL )
+    #define portMPU_REGION_READ_ONLY                      ( 3UL << 1UL )
 
-#define portMPU_REGION_EXECUTE_NEVER						( 1UL )
+    #define portMPU_REGION_EXECUTE_NEVER                  ( 1UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Settings to define an MPU region.
  */
-typedef struct MPURegionSettings
-{
-	uint32_t ulRBAR;	/**< RBAR for the region. */
-	uint32_t ulRLAR;	/**< RLAR for the region. */
-} MPURegionSettings_t;
+    typedef struct MPURegionSettings
+    {
+        uint32_t ulRBAR; /**< RBAR for the region. */
+        uint32_t ulRLAR; /**< RLAR for the region. */
+    } MPURegionSettings_t;
 
 /**
  * @brief MPU settings as stored in the TCB.
  */
-typedef struct MPU_SETTINGS
-{
-	uint32_t ulMAIR0;	/**< MAIR0 for the task containing attributes for all the 4 per task regions. */
-	MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
-} xMPU_SETTINGS;
+    typedef struct MPU_SETTINGS
+    {
+        uint32_t ulMAIR0;                                              /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
+        MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
+    } xMPU_SETTINGS;
 /*-----------------------------------------------------------*/
 
 /**
  * @brief SVC numbers.
  */
-#define portSVC_ALLOCATE_SECURE_CONTEXT						0
-#define portSVC_FREE_SECURE_CONTEXT							1
-#define portSVC_START_SCHEDULER								2
-#define portSVC_RAISE_PRIVILEGE								3
+    #define portSVC_ALLOCATE_SECURE_CONTEXT    0
+    #define portSVC_FREE_SECURE_CONTEXT        1
+    #define portSVC_START_SCHEDULER            2
+    #define portSVC_RAISE_PRIVILEGE            3
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Scheduler utilities.
  */
-#define portYIELD()											vPortYield()
-#define portNVIC_INT_CTRL_REG								( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT								( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired )			if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x )								portEND_SWITCHING_ISR( x )
+    #define portYIELD()                                 vPortYield()
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Critical section management.
  */
-#define portSET_INTERRUPT_MASK_FROM_ISR()					ulSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)				vClearInterruptMask( x )
-#define portDISABLE_INTERRUPTS()							__asm volatile ( " cpsid i " ::: "memory" )
-#define portENABLE_INTERRUPTS()								__asm volatile ( " cpsie i " ::: "memory" )
-#define portENTER_CRITICAL()								vPortEnterCritical()
-#define portEXIT_CRITICAL()									vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulSetInterruptMask()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vClearInterruptMask( x )
+    #define portDISABLE_INTERRUPTS()                  __asm volatile ( " cpsid i " ::: "memory" )
+    #define portENABLE_INTERRUPTS()                   __asm volatile ( " cpsie i " ::: "memory" )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Tickless idle/low power functionality.
  */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Task function macros as described on the FreeRTOS.org WEB site.
  */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters )		void vFunction( void *pvParameters )
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Allocate a secure context for the task.
-	 *
-	 * Tasks are not created with a secure context. Any task that is going to call
-	 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
-	 * secure context before it calls any secure function.
-	 *
-	 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
-	 */
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )	vPortAllocateSecureContext( ulSecureStackSize )
+    #if ( configENABLE_TRUSTZONE == 1 )
 
-	/**
-	 * @brief Called when a task is deleted to delete the task's secure context,
-	 * if it has one.
-	 *
-	 * @param[in] pxTCB The TCB of the task being deleted.
-	 */
-	#define portCLEAN_UP_TCB( pxTCB )							vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-#else
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-	#define portCLEAN_UP_TCB( pxTCB )
-#endif /* configENABLE_TRUSTZONE */
+/**
+ * @brief Allocate a secure context for the task.
+ *
+ * Tasks are not created with a secure context. Any task that is going to call
+ * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
+ * secure context before it calls any secure function.
+ *
+ * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
+ */
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )    vPortAllocateSecureContext( ulSecureStackSize )
+
+/**
+ * @brief Called when a task is deleted to delete the task's secure context,
+ * if it has one.
+ *
+ * @param[in] pxTCB The TCB of the task being deleted.
+ */
+        #define portCLEAN_UP_TCB( pxTCB )                           vPortFreeSecureContext( ( uint32_t * ) pxTCB )
+    #else
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
+        #define portCLEAN_UP_TCB( pxTCB )
+    #endif /* configENABLE_TRUSTZONE */
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Checks whether or not the processor is privileged.
-	 *
-	 * @return 1 if the processor is already privileged, 0 otherwise.
-	 */
-	#define portIS_PRIVILEGED()									xIsPrivileged()
+    #if ( configENABLE_MPU == 1 )
 
-	/**
-	 * @brief Raise an SVC request to raise privilege.
-	 *
-	 * The SVC handler checks that the SVC was raised from a system call and only
-	 * then it raises the privilege. If this is called from any other place,
-	 * the privilege is not raised.
-	 */
-	#define portRAISE_PRIVILEGE()								__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+/**
+ * @brief Checks whether or not the processor is privileged.
+ *
+ * @return 1 if the processor is already privileged, 0 otherwise.
+ */
+        #define portIS_PRIVILEGED()      xIsPrivileged()
 
-	/**
-	 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
-	 * register.
-	 */
-	#define portRESET_PRIVILEGE()								vResetPrivilege()
-#else
-	#define portIS_PRIVILEGED()
-	#define portRAISE_PRIVILEGE()
-	#define portRESET_PRIVILEGE()
-#endif /* configENABLE_MPU */
+/**
+ * @brief Raise an SVC request to raise privilege.
+ *
+ * The SVC handler checks that the SVC was raised from a system call and only
+ * then it raises the privilege. If this is called from any other place,
+ * the privilege is not raised.
+ */
+        #define portRAISE_PRIVILEGE()    __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+
+/**
+ * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
+ * register.
+ */
+        #define portRESET_PRIVILEGE()    vResetPrivilege()
+    #else
+        #define portIS_PRIVILEGED()
+        #define portRAISE_PRIVILEGE()
+        #define portRESET_PRIVILEGE()
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Barriers.
  */
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
+    #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
 /*-----------------------------------------------------------*/
 
 /* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
  * the source code because to do so would cause other compilers to generate
  * warnings. */
-#pragma diag_suppress=Be006
-#pragma diag_suppress=Pa082
+    #pragma diag_suppress=Be006
+    #pragma diag_suppress=Pa082
 /*-----------------------------------------------------------*/
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s
index 639e2a8e1..35d644fc5 100644
--- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s
+++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h
index 316213bfc..0a98de418 100644
--- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h
+++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,18 +19,18 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*------------------------------------------------------------------------------
  * Port specific definitions.
@@ -42,109 +42,109 @@ extern "C" {
  *------------------------------------------------------------------------------
  */
 
-#ifndef configENABLE_FPU
-	#error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
-#endif /* configENABLE_FPU */
+    #ifndef configENABLE_FPU
+        #error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
+    #endif /* configENABLE_FPU */
 
-#ifndef configENABLE_MPU
-	#error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
-#endif /* configENABLE_MPU */
+    #ifndef configENABLE_MPU
+        #error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
+    #endif /* configENABLE_MPU */
 
-#ifndef configENABLE_TRUSTZONE
-	#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
-#endif /* configENABLE_TRUSTZONE */
+    #ifndef configENABLE_TRUSTZONE
+        #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
+    #endif /* configENABLE_TRUSTZONE */
 
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Type definitions.
  */
-#define portCHAR											char
-#define portFLOAT											float
-#define portDOUBLE											double
-#define portLONG											long
-#define portSHORT											short
-#define portSTACK_TYPE										uint32_t
-#define portBASE_TYPE										long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE										StackType_t;
-typedef long												BaseType_t;
-typedef unsigned long										UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	 * not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC							1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * Architecture specifics.
  */
-#define portARCH_NAME										"Cortex-M33"
-#define portSTACK_GROWTH									( -1 )
-#define portTICK_PERIOD_MS									( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT									8
-#define portNOP()
-#define portINLINE											__inline
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE								inline __attribute__(( always_inline ))
-#endif
-#define portHAS_STACK_OVERFLOW_CHECKING						1
-#define portDONT_DISCARD									__root
+    #define portARCH_NAME                      "Cortex-M33"
+    #define portSTACK_GROWTH                   ( -1 )
+    #define portTICK_PERIOD_MS                 ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT                 8
+    #define portNOP()
+    #define portINLINE                         __inline
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE               inline __attribute__( ( always_inline ) )
+    #endif
+    #define portHAS_STACK_OVERFLOW_CHECKING    1
+    #define portDONT_DISCARD                   __root
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Extern declarations.
  */
-extern BaseType_t xPortIsInsideInterrupt( void );
+    extern BaseType_t xPortIsInsideInterrupt( void );
 
-extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
 
-extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
-extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
 
-extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
 
-#if( configENABLE_TRUSTZONE == 1 )
-	extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
-	extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
-#endif /* configENABLE_TRUSTZONE */
+    #if ( configENABLE_TRUSTZONE == 1 )
+        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
+        extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
+    #endif /* configENABLE_TRUSTZONE */
 
-#if( configENABLE_MPU == 1 )
-	extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
-	extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
+        extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief MPU specific constants.
  */
-#if( configENABLE_MPU == 1 )
-	#define portUSING_MPU_WRAPPERS							1
-	#define portPRIVILEGE_BIT								( 0x80000000UL )
-#else
-	#define portPRIVILEGE_BIT								( 0x0UL )
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        #define portUSING_MPU_WRAPPERS    1
+        #define portPRIVILEGE_BIT         ( 0x80000000UL )
+    #else
+        #define portPRIVILEGE_BIT         ( 0x0UL )
+    #endif /* configENABLE_MPU */
 
 
 /* MPU regions. */
-#define portPRIVILEGED_FLASH_REGION							( 0UL )
-#define portUNPRIVILEGED_FLASH_REGION						( 1UL )
-#define portUNPRIVILEGED_SYSCALLS_REGION					( 2UL )
-#define portPRIVILEGED_RAM_REGION							( 3UL )
-#define portSTACK_REGION									( 4UL )
-#define portFIRST_CONFIGURABLE_REGION						( 5UL )
-#define portLAST_CONFIGURABLE_REGION						( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS						( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS								( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
+    #define portPRIVILEGED_FLASH_REGION                   ( 0UL )
+    #define portUNPRIVILEGED_FLASH_REGION                 ( 1UL )
+    #define portUNPRIVILEGED_SYSCALLS_REGION              ( 2UL )
+    #define portPRIVILEGED_RAM_REGION                     ( 3UL )
+    #define portSTACK_REGION                              ( 4UL )
+    #define portFIRST_CONFIGURABLE_REGION                 ( 5UL )
+    #define portLAST_CONFIGURABLE_REGION                  ( 7UL )
+    #define portNUM_CONFIGURABLE_REGIONS                  ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
+    #define portTOTAL_NUM_REGIONS                         ( portNUM_CONFIGURABLE_REGIONS + 1 )   /* Plus one to make space for the stack region. */
 
 /* Device memory attributes used in MPU_MAIR registers.
  *
@@ -156,162 +156,164 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
  *				11 --> Device-GRE
  *  Bit[1:0] - 00, Reserved.
  */
-#define portMPU_DEVICE_MEMORY_nGnRnE						( 0x00 ) /* 0000 0000 */
-#define portMPU_DEVICE_MEMORY_nGnRE							( 0x04 ) /* 0000 0100 */
-#define portMPU_DEVICE_MEMORY_nGRE							( 0x08 ) /* 0000 1000 */
-#define portMPU_DEVICE_MEMORY_GRE							( 0x0C ) /* 0000 1100 */
+    #define portMPU_DEVICE_MEMORY_nGnRnE                  ( 0x00 )   /* 0000 0000 */
+    #define portMPU_DEVICE_MEMORY_nGnRE                   ( 0x04 )   /* 0000 0100 */
+    #define portMPU_DEVICE_MEMORY_nGRE                    ( 0x08 )   /* 0000 1000 */
+    #define portMPU_DEVICE_MEMORY_GRE                     ( 0x0C )   /* 0000 1100 */
 
 /* Normal memory attributes used in MPU_MAIR registers. */
-#define portMPU_NORMAL_MEMORY_NON_CACHEABLE					( 0x44 ) /* Non-cacheable. */
-#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE			( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
+    #define portMPU_NORMAL_MEMORY_NON_CACHEABLE           ( 0x44 )   /* Non-cacheable. */
+    #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE    ( 0xFF )   /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
 
 /* Attributes used in MPU_RBAR registers. */
-#define portMPU_REGION_NON_SHAREABLE						( 0UL << 3UL )
-#define portMPU_REGION_INNER_SHAREABLE						( 1UL << 3UL )
-#define portMPU_REGION_OUTER_SHAREABLE						( 2UL << 3UL )
+    #define portMPU_REGION_NON_SHAREABLE                  ( 0UL << 3UL )
+    #define portMPU_REGION_INNER_SHAREABLE                ( 1UL << 3UL )
+    #define portMPU_REGION_OUTER_SHAREABLE                ( 2UL << 3UL )
 
-#define portMPU_REGION_PRIVILEGED_READ_WRITE				( 0UL << 1UL )
-#define portMPU_REGION_READ_WRITE							( 1UL << 1UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY					( 2UL << 1UL )
-#define portMPU_REGION_READ_ONLY							( 3UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_WRITE          ( 0UL << 1UL )
+    #define portMPU_REGION_READ_WRITE                     ( 1UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_ONLY           ( 2UL << 1UL )
+    #define portMPU_REGION_READ_ONLY                      ( 3UL << 1UL )
 
-#define portMPU_REGION_EXECUTE_NEVER						( 1UL )
+    #define portMPU_REGION_EXECUTE_NEVER                  ( 1UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Settings to define an MPU region.
  */
-typedef struct MPURegionSettings
-{
-	uint32_t ulRBAR;	/**< RBAR for the region. */
-	uint32_t ulRLAR;	/**< RLAR for the region. */
-} MPURegionSettings_t;
+    typedef struct MPURegionSettings
+    {
+        uint32_t ulRBAR; /**< RBAR for the region. */
+        uint32_t ulRLAR; /**< RLAR for the region. */
+    } MPURegionSettings_t;
 
 /**
  * @brief MPU settings as stored in the TCB.
  */
-typedef struct MPU_SETTINGS
-{
-	uint32_t ulMAIR0;	/**< MAIR0 for the task containing attributes for all the 4 per task regions. */
-	MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
-} xMPU_SETTINGS;
+    typedef struct MPU_SETTINGS
+    {
+        uint32_t ulMAIR0;                                              /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
+        MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
+    } xMPU_SETTINGS;
 /*-----------------------------------------------------------*/
 
 /**
  * @brief SVC numbers.
  */
-#define portSVC_ALLOCATE_SECURE_CONTEXT						0
-#define portSVC_FREE_SECURE_CONTEXT							1
-#define portSVC_START_SCHEDULER								2
-#define portSVC_RAISE_PRIVILEGE								3
+    #define portSVC_ALLOCATE_SECURE_CONTEXT    0
+    #define portSVC_FREE_SECURE_CONTEXT        1
+    #define portSVC_START_SCHEDULER            2
+    #define portSVC_RAISE_PRIVILEGE            3
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Scheduler utilities.
  */
-#define portYIELD()											vPortYield()
-#define portNVIC_INT_CTRL_REG								( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT								( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired )			if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x )								portEND_SWITCHING_ISR( x )
+    #define portYIELD()                                 vPortYield()
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Critical section management.
  */
-#define portSET_INTERRUPT_MASK_FROM_ISR()					ulSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)				vClearInterruptMask( x )
-#define portDISABLE_INTERRUPTS()							ulSetInterruptMask()
-#define portENABLE_INTERRUPTS()								vClearInterruptMask( 0 )
-#define portENTER_CRITICAL()								vPortEnterCritical()
-#define portEXIT_CRITICAL()									vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulSetInterruptMask()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vClearInterruptMask( x )
+    #define portDISABLE_INTERRUPTS()                  ulSetInterruptMask()
+    #define portENABLE_INTERRUPTS()                   vClearInterruptMask( 0 )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Tickless idle/low power functionality.
  */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Task function macros as described on the FreeRTOS.org WEB site.
  */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters )		void vFunction( void *pvParameters )
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Allocate a secure context for the task.
-	 *
-	 * Tasks are not created with a secure context. Any task that is going to call
-	 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
-	 * secure context before it calls any secure function.
-	 *
-	 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
-	 */
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )	vPortAllocateSecureContext( ulSecureStackSize )
+    #if ( configENABLE_TRUSTZONE == 1 )
 
-	/**
-	 * @brief Called when a task is deleted to delete the task's secure context,
-	 * if it has one.
-	 *
-	 * @param[in] pxTCB The TCB of the task being deleted.
-	 */
-	#define portCLEAN_UP_TCB( pxTCB )							vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-#else
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-	#define portCLEAN_UP_TCB( pxTCB )
-#endif /* configENABLE_TRUSTZONE */
+/**
+ * @brief Allocate a secure context for the task.
+ *
+ * Tasks are not created with a secure context. Any task that is going to call
+ * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
+ * secure context before it calls any secure function.
+ *
+ * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
+ */
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )    vPortAllocateSecureContext( ulSecureStackSize )
+
+/**
+ * @brief Called when a task is deleted to delete the task's secure context,
+ * if it has one.
+ *
+ * @param[in] pxTCB The TCB of the task being deleted.
+ */
+        #define portCLEAN_UP_TCB( pxTCB )                           vPortFreeSecureContext( ( uint32_t * ) pxTCB )
+    #else
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
+        #define portCLEAN_UP_TCB( pxTCB )
+    #endif /* configENABLE_TRUSTZONE */
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Checks whether or not the processor is privileged.
-	 *
-	 * @return 1 if the processor is already privileged, 0 otherwise.
-	 */
-	#define portIS_PRIVILEGED()									xIsPrivileged()
+    #if ( configENABLE_MPU == 1 )
 
-	/**
-	 * @brief Raise an SVC request to raise privilege.
-	 *
-	 * The SVC handler checks that the SVC was raised from a system call and only
-	 * then it raises the privilege. If this is called from any other place,
-	 * the privilege is not raised.
-	 */
-	#define portRAISE_PRIVILEGE()								__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+/**
+ * @brief Checks whether or not the processor is privileged.
+ *
+ * @return 1 if the processor is already privileged, 0 otherwise.
+ */
+        #define portIS_PRIVILEGED()      xIsPrivileged()
 
-	/**
-	 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
-	 * register.
-	 */
-	#define portRESET_PRIVILEGE()								vResetPrivilege()
-#else
-	#define portIS_PRIVILEGED()
-	#define portRAISE_PRIVILEGE()
-	#define portRESET_PRIVILEGE()
-#endif /* configENABLE_MPU */
+/**
+ * @brief Raise an SVC request to raise privilege.
+ *
+ * The SVC handler checks that the SVC was raised from a system call and only
+ * then it raises the privilege. If this is called from any other place,
+ * the privilege is not raised.
+ */
+        #define portRAISE_PRIVILEGE()    __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+
+/**
+ * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
+ * register.
+ */
+        #define portRESET_PRIVILEGE()    vResetPrivilege()
+    #else
+        #define portIS_PRIVILEGED()
+        #define portRAISE_PRIVILEGE()
+        #define portRESET_PRIVILEGE()
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Barriers.
  */
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
+    #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
 /*-----------------------------------------------------------*/
 
 /* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
  * the source code because to do so would cause other compilers to generate
  * warnings. */
-#pragma diag_suppress=Be006
-#pragma diag_suppress=Pa082
+    #pragma diag_suppress=Be006
+    #pragma diag_suppress=Pa082
 /*-----------------------------------------------------------*/
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s
index 89ecbb7b0..3215f82e5 100644
--- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s
+++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h
index 316213bfc..0a98de418 100644
--- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h
+++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,18 +19,18 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*------------------------------------------------------------------------------
  * Port specific definitions.
@@ -42,109 +42,109 @@ extern "C" {
  *------------------------------------------------------------------------------
  */
 
-#ifndef configENABLE_FPU
-	#error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
-#endif /* configENABLE_FPU */
+    #ifndef configENABLE_FPU
+        #error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
+    #endif /* configENABLE_FPU */
 
-#ifndef configENABLE_MPU
-	#error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
-#endif /* configENABLE_MPU */
+    #ifndef configENABLE_MPU
+        #error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
+    #endif /* configENABLE_MPU */
 
-#ifndef configENABLE_TRUSTZONE
-	#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
-#endif /* configENABLE_TRUSTZONE */
+    #ifndef configENABLE_TRUSTZONE
+        #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
+    #endif /* configENABLE_TRUSTZONE */
 
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Type definitions.
  */
-#define portCHAR											char
-#define portFLOAT											float
-#define portDOUBLE											double
-#define portLONG											long
-#define portSHORT											short
-#define portSTACK_TYPE										uint32_t
-#define portBASE_TYPE										long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE										StackType_t;
-typedef long												BaseType_t;
-typedef unsigned long										UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	 * not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC							1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * Architecture specifics.
  */
-#define portARCH_NAME										"Cortex-M33"
-#define portSTACK_GROWTH									( -1 )
-#define portTICK_PERIOD_MS									( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT									8
-#define portNOP()
-#define portINLINE											__inline
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE								inline __attribute__(( always_inline ))
-#endif
-#define portHAS_STACK_OVERFLOW_CHECKING						1
-#define portDONT_DISCARD									__root
+    #define portARCH_NAME                      "Cortex-M33"
+    #define portSTACK_GROWTH                   ( -1 )
+    #define portTICK_PERIOD_MS                 ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT                 8
+    #define portNOP()
+    #define portINLINE                         __inline
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE               inline __attribute__( ( always_inline ) )
+    #endif
+    #define portHAS_STACK_OVERFLOW_CHECKING    1
+    #define portDONT_DISCARD                   __root
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Extern declarations.
  */
-extern BaseType_t xPortIsInsideInterrupt( void );
+    extern BaseType_t xPortIsInsideInterrupt( void );
 
-extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
 
-extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
-extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
 
-extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
 
-#if( configENABLE_TRUSTZONE == 1 )
-	extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
-	extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
-#endif /* configENABLE_TRUSTZONE */
+    #if ( configENABLE_TRUSTZONE == 1 )
+        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
+        extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
+    #endif /* configENABLE_TRUSTZONE */
 
-#if( configENABLE_MPU == 1 )
-	extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
-	extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
+        extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief MPU specific constants.
  */
-#if( configENABLE_MPU == 1 )
-	#define portUSING_MPU_WRAPPERS							1
-	#define portPRIVILEGE_BIT								( 0x80000000UL )
-#else
-	#define portPRIVILEGE_BIT								( 0x0UL )
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        #define portUSING_MPU_WRAPPERS    1
+        #define portPRIVILEGE_BIT         ( 0x80000000UL )
+    #else
+        #define portPRIVILEGE_BIT         ( 0x0UL )
+    #endif /* configENABLE_MPU */
 
 
 /* MPU regions. */
-#define portPRIVILEGED_FLASH_REGION							( 0UL )
-#define portUNPRIVILEGED_FLASH_REGION						( 1UL )
-#define portUNPRIVILEGED_SYSCALLS_REGION					( 2UL )
-#define portPRIVILEGED_RAM_REGION							( 3UL )
-#define portSTACK_REGION									( 4UL )
-#define portFIRST_CONFIGURABLE_REGION						( 5UL )
-#define portLAST_CONFIGURABLE_REGION						( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS						( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS								( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
+    #define portPRIVILEGED_FLASH_REGION                   ( 0UL )
+    #define portUNPRIVILEGED_FLASH_REGION                 ( 1UL )
+    #define portUNPRIVILEGED_SYSCALLS_REGION              ( 2UL )
+    #define portPRIVILEGED_RAM_REGION                     ( 3UL )
+    #define portSTACK_REGION                              ( 4UL )
+    #define portFIRST_CONFIGURABLE_REGION                 ( 5UL )
+    #define portLAST_CONFIGURABLE_REGION                  ( 7UL )
+    #define portNUM_CONFIGURABLE_REGIONS                  ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
+    #define portTOTAL_NUM_REGIONS                         ( portNUM_CONFIGURABLE_REGIONS + 1 )   /* Plus one to make space for the stack region. */
 
 /* Device memory attributes used in MPU_MAIR registers.
  *
@@ -156,162 +156,164 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
  *				11 --> Device-GRE
  *  Bit[1:0] - 00, Reserved.
  */
-#define portMPU_DEVICE_MEMORY_nGnRnE						( 0x00 ) /* 0000 0000 */
-#define portMPU_DEVICE_MEMORY_nGnRE							( 0x04 ) /* 0000 0100 */
-#define portMPU_DEVICE_MEMORY_nGRE							( 0x08 ) /* 0000 1000 */
-#define portMPU_DEVICE_MEMORY_GRE							( 0x0C ) /* 0000 1100 */
+    #define portMPU_DEVICE_MEMORY_nGnRnE                  ( 0x00 )   /* 0000 0000 */
+    #define portMPU_DEVICE_MEMORY_nGnRE                   ( 0x04 )   /* 0000 0100 */
+    #define portMPU_DEVICE_MEMORY_nGRE                    ( 0x08 )   /* 0000 1000 */
+    #define portMPU_DEVICE_MEMORY_GRE                     ( 0x0C )   /* 0000 1100 */
 
 /* Normal memory attributes used in MPU_MAIR registers. */
-#define portMPU_NORMAL_MEMORY_NON_CACHEABLE					( 0x44 ) /* Non-cacheable. */
-#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE			( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
+    #define portMPU_NORMAL_MEMORY_NON_CACHEABLE           ( 0x44 )   /* Non-cacheable. */
+    #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE    ( 0xFF )   /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
 
 /* Attributes used in MPU_RBAR registers. */
-#define portMPU_REGION_NON_SHAREABLE						( 0UL << 3UL )
-#define portMPU_REGION_INNER_SHAREABLE						( 1UL << 3UL )
-#define portMPU_REGION_OUTER_SHAREABLE						( 2UL << 3UL )
+    #define portMPU_REGION_NON_SHAREABLE                  ( 0UL << 3UL )
+    #define portMPU_REGION_INNER_SHAREABLE                ( 1UL << 3UL )
+    #define portMPU_REGION_OUTER_SHAREABLE                ( 2UL << 3UL )
 
-#define portMPU_REGION_PRIVILEGED_READ_WRITE				( 0UL << 1UL )
-#define portMPU_REGION_READ_WRITE							( 1UL << 1UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY					( 2UL << 1UL )
-#define portMPU_REGION_READ_ONLY							( 3UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_WRITE          ( 0UL << 1UL )
+    #define portMPU_REGION_READ_WRITE                     ( 1UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_ONLY           ( 2UL << 1UL )
+    #define portMPU_REGION_READ_ONLY                      ( 3UL << 1UL )
 
-#define portMPU_REGION_EXECUTE_NEVER						( 1UL )
+    #define portMPU_REGION_EXECUTE_NEVER                  ( 1UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Settings to define an MPU region.
  */
-typedef struct MPURegionSettings
-{
-	uint32_t ulRBAR;	/**< RBAR for the region. */
-	uint32_t ulRLAR;	/**< RLAR for the region. */
-} MPURegionSettings_t;
+    typedef struct MPURegionSettings
+    {
+        uint32_t ulRBAR; /**< RBAR for the region. */
+        uint32_t ulRLAR; /**< RLAR for the region. */
+    } MPURegionSettings_t;
 
 /**
  * @brief MPU settings as stored in the TCB.
  */
-typedef struct MPU_SETTINGS
-{
-	uint32_t ulMAIR0;	/**< MAIR0 for the task containing attributes for all the 4 per task regions. */
-	MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
-} xMPU_SETTINGS;
+    typedef struct MPU_SETTINGS
+    {
+        uint32_t ulMAIR0;                                              /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
+        MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
+    } xMPU_SETTINGS;
 /*-----------------------------------------------------------*/
 
 /**
  * @brief SVC numbers.
  */
-#define portSVC_ALLOCATE_SECURE_CONTEXT						0
-#define portSVC_FREE_SECURE_CONTEXT							1
-#define portSVC_START_SCHEDULER								2
-#define portSVC_RAISE_PRIVILEGE								3
+    #define portSVC_ALLOCATE_SECURE_CONTEXT    0
+    #define portSVC_FREE_SECURE_CONTEXT        1
+    #define portSVC_START_SCHEDULER            2
+    #define portSVC_RAISE_PRIVILEGE            3
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Scheduler utilities.
  */
-#define portYIELD()											vPortYield()
-#define portNVIC_INT_CTRL_REG								( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT								( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired )			if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x )								portEND_SWITCHING_ISR( x )
+    #define portYIELD()                                 vPortYield()
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Critical section management.
  */
-#define portSET_INTERRUPT_MASK_FROM_ISR()					ulSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)				vClearInterruptMask( x )
-#define portDISABLE_INTERRUPTS()							ulSetInterruptMask()
-#define portENABLE_INTERRUPTS()								vClearInterruptMask( 0 )
-#define portENTER_CRITICAL()								vPortEnterCritical()
-#define portEXIT_CRITICAL()									vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulSetInterruptMask()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vClearInterruptMask( x )
+    #define portDISABLE_INTERRUPTS()                  ulSetInterruptMask()
+    #define portENABLE_INTERRUPTS()                   vClearInterruptMask( 0 )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Tickless idle/low power functionality.
  */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Task function macros as described on the FreeRTOS.org WEB site.
  */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters )		void vFunction( void *pvParameters )
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Allocate a secure context for the task.
-	 *
-	 * Tasks are not created with a secure context. Any task that is going to call
-	 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
-	 * secure context before it calls any secure function.
-	 *
-	 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
-	 */
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )	vPortAllocateSecureContext( ulSecureStackSize )
+    #if ( configENABLE_TRUSTZONE == 1 )
 
-	/**
-	 * @brief Called when a task is deleted to delete the task's secure context,
-	 * if it has one.
-	 *
-	 * @param[in] pxTCB The TCB of the task being deleted.
-	 */
-	#define portCLEAN_UP_TCB( pxTCB )							vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-#else
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-	#define portCLEAN_UP_TCB( pxTCB )
-#endif /* configENABLE_TRUSTZONE */
+/**
+ * @brief Allocate a secure context for the task.
+ *
+ * Tasks are not created with a secure context. Any task that is going to call
+ * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
+ * secure context before it calls any secure function.
+ *
+ * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
+ */
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )    vPortAllocateSecureContext( ulSecureStackSize )
+
+/**
+ * @brief Called when a task is deleted to delete the task's secure context,
+ * if it has one.
+ *
+ * @param[in] pxTCB The TCB of the task being deleted.
+ */
+        #define portCLEAN_UP_TCB( pxTCB )                           vPortFreeSecureContext( ( uint32_t * ) pxTCB )
+    #else
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
+        #define portCLEAN_UP_TCB( pxTCB )
+    #endif /* configENABLE_TRUSTZONE */
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Checks whether or not the processor is privileged.
-	 *
-	 * @return 1 if the processor is already privileged, 0 otherwise.
-	 */
-	#define portIS_PRIVILEGED()									xIsPrivileged()
+    #if ( configENABLE_MPU == 1 )
 
-	/**
-	 * @brief Raise an SVC request to raise privilege.
-	 *
-	 * The SVC handler checks that the SVC was raised from a system call and only
-	 * then it raises the privilege. If this is called from any other place,
-	 * the privilege is not raised.
-	 */
-	#define portRAISE_PRIVILEGE()								__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+/**
+ * @brief Checks whether or not the processor is privileged.
+ *
+ * @return 1 if the processor is already privileged, 0 otherwise.
+ */
+        #define portIS_PRIVILEGED()      xIsPrivileged()
 
-	/**
-	 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
-	 * register.
-	 */
-	#define portRESET_PRIVILEGE()								vResetPrivilege()
-#else
-	#define portIS_PRIVILEGED()
-	#define portRAISE_PRIVILEGE()
-	#define portRESET_PRIVILEGE()
-#endif /* configENABLE_MPU */
+/**
+ * @brief Raise an SVC request to raise privilege.
+ *
+ * The SVC handler checks that the SVC was raised from a system call and only
+ * then it raises the privilege. If this is called from any other place,
+ * the privilege is not raised.
+ */
+        #define portRAISE_PRIVILEGE()    __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+
+/**
+ * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
+ * register.
+ */
+        #define portRESET_PRIVILEGE()    vResetPrivilege()
+    #else
+        #define portIS_PRIVILEGED()
+        #define portRAISE_PRIVILEGE()
+        #define portRESET_PRIVILEGE()
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Barriers.
  */
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
+    #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
 /*-----------------------------------------------------------*/
 
 /* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
  * the source code because to do so would cause other compilers to generate
  * warnings. */
-#pragma diag_suppress=Be006
-#pragma diag_suppress=Pa082
+    #pragma diag_suppress=Be006
+    #pragma diag_suppress=Pa082
 /*-----------------------------------------------------------*/
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
diff --git a/portable/ARMv8M/non_secure/portasm.h b/portable/ARMv8M/non_secure/portasm.h
index 71d711c69..6aaee8fc8 100644
--- a/portable/ARMv8M/non_secure/portasm.h
+++ b/portable/ARMv8M/non_secure/portasm.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -38,14 +38,14 @@
  * @brief Restore the context of the first task so that the first task starts
  * executing.
  */
-void vRestoreContextOfFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vRestoreContextOfFirstTask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Checks whether or not the processor is privileged.
  *
  * @return 1 if the processor is already privileged, 0 otherwise.
  */
-BaseType_t xIsPrivileged( void ) __attribute__ (( naked ));
+BaseType_t xIsPrivileged( void ) __attribute__( ( naked ) );
 
 /**
  * @brief Raises the privilege level by clearing the bit 0 of the CONTROL
@@ -58,7 +58,7 @@ BaseType_t xIsPrivileged( void ) __attribute__ (( naked ));
  *  Bit[0] = 0 --> The processor is running privileged
  *  Bit[0] = 1 --> The processor is running unprivileged.
  */
-void vRaisePrivilege( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vRaisePrivilege( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
@@ -68,32 +68,32 @@ void vRaisePrivilege( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
  *  Bit[0] = 0 --> The processor is running privileged
  *  Bit[0] = 1 --> The processor is running unprivileged.
  */
-void vResetPrivilege( void ) __attribute__ (( naked ));
+void vResetPrivilege( void ) __attribute__( ( naked ) );
 
 /**
  * @brief Starts the first task.
  */
-void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vStartFirstTask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Disables interrupts.
  */
-uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
+uint32_t ulSetInterruptMask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Enables interrupts.
  */
-void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
+void vClearInterruptMask( uint32_t ulMask ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief PendSV Exception handler.
  */
-void PendSV_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void PendSV_Handler( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief SVC Handler.
  */
-void SVC_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void SVC_Handler( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Allocate a Secure context for the calling task.
@@ -101,13 +101,13 @@ void SVC_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
  * @param[in] ulSecureStackSize The size of the stack to be allocated on the
  * secure side for the calling task.
  */
-void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) __attribute__ (( naked ));
+void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) __attribute__( ( naked ) );
 
 /**
  * @brief Free the task's secure context.
  *
  * @param[in] pulTCB Pointer to the Task Control Block (TCB) of the task.
  */
-void vPortFreeSecureContext( uint32_t *pulTCB ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vPortFreeSecureContext( uint32_t * pulTCB ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 #endif /* __PORT_ASM_H__ */
diff --git a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c
index 616cfd78e..747ceb5d8 100644
--- a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c
+++ b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -31,61 +31,61 @@
 /* Secure port macros. */
 #include "secure_port_macros.h"
 
-#if( configENABLE_FPU == 1 )
-	#error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
+#if ( configENABLE_FPU == 1 )
+    #error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
 #endif
 
 secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle )
 {
-	/* xSecureContextHandle value is in r0. */
-	__asm volatile
-	(
-	"	.syntax unified							\n"
-	"											\n"
-	"	mrs r1, ipsr							\n" /* r1 = IPSR. */
-	"	cbz r1, load_ctx_therad_mode			\n" /* Do nothing if the processor is running in the Thread Mode. */
-	"	ldmia r0!, {r1, r2}						\n" /* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */
-	#if( configENABLE_MPU == 1 )
-	"	ldmia r1!, {r3}							\n" /* Read CONTROL register value from task's stack. r3 = CONTROL. */
-	"	msr control, r3							\n" /* CONTROL = r3. */
-	#endif /* configENABLE_MPU */
-	"	msr psplim, r2							\n" /* PSPLIM = r2. */
-	"	msr psp, r1								\n" /* PSP = r1. */
-	"											\n"
-	" load_ctx_therad_mode:						\n"
-	"	nop										\n"
-	"											\n"
-	:::"r0", "r1", "r2"
-	);
+    /* xSecureContextHandle value is in r0. */
+    __asm volatile
+    (
+        "	.syntax unified							\n"
+        "											\n"
+        "	mrs r1, ipsr							\n"/* r1 = IPSR. */
+        "	cbz r1, load_ctx_therad_mode			\n"/* Do nothing if the processor is running in the Thread Mode. */
+        "	ldmia r0!, {r1, r2}						\n"/* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */
+        #if ( configENABLE_MPU == 1 )
+            "	ldmia r1!, {r3}							\n"/* Read CONTROL register value from task's stack. r3 = CONTROL. */
+            "	msr control, r3							\n"/* CONTROL = r3. */
+        #endif /* configENABLE_MPU */
+        "	msr psplim, r2							\n"/* PSPLIM = r2. */
+        "	msr psp, r1								\n"/* PSP = r1. */
+        "											\n"
+        " load_ctx_therad_mode:						\n"
+        "	nop										\n"
+        "											\n"
+        ::: "r0", "r1", "r2"
+    );
 }
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle )
 {
-	/* xSecureContextHandle value is in r0. */
-	__asm volatile
-	(
-	"	.syntax unified							\n"
-	"											\n"
-	"	mrs r1, ipsr							\n" /* r1 = IPSR. */
-	"	cbz r1, save_ctx_therad_mode			\n" /* Do nothing if the processor is running in the Thread Mode. */
-	"	mrs r1, psp								\n" /* r1 = PSP. */
-	#if( configENABLE_MPU == 1 )
-	"	mrs r2, control							\n" /* r2 = CONTROL. */
-	"	subs r1, r1, #4							\n" /* Make space for the CONTROL value on the stack. */
-	"	str r1, [r0]							\n" /* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
-	"	stmia r1!, {r2}							\n" /* Store CONTROL value on the stack. */
-	#else /* configENABLE_MPU */
-	"	str r1, [r0]							\n" /* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
-	#endif /* configENABLE_MPU */
-	"	movs r1, %0								\n" /* r1 = securecontextNO_STACK. */
-	"	msr psplim, r1							\n" /* PSPLIM = securecontextNO_STACK. */
-	"	msr psp, r1								\n" /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
-	"											\n"
-	" save_ctx_therad_mode:						\n"
-	"	nop										\n"
-	"											\n"
-	:: "i" ( securecontextNO_STACK ) : "r1", "memory"
-	);
+    /* xSecureContextHandle value is in r0. */
+    __asm volatile
+    (
+        "	.syntax unified							\n"
+        "											\n"
+        "	mrs r1, ipsr							\n"/* r1 = IPSR. */
+        "	cbz r1, save_ctx_therad_mode			\n"/* Do nothing if the processor is running in the Thread Mode. */
+        "	mrs r1, psp								\n"/* r1 = PSP. */
+        #if ( configENABLE_MPU == 1 )
+            "	mrs r2, control							\n"/* r2 = CONTROL. */
+            "	subs r1, r1, #4							\n"/* Make space for the CONTROL value on the stack. */
+            "	str r1, [r0]							\n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
+            "	stmia r1!, {r2}							\n"/* Store CONTROL value on the stack. */
+        #else /* configENABLE_MPU */
+            "	str r1, [r0]							\n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
+        #endif /* configENABLE_MPU */
+        "	movs r1, %0								\n"/* r1 = securecontextNO_STACK. */
+        "	msr psplim, r1							\n"/* PSPLIM = securecontextNO_STACK. */
+        "	msr psp, r1								\n"/* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
+        "											\n"
+        " save_ctx_therad_mode:						\n"
+        "	nop										\n"
+        "											\n"
+        ::"i" ( securecontextNO_STACK ) : "r1", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c
index 6b4bc50c7..d4d831e65 100644
--- a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c
+++ b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -33,56 +33,56 @@
 
 secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle )
 {
-	/* xSecureContextHandle value is in r0. */
-	__asm volatile
-	(
-	"	.syntax unified							\n"
-	"											\n"
-	"	mrs r1, ipsr							\n" /* r1 = IPSR. */
-	"	cbz r1, load_ctx_therad_mode			\n" /* Do nothing if the processor is running in the Thread Mode. */
-	"	ldmia r0!, {r1, r2}						\n" /* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */
-	#if( configENABLE_MPU == 1 )
-	"	ldmia r1!, {r3}							\n" /* Read CONTROL register value from task's stack. r3 = CONTROL. */
-	"	msr control, r3							\n" /* CONTROL = r3. */
-	#endif /* configENABLE_MPU */
-	"	msr psplim, r2							\n" /* PSPLIM = r2. */
-	"	msr psp, r1								\n" /* PSP = r1. */
-	"											\n"
-	" load_ctx_therad_mode:						\n"
-	"	nop										\n"
-	"											\n"
-	:::"r0", "r1", "r2"
-	);
+    /* xSecureContextHandle value is in r0. */
+    __asm volatile
+    (
+        "	.syntax unified							\n"
+        "											\n"
+        "	mrs r1, ipsr							\n"/* r1 = IPSR. */
+        "	cbz r1, load_ctx_therad_mode			\n"/* Do nothing if the processor is running in the Thread Mode. */
+        "	ldmia r0!, {r1, r2}						\n"/* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */
+        #if ( configENABLE_MPU == 1 )
+            "	ldmia r1!, {r3}							\n"/* Read CONTROL register value from task's stack. r3 = CONTROL. */
+            "	msr control, r3							\n"/* CONTROL = r3. */
+        #endif /* configENABLE_MPU */
+        "	msr psplim, r2							\n"/* PSPLIM = r2. */
+        "	msr psp, r1								\n"/* PSP = r1. */
+        "											\n"
+        " load_ctx_therad_mode:						\n"
+        "	nop										\n"
+        "											\n"
+        ::: "r0", "r1", "r2"
+    );
 }
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle )
 {
-	/* xSecureContextHandle value is in r0. */
-	__asm volatile
-	(
-	"	.syntax unified							\n"
-	"											\n"
-	"	mrs r1, ipsr							\n" /* r1 = IPSR. */
-	"	cbz r1, save_ctx_therad_mode			\n" /* Do nothing if the processor is running in the Thread Mode. */
-	"	mrs r1, psp								\n" /* r1 = PSP. */
-	#if( configENABLE_FPU == 1 )
-	"	vstmdb r1!, {s0}						\n" /* Trigger the defferred stacking of FPU registers. */
-	"	vldmia r1!, {s0}						\n" /* Nullify the effect of the pervious statement. */
-	#endif /* configENABLE_FPU */
-	#if( configENABLE_MPU == 1 )
-	"	mrs r2, control							\n" /* r2 = CONTROL. */
-	"	stmdb r1!, {r2}							\n" /* Store CONTROL value on the stack. */
-	#endif /* configENABLE_MPU */
-	"	str r1, [r0]							\n" /* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
-	"	movs r1, %0								\n" /* r1 = securecontextNO_STACK. */
-	"	msr psplim, r1							\n" /* PSPLIM = securecontextNO_STACK. */
-	"	msr psp, r1								\n" /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
-	"											\n"
-	" save_ctx_therad_mode:						\n"
-	"	nop										\n"
-	"											\n"
-	:: "i" ( securecontextNO_STACK ) : "r1", "memory"
-	);
+    /* xSecureContextHandle value is in r0. */
+    __asm volatile
+    (
+        "	.syntax unified							\n"
+        "											\n"
+        "	mrs r1, ipsr							\n"/* r1 = IPSR. */
+        "	cbz r1, save_ctx_therad_mode			\n"/* Do nothing if the processor is running in the Thread Mode. */
+        "	mrs r1, psp								\n"/* r1 = PSP. */
+        #if ( configENABLE_FPU == 1 )
+            "	vstmdb r1!, {s0}						\n"/* Trigger the defferred stacking of FPU registers. */
+            "	vldmia r1!, {s0}						\n"/* Nullify the effect of the pervious statement. */
+        #endif /* configENABLE_FPU */
+        #if ( configENABLE_MPU == 1 )
+            "	mrs r2, control							\n"/* r2 = CONTROL. */
+            "	stmdb r1!, {r2}							\n"/* Store CONTROL value on the stack. */
+        #endif /* configENABLE_MPU */
+        "	str r1, [r0]							\n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
+        "	movs r1, %0								\n"/* r1 = securecontextNO_STACK. */
+        "	msr psplim, r1							\n"/* PSPLIM = securecontextNO_STACK. */
+        "	msr psp, r1								\n"/* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
+        "											\n"
+        " save_ctx_therad_mode:						\n"
+        "	nop										\n"
+        "											\n"
+        ::"i" ( securecontextNO_STACK ) : "r1", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port.c b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port.c
index 5dc8e4847..5f11f45d0 100644
--- a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port.c
+++ b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -37,12 +37,12 @@ extern void SecureContext_SaveContextAsm( SecureContextHandle_t xSecureContextHa
 
 secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle )
 {
-	SecureContext_LoadContextAsm( xSecureContextHandle );
+    SecureContext_LoadContextAsm( xSecureContextHandle );
 }
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle )
 {
-	SecureContext_SaveContextAsm( xSecureContextHandle );
+    SecureContext_SaveContextAsm( xSecureContextHandle );
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s
index 02df8925c..eaf48b755 100644
--- a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s
+++ b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port.c b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port.c
index 5dc8e4847..5f11f45d0 100644
--- a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port.c
+++ b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -37,12 +37,12 @@ extern void SecureContext_SaveContextAsm( SecureContextHandle_t xSecureContextHa
 
 secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle )
 {
-	SecureContext_LoadContextAsm( xSecureContextHandle );
+    SecureContext_LoadContextAsm( xSecureContextHandle );
 }
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle )
 {
-	SecureContext_SaveContextAsm( xSecureContextHandle );
+    SecureContext_SaveContextAsm( xSecureContextHandle );
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s
index af49db1c4..899f7998c 100644
--- a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s
+++ b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/ARMv8M/secure/context/secure_context.c b/portable/ARMv8M/secure/context/secure_context.c
index 39fabbf60..59c09ed58 100644
--- a/portable/ARMv8M/secure/context/secure_context.c
+++ b/portable/ARMv8M/secure/context/secure_context.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -40,7 +40,7 @@
  * Bit[0] - 0 --> Thread mode is privileged.
  * Bit[1] - 1 --> Thread mode uses PSP.
  */
-#define securecontextCONTROL_VALUE_PRIVILEGED		0x02
+#define securecontextCONTROL_VALUE_PRIVILEGED      0x02
 
 /**
  * @brief CONTROL value for un-privileged tasks.
@@ -48,7 +48,7 @@
  * Bit[0] - 1 --> Thread mode is un-privileged.
  * Bit[1] - 1 --> Thread mode uses PSP.
  */
-#define securecontextCONTROL_VALUE_UNPRIVILEGED		0x03
+#define securecontextCONTROL_VALUE_UNPRIVILEGED    0x03
 /*-----------------------------------------------------------*/
 
 /**
@@ -59,146 +59,148 @@
  */
 typedef struct SecureContext
 {
-	uint8_t *pucCurrentStackPointer;	/**< Current value of stack pointer (PSP). */
-	uint8_t *pucStackLimit;				/**< Last location of the stack memory (PSPLIM). */
-	uint8_t *pucStackStart;				/**< First location of the stack memory. */
+    uint8_t * pucCurrentStackPointer; /**< Current value of stack pointer (PSP). */
+    uint8_t * pucStackLimit;          /**< Last location of the stack memory (PSPLIM). */
+    uint8_t * pucStackStart;          /**< First location of the stack memory. */
 } SecureContext_t;
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureContext_Init( void )
 {
-	uint32_t ulIPSR;
+    uint32_t ulIPSR;
 
-	/* Read the Interrupt Program Status Register (IPSR) value. */
-	secureportREAD_IPSR( ulIPSR );
+    /* Read the Interrupt Program Status Register (IPSR) value. */
+    secureportREAD_IPSR( ulIPSR );
 
-	/* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-	 * when the processor is running in the Thread Mode. */
-	if( ulIPSR != 0 )
-	{
-		/* No stack for thread mode until a task's context is loaded. */
-		secureportSET_PSPLIM( securecontextNO_STACK );
-		secureportSET_PSP( securecontextNO_STACK );
+    /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
+     * when the processor is running in the Thread Mode. */
+    if( ulIPSR != 0 )
+    {
+        /* No stack for thread mode until a task's context is loaded. */
+        secureportSET_PSPLIM( securecontextNO_STACK );
+        secureportSET_PSP( securecontextNO_STACK );
 
-		#if( configENABLE_MPU == 1 )
-		{
-			/* Configure thread mode to use PSP and to be unprivileged. */
-			secureportSET_CONTROL( securecontextCONTROL_VALUE_UNPRIVILEGED );
-		}
-		#else /* configENABLE_MPU */
-		{
-			/* Configure thread mode to use PSP and to be privileged.. */
-			secureportSET_CONTROL( securecontextCONTROL_VALUE_PRIVILEGED );
-		}
-		#endif /* configENABLE_MPU */
-	}
+        #if ( configENABLE_MPU == 1 )
+            {
+                /* Configure thread mode to use PSP and to be unprivileged. */
+                secureportSET_CONTROL( securecontextCONTROL_VALUE_UNPRIVILEGED );
+            }
+        #else /* configENABLE_MPU */
+            {
+                /* Configure thread mode to use PSP and to be privileged.. */
+                secureportSET_CONTROL( securecontextCONTROL_VALUE_PRIVILEGED );
+            }
+        #endif /* configENABLE_MPU */
+    }
 }
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, uint32_t ulIsTaskPrivileged )
+#if ( configENABLE_MPU == 1 )
+    secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize,
+                                                                                       uint32_t ulIsTaskPrivileged )
 #else /* configENABLE_MPU */
-	secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize )
+    secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize )
 #endif /* configENABLE_MPU */
 {
-	uint8_t *pucStackMemory = NULL;
-	uint32_t ulIPSR;
-	SecureContextHandle_t xSecureContextHandle = NULL;
-	#if( configENABLE_MPU == 1 )
-		uint32_t *pulCurrentStackPointer = NULL;
-	#endif /* configENABLE_MPU */
+    uint8_t * pucStackMemory = NULL;
+    uint32_t ulIPSR;
+    SecureContextHandle_t xSecureContextHandle = NULL;
 
-	/* Read the Interrupt Program Status Register (IPSR) value. */
-	secureportREAD_IPSR( ulIPSR );
+    #if ( configENABLE_MPU == 1 )
+        uint32_t * pulCurrentStackPointer = NULL;
+    #endif /* configENABLE_MPU */
 
-	/* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-	 * when the processor is running in the Thread Mode. */
-	if( ulIPSR != 0 )
-	{
-		/* Allocate the context structure. */
-		xSecureContextHandle = ( SecureContextHandle_t ) pvPortMalloc( sizeof( SecureContext_t ) );
+    /* Read the Interrupt Program Status Register (IPSR) value. */
+    secureportREAD_IPSR( ulIPSR );
 
-		if( xSecureContextHandle != NULL )
-		{
-			/* Allocate the stack space. */
-			pucStackMemory = pvPortMalloc( ulSecureStackSize );
+    /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
+     * when the processor is running in the Thread Mode. */
+    if( ulIPSR != 0 )
+    {
+        /* Allocate the context structure. */
+        xSecureContextHandle = ( SecureContextHandle_t ) pvPortMalloc( sizeof( SecureContext_t ) );
 
-			if( pucStackMemory != NULL )
-			{
-				/* Since stack grows down, the starting point will be the last
-				 * location. Note that this location is next to the last
-				 * allocated byte because the hardware decrements the stack
-				 * pointer before writing i.e. if stack pointer is 0x2, a push
-				 * operation will decrement the stack pointer to 0x1 and then
-				 * write at 0x1. */
-				xSecureContextHandle->pucStackStart = pucStackMemory + ulSecureStackSize;
+        if( xSecureContextHandle != NULL )
+        {
+            /* Allocate the stack space. */
+            pucStackMemory = pvPortMalloc( ulSecureStackSize );
 
-				/* The stack cannot go beyond this location. This value is
-				 * programmed in the PSPLIM register on context switch.*/
-				xSecureContextHandle->pucStackLimit = pucStackMemory;
+            if( pucStackMemory != NULL )
+            {
+                /* Since stack grows down, the starting point will be the last
+                 * location. Note that this location is next to the last
+                 * allocated byte because the hardware decrements the stack
+                 * pointer before writing i.e. if stack pointer is 0x2, a push
+                 * operation will decrement the stack pointer to 0x1 and then
+                 * write at 0x1. */
+                xSecureContextHandle->pucStackStart = pucStackMemory + ulSecureStackSize;
 
-				#if( configENABLE_MPU == 1 )
-				{
-					/* Store the correct CONTROL value for the task on the stack.
-					 * This value is programmed in the CONTROL register on
-					 * context switch. */
-					pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart;
-					pulCurrentStackPointer--;
-					if( ulIsTaskPrivileged )
-					{
-						*( pulCurrentStackPointer ) = securecontextCONTROL_VALUE_PRIVILEGED;
-					}
-					else
-					{
-						*( pulCurrentStackPointer ) = securecontextCONTROL_VALUE_UNPRIVILEGED;
-					}
+                /* The stack cannot go beyond this location. This value is
+                 * programmed in the PSPLIM register on context switch.*/
+                xSecureContextHandle->pucStackLimit = pucStackMemory;
 
-					/* Store the current stack pointer. This value is programmed in
-					 * the PSP register on context switch. */
-					xSecureContextHandle->pucCurrentStackPointer = ( uint8_t * ) pulCurrentStackPointer;
-				}
-				#else /* configENABLE_MPU */
-				{
-					/* Current SP is set to the starting of the stack. This
-					 * value programmed in the PSP register on context switch. */
-					xSecureContextHandle->pucCurrentStackPointer = xSecureContextHandle->pucStackStart;
+                #if ( configENABLE_MPU == 1 )
+                    {
+                        /* Store the correct CONTROL value for the task on the stack.
+                         * This value is programmed in the CONTROL register on
+                         * context switch. */
+                        pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart;
+                        pulCurrentStackPointer--;
 
-				}
-				#endif /* configENABLE_MPU */
-			}
-			else
-			{
-				/* Free the context to avoid memory leak and make sure to return
-				 * NULL to indicate failure. */
-				vPortFree( xSecureContextHandle );
-				xSecureContextHandle = NULL;
-			}
-		}
-	}
+                        if( ulIsTaskPrivileged )
+                        {
+                            *( pulCurrentStackPointer ) = securecontextCONTROL_VALUE_PRIVILEGED;
+                        }
+                        else
+                        {
+                            *( pulCurrentStackPointer ) = securecontextCONTROL_VALUE_UNPRIVILEGED;
+                        }
 
-	return xSecureContextHandle;
+                        /* Store the current stack pointer. This value is programmed in
+                         * the PSP register on context switch. */
+                        xSecureContextHandle->pucCurrentStackPointer = ( uint8_t * ) pulCurrentStackPointer;
+                    }
+                #else /* configENABLE_MPU */
+                    {
+                        /* Current SP is set to the starting of the stack. This
+                         * value programmed in the PSP register on context switch. */
+                        xSecureContextHandle->pucCurrentStackPointer = xSecureContextHandle->pucStackStart;
+                    }
+                #endif /* configENABLE_MPU */
+            }
+            else
+            {
+                /* Free the context to avoid memory leak and make sure to return
+                 * NULL to indicate failure. */
+                vPortFree( xSecureContextHandle );
+                xSecureContextHandle = NULL;
+            }
+        }
+    }
+
+    return xSecureContextHandle;
 }
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle )
 {
-	uint32_t ulIPSR;
+    uint32_t ulIPSR;
 
-	/* Read the Interrupt Program Status Register (IPSR) value. */
-	secureportREAD_IPSR( ulIPSR );
+    /* Read the Interrupt Program Status Register (IPSR) value. */
+    secureportREAD_IPSR( ulIPSR );
 
-	/* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-	 * when the processor is running in the Thread Mode. */
-	if( ulIPSR != 0 )
-	{
-		/* Ensure that valid parameters are passed. */
-		secureportASSERT( xSecureContextHandle != NULL );
+    /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
+     * when the processor is running in the Thread Mode. */
+    if( ulIPSR != 0 )
+    {
+        /* Ensure that valid parameters are passed. */
+        secureportASSERT( xSecureContextHandle != NULL );
 
-		/* Free the stack space. */
-		vPortFree( xSecureContextHandle->pucStackLimit );
+        /* Free the stack space. */
+        vPortFree( xSecureContextHandle->pucStackLimit );
 
-		/* Free the context itself. */
-		vPortFree( xSecureContextHandle );
-	}
+        /* Free the context itself. */
+        vPortFree( xSecureContextHandle );
+    }
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/ARMv8M/secure/context/secure_context.h b/portable/ARMv8M/secure/context/secure_context.h
index 747c2c6fd..681ac6916 100644
--- a/portable/ARMv8M/secure/context/secure_context.h
+++ b/portable/ARMv8M/secure/context/secure_context.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -37,13 +37,13 @@
 /**
  * @brief PSP value when no task's context is loaded.
  */
-#define securecontextNO_STACK	0x0
+#define securecontextNO_STACK    0x0
 
 /**
  * @brief Opaque handle.
  */
 struct SecureContext;
-typedef struct SecureContext*	SecureContextHandle_t;
+typedef struct SecureContext * SecureContextHandle_t;
 /*-----------------------------------------------------------*/
 
 /**
@@ -69,10 +69,11 @@ void SecureContext_Init( void );
  * @return Opaque context handle if context is successfully allocated, NULL
  * otherwise.
  */
-#if( configENABLE_MPU == 1 )
-	SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, uint32_t ulIsTaskPrivileged );
+#if ( configENABLE_MPU == 1 )
+    SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize,
+                                                         uint32_t ulIsTaskPrivileged );
 #else /* configENABLE_MPU */
-	SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize );
+    SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize );
 #endif /* configENABLE_MPU */
 
 /**
diff --git a/portable/ARMv8M/secure/heap/secure_heap.c b/portable/ARMv8M/secure/heap/secure_heap.c
index 7995a7f12..7c3227b18 100644
--- a/portable/ARMv8M/secure/heap/secure_heap.c
+++ b/portable/ARMv8M/secure/heap/secure_heap.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -37,37 +37,38 @@
 /**
  * @brief Total heap size.
  */
-#define secureconfigTOTAL_HEAP_SIZE		( ( ( size_t ) ( 10 * 1024 ) ) )
+#define secureconfigTOTAL_HEAP_SIZE    ( ( ( size_t ) ( 10 * 1024 ) ) )
 
 /* No test marker by default. */
 #ifndef mtCOVERAGE_TEST_MARKER
-	#define mtCOVERAGE_TEST_MARKER()
+    #define mtCOVERAGE_TEST_MARKER()
 #endif
 
 /* No tracing by default. */
 #ifndef traceMALLOC
-	#define traceMALLOC( pvReturn, xWantedSize )
+    #define traceMALLOC( pvReturn, xWantedSize )
 #endif
 
 /* No tracing by default. */
 #ifndef traceFREE
-	#define traceFREE( pv, xBlockSize )
+    #define traceFREE( pv, xBlockSize )
 #endif
 
 /* Block sizes must not get too small. */
-#define secureheapMINIMUM_BLOCK_SIZE	( ( size_t ) ( xHeapStructSize << 1 ) )
+#define secureheapMINIMUM_BLOCK_SIZE    ( ( size_t ) ( xHeapStructSize << 1 ) )
 
 /* Assumes 8bit bytes! */
-#define secureheapBITS_PER_BYTE			( ( size_t ) 8 )
+#define secureheapBITS_PER_BYTE         ( ( size_t ) 8 )
 /*-----------------------------------------------------------*/
 
 /* Allocate the memory for the heap. */
-#if( configAPPLICATION_ALLOCATED_HEAP == 1 )
-	/* The application writer has already defined the array used for the RTOS
-	 * heap - probably so it can be placed in a special segment or address. */
-	extern uint8_t ucHeap[ secureconfigTOTAL_HEAP_SIZE ];
+#if ( configAPPLICATION_ALLOCATED_HEAP == 1 )
+
+/* The application writer has already defined the array used for the RTOS
+* heap - probably so it can be placed in a special segment or address. */
+    extern uint8_t ucHeap[ secureconfigTOTAL_HEAP_SIZE ];
 #else /* configAPPLICATION_ALLOCATED_HEAP */
-	static uint8_t ucHeap[ secureconfigTOTAL_HEAP_SIZE ];
+    static uint8_t ucHeap[ secureconfigTOTAL_HEAP_SIZE ];
 #endif /* configAPPLICATION_ALLOCATED_HEAP */
 
 /**
@@ -77,8 +78,8 @@
  */
 typedef struct A_BLOCK_LINK
 {
-	struct A_BLOCK_LINK *pxNextFreeBlock;	/**< The next free block in the list. */
-	size_t xBlockSize;						/**< The size of the free block. */
+    struct A_BLOCK_LINK * pxNextFreeBlock; /**< The next free block in the list. */
+    size_t xBlockSize;                     /**< The size of the free block. */
 } BlockLink_t;
 /*-----------------------------------------------------------*/
 
@@ -97,7 +98,7 @@ static void prvHeapInit( void );
  *
  * @param[in] pxBlockToInsert The block being freed.
  */
-static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert );
+static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert );
 /*-----------------------------------------------------------*/
 
 /**
@@ -109,7 +110,7 @@ static const size_t xHeapStructSize = ( sizeof( BlockLink_t ) + ( ( size_t ) ( s
 /**
  * @brief Create a couple of list links to mark the start and end of the list.
  */
-static BlockLink_t xStart, *pxEnd = NULL;
+static BlockLink_t xStart, * pxEnd = NULL;
 
 /**
  * @brief Keeps track of the number of free bytes remaining, but says nothing
@@ -130,321 +131,324 @@ static size_t xBlockAllocatedBit = 0;
 
 static void prvHeapInit( void )
 {
-BlockLink_t *pxFirstFreeBlock;
-uint8_t *pucAlignedHeap;
-size_t uxAddress;
-size_t xTotalHeapSize = secureconfigTOTAL_HEAP_SIZE;
+    BlockLink_t * pxFirstFreeBlock;
+    uint8_t * pucAlignedHeap;
+    size_t uxAddress;
+    size_t xTotalHeapSize = secureconfigTOTAL_HEAP_SIZE;
 
-	/* Ensure the heap starts on a correctly aligned boundary. */
-	uxAddress = ( size_t ) ucHeap;
+    /* Ensure the heap starts on a correctly aligned boundary. */
+    uxAddress = ( size_t ) ucHeap;
 
-	if( ( uxAddress & secureportBYTE_ALIGNMENT_MASK ) != 0 )
-	{
-		uxAddress += ( secureportBYTE_ALIGNMENT - 1 );
-		uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK );
-		xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
-	}
+    if( ( uxAddress & secureportBYTE_ALIGNMENT_MASK ) != 0 )
+    {
+        uxAddress += ( secureportBYTE_ALIGNMENT - 1 );
+        uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK );
+        xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
+    }
 
-	pucAlignedHeap = ( uint8_t * ) uxAddress;
+    pucAlignedHeap = ( uint8_t * ) uxAddress;
 
-	/* xStart is used to hold a pointer to the first item in the list of free
-	 * blocks.  The void cast is used to prevent compiler warnings. */
-	xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
-	xStart.xBlockSize = ( size_t ) 0;
+    /* xStart is used to hold a pointer to the first item in the list of free
+     * blocks.  The void cast is used to prevent compiler warnings. */
+    xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
+    xStart.xBlockSize = ( size_t ) 0;
 
-	/* pxEnd is used to mark the end of the list of free blocks and is inserted
-	 * at the end of the heap space. */
-	uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
-	uxAddress -= xHeapStructSize;
-	uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK );
-	pxEnd = ( void * ) uxAddress;
-	pxEnd->xBlockSize = 0;
-	pxEnd->pxNextFreeBlock = NULL;
+    /* pxEnd is used to mark the end of the list of free blocks and is inserted
+     * at the end of the heap space. */
+    uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
+    uxAddress -= xHeapStructSize;
+    uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK );
+    pxEnd = ( void * ) uxAddress;
+    pxEnd->xBlockSize = 0;
+    pxEnd->pxNextFreeBlock = NULL;
 
-	/* To start with there is a single free block that is sized to take up the
-	 * entire heap space, minus the space taken by pxEnd. */
-	pxFirstFreeBlock = ( void * ) pucAlignedHeap;
-	pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
-	pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
+    /* To start with there is a single free block that is sized to take up the
+     * entire heap space, minus the space taken by pxEnd. */
+    pxFirstFreeBlock = ( void * ) pucAlignedHeap;
+    pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
+    pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
 
-	/* Only one block exists - and it covers the entire usable heap space. */
-	xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
-	xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
+    /* Only one block exists - and it covers the entire usable heap space. */
+    xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
+    xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
 
-	/* Work out the position of the top bit in a size_t variable. */
-	xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * secureheapBITS_PER_BYTE ) - 1 );
+    /* Work out the position of the top bit in a size_t variable. */
+    xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * secureheapBITS_PER_BYTE ) - 1 );
 }
 /*-----------------------------------------------------------*/
 
-static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert )
+static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert )
 {
-BlockLink_t *pxIterator;
-uint8_t *puc;
+    BlockLink_t * pxIterator;
+    uint8_t * puc;
 
-	/* Iterate through the list until a block is found that has a higher address
-	 * than the block being inserted. */
-	for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
-	{
-		/* Nothing to do here, just iterate to the right position. */
-	}
+    /* Iterate through the list until a block is found that has a higher address
+     * than the block being inserted. */
+    for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
+    {
+        /* Nothing to do here, just iterate to the right position. */
+    }
 
-	/* Do the block being inserted, and the block it is being inserted after
-	 * make a contiguous block of memory? */
-	puc = ( uint8_t * ) pxIterator;
-	if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
-	{
-		pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
-		pxBlockToInsert = pxIterator;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    /* Do the block being inserted, and the block it is being inserted after
+     * make a contiguous block of memory? */
+    puc = ( uint8_t * ) pxIterator;
 
-	/* Do the block being inserted, and the block it is being inserted before
-	 * make a contiguous block of memory? */
-	puc = ( uint8_t * ) pxBlockToInsert;
-	if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
-	{
-		if( pxIterator->pxNextFreeBlock != pxEnd )
-		{
-			/* Form one big block from the two blocks. */
-			pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
-			pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
-		}
-		else
-		{
-			pxBlockToInsert->pxNextFreeBlock = pxEnd;
-		}
-	}
-	else
-	{
-		pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
-	}
+    if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
+    {
+        pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
+        pxBlockToInsert = pxIterator;
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	/* If the block being inserted plugged a gab, so was merged with the block
-	 * before and the block after, then it's pxNextFreeBlock pointer will have
-	 * already been set, and should not be set here as that would make it point
-	 * to itself. */
-	if( pxIterator != pxBlockToInsert )
-	{
-		pxIterator->pxNextFreeBlock = pxBlockToInsert;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    /* Do the block being inserted, and the block it is being inserted before
+     * make a contiguous block of memory? */
+    puc = ( uint8_t * ) pxBlockToInsert;
+
+    if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
+    {
+        if( pxIterator->pxNextFreeBlock != pxEnd )
+        {
+            /* Form one big block from the two blocks. */
+            pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
+            pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
+        }
+        else
+        {
+            pxBlockToInsert->pxNextFreeBlock = pxEnd;
+        }
+    }
+    else
+    {
+        pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
+    }
+
+    /* If the block being inserted plugged a gab, so was merged with the block
+     * before and the block after, then it's pxNextFreeBlock pointer will have
+     * already been set, and should not be set here as that would make it point
+     * to itself. */
+    if( pxIterator != pxBlockToInsert )
+    {
+        pxIterator->pxNextFreeBlock = pxBlockToInsert;
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 }
 /*-----------------------------------------------------------*/
 
-void *pvPortMalloc( size_t xWantedSize )
+void * pvPortMalloc( size_t xWantedSize )
 {
-BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
-void *pvReturn = NULL;
+    BlockLink_t * pxBlock, * pxPreviousBlock, * pxNewBlockLink;
+    void * pvReturn = NULL;
 
-	/* If this is the first call to malloc then the heap will require
-	 * initialisation to setup the list of free blocks. */
-	if( pxEnd == NULL )
-	{
-		prvHeapInit();
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    /* If this is the first call to malloc then the heap will require
+     * initialisation to setup the list of free blocks. */
+    if( pxEnd == NULL )
+    {
+        prvHeapInit();
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	/* Check the requested block size is not so large that the top bit is set.
-	 * The top bit of the block size member of the BlockLink_t structure is used
-	 * to determine who owns the block - the application or the kernel, so it
-	 * must be free. */
-	if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
-	{
-		/* The wanted size is increased so it can contain a BlockLink_t
-		 * structure in addition to the requested amount of bytes. */
-		if( xWantedSize > 0 )
-		{
-			xWantedSize += xHeapStructSize;
+    /* Check the requested block size is not so large that the top bit is set.
+     * The top bit of the block size member of the BlockLink_t structure is used
+     * to determine who owns the block - the application or the kernel, so it
+     * must be free. */
+    if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
+    {
+        /* The wanted size is increased so it can contain a BlockLink_t
+         * structure in addition to the requested amount of bytes. */
+        if( xWantedSize > 0 )
+        {
+            xWantedSize += xHeapStructSize;
 
-			/* Ensure that blocks are always aligned to the required number of
-			 * bytes. */
-			if( ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) != 0x00 )
-			{
-				/* Byte alignment required. */
-				xWantedSize += ( secureportBYTE_ALIGNMENT - ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) );
-				secureportASSERT( ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) == 0 );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
+            /* Ensure that blocks are always aligned to the required number of
+             * bytes. */
+            if( ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) != 0x00 )
+            {
+                /* Byte alignment required. */
+                xWantedSize += ( secureportBYTE_ALIGNMENT - ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) );
+                secureportASSERT( ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) == 0 );
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
 
-		if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
-		{
-			/* Traverse the list from the start (lowest address) block until
-			 * one of adequate size is found. */
-			pxPreviousBlock = &xStart;
-			pxBlock = xStart.pxNextFreeBlock;
-			while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
-			{
-				pxPreviousBlock = pxBlock;
-				pxBlock = pxBlock->pxNextFreeBlock;
-			}
+        if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
+        {
+            /* Traverse the list from the start (lowest address) block until
+             * one of adequate size is found. */
+            pxPreviousBlock = &xStart;
+            pxBlock = xStart.pxNextFreeBlock;
 
-			/* If the end marker was reached then a block of adequate size was
-			 * not found. */
-			if( pxBlock != pxEnd )
-			{
-				/* Return the memory space pointed to - jumping over the
-				 * BlockLink_t structure at its start. */
-				pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
+            while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
+            {
+                pxPreviousBlock = pxBlock;
+                pxBlock = pxBlock->pxNextFreeBlock;
+            }
 
-				/* This block is being returned for use so must be taken out
-				 * of the list of free blocks. */
-				pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
+            /* If the end marker was reached then a block of adequate size was
+             * not found. */
+            if( pxBlock != pxEnd )
+            {
+                /* Return the memory space pointed to - jumping over the
+                 * BlockLink_t structure at its start. */
+                pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
 
-				/* If the block is larger than required it can be split into
-				 * two. */
-				if( ( pxBlock->xBlockSize - xWantedSize ) > secureheapMINIMUM_BLOCK_SIZE )
-				{
-					/* This block is to be split into two.  Create a new
-					 * block following the number of bytes requested. The void
-					 * cast is used to prevent byte alignment warnings from the
-					 * compiler. */
-					pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
-					secureportASSERT( ( ( ( size_t ) pxNewBlockLink ) & secureportBYTE_ALIGNMENT_MASK ) == 0 );
+                /* This block is being returned for use so must be taken out
+                 * of the list of free blocks. */
+                pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
 
-					/* Calculate the sizes of two blocks split from the single
-					 * block. */
-					pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
-					pxBlock->xBlockSize = xWantedSize;
+                /* If the block is larger than required it can be split into
+                 * two. */
+                if( ( pxBlock->xBlockSize - xWantedSize ) > secureheapMINIMUM_BLOCK_SIZE )
+                {
+                    /* This block is to be split into two.  Create a new
+                     * block following the number of bytes requested. The void
+                     * cast is used to prevent byte alignment warnings from the
+                     * compiler. */
+                    pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
+                    secureportASSERT( ( ( ( size_t ) pxNewBlockLink ) & secureportBYTE_ALIGNMENT_MASK ) == 0 );
 
-					/* Insert the new block into the list of free blocks. */
-					prvInsertBlockIntoFreeList( pxNewBlockLink );
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
+                    /* Calculate the sizes of two blocks split from the single
+                     * block. */
+                    pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
+                    pxBlock->xBlockSize = xWantedSize;
 
-				xFreeBytesRemaining -= pxBlock->xBlockSize;
+                    /* Insert the new block into the list of free blocks. */
+                    prvInsertBlockIntoFreeList( pxNewBlockLink );
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
 
-				if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
-				{
-					xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
+                xFreeBytesRemaining -= pxBlock->xBlockSize;
 
-				/* The block is being returned - it is allocated and owned by
-				 * the application and has no "next" block. */
-				pxBlock->xBlockSize |= xBlockAllocatedBit;
-				pxBlock->pxNextFreeBlock = NULL;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+                if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
+                {
+                    xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
 
-	traceMALLOC( pvReturn, xWantedSize );
+                /* The block is being returned - it is allocated and owned by
+                 * the application and has no "next" block. */
+                pxBlock->xBlockSize |= xBlockAllocatedBit;
+                pxBlock->pxNextFreeBlock = NULL;
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	#if( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
-	{
-		if( pvReturn == NULL )
-		{
-			extern void vApplicationMallocFailedHook( void );
-			vApplicationMallocFailedHook();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	#endif
+    traceMALLOC( pvReturn, xWantedSize );
 
-	secureportASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) secureportBYTE_ALIGNMENT_MASK ) == 0 );
-	return pvReturn;
+    #if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
+        {
+            if( pvReturn == NULL )
+            {
+                extern void vApplicationMallocFailedHook( void );
+                vApplicationMallocFailedHook();
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+    #endif /* if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 ) */
+
+    secureportASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) secureportBYTE_ALIGNMENT_MASK ) == 0 );
+    return pvReturn;
 }
 /*-----------------------------------------------------------*/
 
-void vPortFree( void *pv )
+void vPortFree( void * pv )
 {
-uint8_t *puc = ( uint8_t * ) pv;
-BlockLink_t *pxLink;
+    uint8_t * puc = ( uint8_t * ) pv;
+    BlockLink_t * pxLink;
 
-	if( pv != NULL )
-	{
-		/* The memory being freed will have an BlockLink_t structure immediately
-		 * before it. */
-		puc -= xHeapStructSize;
+    if( pv != NULL )
+    {
+        /* The memory being freed will have an BlockLink_t structure immediately
+         * before it. */
+        puc -= xHeapStructSize;
 
-		/* This casting is to keep the compiler from issuing warnings. */
-		pxLink = ( void * ) puc;
+        /* This casting is to keep the compiler from issuing warnings. */
+        pxLink = ( void * ) puc;
 
-		/* Check the block is actually allocated. */
-		secureportASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
-		secureportASSERT( pxLink->pxNextFreeBlock == NULL );
+        /* Check the block is actually allocated. */
+        secureportASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
+        secureportASSERT( pxLink->pxNextFreeBlock == NULL );
 
-		if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
-		{
-			if( pxLink->pxNextFreeBlock == NULL )
-			{
-				/* The block is being returned to the heap - it is no longer
-				 * allocated. */
-				pxLink->xBlockSize &= ~xBlockAllocatedBit;
+        if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
+        {
+            if( pxLink->pxNextFreeBlock == NULL )
+            {
+                /* The block is being returned to the heap - it is no longer
+                 * allocated. */
+                pxLink->xBlockSize &= ~xBlockAllocatedBit;
 
-				secureportDISABLE_NON_SECURE_INTERRUPTS();
-				{
-					/* Add this block to the list of free blocks. */
-					xFreeBytesRemaining += pxLink->xBlockSize;
-					traceFREE( pv, pxLink->xBlockSize );
-					prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
-				}
-				secureportENABLE_NON_SECURE_INTERRUPTS();
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
+                secureportDISABLE_NON_SECURE_INTERRUPTS();
+                {
+                    /* Add this block to the list of free blocks. */
+                    xFreeBytesRemaining += pxLink->xBlockSize;
+                    traceFREE( pv, pxLink->xBlockSize );
+                    prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
+                }
+                secureportENABLE_NON_SECURE_INTERRUPTS();
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
 }
 /*-----------------------------------------------------------*/
 
 size_t xPortGetFreeHeapSize( void )
 {
-	return xFreeBytesRemaining;
+    return xFreeBytesRemaining;
 }
 /*-----------------------------------------------------------*/
 
 size_t xPortGetMinimumEverFreeHeapSize( void )
 {
-	return xMinimumEverFreeBytesRemaining;
+    return xMinimumEverFreeBytesRemaining;
 }
 /*-----------------------------------------------------------*/
 
 void vPortInitialiseBlocks( void )
 {
-	/* This just exists to keep the linker quiet. */
+    /* This just exists to keep the linker quiet. */
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/ARMv8M/secure/heap/secure_heap.h b/portable/ARMv8M/secure/heap/secure_heap.h
index aa67e39d8..d507107cd 100644
--- a/portable/ARMv8M/secure/heap/secure_heap.h
+++ b/portable/ARMv8M/secure/heap/secure_heap.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -39,13 +39,13 @@
  * @return Pointer to the memory region if the allocation is successful, NULL
  * otherwise.
  */
-void *pvPortMalloc( size_t xWantedSize );
+void * pvPortMalloc( size_t xWantedSize );
 
 /**
  * @brief Frees the previously allocated memory.
  *
  * @param[in] pv Pointer to the memory to be freed.
  */
-void vPortFree( void *pv );
+void vPortFree( void * pv );
 
 #endif /* __SECURE_HEAP_H__ */
diff --git a/portable/ARMv8M/secure/init/secure_init.c b/portable/ARMv8M/secure/init/secure_init.c
index 629186130..40b115f53 100644
--- a/portable/ARMv8M/secure/init/secure_init.c
+++ b/portable/ARMv8M/secure/init/secure_init.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -37,69 +37,69 @@
 /**
  * @brief Constants required to manipulate the SCB.
  */
-#define secureinitSCB_AIRCR					( ( volatile uint32_t * ) 0xe000ed0c )  /* Application Interrupt and Reset Control Register. */
-#define secureinitSCB_AIRCR_VECTKEY_POS		( 16UL )
-#define secureinitSCB_AIRCR_VECTKEY_MASK	( 0xFFFFUL << secureinitSCB_AIRCR_VECTKEY_POS )
-#define secureinitSCB_AIRCR_PRIS_POS		( 14UL )
-#define secureinitSCB_AIRCR_PRIS_MASK		( 1UL << secureinitSCB_AIRCR_PRIS_POS )
+#define secureinitSCB_AIRCR                 ( ( volatile uint32_t * ) 0xe000ed0c )  /* Application Interrupt and Reset Control Register. */
+#define secureinitSCB_AIRCR_VECTKEY_POS     ( 16UL )
+#define secureinitSCB_AIRCR_VECTKEY_MASK    ( 0xFFFFUL << secureinitSCB_AIRCR_VECTKEY_POS )
+#define secureinitSCB_AIRCR_PRIS_POS        ( 14UL )
+#define secureinitSCB_AIRCR_PRIS_MASK       ( 1UL << secureinitSCB_AIRCR_PRIS_POS )
 
 /**
  * @brief Constants required to manipulate the FPU.
  */
-#define secureinitFPCCR						( ( volatile uint32_t * ) 0xe000ef34 )  /* Floating Point Context Control Register. */
-#define secureinitFPCCR_LSPENS_POS			( 29UL )
-#define secureinitFPCCR_LSPENS_MASK			( 1UL << secureinitFPCCR_LSPENS_POS )
-#define secureinitFPCCR_TS_POS				( 26UL )
-#define secureinitFPCCR_TS_MASK				( 1UL << secureinitFPCCR_TS_POS )
+#define secureinitFPCCR                     ( ( volatile uint32_t * ) 0xe000ef34 )  /* Floating Point Context Control Register. */
+#define secureinitFPCCR_LSPENS_POS          ( 29UL )
+#define secureinitFPCCR_LSPENS_MASK         ( 1UL << secureinitFPCCR_LSPENS_POS )
+#define secureinitFPCCR_TS_POS              ( 26UL )
+#define secureinitFPCCR_TS_MASK             ( 1UL << secureinitFPCCR_TS_POS )
 
-#define secureinitNSACR						( ( volatile uint32_t * ) 0xe000ed8c )  /* Non-secure Access Control Register. */
-#define secureinitNSACR_CP10_POS			( 10UL )
-#define secureinitNSACR_CP10_MASK			( 1UL << secureinitNSACR_CP10_POS )
-#define secureinitNSACR_CP11_POS			( 11UL )
-#define secureinitNSACR_CP11_MASK			( 1UL << secureinitNSACR_CP11_POS )
+#define secureinitNSACR                     ( ( volatile uint32_t * ) 0xe000ed8c )  /* Non-secure Access Control Register. */
+#define secureinitNSACR_CP10_POS            ( 10UL )
+#define secureinitNSACR_CP10_MASK           ( 1UL << secureinitNSACR_CP10_POS )
+#define secureinitNSACR_CP11_POS            ( 11UL )
+#define secureinitNSACR_CP11_MASK           ( 1UL << secureinitNSACR_CP11_POS )
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureInit_DePrioritizeNSExceptions( void )
 {
-	uint32_t ulIPSR;
+    uint32_t ulIPSR;
 
-	 /* Read the Interrupt Program Status Register (IPSR) value. */
-	secureportREAD_IPSR( ulIPSR );
+    /* Read the Interrupt Program Status Register (IPSR) value. */
+    secureportREAD_IPSR( ulIPSR );
 
-	/* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-	 * when the processor is running in the Thread Mode. */
-	if( ulIPSR != 0 )
-	{
-		*( secureinitSCB_AIRCR ) =	( *( secureinitSCB_AIRCR ) & ~( secureinitSCB_AIRCR_VECTKEY_MASK | secureinitSCB_AIRCR_PRIS_MASK ) ) |
-									( ( 0x05FAUL << secureinitSCB_AIRCR_VECTKEY_POS ) & secureinitSCB_AIRCR_VECTKEY_MASK ) |
-									( ( 0x1UL	<< secureinitSCB_AIRCR_PRIS_POS )	& secureinitSCB_AIRCR_PRIS_MASK );
-	}
+    /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
+     * when the processor is running in the Thread Mode. */
+    if( ulIPSR != 0 )
+    {
+        *( secureinitSCB_AIRCR ) = ( *( secureinitSCB_AIRCR ) & ~( secureinitSCB_AIRCR_VECTKEY_MASK | secureinitSCB_AIRCR_PRIS_MASK ) ) |
+                                   ( ( 0x05FAUL << secureinitSCB_AIRCR_VECTKEY_POS ) & secureinitSCB_AIRCR_VECTKEY_MASK ) |
+                                   ( ( 0x1UL << secureinitSCB_AIRCR_PRIS_POS ) & secureinitSCB_AIRCR_PRIS_MASK );
+    }
 }
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureInit_EnableNSFPUAccess( void )
 {
-	uint32_t ulIPSR;
+    uint32_t ulIPSR;
 
-	 /* Read the Interrupt Program Status Register (IPSR) value. */
-	secureportREAD_IPSR( ulIPSR );
+    /* Read the Interrupt Program Status Register (IPSR) value. */
+    secureportREAD_IPSR( ulIPSR );
 
-	/* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-	 * when the processor is running in the Thread Mode. */
-	if( ulIPSR != 0 )
-	{
-		/* CP10 = 1 ==> Non-secure access to the Floating Point Unit is
-		 * permitted. CP11 should be programmed to the same value as CP10. */
-		*( secureinitNSACR ) |= ( secureinitNSACR_CP10_MASK | secureinitNSACR_CP11_MASK );
+    /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
+     * when the processor is running in the Thread Mode. */
+    if( ulIPSR != 0 )
+    {
+        /* CP10 = 1 ==> Non-secure access to the Floating Point Unit is
+         * permitted. CP11 should be programmed to the same value as CP10. */
+        *( secureinitNSACR ) |= ( secureinitNSACR_CP10_MASK | secureinitNSACR_CP11_MASK );
 
-		/* LSPENS = 0 ==> LSPEN is writable fron non-secure state. This ensures
-		 * that we can enable/disable lazy stacking in port.c file. */
-		*( secureinitFPCCR ) &= ~ ( secureinitFPCCR_LSPENS_MASK );
+        /* LSPENS = 0 ==> LSPEN is writable fron non-secure state. This ensures
+         * that we can enable/disable lazy stacking in port.c file. */
+        *( secureinitFPCCR ) &= ~( secureinitFPCCR_LSPENS_MASK );
 
-		/* TS = 1 ==> Treat FP registers as secure i.e. callee saved FP
-		 * registers (S16-S31) are also pushed to stack on exception entry and
-		 * restored on exception return. */
-		*( secureinitFPCCR ) |= ( secureinitFPCCR_TS_MASK );
-	}
+        /* TS = 1 ==> Treat FP registers as secure i.e. callee saved FP
+         * registers (S16-S31) are also pushed to stack on exception entry and
+         * restored on exception return. */
+        *( secureinitFPCCR ) |= ( secureinitFPCCR_TS_MASK );
+    }
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/ARMv8M/secure/init/secure_init.h b/portable/ARMv8M/secure/init/secure_init.h
index 643873468..c40ef3d8d 100644
--- a/portable/ARMv8M/secure/init/secure_init.h
+++ b/portable/ARMv8M/secure/init/secure_init.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/ARMv8M/secure/macros/secure_port_macros.h b/portable/ARMv8M/secure/macros/secure_port_macros.h
index 14ed3f022..d495a0e02 100644
--- a/portable/ARMv8M/secure/macros/secure_port_macros.h
+++ b/portable/ARMv8M/secure/macros/secure_port_macros.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -31,103 +31,103 @@
 /**
  * @brief Byte alignment requirements.
  */
-#define secureportBYTE_ALIGNMENT					8
-#define secureportBYTE_ALIGNMENT_MASK				( 0x0007 )
+#define secureportBYTE_ALIGNMENT         8
+#define secureportBYTE_ALIGNMENT_MASK    ( 0x0007 )
 
 /**
  * @brief Macro to declare a function as non-secure callable.
  */
 #if defined( __IAR_SYSTEMS_ICC__ )
-	#define secureportNON_SECURE_CALLABLE			__cmse_nonsecure_entry __root
+    #define secureportNON_SECURE_CALLABLE    __cmse_nonsecure_entry __root
 #else
-	#define secureportNON_SECURE_CALLABLE			__attribute__((cmse_nonsecure_entry)) __attribute__((used))
+    #define secureportNON_SECURE_CALLABLE    __attribute__( ( cmse_nonsecure_entry ) ) __attribute__( ( used ) )
 #endif
 
 /**
  * @brief Set the secure PRIMASK value.
  */
 #define secureportSET_SECURE_PRIMASK( ulPrimaskValue ) \
-	__asm volatile ( "msr primask, %0" : : "r" ( ulPrimaskValue ) : "memory" )
+    __asm volatile ( "msr primask, %0" : : "r" ( ulPrimaskValue ) : "memory" )
 
 /**
  * @brief Set the non-secure PRIMASK value.
  */
 #define secureportSET_NON_SECURE_PRIMASK( ulPrimaskValue ) \
-	__asm volatile ( "msr primask_ns, %0" : : "r" ( ulPrimaskValue ) : "memory" )
+    __asm volatile ( "msr primask_ns, %0" : : "r" ( ulPrimaskValue ) : "memory" )
 
 /**
  * @brief Read the PSP value in the given variable.
  */
 #define secureportREAD_PSP( pucOutCurrentStackPointer ) \
-	__asm volatile ( "mrs %0, psp"  : "=r" ( pucOutCurrentStackPointer ) )
+    __asm volatile ( "mrs %0, psp"  : "=r" ( pucOutCurrentStackPointer ) )
 
 /**
  * @brief Set the PSP to the given value.
  */
 #define secureportSET_PSP( pucCurrentStackPointer ) \
-	__asm volatile ( "msr psp, %0" : : "r" ( pucCurrentStackPointer ) )
+    __asm volatile ( "msr psp, %0" : : "r" ( pucCurrentStackPointer ) )
 
 /**
  * @brief Set the PSPLIM to the given value.
  */
 #define secureportSET_PSPLIM( pucStackLimit ) \
-	__asm volatile ( "msr psplim, %0" : : "r" ( pucStackLimit ) )
+    __asm volatile ( "msr psplim, %0" : : "r" ( pucStackLimit ) )
 
 /**
  * @brief Set the NonSecure MSP to the given value.
  */
 #define secureportSET_MSP_NS( pucMainStackPointer ) \
-	__asm volatile ( "msr msp_ns, %0" : : "r" ( pucMainStackPointer ) )
+    __asm volatile ( "msr msp_ns, %0" : : "r" ( pucMainStackPointer ) )
 
 /**
  * @brief Set the CONTROL register to the given value.
  */
 #define secureportSET_CONTROL( ulControl ) \
-	__asm volatile ( "msr control, %0" : : "r" ( ulControl ) : "memory" )
+    __asm volatile ( "msr control, %0" : : "r" ( ulControl ) : "memory" )
 
 /**
  * @brief Read the Interrupt Program Status Register (IPSR) value in the given
  * variable.
  */
 #define secureportREAD_IPSR( ulIPSR ) \
-	__asm volatile ( "mrs %0, ipsr"  : "=r" ( ulIPSR ) )
+    __asm volatile ( "mrs %0, ipsr"  : "=r" ( ulIPSR ) )
 
 /**
  * @brief PRIMASK value to enable interrupts.
  */
-#define secureportPRIMASK_ENABLE_INTERRUPTS_VAL		0
+#define secureportPRIMASK_ENABLE_INTERRUPTS_VAL     0
 
 /**
  * @brief PRIMASK value to disable interrupts.
  */
-#define secureportPRIMASK_DISABLE_INTERRUPTS_VAL	1
+#define secureportPRIMASK_DISABLE_INTERRUPTS_VAL    1
 
 /**
  * @brief Disable secure interrupts.
  */
-#define secureportDISABLE_SECURE_INTERRUPTS()		secureportSET_SECURE_PRIMASK( secureportPRIMASK_DISABLE_INTERRUPTS_VAL )
+#define secureportDISABLE_SECURE_INTERRUPTS()        secureportSET_SECURE_PRIMASK( secureportPRIMASK_DISABLE_INTERRUPTS_VAL )
 
 /**
  * @brief Disable non-secure interrupts.
  *
  * This effectively disables context switches.
  */
-#define secureportDISABLE_NON_SECURE_INTERRUPTS()	secureportSET_NON_SECURE_PRIMASK( secureportPRIMASK_DISABLE_INTERRUPTS_VAL )
+#define secureportDISABLE_NON_SECURE_INTERRUPTS()    secureportSET_NON_SECURE_PRIMASK( secureportPRIMASK_DISABLE_INTERRUPTS_VAL )
 
 /**
  * @brief Enable non-secure interrupts.
  */
-#define secureportENABLE_NON_SECURE_INTERRUPTS()	secureportSET_NON_SECURE_PRIMASK( secureportPRIMASK_ENABLE_INTERRUPTS_VAL )
+#define secureportENABLE_NON_SECURE_INTERRUPTS()     secureportSET_NON_SECURE_PRIMASK( secureportPRIMASK_ENABLE_INTERRUPTS_VAL )
 
 /**
  * @brief Assert definition.
  */
-#define secureportASSERT( x )						\
-	if( ( x ) == 0 )								\
-	{												\
-		secureportDISABLE_SECURE_INTERRUPTS();		\
-		secureportDISABLE_NON_SECURE_INTERRUPTS();	\
-		for( ;; );									\
-	}
+#define secureportASSERT( x )                      \
+    if( ( x ) == 0 )                               \
+    {                                              \
+        secureportDISABLE_SECURE_INTERRUPTS();     \
+        secureportDISABLE_NON_SECURE_INTERRUPTS(); \
+        for( ; ; ) {; }                            \
+    }
 
 #endif /* __SECURE_PORT_MACROS_H__ */
diff --git a/portable/BCC/16BitDOS/Flsh186/port.c b/portable/BCC/16BitDOS/Flsh186/port.c
index 45bf8939c..64e0a2205 100644
--- a/portable/BCC/16BitDOS/Flsh186/port.c
+++ b/portable/BCC/16BitDOS/Flsh186/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/BCC/16BitDOS/Flsh186/prtmacro.h b/portable/BCC/16BitDOS/Flsh186/prtmacro.h
index e96ac83f0..ff38315a8 100644
--- a/portable/BCC/16BitDOS/Flsh186/prtmacro.h
+++ b/portable/BCC/16BitDOS/Flsh186/prtmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/BCC/16BitDOS/PC/port.c b/portable/BCC/16BitDOS/PC/port.c
index 70ae70cda..1274a22fb 100644
--- a/portable/BCC/16BitDOS/PC/port.c
+++ b/portable/BCC/16BitDOS/PC/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/BCC/16BitDOS/PC/prtmacro.h b/portable/BCC/16BitDOS/PC/prtmacro.h
index cfc74f35b..dc2bb253a 100644
--- a/portable/BCC/16BitDOS/PC/prtmacro.h
+++ b/portable/BCC/16BitDOS/PC/prtmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/BCC/16BitDOS/common/portasm.h b/portable/BCC/16BitDOS/common/portasm.h
index 2b199c61b..6623b11e5 100644
--- a/portable/BCC/16BitDOS/common/portasm.h
+++ b/portable/BCC/16BitDOS/common/portasm.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/BCC/16BitDOS/common/portcomn.c b/portable/BCC/16BitDOS/common/portcomn.c
index c230b141c..f58278626 100644
--- a/portable/BCC/16BitDOS/common/portcomn.c
+++ b/portable/BCC/16BitDOS/common/portcomn.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/CCS/ARM_CM3/port.c b/portable/CCS/ARM_CM3/port.c
index 20c15bd82..afd2ff07d 100644
--- a/portable/CCS/ARM_CM3/port.c
+++ b/portable/CCS/ARM_CM3/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,76 +19,76 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------
- * Implementation of functions defined in portable.h for the ARM CM4F port.
- *----------------------------------------------------------*/
+* Implementation of functions defined in portable.h for the ARM CM3 port.
+*----------------------------------------------------------*/
 
 /* Scheduler includes. */
 #include "FreeRTOS.h"
 #include "task.h"
 
-#if( configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 )
-	#error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+#if ( configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 )
+    #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See http: /*www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
 #endif
 
 #ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 1UL << 2UL )
+    #define configSYSTICK_CLOCK_HZ      configCPU_CLOCK_HZ
+    /* Ensure the SysTick is clocked at the same frequency as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 1UL << 2UL )
 #else
-	/* The way the SysTick is clocked is not modified in case it is not the same
-	as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 0 )
+
+/* The way the SysTick is clocked is not modified in case it is not the same
+ * as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 0 )
 #endif
 
 /* Constants required to manipulate the core.  Registers first... */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_CTRL_REG             ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG             ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG    ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SHPR3_REG                    ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
 /* ...then bits in the registers. */
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portNVIC_PENDSVCLEAR_BIT 			( 1UL << 27UL )
-#define portNVIC_PEND_SYSTICK_CLEAR_BIT		( 1UL << 25UL )
+#define portNVIC_SYSTICK_INT_BIT              ( 1UL << 1UL )
+#define portNVIC_SYSTICK_ENABLE_BIT           ( 1UL << 0UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT       ( 1UL << 16UL )
+#define portNVIC_PENDSVCLEAR_BIT              ( 1UL << 27UL )
+#define portNVIC_PEND_SYSTICK_CLEAR_BIT       ( 1UL << 25UL )
 
-#define portNVIC_PENDSV_PRI					( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
-#define portNVIC_SYSTICK_PRI				( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
+#define portNVIC_PENDSV_PRI                   ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
+#define portNVIC_SYSTICK_PRI                  ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
 
 /* Constants required to check the validity of an interrupt priority. */
-#define portFIRST_USER_INTERRUPT_NUMBER		( 16 )
-#define portNVIC_IP_REGISTERS_OFFSET_16 	( 0xE000E3F0 )
-#define portAIRCR_REG						( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
-#define portMAX_8_BIT_VALUE					( ( uint8_t ) 0xff )
-#define portTOP_BIT_OF_BYTE					( ( uint8_t ) 0x80 )
-#define portMAX_PRIGROUP_BITS				( ( uint8_t ) 7 )
-#define portPRIORITY_GROUP_MASK				( 0x07UL << 8UL )
-#define portPRIGROUP_SHIFT					( 8UL )
+#define portFIRST_USER_INTERRUPT_NUMBER       ( 16 )
+#define portNVIC_IP_REGISTERS_OFFSET_16       ( 0xE000E3F0 )
+#define portAIRCR_REG                         ( *( ( volatile uint32_t * ) 0xE000ED0C ) )
+#define portMAX_8_BIT_VALUE                   ( ( uint8_t ) 0xff )
+#define portTOP_BIT_OF_BYTE                   ( ( uint8_t ) 0x80 )
+#define portMAX_PRIGROUP_BITS                 ( ( uint8_t ) 7 )
+#define portPRIORITY_GROUP_MASK               ( 0x07UL << 8UL )
+#define portPRIGROUP_SHIFT                    ( 8UL )
 
 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
-#define portVECTACTIVE_MASK					( 0xFFUL )
+#define portVECTACTIVE_MASK                   ( 0xFFUL )
 
 /* Constants required to set up the initial stack. */
-#define portINITIAL_XPSR					( 0x01000000 )
+#define portINITIAL_XPSR                      ( 0x01000000 )
 
 /* The systick is a 24-bit counter. */
-#define portMAX_24_BIT_NUMBER				( 0xffffffUL )
+#define portMAX_24_BIT_NUMBER                 ( 0xffffffUL )
 
 /* A fiddle factor to estimate the number of SysTick counts that would have
-occurred while the SysTick counter is stopped during tickless idle
-calculations. */
-#define portMISSED_COUNTS_FACTOR			( 45UL )
+ * occurred while the SysTick counter is stopped during tickless idle
+ * calculations. */
+#define portMISSED_COUNTS_FACTOR              ( 45UL )
 
 /* For strict compliance with the Cortex-M spec the task start address should
-have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
-#define portSTART_ADDRESS_MASK		( ( StackType_t ) 0xfffffffeUL )
+ * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
+#define portSTART_ADDRESS_MASK                ( ( StackType_t ) 0xfffffffeUL )
 
 /*
  * Setup the timer to generate the tick interrupts.  The implementation in this
@@ -115,34 +115,34 @@ static void prvTaskExitError( void );
 /*-----------------------------------------------------------*/
 
 /* Required to allow portasm.asm access the configMAX_SYSCALL_INTERRUPT_PRIORITY
-setting. */
+ * setting. */
 const uint32_t ulMaxSyscallInterruptPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY;
 
 /* Each task maintains its own interrupt status in the critical nesting
-variable. */
+ * variable. */
 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 
 /*
  * The number of SysTick increments that make up one tick period.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulTimerCountsForOneTick = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulTimerCountsForOneTick = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * The maximum number of tick periods that can be suppressed is limited by the
  * 24 bit resolution of the SysTick timer.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t xMaximumPossibleSuppressedTicks = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * Compensate for the CPU cycles that pass while the SysTick is stopped (low
  * power functionality only.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulStoppedTimerCompensation = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulStoppedTimerCompensation = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
@@ -151,9 +151,9 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
  * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
  */
 #if ( configASSERT_DEFINED == 1 )
-	 static uint8_t ucMaxSysCallPriority = 0;
-	 static uint32_t ulMaxPRIGROUPValue = 0;
-	 static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16;
+    static uint8_t ucMaxSysCallPriority = 0;
+    static uint32_t ulMaxPRIGROUPValue = 0;
+    static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16;
 #endif /* configASSERT_DEFINED */
 
 /*-----------------------------------------------------------*/
@@ -165,40 +165,43 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
                                      TaskFunction_t pxCode,
                                      void * pvParameters )
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	interrupt. */
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
 
-	/* Offset added to account for the way the MCU uses the stack on entry/exit
-	of interrupts, and to ensure alignment. */
-	pxTopOfStack--;
+    /* Offset added to account for the way the MCU uses the stack on entry/exit
+     * of interrupts, and to ensure alignment. */
+    pxTopOfStack--;
 
-	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
-	pxTopOfStack--;
-	*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;	/* PC */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) prvTaskExitError;	/* LR */
+    *pxTopOfStack = portINITIAL_XPSR;                                    /* xPSR */
+    pxTopOfStack--;
+    *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) prvTaskExitError;                    /* LR */
 
-	/* Save code space by skipping register initialisation. */
-	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
-	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
+    /* Save code space by skipping register initialisation. */
+    pxTopOfStack -= 5;                            /* R12, R3, R2 and R1. */
+    *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
 
-	pxTopOfStack -= 8;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
+    pxTopOfStack -= 8;                            /* R11, R10, R9, R8, R7, R6, R5 and R4. */
 
-	return pxTopOfStack;
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 static void prvTaskExitError( void )
 {
-	/* A function that implements a task must not exit or attempt to return to
-	its caller as there is nothing to return to.  If a task wants to exit it
-	should instead call vTaskDelete( NULL ).
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to.  If a task wants to exit it
+     * should instead call vTaskDelete( NULL ).
+     *
+     * Artificially force an assert() to be triggered if configASSERT() is
+     * defined, then stop here so application writers can catch the error. */
+    configASSERT( uxCriticalNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
 
-	Artificially force an assert() to be triggered if configASSERT() is
-	defined, then stop here so application writers can catch the error. */
-	configASSERT( uxCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
-	for( ;; );
+    for( ; ; )
+    {
+    }
 }
 /*-----------------------------------------------------------*/
 
@@ -207,308 +210,312 @@ static void prvTaskExitError( void )
  */
 BaseType_t xPortStartScheduler( void )
 {
-	#if( configASSERT_DEFINED == 1 )
-	{
-		volatile uint32_t ulOriginalPriority;
-		volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
-		volatile uint8_t ucMaxPriorityValue;
+    #if ( configASSERT_DEFINED == 1 )
+        {
+            volatile uint32_t ulOriginalPriority;
+            volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
+            volatile uint8_t ucMaxPriorityValue;
 
-		/* Determine the maximum priority from which ISR safe FreeRTOS API
-		functions can be called.  ISR safe functions are those that end in
-		"FromISR".  FreeRTOS maintains separate thread and ISR API functions to
-		ensure interrupt entry is as fast and simple as possible.
+            /* Determine the maximum priority from which ISR safe FreeRTOS API
+             * functions can be called.  ISR safe functions are those that end in
+             * "FromISR".  FreeRTOS maintains separate thread and ISR API functions to
+             * ensure interrupt entry is as fast and simple as possible.
+             *
+             * Save the interrupt priority value that is about to be clobbered. */
+            ulOriginalPriority = *pucFirstUserPriorityRegister;
 
-		Save the interrupt priority value that is about to be clobbered. */
-		ulOriginalPriority = *pucFirstUserPriorityRegister;
+            /* Determine the number of priority bits available.  First write to all
+             * possible bits. */
+            *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
 
-		/* Determine the number of priority bits available.  First write to all
-		possible bits. */
-		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
+            /* Read the value back to see how many bits stuck. */
+            ucMaxPriorityValue = *pucFirstUserPriorityRegister;
 
-		/* Read the value back to see how many bits stuck. */
-		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
+            /* Use the same mask on the maximum system call priority. */
+            ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
 
-		/* Use the same mask on the maximum system call priority. */
-		ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
+            /* Calculate the maximum acceptable priority group value for the number
+             * of bits read back. */
+            ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
 
-		/* Calculate the maximum acceptable priority group value for the number
-		of bits read back. */
-		ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
-		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
-		{
-			ulMaxPRIGROUPValue--;
-			ucMaxPriorityValue <<= ( uint8_t ) 0x01;
-		}
+            while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
+            {
+                ulMaxPRIGROUPValue--;
+                ucMaxPriorityValue <<= ( uint8_t ) 0x01;
+            }
 
-		#ifdef __NVIC_PRIO_BITS
-		{
-			/* Check the CMSIS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
-		}
-		#endif
+            #ifdef __NVIC_PRIO_BITS
+                {
+                    /* Check the CMSIS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
+                }
+            #endif
 
-		#ifdef configPRIO_BITS
-		{
-			/* Check the FreeRTOS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
-		}
-		#endif
+            #ifdef configPRIO_BITS
+                {
+                    /* Check the FreeRTOS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
+                }
+            #endif
 
-		/* Shift the priority group value back to its position within the AIRCR
-		register. */
-		ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
-		ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
+            /* Shift the priority group value back to its position within the AIRCR
+             * register. */
+            ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
+            ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
 
-		/* Restore the clobbered interrupt priority register to its original
-		value. */
-		*pucFirstUserPriorityRegister = ulOriginalPriority;
-	}
-	#endif /* conifgASSERT_DEFINED */
+            /* Restore the clobbered interrupt priority register to its original
+             * value. */
+            *pucFirstUserPriorityRegister = ulOriginalPriority;
+        }
+    #endif /* conifgASSERT_DEFINED */
 
-	/* Make PendSV and SysTick the lowest priority interrupts. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+    /* Make PendSV and SysTick the lowest priority interrupts. */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
-	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-	here already. */
-	vPortSetupTimerInterrupt();
+    /* Start the timer that generates the tick ISR.  Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
 
-	/* Initialise the critical nesting count ready for the first task. */
-	uxCriticalNesting = 0;
+    /* Initialise the critical nesting count ready for the first task. */
+    uxCriticalNesting = 0;
 
-	/* Start the first task. */
-	vPortStartFirstTask();
+    /* Start the first task. */
+    vPortStartFirstTask();
 
-	/* Should not get here! */
-	return 0;
+    /* Should not get here! */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void )
 {
-	/* Not implemented in ports where there is nothing to return to.
-	Artificially force an assert. */
-	configASSERT( uxCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( uxCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void )
 {
-	portDISABLE_INTERRUPTS();
-	uxCriticalNesting++;
+    portDISABLE_INTERRUPTS();
+    uxCriticalNesting++;
 
-	/* This is not the interrupt safe version of the enter critical function so
-	assert() if it is being called from an interrupt context.  Only API
-	functions that end in "FromISR" can be used in an interrupt.  Only assert if
-	the critical nesting count is 1 to protect against recursive calls if the
-	assert function also uses a critical section. */
-	if( uxCriticalNesting == 1 )
-	{
-		configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
-	}
+    /* This is not the interrupt safe version of the enter critical function so
+     * assert() if it is being called from an interrupt context.  Only API
+     * functions that end in "FromISR" can be used in an interrupt.  Only assert if
+     * the critical nesting count is 1 to protect against recursive calls if the
+     * assert function also uses a critical section. */
+    if( uxCriticalNesting == 1 )
+    {
+        configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
+    }
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void )
 {
-	configASSERT( uxCriticalNesting );
-	uxCriticalNesting--;
-	if( uxCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
+    configASSERT( uxCriticalNesting );
+    uxCriticalNesting--;
+
+    if( uxCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
 }
 /*-----------------------------------------------------------*/
 
 void xPortSysTickHandler( void )
 {
-	/* The SysTick runs at the lowest interrupt priority, so when this interrupt
-	executes all interrupts must be unmasked.  There is therefore no need to
-	save and then restore the interrupt mask value as its value is already
-	known. */
-	( void ) portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* A context switch is required.  Context switching is performed in
-			the PendSV interrupt.  Pend the PendSV interrupt. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );
+    /* The SysTick runs at the lowest interrupt priority, so when this interrupt
+     * executes all interrupts must be unmasked.  There is therefore no need to
+     * save and then restore the interrupt mask value as its value is already
+     * known. */
+    ( void ) portSET_INTERRUPT_MASK_FROM_ISR();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* A context switch is required.  Context switching is performed in
+             * the PendSV interrupt.  Pend the PendSV interrupt. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );
 }
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TICKLESS_IDLE == 1 )
+#if ( configUSE_TICKLESS_IDLE == 1 )
 
-	#pragma WEAK( vPortSuppressTicksAndSleep )
-	void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-	{
-	uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
-	TickType_t xModifiableIdleTime;
+    #pragma WEAK( vPortSuppressTicksAndSleep )
+    void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+    {
+        uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+        TickType_t xModifiableIdleTime;
 
-		/* Make sure the SysTick reload value does not overflow the counter. */
-		if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-		{
-			xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-		}
+        /* Make sure the SysTick reload value does not overflow the counter. */
+        if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+        {
+            xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+        }
 
-		/* Stop the SysTick momentarily.  The time the SysTick is stopped for
-		is accounted for as best it can be, but using the tickless mode will
-		inevitably result in some tiny drift of the time maintained by the
-		kernel with respect to calendar time. */
-		portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+        /* Stop the SysTick momentarily.  The time the SysTick is stopped for
+         * is accounted for as best it can be, but using the tickless mode will
+         * inevitably result in some tiny drift of the time maintained by the
+         * kernel with respect to calendar time. */
+        portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
 
-		/* Calculate the reload value required to wait xExpectedIdleTime
-		tick periods.  -1 is used because this code will execute part way
-		through one of the tick periods. */
-		ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-		if( ulReloadValue > ulStoppedTimerCompensation )
-		{
-			ulReloadValue -= ulStoppedTimerCompensation;
-		}
+        /* Calculate the reload value required to wait xExpectedIdleTime
+         * tick periods.  -1 is used because this code will execute part way
+         * through one of the tick periods. */
+        ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
 
-		/* Enter a critical section but don't use the taskENTER_CRITICAL()
-		method as that will mask interrupts that should exit sleep mode. */
-		__asm( "	cpsid i" );
-		__asm( "	dsb" );
-		__asm( "	isb" );
+        if( ulReloadValue > ulStoppedTimerCompensation )
+        {
+            ulReloadValue -= ulStoppedTimerCompensation;
+        }
 
+        /* Enter a critical section but don't use the taskENTER_CRITICAL()
+         * method as that will mask interrupts that should exit sleep mode. */
+        __asm( "	cpsid i");
+        __asm( "	dsb");
+        __asm( "	isb");
 
-		/* If a context switch is pending or a task is waiting for the scheduler
-		to be unsuspended then abandon the low power entry. */
-		if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-		{
-			/* Restart from whatever is left in the count register to complete
-			this tick period. */
-			portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+        /* If a context switch is pending or a task is waiting for the scheduler
+         * to be unsuspended then abandon the low power entry. */
+        if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+        {
+            /* Restart from whatever is left in the count register to complete
+             * this tick period. */
+            portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Reset the reload register to the value required for normal tick
-			periods. */
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+            /* Reset the reload register to the value required for normal tick
+             * periods. */
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
 
-			/* Re-enable interrupts - see comments above __disable_interrupt()
-			call above. */
-			__asm( "	cpsie i" );
-		}
-		else
-		{
-			/* Set the new reload value. */
-			portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+            /* Re-enable interrupts - see comments above __disable_interrupt()
+             * call above. */
+            __asm( "	cpsie i");
+        }
+        else
+        {
+            /* Set the new reload value. */
+            portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
 
-			/* Clear the SysTick count flag and set the count value back to
-			zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            /* Clear the SysTick count flag and set the count value back to
+             * zero. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
-			set its parameter to 0 to indicate that its implementation contains
-			its own wait for interrupt or wait for event instruction, and so wfi
-			should not be executed again.  However, the original expected idle
-			time variable must remain unmodified, so a copy is taken. */
-			xModifiableIdleTime = xExpectedIdleTime;
-			configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-			if( xModifiableIdleTime > 0 )
-			{
-				__asm( "	dsb" );
-				__asm( "	wfi" );
-				__asm( "	isb" );
-			}
-			configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+            /* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
+             * set its parameter to 0 to indicate that its implementation contains
+             * its own wait for interrupt or wait for event instruction, and so wfi
+             * should not be executed again.  However, the original expected idle
+             * time variable must remain unmodified, so a copy is taken. */
+            xModifiableIdleTime = xExpectedIdleTime;
+            configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
 
-			/* Re-enable interrupts to allow the interrupt that brought the MCU
-			out of sleep mode to execute immediately.  see comments above
-			__disable_interrupt() call above. */
-			__asm( "	cpsie i" );
-			__asm( "	dsb" );
-			__asm( "	isb" );
+            if( xModifiableIdleTime > 0 )
+            {
+                __asm( "	dsb");
+                __asm( "	wfi");
+                __asm( "	isb");
+            }
 
-			/* Disable interrupts again because the clock is about to be stopped
-			and interrupts that execute while the clock is stopped will increase
-			any slippage between the time maintained by the RTOS and calendar
-			time. */
-			__asm( "	cpsid i" );
-			__asm( "	dsb" );
-			__asm( "	isb" );
+            configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
 
-			/* Disable the SysTick clock without reading the
-			portNVIC_SYSTICK_CTRL_REG register to ensure the
-			portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
-			the time the SysTick is stopped for is accounted for as best it can
-			be, but using the tickless mode will inevitably result in some tiny
-			drift of the time maintained by the kernel with respect to calendar
-			time*/
-			portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+            /* Re-enable interrupts to allow the interrupt that brought the MCU
+             * out of sleep mode to execute immediately.  see comments above
+             * __disable_interrupt() call above. */
+            __asm( "	cpsie i");
+            __asm( "	dsb");
+            __asm( "	isb");
 
-			/* Determine if the SysTick clock has already counted to zero and
-			been set back to the current reload value (the reload back being
-			correct for the entire expected idle time) or if the SysTick is yet
-			to count to zero (in which case an interrupt other than the SysTick
-			must have brought the system out of sleep mode). */
-			if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-			{
-				uint32_t ulCalculatedLoadValue;
+            /* Disable interrupts again because the clock is about to be stopped
+             * and interrupts that execute while the clock is stopped will increase
+             * any slippage between the time maintained by the RTOS and calendar
+             * time. */
+            __asm( "	cpsid i");
+            __asm( "	dsb");
+            __asm( "	isb");
 
-				/* The tick interrupt is already pending, and the SysTick count
-				reloaded with ulReloadValue.  Reset the
-				portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
-				period. */
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+            /* Disable the SysTick clock without reading the
+             * portNVIC_SYSTICK_CTRL_REG register to ensure the
+             * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
+             * the time the SysTick is stopped for is accounted for as best it can
+             * be, but using the tickless mode will inevitably result in some tiny
+             * drift of the time maintained by the kernel with respect to calendar
+             * time*/
+            portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
 
-				/* Don't allow a tiny value, or values that have somehow
-				underflowed because the post sleep hook did something
-				that took too long. */
-				if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-				{
-					ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-				}
+            /* Determine if the SysTick clock has already counted to zero and
+             * been set back to the current reload value (the reload back being
+             * correct for the entire expected idle time) or if the SysTick is yet
+             * to count to zero (in which case an interrupt other than the SysTick
+             * must have brought the system out of sleep mode). */
+            if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+            {
+                uint32_t ulCalculatedLoadValue;
 
-				portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+                /* The tick interrupt is already pending, and the SysTick count
+                 * reloaded with ulReloadValue.  Reset the
+                 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+                 * period. */
+                ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
 
-				/* As the pending tick will be processed as soon as this
-				function exits, the tick value maintained by the tick is stepped
-				forward by one less than the time spent waiting. */
-				ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-			}
-			else
-			{
-				/* Something other than the tick interrupt ended the sleep.
-				Work out how long the sleep lasted rounded to complete tick
-				periods (not the ulReload value which accounted for part
-				ticks). */
-				ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+                /* Don't allow a tiny value, or values that have somehow
+                 * underflowed because the post sleep hook did something
+                 * that took too long. */
+                if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+                {
+                    ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+                }
 
-				/* How many complete tick periods passed while the processor
-				was waiting? */
-				ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+                portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
 
-				/* The reload value is set to whatever fraction of a single tick
-				period remains. */
-				portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-			}
+                /* As the pending tick will be processed as soon as this
+                 * function exits, the tick value maintained by the tick is stepped
+                 * forward by one less than the time spent waiting. */
+                ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+            }
+            else
+            {
+                /* Something other than the tick interrupt ended the sleep.
+                 * Work out how long the sleep lasted rounded to complete tick
+                 * periods (not the ulReload value which accounted for part
+                 * ticks). */
+                ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
-			again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
-			value. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-			vTaskStepTick( ulCompleteTickPeriods );
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+                /* How many complete tick periods passed while the processor
+                 * was waiting? */
+                ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
 
-			/* Exit with interrupts enabled. */
-			__asm( "	cpsie i" );
-		}
-	}
+                /* The reload value is set to whatever fraction of a single tick
+                 * period remains. */
+                portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+            }
+
+            /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+             * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+             * value. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            vTaskStepTick( ulCompleteTickPeriods );
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Exit with interrupts enabled. */
+            __asm( "	cpsie i");
+        }
+    }
 
 #endif /* configUSE_TICKLESS_IDLE */
 /*-----------------------------------------------------------*/
@@ -520,102 +527,81 @@ void xPortSysTickHandler( void )
 #pragma WEAK( vPortSetupTimerInterrupt )
 void vPortSetupTimerInterrupt( void )
 {
-	/* Calculate the constants required to configure the tick interrupt. */
-	#if( configUSE_TICKLESS_IDLE == 1 )
-	{
-		ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
-		xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
-	}
-	#endif /* configUSE_TICKLESS_IDLE */
+    /* Calculate the constants required to configure the tick interrupt. */
+    #if ( configUSE_TICKLESS_IDLE == 1 )
+        {
+            ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+            xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+            ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+        }
+    #endif /* configUSE_TICKLESS_IDLE */
 
-	/* Stop and clear the SysTick. */
-	portNVIC_SYSTICK_CTRL_REG = 0UL;
-	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+    /* Stop and clear the SysTick. */
+    portNVIC_SYSTICK_CTRL_REG = 0UL;
+    portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-	/* Configure SysTick to interrupt at the requested rate. */
-	portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
+    /* Configure SysTick to interrupt at the requested rate. */
+    portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+    portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
 }
 /*-----------------------------------------------------------*/
 
-#if( configASSERT_DEFINED == 1 )
+#if ( configASSERT_DEFINED == 1 )
 
-	void vPortValidateInterruptPriority( void )
-	{
-	extern uint32_t ulPortGetIPSR( void );
-	uint32_t ulCurrentInterrupt;
-	uint8_t ucCurrentPriority;
+    void vPortValidateInterruptPriority( void )
+    {
+        extern uint32_t ulPortGetIPSR( void );
+        uint32_t ulCurrentInterrupt;
+        uint8_t ucCurrentPriority;
 
-		ulCurrentInterrupt = ulPortGetIPSR();
+        ulCurrentInterrupt = ulPortGetIPSR();
 
-		/* Is the interrupt number a user defined interrupt? */
-		if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
-		{
-			/* Look up the interrupt's priority. */
-			ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
+        /* Is the interrupt number a user defined interrupt? */
+        if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
+        {
+            /* Look up the interrupt's priority. */
+            ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
 
-			/* The following assertion will fail if a service routine (ISR) for
-			an interrupt that has been assigned a priority above
-			configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
-			function.  ISR safe FreeRTOS API functions must *only* be called
-			from interrupts that have been assigned a priority at or below
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
+            /* The following assertion will fail if a service routine (ISR) for
+             * an interrupt that has been assigned a priority above
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
+             * function.  ISR safe FreeRTOS API functions must *only* be called
+             * from interrupts that have been assigned a priority at or below
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Numerically low interrupt priority numbers represent logically high
+             * interrupt priorities, therefore the priority of the interrupt must
+             * be set to a value equal to or numerically *higher* than
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Interrupts that	use the FreeRTOS API must not be left at their
+             * default priority of	zero as that is the highest possible priority,
+             * which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
+             * and	therefore also guaranteed to be invalid.
+             *
+             * FreeRTOS maintains separate thread and ISR API functions to ensure
+             * interrupt entry is as fast and simple as possible.
+             *
+             * The following links provide detailed information:
+             * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+             * https://www.FreeRTOS.org/FAQHelp.html */
+            configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
+        }
 
-			Numerically low interrupt priority numbers represent logically high
-			interrupt priorities, therefore the priority of the interrupt must
-			be set to a value equal to or numerically *higher* than
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
-
-			Interrupts that	use the FreeRTOS API must not be left at their
-			default priority of	zero as that is the highest possible priority,
-			which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
-			and	therefore also guaranteed to be invalid.
-
-			FreeRTOS maintains separate thread and ISR API functions to ensure
-			interrupt entry is as fast and simple as possible.
-
-			The following links provide detailed information:
-			http://www.freertos.org/RTOS-Cortex-M3-M4.html
-			http://www.freertos.org/FAQHelp.html */
-			configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
-		}
-
-		/* Priority grouping:  The interrupt controller (NVIC) allows the bits
-		that define each interrupt's priority to be split between bits that
-		define the interrupt's pre-emption priority bits and bits that define
-		the interrupt's sub-priority.  For simplicity all bits must be defined
-		to be pre-emption priority bits.  The following assertion will fail if
-		this is not the case (if some bits represent a sub-priority).
-
-		If the application only uses CMSIS libraries for interrupt
-		configuration then the correct setting can be achieved on all Cortex-M
-		devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
-		scheduler.  Note however that some vendor specific peripheral libraries
-		assume a non-zero priority group setting, in which cases using a value
-		of zero will result in unpredictable behaviour. */
-		configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
-	}
+        /* Priority grouping:  The interrupt controller (NVIC) allows the bits
+         * that define each interrupt's priority to be split between bits that
+         * define the interrupt's pre-emption priority bits and bits that define
+         * the interrupt's sub-priority.  For simplicity all bits must be defined
+         * to be pre-emption priority bits.  The following assertion will fail if
+         * this is not the case (if some bits represent a sub-priority).
+         *
+         * If the application only uses CMSIS libraries for interrupt
+         * configuration then the correct setting can be achieved on all Cortex-M
+         * devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
+         * scheduler.  Note however that some vendor specific peripheral libraries
+         * assume a non-zero priority group setting, in which cases using a value
+         * of zero will result in unpredictable behaviour. */
+        configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
+    }
 
 #endif /* configASSERT_DEFINED */
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
diff --git a/portable/CCS/ARM_CM3/portasm.asm b/portable/CCS/ARM_CM3/portasm.asm
index d225c0827..c8805ac3e 100644
--- a/portable/CCS/ARM_CM3/portasm.asm
+++ b/portable/CCS/ARM_CM3/portasm.asm
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/CCS/ARM_CM3/portmacro.h b/portable/CCS/ARM_CM3/portmacro.h
index a04172dd8..8a92ad3fe 100644
--- a/portable/CCS/ARM_CM3/portmacro.h
+++ b/portable/CCS/ARM_CM3/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,19 +19,19 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -44,128 +44,127 @@ extern "C" {
  */
 
 /* Type definitions. */
-#define portCHAR		char
-#define portFLOAT		float
-#define portDOUBLE		double
-#define portLONG		long
-#define portSHORT		short
-#define portSTACK_TYPE	uint32_t
-#define portBASE_TYPE	long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE StackType_t;
-typedef long BaseType_t;
-typedef unsigned long UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC 1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Architecture specifics. */
-#define portSTACK_GROWTH			( -1 )
-#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT			8
+    #define portSTACK_GROWTH      ( -1 )
+    #define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT    8
 
 /*-----------------------------------------------------------*/
 
 /* Compiler directives. */
-#define portWEAK_SYMBOL				__attribute__((weak))
+    #define portWEAK_SYMBOL    __attribute__( ( weak ) )
 
 /*-----------------------------------------------------------*/
 
 /* Scheduler utilities. */
-#define portYIELD()											\
-{															\
-	/* Set a PendSV to request a context switch. */			\
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;			\
-	__asm( "	dsb" );										\
-	__asm( "	isb" );										\
-}
+    #define portYIELD()                                 \
+    {                                                   \
+        /* Set a PendSV to request a context switch. */ \
+        portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
+        __asm( "	dsb");                                \
+        __asm( "	isb");                                \
+    }
 
-#define portNVIC_INT_CTRL_REG		( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT		( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()
-#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired != pdFALSE ) portYIELD()
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 
 /*-----------------------------------------------------------*/
 
 /* Architecture specific optimisations. */
-#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
-	#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
-#endif
+    #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
+        #define configUSE_PORT_OPTIMISED_TASK_SELECTION    1
+    #endif
 
-#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
+    #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
 
-	/* Check the configuration. */
-	#if( configMAX_PRIORITIES > 32 )
-		#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
-	#endif
+/* Check the configuration. */
+        #if ( configMAX_PRIORITIES > 32 )
+            #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
+        #endif
 
-	/* Store/clear the ready priorities in a bit map. */
-	#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
-	#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
+/* Store/clear the ready priorities in a bit map. */
+        #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities )    ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
+        #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities )     ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
 
-	/*-----------------------------------------------------------*/
+/*-----------------------------------------------------------*/
 
-	#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) )
+        #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities )    uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) )
 
-#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
+    #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
 /*-----------------------------------------------------------*/
 
 /* Critical section management. */
-extern void vPortEnterCritical( void );
-extern void vPortExitCritical( void );
+    extern void vPortEnterCritical( void );
+    extern void vPortExitCritical( void );
 
-#define portDISABLE_INTERRUPTS()										\
-{																		\
-	_set_interrupt_priority( configMAX_SYSCALL_INTERRUPT_PRIORITY );	\
-	__asm( "	dsb" );													\
-	__asm( "	isb" );													\
-}
+    #define portDISABLE_INTERRUPTS()                                     \
+    {                                                                    \
+        _set_interrupt_priority( configMAX_SYSCALL_INTERRUPT_PRIORITY ); \
+        __asm( "	dsb");                                                 \
+        __asm( "	isb");                                                 \
+    }
 
-#define portENABLE_INTERRUPTS()					_set_interrupt_priority( 0 )
-#define portENTER_CRITICAL()					vPortEnterCritical()
-#define portEXIT_CRITICAL()						vPortExitCritical()
-#define portSET_INTERRUPT_MASK_FROM_ISR()		_set_interrupt_priority( configMAX_SYSCALL_INTERRUPT_PRIORITY ); __asm( "	dsb" ); __asm( "	isb" )
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)	_set_interrupt_priority( x )
+    #define portENABLE_INTERRUPTS()                   _set_interrupt_priority( 0 )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         _set_interrupt_priority( configMAX_SYSCALL_INTERRUPT_PRIORITY ); __asm( "	dsb" ); __asm( "	isb")
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    _set_interrupt_priority( x )
 /*-----------------------------------------------------------*/
 
 /* Tickless idle/low power functionality. */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site.  These are
-not necessary for to use this port.  They are defined so the common demo files
-(which build with all the ports) will build. */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+ * not necessary for to use this port.  They are defined so the common demo files
+ * (which build with all the ports) will build. */
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
-#ifdef configASSERT
-	void vPortValidateInterruptPriority( void );
-	#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() 	vPortValidateInterruptPriority()
-#endif
+    #ifdef configASSERT
+        void vPortValidateInterruptPriority( void );
+        #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()    vPortValidateInterruptPriority()
+    #endif
 
 /* portNOP() is not required by this port. */
-#define portNOP()
+    #define portNOP()
 
 /*-----------------------------------------------------------*/
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
-
diff --git a/portable/CCS/ARM_CM4F/port.c b/portable/CCS/ARM_CM4F/port.c
index e1bc748b6..19ff798c8 100644
--- a/portable/CCS/ARM_CM4F/port.c
+++ b/portable/CCS/ARM_CM4F/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,85 +19,85 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------
- * Implementation of functions defined in portable.h for the ARM CM4F port.
- *----------------------------------------------------------*/
+* Implementation of functions defined in portable.h for the ARM CM4F port.
+*----------------------------------------------------------*/
 
 /* Scheduler includes. */
 #include "FreeRTOS.h"
 #include "task.h"
 
 #ifndef __TI_VFP_SUPPORT__
-	#error This port can only be used when the project options are configured to enable hardware floating point support.
+    #error This port can only be used when the project options are configured to enable hardware floating point support.
 #endif
 
-#if( configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 )
-	#error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+#if ( configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 )
+    #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See http: /*www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
 #endif
 
 #ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 1UL << 2UL )
+    #define configSYSTICK_CLOCK_HZ      configCPU_CLOCK_HZ
+    /* Ensure the SysTick is clocked at the same frequency as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 1UL << 2UL )
 #else
-	/* The way the SysTick is clocked is not modified in case it is not the same
-	as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 0 )
+
+/* The way the SysTick is clocked is not modified in case it is not the same
+ * as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 0 )
 #endif
 
 /* Constants required to manipulate the core.  Registers first... */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_CTRL_REG             ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG             ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG    ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SHPR3_REG                    ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
 /* ...then bits in the registers. */
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portNVIC_PENDSVCLEAR_BIT 			( 1UL << 27UL )
-#define portNVIC_PEND_SYSTICK_CLEAR_BIT		( 1UL << 25UL )
+#define portNVIC_SYSTICK_INT_BIT              ( 1UL << 1UL )
+#define portNVIC_SYSTICK_ENABLE_BIT           ( 1UL << 0UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT       ( 1UL << 16UL )
+#define portNVIC_PENDSVCLEAR_BIT              ( 1UL << 27UL )
+#define portNVIC_PEND_SYSTICK_CLEAR_BIT       ( 1UL << 25UL )
 
-#define portNVIC_PENDSV_PRI					( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
-#define portNVIC_SYSTICK_PRI				( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
+#define portNVIC_PENDSV_PRI                   ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
+#define portNVIC_SYSTICK_PRI                  ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
 
 /* Constants required to check the validity of an interrupt priority. */
-#define portFIRST_USER_INTERRUPT_NUMBER		( 16 )
-#define portNVIC_IP_REGISTERS_OFFSET_16 	( 0xE000E3F0 )
-#define portAIRCR_REG						( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
-#define portMAX_8_BIT_VALUE					( ( uint8_t ) 0xff )
-#define portTOP_BIT_OF_BYTE					( ( uint8_t ) 0x80 )
-#define portMAX_PRIGROUP_BITS				( ( uint8_t ) 7 )
-#define portPRIORITY_GROUP_MASK				( 0x07UL << 8UL )
-#define portPRIGROUP_SHIFT					( 8UL )
+#define portFIRST_USER_INTERRUPT_NUMBER       ( 16 )
+#define portNVIC_IP_REGISTERS_OFFSET_16       ( 0xE000E3F0 )
+#define portAIRCR_REG                         ( *( ( volatile uint32_t * ) 0xE000ED0C ) )
+#define portMAX_8_BIT_VALUE                   ( ( uint8_t ) 0xff )
+#define portTOP_BIT_OF_BYTE                   ( ( uint8_t ) 0x80 )
+#define portMAX_PRIGROUP_BITS                 ( ( uint8_t ) 7 )
+#define portPRIORITY_GROUP_MASK               ( 0x07UL << 8UL )
+#define portPRIGROUP_SHIFT                    ( 8UL )
 
 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
-#define portVECTACTIVE_MASK					( 0xFFUL )
+#define portVECTACTIVE_MASK                   ( 0xFFUL )
 
 /* Constants required to manipulate the VFP. */
-#define portFPCCR							( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
-#define portASPEN_AND_LSPEN_BITS			( 0x3UL << 30UL )
+#define portFPCCR                             ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
+#define portASPEN_AND_LSPEN_BITS              ( 0x3UL << 30UL )
 
 /* Constants required to set up the initial stack. */
-#define portINITIAL_XPSR					( 0x01000000 )
-#define portINITIAL_EXC_RETURN				( 0xfffffffd )
+#define portINITIAL_XPSR                      ( 0x01000000 )
+#define portINITIAL_EXC_RETURN                ( 0xfffffffd )
 
 /* The systick is a 24-bit counter. */
-#define portMAX_24_BIT_NUMBER				( 0xffffffUL )
+#define portMAX_24_BIT_NUMBER                 ( 0xffffffUL )
 
 /* A fiddle factor to estimate the number of SysTick counts that would have
-occurred while the SysTick counter is stopped during tickless idle
-calculations. */
-#define portMISSED_COUNTS_FACTOR			( 45UL )
+ * occurred while the SysTick counter is stopped during tickless idle
+ * calculations. */
+#define portMISSED_COUNTS_FACTOR              ( 45UL )
 
 /* For strict compliance with the Cortex-M spec the task start address should
-have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
-#define portSTART_ADDRESS_MASK		( ( StackType_t ) 0xfffffffeUL )
+ * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
+#define portSTART_ADDRESS_MASK                ( ( StackType_t ) 0xfffffffeUL )
 
 /*
  * Setup the timer to generate the tick interrupts.  The implementation in this
@@ -129,34 +129,34 @@ static void prvTaskExitError( void );
 /*-----------------------------------------------------------*/
 
 /* Required to allow portasm.asm access the configMAX_SYSCALL_INTERRUPT_PRIORITY
-setting. */
+ * setting. */
 const uint32_t ulMaxSyscallInterruptPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY;
 
 /* Each task maintains its own interrupt status in the critical nesting
-variable. */
+ * variable. */
 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 
 /*
  * The number of SysTick increments that make up one tick period.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulTimerCountsForOneTick = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulTimerCountsForOneTick = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * The maximum number of tick periods that can be suppressed is limited by the
  * 24 bit resolution of the SysTick timer.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t xMaximumPossibleSuppressedTicks = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * Compensate for the CPU cycles that pass while the SysTick is stopped (low
  * power functionality only.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulStoppedTimerCompensation = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulStoppedTimerCompensation = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
@@ -165,9 +165,9 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
  * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
  */
 #if ( configASSERT_DEFINED == 1 )
-	 static uint8_t ucMaxSysCallPriority = 0;
-	 static uint32_t ulMaxPRIGROUPValue = 0;
-	 static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16;
+    static uint8_t ucMaxSysCallPriority = 0;
+    static uint32_t ulMaxPRIGROUPValue = 0;
+    static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16;
 #endif /* configASSERT_DEFINED */
 
 /*-----------------------------------------------------------*/
@@ -175,47 +175,52 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 /*
  * See header file for description.
  */
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	interrupt. */
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
 
-	/* Offset added to account for the way the MCU uses the stack on entry/exit
-	of interrupts, and to ensure alignment. */
-	pxTopOfStack--;
+    /* Offset added to account for the way the MCU uses the stack on entry/exit
+     * of interrupts, and to ensure alignment. */
+    pxTopOfStack--;
 
-	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
-	pxTopOfStack--;
-	*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;	/* PC */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) prvTaskExitError;	/* LR */
+    *pxTopOfStack = portINITIAL_XPSR;                                    /* xPSR */
+    pxTopOfStack--;
+    *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) prvTaskExitError;                    /* LR */
 
-	/* Save code space by skipping register initialisation. */
-	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
-	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
+    /* Save code space by skipping register initialisation. */
+    pxTopOfStack -= 5;                            /* R12, R3, R2 and R1. */
+    *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
 
-	/* A save method is being used that requires each task to maintain its
-	own exec return value. */
-	pxTopOfStack--;
-	*pxTopOfStack = portINITIAL_EXC_RETURN;
+    /* A save method is being used that requires each task to maintain its
+     * own exec return value. */
+    pxTopOfStack--;
+    *pxTopOfStack = portINITIAL_EXC_RETURN;
 
-	pxTopOfStack -= 8;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
+    pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
 
-	return pxTopOfStack;
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 static void prvTaskExitError( void )
 {
-	/* A function that implements a task must not exit or attempt to return to
-	its caller as there is nothing to return to.  If a task wants to exit it
-	should instead call vTaskDelete( NULL ).
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to.  If a task wants to exit it
+     * should instead call vTaskDelete( NULL ).
+     *
+     * Artificially force an assert() to be triggered if configASSERT() is
+     * defined, then stop here so application writers can catch the error. */
+    configASSERT( uxCriticalNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
 
-	Artificially force an assert() to be triggered if configASSERT() is
-	defined, then stop here so application writers can catch the error. */
-	configASSERT( uxCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
-	for( ;; );
+    for( ; ; )
+    {
+    }
 }
 /*-----------------------------------------------------------*/
 
@@ -224,314 +229,318 @@ static void prvTaskExitError( void )
  */
 BaseType_t xPortStartScheduler( void )
 {
-	#if( configASSERT_DEFINED == 1 )
-	{
-		volatile uint32_t ulOriginalPriority;
-		volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
-		volatile uint8_t ucMaxPriorityValue;
+    #if ( configASSERT_DEFINED == 1 )
+        {
+            volatile uint32_t ulOriginalPriority;
+            volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
+            volatile uint8_t ucMaxPriorityValue;
 
-		/* Determine the maximum priority from which ISR safe FreeRTOS API
-		functions can be called.  ISR safe functions are those that end in
-		"FromISR".  FreeRTOS maintains separate thread and ISR API functions to
-		ensure interrupt entry is as fast and simple as possible.
+            /* Determine the maximum priority from which ISR safe FreeRTOS API
+             * functions can be called.  ISR safe functions are those that end in
+             * "FromISR".  FreeRTOS maintains separate thread and ISR API functions to
+             * ensure interrupt entry is as fast and simple as possible.
+             *
+             * Save the interrupt priority value that is about to be clobbered. */
+            ulOriginalPriority = *pucFirstUserPriorityRegister;
 
-		Save the interrupt priority value that is about to be clobbered. */
-		ulOriginalPriority = *pucFirstUserPriorityRegister;
+            /* Determine the number of priority bits available.  First write to all
+             * possible bits. */
+            *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
 
-		/* Determine the number of priority bits available.  First write to all
-		possible bits. */
-		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
+            /* Read the value back to see how many bits stuck. */
+            ucMaxPriorityValue = *pucFirstUserPriorityRegister;
 
-		/* Read the value back to see how many bits stuck. */
-		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
+            /* Use the same mask on the maximum system call priority. */
+            ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
 
-		/* Use the same mask on the maximum system call priority. */
-		ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
+            /* Calculate the maximum acceptable priority group value for the number
+             * of bits read back. */
+            ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
 
-		/* Calculate the maximum acceptable priority group value for the number
-		of bits read back. */
-		ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
-		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
-		{
-			ulMaxPRIGROUPValue--;
-			ucMaxPriorityValue <<= ( uint8_t ) 0x01;
-		}
+            while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
+            {
+                ulMaxPRIGROUPValue--;
+                ucMaxPriorityValue <<= ( uint8_t ) 0x01;
+            }
 
-		#ifdef __NVIC_PRIO_BITS
-		{
-			/* Check the CMSIS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
-		}
-		#endif
-		
-		#ifdef configPRIO_BITS
-		{
-			/* Check the FreeRTOS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
-		}
-		#endif
+            #ifdef __NVIC_PRIO_BITS
+                {
+                    /* Check the CMSIS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
+                }
+            #endif
 
-		/* Shift the priority group value back to its position within the AIRCR
-		register. */
-		ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
-		ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
+            #ifdef configPRIO_BITS
+                {
+                    /* Check the FreeRTOS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
+                }
+            #endif
 
-		/* Restore the clobbered interrupt priority register to its original
-		value. */
-		*pucFirstUserPriorityRegister = ulOriginalPriority;
-	}
-	#endif /* conifgASSERT_DEFINED */
+            /* Shift the priority group value back to its position within the AIRCR
+             * register. */
+            ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
+            ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
 
-	/* Make PendSV and SysTick the lowest priority interrupts. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+            /* Restore the clobbered interrupt priority register to its original
+             * value. */
+            *pucFirstUserPriorityRegister = ulOriginalPriority;
+        }
+    #endif /* conifgASSERT_DEFINED */
 
-	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-	here already. */
-	vPortSetupTimerInterrupt();
+    /* Make PendSV and SysTick the lowest priority interrupts. */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
-	/* Initialise the critical nesting count ready for the first task. */
-	uxCriticalNesting = 0;
+    /* Start the timer that generates the tick ISR.  Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
 
-	/* Ensure the VFP is enabled - it should be anyway. */
-	vPortEnableVFP();
+    /* Initialise the critical nesting count ready for the first task. */
+    uxCriticalNesting = 0;
 
-	/* Lazy save always. */
-	*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
+    /* Ensure the VFP is enabled - it should be anyway. */
+    vPortEnableVFP();
 
-	/* Start the first task. */
-	vPortStartFirstTask();
+    /* Lazy save always. */
+    *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
 
-	/* Should not get here! */
-	return 0;
+    /* Start the first task. */
+    vPortStartFirstTask();
+
+    /* Should not get here! */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void )
 {
-	/* Not implemented in ports where there is nothing to return to.
-	Artificially force an assert. */
-	configASSERT( uxCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( uxCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void )
 {
-	portDISABLE_INTERRUPTS();
-	uxCriticalNesting++;
+    portDISABLE_INTERRUPTS();
+    uxCriticalNesting++;
 
-	/* This is not the interrupt safe version of the enter critical function so
-	assert() if it is being called from an interrupt context.  Only API
-	functions that end in "FromISR" can be used in an interrupt.  Only assert if
-	the critical nesting count is 1 to protect against recursive calls if the
-	assert function also uses a critical section. */
-	if( uxCriticalNesting == 1 )
-	{
-		configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
-	}
+    /* This is not the interrupt safe version of the enter critical function so
+     * assert() if it is being called from an interrupt context.  Only API
+     * functions that end in "FromISR" can be used in an interrupt.  Only assert if
+     * the critical nesting count is 1 to protect against recursive calls if the
+     * assert function also uses a critical section. */
+    if( uxCriticalNesting == 1 )
+    {
+        configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
+    }
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void )
 {
-	configASSERT( uxCriticalNesting );
-	uxCriticalNesting--;
-	if( uxCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
+    configASSERT( uxCriticalNesting );
+    uxCriticalNesting--;
+
+    if( uxCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
 }
 /*-----------------------------------------------------------*/
 
 void xPortSysTickHandler( void )
 {
-	/* The SysTick runs at the lowest interrupt priority, so when this interrupt
-	executes all interrupts must be unmasked.  There is therefore no need to
-	save and then restore the interrupt mask value as its value is already
-	known. */
-	( void ) portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* A context switch is required.  Context switching is performed in
-			the PendSV interrupt.  Pend the PendSV interrupt. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );
+    /* The SysTick runs at the lowest interrupt priority, so when this interrupt
+     * executes all interrupts must be unmasked.  There is therefore no need to
+     * save and then restore the interrupt mask value as its value is already
+     * known. */
+    ( void ) portSET_INTERRUPT_MASK_FROM_ISR();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* A context switch is required.  Context switching is performed in
+             * the PendSV interrupt.  Pend the PendSV interrupt. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );
 }
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TICKLESS_IDLE == 1 )
+#if ( configUSE_TICKLESS_IDLE == 1 )
 
-	#pragma WEAK( vPortSuppressTicksAndSleep )
-	void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-	{
-	uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
-	TickType_t xModifiableIdleTime;
+    #pragma WEAK( vPortSuppressTicksAndSleep )
+    void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+    {
+        uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+        TickType_t xModifiableIdleTime;
 
-		/* Make sure the SysTick reload value does not overflow the counter. */
-		if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-		{
-			xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-		}
+        /* Make sure the SysTick reload value does not overflow the counter. */
+        if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+        {
+            xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+        }
 
-		/* Stop the SysTick momentarily.  The time the SysTick is stopped for
-		is accounted for as best it can be, but using the tickless mode will
-		inevitably result in some tiny drift of the time maintained by the
-		kernel with respect to calendar time. */
-		portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+        /* Stop the SysTick momentarily.  The time the SysTick is stopped for
+         * is accounted for as best it can be, but using the tickless mode will
+         * inevitably result in some tiny drift of the time maintained by the
+         * kernel with respect to calendar time. */
+        portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
 
-		/* Calculate the reload value required to wait xExpectedIdleTime
-		tick periods.  -1 is used because this code will execute part way
-		through one of the tick periods. */
-		ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-		if( ulReloadValue > ulStoppedTimerCompensation )
-		{
-			ulReloadValue -= ulStoppedTimerCompensation;
-		}
+        /* Calculate the reload value required to wait xExpectedIdleTime
+         * tick periods.  -1 is used because this code will execute part way
+         * through one of the tick periods. */
+        ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
 
-		/* Enter a critical section but don't use the taskENTER_CRITICAL()
-		method as that will mask interrupts that should exit sleep mode. */
-		__asm( "	cpsid i" );
-		__asm( "	dsb" );
-		__asm( "	isb" );
+        if( ulReloadValue > ulStoppedTimerCompensation )
+        {
+            ulReloadValue -= ulStoppedTimerCompensation;
+        }
 
+        /* Enter a critical section but don't use the taskENTER_CRITICAL()
+         * method as that will mask interrupts that should exit sleep mode. */
+        __asm( "	cpsid i");
+        __asm( "	dsb");
+        __asm( "	isb");
 
-		/* If a context switch is pending or a task is waiting for the scheduler
-		to be unsuspended then abandon the low power entry. */
-		if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-		{
-			/* Restart from whatever is left in the count register to complete
-			this tick period. */
-			portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+        /* If a context switch is pending or a task is waiting for the scheduler
+         * to be unsuspended then abandon the low power entry. */
+        if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+        {
+            /* Restart from whatever is left in the count register to complete
+             * this tick period. */
+            portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Reset the reload register to the value required for normal tick
-			periods. */
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+            /* Reset the reload register to the value required for normal tick
+             * periods. */
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
 
-			/* Re-enable interrupts - see comments above __disable_interrupt()
-			call above. */
-			__asm( "	cpsie i" );
-		}
-		else
-		{
-			/* Set the new reload value. */
-			portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+            /* Re-enable interrupts - see comments above __disable_interrupt()
+             * call above. */
+            __asm( "	cpsie i");
+        }
+        else
+        {
+            /* Set the new reload value. */
+            portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
 
-			/* Clear the SysTick count flag and set the count value back to
-			zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            /* Clear the SysTick count flag and set the count value back to
+             * zero. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
-			set its parameter to 0 to indicate that its implementation contains
-			its own wait for interrupt or wait for event instruction, and so wfi
-			should not be executed again.  However, the original expected idle
-			time variable must remain unmodified, so a copy is taken. */
-			xModifiableIdleTime = xExpectedIdleTime;
-			configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-			if( xModifiableIdleTime > 0 )
-			{
-				__asm( "	dsb" );
-				__asm( "	wfi" );
-				__asm( "	isb" );
-			}
-			configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+            /* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
+             * set its parameter to 0 to indicate that its implementation contains
+             * its own wait for interrupt or wait for event instruction, and so wfi
+             * should not be executed again.  However, the original expected idle
+             * time variable must remain unmodified, so a copy is taken. */
+            xModifiableIdleTime = xExpectedIdleTime;
+            configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
 
-			/* Re-enable interrupts to allow the interrupt that brought the MCU
-			out of sleep mode to execute immediately.  see comments above
-			__disable_interrupt() call above. */
-			__asm( "	cpsie i" );
-			__asm( "	dsb" );
-			__asm( "	isb" );
+            if( xModifiableIdleTime > 0 )
+            {
+                __asm( "	dsb");
+                __asm( "	wfi");
+                __asm( "	isb");
+            }
 
-			/* Disable interrupts again because the clock is about to be stopped
-			and interrupts that execute while the clock is stopped will increase
-			any slippage between the time maintained by the RTOS and calendar
-			time. */
-			__asm( "	cpsid i" );
-			__asm( "	dsb" );
-			__asm( "	isb" );
+            configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
 
-			/* Disable the SysTick clock without reading the
-			portNVIC_SYSTICK_CTRL_REG register to ensure the
-			portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
-			the time the SysTick is stopped for is accounted for as best it can
-			be, but using the tickless mode will inevitably result in some tiny
-			drift of the time maintained by the kernel with respect to calendar
-			time*/
-			portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+            /* Re-enable interrupts to allow the interrupt that brought the MCU
+             * out of sleep mode to execute immediately.  see comments above
+             * __disable_interrupt() call above. */
+            __asm( "	cpsie i");
+            __asm( "	dsb");
+            __asm( "	isb");
 
-			/* Determine if the SysTick clock has already counted to zero and
-			been set back to the current reload value (the reload back being
-			correct for the entire expected idle time) or if the SysTick is yet
-			to count to zero (in which case an interrupt other than the SysTick
-			must have brought the system out of sleep mode). */
-			if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-			{
-				uint32_t ulCalculatedLoadValue;
+            /* Disable interrupts again because the clock is about to be stopped
+             * and interrupts that execute while the clock is stopped will increase
+             * any slippage between the time maintained by the RTOS and calendar
+             * time. */
+            __asm( "	cpsid i");
+            __asm( "	dsb");
+            __asm( "	isb");
 
-				/* The tick interrupt is already pending, and the SysTick count
-				reloaded with ulReloadValue.  Reset the
-				portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
-				period. */
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+            /* Disable the SysTick clock without reading the
+             * portNVIC_SYSTICK_CTRL_REG register to ensure the
+             * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
+             * the time the SysTick is stopped for is accounted for as best it can
+             * be, but using the tickless mode will inevitably result in some tiny
+             * drift of the time maintained by the kernel with respect to calendar
+             * time*/
+            portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
 
-				/* Don't allow a tiny value, or values that have somehow
-				underflowed because the post sleep hook did something
-				that took too long. */
-				if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-				{
-					ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-				}
+            /* Determine if the SysTick clock has already counted to zero and
+             * been set back to the current reload value (the reload back being
+             * correct for the entire expected idle time) or if the SysTick is yet
+             * to count to zero (in which case an interrupt other than the SysTick
+             * must have brought the system out of sleep mode). */
+            if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+            {
+                uint32_t ulCalculatedLoadValue;
 
-				portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+                /* The tick interrupt is already pending, and the SysTick count
+                 * reloaded with ulReloadValue.  Reset the
+                 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+                 * period. */
+                ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
 
-				/* As the pending tick will be processed as soon as this
-				function exits, the tick value maintained by the tick is stepped
-				forward by one less than the time spent waiting. */
-				ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-			}
-			else
-			{
-				/* Something other than the tick interrupt ended the sleep.
-				Work out how long the sleep lasted rounded to complete tick
-				periods (not the ulReload value which accounted for part
-				ticks). */
-				ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+                /* Don't allow a tiny value, or values that have somehow
+                 * underflowed because the post sleep hook did something
+                 * that took too long. */
+                if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+                {
+                    ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+                }
 
-				/* How many complete tick periods passed while the processor
-				was waiting? */
-				ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+                portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
 
-				/* The reload value is set to whatever fraction of a single tick
-				period remains. */
-				portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-			}
+                /* As the pending tick will be processed as soon as this
+                 * function exits, the tick value maintained by the tick is stepped
+                 * forward by one less than the time spent waiting. */
+                ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+            }
+            else
+            {
+                /* Something other than the tick interrupt ended the sleep.
+                 * Work out how long the sleep lasted rounded to complete tick
+                 * periods (not the ulReload value which accounted for part
+                 * ticks). */
+                ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
-			again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
-			value. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-			vTaskStepTick( ulCompleteTickPeriods );
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+                /* How many complete tick periods passed while the processor
+                 * was waiting? */
+                ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
 
-			/* Exit with interrupts enabled. */
-			__asm( "	cpsie i" );
-		}
-	}
+                /* The reload value is set to whatever fraction of a single tick
+                 * period remains. */
+                portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+            }
+
+            /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+             * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+             * value. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            vTaskStepTick( ulCompleteTickPeriods );
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Exit with interrupts enabled. */
+            __asm( "	cpsie i");
+        }
+    }
 
 #endif /* configUSE_TICKLESS_IDLE */
 /*-----------------------------------------------------------*/
@@ -543,102 +552,81 @@ void xPortSysTickHandler( void )
 #pragma WEAK( vPortSetupTimerInterrupt )
 void vPortSetupTimerInterrupt( void )
 {
-	/* Calculate the constants required to configure the tick interrupt. */
-	#if( configUSE_TICKLESS_IDLE == 1 )
-	{
-		ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
-		xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
-	}
-	#endif /* configUSE_TICKLESS_IDLE */
+    /* Calculate the constants required to configure the tick interrupt. */
+    #if ( configUSE_TICKLESS_IDLE == 1 )
+        {
+            ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+            xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+            ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+        }
+    #endif /* configUSE_TICKLESS_IDLE */
 
-	/* Stop and clear the SysTick. */
-	portNVIC_SYSTICK_CTRL_REG = 0UL;
-	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+    /* Stop and clear the SysTick. */
+    portNVIC_SYSTICK_CTRL_REG = 0UL;
+    portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-	/* Configure SysTick to interrupt at the requested rate. */
-	portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
+    /* Configure SysTick to interrupt at the requested rate. */
+    portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+    portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
 }
 /*-----------------------------------------------------------*/
 
-#if( configASSERT_DEFINED == 1 )
+#if ( configASSERT_DEFINED == 1 )
 
-	void vPortValidateInterruptPriority( void )
-	{
-	extern uint32_t ulPortGetIPSR( void );
-	uint32_t ulCurrentInterrupt;
-	uint8_t ucCurrentPriority;
+    void vPortValidateInterruptPriority( void )
+    {
+        extern uint32_t ulPortGetIPSR( void );
+        uint32_t ulCurrentInterrupt;
+        uint8_t ucCurrentPriority;
 
-		ulCurrentInterrupt = ulPortGetIPSR();
+        ulCurrentInterrupt = ulPortGetIPSR();
 
-		/* Is the interrupt number a user defined interrupt? */
-		if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
-		{
-			/* Look up the interrupt's priority. */
-			ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
+        /* Is the interrupt number a user defined interrupt? */
+        if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
+        {
+            /* Look up the interrupt's priority. */
+            ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
 
-			/* The following assertion will fail if a service routine (ISR) for
-			an interrupt that has been assigned a priority above
-			configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
-			function.  ISR safe FreeRTOS API functions must *only* be called
-			from interrupts that have been assigned a priority at or below
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
+            /* The following assertion will fail if a service routine (ISR) for
+             * an interrupt that has been assigned a priority above
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
+             * function.  ISR safe FreeRTOS API functions must *only* be called
+             * from interrupts that have been assigned a priority at or below
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Numerically low interrupt priority numbers represent logically high
+             * interrupt priorities, therefore the priority of the interrupt must
+             * be set to a value equal to or numerically *higher* than
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Interrupts that	use the FreeRTOS API must not be left at their
+             * default priority of	zero as that is the highest possible priority,
+             * which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
+             * and	therefore also guaranteed to be invalid.
+             *
+             * FreeRTOS maintains separate thread and ISR API functions to ensure
+             * interrupt entry is as fast and simple as possible.
+             *
+             * The following links provide detailed information:
+             * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+             * https://www.FreeRTOS.org/FAQHelp.html */
+            configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
+        }
 
-			Numerically low interrupt priority numbers represent logically high
-			interrupt priorities, therefore the priority of the interrupt must
-			be set to a value equal to or numerically *higher* than
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
-
-			Interrupts that	use the FreeRTOS API must not be left at their
-			default priority of	zero as that is the highest possible priority,
-			which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
-			and	therefore also guaranteed to be invalid.
-
-			FreeRTOS maintains separate thread and ISR API functions to ensure
-			interrupt entry is as fast and simple as possible.
-
-			The following links provide detailed information:
-			http://www.freertos.org/RTOS-Cortex-M3-M4.html
-			http://www.freertos.org/FAQHelp.html */
-			configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
-		}
-
-		/* Priority grouping:  The interrupt controller (NVIC) allows the bits
-		that define each interrupt's priority to be split between bits that
-		define the interrupt's pre-emption priority bits and bits that define
-		the interrupt's sub-priority.  For simplicity all bits must be defined
-		to be pre-emption priority bits.  The following assertion will fail if
-		this is not the case (if some bits represent a sub-priority).
-
-		If the application only uses CMSIS libraries for interrupt
-		configuration then the correct setting can be achieved on all Cortex-M
-		devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
-		scheduler.  Note however that some vendor specific peripheral libraries
-		assume a non-zero priority group setting, in which cases using a value
-		of zero will result in unpredictable behaviour. */
-		configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
-	}
+        /* Priority grouping:  The interrupt controller (NVIC) allows the bits
+         * that define each interrupt's priority to be split between bits that
+         * define the interrupt's pre-emption priority bits and bits that define
+         * the interrupt's sub-priority.  For simplicity all bits must be defined
+         * to be pre-emption priority bits.  The following assertion will fail if
+         * this is not the case (if some bits represent a sub-priority).
+         *
+         * If the application only uses CMSIS libraries for interrupt
+         * configuration then the correct setting can be achieved on all Cortex-M
+         * devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
+         * scheduler.  Note however that some vendor specific peripheral libraries
+         * assume a non-zero priority group setting, in which cases using a value
+         * of zero will result in unpredictable behaviour. */
+        configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
+    }
 
 #endif /* configASSERT_DEFINED */
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
diff --git a/portable/CCS/ARM_CM4F/portasm.asm b/portable/CCS/ARM_CM4F/portasm.asm
index 375f00fb0..df0352a3d 100644
--- a/portable/CCS/ARM_CM4F/portasm.asm
+++ b/portable/CCS/ARM_CM4F/portasm.asm
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/CCS/ARM_CM4F/portmacro.h b/portable/CCS/ARM_CM4F/portmacro.h
index ca4611628..403810940 100644
--- a/portable/CCS/ARM_CM4F/portmacro.h
+++ b/portable/CCS/ARM_CM4F/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,19 +19,19 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -44,122 +44,121 @@ extern "C" {
  */
 
 /* Type definitions. */
-#define portCHAR		char
-#define portFLOAT		float
-#define portDOUBLE		double
-#define portLONG		long
-#define portSHORT		short
-#define portSTACK_TYPE	uint32_t
-#define portBASE_TYPE	long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE StackType_t;
-typedef long BaseType_t;
-typedef unsigned long UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC 1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Architecture specifics. */
-#define portSTACK_GROWTH			( -1 )
-#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT			8
+    #define portSTACK_GROWTH      ( -1 )
+    #define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT    8
 /*-----------------------------------------------------------*/
 
 /* Scheduler utilities. */
-#define portYIELD()											\
-{															\
-	/* Set a PendSV to request a context switch. */			\
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;			\
-	__asm( "	dsb" );										\
-	__asm( "	isb" );										\
-}
+    #define portYIELD()                                 \
+    {                                                   \
+        /* Set a PendSV to request a context switch. */ \
+        portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
+        __asm( "	dsb");                                \
+        __asm( "	isb");                                \
+    }
 
-#define portNVIC_INT_CTRL_REG		( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT		( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()
-#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired != pdFALSE ) portYIELD()
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 
 /*-----------------------------------------------------------*/
 
 /* Architecture specific optimisations. */
-#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
-	#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
-#endif
+    #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
+        #define configUSE_PORT_OPTIMISED_TASK_SELECTION    1
+    #endif
 
-#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
+    #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
 
-	/* Check the configuration. */
-	#if( configMAX_PRIORITIES > 32 )
-		#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
-	#endif
+/* Check the configuration. */
+        #if ( configMAX_PRIORITIES > 32 )
+            #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
+        #endif
 
-	/* Store/clear the ready priorities in a bit map. */
-	#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
-	#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
+/* Store/clear the ready priorities in a bit map. */
+        #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities )    ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
+        #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities )     ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
 
-	/*-----------------------------------------------------------*/
+/*-----------------------------------------------------------*/
 
-	#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) )
+        #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities )    uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) )
 
-#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
+    #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
 /*-----------------------------------------------------------*/
 
 /* Critical section management. */
-extern void vPortEnterCritical( void );
-extern void vPortExitCritical( void );
+    extern void vPortEnterCritical( void );
+    extern void vPortExitCritical( void );
 
-#define portDISABLE_INTERRUPTS()										\
-{																		\
-	_set_interrupt_priority( configMAX_SYSCALL_INTERRUPT_PRIORITY );	\
-	__asm( "	dsb" );													\
-	__asm( "	isb" );													\
-}
+    #define portDISABLE_INTERRUPTS()                                     \
+    {                                                                    \
+        _set_interrupt_priority( configMAX_SYSCALL_INTERRUPT_PRIORITY ); \
+        __asm( "	dsb");                                                 \
+        __asm( "	isb");                                                 \
+    }
 
-#define portENABLE_INTERRUPTS()					_set_interrupt_priority( 0 )
-#define portENTER_CRITICAL()					vPortEnterCritical()
-#define portEXIT_CRITICAL()						vPortExitCritical()
-#define portSET_INTERRUPT_MASK_FROM_ISR()		_set_interrupt_priority( configMAX_SYSCALL_INTERRUPT_PRIORITY ); __asm( "	dsb" ); __asm( "	isb" )
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)	_set_interrupt_priority( x )
+    #define portENABLE_INTERRUPTS()                   _set_interrupt_priority( 0 )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         _set_interrupt_priority( configMAX_SYSCALL_INTERRUPT_PRIORITY ); __asm( "	dsb" ); __asm( "	isb")
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    _set_interrupt_priority( x )
 /*-----------------------------------------------------------*/
 
 /* Tickless idle/low power functionality. */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site.  These are
-not necessary for to use this port.  They are defined so the common demo files
-(which build with all the ports) will build. */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+ * not necessary for to use this port.  They are defined so the common demo files
+ * (which build with all the ports) will build. */
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
-#ifdef configASSERT
-	void vPortValidateInterruptPriority( void );
-	#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() 	vPortValidateInterruptPriority()
-#endif
+    #ifdef configASSERT
+        void vPortValidateInterruptPriority( void );
+        #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()    vPortValidateInterruptPriority()
+    #endif
 
 /* portNOP() is not required by this port. */
-#define portNOP()
+    #define portNOP()
 
 /*-----------------------------------------------------------*/
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
-
diff --git a/portable/CCS/ARM_Cortex-R4/port.c b/portable/CCS/ARM_Cortex-R4/port.c
index 972150b78..3275e99d4 100644
--- a/portable/CCS/ARM_Cortex-R4/port.c
+++ b/portable/CCS/ARM_Cortex-R4/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/CCS/ARM_Cortex-R4/portASM.asm b/portable/CCS/ARM_Cortex-R4/portASM.asm
index b3ae83e16..3378bed67 100644
--- a/portable/CCS/ARM_Cortex-R4/portASM.asm
+++ b/portable/CCS/ARM_Cortex-R4/portASM.asm
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/CCS/ARM_Cortex-R4/portmacro.h b/portable/CCS/ARM_Cortex-R4/portmacro.h
index d8a9a4c2b..d9050c399 100644
--- a/portable/CCS/ARM_Cortex-R4/portmacro.h
+++ b/portable/CCS/ARM_Cortex-R4/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/CCS/MSP430X/data_model.h b/portable/CCS/MSP430X/data_model.h
index fcfcfabb7..15d946f5c 100644
--- a/portable/CCS/MSP430X/data_model.h
+++ b/portable/CCS/MSP430X/data_model.h
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/CCS/MSP430X/port.c b/portable/CCS/MSP430X/port.c
index c6abcedfb..882cd6989 100644
--- a/portable/CCS/MSP430X/port.c
+++ b/portable/CCS/MSP430X/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/CCS/MSP430X/portext.asm b/portable/CCS/MSP430X/portext.asm
index f1fbbf74e..f137bd861 100644
--- a/portable/CCS/MSP430X/portext.asm
+++ b/portable/CCS/MSP430X/portext.asm
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/CCS/MSP430X/portmacro.h b/portable/CCS/MSP430X/portmacro.h
index ca2f02fe1..6304f3ac0 100644
--- a/portable/CCS/MSP430X/portmacro.h
+++ b/portable/CCS/MSP430X/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/CodeWarrior/ColdFire_V1/port.c b/portable/CodeWarrior/ColdFire_V1/port.c
index 24cdf8b71..ea0bb432b 100644
--- a/portable/CodeWarrior/ColdFire_V1/port.c
+++ b/portable/CodeWarrior/ColdFire_V1/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/CodeWarrior/ColdFire_V1/portasm.S b/portable/CodeWarrior/ColdFire_V1/portasm.S
index 2cd47ebb2..8786a3e48 100644
--- a/portable/CodeWarrior/ColdFire_V1/portasm.S
+++ b/portable/CodeWarrior/ColdFire_V1/portasm.S
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/CodeWarrior/ColdFire_V1/portmacro.h b/portable/CodeWarrior/ColdFire_V1/portmacro.h
index efb1dcad0..7c2afe8e2 100644
--- a/portable/CodeWarrior/ColdFire_V1/portmacro.h
+++ b/portable/CodeWarrior/ColdFire_V1/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/CodeWarrior/ColdFire_V2/port.c b/portable/CodeWarrior/ColdFire_V2/port.c
index eefccd6b6..7fd0e4a14 100644
--- a/portable/CodeWarrior/ColdFire_V2/port.c
+++ b/portable/CodeWarrior/ColdFire_V2/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/CodeWarrior/ColdFire_V2/portasm.S b/portable/CodeWarrior/ColdFire_V2/portasm.S
index c20639bbf..615a4b0eb 100644
--- a/portable/CodeWarrior/ColdFire_V2/portasm.S
+++ b/portable/CodeWarrior/ColdFire_V2/portasm.S
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/CodeWarrior/ColdFire_V2/portmacro.h b/portable/CodeWarrior/ColdFire_V2/portmacro.h
index 9ba19dab6..c956525f1 100644
--- a/portable/CodeWarrior/ColdFire_V2/portmacro.h
+++ b/portable/CodeWarrior/ColdFire_V2/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/CodeWarrior/HCS12/port.c b/portable/CodeWarrior/HCS12/port.c
index d6d0294b4..1ad6edf34 100644
--- a/portable/CodeWarrior/HCS12/port.c
+++ b/portable/CodeWarrior/HCS12/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/CodeWarrior/HCS12/portmacro.h b/portable/CodeWarrior/HCS12/portmacro.h
index f4be25644..4ff0ed5f9 100644
--- a/portable/CodeWarrior/HCS12/portmacro.h
+++ b/portable/CodeWarrior/HCS12/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/Common/mpu_wrappers.c b/portable/Common/mpu_wrappers.c
index 8a6144841..60469fcc5 100644
--- a/portable/Common/mpu_wrappers.c
+++ b/portable/Common/mpu_wrappers.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,10 +19,9 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*
@@ -31,8 +30,8 @@
  */
 
 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
-all the API functions to use the MPU wrappers.  That should only be done when
-task.h is included from an application file. */
+ * all the API functions to use the MPU wrappers.  That should only be done when
+ * task.h is included from an application file. */
 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
 /* Scheduler includes. */
@@ -62,1313 +61,1390 @@ void vPortResetPrivilege( BaseType_t xRunningPrivileged );
 
 BaseType_t xPortRaisePrivilege( void ) /* FREERTOS_SYSTEM_CALL */
 {
-BaseType_t xRunningPrivileged;
+    BaseType_t xRunningPrivileged;
 
-	/* Check whether the processor is already privileged. */
-	xRunningPrivileged = portIS_PRIVILEGED();
+    /* Check whether the processor is already privileged. */
+    xRunningPrivileged = portIS_PRIVILEGED();
 
-	/* If the processor is not already privileged, raise privilege. */
-	if( xRunningPrivileged != pdTRUE )
-	{
-		portRAISE_PRIVILEGE();
-	}
+    /* If the processor is not already privileged, raise privilege. */
+    if( xRunningPrivileged == pdFALSE )
+    {
+        portRAISE_PRIVILEGE();
+    }
 
-	return xRunningPrivileged;
+    return xRunningPrivileged;
 }
 /*-----------------------------------------------------------*/
 
 void vPortResetPrivilege( BaseType_t xRunningPrivileged )
 {
-	if( xRunningPrivileged != pdTRUE )
-	{
-		portRESET_PRIVILEGE();
-	}
+    if( xRunningPrivileged == pdFALSE )
+    {
+        portRESET_PRIVILEGE();
+    }
 }
 /*-----------------------------------------------------------*/
 
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-	BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+    BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition,
+                                          TaskHandle_t * pxCreatedTask ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xTaskCreateRestricted( pxTaskDefinition, pxCreatedTask );
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
+        xReturn = xTaskCreateRestricted( pxTaskDefinition, pxCreatedTask );
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
 #endif /* conifgSUPPORT_DYNAMIC_ALLOCATION */
 /*-----------------------------------------------------------*/
 
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-	BaseType_t MPU_xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+    BaseType_t MPU_xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition,
+                                                TaskHandle_t * pxCreatedTask ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xTaskCreateRestrictedStatic( pxTaskDefinition, pxCreatedTask );
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
+        xReturn = xTaskCreateRestrictedStatic( pxTaskDefinition, pxCreatedTask );
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
 #endif /* conifgSUPPORT_DYNAMIC_ALLOCATION */
 /*-----------------------------------------------------------*/
 
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-	BaseType_t MPU_xTaskCreate( TaskFunction_t pvTaskCode, const char * const pcName, uint16_t usStackDepth, void *pvParameters, UBaseType_t uxPriority, TaskHandle_t *pxCreatedTask ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+    BaseType_t MPU_xTaskCreate( TaskFunction_t pvTaskCode,
+                                const char * const pcName,
+                                uint16_t usStackDepth,
+                                void * pvParameters,
+                                UBaseType_t uxPriority,
+                                TaskHandle_t * pxCreatedTask ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xTaskCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask );
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
+        xReturn = xTaskCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask );
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
 #endif /* configSUPPORT_DYNAMIC_ALLOCATION */
 /*-----------------------------------------------------------*/
 
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-	TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode, const char * const pcName, const uint32_t ulStackDepth, void * const pvParameters, UBaseType_t uxPriority, StackType_t * const puxStackBuffer, StaticTask_t * const pxTaskBuffer ) /* FREERTOS_SYSTEM_CALL */
-	{
-	TaskHandle_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+    TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode,
+                                        const char * const pcName,
+                                        const uint32_t ulStackDepth,
+                                        void * const pvParameters,
+                                        UBaseType_t uxPriority,
+                                        StackType_t * const puxStackBuffer,
+                                        StaticTask_t * const pxTaskBuffer ) /* FREERTOS_SYSTEM_CALL */
+    {
+        TaskHandle_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xTaskCreateStatic( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, puxStackBuffer, pxTaskBuffer );
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
+        xReturn = xTaskCreateStatic( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, puxStackBuffer, pxTaskBuffer );
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
 #endif /* configSUPPORT_STATIC_ALLOCATION */
 /*-----------------------------------------------------------*/
 
-void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const xRegions ) /* FREERTOS_SYSTEM_CALL */
+void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask,
+                                  const MemoryRegion_t * const xRegions ) /* FREERTOS_SYSTEM_CALL */
 {
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	vTaskAllocateMPURegions( xTask, xRegions );
-	vPortResetPrivilege( xRunningPrivileged );
+    vTaskAllocateMPURegions( xTask, xRegions );
+    vPortResetPrivilege( xRunningPrivileged );
 }
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_vTaskDelete == 1 )
-	void MPU_vTaskDelete( TaskHandle_t pxTaskToDelete ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    void MPU_vTaskDelete( TaskHandle_t pxTaskToDelete ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		vTaskDelete( pxTaskToDelete );
-		vPortResetPrivilege( xRunningPrivileged );
-	}
+        vTaskDelete( pxTaskToDelete );
+        vPortResetPrivilege( xRunningPrivileged );
+    }
 #endif
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_vTaskDelayUntil == 1 )
-	void MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, TickType_t xTimeIncrement ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    void MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime,
+                              TickType_t xTimeIncrement ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement );
-		vPortResetPrivilege( xRunningPrivileged );
-	}
+        vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement );
+        vPortResetPrivilege( xRunningPrivileged );
+    }
 #endif
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_xTaskAbortDelay == 1 )
-	BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xTaskAbortDelay( xTask );
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
+        xReturn = xTaskAbortDelay( xTask );
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
 #endif
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_vTaskDelay == 1 )
-	void MPU_vTaskDelay( TickType_t xTicksToDelay ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    void MPU_vTaskDelay( TickType_t xTicksToDelay ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		vTaskDelay( xTicksToDelay );
-		vPortResetPrivilege( xRunningPrivileged );
-	}
+        vTaskDelay( xTicksToDelay );
+        vPortResetPrivilege( xRunningPrivileged );
+    }
 #endif
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_uxTaskPriorityGet == 1 )
-	UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t pxTask ) /* FREERTOS_SYSTEM_CALL */
-	{
-	UBaseType_t uxReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t pxTask ) /* FREERTOS_SYSTEM_CALL */
+    {
+        UBaseType_t uxReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		uxReturn = uxTaskPriorityGet( pxTask );
-		vPortResetPrivilege( xRunningPrivileged );
-		return uxReturn;
-	}
+        uxReturn = uxTaskPriorityGet( pxTask );
+        vPortResetPrivilege( xRunningPrivileged );
+        return uxReturn;
+    }
 #endif
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_vTaskPrioritySet == 1 )
-	void MPU_vTaskPrioritySet( TaskHandle_t pxTask, UBaseType_t uxNewPriority ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    void MPU_vTaskPrioritySet( TaskHandle_t pxTask,
+                               UBaseType_t uxNewPriority ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		vTaskPrioritySet( pxTask, uxNewPriority );
-		vPortResetPrivilege( xRunningPrivileged );
-	}
+        vTaskPrioritySet( pxTask, uxNewPriority );
+        vPortResetPrivilege( xRunningPrivileged );
+    }
 #endif
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_eTaskGetState == 1 )
-	eTaskState MPU_eTaskGetState( TaskHandle_t pxTask ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
-	eTaskState eReturn;
+    eTaskState MPU_eTaskGetState( TaskHandle_t pxTask ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+        eTaskState eReturn;
 
-		eReturn = eTaskGetState( pxTask );
-		vPortResetPrivilege( xRunningPrivileged );
-		return eReturn;
-	}
+        eReturn = eTaskGetState( pxTask );
+        vPortResetPrivilege( xRunningPrivileged );
+        return eReturn;
+    }
 #endif
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TRACE_FACILITY == 1 )
-	void MPU_vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( configUSE_TRACE_FACILITY == 1 )
+    void MPU_vTaskGetInfo( TaskHandle_t xTask,
+                           TaskStatus_t * pxTaskStatus,
+                           BaseType_t xGetFreeStackSpace,
+                           eTaskState eState ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		vTaskGetInfo( xTask, pxTaskStatus, xGetFreeStackSpace, eState );
-		vPortResetPrivilege( xRunningPrivileged );
-	}
-#endif
+        vTaskGetInfo( xTask, pxTaskStatus, xGetFreeStackSpace, eState );
+        vPortResetPrivilege( xRunningPrivileged );
+    }
+#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 )
-	TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* FREERTOS_SYSTEM_CALL */
-	{
-	TaskHandle_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* FREERTOS_SYSTEM_CALL */
+    {
+        TaskHandle_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xTaskGetIdleTaskHandle();
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
+        xReturn = xTaskGetIdleTaskHandle();
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
 #endif
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_vTaskSuspend == 1 )
-	void MPU_vTaskSuspend( TaskHandle_t pxTaskToSuspend ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    void MPU_vTaskSuspend( TaskHandle_t pxTaskToSuspend ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		vTaskSuspend( pxTaskToSuspend );
-		vPortResetPrivilege( xRunningPrivileged );
-	}
+        vTaskSuspend( pxTaskToSuspend );
+        vPortResetPrivilege( xRunningPrivileged );
+    }
 #endif
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_vTaskSuspend == 1 )
-	void MPU_vTaskResume( TaskHandle_t pxTaskToResume ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    void MPU_vTaskResume( TaskHandle_t pxTaskToResume ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		vTaskResume( pxTaskToResume );
-		vPortResetPrivilege( xRunningPrivileged );
-	}
+        vTaskResume( pxTaskToResume );
+        vPortResetPrivilege( xRunningPrivileged );
+    }
 #endif
 /*-----------------------------------------------------------*/
 
 void MPU_vTaskSuspendAll( void ) /* FREERTOS_SYSTEM_CALL */
 {
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	vTaskSuspendAll();
-	vPortResetPrivilege( xRunningPrivileged );
+    vTaskSuspendAll();
+    vPortResetPrivilege( xRunningPrivileged );
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t MPU_xTaskResumeAll( void ) /* FREERTOS_SYSTEM_CALL */
 {
-BaseType_t xReturn;
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	xReturn = xTaskResumeAll();
-	vPortResetPrivilege( xRunningPrivileged );
-	return xReturn;
+    xReturn = xTaskResumeAll();
+    vPortResetPrivilege( xRunningPrivileged );
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
 TickType_t MPU_xTaskGetTickCount( void ) /* FREERTOS_SYSTEM_CALL */
 {
-TickType_t xReturn;
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    TickType_t xReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	xReturn = xTaskGetTickCount();
-	vPortResetPrivilege( xRunningPrivileged );
-	return xReturn;
+    xReturn = xTaskGetTickCount();
+    vPortResetPrivilege( xRunningPrivileged );
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
 UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* FREERTOS_SYSTEM_CALL */
 {
-UBaseType_t uxReturn;
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    UBaseType_t uxReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	uxReturn = uxTaskGetNumberOfTasks();
-	vPortResetPrivilege( xRunningPrivileged );
-	return uxReturn;
+    uxReturn = uxTaskGetNumberOfTasks();
+    vPortResetPrivilege( xRunningPrivileged );
+    return uxReturn;
 }
 /*-----------------------------------------------------------*/
 
 char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */
 {
-char *pcReturn;
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    char * pcReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	pcReturn = pcTaskGetName( xTaskToQuery );
-	vPortResetPrivilege( xRunningPrivileged );
-	return pcReturn;
+    pcReturn = pcTaskGetName( xTaskToQuery );
+    vPortResetPrivilege( xRunningPrivileged );
+    return pcReturn;
 }
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_xTaskGetHandle == 1 )
-	TaskHandle_t MPU_xTaskGetHandle( const char *pcNameToQuery ) /* FREERTOS_SYSTEM_CALL */
-	{
-	TaskHandle_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    TaskHandle_t MPU_xTaskGetHandle( const char * pcNameToQuery ) /* FREERTOS_SYSTEM_CALL */
+    {
+        TaskHandle_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xTaskGetHandle( pcNameToQuery );
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
+        xReturn = xTaskGetHandle( pcNameToQuery );
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
 #endif
 /*-----------------------------------------------------------*/
 
 #if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
-	void MPU_vTaskList( char *pcWriteBuffer ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    void MPU_vTaskList( char * pcWriteBuffer ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		vTaskList( pcWriteBuffer );
-		vPortResetPrivilege( xRunningPrivileged );
-	}
+        vTaskList( pcWriteBuffer );
+        vPortResetPrivilege( xRunningPrivileged );
+    }
 #endif
 /*-----------------------------------------------------------*/
 
 #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
-	void MPU_vTaskGetRunTimeStats( char *pcWriteBuffer ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    void MPU_vTaskGetRunTimeStats( char * pcWriteBuffer ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		vTaskGetRunTimeStats( pcWriteBuffer );
-		vPortResetPrivilege( xRunningPrivileged );
-	}
+        vTaskGetRunTimeStats( pcWriteBuffer );
+        vPortResetPrivilege( xRunningPrivileged );
+    }
 #endif
 /*-----------------------------------------------------------*/
 
-#if( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) )
-	uint32_t MPU_ulTaskGetIdleRunTimeCounter( void ) /* FREERTOS_SYSTEM_CALL */
-	{
-	uint32_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) )
+    uint32_t MPU_ulTaskGetIdleRunTimeCounter( void ) /* FREERTOS_SYSTEM_CALL */
+    {
+        uint32_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = ulTaskGetIdleRunTimeCounter();
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
+        xReturn = ulTaskGetIdleRunTimeCounter();
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
 #endif
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
-	void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxTagValue ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask,
+                                         TaskHookFunction_t pxTagValue ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		vTaskSetApplicationTaskTag( xTask, pxTagValue );
-		vPortResetPrivilege( xRunningPrivileged );
-	}
+        vTaskSetApplicationTaskTag( xTask, pxTagValue );
+        vPortResetPrivilege( xRunningPrivileged );
+    }
 #endif
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
-	TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* FREERTOS_SYSTEM_CALL */
-	{
-	TaskHookFunction_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* FREERTOS_SYSTEM_CALL */
+    {
+        TaskHookFunction_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xTaskGetApplicationTaskTag( xTask );
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
+        xReturn = xTaskGetApplicationTaskTag( xTask );
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
 #endif
 /*-----------------------------------------------------------*/
 
 #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 )
-	void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet,
+                                                BaseType_t xIndex,
+                                                void * pvValue ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		vTaskSetThreadLocalStoragePointer( xTaskToSet, xIndex, pvValue );
-		vPortResetPrivilege( xRunningPrivileged );
-	}
+        vTaskSetThreadLocalStoragePointer( xTaskToSet, xIndex, pvValue );
+        vPortResetPrivilege( xRunningPrivileged );
+    }
 #endif
 /*-----------------------------------------------------------*/
 
 #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 )
-	void *MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex ) /* FREERTOS_SYSTEM_CALL */
-	{
-	void *pvReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery,
+                                                   BaseType_t xIndex ) /* FREERTOS_SYSTEM_CALL */
+    {
+        void * pvReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		pvReturn = pvTaskGetThreadLocalStoragePointer( xTaskToQuery, xIndex );
-		vPortResetPrivilege( xRunningPrivileged );
-		return pvReturn;
-	}
-#endif
+        pvReturn = pvTaskGetThreadLocalStoragePointer( xTaskToQuery, xIndex );
+        vPortResetPrivilege( xRunningPrivileged );
+        return pvReturn;
+    }
+#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
-	BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask,
+                                                 void * pvParameter ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter );
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
-#endif
+        xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter );
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
+#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_TRACE_FACILITY == 1 )
-	UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t *pxTaskStatusArray, UBaseType_t uxArraySize, uint32_t *pulTotalRunTime ) /* FREERTOS_SYSTEM_CALL */
-	{
-	UBaseType_t uxReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * pxTaskStatusArray,
+                                          UBaseType_t uxArraySize,
+                                          uint32_t * pulTotalRunTime ) /* FREERTOS_SYSTEM_CALL */
+    {
+        UBaseType_t uxReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		uxReturn = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, pulTotalRunTime );
-		vPortResetPrivilege( xRunningPrivileged );
-		return uxReturn;
-	}
-#endif
+        uxReturn = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, pulTotalRunTime );
+        vPortResetPrivilege( xRunningPrivileged );
+        return uxReturn;
+    }
+#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */
 /*-----------------------------------------------------------*/
 
 BaseType_t MPU_xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) /* FREERTOS_SYSTEM_CALL */
 {
-BaseType_t xReturn;
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	xReturn = xTaskCatchUpTicks( xTicksToCatchUp );
-	vPortResetPrivilege( xRunningPrivileged );
-	return xReturn;
+    xReturn = xTaskCatchUpTicks( xTicksToCatchUp );
+    vPortResetPrivilege( xRunningPrivileged );
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )
-	UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* FREERTOS_SYSTEM_CALL */
-	{
-	UBaseType_t uxReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* FREERTOS_SYSTEM_CALL */
+    {
+        UBaseType_t uxReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		uxReturn = uxTaskGetStackHighWaterMark( xTask );
-		vPortResetPrivilege( xRunningPrivileged );
-		return uxReturn;
-	}
+        uxReturn = uxTaskGetStackHighWaterMark( xTask );
+        vPortResetPrivilege( xRunningPrivileged );
+        return uxReturn;
+    }
 #endif
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 )
-	configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* FREERTOS_SYSTEM_CALL */
-	{
-	configSTACK_DEPTH_TYPE uxReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* FREERTOS_SYSTEM_CALL */
+    {
+        configSTACK_DEPTH_TYPE uxReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		uxReturn = uxTaskGetStackHighWaterMark2( xTask );
-		vPortResetPrivilege( xRunningPrivileged );
-		return uxReturn;
-	}
+        uxReturn = uxTaskGetStackHighWaterMark2( xTask );
+        vPortResetPrivilege( xRunningPrivileged );
+        return uxReturn;
+    }
 #endif
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 )
-	TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* FREERTOS_SYSTEM_CALL */
-	{
-	TaskHandle_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* FREERTOS_SYSTEM_CALL */
+    {
+        TaskHandle_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xTaskGetCurrentTaskHandle();
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
+        xReturn = xTaskGetCurrentTaskHandle();
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
 #endif
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_xTaskGetSchedulerState == 1 )
-	BaseType_t MPU_xTaskGetSchedulerState( void ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t MPU_xTaskGetSchedulerState( void ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xTaskGetSchedulerState();
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
+        xReturn = xTaskGetSchedulerState();
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
 #endif
 /*-----------------------------------------------------------*/
 
 void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* FREERTOS_SYSTEM_CALL */
 {
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	vTaskSetTimeOutState( pxTimeOut );
-	vPortResetPrivilege( xRunningPrivileged );
+    vTaskSetTimeOutState( pxTimeOut );
+    vPortResetPrivilege( xRunningPrivileged );
 }
 /*-----------------------------------------------------------*/
 
-BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait ) /* FREERTOS_SYSTEM_CALL */
+BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut,
+                                     TickType_t * const pxTicksToWait ) /* FREERTOS_SYSTEM_CALL */
 {
-BaseType_t xReturn;
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	xReturn = xTaskCheckForTimeOut( pxTimeOut, pxTicksToWait );
-	vPortResetPrivilege( xRunningPrivileged );
-	return xReturn;
+    xReturn = xTaskCheckForTimeOut( pxTimeOut, pxTicksToWait );
+    vPortResetPrivilege( xRunningPrivileged );
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TASK_NOTIFICATIONS == 1 )
-	BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( configUSE_TASK_NOTIFICATIONS == 1 )
+    BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify,
+                                       UBaseType_t uxIndexToNotify,
+                                       uint32_t ulValue,
+                                       eNotifyAction eAction,
+                                       uint32_t * pulPreviousNotificationValue ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xTaskGenericNotify( xTaskToNotify, ulValue, eAction, pulPreviousNotificationValue );
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
-#endif
+        xReturn = xTaskGenericNotify( xTaskToNotify, uxIndexToNotify, ulValue, eAction, pulPreviousNotificationValue );
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
+#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TASK_NOTIFICATIONS == 1 )
-	BaseType_t MPU_xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( configUSE_TASK_NOTIFICATIONS == 1 )
+    BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn,
+                                           uint32_t ulBitsToClearOnEntry,
+                                           uint32_t ulBitsToClearOnExit,
+                                           uint32_t * pulNotificationValue,
+                                           TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xTaskNotifyWait( ulBitsToClearOnEntry, ulBitsToClearOnExit, pulNotificationValue, xTicksToWait );
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
-#endif
+        xReturn = xTaskGenericNotifyWait( uxIndexToWaitOn, ulBitsToClearOnEntry, ulBitsToClearOnExit, pulNotificationValue, xTicksToWait );
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
+#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TASK_NOTIFICATIONS == 1 )
-	uint32_t MPU_ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */
-	{
-	uint32_t ulReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( configUSE_TASK_NOTIFICATIONS == 1 )
+    uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn,
+                                          BaseType_t xClearCountOnExit,
+                                          TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */
+    {
+        uint32_t ulReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		ulReturn = ulTaskNotifyTake( xClearCountOnExit, xTicksToWait );
-		vPortResetPrivilege( xRunningPrivileged );
-		return ulReturn;
-	}
-#endif
+        ulReturn = ulTaskGenericNotifyTake( uxIndexToWaitOn, xClearCountOnExit, xTicksToWait );
+        vPortResetPrivilege( xRunningPrivileged );
+        return ulReturn;
+    }
+#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TASK_NOTIFICATIONS == 1 )
-	BaseType_t MPU_xTaskNotifyStateClear( TaskHandle_t xTask ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( configUSE_TASK_NOTIFICATIONS == 1 )
+    BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask,
+                                                 UBaseType_t uxIndexToClear ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xTaskNotifyStateClear( xTask );
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
-#endif
+        xReturn = xTaskGenericNotifyStateClear( xTask, uxIndexToClear );
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
+#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TASK_NOTIFICATIONS == 1 )
-	uint32_t MPU_ulTaskNotifyValueClear( TaskHandle_t xTask, uint32_t ulBitsToClear ) /* FREERTOS_SYSTEM_CALL */
-	{
-	uint32_t ulReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( configUSE_TASK_NOTIFICATIONS == 1 )
+    uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask,
+                                                UBaseType_t uxIndexToClear,
+                                                uint32_t ulBitsToClear ) /* FREERTOS_SYSTEM_CALL */
+    {
+        uint32_t ulReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		ulReturn = ulTaskNotifyValueClear( xTask, ulBitsToClear );
-		vPortResetPrivilege( xRunningPrivileged );
-		return ulReturn;
-	}
-#endif
+        ulReturn = ulTaskGenericNotifyValueClear( xTask, uxIndexToClear, ulBitsToClear );
+        vPortResetPrivilege( xRunningPrivileged );
+        return ulReturn;
+    }
+#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */
 /*-----------------------------------------------------------*/
 
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-	QueueHandle_t MPU_xQueueGenericCreate( UBaseType_t uxQueueLength, UBaseType_t uxItemSize, uint8_t ucQueueType ) /* FREERTOS_SYSTEM_CALL */
-	{
-	QueueHandle_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+    QueueHandle_t MPU_xQueueGenericCreate( UBaseType_t uxQueueLength,
+                                           UBaseType_t uxItemSize,
+                                           uint8_t ucQueueType ) /* FREERTOS_SYSTEM_CALL */
+    {
+        QueueHandle_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xQueueGenericCreate( uxQueueLength, uxItemSize, ucQueueType );
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
-#endif
+        xReturn = xQueueGenericCreate( uxQueueLength, uxItemSize, ucQueueType );
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
+#endif /* if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) */
 /*-----------------------------------------------------------*/
 
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-	QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType ) /* FREERTOS_SYSTEM_CALL */
-	{
-	QueueHandle_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+    QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength,
+                                                 const UBaseType_t uxItemSize,
+                                                 uint8_t * pucQueueStorage,
+                                                 StaticQueue_t * pxStaticQueue,
+                                                 const uint8_t ucQueueType ) /* FREERTOS_SYSTEM_CALL */
+    {
+        QueueHandle_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xQueueGenericCreateStatic( uxQueueLength, uxItemSize, pucQueueStorage, pxStaticQueue, ucQueueType );
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
-#endif
+        xReturn = xQueueGenericCreateStatic( uxQueueLength, uxItemSize, pucQueueStorage, pxStaticQueue, ucQueueType );
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
+#endif /* if ( configSUPPORT_STATIC_ALLOCATION == 1 ) */
 /*-----------------------------------------------------------*/
 
-BaseType_t MPU_xQueueGenericReset( QueueHandle_t pxQueue, BaseType_t xNewQueue ) /* FREERTOS_SYSTEM_CALL */
+BaseType_t MPU_xQueueGenericReset( QueueHandle_t pxQueue,
+                                   BaseType_t xNewQueue ) /* FREERTOS_SYSTEM_CALL */
 {
-BaseType_t xReturn;
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	xReturn = xQueueGenericReset( pxQueue, xNewQueue );
-	vPortResetPrivilege( xRunningPrivileged );
-	return xReturn;
+    xReturn = xQueueGenericReset( pxQueue, xNewQueue );
+    vPortResetPrivilege( xRunningPrivileged );
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
-BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition ) /* FREERTOS_SYSTEM_CALL */
+BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue,
+                                  const void * const pvItemToQueue,
+                                  TickType_t xTicksToWait,
+                                  BaseType_t xCopyPosition ) /* FREERTOS_SYSTEM_CALL */
 {
-BaseType_t xReturn;
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition );
-	vPortResetPrivilege( xRunningPrivileged );
-	return xReturn;
+    xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition );
+    vPortResetPrivilege( xRunningPrivileged );
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
 UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t pxQueue ) /* FREERTOS_SYSTEM_CALL */
 {
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
-UBaseType_t uxReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    UBaseType_t uxReturn;
 
-	uxReturn = uxQueueMessagesWaiting( pxQueue );
-	vPortResetPrivilege( xRunningPrivileged );
-	return uxReturn;
+    uxReturn = uxQueueMessagesWaiting( pxQueue );
+    vPortResetPrivilege( xRunningPrivileged );
+    return uxReturn;
 }
 /*-----------------------------------------------------------*/
 
 UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */
 {
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
-UBaseType_t uxReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    UBaseType_t uxReturn;
 
-	uxReturn = uxQueueSpacesAvailable( xQueue );
-	vPortResetPrivilege( xRunningPrivileged );
-	return uxReturn;
+    uxReturn = uxQueueSpacesAvailable( xQueue );
+    vPortResetPrivilege( xRunningPrivileged );
+    return uxReturn;
 }
 /*-----------------------------------------------------------*/
 
-BaseType_t MPU_xQueueReceive( QueueHandle_t pxQueue, void * const pvBuffer, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */
+BaseType_t MPU_xQueueReceive( QueueHandle_t pxQueue,
+                              void * const pvBuffer,
+                              TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */
 {
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
-BaseType_t xReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xReturn;
 
-	xReturn = xQueueReceive( pxQueue, pvBuffer, xTicksToWait );
-	vPortResetPrivilege( xRunningPrivileged );
-	return xReturn;
+    xReturn = xQueueReceive( pxQueue, pvBuffer, xTicksToWait );
+    vPortResetPrivilege( xRunningPrivileged );
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
-BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */
+BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue,
+                           void * const pvBuffer,
+                           TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */
 {
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
-BaseType_t xReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xReturn;
 
-	xReturn = xQueuePeek( xQueue, pvBuffer, xTicksToWait );
-	vPortResetPrivilege( xRunningPrivileged );
-	return xReturn;
+    xReturn = xQueuePeek( xQueue, pvBuffer, xTicksToWait );
+    vPortResetPrivilege( xRunningPrivileged );
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
-BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */
+BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue,
+                                    TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */
 {
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
-BaseType_t xReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xReturn;
 
-	xReturn = xQueueSemaphoreTake( xQueue, xTicksToWait );
-	vPortResetPrivilege( xRunningPrivileged );
-	return xReturn;
+    xReturn = xQueueSemaphoreTake( xQueue, xTicksToWait );
+    vPortResetPrivilege( xRunningPrivileged );
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
 #if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) )
-	TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
-	void * xReturn;
+    TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+        void * xReturn;
 
-		xReturn = xQueueGetMutexHolder( xSemaphore );
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
+        xReturn = xQueueGetMutexHolder( xSemaphore );
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
 #endif
 /*-----------------------------------------------------------*/
 
-#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
-	QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) /* FREERTOS_SYSTEM_CALL */
-	{
-	QueueHandle_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
+    QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) /* FREERTOS_SYSTEM_CALL */
+    {
+        QueueHandle_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xQueueCreateMutex( ucQueueType );
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
+        xReturn = xQueueCreateMutex( ucQueueType );
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
 #endif
 /*-----------------------------------------------------------*/
 
-#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
-	QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue ) /* FREERTOS_SYSTEM_CALL */
-	{
-	QueueHandle_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
+    QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType,
+                                               StaticQueue_t * pxStaticQueue ) /* FREERTOS_SYSTEM_CALL */
+    {
+        QueueHandle_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xQueueCreateMutexStatic( ucQueueType, pxStaticQueue );
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
-#endif
+        xReturn = xQueueCreateMutexStatic( ucQueueType, pxStaticQueue );
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
+#endif /* if ( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) */
 /*-----------------------------------------------------------*/
 
-#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
-	QueueHandle_t MPU_xQueueCreateCountingSemaphore( UBaseType_t uxCountValue, UBaseType_t uxInitialCount ) /* FREERTOS_SYSTEM_CALL */
-	{
-	QueueHandle_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
+    QueueHandle_t MPU_xQueueCreateCountingSemaphore( UBaseType_t uxCountValue,
+                                                     UBaseType_t uxInitialCount ) /* FREERTOS_SYSTEM_CALL */
+    {
+        QueueHandle_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
-#endif
+        xReturn = xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
+#endif /* if ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */
 /*-----------------------------------------------------------*/
 
-#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
+#if ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
 
-	QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue ) /* FREERTOS_SYSTEM_CALL */
-	{
-	QueueHandle_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount,
+                                                           const UBaseType_t uxInitialCount,
+                                                           StaticQueue_t * pxStaticQueue ) /* FREERTOS_SYSTEM_CALL */
+    {
+        QueueHandle_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xQueueCreateCountingSemaphoreStatic( uxMaxCount, uxInitialCount, pxStaticQueue );
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
-#endif
+        xReturn = xQueueCreateCountingSemaphoreStatic( uxMaxCount, uxInitialCount, pxStaticQueue );
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
+#endif /* if ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_RECURSIVE_MUTEXES == 1 )
-	BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xBlockTime ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex,
+                                             TickType_t xBlockTime ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime );
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
-#endif
+        xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime );
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
+#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_RECURSIVE_MUTEXES == 1 )
-	BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t xMutex ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t xMutex ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xQueueGiveMutexRecursive( xMutex );
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
+        xReturn = xQueueGiveMutexRecursive( xMutex );
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
 #endif
 /*-----------------------------------------------------------*/
 
-#if( ( configUSE_QUEUE_SETS == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
-	QueueSetHandle_t MPU_xQueueCreateSet( UBaseType_t uxEventQueueLength ) /* FREERTOS_SYSTEM_CALL */
-	{
-	QueueSetHandle_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( ( configUSE_QUEUE_SETS == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
+    QueueSetHandle_t MPU_xQueueCreateSet( UBaseType_t uxEventQueueLength ) /* FREERTOS_SYSTEM_CALL */
+    {
+        QueueSetHandle_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xQueueCreateSet( uxEventQueueLength );
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
+        xReturn = xQueueCreateSet( uxEventQueueLength );
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
 #endif
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_QUEUE_SETS == 1 )
-	QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, TickType_t xBlockTimeTicks ) /* FREERTOS_SYSTEM_CALL */
-	{
-	QueueSetMemberHandle_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet,
+                                                    TickType_t xBlockTimeTicks ) /* FREERTOS_SYSTEM_CALL */
+    {
+        QueueSetMemberHandle_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xQueueSelectFromSet( xQueueSet, xBlockTimeTicks );
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
-#endif
+        xReturn = xQueueSelectFromSet( xQueueSet, xBlockTimeTicks );
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
+#endif /* if ( configUSE_QUEUE_SETS == 1 ) */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_QUEUE_SETS == 1 )
-	BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore,
+                                   QueueSetHandle_t xQueueSet ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xQueueAddToSet( xQueueOrSemaphore, xQueueSet );
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
-#endif
+        xReturn = xQueueAddToSet( xQueueOrSemaphore, xQueueSet );
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
+#endif /* if ( configUSE_QUEUE_SETS == 1 ) */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_QUEUE_SETS == 1 )
-	BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore,
+                                        QueueSetHandle_t xQueueSet ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xQueueRemoveFromSet( xQueueOrSemaphore, xQueueSet );
-		vPortResetPrivilege( xRunningPrivileged );
-		return xReturn;
-	}
+        xReturn = xQueueRemoveFromSet( xQueueOrSemaphore, xQueueSet );
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
+#endif /* if ( configUSE_QUEUE_SETS == 1 ) */
+/*-----------------------------------------------------------*/
+
+#if configQUEUE_REGISTRY_SIZE > 0
+    void MPU_vQueueAddToRegistry( QueueHandle_t xQueue,
+                                  const char * pcName ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+
+        vQueueAddToRegistry( xQueue, pcName );
+
+        vPortResetPrivilege( xRunningPrivileged );
+    }
 #endif
 /*-----------------------------------------------------------*/
 
 #if configQUEUE_REGISTRY_SIZE > 0
-	void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcName ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		vQueueAddToRegistry( xQueue, pcName );
+        vQueueUnregisterQueue( xQueue );
 
-		vPortResetPrivilege( xRunningPrivileged );
-	}
+        vPortResetPrivilege( xRunningPrivileged );
+    }
 #endif
 /*-----------------------------------------------------------*/
 
 #if configQUEUE_REGISTRY_SIZE > 0
-	void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+        const char * pcReturn;
 
-		vQueueUnregisterQueue( xQueue );
+        pcReturn = pcQueueGetName( xQueue );
 
-		vPortResetPrivilege( xRunningPrivileged );
-	}
-#endif
-/*-----------------------------------------------------------*/
-
-#if configQUEUE_REGISTRY_SIZE > 0
-	const char *MPU_pcQueueGetName( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
-	const char *pcReturn;
-
-		pcReturn = pcQueueGetName( xQueue );
-
-		vPortResetPrivilege( xRunningPrivileged );
-		return pcReturn;
-	}
-#endif
+        vPortResetPrivilege( xRunningPrivileged );
+        return pcReturn;
+    }
+#endif /* if configQUEUE_REGISTRY_SIZE > 0 */
 /*-----------------------------------------------------------*/
 
 void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */
 {
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	vQueueDelete( xQueue );
+    vQueueDelete( xQueue );
 
-	vPortResetPrivilege( xRunningPrivileged );
+    vPortResetPrivilege( xRunningPrivileged );
 }
 /*-----------------------------------------------------------*/
 
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-	void *MPU_pvPortMalloc( size_t xSize ) /* FREERTOS_SYSTEM_CALL */
-	{
-	void *pvReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+    void MPU_vPortInitialiseBlocks( void ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		pvReturn = pvPortMalloc( xSize );
+        vPortInitialiseBlocks();
 
-		vPortResetPrivilege( xRunningPrivileged );
-
-		return pvReturn;
-	}
+        vPortResetPrivilege( xRunningPrivileged );
+    }
 #endif /* configSUPPORT_DYNAMIC_ALLOCATION */
 /*-----------------------------------------------------------*/
 
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-	void MPU_vPortFree( void *pv ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+    size_t MPU_xPortGetFreeHeapSize( void ) /* FREERTOS_SYSTEM_CALL */
+    {
+        size_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		vPortFree( pv );
+        xReturn = xPortGetFreeHeapSize();
 
-		vPortResetPrivilege( xRunningPrivileged );
-	}
+        vPortResetPrivilege( xRunningPrivileged );
+
+        return xReturn;
+    }
 #endif /* configSUPPORT_DYNAMIC_ALLOCATION */
 /*-----------------------------------------------------------*/
 
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-	void MPU_vPortInitialiseBlocks( void ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configUSE_TIMERS == 1 ) )
+    TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName,
+                                    const TickType_t xTimerPeriodInTicks,
+                                    const UBaseType_t uxAutoReload,
+                                    void * const pvTimerID,
+                                    TimerCallbackFunction_t pxCallbackFunction ) /* FREERTOS_SYSTEM_CALL */
+    {
+        TimerHandle_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		vPortInitialiseBlocks();
+        xReturn = xTimerCreate( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction );
+        vPortResetPrivilege( xRunningPrivileged );
 
-		vPortResetPrivilege( xRunningPrivileged );
-	}
-#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
+        return xReturn;
+    }
+#endif /* if ( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configUSE_TIMERS == 1 ) ) */
 /*-----------------------------------------------------------*/
 
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-	size_t MPU_xPortGetFreeHeapSize( void ) /* FREERTOS_SYSTEM_CALL */
-	{
-	size_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configUSE_TIMERS == 1 ) )
+    TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName,
+                                          const TickType_t xTimerPeriodInTicks,
+                                          const UBaseType_t uxAutoReload,
+                                          void * const pvTimerID,
+                                          TimerCallbackFunction_t pxCallbackFunction,
+                                          StaticTimer_t * pxTimerBuffer ) /* FREERTOS_SYSTEM_CALL */
+    {
+        TimerHandle_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xPortGetFreeHeapSize();
+        xReturn = xTimerCreateStatic( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxTimerBuffer );
+        vPortResetPrivilege( xRunningPrivileged );
 
-		vPortResetPrivilege( xRunningPrivileged );
-
-		return xReturn;
-	}
-#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
+        return xReturn;
+    }
+#endif /* if ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configUSE_TIMERS == 1 ) ) */
 /*-----------------------------------------------------------*/
 
-#if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configUSE_TIMERS == 1 ) )
-	TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction ) /* FREERTOS_SYSTEM_CALL */
-	{
-	TimerHandle_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( configUSE_TIMERS == 1 )
+    void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* FREERTOS_SYSTEM_CALL */
+    {
+        void * pvReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xTimerCreate( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction );
-		vPortResetPrivilege( xRunningPrivileged );
+        pvReturn = pvTimerGetTimerID( xTimer );
+        vPortResetPrivilege( xRunningPrivileged );
 
-		return xReturn;
-	}
+        return pvReturn;
+    }
+#endif /* if ( configUSE_TIMERS == 1 ) */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_TIMERS == 1 )
+    void MPU_vTimerSetTimerID( TimerHandle_t xTimer,
+                               void * pvNewID ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+
+        vTimerSetTimerID( xTimer, pvNewID );
+        vPortResetPrivilege( xRunningPrivileged );
+    }
 #endif
 /*-----------------------------------------------------------*/
 
-#if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configUSE_TIMERS == 1 ) )
-	TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction, StaticTimer_t *pxTimerBuffer ) /* FREERTOS_SYSTEM_CALL */
-	{
-	TimerHandle_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( configUSE_TIMERS == 1 )
+    BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xTimerCreateStatic( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxTimerBuffer );
-		vPortResetPrivilege( xRunningPrivileged );
+        xReturn = xTimerIsTimerActive( xTimer );
+        vPortResetPrivilege( xRunningPrivileged );
 
-		return xReturn;
-	}
+        return xReturn;
+    }
+#endif /* if ( configUSE_TIMERS == 1 ) */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_TIMERS == 1 )
+    TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* FREERTOS_SYSTEM_CALL */
+    {
+        TaskHandle_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+
+        xReturn = xTimerGetTimerDaemonTaskHandle();
+        vPortResetPrivilege( xRunningPrivileged );
+
+        return xReturn;
+    }
+#endif /* if ( configUSE_TIMERS == 1 ) */
+/*-----------------------------------------------------------*/
+
+#if ( ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) )
+    BaseType_t MPU_xTimerPendFunctionCall( PendedFunction_t xFunctionToPend,
+                                           void * pvParameter1,
+                                           uint32_t ulParameter2,
+                                           TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+
+        xReturn = xTimerPendFunctionCall( xFunctionToPend, pvParameter1, ulParameter2, xTicksToWait );
+        vPortResetPrivilege( xRunningPrivileged );
+
+        return xReturn;
+    }
+#endif /* if ( ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) ) */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_TIMERS == 1 )
+    void MPU_vTimerSetReloadMode( TimerHandle_t xTimer,
+                                  const UBaseType_t uxAutoReload ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+
+        vTimerSetReloadMode( xTimer, uxAutoReload );
+        vPortResetPrivilege( xRunningPrivileged );
+    }
 #endif
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TIMERS == 1 )
-	void *MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* FREERTOS_SYSTEM_CALL */
-	{
-	void * pvReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( configUSE_TIMERS == 1 )
+    UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer )
+    {
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+        UBaseType_t uxReturn;
 
-		pvReturn = pvTimerGetTimerID( xTimer );
-		vPortResetPrivilege( xRunningPrivileged );
-
-		return pvReturn;
-	}
+        uxReturn = uxTimerGetReloadMode( xTimer );
+        vPortResetPrivilege( xRunningPrivileged );
+        return uxReturn;
+    }
 #endif
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TIMERS == 1 )
-	void MPU_vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( configUSE_TIMERS == 1 )
+    const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* FREERTOS_SYSTEM_CALL */
+    {
+        const char * pcReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		vTimerSetTimerID( xTimer, pvNewID );
-		vPortResetPrivilege( xRunningPrivileged );
-	}
-#endif
+        pcReturn = pcTimerGetName( xTimer );
+        vPortResetPrivilege( xRunningPrivileged );
+
+        return pcReturn;
+    }
+#endif /* if ( configUSE_TIMERS == 1 ) */
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TIMERS == 1 )
-	BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( configUSE_TIMERS == 1 )
+    TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* FREERTOS_SYSTEM_CALL */
+    {
+        TickType_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xTimerIsTimerActive( xTimer );
-		vPortResetPrivilege( xRunningPrivileged );
+        xReturn = xTimerGetPeriod( xTimer );
+        vPortResetPrivilege( xRunningPrivileged );
 
-		return xReturn;
-	}
-#endif
+        return xReturn;
+    }
+#endif /* if ( configUSE_TIMERS == 1 ) */
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TIMERS == 1 )
-	TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* FREERTOS_SYSTEM_CALL */
-	{
-	TaskHandle_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( configUSE_TIMERS == 1 )
+    TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* FREERTOS_SYSTEM_CALL */
+    {
+        TickType_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xTimerGetTimerDaemonTaskHandle();
-		vPortResetPrivilege( xRunningPrivileged );
+        xReturn = xTimerGetExpiryTime( xTimer );
+        vPortResetPrivilege( xRunningPrivileged );
 
-		return xReturn;
-	}
-#endif
+        return xReturn;
+    }
+#endif /* if ( configUSE_TIMERS == 1 ) */
 /*-----------------------------------------------------------*/
 
-#if( ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) )
-	BaseType_t MPU_xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( configUSE_TIMERS == 1 )
+    BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer,
+                                         const BaseType_t xCommandID,
+                                         const TickType_t xOptionalValue,
+                                         BaseType_t * const pxHigherPriorityTaskWoken,
+                                         const TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */
+    {
+        BaseType_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xTimerPendFunctionCall( xFunctionToPend, pvParameter1, ulParameter2, xTicksToWait );
-		vPortResetPrivilege( xRunningPrivileged );
+        xReturn = xTimerGenericCommand( xTimer, xCommandID, xOptionalValue, pxHigherPriorityTaskWoken, xTicksToWait );
+        vPortResetPrivilege( xRunningPrivileged );
 
-		return xReturn;
-	}
-#endif
+        return xReturn;
+    }
+#endif /* if ( configUSE_TIMERS == 1 ) */
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TIMERS == 1 )
-	void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, const UBaseType_t uxAutoReload ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+    EventGroupHandle_t MPU_xEventGroupCreate( void ) /* FREERTOS_SYSTEM_CALL */
+    {
+        EventGroupHandle_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		vTimerSetReloadMode( xTimer, uxAutoReload );
-		vPortResetPrivilege( xRunningPrivileged );
-	}
-#endif
+        xReturn = xEventGroupCreate();
+        vPortResetPrivilege( xRunningPrivileged );
+
+        return xReturn;
+    }
+#endif /* if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) */
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TIMERS == 1 )
-	UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer )
-	{
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
-	UBaseType_t uxReturn;
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+    EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer ) /* FREERTOS_SYSTEM_CALL */
+    {
+        EventGroupHandle_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		uxReturn = uxTimerGetReloadMode( xTimer );
-		vPortResetPrivilege( xRunningPrivileged );
-		return uxReturn;
-	}
-#endif
+        xReturn = xEventGroupCreateStatic( pxEventGroupBuffer );
+        vPortResetPrivilege( xRunningPrivileged );
+
+        return xReturn;
+    }
+#endif /* if ( configSUPPORT_STATIC_ALLOCATION == 1 ) */
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TIMERS == 1 )
-	const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* FREERTOS_SYSTEM_CALL */
-	{
-	const char * pcReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
-
-		pcReturn = pcTimerGetName( xTimer );
-		vPortResetPrivilege( xRunningPrivileged );
-
-		return pcReturn;
-	}
-#endif
-/*-----------------------------------------------------------*/
-
-#if( configUSE_TIMERS == 1 )
-	TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* FREERTOS_SYSTEM_CALL */
-	{
-	TickType_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
-
-		xReturn = xTimerGetPeriod( xTimer );
-		vPortResetPrivilege( xRunningPrivileged );
-
-		return xReturn;
-	}
-#endif
-/*-----------------------------------------------------------*/
-
-#if( configUSE_TIMERS == 1 )
-	TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* FREERTOS_SYSTEM_CALL */
-	{
-	TickType_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
-
-		xReturn = xTimerGetExpiryTime( xTimer );
-		vPortResetPrivilege( xRunningPrivileged );
-
-		return xReturn;
-	}
-#endif
-/*-----------------------------------------------------------*/
-
-#if( configUSE_TIMERS == 1 )
-	BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */
-	{
-	BaseType_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
-
-		xReturn = xTimerGenericCommand( xTimer, xCommandID, xOptionalValue, pxHigherPriorityTaskWoken, xTicksToWait );
-		vPortResetPrivilege( xRunningPrivileged );
-
-		return xReturn;
-	}
-#endif
-/*-----------------------------------------------------------*/
-
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-	EventGroupHandle_t MPU_xEventGroupCreate( void ) /* FREERTOS_SYSTEM_CALL */
-	{
-	EventGroupHandle_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
-
-		xReturn = xEventGroupCreate();
-		vPortResetPrivilege( xRunningPrivileged );
-
-		return xReturn;
-	}
-#endif
-/*-----------------------------------------------------------*/
-
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-	EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer ) /* FREERTOS_SYSTEM_CALL */
-	{
-	EventGroupHandle_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
-
-		xReturn = xEventGroupCreateStatic( pxEventGroupBuffer );
-		vPortResetPrivilege( xRunningPrivileged );
-
-		return xReturn;
-	}
-#endif
-/*-----------------------------------------------------------*/
-
-EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */
+EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup,
+                                     const EventBits_t uxBitsToWaitFor,
+                                     const BaseType_t xClearOnExit,
+                                     const BaseType_t xWaitForAllBits,
+                                     TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */
 {
-EventBits_t xReturn;
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    EventBits_t xReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	xReturn = xEventGroupWaitBits( xEventGroup, uxBitsToWaitFor, xClearOnExit, xWaitForAllBits, xTicksToWait );
-	vPortResetPrivilege( xRunningPrivileged );
+    xReturn = xEventGroupWaitBits( xEventGroup, uxBitsToWaitFor, xClearOnExit, xWaitForAllBits, xTicksToWait );
+    vPortResetPrivilege( xRunningPrivileged );
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
-EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) /* FREERTOS_SYSTEM_CALL */
+EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup,
+                                      const EventBits_t uxBitsToClear ) /* FREERTOS_SYSTEM_CALL */
 {
-EventBits_t xReturn;
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    EventBits_t xReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	xReturn = xEventGroupClearBits( xEventGroup, uxBitsToClear );
-	vPortResetPrivilege( xRunningPrivileged );
+    xReturn = xEventGroupClearBits( xEventGroup, uxBitsToClear );
+    vPortResetPrivilege( xRunningPrivileged );
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
-EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) /* FREERTOS_SYSTEM_CALL */
+EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup,
+                                    const EventBits_t uxBitsToSet ) /* FREERTOS_SYSTEM_CALL */
 {
-EventBits_t xReturn;
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    EventBits_t xReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	xReturn = xEventGroupSetBits( xEventGroup, uxBitsToSet );
-	vPortResetPrivilege( xRunningPrivileged );
+    xReturn = xEventGroupSetBits( xEventGroup, uxBitsToSet );
+    vPortResetPrivilege( xRunningPrivileged );
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
-EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */
+EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup,
+                                 const EventBits_t uxBitsToSet,
+                                 const EventBits_t uxBitsToWaitFor,
+                                 TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */
 {
-EventBits_t xReturn;
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    EventBits_t xReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	xReturn = xEventGroupSync( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTicksToWait );
-	vPortResetPrivilege( xRunningPrivileged );
+    xReturn = xEventGroupSync( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTicksToWait );
+    vPortResetPrivilege( xRunningPrivileged );
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
 void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ) /* FREERTOS_SYSTEM_CALL */
 {
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	vEventGroupDelete( xEventGroup );
-	vPortResetPrivilege( xRunningPrivileged );
+    vEventGroupDelete( xEventGroup );
+    vPortResetPrivilege( xRunningPrivileged );
 }
 /*-----------------------------------------------------------*/
 
-size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, const void *pvTxData, size_t xDataLengthBytes, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */
+size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
+                              const void * pvTxData,
+                              size_t xDataLengthBytes,
+                              TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */
 {
-size_t xReturn;
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    size_t xReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	xReturn = xStreamBufferSend( xStreamBuffer, pvTxData, xDataLengthBytes, xTicksToWait );
-	vPortResetPrivilege( xRunningPrivileged );
+    xReturn = xStreamBufferSend( xStreamBuffer, pvTxData, xDataLengthBytes, xTicksToWait );
+    vPortResetPrivilege( xRunningPrivileged );
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
 size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* FREERTOS_SYSTEM_CALL */
 {
-size_t xReturn;
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    size_t xReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	xReturn = xStreamBufferNextMessageLengthBytes( xStreamBuffer );
-	vPortResetPrivilege( xRunningPrivileged );
+    xReturn = xStreamBufferNextMessageLengthBytes( xStreamBuffer );
+    vPortResetPrivilege( xRunningPrivileged );
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
-size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, void *pvRxData, size_t xBufferLengthBytes, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */
+size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
+                                 void * pvRxData,
+                                 size_t xBufferLengthBytes,
+                                 TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */
 {
-size_t xReturn;
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    size_t xReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	xReturn = xStreamBufferReceive( xStreamBuffer, pvRxData, xBufferLengthBytes, xTicksToWait );
-	vPortResetPrivilege( xRunningPrivileged );
+    xReturn = xStreamBufferReceive( xStreamBuffer, pvRxData, xBufferLengthBytes, xTicksToWait );
+    vPortResetPrivilege( xRunningPrivileged );
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
 void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) /* FREERTOS_SYSTEM_CALL */
 {
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	vStreamBufferDelete( xStreamBuffer );
-	vPortResetPrivilege( xRunningPrivileged );
+    vStreamBufferDelete( xStreamBuffer );
+    vPortResetPrivilege( xRunningPrivileged );
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* FREERTOS_SYSTEM_CALL */
 {
-BaseType_t xReturn;
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	xReturn = xStreamBufferIsFull( xStreamBuffer );
-	vPortResetPrivilege( xRunningPrivileged );
+    xReturn = xStreamBufferIsFull( xStreamBuffer );
+    vPortResetPrivilege( xRunningPrivileged );
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* FREERTOS_SYSTEM_CALL */
 {
-BaseType_t xReturn;
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	xReturn = xStreamBufferIsEmpty( xStreamBuffer );
-	vPortResetPrivilege( xRunningPrivileged );
+    xReturn = xStreamBufferIsEmpty( xStreamBuffer );
+    vPortResetPrivilege( xRunningPrivileged );
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) /* FREERTOS_SYSTEM_CALL */
 {
-BaseType_t xReturn;
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	xReturn = xStreamBufferReset( xStreamBuffer );
-	vPortResetPrivilege( xRunningPrivileged );
+    xReturn = xStreamBufferReset( xStreamBuffer );
+    vPortResetPrivilege( xRunningPrivileged );
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
 size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* FREERTOS_SYSTEM_CALL */
 {
-size_t xReturn;
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    size_t xReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	xReturn = xStreamBufferSpacesAvailable( xStreamBuffer );
-	vPortResetPrivilege( xRunningPrivileged );
+    xReturn = xStreamBufferSpacesAvailable( xStreamBuffer );
+    vPortResetPrivilege( xRunningPrivileged );
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
 size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* FREERTOS_SYSTEM_CALL */
 {
-size_t xReturn;
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    size_t xReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	xReturn = xStreamBufferBytesAvailable( xStreamBuffer );
-	vPortResetPrivilege( xRunningPrivileged );
+    xReturn = xStreamBufferBytesAvailable( xStreamBuffer );
+    vPortResetPrivilege( xRunningPrivileged );
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
-BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel ) /* FREERTOS_SYSTEM_CALL */
+BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer,
+                                             size_t xTriggerLevel ) /* FREERTOS_SYSTEM_CALL */
 {
-BaseType_t xReturn;
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xReturn;
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	xReturn = xStreamBufferSetTriggerLevel( xStreamBuffer, xTriggerLevel );
-	vPortResetPrivilege( xRunningPrivileged );
+    xReturn = xStreamBufferSetTriggerLevel( xStreamBuffer, xTriggerLevel );
+    vPortResetPrivilege( xRunningPrivileged );
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-	StreamBufferHandle_t MPU_xStreamBufferGenericCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer ) /* FREERTOS_SYSTEM_CALL */
-	{
-	StreamBufferHandle_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+    StreamBufferHandle_t MPU_xStreamBufferGenericCreate( size_t xBufferSizeBytes,
+                                                         size_t xTriggerLevelBytes,
+                                                         BaseType_t xIsMessageBuffer ) /* FREERTOS_SYSTEM_CALL */
+    {
+        StreamBufferHandle_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xStreamBufferGenericCreate( xBufferSizeBytes, xTriggerLevelBytes, xIsMessageBuffer );
-		vPortResetPrivilege( xRunningPrivileged );
+        xReturn = xStreamBufferGenericCreate( xBufferSizeBytes, xTriggerLevelBytes, xIsMessageBuffer );
+        vPortResetPrivilege( xRunningPrivileged );
 
-		return xReturn;
-	}
+        return xReturn;
+    }
 #endif /* configSUPPORT_DYNAMIC_ALLOCATION */
 /*-----------------------------------------------------------*/
 
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-	StreamBufferHandle_t MPU_xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer, uint8_t * const pucStreamBufferStorageArea, StaticStreamBuffer_t * const pxStaticStreamBuffer ) /* FREERTOS_SYSTEM_CALL */
-	{
-	StreamBufferHandle_t xReturn;
-	BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+    StreamBufferHandle_t MPU_xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
+                                                               size_t xTriggerLevelBytes,
+                                                               BaseType_t xIsMessageBuffer,
+                                                               uint8_t * const pucStreamBufferStorageArea,
+                                                               StaticStreamBuffer_t * const pxStaticStreamBuffer ) /* FREERTOS_SYSTEM_CALL */
+    {
+        StreamBufferHandle_t xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-		xReturn = xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, xIsMessageBuffer, pucStreamBufferStorageArea, pxStaticStreamBuffer );
-		vPortResetPrivilege( xRunningPrivileged );
+        xReturn = xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, xIsMessageBuffer, pucStreamBufferStorageArea, pxStaticStreamBuffer );
+        vPortResetPrivilege( xRunningPrivileged );
 
-		return xReturn;
-	}
+        return xReturn;
+    }
 #endif /* configSUPPORT_STATIC_ALLOCATION */
 /*-----------------------------------------------------------*/
 
 
 /* Functions that the application writer wants to execute in privileged mode
-can be defined in application_defined_privileged_functions.h.  The functions
-must take the same format as those above whereby the privilege state on exit
-equals the privilege state on entry.  For example:
-
-void MPU_FunctionName( [parameters ] )
-{
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
-
-	FunctionName( [parameters ] );
-
-	vPortResetPrivilege( xRunningPrivileged );
-}
-*/
+ * can be defined in application_defined_privileged_functions.h.  The functions
+ * must take the same format as those above whereby the privilege state on exit
+ * equals the privilege state on entry.  For example:
+ *
+ * void MPU_FunctionName( [parameters ] )
+ * {
+ * BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+ *
+ *  FunctionName( [parameters ] );
+ *
+ *  vPortResetPrivilege( xRunningPrivileged );
+ * }
+ */
 
 #if configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS == 1
-	#include "application_defined_privileged_functions.h"
+    #include "application_defined_privileged_functions.h"
 #endif
diff --git a/portable/GCC/ARM7_AT91FR40008/port.c b/portable/GCC/ARM7_AT91FR40008/port.c
index 804134a06..22d66a18b 100644
--- a/portable/GCC/ARM7_AT91FR40008/port.c
+++ b/portable/GCC/ARM7_AT91FR40008/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ARM7_AT91FR40008/portISR.c b/portable/GCC/ARM7_AT91FR40008/portISR.c
index 11c46d02e..742ae669f 100644
--- a/portable/GCC/ARM7_AT91FR40008/portISR.c
+++ b/portable/GCC/ARM7_AT91FR40008/portISR.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ARM7_AT91FR40008/portmacro.h b/portable/GCC/ARM7_AT91FR40008/portmacro.h
index f9b529fb7..e20a80a12 100644
--- a/portable/GCC/ARM7_AT91FR40008/portmacro.h
+++ b/portable/GCC/ARM7_AT91FR40008/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ARM7_AT91SAM7S/port.c b/portable/GCC/ARM7_AT91SAM7S/port.c
index f4d17b9b6..b7e785683 100644
--- a/portable/GCC/ARM7_AT91SAM7S/port.c
+++ b/portable/GCC/ARM7_AT91SAM7S/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ARM7_AT91SAM7S/portISR.c b/portable/GCC/ARM7_AT91SAM7S/portISR.c
index 1445b4b0c..342118afe 100644
--- a/portable/GCC/ARM7_AT91SAM7S/portISR.c
+++ b/portable/GCC/ARM7_AT91SAM7S/portISR.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ARM7_AT91SAM7S/portmacro.h b/portable/GCC/ARM7_AT91SAM7S/portmacro.h
index 72df6702c..476f3be1c 100644
--- a/portable/GCC/ARM7_AT91SAM7S/portmacro.h
+++ b/portable/GCC/ARM7_AT91SAM7S/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ARM7_LPC2000/port.c b/portable/GCC/ARM7_LPC2000/port.c
index 266333f5a..943c50915 100644
--- a/portable/GCC/ARM7_LPC2000/port.c
+++ b/portable/GCC/ARM7_LPC2000/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ARM7_LPC2000/portISR.c b/portable/GCC/ARM7_LPC2000/portISR.c
index 080dc1330..8be26bf62 100644
--- a/portable/GCC/ARM7_LPC2000/portISR.c
+++ b/portable/GCC/ARM7_LPC2000/portISR.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ARM7_LPC2000/portmacro.h b/portable/GCC/ARM7_LPC2000/portmacro.h
index 485939376..68018321e 100644
--- a/portable/GCC/ARM7_LPC2000/portmacro.h
+++ b/portable/GCC/ARM7_LPC2000/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ARM7_LPC23xx/port.c b/portable/GCC/ARM7_LPC23xx/port.c
index d2bf4f4ca..8110c16ea 100644
--- a/portable/GCC/ARM7_LPC23xx/port.c
+++ b/portable/GCC/ARM7_LPC23xx/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ARM7_LPC23xx/portISR.c b/portable/GCC/ARM7_LPC23xx/portISR.c
index 49f5e0b45..ee780249c 100644
--- a/portable/GCC/ARM7_LPC23xx/portISR.c
+++ b/portable/GCC/ARM7_LPC23xx/portISR.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ARM7_LPC23xx/portmacro.h b/portable/GCC/ARM7_LPC23xx/portmacro.h
index b15157f0f..dd2abc882 100644
--- a/portable/GCC/ARM7_LPC23xx/portmacro.h
+++ b/portable/GCC/ARM7_LPC23xx/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ARM_CA53_64_BIT/port.c b/portable/GCC/ARM_CA53_64_BIT/port.c
index 1d26e8610..18d1434cb 100644
--- a/portable/GCC/ARM_CA53_64_BIT/port.c
+++ b/portable/GCC/ARM_CA53_64_BIT/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -33,23 +33,23 @@
 #include "task.h"
 
 #ifndef configINTERRUPT_CONTROLLER_BASE_ADDRESS
-	#error configINTERRUPT_CONTROLLER_BASE_ADDRESS must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+	#error configINTERRUPT_CONTROLLER_BASE_ADDRESS must be defined.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif
 
 #ifndef configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET
-	#error configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+	#error configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET must be defined.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif
 
 #ifndef configUNIQUE_INTERRUPT_PRIORITIES
-	#error configUNIQUE_INTERRUPT_PRIORITIES must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+	#error configUNIQUE_INTERRUPT_PRIORITIES must be defined.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif
 
 #ifndef configSETUP_TICK_INTERRUPT
-	#error configSETUP_TICK_INTERRUPT() must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+	#error configSETUP_TICK_INTERRUPT() must be defined.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif /* configSETUP_TICK_INTERRUPT */
 
 #ifndef configMAX_API_CALL_INTERRUPT_PRIORITY
-	#error configMAX_API_CALL_INTERRUPT_PRIORITY must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+	#error configMAX_API_CALL_INTERRUPT_PRIORITY must be defined.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif
 
 #if configMAX_API_CALL_INTERRUPT_PRIORITY == 0
diff --git a/portable/GCC/ARM_CA53_64_BIT/portASM.S b/portable/GCC/ARM_CA53_64_BIT/portASM.S
index 92b2bff4d..bc71d906d 100644
--- a/portable/GCC/ARM_CA53_64_BIT/portASM.S
+++ b/portable/GCC/ARM_CA53_64_BIT/portASM.S
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ARM_CA53_64_BIT/portmacro.h b/portable/GCC/ARM_CA53_64_BIT/portmacro.h
index 47c924844..1fc0b7bad 100644
--- a/portable/GCC/ARM_CA53_64_BIT/portmacro.h
+++ b/portable/GCC/ARM_CA53_64_BIT/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ARM_CA9/port.c b/portable/GCC/ARM_CA9/port.c
index a968c1ef8..38c42d4bb 100644
--- a/portable/GCC/ARM_CA9/port.c
+++ b/portable/GCC/ARM_CA9/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -33,23 +33,23 @@
 #include "task.h"
 
 #ifndef configINTERRUPT_CONTROLLER_BASE_ADDRESS
-	#error configINTERRUPT_CONTROLLER_BASE_ADDRESS must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+	#error configINTERRUPT_CONTROLLER_BASE_ADDRESS must be defined.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif
 
 #ifndef configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET
-	#error configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+	#error configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET must be defined.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif
 
 #ifndef configUNIQUE_INTERRUPT_PRIORITIES
-	#error configUNIQUE_INTERRUPT_PRIORITIES must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+	#error configUNIQUE_INTERRUPT_PRIORITIES must be defined.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif
 
 #ifndef configSETUP_TICK_INTERRUPT
-	#error configSETUP_TICK_INTERRUPT() must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+	#error configSETUP_TICK_INTERRUPT() must be defined.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif /* configSETUP_TICK_INTERRUPT */
 
 #ifndef configMAX_API_CALL_INTERRUPT_PRIORITY
-	#error configMAX_API_CALL_INTERRUPT_PRIORITY must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+	#error configMAX_API_CALL_INTERRUPT_PRIORITY must be defined.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif
 
 #if configMAX_API_CALL_INTERRUPT_PRIORITY == 0
diff --git a/portable/GCC/ARM_CA9/portASM.S b/portable/GCC/ARM_CA9/portASM.S
index d55c5f335..c7a010077 100644
--- a/portable/GCC/ARM_CA9/portASM.S
+++ b/portable/GCC/ARM_CA9/portASM.S
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ARM_CA9/portmacro.h b/portable/GCC/ARM_CA9/portmacro.h
index c6d35d8c1..35989d86c 100644
--- a/portable/GCC/ARM_CA9/portmacro.h
+++ b/portable/GCC/ARM_CA9/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ARM_CM0/port.c b/portable/GCC/ARM_CM0/port.c
index 2b32b2002..859d8ffca 100644
--- a/portable/GCC/ARM_CM0/port.c
+++ b/portable/GCC/ARM_CM0/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,55 +19,54 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------
- * Implementation of functions defined in portable.h for the ARM CM0 port.
- *----------------------------------------------------------*/
+* Implementation of functions defined in portable.h for the ARM CM0 port.
+*----------------------------------------------------------*/
 
 /* Scheduler includes. */
 #include "FreeRTOS.h"
 #include "task.h"
 
 /* Constants required to manipulate the NVIC. */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_INT_CTRL_REG				( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
-#define portNVIC_SYSTICK_CLK_BIT			( 1UL << 2UL )
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portNVIC_PENDSVSET_BIT				( 1UL << 28UL )
-#define portMIN_INTERRUPT_PRIORITY		( 255UL )
-#define portNVIC_PENDSV_PRI				( portMIN_INTERRUPT_PRIORITY << 16UL )
-#define portNVIC_SYSTICK_PRI			( portMIN_INTERRUPT_PRIORITY << 24UL )
+#define portNVIC_SYSTICK_CTRL_REG             ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG             ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG    ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_INT_CTRL_REG                 ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+#define portNVIC_SHPR3_REG                    ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_CLK_BIT              ( 1UL << 2UL )
+#define portNVIC_SYSTICK_INT_BIT              ( 1UL << 1UL )
+#define portNVIC_SYSTICK_ENABLE_BIT           ( 1UL << 0UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT       ( 1UL << 16UL )
+#define portNVIC_PENDSVSET_BIT                ( 1UL << 28UL )
+#define portMIN_INTERRUPT_PRIORITY            ( 255UL )
+#define portNVIC_PENDSV_PRI                   ( portMIN_INTERRUPT_PRIORITY << 16UL )
+#define portNVIC_SYSTICK_PRI                  ( portMIN_INTERRUPT_PRIORITY << 24UL )
 
 /* Constants required to set up the initial stack. */
-#define portINITIAL_XPSR			( 0x01000000 )
+#define portINITIAL_XPSR                      ( 0x01000000 )
 
 /* The systick is a 24-bit counter. */
-#define portMAX_24_BIT_NUMBER				( 0xffffffUL )
+#define portMAX_24_BIT_NUMBER                 ( 0xffffffUL )
 
 /* A fiddle factor to estimate the number of SysTick counts that would have
-occurred while the SysTick counter is stopped during tickless idle
-calculations. */
+ * occurred while the SysTick counter is stopped during tickless idle
+ * calculations. */
 #ifndef portMISSED_COUNTS_FACTOR
-	#define portMISSED_COUNTS_FACTOR			( 45UL )
+    #define portMISSED_COUNTS_FACTOR    ( 45UL )
 #endif
 
 /* Let the user override the pre-loading of the initial LR with the address of
-prvTaskExitError() in case it messes up unwinding of the stack in the
-debugger. */
+ * prvTaskExitError() in case it messes up unwinding of the stack in the
+ * debugger. */
 #ifdef configTASK_RETURN_ADDRESS
-	#define portTASK_RETURN_ADDRESS	configTASK_RETURN_ADDRESS
+    #define portTASK_RETURN_ADDRESS    configTASK_RETURN_ADDRESS
 #else
-	#define portTASK_RETURN_ADDRESS	prvTaskExitError
+    #define portTASK_RETURN_ADDRESS    prvTaskExitError
 #endif
 
 /*
@@ -80,14 +79,14 @@ void vPortSetupTimerInterrupt( void );
 /*
  * Exception handlers.
  */
-void xPortPendSVHandler( void ) __attribute__ (( naked ));
+void xPortPendSVHandler( void ) __attribute__( ( naked ) );
 void xPortSysTickHandler( void );
 void vPortSVCHandler( void );
 
 /*
  * Start first task is a separate function so it can be tested in isolation.
  */
-static void vPortStartFirstTask( void ) __attribute__ (( naked ));
+static void vPortStartFirstTask( void ) __attribute__( ( naked ) );
 
 /*
  * Used to catch tasks that attempt to return from their implementing function.
@@ -97,32 +96,32 @@ static void prvTaskExitError( void );
 /*-----------------------------------------------------------*/
 
 /* Each task maintains its own interrupt status in the critical nesting
-variable. */
+ * variable. */
 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 
 /*-----------------------------------------------------------*/
 
 /*
-* The number of SysTick increments that make up one tick period.
-*/
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulTimerCountsForOneTick = 0;
+ * The number of SysTick increments that make up one tick period.
+ */
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulTimerCountsForOneTick = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * The maximum number of tick periods that can be suppressed is limited by the
  * 24 bit resolution of the SysTick timer.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t xMaximumPossibleSuppressedTicks = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * Compensate for the CPU cycles that pass while the SysTick is stopped (low
  * power functionality only.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulStoppedTimerCompensation = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulStoppedTimerCompensation = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*-----------------------------------------------------------*/
@@ -130,81 +129,84 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 /*
  * See header file for description.
  */
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	interrupt. */
-	pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) pxCode;	/* PC */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
-	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
-	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
-	pxTopOfStack -= 8; /* R11..R4. */
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
+    pxTopOfStack--;                                          /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+    *pxTopOfStack = portINITIAL_XPSR;                        /* xPSR */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) pxCode;                  /* PC */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
+    pxTopOfStack -= 5;                                       /* R12, R3, R2 and R1. */
+    *pxTopOfStack = ( StackType_t ) pvParameters;            /* R0 */
+    pxTopOfStack -= 8;                                       /* R11..R4. */
 
-	return pxTopOfStack;
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 static void prvTaskExitError( void )
 {
-volatile uint32_t ulDummy = 0UL;
+    volatile uint32_t ulDummy = 0UL;
 
-	/* A function that implements a task must not exit or attempt to return to
-	its caller as there is nothing to return to.  If a task wants to exit it
-	should instead call vTaskDelete( NULL ).
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to.  If a task wants to exit it
+     * should instead call vTaskDelete( NULL ).
+     *
+     * Artificially force an assert() to be triggered if configASSERT() is
+     * defined, then stop here so application writers can catch the error. */
+    configASSERT( uxCriticalNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
 
-	Artificially force an assert() to be triggered if configASSERT() is
-	defined, then stop here so application writers can catch the error. */
-	configASSERT( uxCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
-	while( ulDummy == 0 )
-	{
-		/* This file calls prvTaskExitError() after the scheduler has been
-		started to remove a compiler warning about the function being defined
-		but never called.  ulDummy is used purely to quieten other warnings
-		about code appearing after this function is called - making ulDummy
-		volatile makes the compiler think the function could return and
-		therefore not output an 'unreachable code' warning for code that appears
-		after it. */
-	}
+    while( ulDummy == 0 )
+    {
+        /* This file calls prvTaskExitError() after the scheduler has been
+         * started to remove a compiler warning about the function being defined
+         * but never called.  ulDummy is used purely to quieten other warnings
+         * about code appearing after this function is called - making ulDummy
+         * volatile makes the compiler think the function could return and
+         * therefore not output an 'unreachable code' warning for code that appears
+         * after it. */
+    }
 }
 /*-----------------------------------------------------------*/
 
 void vPortSVCHandler( void )
 {
-	/* This function is no longer used, but retained for backward
-	compatibility. */
+    /* This function is no longer used, but retained for backward
+     * compatibility. */
 }
 /*-----------------------------------------------------------*/
 
 void vPortStartFirstTask( void )
 {
-	/* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector
-	table offset register that can be used to locate the initial stack value.
-	Not all M0 parts have the application vector table at address 0. */
-	__asm volatile(
-	"	.syntax unified				\n"
-	"	ldr  r2, pxCurrentTCBConst2	\n" /* Obtain location of pxCurrentTCB. */
-	"	ldr  r3, [r2]				\n"
-	"	ldr  r0, [r3]				\n" /* The first item in pxCurrentTCB is the task top of stack. */
-	"	adds r0, #32					\n" /* Discard everything up to r0. */
-	"	msr  psp, r0					\n" /* This is now the new top of stack to use in the task. */
-	"	movs r0, #2					\n" /* Switch to the psp stack. */
-	"	msr  CONTROL, r0				\n"
-	"	isb							\n"
-	"	pop  {r0-r5}					\n" /* Pop the registers that are saved automatically. */
-	"	mov  lr, r5					\n" /* lr is now in r5. */
-	"	pop  {r3}					\n" /* Return address is now in r3. */
-	"	pop  {r2}					\n" /* Pop and discard XPSR. */
-	"	cpsie i						\n" /* The first task has its context and interrupts can be enabled. */
-	"	bx   r3						\n" /* Finally, jump to the user defined task code. */
-	"								\n"
-	"	.align 4					\n"
-	"pxCurrentTCBConst2: .word pxCurrentTCB	  "
-				  );
+    /* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector
+     * table offset register that can be used to locate the initial stack value.
+     * Not all M0 parts have the application vector table at address 0. */
+    __asm volatile (
+        "	.syntax unified				\n"
+        "	ldr  r2, pxCurrentTCBConst2	\n"/* Obtain location of pxCurrentTCB. */
+        "	ldr  r3, [r2]				\n"
+        "	ldr  r0, [r3]				\n"/* The first item in pxCurrentTCB is the task top of stack. */
+        "	adds r0, #32					\n"/* Discard everything up to r0. */
+        "	msr  psp, r0					\n"/* This is now the new top of stack to use in the task. */
+        "	movs r0, #2					\n"/* Switch to the psp stack. */
+        "	msr  CONTROL, r0				\n"
+        "	isb							\n"
+        "	pop  {r0-r5}					\n"/* Pop the registers that are saved automatically. */
+        "	mov  lr, r5					\n"/* lr is now in r5. */
+        "	pop  {r3}					\n"/* Return address is now in r3. */
+        "	pop  {r2}					\n"/* Pop and discard XPSR. */
+        "	cpsie i						\n"/* The first task has its context and interrupts can be enabled. */
+        "	bx   r3						\n"/* Finally, jump to the user defined task code. */
+        "								\n"
+        "	.align 4					\n"
+        "pxCurrentTCBConst2: .word pxCurrentTCB	  "
+        );
 }
 /*-----------------------------------------------------------*/
 
@@ -213,158 +215,159 @@ void vPortStartFirstTask( void )
  */
 BaseType_t xPortStartScheduler( void )
 {
-	/* Make PendSV, CallSV and SysTick the same priority as the kernel. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+    /* Make PendSV, CallSV and SysTick the same priority as the kernel. */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
-	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-	here already. */
-	vPortSetupTimerInterrupt();
+    /* Start the timer that generates the tick ISR.  Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
 
-	/* Initialise the critical nesting count ready for the first task. */
-	uxCriticalNesting = 0;
+    /* Initialise the critical nesting count ready for the first task. */
+    uxCriticalNesting = 0;
 
-	/* Start the first task. */
-	vPortStartFirstTask();
+    /* Start the first task. */
+    vPortStartFirstTask();
 
-	/* Should never get here as the tasks will now be executing!  Call the task
-	exit error function to prevent compiler warnings about a static function
-	not being called in the case that the application writer overrides this
-	functionality by defining configTASK_RETURN_ADDRESS.  Call
-	vTaskSwitchContext() so link time optimisation does not remove the
-	symbol. */
-	vTaskSwitchContext();
-	prvTaskExitError();
+    /* Should never get here as the tasks will now be executing!  Call the task
+     * exit error function to prevent compiler warnings about a static function
+     * not being called in the case that the application writer overrides this
+     * functionality by defining configTASK_RETURN_ADDRESS.  Call
+     * vTaskSwitchContext() so link time optimisation does not remove the
+     * symbol. */
+    vTaskSwitchContext();
+    prvTaskExitError();
 
-	/* Should not get here! */
-	return 0;
+    /* Should not get here! */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void )
 {
-	/* Not implemented in ports where there is nothing to return to.
-	Artificially force an assert. */
-	configASSERT( uxCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( uxCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
 void vPortYield( void )
 {
-	/* Set a PendSV to request a context switch. */
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+    /* Set a PendSV to request a context switch. */
+    portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
 
-	/* Barriers are normally not required but do ensure the code is completely
-	within the specified behaviour for the architecture. */
-	__asm volatile( "dsb" ::: "memory" );
-	__asm volatile( "isb" );
+    /* Barriers are normally not required but do ensure the code is completely
+     * within the specified behaviour for the architecture. */
+    __asm volatile ( "dsb" ::: "memory" );
+    __asm volatile ( "isb" );
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void )
 {
-	portDISABLE_INTERRUPTS();
-	uxCriticalNesting++;
-	__asm volatile( "dsb" ::: "memory" );
-	__asm volatile( "isb" );
+    portDISABLE_INTERRUPTS();
+    uxCriticalNesting++;
+    __asm volatile ( "dsb" ::: "memory" );
+    __asm volatile ( "isb" );
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void )
 {
-	configASSERT( uxCriticalNesting );
-	uxCriticalNesting--;
-	if( uxCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
+    configASSERT( uxCriticalNesting );
+    uxCriticalNesting--;
+
+    if( uxCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
 }
 /*-----------------------------------------------------------*/
 
 uint32_t ulSetInterruptMaskFromISR( void )
 {
-	__asm volatile(
-					" mrs r0, PRIMASK	\n"
-					" cpsid i			\n"
-					" bx lr				  "
-					::: "memory"
-				  );
+    __asm volatile (
+        " mrs r0, PRIMASK	\n"
+        " cpsid i			\n"
+        " bx lr				  "
+        ::: "memory"
+        );
 }
 /*-----------------------------------------------------------*/
 
 void vClearInterruptMaskFromISR( __attribute__( ( unused ) ) uint32_t ulMask )
 {
-	__asm volatile(
-					" msr PRIMASK, r0	\n"
-					" bx lr				  "
-					::: "memory"
-				  );
+    __asm volatile (
+        " msr PRIMASK, r0	\n"
+        " bx lr				  "
+        ::: "memory"
+        );
 }
 /*-----------------------------------------------------------*/
 
 void xPortPendSVHandler( void )
 {
-	/* This is a naked function. */
+    /* This is a naked function. */
 
-	__asm volatile
-	(
-	"	.syntax unified						\n"
-	"	mrs r0, psp							\n"
-	"										\n"
-	"	ldr	r3, pxCurrentTCBConst			\n" /* Get the location of the current TCB. */
-	"	ldr	r2, [r3]						\n"
-	"										\n"
-	"	subs r0, r0, #32					\n" /* Make space for the remaining low registers. */
-	"	str r0, [r2]						\n" /* Save the new top of stack. */
-	"	stmia r0!, {r4-r7}					\n" /* Store the low registers that are not saved automatically. */
-	" 	mov r4, r8							\n" /* Store the high registers. */
-	" 	mov r5, r9							\n"
-	" 	mov r6, r10							\n"
-	" 	mov r7, r11							\n"
-	" 	stmia r0!, {r4-r7}					\n"
-	"										\n"
-	"	push {r3, r14}						\n"
-	"	cpsid i								\n"
-	"	bl vTaskSwitchContext				\n"
-	"	cpsie i								\n"
-	"	pop {r2, r3}						\n" /* lr goes in r3. r2 now holds tcb pointer. */
-	"										\n"
-	"	ldr r1, [r2]						\n"
-	"	ldr r0, [r1]						\n" /* The first item in pxCurrentTCB is the task top of stack. */
-	"	adds r0, r0, #16					\n" /* Move to the high registers. */
-	"	ldmia r0!, {r4-r7}					\n" /* Pop the high registers. */
-	" 	mov r8, r4							\n"
-	" 	mov r9, r5							\n"
-	" 	mov r10, r6							\n"
-	" 	mov r11, r7							\n"
-	"										\n"
-	"	msr psp, r0							\n" /* Remember the new top of stack for the task. */
-	"										\n"
-	"	subs r0, r0, #32					\n" /* Go back for the low registers that are not automatically restored. */
-	" 	ldmia r0!, {r4-r7}					\n" /* Pop low registers.  */
-	"										\n"
-	"	bx r3								\n"
-	"										\n"
-	"	.align 4							\n"
-	"pxCurrentTCBConst: .word pxCurrentTCB	  "
-	);
+    __asm volatile
+    (
+        "	.syntax unified						\n"
+        "	mrs r0, psp							\n"
+        "										\n"
+        "	ldr	r3, pxCurrentTCBConst			\n"/* Get the location of the current TCB. */
+        "	ldr	r2, [r3]						\n"
+        "										\n"
+        "	subs r0, r0, #32					\n"/* Make space for the remaining low registers. */
+        "	str r0, [r2]						\n"/* Save the new top of stack. */
+        "	stmia r0!, {r4-r7}					\n"/* Store the low registers that are not saved automatically. */
+        " 	mov r4, r8							\n"/* Store the high registers. */
+        " 	mov r5, r9							\n"
+        " 	mov r6, r10							\n"
+        " 	mov r7, r11							\n"
+        " 	stmia r0!, {r4-r7}					\n"
+        "										\n"
+        "	push {r3, r14}						\n"
+        "	cpsid i								\n"
+        "	bl vTaskSwitchContext				\n"
+        "	cpsie i								\n"
+        "	pop {r2, r3}						\n"/* lr goes in r3. r2 now holds tcb pointer. */
+        "										\n"
+        "	ldr r1, [r2]						\n"
+        "	ldr r0, [r1]						\n"/* The first item in pxCurrentTCB is the task top of stack. */
+        "	adds r0, r0, #16					\n"/* Move to the high registers. */
+        "	ldmia r0!, {r4-r7}					\n"/* Pop the high registers. */
+        " 	mov r8, r4							\n"
+        " 	mov r9, r5							\n"
+        " 	mov r10, r6							\n"
+        " 	mov r11, r7							\n"
+        "										\n"
+        "	msr psp, r0							\n"/* Remember the new top of stack for the task. */
+        "										\n"
+        "	subs r0, r0, #32					\n"/* Go back for the low registers that are not automatically restored. */
+        " 	ldmia r0!, {r4-r7}					\n"/* Pop low registers.  */
+        "										\n"
+        "	bx r3								\n"
+        "										\n"
+        "	.align 4							\n"
+        "pxCurrentTCBConst: .word pxCurrentTCB	  "
+    );
 }
 /*-----------------------------------------------------------*/
 
 void xPortSysTickHandler( void )
 {
-uint32_t ulPreviousMask;
+    uint32_t ulPreviousMask;
 
-	ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* Pend a context switch. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
+    ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* Pend a context switch. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
 }
 /*-----------------------------------------------------------*/
 
@@ -372,189 +375,192 @@ uint32_t ulPreviousMask;
  * Setup the systick timer to generate the tick interrupts at the required
  * frequency.
  */
-__attribute__(( weak )) void vPortSetupTimerInterrupt( void )
+__attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void )
 {
-	/* Calculate the constants required to configure the tick interrupt. */
-	#if( configUSE_TICKLESS_IDLE == 1 )
-	{
-		ulTimerCountsForOneTick = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );
-		xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR;
-	}
-	#endif /* configUSE_TICKLESS_IDLE */
+    /* Calculate the constants required to configure the tick interrupt. */
+    #if ( configUSE_TICKLESS_IDLE == 1 )
+        {
+            ulTimerCountsForOneTick = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );
+            xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+            ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR;
+        }
+    #endif /* configUSE_TICKLESS_IDLE */
 
-	/* Stop and reset the SysTick. */
-	portNVIC_SYSTICK_CTRL_REG = 0UL;
-	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+    /* Stop and reset the SysTick. */
+    portNVIC_SYSTICK_CTRL_REG = 0UL;
+    portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-	/* Configure SysTick to interrupt at the requested rate. */
-	portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
+    /* Configure SysTick to interrupt at the requested rate. */
+    portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+    portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
 }
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TICKLESS_IDLE == 1 )
+#if ( configUSE_TICKLESS_IDLE == 1 )
 
-	__attribute__((weak)) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-	{
-	uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
-	TickType_t xModifiableIdleTime;
+    __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+    {
+        uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+        TickType_t xModifiableIdleTime;
 
-		/* Make sure the SysTick reload value does not overflow the counter. */
-		if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-		{
-			xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-		}
+        /* Make sure the SysTick reload value does not overflow the counter. */
+        if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+        {
+            xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+        }
 
-		/* Stop the SysTick momentarily.  The time the SysTick is stopped for
-		is accounted for as best it can be, but using the tickless mode will
-		inevitably result in some tiny drift of the time maintained by the
-		kernel with respect to calendar time. */
-		portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+        /* Stop the SysTick momentarily.  The time the SysTick is stopped for
+         * is accounted for as best it can be, but using the tickless mode will
+         * inevitably result in some tiny drift of the time maintained by the
+         * kernel with respect to calendar time. */
+        portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
 
-		/* Calculate the reload value required to wait xExpectedIdleTime
-		tick periods.  -1 is used because this code will execute part way
-		through one of the tick periods. */
-		ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-		if( ulReloadValue > ulStoppedTimerCompensation )
-		{
-			ulReloadValue -= ulStoppedTimerCompensation;
-		}
+        /* Calculate the reload value required to wait xExpectedIdleTime
+         * tick periods.  -1 is used because this code will execute part way
+         * through one of the tick periods. */
+        ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
 
-		/* Enter a critical section but don't use the taskENTER_CRITICAL()
-		method as that will mask interrupts that should exit sleep mode. */
-		__asm volatile( "cpsid i" ::: "memory" );
-		__asm volatile( "dsb" );
-		__asm volatile( "isb" );
+        if( ulReloadValue > ulStoppedTimerCompensation )
+        {
+            ulReloadValue -= ulStoppedTimerCompensation;
+        }
 
-		/* If a context switch is pending or a task is waiting for the scheduler
-		to be unsuspended then abandon the low power entry. */
-		if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-		{
-			/* Restart from whatever is left in the count register to complete
-			this tick period. */
-			portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+        /* Enter a critical section but don't use the taskENTER_CRITICAL()
+         * method as that will mask interrupts that should exit sleep mode. */
+        __asm volatile ( "cpsid i" ::: "memory" );
+        __asm volatile ( "dsb" );
+        __asm volatile ( "isb" );
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+        /* If a context switch is pending or a task is waiting for the scheduler
+         * to be unsuspended then abandon the low power entry. */
+        if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+        {
+            /* Restart from whatever is left in the count register to complete
+             * this tick period. */
+            portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Reset the reload register to the value required for normal tick
-			periods. */
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts - see comments above the cpsid instruction()
-			above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-		else
-		{
-			/* Set the new reload value. */
-			portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+            /* Reset the reload register to the value required for normal tick
+             * periods. */
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
 
-			/* Clear the SysTick count flag and set the count value back to
-			zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            /* Re-enable interrupts - see comments above the cpsid instruction()
+             * above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+        else
+        {
+            /* Set the new reload value. */
+            portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            /* Clear the SysTick count flag and set the count value back to
+             * zero. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-			/* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
-			set its parameter to 0 to indicate that its implementation contains
-			its own wait for interrupt or wait for event instruction, and so wfi
-			should not be executed again.  However, the original expected idle
-			time variable must remain unmodified, so a copy is taken. */
-			xModifiableIdleTime = xExpectedIdleTime;
-			configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-			if( xModifiableIdleTime > 0 )
-			{
-				__asm volatile( "dsb" ::: "memory" );
-				__asm volatile( "wfi" );
-				__asm volatile( "isb" );
-			}
-			configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts to allow the interrupt that brought the MCU
-			out of sleep mode to execute immediately.  see comments above
-			__disable_interrupt() call above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
+            /* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
+             * set its parameter to 0 to indicate that its implementation contains
+             * its own wait for interrupt or wait for event instruction, and so wfi
+             * should not be executed again.  However, the original expected idle
+             * time variable must remain unmodified, so a copy is taken. */
+            xModifiableIdleTime = xExpectedIdleTime;
+            configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
 
-			/* Disable interrupts again because the clock is about to be stopped
-			and interrupts that execute while the clock is stopped will increase
-			any slippage between the time maintained by the RTOS and calendar
-			time. */
-			__asm volatile( "cpsid i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
+            if( xModifiableIdleTime > 0 )
+            {
+                __asm volatile ( "dsb" ::: "memory" );
+                __asm volatile ( "wfi" );
+                __asm volatile ( "isb" );
+            }
 
-			/* Disable the SysTick clock without reading the
-			portNVIC_SYSTICK_CTRL_REG register to ensure the
-			portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
-			the time the SysTick is stopped for is accounted for as best it can
-			be, but using the tickless mode will inevitably result in some tiny
-			drift of the time maintained by the kernel with respect to calendar
-			time*/
-			portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+            configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
 
-			/* Determine if the SysTick clock has already counted to zero and
-			been set back to the current reload value (the reload back being
-			correct for the entire expected idle time) or if the SysTick is yet
-			to count to zero (in which case an interrupt other than the SysTick
-			must have brought the system out of sleep mode). */
-			if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-			{
-				uint32_t ulCalculatedLoadValue;
+            /* Re-enable interrupts to allow the interrupt that brought the MCU
+             * out of sleep mode to execute immediately.  see comments above
+             * __disable_interrupt() call above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
 
-				/* The tick interrupt is already pending, and the SysTick count
-				reloaded with ulReloadValue.  Reset the
-				portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
-				period. */
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+            /* Disable interrupts again because the clock is about to be stopped
+             * and interrupts that execute while the clock is stopped will increase
+             * any slippage between the time maintained by the RTOS and calendar
+             * time. */
+            __asm volatile ( "cpsid i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
 
-				/* Don't allow a tiny value, or values that have somehow
-				underflowed because the post sleep hook did something
-				that took too long. */
-				if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-				{
-					ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-				}
+            /* Disable the SysTick clock without reading the
+             * portNVIC_SYSTICK_CTRL_REG register to ensure the
+             * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
+             * the time the SysTick is stopped for is accounted for as best it can
+             * be, but using the tickless mode will inevitably result in some tiny
+             * drift of the time maintained by the kernel with respect to calendar
+             * time*/
+            portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
 
-				portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+            /* Determine if the SysTick clock has already counted to zero and
+             * been set back to the current reload value (the reload back being
+             * correct for the entire expected idle time) or if the SysTick is yet
+             * to count to zero (in which case an interrupt other than the SysTick
+             * must have brought the system out of sleep mode). */
+            if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+            {
+                uint32_t ulCalculatedLoadValue;
 
-				/* As the pending tick will be processed as soon as this
-				function exits, the tick value maintained by the tick is stepped
-				forward by one less than the time spent waiting. */
-				ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-			}
-			else
-			{
-				/* Something other than the tick interrupt ended the sleep.
-				Work out how long the sleep lasted rounded to complete tick
-				periods (not the ulReload value which accounted for part
-				ticks). */
-				ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+                /* The tick interrupt is already pending, and the SysTick count
+                 * reloaded with ulReloadValue.  Reset the
+                 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+                 * period. */
+                ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
 
-				/* How many complete tick periods passed while the processor
-				was waiting? */
-				ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+                /* Don't allow a tiny value, or values that have somehow
+                 * underflowed because the post sleep hook did something
+                 * that took too long. */
+                if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+                {
+                    ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+                }
 
-				/* The reload value is set to whatever fraction of a single tick
-				period remains. */
-				portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-			}
+                portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
 
-			/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
-			again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
-			value. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-			vTaskStepTick( ulCompleteTickPeriods );
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+                /* As the pending tick will be processed as soon as this
+                 * function exits, the tick value maintained by the tick is stepped
+                 * forward by one less than the time spent waiting. */
+                ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+            }
+            else
+            {
+                /* Something other than the tick interrupt ended the sleep.
+                 * Work out how long the sleep lasted rounded to complete tick
+                 * periods (not the ulReload value which accounted for part
+                 * ticks). */
+                ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Exit with interrpts enabled. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-	}
+                /* How many complete tick periods passed while the processor
+                 * was waiting? */
+                ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+                /* The reload value is set to whatever fraction of a single tick
+                 * period remains. */
+                portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+            }
+
+            /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+             * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+             * value. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            vTaskStepTick( ulCompleteTickPeriods );
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Exit with interrpts enabled. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+    }
 
 #endif /* configUSE_TICKLESS_IDLE */
diff --git a/portable/GCC/ARM_CM0/portmacro.h b/portable/GCC/ARM_CM0/portmacro.h
index 2e59a83dc..e05779971 100644
--- a/portable/GCC/ARM_CM0/portmacro.h
+++ b/portable/GCC/ARM_CM0/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,19 +19,19 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -44,82 +44,81 @@ extern "C" {
  */
 
 /* Type definitions. */
-#define portCHAR		char
-#define portFLOAT		float
-#define portDOUBLE		double
-#define portLONG		long
-#define portSHORT		short
-#define portSTACK_TYPE	uint32_t
-#define portBASE_TYPE	long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE StackType_t;
-typedef long BaseType_t;
-typedef unsigned long UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC 1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Architecture specifics. */
-#define portSTACK_GROWTH			( -1 )
-#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT			8
-#define portDONT_DISCARD			__attribute__(( used ))
+    #define portSTACK_GROWTH      ( -1 )
+    #define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT    8
+    #define portDONT_DISCARD      __attribute__( ( used ) )
 /*-----------------------------------------------------------*/
 
 
 /* Scheduler utilities. */
-extern void vPortYield( void );
-#define portNVIC_INT_CTRL_REG		( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT		( 1UL << 28UL )
-#define portYIELD()					vPortYield()
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
+    extern void vPortYield( void );
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portYIELD()                                 vPortYield()
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 
 /* Critical section management. */
-extern void vPortEnterCritical( void );
-extern void vPortExitCritical( void );
-extern uint32_t ulSetInterruptMaskFromISR( void ) __attribute__((naked));
-extern void vClearInterruptMaskFromISR( uint32_t ulMask )  __attribute__((naked));
+    extern void vPortEnterCritical( void );
+    extern void vPortExitCritical( void );
+    extern uint32_t ulSetInterruptMaskFromISR( void ) __attribute__( ( naked ) );
+    extern void vClearInterruptMaskFromISR( uint32_t ulMask )  __attribute__( ( naked ) );
 
-#define portSET_INTERRUPT_MASK_FROM_ISR()		ulSetInterruptMaskFromISR()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)	vClearInterruptMaskFromISR( x )
-#define portDISABLE_INTERRUPTS()				__asm volatile 	( " cpsid i " ::: "memory" )
-#define portENABLE_INTERRUPTS()					__asm volatile 	( " cpsie i " ::: "memory" )
-#define portENTER_CRITICAL()					vPortEnterCritical()
-#define portEXIT_CRITICAL()						vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulSetInterruptMaskFromISR()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vClearInterruptMaskFromISR( x )
+    #define portDISABLE_INTERRUPTS()                  __asm volatile ( " cpsid i " ::: "memory" )
+    #define portENABLE_INTERRUPTS()                   __asm volatile ( " cpsie i " ::: "memory" )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
 
 /*-----------------------------------------------------------*/
 
 /* Tickless idle/low power functionality. */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site. */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 
-#define portNOP()
+    #define portNOP()
 
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
+    #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
-
diff --git a/portable/GCC/ARM_CM23/non_secure/port.c b/portable/GCC/ARM_CM23/non_secure/port.c
index ba6bd2602..61a9b2d21 100644
--- a/portable/GCC/ARM_CM23/non_secure/port.c
+++ b/portable/GCC/ARM_CM23/non_secure/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,10 +19,9 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
@@ -40,10 +39,10 @@
 /* Portasm includes. */
 #include "portasm.h"
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/* Secure components includes. */
-	#include "secure_context.h"
-	#include "secure_init.h"
+#if ( configENABLE_TRUSTZONE == 1 )
+    /* Secure components includes. */
+    #include "secure_context.h"
+    #include "secure_init.h"
 #endif /* configENABLE_TRUSTZONE */
 
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
@@ -63,126 +62,127 @@
  * 3. Run FreeRTOS on the Non-Secure Side only i.e. no Secure Side function call support:
  *		configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 0
  */
-#if( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) )
-	#error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side.
+#if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) )
+    #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side.
 #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to manipulate the NVIC.
  */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portMIN_INTERRUPT_PRIORITY			( 255UL )
-#define portNVIC_PENDSV_PRI					( portMIN_INTERRUPT_PRIORITY << 16UL )
-#define portNVIC_SYSTICK_PRI				( portMIN_INTERRUPT_PRIORITY << 24UL )
+#define portNVIC_SYSTICK_CTRL_REG             ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG             ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG    ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SHPR3_REG                    ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_ENABLE_BIT           ( 1UL << 0UL )
+#define portNVIC_SYSTICK_INT_BIT              ( 1UL << 1UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT       ( 1UL << 16UL )
+#define portMIN_INTERRUPT_PRIORITY            ( 255UL )
+#define portNVIC_PENDSV_PRI                   ( portMIN_INTERRUPT_PRIORITY << 16UL )
+#define portNVIC_SYSTICK_PRI                  ( portMIN_INTERRUPT_PRIORITY << 24UL )
 #ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ			configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT		( 1UL << 2UL )
+    #define configSYSTICK_CLOCK_HZ            configCPU_CLOCK_HZ
+    /* Ensure the SysTick is clocked at the same frequency as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT          ( 1UL << 2UL )
 #else
-	/* The way the SysTick is clocked is not modified in case it is not the
-	 * same a the core. */
-	#define portNVIC_SYSTICK_CLK_BIT		( 0 )
+
+/* The way the SysTick is clocked is not modified in case it is not the
+ * same a the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 0 )
 #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to manipulate the SCB.
  */
-#define portSCB_SYS_HANDLER_CTRL_STATE_REG	( * ( volatile uint32_t * ) 0xe000ed24 )
-#define portSCB_MEM_FAULT_ENABLE_BIT		( 1UL << 16UL )
+#define portSCB_SYS_HANDLER_CTRL_STATE_REG    ( *( volatile uint32_t * ) 0xe000ed24 )
+#define portSCB_MEM_FAULT_ENABLE_BIT          ( 1UL << 16UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to manipulate the FPU.
  */
-#define portCPACR							( ( volatile uint32_t * ) 0xe000ed88 )	/* Coprocessor Access Control Register. */
-#define portCPACR_CP10_VALUE				( 3UL )
-#define portCPACR_CP11_VALUE				portCPACR_CP10_VALUE
-#define portCPACR_CP10_POS					( 20UL )
-#define portCPACR_CP11_POS					( 22UL )
+#define portCPACR               ( ( volatile uint32_t * ) 0xe000ed88 )              /* Coprocessor Access Control Register. */
+#define portCPACR_CP10_VALUE    ( 3UL )
+#define portCPACR_CP11_VALUE    portCPACR_CP10_VALUE
+#define portCPACR_CP10_POS      ( 20UL )
+#define portCPACR_CP11_POS      ( 22UL )
 
-#define portFPCCR							( ( volatile uint32_t * ) 0xe000ef34 )	/* Floating Point Context Control Register. */
-#define portFPCCR_ASPEN_POS					( 31UL )
-#define portFPCCR_ASPEN_MASK				( 1UL << portFPCCR_ASPEN_POS )
-#define portFPCCR_LSPEN_POS					( 30UL )
-#define portFPCCR_LSPEN_MASK				( 1UL << portFPCCR_LSPEN_POS )
+#define portFPCCR               ( ( volatile uint32_t * ) 0xe000ef34 )              /* Floating Point Context Control Register. */
+#define portFPCCR_ASPEN_POS     ( 31UL )
+#define portFPCCR_ASPEN_MASK    ( 1UL << portFPCCR_ASPEN_POS )
+#define portFPCCR_LSPEN_POS     ( 30UL )
+#define portFPCCR_LSPEN_MASK    ( 1UL << portFPCCR_LSPEN_POS )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to manipulate the MPU.
  */
-#define portMPU_TYPE_REG					( * ( ( volatile uint32_t * ) 0xe000ed90 ) )
-#define portMPU_CTRL_REG					( * ( ( volatile uint32_t * ) 0xe000ed94 ) )
-#define portMPU_RNR_REG						( * ( ( volatile uint32_t * ) 0xe000ed98 ) )
+#define portMPU_TYPE_REG                      ( *( ( volatile uint32_t * ) 0xe000ed90 ) )
+#define portMPU_CTRL_REG                      ( *( ( volatile uint32_t * ) 0xe000ed94 ) )
+#define portMPU_RNR_REG                       ( *( ( volatile uint32_t * ) 0xe000ed98 ) )
 
-#define portMPU_RBAR_REG					( * ( ( volatile uint32_t * ) 0xe000ed9c ) )
-#define portMPU_RLAR_REG					( * ( ( volatile uint32_t * ) 0xe000eda0 ) )
+#define portMPU_RBAR_REG                      ( *( ( volatile uint32_t * ) 0xe000ed9c ) )
+#define portMPU_RLAR_REG                      ( *( ( volatile uint32_t * ) 0xe000eda0 ) )
 
-#define portMPU_RBAR_A1_REG					( * ( ( volatile uint32_t * ) 0xe000eda4 ) )
-#define portMPU_RLAR_A1_REG					( * ( ( volatile uint32_t * ) 0xe000eda8 ) )
+#define portMPU_RBAR_A1_REG                   ( *( ( volatile uint32_t * ) 0xe000eda4 ) )
+#define portMPU_RLAR_A1_REG                   ( *( ( volatile uint32_t * ) 0xe000eda8 ) )
 
-#define portMPU_RBAR_A2_REG					( * ( ( volatile uint32_t * ) 0xe000edac ) )
-#define portMPU_RLAR_A2_REG					( * ( ( volatile uint32_t * ) 0xe000edb0 ) )
+#define portMPU_RBAR_A2_REG                   ( *( ( volatile uint32_t * ) 0xe000edac ) )
+#define portMPU_RLAR_A2_REG                   ( *( ( volatile uint32_t * ) 0xe000edb0 ) )
 
-#define portMPU_RBAR_A3_REG					( * ( ( volatile uint32_t * ) 0xe000edb4 ) )
-#define portMPU_RLAR_A3_REG					( * ( ( volatile uint32_t * ) 0xe000edb8 ) )
+#define portMPU_RBAR_A3_REG                   ( *( ( volatile uint32_t * ) 0xe000edb4 ) )
+#define portMPU_RLAR_A3_REG                   ( *( ( volatile uint32_t * ) 0xe000edb8 ) )
 
-#define portMPU_MAIR0_REG					( * ( ( volatile uint32_t * ) 0xe000edc0 ) )
-#define portMPU_MAIR1_REG					( * ( ( volatile uint32_t * ) 0xe000edc4 ) )
+#define portMPU_MAIR0_REG                     ( *( ( volatile uint32_t * ) 0xe000edc0 ) )
+#define portMPU_MAIR1_REG                     ( *( ( volatile uint32_t * ) 0xe000edc4 ) )
 
-#define portMPU_RBAR_ADDRESS_MASK			( 0xffffffe0 ) /* Must be 32-byte aligned. */
-#define portMPU_RLAR_ADDRESS_MASK			( 0xffffffe0 ) /* Must be 32-byte aligned. */
+#define portMPU_RBAR_ADDRESS_MASK             ( 0xffffffe0 ) /* Must be 32-byte aligned. */
+#define portMPU_RLAR_ADDRESS_MASK             ( 0xffffffe0 ) /* Must be 32-byte aligned. */
 
-#define portMPU_MAIR_ATTR0_POS				( 0UL )
-#define portMPU_MAIR_ATTR0_MASK				( 0x000000ff )
+#define portMPU_MAIR_ATTR0_POS                ( 0UL )
+#define portMPU_MAIR_ATTR0_MASK               ( 0x000000ff )
 
-#define portMPU_MAIR_ATTR1_POS				( 8UL )
-#define portMPU_MAIR_ATTR1_MASK				( 0x0000ff00 )
+#define portMPU_MAIR_ATTR1_POS                ( 8UL )
+#define portMPU_MAIR_ATTR1_MASK               ( 0x0000ff00 )
 
-#define portMPU_MAIR_ATTR2_POS				( 16UL )
-#define portMPU_MAIR_ATTR2_MASK				( 0x00ff0000 )
+#define portMPU_MAIR_ATTR2_POS                ( 16UL )
+#define portMPU_MAIR_ATTR2_MASK               ( 0x00ff0000 )
 
-#define portMPU_MAIR_ATTR3_POS				( 24UL )
-#define portMPU_MAIR_ATTR3_MASK				( 0xff000000 )
+#define portMPU_MAIR_ATTR3_POS                ( 24UL )
+#define portMPU_MAIR_ATTR3_MASK               ( 0xff000000 )
 
-#define portMPU_MAIR_ATTR4_POS				( 0UL )
-#define portMPU_MAIR_ATTR4_MASK				( 0x000000ff )
+#define portMPU_MAIR_ATTR4_POS                ( 0UL )
+#define portMPU_MAIR_ATTR4_MASK               ( 0x000000ff )
 
-#define portMPU_MAIR_ATTR5_POS				( 8UL )
-#define portMPU_MAIR_ATTR5_MASK				( 0x0000ff00 )
+#define portMPU_MAIR_ATTR5_POS                ( 8UL )
+#define portMPU_MAIR_ATTR5_MASK               ( 0x0000ff00 )
 
-#define portMPU_MAIR_ATTR6_POS				( 16UL )
-#define portMPU_MAIR_ATTR6_MASK				( 0x00ff0000 )
+#define portMPU_MAIR_ATTR6_POS                ( 16UL )
+#define portMPU_MAIR_ATTR6_MASK               ( 0x00ff0000 )
 
-#define portMPU_MAIR_ATTR7_POS				( 24UL )
-#define portMPU_MAIR_ATTR7_MASK				( 0xff000000 )
+#define portMPU_MAIR_ATTR7_POS                ( 24UL )
+#define portMPU_MAIR_ATTR7_MASK               ( 0xff000000 )
 
-#define portMPU_RLAR_ATTR_INDEX0			( 0UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX1			( 1UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX2			( 2UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX3			( 3UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX4			( 4UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX5			( 5UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX6			( 6UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX7			( 7UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX0              ( 0UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX1              ( 1UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX2              ( 2UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX3              ( 3UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX4              ( 4UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX5              ( 5UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX6              ( 6UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX7              ( 7UL << 1UL )
 
-#define portMPU_RLAR_REGION_ENABLE			( 1UL )
+#define portMPU_RLAR_REGION_ENABLE            ( 1UL )
 
 /* Enable privileged access to unmapped region. */
-#define portMPU_PRIV_BACKGROUND_ENABLE_BIT	( 1UL << 2UL )
+#define portMPU_PRIV_BACKGROUND_ENABLE_BIT    ( 1UL << 2UL )
 
 /* Enable MPU. */
-#define portMPU_ENABLE_BIT					( 1UL << 0UL )
+#define portMPU_ENABLE_BIT                    ( 1UL << 0UL )
 
 /* Expected value of the portMPU_TYPE register. */
-#define portEXPECTED_MPU_TYPE_VALUE			( 8UL << 8UL ) /* 8 regions, unified. */
+#define portEXPECTED_MPU_TYPE_VALUE           ( 8UL << 8UL ) /* 8 regions, unified. */
 /*-----------------------------------------------------------*/
 
 /**
@@ -190,53 +190,55 @@
  *
  * It is needed because the systick is a 24-bit counter.
  */
-#define portMAX_24_BIT_NUMBER				( 0xffffffUL )
+#define portMAX_24_BIT_NUMBER       ( 0xffffffUL )
 
 /**
  * @brief A fiddle factor to estimate the number of SysTick counts that would
  * have occurred while the SysTick counter is stopped during tickless idle
  * calculations.
  */
-#define portMISSED_COUNTS_FACTOR			( 45UL )
+#define portMISSED_COUNTS_FACTOR    ( 45UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to set up the initial stack.
  */
-#define portINITIAL_XPSR					( 0x01000000 )
+#define portINITIAL_XPSR    ( 0x01000000 )
 
-#if( configRUN_FREERTOS_SECURE_ONLY == 1 )
-	/**
-	 * @brief Initial EXC_RETURN value.
-	 *
-	 *     FF         FF         FF         FD
-	 * 1111 1111  1111 1111  1111 1111  1111 1101
-	 *
-	 * Bit[6] - 1 --> The exception was taken from the Secure state.
-	 * Bit[5] - 1 --> Do not skip stacking of additional state context.
-	 * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
-	 * Bit[3] - 1 --> Return to the Thread mode.
-	 * Bit[2] - 1 --> Restore registers from the process stack.
-	 * Bit[1] - 0 --> Reserved, 0.
-	 * Bit[0] - 1 --> The exception was taken to the Secure state.
-	 */
-	#define portINITIAL_EXC_RETURN			( 0xfffffffd )
+#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
+
+/**
+ * @brief Initial EXC_RETURN value.
+ *
+ *     FF         FF         FF         FD
+ * 1111 1111  1111 1111  1111 1111  1111 1101
+ *
+ * Bit[6] - 1 --> The exception was taken from the Secure state.
+ * Bit[5] - 1 --> Do not skip stacking of additional state context.
+ * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
+ * Bit[3] - 1 --> Return to the Thread mode.
+ * Bit[2] - 1 --> Restore registers from the process stack.
+ * Bit[1] - 0 --> Reserved, 0.
+ * Bit[0] - 1 --> The exception was taken to the Secure state.
+ */
+    #define portINITIAL_EXC_RETURN    ( 0xfffffffd )
 #else
-	/**
-	 * @brief Initial EXC_RETURN value.
-	 *
-	 *     FF         FF         FF         BC
-	 * 1111 1111  1111 1111  1111 1111  1011 1100
-	 *
-	 * Bit[6] - 0 --> The exception was taken from the Non-Secure state.
-	 * Bit[5] - 1 --> Do not skip stacking of additional state context.
-	 * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
-	 * Bit[3] - 1 --> Return to the Thread mode.
-	 * Bit[2] - 1 --> Restore registers from the process stack.
-	 * Bit[1] - 0 --> Reserved, 0.
-	 * Bit[0] - 0 --> The exception was taken to the Non-Secure state.
-	 */
-	#define portINITIAL_EXC_RETURN			( 0xffffffbc )
+
+/**
+ * @brief Initial EXC_RETURN value.
+ *
+ *     FF         FF         FF         BC
+ * 1111 1111  1111 1111  1111 1111  1011 1100
+ *
+ * Bit[6] - 0 --> The exception was taken from the Non-Secure state.
+ * Bit[5] - 1 --> Do not skip stacking of additional state context.
+ * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
+ * Bit[3] - 1 --> Return to the Thread mode.
+ * Bit[2] - 1 --> Restore registers from the process stack.
+ * Bit[1] - 0 --> Reserved, 0.
+ * Bit[0] - 0 --> The exception was taken to the Non-Secure state.
+ */
+    #define portINITIAL_EXC_RETURN    ( 0xffffffbc )
 #endif /* configRUN_FREERTOS_SECURE_ONLY */
 
 /**
@@ -246,13 +248,13 @@
  *  Bit[0] = 0 ==> The task is privileged.
  *  Bit[0] = 1 ==> The task is not privileged.
  */
-#define portCONTROL_PRIVILEGED_MASK			( 1UL << 0UL )
+#define portCONTROL_PRIVILEGED_MASK         ( 1UL << 0UL )
 
 /**
  * @brief Initial CONTROL register values.
  */
-#define portINITIAL_CONTROL_UNPRIVILEGED	( 0x3 )
-#define portINITIAL_CONTROL_PRIVILEGED		( 0x2 )
+#define portINITIAL_CONTROL_UNPRIVILEGED    ( 0x3 )
+#define portINITIAL_CONTROL_PRIVILEGED      ( 0x2 )
 
 /**
  * @brief Let the user override the pre-loading of the initial LR with the
@@ -260,23 +262,23 @@
  * in the debugger.
  */
 #ifdef configTASK_RETURN_ADDRESS
-	#define portTASK_RETURN_ADDRESS			configTASK_RETURN_ADDRESS
+    #define portTASK_RETURN_ADDRESS    configTASK_RETURN_ADDRESS
 #else
-	#define portTASK_RETURN_ADDRESS			prvTaskExitError
+    #define portTASK_RETURN_ADDRESS    prvTaskExitError
 #endif
 
 /**
  * @brief If portPRELOAD_REGISTERS then registers will be given an initial value
  * when a task is created. This helps in debugging at the cost of code size.
  */
-#define portPRELOAD_REGISTERS				1
+#define portPRELOAD_REGISTERS    1
 
 /**
  * @brief A task is created without a secure context, and must call
  * portALLOCATE_SECURE_CONTEXT() to give itself a secure context before it makes
  * any secure calls.
  */
-#define portNO_SECURE_CONTEXT				0
+#define portNO_SECURE_CONTEXT    0
 /*-----------------------------------------------------------*/
 
 /**
@@ -285,18 +287,20 @@
  */
 static void prvTaskExitError( void );
 
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Setup the Memory Protection Unit (MPU).
-	 */
-	static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
+#if ( configENABLE_MPU == 1 )
+
+/**
+ * @brief Setup the Memory Protection Unit (MPU).
+ */
+    static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
 #endif /* configENABLE_MPU */
 
-#if( configENABLE_FPU == 1 )
-	/**
-	 * @brief Setup the Floating Point Unit (FPU).
-	 */
-	static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;
+#if ( configENABLE_FPU == 1 )
+
+/**
+ * @brief Setup the Floating Point Unit (FPU).
+ */
+    static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;
 #endif /* configENABLE_FPU */
 
 /**
@@ -338,812 +342,850 @@ void SysTick_Handler( void ) PRIVILEGED_FUNCTION;
 /**
  * @brief C part of SVC handler.
  */
-portDONT_DISCARD void vPortSVCHandler_C( uint32_t *pulCallerStackAddress ) PRIVILEGED_FUNCTION;
+portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIVILEGED_FUNCTION;
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Each task maintains its own interrupt status in the critical nesting
  * variable.
  */
-static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
+PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Saved as part of the task context to indicate which context the
-	 * task is using on the secure side.
-	 */
-	portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
+#if ( configENABLE_TRUSTZONE == 1 )
+
+/**
+ * @brief Saved as part of the task context to indicate which context the
+ * task is using on the secure side.
+ */
+    PRIVILEGED_DATA portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
 #endif /* configENABLE_TRUSTZONE */
 
-#if( configUSE_TICKLESS_IDLE == 1 )
-	/**
-	 * @brief The number of SysTick increments that make up one tick period.
-	 */
-	static uint32_t ulTimerCountsForOneTick = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
 
-	/**
-	 * @brief The maximum number of tick periods that can be suppressed is
-	 * limited by the 24 bit resolution of the SysTick timer.
-	 */
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
+/**
+ * @brief The number of SysTick increments that make up one tick period.
+ */
+    PRIVILEGED_DATA static uint32_t ulTimerCountsForOneTick = 0;
 
-	/**
-	 * @brief Compensate for the CPU cycles that pass while the SysTick is
-	 * stopped (low power functionality only).
-	 */
-	static uint32_t ulStoppedTimerCompensation = 0;
+/**
+ * @brief The maximum number of tick periods that can be suppressed is
+ * limited by the 24 bit resolution of the SysTick timer.
+ */
+    PRIVILEGED_DATA static uint32_t xMaximumPossibleSuppressedTicks = 0;
+
+/**
+ * @brief Compensate for the CPU cycles that pass while the SysTick is
+ * stopped (low power functionality only).
+ */
+    PRIVILEGED_DATA static uint32_t ulStoppedTimerCompensation = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TICKLESS_IDLE == 1 )
-	__attribute__(( weak )) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-	{
-	uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
-	TickType_t xModifiableIdleTime;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+    {
+        uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+        TickType_t xModifiableIdleTime;
 
-		/* Make sure the SysTick reload value does not overflow the counter. */
-		if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-		{
-			xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-		}
+        /* Make sure the SysTick reload value does not overflow the counter. */
+        if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+        {
+            xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+        }
 
-		/* Stop the SysTick momentarily. The time the SysTick is stopped for is
-		 * accounted for as best it can be, but using the tickless mode will
-		 * inevitably result in some tiny drift of the time maintained by the
-		 * kernel with respect to calendar time. */
-		portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+        /* Stop the SysTick momentarily. The time the SysTick is stopped for is
+         * accounted for as best it can be, but using the tickless mode will
+         * inevitably result in some tiny drift of the time maintained by the
+         * kernel with respect to calendar time. */
+        portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
 
-		/* Calculate the reload value required to wait xExpectedIdleTime
-		 * tick periods. -1 is used because this code will execute part way
-		 * through one of the tick periods. */
-		ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-		if( ulReloadValue > ulStoppedTimerCompensation )
-		{
-			ulReloadValue -= ulStoppedTimerCompensation;
-		}
+        /* Calculate the reload value required to wait xExpectedIdleTime
+         * tick periods. -1 is used because this code will execute part way
+         * through one of the tick periods. */
+        ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
 
-		/* Enter a critical section but don't use the taskENTER_CRITICAL()
-		 * method as that will mask interrupts that should exit sleep mode. */
-		__asm volatile( "cpsid i" ::: "memory" );
-		__asm volatile( "dsb" );
-		__asm volatile( "isb" );
+        if( ulReloadValue > ulStoppedTimerCompensation )
+        {
+            ulReloadValue -= ulStoppedTimerCompensation;
+        }
 
-		/* If a context switch is pending or a task is waiting for the scheduler
-		 * to be un-suspended then abandon the low power entry. */
-		if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-		{
-			/* Restart from whatever is left in the count register to complete
-			 * this tick period. */
-			portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+        /* Enter a critical section but don't use the taskENTER_CRITICAL()
+         * method as that will mask interrupts that should exit sleep mode. */
+        __asm volatile ( "cpsid i" ::: "memory" );
+        __asm volatile ( "dsb" );
+        __asm volatile ( "isb" );
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+        /* If a context switch is pending or a task is waiting for the scheduler
+         * to be un-suspended then abandon the low power entry. */
+        if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+        {
+            /* Restart from whatever is left in the count register to complete
+             * this tick period. */
+            portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Reset the reload register to the value required for normal tick
-			 * periods. */
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts - see comments above the cpsid instruction()
-			 * above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-		else
-		{
-			/* Set the new reload value. */
-			portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+            /* Reset the reload register to the value required for normal tick
+             * periods. */
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
 
-			/* Clear the SysTick count flag and set the count value back to
-			 * zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            /* Re-enable interrupts - see comments above the cpsid instruction()
+             * above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+        else
+        {
+            /* Set the new reload value. */
+            portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            /* Clear the SysTick count flag and set the count value back to
+             * zero. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-			/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
-			 * set its parameter to 0 to indicate that its implementation
-			 * contains its own wait for interrupt or wait for event
-			 * instruction, and so wfi should not be executed again. However,
-			 * the original expected idle time variable must remain unmodified,
-			 * so a copy is taken. */
-			xModifiableIdleTime = xExpectedIdleTime;
-			configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-			if( xModifiableIdleTime > 0 )
-			{
-				__asm volatile( "dsb" ::: "memory" );
-				__asm volatile( "wfi" );
-				__asm volatile( "isb" );
-			}
-			configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts to allow the interrupt that brought the MCU
-			 * out of sleep mode to execute immediately. See comments above
-			 * the cpsid instruction above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
+            /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
+             * set its parameter to 0 to indicate that its implementation
+             * contains its own wait for interrupt or wait for event
+             * instruction, and so wfi should not be executed again. However,
+             * the original expected idle time variable must remain unmodified,
+             * so a copy is taken. */
+            xModifiableIdleTime = xExpectedIdleTime;
+            configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
 
-			/* Disable interrupts again because the clock is about to be stopped
-			 * and interrupts that execute while the clock is stopped will
-			 * increase any slippage between the time maintained by the RTOS and
-			 * calendar time. */
-			__asm volatile( "cpsid i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
+            if( xModifiableIdleTime > 0 )
+            {
+                __asm volatile ( "dsb" ::: "memory" );
+                __asm volatile ( "wfi" );
+                __asm volatile ( "isb" );
+            }
 
-			/* Disable the SysTick clock without reading the
-			 * portNVIC_SYSTICK_CTRL_REG register to ensure the
-			 * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
-			 * Again, the time the SysTick is stopped for is accounted for as
-			 * best it can be, but using the tickless mode will inevitably
-			 * result in some tiny drift of the time maintained by the kernel
-			 * with respect to calendar time*/
-			portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+            configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
 
-			/* Determine if the SysTick clock has already counted to zero and
-			 * been set back to the current reload value (the reload back being
-			 * correct for the entire expected idle time) or if the SysTick is
-			 * yet to count to zero (in which case an interrupt other than the
-			 * SysTick must have brought the system out of sleep mode). */
-			if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-			{
-				uint32_t ulCalculatedLoadValue;
+            /* Re-enable interrupts to allow the interrupt that brought the MCU
+             * out of sleep mode to execute immediately. See comments above
+             * the cpsid instruction above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
 
-				/* The tick interrupt is already pending, and the SysTick count
-				 * reloaded with ulReloadValue.  Reset the
-				 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
-				 * period. */
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+            /* Disable interrupts again because the clock is about to be stopped
+             * and interrupts that execute while the clock is stopped will
+             * increase any slippage between the time maintained by the RTOS and
+             * calendar time. */
+            __asm volatile ( "cpsid i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
 
-				/* Don't allow a tiny value, or values that have somehow
-				 * underflowed because the post sleep hook did something
-				 * that took too long. */
-				if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-				{
-					ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-				}
+            /* Disable the SysTick clock without reading the
+             * portNVIC_SYSTICK_CTRL_REG register to ensure the
+             * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
+             * Again, the time the SysTick is stopped for is accounted for as
+             * best it can be, but using the tickless mode will inevitably
+             * result in some tiny drift of the time maintained by the kernel
+             * with respect to calendar time*/
+            portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
 
-				portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+            /* Determine if the SysTick clock has already counted to zero and
+             * been set back to the current reload value (the reload back being
+             * correct for the entire expected idle time) or if the SysTick is
+             * yet to count to zero (in which case an interrupt other than the
+             * SysTick must have brought the system out of sleep mode). */
+            if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+            {
+                uint32_t ulCalculatedLoadValue;
 
-				/* As the pending tick will be processed as soon as this
-				 * function exits, the tick value maintained by the tick is
-				 * stepped forward by one less than the time spent waiting. */
-				ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-			}
-			else
-			{
-				/* Something other than the tick interrupt ended the sleep.
-				 * Work out how long the sleep lasted rounded to complete tick
-				 * periods (not the ulReload value which accounted for part
-				 * ticks). */
-				ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+                /* The tick interrupt is already pending, and the SysTick count
+                 * reloaded with ulReloadValue.  Reset the
+                 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+                 * period. */
+                ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
 
-				/* How many complete tick periods passed while the processor
-				 * was waiting? */
-				ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+                /* Don't allow a tiny value, or values that have somehow
+                 * underflowed because the post sleep hook did something
+                 * that took too long. */
+                if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+                {
+                    ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+                }
 
-				/* The reload value is set to whatever fraction of a single tick
-				 * period remains. */
-				portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-			}
+                portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
 
-			/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
-			 * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
-			 * value. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-			vTaskStepTick( ulCompleteTickPeriods );
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+                /* As the pending tick will be processed as soon as this
+                 * function exits, the tick value maintained by the tick is
+                 * stepped forward by one less than the time spent waiting. */
+                ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+            }
+            else
+            {
+                /* Something other than the tick interrupt ended the sleep.
+                 * Work out how long the sleep lasted rounded to complete tick
+                 * periods (not the ulReload value which accounted for part
+                 * ticks). */
+                ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Exit with interrupts enabled. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-	}
+                /* How many complete tick periods passed while the processor
+                 * was waiting? */
+                ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+                /* The reload value is set to whatever fraction of a single tick
+                 * period remains. */
+                portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+            }
+
+            /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+             * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+             * value. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            vTaskStepTick( ulCompleteTickPeriods );
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Exit with interrupts enabled. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+    }
 #endif /* configUSE_TICKLESS_IDLE */
 /*-----------------------------------------------------------*/
 
-__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
+__attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
 {
-	/* Calculate the constants required to configure the tick interrupt. */
-	#if( configUSE_TICKLESS_IDLE == 1 )
-	{
-		ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
-		xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
-	}
-	#endif /* configUSE_TICKLESS_IDLE */
+    /* Calculate the constants required to configure the tick interrupt. */
+    #if ( configUSE_TICKLESS_IDLE == 1 )
+        {
+            ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+            xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+            ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+        }
+    #endif /* configUSE_TICKLESS_IDLE */
 
-	/* Stop and reset the SysTick. */
-	portNVIC_SYSTICK_CTRL_REG = 0UL;
-	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+    /* Stop and reset the SysTick. */
+    portNVIC_SYSTICK_CTRL_REG = 0UL;
+    portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-	/* Configure SysTick to interrupt at the requested rate. */
-	portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
+    /* Configure SysTick to interrupt at the requested rate. */
+    portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+    portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
 }
 /*-----------------------------------------------------------*/
 
 static void prvTaskExitError( void )
 {
-volatile uint32_t ulDummy = 0UL;
+    volatile uint32_t ulDummy = 0UL;
 
-	/* A function that implements a task must not exit or attempt to return to
-	 * its caller as there is nothing to return to. If a task wants to exit it
-	 * should instead call vTaskDelete( NULL ). Artificially force an assert()
-	 * to be triggered if configASSERT() is defined, then stop here so
-	 * application writers can catch the error. */
-	configASSERT( ulCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to. If a task wants to exit it
+     * should instead call vTaskDelete( NULL ). Artificially force an assert()
+     * to be triggered if configASSERT() is defined, then stop here so
+     * application writers can catch the error. */
+    configASSERT( ulCriticalNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
 
-	while( ulDummy == 0 )
-	{
-		/* This file calls prvTaskExitError() after the scheduler has been
-		 * started to remove a compiler warning about the function being
-		 * defined but never called.  ulDummy is used purely to quieten other
-		 * warnings about code appearing after this function is called - making
-		 * ulDummy volatile makes the compiler think the function could return
-		 * and therefore not output an 'unreachable code' warning for code that
-		 * appears after it. */
-	}
+    while( ulDummy == 0 )
+    {
+        /* This file calls prvTaskExitError() after the scheduler has been
+         * started to remove a compiler warning about the function being
+         * defined but never called.  ulDummy is used purely to quieten other
+         * warnings about code appearing after this function is called - making
+         * ulDummy volatile makes the compiler think the function could return
+         * and therefore not output an 'unreachable code' warning for code that
+         * appears after it. */
+    }
 }
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
-	{
-	#if defined( __ARMCC_VERSION )
-		/* Declaration when these variable are defined in code instead of being
-		 * exported from linker scripts. */
-		extern uint32_t * __privileged_functions_start__;
-		extern uint32_t * __privileged_functions_end__;
-		extern uint32_t * __syscalls_flash_start__;
-		extern uint32_t * __syscalls_flash_end__;
-		extern uint32_t * __unprivileged_flash_start__;
-		extern uint32_t * __unprivileged_flash_end__;
-		extern uint32_t * __privileged_sram_start__;
-		extern uint32_t * __privileged_sram_end__;
-	#else
-		/* Declaration when these variable are exported from linker scripts. */
-		extern uint32_t __privileged_functions_start__[];
-		extern uint32_t __privileged_functions_end__[];
-		extern uint32_t __syscalls_flash_start__[];
-		extern uint32_t __syscalls_flash_end__[];
-		extern uint32_t __unprivileged_flash_start__[];
-		extern uint32_t __unprivileged_flash_end__[];
-		extern uint32_t __privileged_sram_start__[];
-		extern uint32_t __privileged_sram_end__[];
-	#endif /* defined( __ARMCC_VERSION ) */
+#if ( configENABLE_MPU == 1 )
+    static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
+    {
+        #if defined( __ARMCC_VERSION )
 
-		/* Check that the MPU is present. */
-		if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
-		{
-			/* MAIR0 - Index 0. */
-			portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
-			/* MAIR0 - Index 1. */
-			portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __privileged_functions_start__;
+            extern uint32_t * __privileged_functions_end__;
+            extern uint32_t * __syscalls_flash_start__;
+            extern uint32_t * __syscalls_flash_end__;
+            extern uint32_t * __unprivileged_flash_start__;
+            extern uint32_t * __unprivileged_flash_end__;
+            extern uint32_t * __privileged_sram_start__;
+            extern uint32_t * __privileged_sram_end__;
+        #else /* if defined( __ARMCC_VERSION ) */
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __privileged_functions_start__[];
+            extern uint32_t __privileged_functions_end__[];
+            extern uint32_t __syscalls_flash_start__[];
+            extern uint32_t __syscalls_flash_end__[];
+            extern uint32_t __unprivileged_flash_start__[];
+            extern uint32_t __unprivileged_flash_end__[];
+            extern uint32_t __privileged_sram_start__[];
+            extern uint32_t __privileged_sram_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
 
-			/* Setup privileged flash as Read Only so that privileged tasks can
-			 * read it but not modify. */
-			portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_PRIVILEGED_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
+        /* Check that the MPU is present. */
+        if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
+        {
+            /* MAIR0 - Index 0. */
+            portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
+            /* MAIR0 - Index 1. */
+            portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
 
-			/* Setup unprivileged flash as Read Only by both privileged and
-			 * unprivileged tasks. All tasks can read it but no-one can modify. */
-			portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
+            /* Setup privileged flash as Read Only so that privileged tasks can
+             * read it but not modify. */
+            portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_PRIVILEGED_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
 
-			/* Setup unprivileged syscalls flash as Read Only by both privileged
-			 * and unprivileged tasks. All tasks can read it but no-one can modify. */
-			portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
+            /* Setup unprivileged flash as Read Only by both privileged and
+             * unprivileged tasks. All tasks can read it but no-one can modify. */
+            portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
 
-			/* Setup RAM containing kernel data for privileged access only. */
-			portMPU_RNR_REG = portPRIVILEGED_RAM_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
-								( portMPU_REGION_EXECUTE_NEVER );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
+            /* Setup unprivileged syscalls flash as Read Only by both privileged
+             * and unprivileged tasks. All tasks can read it but no-one can modify. */
+            portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
 
-			/* Enable mem fault. */
-			portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
+            /* Setup RAM containing kernel data for privileged access only. */
+            portMPU_RNR_REG = portPRIVILEGED_RAM_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
+                               ( portMPU_REGION_EXECUTE_NEVER );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
 
-			/* Enable MPU with privileged background access i.e. unmapped
-			 * regions have privileged access. */
-			portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
-		}
-	}
+            /* Enable mem fault. */
+            portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
+
+            /* Enable MPU with privileged background access i.e. unmapped
+             * regions have privileged access. */
+            portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
+        }
+    }
 #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_FPU == 1 )
-	static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
-	{
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			/* Enable non-secure access to the FPU. */
-			SecureInit_EnableNSFPUAccess();
-		}
-		#endif /* configENABLE_TRUSTZONE */
+#if ( configENABLE_FPU == 1 )
+    static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
+    {
+        #if ( configENABLE_TRUSTZONE == 1 )
+            {
+                /* Enable non-secure access to the FPU. */
+                SecureInit_EnableNSFPUAccess();
+            }
+        #endif /* configENABLE_TRUSTZONE */
 
-		/* CP10 = 11 ==> Full access to FPU i.e. both privileged and
-		 * unprivileged code should be able to access FPU. CP11 should be
-		 * programmed to the same value as CP10. */
-		*( portCPACR ) |=	(	( portCPACR_CP10_VALUE << portCPACR_CP10_POS ) |
-								( portCPACR_CP11_VALUE << portCPACR_CP11_POS )
-							);
+        /* CP10 = 11 ==> Full access to FPU i.e. both privileged and
+         * unprivileged code should be able to access FPU. CP11 should be
+         * programmed to the same value as CP10. */
+        *( portCPACR ) |= ( ( portCPACR_CP10_VALUE << portCPACR_CP10_POS ) |
+                            ( portCPACR_CP11_VALUE << portCPACR_CP11_POS )
+                            );
 
-		/* ASPEN = 1 ==> Hardware should automatically preserve floating point
-		 * context on exception entry and restore on exception return.
-		 * LSPEN = 1 ==> Enable lazy context save of FP state. */
-		*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
-	}
+        /* ASPEN = 1 ==> Hardware should automatically preserve floating point
+         * context on exception entry and restore on exception return.
+         * LSPEN = 1 ==> Enable lazy context save of FP state. */
+        *( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
+    }
 #endif /* configENABLE_FPU */
 /*-----------------------------------------------------------*/
 
 void vPortYield( void ) /* PRIVILEGED_FUNCTION */
 {
-	/* Set a PendSV to request a context switch. */
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+    /* Set a PendSV to request a context switch. */
+    portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
 
-	/* Barriers are normally not required but do ensure the code is
-	 * completely within the specified behaviour for the architecture. */
-	__asm volatile( "dsb" ::: "memory" );
-	__asm volatile( "isb" );
+    /* Barriers are normally not required but do ensure the code is
+     * completely within the specified behaviour for the architecture. */
+    __asm volatile ( "dsb" ::: "memory" );
+    __asm volatile ( "isb" );
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */
 {
-	portDISABLE_INTERRUPTS();
-	ulCriticalNesting++;
+    portDISABLE_INTERRUPTS();
+    ulCriticalNesting++;
 
-	/* Barriers are normally not required but do ensure the code is
-	 * completely within the specified behaviour for the architecture. */
-	__asm volatile( "dsb" ::: "memory" );
-	__asm volatile( "isb" );
+    /* Barriers are normally not required but do ensure the code is
+     * completely within the specified behaviour for the architecture. */
+    __asm volatile ( "dsb" ::: "memory" );
+    __asm volatile ( "isb" );
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */
 {
-	configASSERT( ulCriticalNesting );
-	ulCriticalNesting--;
+    configASSERT( ulCriticalNesting );
+    ulCriticalNesting--;
 
-	if( ulCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
+    if( ulCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
 }
 /*-----------------------------------------------------------*/
 
 void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
 {
-uint32_t ulPreviousMask;
+    uint32_t ulPreviousMask;
 
-	ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* Pend a context switch. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
+    ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* Pend a context switch. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
 }
 /*-----------------------------------------------------------*/
 
-void vPortSVCHandler_C( uint32_t *pulCallerStackAddress ) /* PRIVILEGED_FUNCTION portDONT_DISCARD */
+void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTION portDONT_DISCARD */
 {
-#if( configENABLE_MPU == 1 )
-	#if defined( __ARMCC_VERSION )
-		/* Declaration when these variable are defined in code instead of being
-		 * exported from linker scripts. */
-		extern uint32_t * __syscalls_flash_start__;
-		extern uint32_t * __syscalls_flash_end__;
-	#else
-		/* Declaration when these variable are exported from linker scripts. */
-		extern uint32_t __syscalls_flash_start__[];
-		extern uint32_t __syscalls_flash_end__[];
-	#endif /* defined( __ARMCC_VERSION ) */
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        #if defined( __ARMCC_VERSION )
 
-uint32_t ulPC;
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __syscalls_flash_start__;
+            extern uint32_t * __syscalls_flash_end__;
+        #else
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __syscalls_flash_start__[];
+            extern uint32_t __syscalls_flash_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
+    #endif /* configENABLE_MPU */
 
-#if( configENABLE_TRUSTZONE == 1 )
-	uint32_t ulR0;
-	#if( configENABLE_MPU == 1 )
-		uint32_t ulControl, ulIsTaskPrivileged;
-	#endif /* configENABLE_MPU */
-#endif /* configENABLE_TRUSTZONE */
-uint8_t ucSVCNumber;
+    uint32_t ulPC;
 
-	/* Register are stored on the stack in the following order - R0, R1, R2, R3,
-	 * R12, LR, PC, xPSR. */
-	ulPC = pulCallerStackAddress[ 6 ];
-	ucSVCNumber = ( ( uint8_t *) ulPC )[ -2 ];
+    #if ( configENABLE_TRUSTZONE == 1 )
+        uint32_t ulR0;
+        #if ( configENABLE_MPU == 1 )
+            uint32_t ulControl, ulIsTaskPrivileged;
+        #endif /* configENABLE_MPU */
+    #endif /* configENABLE_TRUSTZONE */
+    uint8_t ucSVCNumber;
 
-	switch( ucSVCNumber )
-	{
-		#if( configENABLE_TRUSTZONE == 1 )
-			case portSVC_ALLOCATE_SECURE_CONTEXT:
-			{
-				/* R0 contains the stack size passed as parameter to the
-				 * vPortAllocateSecureContext function. */
-				ulR0 = pulCallerStackAddress[ 0 ];
+    /* Register are stored on the stack in the following order - R0, R1, R2, R3,
+     * R12, LR, PC, xPSR. */
+    ulPC = pulCallerStackAddress[ 6 ];
+    ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ];
 
-				#if( configENABLE_MPU == 1 )
-				{
-					/* Read the CONTROL register value. */
-					__asm volatile ( "mrs %0, control"  : "=r" ( ulControl ) );
+    switch( ucSVCNumber )
+    {
+        #if ( configENABLE_TRUSTZONE == 1 )
+            case portSVC_ALLOCATE_SECURE_CONTEXT:
 
-					/* The task that raised the SVC is privileged if Bit[0]
-					 * in the CONTROL register is 0. */
-					ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 );
+                /* R0 contains the stack size passed as parameter to the
+                 * vPortAllocateSecureContext function. */
+                ulR0 = pulCallerStackAddress[ 0 ];
 
-					/* Allocate and load a context for the secure task. */
-					xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged );
-				}
-				#else
-				{
-					/* Allocate and load a context for the secure task. */
-					xSecureContext = SecureContext_AllocateContext( ulR0 );
-				}
-				#endif /* configENABLE_MPU */
+                #if ( configENABLE_MPU == 1 )
+                    {
+                        /* Read the CONTROL register value. */
+                        __asm volatile ( "mrs %0, control"  : "=r" ( ulControl ) );
 
-				configASSERT( xSecureContext != NULL );
-				SecureContext_LoadContext( xSecureContext );
-			}
-			break;
+                        /* The task that raised the SVC is privileged if Bit[0]
+                         * in the CONTROL register is 0. */
+                        ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 );
 
-			case portSVC_FREE_SECURE_CONTEXT:
-			{
-				/* R0 contains the secure context handle to be freed. */
-				ulR0 = pulCallerStackAddress[ 0 ];
+                        /* Allocate and load a context for the secure task. */
+                        xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged );
+                    }
+                #else /* if ( configENABLE_MPU == 1 ) */
+                    {
+                        /* Allocate and load a context for the secure task. */
+                        xSecureContext = SecureContext_AllocateContext( ulR0 );
+                    }
+                #endif /* configENABLE_MPU */
 
-				/* Free the secure context. */
-				SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 );
-			}
-			break;
-		#endif /* configENABLE_TRUSTZONE */
+                configASSERT( xSecureContext != NULL );
+                SecureContext_LoadContext( xSecureContext );
+                break;
 
-		case portSVC_START_SCHEDULER:
-		{
-			#if( configENABLE_TRUSTZONE == 1 )
-			{
-				/* De-prioritize the non-secure exceptions so that the
-				 * non-secure pendSV runs at the lowest priority. */
-				SecureInit_DePrioritizeNSExceptions();
+            case portSVC_FREE_SECURE_CONTEXT:
+                /* R0 contains the secure context handle to be freed. */
+                ulR0 = pulCallerStackAddress[ 0 ];
 
-				/* Initialize the secure context management system. */
-				SecureContext_Init();
-			}
-			#endif /* configENABLE_TRUSTZONE */
+                /* Free the secure context. */
+                SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 );
+                break;
+        #endif /* configENABLE_TRUSTZONE */
 
-			#if( configENABLE_FPU == 1 )
-			{
-				/* Setup the Floating Point Unit (FPU). */
-				prvSetupFPU();
-			}
-			#endif /* configENABLE_FPU */
+        case portSVC_START_SCHEDULER:
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    /* De-prioritize the non-secure exceptions so that the
+                     * non-secure pendSV runs at the lowest priority. */
+                    SecureInit_DePrioritizeNSExceptions();
 
-			/* Setup the context of the first task so that the first task starts
-			 * executing. */
-			vRestoreContextOfFirstTask();
-		}
-		break;
+                    /* Initialize the secure context management system. */
+                    SecureContext_Init();
+                }
+            #endif /* configENABLE_TRUSTZONE */
 
-		#if( configENABLE_MPU == 1 )
-			case portSVC_RAISE_PRIVILEGE:
-			{
-				/* Only raise the privilege, if the svc was raised from any of
-				 * the system calls. */
-				if( ulPC >= ( uint32_t ) __syscalls_flash_start__ &&
-					ulPC <= ( uint32_t ) __syscalls_flash_end__ )
-				{
-					vRaisePrivilege();
-				}
-			}
-			break;
-		#endif /* configENABLE_MPU */
+            #if ( configENABLE_FPU == 1 )
+                {
+                    /* Setup the Floating Point Unit (FPU). */
+                    prvSetupFPU();
+                }
+            #endif /* configENABLE_FPU */
 
-		default:
-		{
-			/* Incorrect SVC call. */
-			configASSERT( pdFALSE );
-		}
-	}
+            /* Setup the context of the first task so that the first task starts
+             * executing. */
+            vRestoreContextOfFirstTask();
+            break;
+
+            #if ( configENABLE_MPU == 1 )
+                case portSVC_RAISE_PRIVILEGE:
+
+                    /* Only raise the privilege, if the svc was raised from any of
+                     * the system calls. */
+                    if( ( ulPC >= ( uint32_t ) __syscalls_flash_start__ ) &&
+                        ( ulPC <= ( uint32_t ) __syscalls_flash_end__ ) )
+                    {
+                        vRaisePrivilege();
+                    }
+                    break;
+            #endif /* configENABLE_MPU */
+
+        default:
+            /* Incorrect SVC call. */
+            configASSERT( pdFALSE );
+    }
 }
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */
+#if ( configENABLE_MPU == 1 )
+    StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                         StackType_t * pxEndOfStack,
+                                         TaskFunction_t pxCode,
+                                         void * pvParameters,
+                                         BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */
 #else
-	StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters ) /* PRIVILEGED_FUNCTION */
+    StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                         StackType_t * pxEndOfStack,
+                                         TaskFunction_t pxCode,
+                                         void * pvParameters ) /* PRIVILEGED_FUNCTION */
 #endif /* configENABLE_MPU */
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	 * interrupt. */
-	#if( portPRELOAD_REGISTERS == 0 )
-	{
-		pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-		*pxTopOfStack = portINITIAL_XPSR;							/* xPSR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxCode;						/* PC */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
-		pxTopOfStack -= 5;											/* R12, R3, R2 and R1. */
-		*pxTopOfStack = ( StackType_t ) pvParameters;				/* R0 */
-		pxTopOfStack -= 9;											/* R11..R4, EXC_RETURN. */
-		*pxTopOfStack = portINITIAL_EXC_RETURN;
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
+    #if ( portPRELOAD_REGISTERS == 0 )
+        {
+            pxTopOfStack--;                                          /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+            *pxTopOfStack = portINITIAL_XPSR;                        /* xPSR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxCode;                  /* PC */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
+            pxTopOfStack -= 5;                                       /* R12, R3, R2 and R1. */
+            *pxTopOfStack = ( StackType_t ) pvParameters;            /* R0 */
+            pxTopOfStack -= 9;                                       /* R11..R4, EXC_RETURN. */
+            *pxTopOfStack = portINITIAL_EXC_RETURN;
 
-		#if( configENABLE_MPU == 1 )
-		{
-			pxTopOfStack--;
-			if( xRunPrivileged == pdTRUE )
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED;		/* Slot used to hold this task's CONTROL value. */
-			}
-			else
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED;	/* Slot used to hold this task's CONTROL value. */
-			}
-		}
-		#endif /* configENABLE_MPU */
+            #if ( configENABLE_MPU == 1 )
+                {
+                    pxTopOfStack--;
 
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxEndOfStack;	/* Slot used to hold this task's PSPLIM value. */
+                    if( xRunPrivileged == pdTRUE )
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                    else
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                }
+            #endif /* configENABLE_MPU */
 
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			pxTopOfStack--;
-			*pxTopOfStack = portNO_SECURE_CONTEXT;		/* Slot used to hold this task's xSecureContext value. */
-		}
-		#endif /* configENABLE_TRUSTZONE */
-	}
-	#else /* portPRELOAD_REGISTERS */
-	{
-		pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-		*pxTopOfStack = portINITIAL_XPSR;							/* xPSR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxCode;						/* PC */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x12121212UL;				/* R12 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x03030303UL;				/* R3 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x02020202UL;				/* R2 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x01010101UL;				/* R1 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pvParameters;				/* R0 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x11111111UL;				/* R11 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x10101010UL;				/* R10 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x09090909UL;				/* R09 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x08080808UL;				/* R08 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x07070707UL;				/* R07 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x06060606UL;				/* R06 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x05050505UL;				/* R05 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x04040404UL;				/* R04 */
-		pxTopOfStack--;
-		*pxTopOfStack = portINITIAL_EXC_RETURN;						/* EXC_RETURN */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */
 
-		#if( configENABLE_MPU == 1 )
-		{
-			pxTopOfStack--;
-			if( xRunPrivileged == pdTRUE )
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED;		/* Slot used to hold this task's CONTROL value. */
-			}
-			else
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED;	/* Slot used to hold this task's CONTROL value. */
-			}
-		}
-		#endif /* configENABLE_MPU */
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    pxTopOfStack--;
+                    *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */
+                }
+            #endif /* configENABLE_TRUSTZONE */
+        }
+    #else /* portPRELOAD_REGISTERS */
+        {
+            pxTopOfStack--;                                          /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+            *pxTopOfStack = portINITIAL_XPSR;                        /* xPSR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxCode;                  /* PC */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x12121212UL;            /* R12 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x03030303UL;            /* R3 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x02020202UL;            /* R2 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x01010101UL;            /* R1 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pvParameters;            /* R0 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x11111111UL;            /* R11 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x10101010UL;            /* R10 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x09090909UL;            /* R09 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x08080808UL;            /* R08 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x07070707UL;            /* R07 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x06060606UL;            /* R06 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x05050505UL;            /* R05 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x04040404UL;            /* R04 */
+            pxTopOfStack--;
+            *pxTopOfStack = portINITIAL_EXC_RETURN;                  /* EXC_RETURN */
 
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxEndOfStack;	/* Slot used to hold this task's PSPLIM value. */
+            #if ( configENABLE_MPU == 1 )
+                {
+                    pxTopOfStack--;
 
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			pxTopOfStack--;
-			*pxTopOfStack = portNO_SECURE_CONTEXT;		/* Slot used to hold this task's xSecureContext value. */
-		}
-		#endif /* configENABLE_TRUSTZONE */
-	}
-	#endif /* portPRELOAD_REGISTERS */
+                    if( xRunPrivileged == pdTRUE )
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                    else
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                }
+            #endif /* configENABLE_MPU */
 
-	return pxTopOfStack;
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */
+
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    pxTopOfStack--;
+                    *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */
+                }
+            #endif /* configENABLE_TRUSTZONE */
+        }
+    #endif /* portPRELOAD_REGISTERS */
+
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
 {
-	/* Make PendSV, CallSV and SysTick the same priority as the kernel. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+    /* Make PendSV, CallSV and SysTick the same priority as the kernel. */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
-	#if( configENABLE_MPU == 1 )
-	{
-		/* Setup the Memory Protection Unit (MPU). */
-		prvSetupMPU();
-	}
-	#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        {
+            /* Setup the Memory Protection Unit (MPU). */
+            prvSetupMPU();
+        }
+    #endif /* configENABLE_MPU */
 
-	/* Start the timer that generates the tick ISR. Interrupts are disabled
-	 * here already. */
-	vPortSetupTimerInterrupt();
+    /* Start the timer that generates the tick ISR. Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
 
-	/* Initialize the critical nesting count ready for the first task. */
-	ulCriticalNesting = 0;
+    /* Initialize the critical nesting count ready for the first task. */
+    ulCriticalNesting = 0;
 
-	/* Start the first task. */
-	vStartFirstTask();
+    /* Start the first task. */
+    vStartFirstTask();
 
-	/* Should never get here as the tasks will now be executing. Call the task
-	 * exit error function to prevent compiler warnings about a static function
-	 * not being called in the case that the application writer overrides this
-	 * functionality by defining configTASK_RETURN_ADDRESS. Call
-	 * vTaskSwitchContext() so link time optimization does not remove the
-	 * symbol. */
-	vTaskSwitchContext();
-	prvTaskExitError();
+    /* Should never get here as the tasks will now be executing. Call the task
+     * exit error function to prevent compiler warnings about a static function
+     * not being called in the case that the application writer overrides this
+     * functionality by defining configTASK_RETURN_ADDRESS. Call
+     * vTaskSwitchContext() so link time optimization does not remove the
+     * symbol. */
+    vTaskSwitchContext();
+    prvTaskExitError();
 
-	/* Should not get here. */
-	return 0;
+    /* Should not get here. */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
 {
-	/* Not implemented in ports where there is nothing to return to.
-	 * Artificially force an assert. */
-	configASSERT( ulCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( ulCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t ulStackDepth )
-	{
-	uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
-	int32_t lIndex = 0;
+#if ( configENABLE_MPU == 1 )
+    void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
+                                    const struct xMEMORY_REGION * const xRegions,
+                                    StackType_t * pxBottomOfStack,
+                                    uint32_t ulStackDepth )
+    {
+        uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
+        int32_t lIndex = 0;
 
-		/* Setup MAIR0. */
-		xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
-		xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
+        #if defined( __ARMCC_VERSION )
 
-		/* This function is called automatically when the task is created - in
-		 * which case the stack region parameters will be valid.  At all other
-		 * times the stack parameters will not be valid and it is assumed that
-		 * the stack region has already been configured. */
-		if( ulStackDepth > 0 )
-		{
-			/* Define the region that allows access to the stack. */
-			ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK;
-			ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1;
-			ulRegionEndAddress  &= portMPU_RLAR_ADDRESS_MASK;
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __privileged_sram_start__;
+            extern uint32_t * __privileged_sram_end__;
+        #else
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __privileged_sram_start__[];
+            extern uint32_t __privileged_sram_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
 
-			xMPUSettings->xRegionsSettings[ 0 ].ulRBAR =	( ulRegionStartAddress ) |
-															( portMPU_REGION_NON_SHAREABLE ) |
-															( portMPU_REGION_READ_WRITE ) |
-															( portMPU_REGION_EXECUTE_NEVER );
+        /* Setup MAIR0. */
+        xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
+        xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
 
-			xMPUSettings->xRegionsSettings[ 0 ].ulRLAR =	( ulRegionEndAddress ) |
-															( portMPU_RLAR_ATTR_INDEX0 ) |
-															( portMPU_RLAR_REGION_ENABLE );
-		}
+        /* This function is called automatically when the task is created - in
+         * which case the stack region parameters will be valid.  At all other
+         * times the stack parameters will not be valid and it is assumed that
+         * the stack region has already been configured. */
+        if( ulStackDepth > 0 )
+        {
+            ulRegionStartAddress = ( uint32_t ) pxBottomOfStack;
+            ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1;
 
-		/* User supplied configurable regions. */
-		for( ulRegionNumber = 1; ulRegionNumber <= portNUM_CONFIGURABLE_REGIONS; ulRegionNumber++ )
-		{
-			/* If xRegions is NULL i.e. the task has not specified any MPU
-			 * region, the else part ensures that all the configurable MPU
-			 * regions are invalidated. */
-			if( ( xRegions != NULL ) && ( xRegions[ lIndex ].ulLengthInBytes > 0UL ) )
-			{
-				/* Translate the generic region definition contained in xRegions
-				 * into the ARMv8 specific MPU settings that are then stored in
-				 * xMPUSettings. */
-				ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK;
-				ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1;
-				ulRegionEndAddress  &= portMPU_RLAR_ADDRESS_MASK;
+            /* If the stack is within the privileged SRAM, do not protect it
+             * using a separate MPU region. This is needed because privileged
+             * SRAM is already protected using an MPU region and ARMv8-M does
+             * not allow overlapping MPU regions. */
+            if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
+                ( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
+            {
+                xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
+                xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;
+            }
+            else
+            {
+                /* Define the region that allows access to the stack. */
+                ulRegionStartAddress &= portMPU_RBAR_ADDRESS_MASK;
+                ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK;
 
-				/* Start address. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR =	( ulRegionStartAddress ) |
-																			( portMPU_REGION_NON_SHAREABLE );
+                xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) |
+                                                             ( portMPU_REGION_NON_SHAREABLE ) |
+                                                             ( portMPU_REGION_READ_WRITE ) |
+                                                             ( portMPU_REGION_EXECUTE_NEVER );
 
-				/* RO/RW. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_READ_ONLY ) != 0 )
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_ONLY );
-				}
-				else
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_WRITE );
-				}
+                xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = ( ulRegionEndAddress ) |
+                                                             ( portMPU_RLAR_ATTR_INDEX0 ) |
+                                                             ( portMPU_RLAR_REGION_ENABLE );
+            }
+        }
 
-				/* XN. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_EXECUTE_NEVER ) != 0 )
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_EXECUTE_NEVER );
-				}
+        /* User supplied configurable regions. */
+        for( ulRegionNumber = 1; ulRegionNumber <= portNUM_CONFIGURABLE_REGIONS; ulRegionNumber++ )
+        {
+            /* If xRegions is NULL i.e. the task has not specified any MPU
+             * region, the else part ensures that all the configurable MPU
+             * regions are invalidated. */
+            if( ( xRegions != NULL ) && ( xRegions[ lIndex ].ulLengthInBytes > 0UL ) )
+            {
+                /* Translate the generic region definition contained in xRegions
+                 * into the ARMv8 specific MPU settings that are then stored in
+                 * xMPUSettings. */
+                ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK;
+                ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1;
+                ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK;
 
-				/* End Address. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR =	( ulRegionEndAddress ) |
-																			( portMPU_RLAR_REGION_ENABLE );
+                /* Start address. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = ( ulRegionStartAddress ) |
+                                                                          ( portMPU_REGION_NON_SHAREABLE );
 
-				/* Normal memory/ Device memory. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
-				{
-					/* Attr1 in MAIR0 is configured as device memory. */
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX1;
-				}
-				else
-				{
-					/* Attr1 in MAIR0 is configured as normal memory. */
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
-				}
-			}
-			else
-			{
-				/* Invalidate the region. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = 0UL;
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = 0UL;
-			}
+                /* RO/RW. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_READ_ONLY ) != 0 )
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_ONLY );
+                }
+                else
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_WRITE );
+                }
 
-			lIndex++;
-		}
-	}
+                /* XN. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_EXECUTE_NEVER ) != 0 )
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_EXECUTE_NEVER );
+                }
+
+                /* End Address. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
+                                                                          ( portMPU_RLAR_REGION_ENABLE );
+
+                /* Normal memory/ Device memory. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
+                {
+                    /* Attr1 in MAIR0 is configured as device memory. */
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX1;
+                }
+                else
+                {
+                    /* Attr1 in MAIR0 is configured as normal memory. */
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
+                }
+            }
+            else
+            {
+                /* Invalidate the region. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = 0UL;
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = 0UL;
+            }
+
+            lIndex++;
+        }
+    }
 #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 BaseType_t xPortIsInsideInterrupt( void )
 {
-uint32_t ulCurrentInterrupt;
-BaseType_t xReturn;
+    uint32_t ulCurrentInterrupt;
+    BaseType_t xReturn;
 
-	/* Obtain the number of the currently executing interrupt. Interrupt Program
-	 * Status Register (IPSR) holds the exception number of the currently-executing
-	 * exception or zero for Thread mode.*/
-	__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+    /* Obtain the number of the currently executing interrupt. Interrupt Program
+     * Status Register (IPSR) holds the exception number of the currently-executing
+     * exception or zero for Thread mode.*/
+    __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
-	if( ulCurrentInterrupt == 0 )
-	{
-		xReturn = pdFALSE;
-	}
-	else
-	{
-		xReturn = pdTRUE;
-	}
+    if( ulCurrentInterrupt == 0 )
+    {
+        xReturn = pdFALSE;
+    }
+    else
+    {
+        xReturn = pdTRUE;
+    }
 
-	return xReturn;
+    return xReturn;
 }
-/*-----------------------------------------------------------*/
\ No newline at end of file
+/*-----------------------------------------------------------*/
diff --git a/portable/GCC/ARM_CM23/non_secure/portasm.c b/portable/GCC/ARM_CM23/non_secure/portasm.c
index 1c649a182..5f9bcd897 100644
--- a/portable/GCC/ARM_CM23/non_secure/portasm.c
+++ b/portable/GCC/ARM_CM23/non_secure/portasm.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -39,415 +39,415 @@
  * header files. */
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
-#if( configENABLE_FPU == 1 )
-	#error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
+#if ( configENABLE_FPU == 1 )
+    #error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
 #endif
 
 void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	.syntax unified									\n"
-	"													\n"
-	"	ldr  r2, pxCurrentTCBConst2						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr  r3, [r2]									\n" /* Read pxCurrentTCB. */
-	"	ldr  r0, [r3]									\n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	dmb												\n" /* Complete outstanding transfers before disabling MPU. */
-	"	ldr r2, xMPUCTRLConst2							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	movs r5, #1										\n" /* r5 = 1. */
-	"	bics r4, r5										\n" /* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Disable MPU. */
-	"													\n"
-	"	adds r3, #4										\n" /* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
-	"	ldr  r4, [r3]									\n" /* r4 = *r3 i.e. r4 = MAIR0. */
-	"	ldr  r2, xMAIR0Const2							\n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-	"	str  r4, [r2]									\n" /* Program MAIR0. */
-	"	ldr  r2, xRNRConst2								\n" /* r2 = 0xe000ed98 [Location of RNR]. */
-	"	adds r3, #4										\n" /* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
-	"	movs r5, #4										\n" /* r5 = 4. */
-	"	str  r5, [r2]									\n" /* Program RNR = 4. */
-	"	ldmia r3!, {r6,r7}								\n" /* Read first set of RBAR/RLAR from TCB. */
-	"	ldr  r4, xRBARConst2							\n" /* r4 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r4!, {r6,r7}								\n" /* Write first set of RBAR/RLAR registers. */
-	"	movs r5, #5										\n" /* r5 = 5. */
-	"	str  r5, [r2]									\n" /* Program RNR = 5. */
-	"	ldmia r3!, {r6,r7}								\n" /* Read second set of RBAR/RLAR from TCB. */
-	"	ldr  r4, xRBARConst2							\n" /* r4 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r4!, {r6,r7}								\n" /* Write second set of RBAR/RLAR registers. */
-	"	movs r5, #6										\n" /* r5 = 6. */
-	"	str  r5, [r2]									\n" /* Program RNR = 6. */
-	"	ldmia r3!, {r6,r7}								\n" /* Read third set of RBAR/RLAR from TCB. */
-	"	ldr  r4, xRBARConst2							\n" /* r4 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r4!, {r6,r7}								\n" /* Write third set of RBAR/RLAR registers. */
-	"	movs r5, #7										\n" /* r5 = 7. */
-	"	str  r5, [r2]									\n" /* Program RNR = 7. */
-	"	ldmia r3!, {r6,r7}								\n" /* Read fourth set of RBAR/RLAR from TCB. */
-	"	ldr  r4, xRBARConst2							\n" /* r4 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r4!, {r6,r7}								\n" /* Write fourth set of RBAR/RLAR registers. */
-	"													\n"
-	"	ldr r2, xMPUCTRLConst2							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	movs r5, #1										\n" /* r5 = 1. */
-	"	orrs r4, r5										\n" /* r4 = r4 | r5 i.e. Set the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Enable MPU. */
-	"	dsb												\n" /* Force memory writes before continuing. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	ldm  r0!, {r1-r4}								\n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */
-	"	ldr  r5, xSecureContextConst2					\n"
-	"	str  r1, [r5]									\n" /* Set xSecureContext to this task's value for the same. */
-	"	msr  psplim, r2									\n" /* Set this task's PSPLIM value. */
-	"	msr  control, r3								\n" /* Set this task's CONTROL value. */
-	"	adds r0, #32									\n" /* Discard everything up to r0. */
-	"	msr  psp, r0									\n" /* This is now the new top of stack to use in the task. */
-	"	isb												\n"
-	"	bx   r4											\n" /* Finally, branch to EXC_RETURN. */
-	#else /* configENABLE_MPU */
-	"	ldm  r0!, {r1-r3}								\n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
-	"	ldr  r4, xSecureContextConst2					\n"
-	"	str  r1, [r4]									\n" /* Set xSecureContext to this task's value for the same. */
-	"	msr  psplim, r2									\n" /* Set this task's PSPLIM value. */
-	"	movs r1, #2										\n" /* r1 = 2. */
-	"	msr  CONTROL, r1								\n" /* Switch to use PSP in the thread mode. */
-	"	adds r0, #32									\n" /* Discard everything up to r0. */
-	"	msr  psp, r0									\n" /* This is now the new top of stack to use in the task. */
-	"	isb												\n"
-	"	bx   r3											\n" /* Finally, branch to EXC_RETURN. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	"	.align 4										\n"
-	"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
-	"xSecureContextConst2: .word xSecureContext			\n"
-	#if( configENABLE_MPU == 1 )
-	"xMPUCTRLConst2: .word 0xe000ed94					\n"
-	"xMAIR0Const2: .word 0xe000edc0						\n"
-	"xRNRConst2: .word 0xe000ed98						\n"
-	"xRBARConst2: .word 0xe000ed9c						\n"
-	#endif /* configENABLE_MPU */
-	);
+    __asm volatile
+    (
+        "	.syntax unified									\n"
+        "													\n"
+        "	ldr  r2, pxCurrentTCBConst2						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr  r3, [r2]									\n"/* Read pxCurrentTCB. */
+        "	ldr  r0, [r3]									\n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	dmb												\n"/* Complete outstanding transfers before disabling MPU. */
+            "	ldr r2, xMPUCTRLConst2							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	movs r5, #1										\n"/* r5 = 1. */
+            "	bics r4, r5										\n"/* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */
+            "	str r4, [r2]									\n"/* Disable MPU. */
+            "													\n"
+            "	adds r3, #4										\n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
+            "	ldr  r4, [r3]									\n"/* r4 = *r3 i.e. r4 = MAIR0. */
+            "	ldr  r2, xMAIR0Const2							\n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "	str  r4, [r2]									\n"/* Program MAIR0. */
+            "	ldr  r2, xRNRConst2								\n"/* r2 = 0xe000ed98 [Location of RNR]. */
+            "	adds r3, #4										\n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
+            "	movs r5, #4										\n"/* r5 = 4. */
+            "	str  r5, [r2]									\n"/* Program RNR = 4. */
+            "	ldmia r3!, {r6,r7}								\n"/* Read first set of RBAR/RLAR from TCB. */
+            "	ldr  r4, xRBARConst2							\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r4!, {r6,r7}								\n"/* Write first set of RBAR/RLAR registers. */
+            "	movs r5, #5										\n"/* r5 = 5. */
+            "	str  r5, [r2]									\n"/* Program RNR = 5. */
+            "	ldmia r3!, {r6,r7}								\n"/* Read second set of RBAR/RLAR from TCB. */
+            "	ldr  r4, xRBARConst2							\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r4!, {r6,r7}								\n"/* Write second set of RBAR/RLAR registers. */
+            "	movs r5, #6										\n"/* r5 = 6. */
+            "	str  r5, [r2]									\n"/* Program RNR = 6. */
+            "	ldmia r3!, {r6,r7}								\n"/* Read third set of RBAR/RLAR from TCB. */
+            "	ldr  r4, xRBARConst2							\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r4!, {r6,r7}								\n"/* Write third set of RBAR/RLAR registers. */
+            "	movs r5, #7										\n"/* r5 = 7. */
+            "	str  r5, [r2]									\n"/* Program RNR = 7. */
+            "	ldmia r3!, {r6,r7}								\n"/* Read fourth set of RBAR/RLAR from TCB. */
+            "	ldr  r4, xRBARConst2							\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r4!, {r6,r7}								\n"/* Write fourth set of RBAR/RLAR registers. */
+            "													\n"
+            "	ldr r2, xMPUCTRLConst2							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	movs r5, #1										\n"/* r5 = 1. */
+            "	orrs r4, r5										\n"/* r4 = r4 | r5 i.e. Set the bit 0 in r4. */
+            "	str r4, [r2]									\n"/* Enable MPU. */
+            "	dsb												\n"/* Force memory writes before continuing. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	ldm  r0!, {r1-r4}								\n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */
+            "	ldr  r5, xSecureContextConst2					\n"
+            "	str  r1, [r5]									\n"/* Set xSecureContext to this task's value for the same. */
+            "	msr  psplim, r2									\n"/* Set this task's PSPLIM value. */
+            "	msr  control, r3								\n"/* Set this task's CONTROL value. */
+            "	adds r0, #32									\n"/* Discard everything up to r0. */
+            "	msr  psp, r0									\n"/* This is now the new top of stack to use in the task. */
+            "	isb												\n"
+            "	bx   r4											\n"/* Finally, branch to EXC_RETURN. */
+        #else /* configENABLE_MPU */
+            "	ldm  r0!, {r1-r3}								\n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
+            "	ldr  r4, xSecureContextConst2					\n"
+            "	str  r1, [r4]									\n"/* Set xSecureContext to this task's value for the same. */
+            "	msr  psplim, r2									\n"/* Set this task's PSPLIM value. */
+            "	movs r1, #2										\n"/* r1 = 2. */
+            "	msr  CONTROL, r1								\n"/* Switch to use PSP in the thread mode. */
+            "	adds r0, #32									\n"/* Discard everything up to r0. */
+            "	msr  psp, r0									\n"/* This is now the new top of stack to use in the task. */
+            "	isb												\n"
+            "	bx   r3											\n"/* Finally, branch to EXC_RETURN. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        "	.align 4										\n"
+        "pxCurrentTCBConst2: .word pxCurrentTCB				\n"
+        "xSecureContextConst2: .word xSecureContext			\n"
+        #if ( configENABLE_MPU == 1 )
+            "xMPUCTRLConst2: .word 0xe000ed94					\n"
+            "xMAIR0Const2: .word 0xe000edc0						\n"
+            "xRNRConst2: .word 0xe000ed98						\n"
+            "xRBARConst2: .word 0xe000ed9c						\n"
+        #endif /* configENABLE_MPU */
+    );
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
 {
-	__asm volatile
-	(
-	"	mrs r0, control									\n" /* r0 = CONTROL. */
-	"	movs r1, #1										\n" /* r1 = 1. */
-	"	tst r0, r1										\n" /* Perform r0 & r1 (bitwise AND) and update the conditions flag. */
-	"	beq running_privileged							\n" /* If the result of previous AND operation was 0, branch. */
-	"	movs r0, #0										\n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
-	"	bx lr											\n" /* Return. */
-	" running_privileged:								\n"
-	"	movs r0, #1										\n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
-	"	bx lr											\n" /* Return. */
-	"													\n"
-	"	.align 4										\n"
-	::: "r0", "r1", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, control									\n"/* r0 = CONTROL. */
+        "	movs r1, #1										\n"/* r1 = 1. */
+        "	tst r0, r1										\n"/* Perform r0 & r1 (bitwise AND) and update the conditions flag. */
+        "	beq running_privileged							\n"/* If the result of previous AND operation was 0, branch. */
+        "	movs r0, #0										\n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
+        "	bx lr											\n"/* Return. */
+        " running_privileged:								\n"
+        "	movs r0, #1										\n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
+        "	bx lr											\n"/* Return. */
+        "													\n"
+        "	.align 4										\n"
+        ::: "r0", "r1", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	 __asm volatile
-	(
-	"	mrs r0, control									\n" /* Read the CONTROL register. */
-	"	movs r1, #1										\n" /* r1 = 1. */
-	"	bics r0, r1										\n" /* Clear the bit 0. */
-	"	msr control, r0									\n" /* Write back the new CONTROL value. */
-	"	bx lr											\n" /* Return to the caller. */
-	::: "r0", "r1", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, control									\n"/* Read the CONTROL register. */
+        "	movs r1, #1										\n"/* r1 = 1. */
+        "	bics r0, r1										\n"/* Clear the bit 0. */
+        "	msr control, r0									\n"/* Write back the new CONTROL value. */
+        "	bx lr											\n"/* Return to the caller. */
+        ::: "r0", "r1", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vResetPrivilege( void ) /* __attribute__ (( naked )) */
 {
-	__asm volatile
-	(
-	"	mrs r0, control									\n" /* r0 = CONTROL. */
-	"	movs r1, #1										\n" /* r1 = 1. */
-	"	orrs r0, r1										\n" /* r0 = r0 | r1. */
-	"	msr control, r0									\n" /* CONTROL = r0. */
-	"	bx lr											\n" /* Return to the caller. */
-	:::"r0", "r1", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, control									\n"/* r0 = CONTROL. */
+        "	movs r1, #1										\n"/* r1 = 1. */
+        "	orrs r0, r1										\n"/* r0 = r0 | r1. */
+        "	msr control, r0									\n"/* CONTROL = r0. */
+        "	bx lr											\n"/* Return to the caller. */
+        ::: "r0", "r1", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	ldr r0, xVTORConst								\n" /* Use the NVIC offset register to locate the stack. */
-	"	ldr r0, [r0]									\n" /* Read the VTOR register which gives the address of vector table. */
-	"	ldr r0, [r0]									\n" /* The first entry in vector table is stack pointer. */
-	"	msr msp, r0										\n" /* Set the MSP back to the start of the stack. */
-	"	cpsie i											\n" /* Globally enable interrupts. */
-	"	dsb												\n"
-	"	isb												\n"
-	"	svc %0											\n" /* System call to start the first task. */
-	"	nop												\n"
-	"													\n"
-	"   .align 4										\n"
-	"xVTORConst: .word 0xe000ed08						\n"
-	:: "i" ( portSVC_START_SCHEDULER ) : "memory"
-	);
+    __asm volatile
+    (
+        "	ldr r0, xVTORConst								\n"/* Use the NVIC offset register to locate the stack. */
+        "	ldr r0, [r0]									\n"/* Read the VTOR register which gives the address of vector table. */
+        "	ldr r0, [r0]									\n"/* The first entry in vector table is stack pointer. */
+        "	msr msp, r0										\n"/* Set the MSP back to the start of the stack. */
+        "	cpsie i											\n"/* Globally enable interrupts. */
+        "	dsb												\n"
+        "	isb												\n"
+        "	svc %0											\n"/* System call to start the first task. */
+        "	nop												\n"
+        "													\n"
+        "   .align 4										\n"
+        "xVTORConst: .word 0xe000ed08						\n"
+        ::"i" ( portSVC_START_SCHEDULER ) : "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	mrs r0, PRIMASK									\n"
-	"	cpsid i											\n"
-	"	bx lr											\n"
-	::: "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, PRIMASK									\n"
+        "	cpsid i											\n"
+        "	bx lr											\n"
+        ::: "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	msr PRIMASK, r0									\n"
-	"	bx lr											\n"
-	::: "memory"
-	);
+    __asm volatile
+    (
+        "	msr PRIMASK, r0									\n"
+        "	bx lr											\n"
+        ::: "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	.syntax unified									\n"
-	"	.extern SecureContext_SaveContext				\n"
-	"	.extern SecureContext_LoadContext				\n"
-	"													\n"
-	"	mrs r1, psp										\n" /* Read PSP in r1. */
-	"	ldr r2, xSecureContextConst						\n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
-	"	ldr r0, [r2]									\n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
-	"													\n"
-	"	cbz r0, save_ns_context							\n" /* No secure context to save. */
-	"	push {r0-r2, r14}								\n"
-	"	bl SecureContext_SaveContext					\n"
-	"	pop {r0-r3}										\n" /* LR is now in r3. */
-	"	mov lr, r3										\n" /* LR = r3. */
-	"	lsls r2, r3, #25								\n" /* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-	"	bpl save_ns_context								\n" /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-	"	ldr r3, pxCurrentTCBConst						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr r2, [r3]									\n" /* Read pxCurrentTCB. */
-	#if( configENABLE_MPU == 1 )
-	"	subs r1, r1, #16								\n" /* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
-	"	str r1, [r2]									\n" /* Save the new top of stack in TCB. */
-	"	mrs r2, psplim									\n" /* r2 = PSPLIM. */
-	"	mrs r3, control									\n" /* r3 = CONTROL. */
-	"	mov r4, lr										\n" /* r4 = LR/EXC_RETURN. */
-	"	stmia r1!, {r0, r2-r4}							\n" /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
-	#else /* configENABLE_MPU */
-	"	subs r1, r1, #12								\n" /* Make space for xSecureContext, PSPLIM and LR on the stack. */
-	"	str r1, [r2]									\n" /* Save the new top of stack in TCB. */
-	"	mrs r2, psplim									\n" /* r2 = PSPLIM. */
-	"	mov r3, lr										\n" /* r3 = LR/EXC_RETURN. */
-	"	stmia r1!, {r0, r2-r3}							\n" /* Store xSecureContext, PSPLIM and LR on the stack. */
-	#endif /* configENABLE_MPU */
-	"	b select_next_task								\n"
-	"													\n"
-	" save_ns_context:									\n"
-	"	ldr r3, pxCurrentTCBConst						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr r2, [r3]									\n" /* Read pxCurrentTCB. */
-	#if( configENABLE_MPU == 1 )
-	"	subs r1, r1, #48								\n" /* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
-	"	str r1, [r2]									\n" /* Save the new top of stack in TCB. */
-	"	adds r1, r1, #16								\n" /* r1 = r1 + 16. */
-	"	stmia r1!, {r4-r7}								\n" /* Store the low registers that are not saved automatically. */
-	"	mov r4, r8										\n" /* r4 = r8. */
-	"	mov r5, r9										\n" /* r5 = r9. */
-	"	mov r6, r10										\n" /* r6 = r10. */
-	"	mov r7, r11										\n" /* r7 = r11. */
-	"	stmia r1!, {r4-r7}								\n" /* Store the high registers that are not saved automatically. */
-	"	mrs r2, psplim									\n" /* r2 = PSPLIM. */
-	"	mrs r3, control									\n" /* r3 = CONTROL. */
-	"	mov r4, lr										\n" /* r4 = LR/EXC_RETURN. */
-	"	subs r1, r1, #48								\n" /* r1 = r1 - 48. */
-	"	stmia r1!, {r0, r2-r4}							\n" /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
-	#else /* configENABLE_MPU */
-	"	subs r1, r1, #44								\n" /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
-	"	str r1, [r2]									\n" /* Save the new top of stack in TCB. */
-	"	mrs r2, psplim									\n" /* r2 = PSPLIM. */
-	"	mov r3, lr										\n" /* r3 = LR/EXC_RETURN. */
-	"	stmia r1!, {r0, r2-r7}							\n" /* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */
-	"	mov r4, r8										\n" /* r4 = r8. */
-	"	mov r5, r9										\n" /* r5 = r9. */
-	"	mov r6, r10										\n" /* r6 = r10. */
-	"	mov r7, r11										\n" /* r7 = r11. */
-	"	stmia r1!, {r4-r7}								\n" /* Store the high registers that are not saved automatically. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	" select_next_task:									\n"
-	"	cpsid i											\n"
-	"	bl vTaskSwitchContext							\n"
-	"	cpsie i											\n"
-	"													\n"
-	"	ldr r2, pxCurrentTCBConst						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr r3, [r2]									\n" /* Read pxCurrentTCB. */
-	"	ldr r1, [r3]									\n" /* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	dmb												\n" /* Complete outstanding transfers before disabling MPU. */
-	"	ldr r2, xMPUCTRLConst							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	movs r5, #1										\n" /* r5 = 1. */
-	"	bics r4, r5										\n" /* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Disable MPU. */
-	"													\n"
-	"	adds r3, #4										\n" /* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
-	"	ldr r4, [r3]									\n" /* r4 = *r3 i.e. r4 = MAIR0. */
-	"	ldr r2, xMAIR0Const								\n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-	"	str r4, [r2]									\n" /* Program MAIR0. */
-	"	ldr r2, xRNRConst								\n" /* r2 = 0xe000ed98 [Location of RNR]. */
-	"	adds r3, #4										\n" /* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
-	"	movs r5, #4										\n" /* r5 = 4. */
-	"	str  r5, [r2]									\n" /* Program RNR = 4. */
-	"	ldmia r3!, {r6,r7}								\n" /* Read first set of RBAR/RLAR from TCB. */
-	"	ldr  r4, xRBARConst								\n" /* r4 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r4!, {r6,r7}								\n" /* Write first set of RBAR/RLAR registers. */
-	"	movs r5, #5										\n" /* r5 = 5. */
-	"	str  r5, [r2]									\n" /* Program RNR = 5. */
-	"	ldmia r3!, {r6,r7}								\n" /* Read second set of RBAR/RLAR from TCB. */
-	"	ldr  r4, xRBARConst								\n" /* r4 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r4!, {r6,r7}								\n" /* Write second set of RBAR/RLAR registers. */
-	"	movs r5, #6										\n" /* r5 = 6. */
-	"	str  r5, [r2]									\n" /* Program RNR = 6. */
-	"	ldmia r3!, {r6,r7}								\n" /* Read third set of RBAR/RLAR from TCB. */
-	"	ldr  r4, xRBARConst								\n" /* r4 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r4!, {r6,r7}								\n" /* Write third set of RBAR/RLAR registers. */
-	"	movs r5, #7										\n" /* r5 = 7. */
-	"	str  r5, [r2]									\n" /* Program RNR = 7. */
-	"	ldmia r3!, {r6,r7}								\n" /* Read fourth set of RBAR/RLAR from TCB. */
-	"	ldr  r4, xRBARConst								\n" /* r4 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r4!, {r6,r7}								\n" /* Write fourth set of RBAR/RLAR registers. */
-	"													\n"
-	"	ldr r2, xMPUCTRLConst							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	movs r5, #1										\n" /* r5 = 1. */
-	"	orrs r4, r5										\n" /* r4 = r4 | r5 i.e. Set the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Enable MPU. */
-	"	dsb												\n" /* Force memory writes before continuing. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	ldmia r1!, {r0, r2-r4}							\n" /* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */
-	"	msr psplim, r2									\n" /* Restore the PSPLIM register value for the task. */
-	"	msr control, r3									\n" /* Restore the CONTROL register value for the task. */
-	"	mov lr, r4										\n" /* LR = r4. */
-	"	ldr r2, xSecureContextConst						\n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
-	"	str r0, [r2]									\n" /* Restore the task's xSecureContext. */
-	"	cbz r0, restore_ns_context						\n" /* If there is no secure context for the task, restore the non-secure context. */
-	"	push {r1,r4}									\n"
-	"	bl SecureContext_LoadContext					\n" /* Restore the secure context. */
-	"	pop {r1,r4}										\n"
-	"	mov lr, r4										\n" /* LR = r4. */
-	"	lsls r2, r4, #25								\n" /* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-	"	bpl restore_ns_context							\n" /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-	"	msr psp, r1										\n" /* Remember the new top of stack for the task. */
-	"	bx lr											\n"
-	#else /* configENABLE_MPU */
-	"	ldmia r1!, {r0, r2-r3}							\n" /* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */
-	"	msr psplim, r2									\n" /* Restore the PSPLIM register value for the task. */
-	"	mov lr, r3										\n" /* LR = r3. */
-	"	ldr r2, xSecureContextConst						\n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
-	"	str r0, [r2]									\n" /* Restore the task's xSecureContext. */
-	"	cbz r0, restore_ns_context						\n" /* If there is no secure context for the task, restore the non-secure context. */
-	"	push {r1,r3}									\n"
-	"	bl SecureContext_LoadContext					\n" /* Restore the secure context. */
-	"	pop {r1,r3}										\n"
-	"	mov lr, r3										\n" /* LR = r3. */
-	"	lsls r2, r3, #25								\n" /* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-	"	bpl restore_ns_context							\n" /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-	"	msr psp, r1										\n" /* Remember the new top of stack for the task. */
-	"	bx lr											\n"
-	#endif /* configENABLE_MPU */
-	"													\n"
-	" restore_ns_context:								\n"
-	"	adds r1, r1, #16								\n" /* Move to the high registers. */
-	"	ldmia r1!, {r4-r7}								\n" /* Restore the high registers that are not automatically restored. */
-	"	mov r8, r4										\n" /* r8 = r4. */
-	"	mov r9, r5										\n" /* r9 = r5. */
-	"	mov r10, r6										\n" /* r10 = r6. */
-	"	mov r11, r7										\n" /* r11 = r7. */
-	"	msr psp, r1										\n" /* Remember the new top of stack for the task. */
-	"	subs r1, r1, #32								\n" /* Go back to the low registers. */
-	"	ldmia r1!, {r4-r7}								\n" /* Restore the low registers that are not automatically restored. */
-	"	bx lr											\n"
-	"													\n"
-	"	.align 4										\n"
-	"pxCurrentTCBConst: .word pxCurrentTCB				\n"
-	"xSecureContextConst: .word xSecureContext			\n"
-	#if( configENABLE_MPU == 1 )
-	"xMPUCTRLConst: .word 0xe000ed94					\n"
-	"xMAIR0Const: .word 0xe000edc0						\n"
-	"xRNRConst: .word 0xe000ed98						\n"
-	"xRBARConst: .word 0xe000ed9c						\n"
-	#endif /* configENABLE_MPU */
-	);
+    __asm volatile
+    (
+        "	.syntax unified									\n"
+        "	.extern SecureContext_SaveContext				\n"
+        "	.extern SecureContext_LoadContext				\n"
+        "													\n"
+        "	mrs r1, psp										\n"/* Read PSP in r1. */
+        "	ldr r2, xSecureContextConst						\n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+        "	ldr r0, [r2]									\n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
+        "													\n"
+        "	cbz r0, save_ns_context							\n"/* No secure context to save. */
+        "	push {r0-r2, r14}								\n"
+        "	bl SecureContext_SaveContext					\n"
+        "	pop {r0-r3}										\n"/* LR is now in r3. */
+        "	mov lr, r3										\n"/* LR = r3. */
+        "	lsls r2, r3, #25								\n"/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+        "	bpl save_ns_context								\n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+        "	ldr r3, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr r2, [r3]									\n"/* Read pxCurrentTCB. */
+        #if ( configENABLE_MPU == 1 )
+            "	subs r1, r1, #16								\n"/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
+            "	str r1, [r2]									\n"/* Save the new top of stack in TCB. */
+            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
+            "	mrs r3, control									\n"/* r3 = CONTROL. */
+            "	mov r4, lr										\n"/* r4 = LR/EXC_RETURN. */
+            "	stmia r1!, {r0, r2-r4}							\n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
+        #else /* configENABLE_MPU */
+            "	subs r1, r1, #12								\n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */
+            "	str r1, [r2]									\n"/* Save the new top of stack in TCB. */
+            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
+            "	mov r3, lr										\n"/* r3 = LR/EXC_RETURN. */
+            "	stmia r1!, {r0, r2-r3}							\n"/* Store xSecureContext, PSPLIM and LR on the stack. */
+        #endif /* configENABLE_MPU */
+        "	b select_next_task								\n"
+        "													\n"
+        " save_ns_context:									\n"
+        "	ldr r3, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr r2, [r3]									\n"/* Read pxCurrentTCB. */
+        #if ( configENABLE_MPU == 1 )
+            "	subs r1, r1, #48								\n"/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
+            "	str r1, [r2]									\n"/* Save the new top of stack in TCB. */
+            "	adds r1, r1, #16								\n"/* r1 = r1 + 16. */
+            "	stmia r1!, {r4-r7}								\n"/* Store the low registers that are not saved automatically. */
+            "	mov r4, r8										\n"/* r4 = r8. */
+            "	mov r5, r9										\n"/* r5 = r9. */
+            "	mov r6, r10										\n"/* r6 = r10. */
+            "	mov r7, r11										\n"/* r7 = r11. */
+            "	stmia r1!, {r4-r7}								\n"/* Store the high registers that are not saved automatically. */
+            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
+            "	mrs r3, control									\n"/* r3 = CONTROL. */
+            "	mov r4, lr										\n"/* r4 = LR/EXC_RETURN. */
+            "	subs r1, r1, #48								\n"/* r1 = r1 - 48. */
+            "	stmia r1!, {r0, r2-r4}							\n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
+        #else /* configENABLE_MPU */
+            "	subs r1, r1, #44								\n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
+            "	str r1, [r2]									\n"/* Save the new top of stack in TCB. */
+            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
+            "	mov r3, lr										\n"/* r3 = LR/EXC_RETURN. */
+            "	stmia r1!, {r0, r2-r7}							\n"/* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */
+            "	mov r4, r8										\n"/* r4 = r8. */
+            "	mov r5, r9										\n"/* r5 = r9. */
+            "	mov r6, r10										\n"/* r6 = r10. */
+            "	mov r7, r11										\n"/* r7 = r11. */
+            "	stmia r1!, {r4-r7}								\n"/* Store the high registers that are not saved automatically. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        " select_next_task:									\n"
+        "	cpsid i											\n"
+        "	bl vTaskSwitchContext							\n"
+        "	cpsie i											\n"
+        "													\n"
+        "	ldr r2, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr r3, [r2]									\n"/* Read pxCurrentTCB. */
+        "	ldr r1, [r3]									\n"/* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	dmb												\n"/* Complete outstanding transfers before disabling MPU. */
+            "	ldr r2, xMPUCTRLConst							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	movs r5, #1										\n"/* r5 = 1. */
+            "	bics r4, r5										\n"/* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */
+            "	str r4, [r2]									\n"/* Disable MPU. */
+            "													\n"
+            "	adds r3, #4										\n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
+            "	ldr r4, [r3]									\n"/* r4 = *r3 i.e. r4 = MAIR0. */
+            "	ldr r2, xMAIR0Const								\n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "	str r4, [r2]									\n"/* Program MAIR0. */
+            "	ldr r2, xRNRConst								\n"/* r2 = 0xe000ed98 [Location of RNR]. */
+            "	adds r3, #4										\n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
+            "	movs r5, #4										\n"/* r5 = 4. */
+            "	str  r5, [r2]									\n"/* Program RNR = 4. */
+            "	ldmia r3!, {r6,r7}								\n"/* Read first set of RBAR/RLAR from TCB. */
+            "	ldr  r4, xRBARConst								\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r4!, {r6,r7}								\n"/* Write first set of RBAR/RLAR registers. */
+            "	movs r5, #5										\n"/* r5 = 5. */
+            "	str  r5, [r2]									\n"/* Program RNR = 5. */
+            "	ldmia r3!, {r6,r7}								\n"/* Read second set of RBAR/RLAR from TCB. */
+            "	ldr  r4, xRBARConst								\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r4!, {r6,r7}								\n"/* Write second set of RBAR/RLAR registers. */
+            "	movs r5, #6										\n"/* r5 = 6. */
+            "	str  r5, [r2]									\n"/* Program RNR = 6. */
+            "	ldmia r3!, {r6,r7}								\n"/* Read third set of RBAR/RLAR from TCB. */
+            "	ldr  r4, xRBARConst								\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r4!, {r6,r7}								\n"/* Write third set of RBAR/RLAR registers. */
+            "	movs r5, #7										\n"/* r5 = 7. */
+            "	str  r5, [r2]									\n"/* Program RNR = 7. */
+            "	ldmia r3!, {r6,r7}								\n"/* Read fourth set of RBAR/RLAR from TCB. */
+            "	ldr  r4, xRBARConst								\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r4!, {r6,r7}								\n"/* Write fourth set of RBAR/RLAR registers. */
+            "													\n"
+            "	ldr r2, xMPUCTRLConst							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	movs r5, #1										\n"/* r5 = 1. */
+            "	orrs r4, r5										\n"/* r4 = r4 | r5 i.e. Set the bit 0 in r4. */
+            "	str r4, [r2]									\n"/* Enable MPU. */
+            "	dsb												\n"/* Force memory writes before continuing. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	ldmia r1!, {r0, r2-r4}							\n"/* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */
+            "	msr psplim, r2									\n"/* Restore the PSPLIM register value for the task. */
+            "	msr control, r3									\n"/* Restore the CONTROL register value for the task. */
+            "	mov lr, r4										\n"/* LR = r4. */
+            "	ldr r2, xSecureContextConst						\n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            "	str r0, [r2]									\n"/* Restore the task's xSecureContext. */
+            "	cbz r0, restore_ns_context						\n"/* If there is no secure context for the task, restore the non-secure context. */
+            "	push {r1,r4}									\n"
+            "	bl SecureContext_LoadContext					\n"/* Restore the secure context. */
+            "	pop {r1,r4}										\n"
+            "	mov lr, r4										\n"/* LR = r4. */
+            "	lsls r2, r4, #25								\n"/* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+            "	bpl restore_ns_context							\n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+            "	msr psp, r1										\n"/* Remember the new top of stack for the task. */
+            "	bx lr											\n"
+        #else /* configENABLE_MPU */
+            "	ldmia r1!, {r0, r2-r3}							\n"/* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */
+            "	msr psplim, r2									\n"/* Restore the PSPLIM register value for the task. */
+            "	mov lr, r3										\n"/* LR = r3. */
+            "	ldr r2, xSecureContextConst						\n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            "	str r0, [r2]									\n"/* Restore the task's xSecureContext. */
+            "	cbz r0, restore_ns_context						\n"/* If there is no secure context for the task, restore the non-secure context. */
+            "	push {r1,r3}									\n"
+            "	bl SecureContext_LoadContext					\n"/* Restore the secure context. */
+            "	pop {r1,r3}										\n"
+            "	mov lr, r3										\n"/* LR = r3. */
+            "	lsls r2, r3, #25								\n"/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+            "	bpl restore_ns_context							\n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+            "	msr psp, r1										\n"/* Remember the new top of stack for the task. */
+            "	bx lr											\n"
+        #endif /* configENABLE_MPU */
+        "													\n"
+        " restore_ns_context:								\n"
+        "	adds r1, r1, #16								\n"/* Move to the high registers. */
+        "	ldmia r1!, {r4-r7}								\n"/* Restore the high registers that are not automatically restored. */
+        "	mov r8, r4										\n"/* r8 = r4. */
+        "	mov r9, r5										\n"/* r9 = r5. */
+        "	mov r10, r6										\n"/* r10 = r6. */
+        "	mov r11, r7										\n"/* r11 = r7. */
+        "	msr psp, r1										\n"/* Remember the new top of stack for the task. */
+        "	subs r1, r1, #32								\n"/* Go back to the low registers. */
+        "	ldmia r1!, {r4-r7}								\n"/* Restore the low registers that are not automatically restored. */
+        "	bx lr											\n"
+        "													\n"
+        "	.align 4										\n"
+        "pxCurrentTCBConst: .word pxCurrentTCB				\n"
+        "xSecureContextConst: .word xSecureContext			\n"
+        #if ( configENABLE_MPU == 1 )
+            "xMPUCTRLConst: .word 0xe000ed94					\n"
+            "xMAIR0Const: .word 0xe000edc0						\n"
+            "xRNRConst: .word 0xe000ed98						\n"
+            "xRBARConst: .word 0xe000ed9c						\n"
+        #endif /* configENABLE_MPU */
+    );
 }
 /*-----------------------------------------------------------*/
 
 void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	movs r0, #4										\n"
-	"	mov r1, lr										\n"
-	"	tst r0, r1										\n"
-	"	beq stacking_used_msp							\n"
-	"	mrs r0, psp										\n"
-	"	ldr r2, svchandler_address_const				\n"
-	"	bx r2											\n"
-	" stacking_used_msp:								\n"
-	"	mrs r0, msp										\n"
-	"	ldr r2, svchandler_address_const				\n"
-	"	bx r2											\n"
-	"													\n"
-	"	.align 4										\n"
-	"svchandler_address_const: .word vPortSVCHandler_C	\n"
-	);
+    __asm volatile
+    (
+        "	movs r0, #4										\n"
+        "	mov r1, lr										\n"
+        "	tst r0, r1										\n"
+        "	beq stacking_used_msp							\n"
+        "	mrs r0, psp										\n"
+        "	ldr r2, svchandler_address_const				\n"
+        "	bx r2											\n"
+        " stacking_used_msp:								\n"
+        "	mrs r0, msp										\n"
+        "	ldr r2, svchandler_address_const				\n"
+        "	bx r2											\n"
+        "													\n"
+        "	.align 4										\n"
+        "svchandler_address_const: .word vPortSVCHandler_C	\n"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attribute__ (( naked )) */
 {
-	__asm volatile
-	(
-	"	svc %0											\n" /* Secure context is allocated in the supervisor call. */
-	"	bx lr											\n" /* Return. */
-	:: "i" ( portSVC_ALLOCATE_SECURE_CONTEXT ) : "memory"
-	);
+    __asm volatile
+    (
+        "	svc %0											\n"/* Secure context is allocated in the supervisor call. */
+        "	bx lr											\n"/* Return. */
+        ::"i" ( portSVC_ALLOCATE_SECURE_CONTEXT ) : "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
-void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	ldr r1, [r0]									\n" /* The first item in the TCB is the top of the stack. */
-	"	ldr r0, [r1]									\n" /* The first item on the stack is the task's xSecureContext. */
-	"	cmp r0, #0										\n" /* Raise svc if task's xSecureContext is not NULL. */
-	"	beq free_secure_context							\n"
-	"	bx lr											\n" /* There is no secure context (xSecureContext is NULL). */
-	" free_secure_context:								\n"
-	"	svc %0											\n" /* Secure context is freed in the supervisor call. */
-	"	bx lr											\n" /* Return. */
-	:: "i" ( portSVC_FREE_SECURE_CONTEXT ) : "memory"
-	);
+    __asm volatile
+    (
+        "	ldr r1, [r0]									\n"/* The first item in the TCB is the top of the stack. */
+        "	ldr r0, [r1]									\n"/* The first item on the stack is the task's xSecureContext. */
+        "	cmp r0, #0										\n"/* Raise svc if task's xSecureContext is not NULL. */
+        "	beq free_secure_context							\n"
+        "	bx lr											\n"/* There is no secure context (xSecureContext is NULL). */
+        " free_secure_context:								\n"
+        "	svc %0											\n"/* Secure context is freed in the supervisor call. */
+        "	bx lr											\n"/* Return. */
+        ::"i" ( portSVC_FREE_SECURE_CONTEXT ) : "memory"
+    );
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/GCC/ARM_CM23/non_secure/portasm.h b/portable/GCC/ARM_CM23/non_secure/portasm.h
index 71d711c69..6aaee8fc8 100644
--- a/portable/GCC/ARM_CM23/non_secure/portasm.h
+++ b/portable/GCC/ARM_CM23/non_secure/portasm.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -38,14 +38,14 @@
  * @brief Restore the context of the first task so that the first task starts
  * executing.
  */
-void vRestoreContextOfFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vRestoreContextOfFirstTask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Checks whether or not the processor is privileged.
  *
  * @return 1 if the processor is already privileged, 0 otherwise.
  */
-BaseType_t xIsPrivileged( void ) __attribute__ (( naked ));
+BaseType_t xIsPrivileged( void ) __attribute__( ( naked ) );
 
 /**
  * @brief Raises the privilege level by clearing the bit 0 of the CONTROL
@@ -58,7 +58,7 @@ BaseType_t xIsPrivileged( void ) __attribute__ (( naked ));
  *  Bit[0] = 0 --> The processor is running privileged
  *  Bit[0] = 1 --> The processor is running unprivileged.
  */
-void vRaisePrivilege( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vRaisePrivilege( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
@@ -68,32 +68,32 @@ void vRaisePrivilege( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
  *  Bit[0] = 0 --> The processor is running privileged
  *  Bit[0] = 1 --> The processor is running unprivileged.
  */
-void vResetPrivilege( void ) __attribute__ (( naked ));
+void vResetPrivilege( void ) __attribute__( ( naked ) );
 
 /**
  * @brief Starts the first task.
  */
-void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vStartFirstTask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Disables interrupts.
  */
-uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
+uint32_t ulSetInterruptMask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Enables interrupts.
  */
-void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
+void vClearInterruptMask( uint32_t ulMask ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief PendSV Exception handler.
  */
-void PendSV_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void PendSV_Handler( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief SVC Handler.
  */
-void SVC_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void SVC_Handler( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Allocate a Secure context for the calling task.
@@ -101,13 +101,13 @@ void SVC_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
  * @param[in] ulSecureStackSize The size of the stack to be allocated on the
  * secure side for the calling task.
  */
-void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) __attribute__ (( naked ));
+void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) __attribute__( ( naked ) );
 
 /**
  * @brief Free the task's secure context.
  *
  * @param[in] pulTCB Pointer to the Task Control Block (TCB) of the task.
  */
-void vPortFreeSecureContext( uint32_t *pulTCB ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vPortFreeSecureContext( uint32_t * pulTCB ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 #endif /* __PORT_ASM_H__ */
diff --git a/portable/GCC/ARM_CM23/non_secure/portmacro.h b/portable/GCC/ARM_CM23/non_secure/portmacro.h
index 2e8bba256..fc12cf1a3 100644
--- a/portable/GCC/ARM_CM23/non_secure/portmacro.h
+++ b/portable/GCC/ARM_CM23/non_secure/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,18 +19,18 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*------------------------------------------------------------------------------
  * Port specific definitions.
@@ -42,109 +42,109 @@ extern "C" {
  *------------------------------------------------------------------------------
  */
 
-#ifndef configENABLE_FPU
-	#error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
-#endif /* configENABLE_FPU */
+    #ifndef configENABLE_FPU
+        #error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
+    #endif /* configENABLE_FPU */
 
-#ifndef configENABLE_MPU
-	#error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
-#endif /* configENABLE_MPU */
+    #ifndef configENABLE_MPU
+        #error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
+    #endif /* configENABLE_MPU */
 
-#ifndef configENABLE_TRUSTZONE
-	#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
-#endif /* configENABLE_TRUSTZONE */
+    #ifndef configENABLE_TRUSTZONE
+        #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
+    #endif /* configENABLE_TRUSTZONE */
 
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Type definitions.
  */
-#define portCHAR											char
-#define portFLOAT											float
-#define portDOUBLE											double
-#define portLONG											long
-#define portSHORT											short
-#define portSTACK_TYPE										uint32_t
-#define portBASE_TYPE										long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE										StackType_t;
-typedef long												BaseType_t;
-typedef unsigned long										UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	 * not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC							1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * Architecture specifics.
  */
-#define portARCH_NAME										"Cortex-M23"
-#define portSTACK_GROWTH									( -1 )
-#define portTICK_PERIOD_MS									( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT									8
-#define portNOP()
-#define portINLINE											__inline
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE								inline __attribute__(( always_inline ))
-#endif
-#define portHAS_STACK_OVERFLOW_CHECKING						1
-#define portDONT_DISCARD									__attribute__(( used ))
+    #define portARCH_NAME                      "Cortex-M23"
+    #define portSTACK_GROWTH                   ( -1 )
+    #define portTICK_PERIOD_MS                 ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT                 8
+    #define portNOP()
+    #define portINLINE                         __inline
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE               inline __attribute__( ( always_inline ) )
+    #endif
+    #define portHAS_STACK_OVERFLOW_CHECKING    1
+    #define portDONT_DISCARD                   __attribute__( ( used ) )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Extern declarations.
  */
-extern BaseType_t xPortIsInsideInterrupt( void );
+    extern BaseType_t xPortIsInsideInterrupt( void );
 
-extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
 
-extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
-extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
 
-extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
 
-#if( configENABLE_TRUSTZONE == 1 )
-	extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
-	extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
-#endif /* configENABLE_TRUSTZONE */
+    #if ( configENABLE_TRUSTZONE == 1 )
+        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
+        extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
+    #endif /* configENABLE_TRUSTZONE */
 
-#if( configENABLE_MPU == 1 )
-	extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
-	extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
+        extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief MPU specific constants.
  */
-#if( configENABLE_MPU == 1 )
-	#define portUSING_MPU_WRAPPERS							1
-	#define portPRIVILEGE_BIT								( 0x80000000UL )
-#else
-	#define portPRIVILEGE_BIT								( 0x0UL )
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        #define portUSING_MPU_WRAPPERS    1
+        #define portPRIVILEGE_BIT         ( 0x80000000UL )
+    #else
+        #define portPRIVILEGE_BIT         ( 0x0UL )
+    #endif /* configENABLE_MPU */
 
 
 /* MPU regions. */
-#define portPRIVILEGED_FLASH_REGION							( 0UL )
-#define portUNPRIVILEGED_FLASH_REGION						( 1UL )
-#define portUNPRIVILEGED_SYSCALLS_REGION					( 2UL )
-#define portPRIVILEGED_RAM_REGION							( 3UL )
-#define portSTACK_REGION									( 4UL )
-#define portFIRST_CONFIGURABLE_REGION						( 5UL )
-#define portLAST_CONFIGURABLE_REGION						( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS						( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS								( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
+    #define portPRIVILEGED_FLASH_REGION                   ( 0UL )
+    #define portUNPRIVILEGED_FLASH_REGION                 ( 1UL )
+    #define portUNPRIVILEGED_SYSCALLS_REGION              ( 2UL )
+    #define portPRIVILEGED_RAM_REGION                     ( 3UL )
+    #define portSTACK_REGION                              ( 4UL )
+    #define portFIRST_CONFIGURABLE_REGION                 ( 5UL )
+    #define portLAST_CONFIGURABLE_REGION                  ( 7UL )
+    #define portNUM_CONFIGURABLE_REGIONS                  ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
+    #define portTOTAL_NUM_REGIONS                         ( portNUM_CONFIGURABLE_REGIONS + 1 )   /* Plus one to make space for the stack region. */
 
 /* Device memory attributes used in MPU_MAIR registers.
  *
@@ -156,155 +156,157 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
  *				11 --> Device-GRE
  *  Bit[1:0] - 00, Reserved.
  */
-#define portMPU_DEVICE_MEMORY_nGnRnE						( 0x00 ) /* 0000 0000 */
-#define portMPU_DEVICE_MEMORY_nGnRE							( 0x04 ) /* 0000 0100 */
-#define portMPU_DEVICE_MEMORY_nGRE							( 0x08 ) /* 0000 1000 */
-#define portMPU_DEVICE_MEMORY_GRE							( 0x0C ) /* 0000 1100 */
+    #define portMPU_DEVICE_MEMORY_nGnRnE                  ( 0x00 )   /* 0000 0000 */
+    #define portMPU_DEVICE_MEMORY_nGnRE                   ( 0x04 )   /* 0000 0100 */
+    #define portMPU_DEVICE_MEMORY_nGRE                    ( 0x08 )   /* 0000 1000 */
+    #define portMPU_DEVICE_MEMORY_GRE                     ( 0x0C )   /* 0000 1100 */
 
 /* Normal memory attributes used in MPU_MAIR registers. */
-#define portMPU_NORMAL_MEMORY_NON_CACHEABLE					( 0x44 ) /* Non-cacheable. */
-#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE			( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
+    #define portMPU_NORMAL_MEMORY_NON_CACHEABLE           ( 0x44 )   /* Non-cacheable. */
+    #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE    ( 0xFF )   /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
 
 /* Attributes used in MPU_RBAR registers. */
-#define portMPU_REGION_NON_SHAREABLE						( 0UL << 3UL )
-#define portMPU_REGION_INNER_SHAREABLE						( 1UL << 3UL )
-#define portMPU_REGION_OUTER_SHAREABLE						( 2UL << 3UL )
+    #define portMPU_REGION_NON_SHAREABLE                  ( 0UL << 3UL )
+    #define portMPU_REGION_INNER_SHAREABLE                ( 1UL << 3UL )
+    #define portMPU_REGION_OUTER_SHAREABLE                ( 2UL << 3UL )
 
-#define portMPU_REGION_PRIVILEGED_READ_WRITE				( 0UL << 1UL )
-#define portMPU_REGION_READ_WRITE							( 1UL << 1UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY					( 2UL << 1UL )
-#define portMPU_REGION_READ_ONLY							( 3UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_WRITE          ( 0UL << 1UL )
+    #define portMPU_REGION_READ_WRITE                     ( 1UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_ONLY           ( 2UL << 1UL )
+    #define portMPU_REGION_READ_ONLY                      ( 3UL << 1UL )
 
-#define portMPU_REGION_EXECUTE_NEVER						( 1UL )
+    #define portMPU_REGION_EXECUTE_NEVER                  ( 1UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Settings to define an MPU region.
  */
-typedef struct MPURegionSettings
-{
-	uint32_t ulRBAR;	/**< RBAR for the region. */
-	uint32_t ulRLAR;	/**< RLAR for the region. */
-} MPURegionSettings_t;
+    typedef struct MPURegionSettings
+    {
+        uint32_t ulRBAR; /**< RBAR for the region. */
+        uint32_t ulRLAR; /**< RLAR for the region. */
+    } MPURegionSettings_t;
 
 /**
  * @brief MPU settings as stored in the TCB.
  */
-typedef struct MPU_SETTINGS
-{
-	uint32_t ulMAIR0;	/**< MAIR0 for the task containing attributes for all the 4 per task regions. */
-	MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
-} xMPU_SETTINGS;
+    typedef struct MPU_SETTINGS
+    {
+        uint32_t ulMAIR0;                                              /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
+        MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
+    } xMPU_SETTINGS;
 /*-----------------------------------------------------------*/
 
 /**
  * @brief SVC numbers.
  */
-#define portSVC_ALLOCATE_SECURE_CONTEXT						0
-#define portSVC_FREE_SECURE_CONTEXT							1
-#define portSVC_START_SCHEDULER								2
-#define portSVC_RAISE_PRIVILEGE								3
+    #define portSVC_ALLOCATE_SECURE_CONTEXT    0
+    #define portSVC_FREE_SECURE_CONTEXT        1
+    #define portSVC_START_SCHEDULER            2
+    #define portSVC_RAISE_PRIVILEGE            3
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Scheduler utilities.
  */
-#define portYIELD()											vPortYield()
-#define portNVIC_INT_CTRL_REG								( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT								( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired )			if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x )								portEND_SWITCHING_ISR( x )
+    #define portYIELD()                                 vPortYield()
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Critical section management.
  */
-#define portSET_INTERRUPT_MASK_FROM_ISR()					ulSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)				vClearInterruptMask( x )
-#define portDISABLE_INTERRUPTS()							__asm volatile ( " cpsid i " ::: "memory" )
-#define portENABLE_INTERRUPTS()								__asm volatile ( " cpsie i " ::: "memory" )
-#define portENTER_CRITICAL()								vPortEnterCritical()
-#define portEXIT_CRITICAL()									vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulSetInterruptMask()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vClearInterruptMask( x )
+    #define portDISABLE_INTERRUPTS()                  __asm volatile ( " cpsid i " ::: "memory" )
+    #define portENABLE_INTERRUPTS()                   __asm volatile ( " cpsie i " ::: "memory" )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Tickless idle/low power functionality.
  */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Task function macros as described on the FreeRTOS.org WEB site.
  */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters )		void vFunction( void *pvParameters )
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Allocate a secure context for the task.
-	 *
-	 * Tasks are not created with a secure context. Any task that is going to call
-	 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
-	 * secure context before it calls any secure function.
-	 *
-	 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
-	 */
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )	vPortAllocateSecureContext( ulSecureStackSize )
+    #if ( configENABLE_TRUSTZONE == 1 )
 
-	/**
-	 * @brief Called when a task is deleted to delete the task's secure context,
-	 * if it has one.
-	 *
-	 * @param[in] pxTCB The TCB of the task being deleted.
-	 */
-	#define portCLEAN_UP_TCB( pxTCB )							vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-#else
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-	#define portCLEAN_UP_TCB( pxTCB )
-#endif /* configENABLE_TRUSTZONE */
+/**
+ * @brief Allocate a secure context for the task.
+ *
+ * Tasks are not created with a secure context. Any task that is going to call
+ * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
+ * secure context before it calls any secure function.
+ *
+ * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
+ */
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )    vPortAllocateSecureContext( ulSecureStackSize )
+
+/**
+ * @brief Called when a task is deleted to delete the task's secure context,
+ * if it has one.
+ *
+ * @param[in] pxTCB The TCB of the task being deleted.
+ */
+        #define portCLEAN_UP_TCB( pxTCB )                           vPortFreeSecureContext( ( uint32_t * ) pxTCB )
+    #else
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
+        #define portCLEAN_UP_TCB( pxTCB )
+    #endif /* configENABLE_TRUSTZONE */
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Checks whether or not the processor is privileged.
-	 *
-	 * @return 1 if the processor is already privileged, 0 otherwise.
-	 */
-	#define portIS_PRIVILEGED()									xIsPrivileged()
+    #if ( configENABLE_MPU == 1 )
 
-	/**
-	 * @brief Raise an SVC request to raise privilege.
-	 *
-	 * The SVC handler checks that the SVC was raised from a system call and only
-	 * then it raises the privilege. If this is called from any other place,
-	 * the privilege is not raised.
-	 */
-	#define portRAISE_PRIVILEGE()								__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+/**
+ * @brief Checks whether or not the processor is privileged.
+ *
+ * @return 1 if the processor is already privileged, 0 otherwise.
+ */
+        #define portIS_PRIVILEGED()      xIsPrivileged()
 
-	/**
-	 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
-	 * register.
-	 */
-	#define portRESET_PRIVILEGE()								vResetPrivilege()
-#else
-	#define portIS_PRIVILEGED()
-	#define portRAISE_PRIVILEGE()
-	#define portRESET_PRIVILEGE()
-#endif /* configENABLE_MPU */
+/**
+ * @brief Raise an SVC request to raise privilege.
+ *
+ * The SVC handler checks that the SVC was raised from a system call and only
+ * then it raises the privilege. If this is called from any other place,
+ * the privilege is not raised.
+ */
+        #define portRAISE_PRIVILEGE()    __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+
+/**
+ * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
+ * register.
+ */
+        #define portRESET_PRIVILEGE()    vResetPrivilege()
+    #else
+        #define portIS_PRIVILEGED()
+        #define portRAISE_PRIVILEGE()
+        #define portRESET_PRIVILEGE()
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Barriers.
  */
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
+    #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
 /*-----------------------------------------------------------*/
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
diff --git a/portable/GCC/ARM_CM23/secure/secure_context.c b/portable/GCC/ARM_CM23/secure/secure_context.c
index 39fabbf60..59c09ed58 100644
--- a/portable/GCC/ARM_CM23/secure/secure_context.c
+++ b/portable/GCC/ARM_CM23/secure/secure_context.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -40,7 +40,7 @@
  * Bit[0] - 0 --> Thread mode is privileged.
  * Bit[1] - 1 --> Thread mode uses PSP.
  */
-#define securecontextCONTROL_VALUE_PRIVILEGED		0x02
+#define securecontextCONTROL_VALUE_PRIVILEGED      0x02
 
 /**
  * @brief CONTROL value for un-privileged tasks.
@@ -48,7 +48,7 @@
  * Bit[0] - 1 --> Thread mode is un-privileged.
  * Bit[1] - 1 --> Thread mode uses PSP.
  */
-#define securecontextCONTROL_VALUE_UNPRIVILEGED		0x03
+#define securecontextCONTROL_VALUE_UNPRIVILEGED    0x03
 /*-----------------------------------------------------------*/
 
 /**
@@ -59,146 +59,148 @@
  */
 typedef struct SecureContext
 {
-	uint8_t *pucCurrentStackPointer;	/**< Current value of stack pointer (PSP). */
-	uint8_t *pucStackLimit;				/**< Last location of the stack memory (PSPLIM). */
-	uint8_t *pucStackStart;				/**< First location of the stack memory. */
+    uint8_t * pucCurrentStackPointer; /**< Current value of stack pointer (PSP). */
+    uint8_t * pucStackLimit;          /**< Last location of the stack memory (PSPLIM). */
+    uint8_t * pucStackStart;          /**< First location of the stack memory. */
 } SecureContext_t;
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureContext_Init( void )
 {
-	uint32_t ulIPSR;
+    uint32_t ulIPSR;
 
-	/* Read the Interrupt Program Status Register (IPSR) value. */
-	secureportREAD_IPSR( ulIPSR );
+    /* Read the Interrupt Program Status Register (IPSR) value. */
+    secureportREAD_IPSR( ulIPSR );
 
-	/* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-	 * when the processor is running in the Thread Mode. */
-	if( ulIPSR != 0 )
-	{
-		/* No stack for thread mode until a task's context is loaded. */
-		secureportSET_PSPLIM( securecontextNO_STACK );
-		secureportSET_PSP( securecontextNO_STACK );
+    /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
+     * when the processor is running in the Thread Mode. */
+    if( ulIPSR != 0 )
+    {
+        /* No stack for thread mode until a task's context is loaded. */
+        secureportSET_PSPLIM( securecontextNO_STACK );
+        secureportSET_PSP( securecontextNO_STACK );
 
-		#if( configENABLE_MPU == 1 )
-		{
-			/* Configure thread mode to use PSP and to be unprivileged. */
-			secureportSET_CONTROL( securecontextCONTROL_VALUE_UNPRIVILEGED );
-		}
-		#else /* configENABLE_MPU */
-		{
-			/* Configure thread mode to use PSP and to be privileged.. */
-			secureportSET_CONTROL( securecontextCONTROL_VALUE_PRIVILEGED );
-		}
-		#endif /* configENABLE_MPU */
-	}
+        #if ( configENABLE_MPU == 1 )
+            {
+                /* Configure thread mode to use PSP and to be unprivileged. */
+                secureportSET_CONTROL( securecontextCONTROL_VALUE_UNPRIVILEGED );
+            }
+        #else /* configENABLE_MPU */
+            {
+                /* Configure thread mode to use PSP and to be privileged.. */
+                secureportSET_CONTROL( securecontextCONTROL_VALUE_PRIVILEGED );
+            }
+        #endif /* configENABLE_MPU */
+    }
 }
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, uint32_t ulIsTaskPrivileged )
+#if ( configENABLE_MPU == 1 )
+    secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize,
+                                                                                       uint32_t ulIsTaskPrivileged )
 #else /* configENABLE_MPU */
-	secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize )
+    secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize )
 #endif /* configENABLE_MPU */
 {
-	uint8_t *pucStackMemory = NULL;
-	uint32_t ulIPSR;
-	SecureContextHandle_t xSecureContextHandle = NULL;
-	#if( configENABLE_MPU == 1 )
-		uint32_t *pulCurrentStackPointer = NULL;
-	#endif /* configENABLE_MPU */
+    uint8_t * pucStackMemory = NULL;
+    uint32_t ulIPSR;
+    SecureContextHandle_t xSecureContextHandle = NULL;
 
-	/* Read the Interrupt Program Status Register (IPSR) value. */
-	secureportREAD_IPSR( ulIPSR );
+    #if ( configENABLE_MPU == 1 )
+        uint32_t * pulCurrentStackPointer = NULL;
+    #endif /* configENABLE_MPU */
 
-	/* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-	 * when the processor is running in the Thread Mode. */
-	if( ulIPSR != 0 )
-	{
-		/* Allocate the context structure. */
-		xSecureContextHandle = ( SecureContextHandle_t ) pvPortMalloc( sizeof( SecureContext_t ) );
+    /* Read the Interrupt Program Status Register (IPSR) value. */
+    secureportREAD_IPSR( ulIPSR );
 
-		if( xSecureContextHandle != NULL )
-		{
-			/* Allocate the stack space. */
-			pucStackMemory = pvPortMalloc( ulSecureStackSize );
+    /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
+     * when the processor is running in the Thread Mode. */
+    if( ulIPSR != 0 )
+    {
+        /* Allocate the context structure. */
+        xSecureContextHandle = ( SecureContextHandle_t ) pvPortMalloc( sizeof( SecureContext_t ) );
 
-			if( pucStackMemory != NULL )
-			{
-				/* Since stack grows down, the starting point will be the last
-				 * location. Note that this location is next to the last
-				 * allocated byte because the hardware decrements the stack
-				 * pointer before writing i.e. if stack pointer is 0x2, a push
-				 * operation will decrement the stack pointer to 0x1 and then
-				 * write at 0x1. */
-				xSecureContextHandle->pucStackStart = pucStackMemory + ulSecureStackSize;
+        if( xSecureContextHandle != NULL )
+        {
+            /* Allocate the stack space. */
+            pucStackMemory = pvPortMalloc( ulSecureStackSize );
 
-				/* The stack cannot go beyond this location. This value is
-				 * programmed in the PSPLIM register on context switch.*/
-				xSecureContextHandle->pucStackLimit = pucStackMemory;
+            if( pucStackMemory != NULL )
+            {
+                /* Since stack grows down, the starting point will be the last
+                 * location. Note that this location is next to the last
+                 * allocated byte because the hardware decrements the stack
+                 * pointer before writing i.e. if stack pointer is 0x2, a push
+                 * operation will decrement the stack pointer to 0x1 and then
+                 * write at 0x1. */
+                xSecureContextHandle->pucStackStart = pucStackMemory + ulSecureStackSize;
 
-				#if( configENABLE_MPU == 1 )
-				{
-					/* Store the correct CONTROL value for the task on the stack.
-					 * This value is programmed in the CONTROL register on
-					 * context switch. */
-					pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart;
-					pulCurrentStackPointer--;
-					if( ulIsTaskPrivileged )
-					{
-						*( pulCurrentStackPointer ) = securecontextCONTROL_VALUE_PRIVILEGED;
-					}
-					else
-					{
-						*( pulCurrentStackPointer ) = securecontextCONTROL_VALUE_UNPRIVILEGED;
-					}
+                /* The stack cannot go beyond this location. This value is
+                 * programmed in the PSPLIM register on context switch.*/
+                xSecureContextHandle->pucStackLimit = pucStackMemory;
 
-					/* Store the current stack pointer. This value is programmed in
-					 * the PSP register on context switch. */
-					xSecureContextHandle->pucCurrentStackPointer = ( uint8_t * ) pulCurrentStackPointer;
-				}
-				#else /* configENABLE_MPU */
-				{
-					/* Current SP is set to the starting of the stack. This
-					 * value programmed in the PSP register on context switch. */
-					xSecureContextHandle->pucCurrentStackPointer = xSecureContextHandle->pucStackStart;
+                #if ( configENABLE_MPU == 1 )
+                    {
+                        /* Store the correct CONTROL value for the task on the stack.
+                         * This value is programmed in the CONTROL register on
+                         * context switch. */
+                        pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart;
+                        pulCurrentStackPointer--;
 
-				}
-				#endif /* configENABLE_MPU */
-			}
-			else
-			{
-				/* Free the context to avoid memory leak and make sure to return
-				 * NULL to indicate failure. */
-				vPortFree( xSecureContextHandle );
-				xSecureContextHandle = NULL;
-			}
-		}
-	}
+                        if( ulIsTaskPrivileged )
+                        {
+                            *( pulCurrentStackPointer ) = securecontextCONTROL_VALUE_PRIVILEGED;
+                        }
+                        else
+                        {
+                            *( pulCurrentStackPointer ) = securecontextCONTROL_VALUE_UNPRIVILEGED;
+                        }
 
-	return xSecureContextHandle;
+                        /* Store the current stack pointer. This value is programmed in
+                         * the PSP register on context switch. */
+                        xSecureContextHandle->pucCurrentStackPointer = ( uint8_t * ) pulCurrentStackPointer;
+                    }
+                #else /* configENABLE_MPU */
+                    {
+                        /* Current SP is set to the starting of the stack. This
+                         * value programmed in the PSP register on context switch. */
+                        xSecureContextHandle->pucCurrentStackPointer = xSecureContextHandle->pucStackStart;
+                    }
+                #endif /* configENABLE_MPU */
+            }
+            else
+            {
+                /* Free the context to avoid memory leak and make sure to return
+                 * NULL to indicate failure. */
+                vPortFree( xSecureContextHandle );
+                xSecureContextHandle = NULL;
+            }
+        }
+    }
+
+    return xSecureContextHandle;
 }
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle )
 {
-	uint32_t ulIPSR;
+    uint32_t ulIPSR;
 
-	/* Read the Interrupt Program Status Register (IPSR) value. */
-	secureportREAD_IPSR( ulIPSR );
+    /* Read the Interrupt Program Status Register (IPSR) value. */
+    secureportREAD_IPSR( ulIPSR );
 
-	/* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-	 * when the processor is running in the Thread Mode. */
-	if( ulIPSR != 0 )
-	{
-		/* Ensure that valid parameters are passed. */
-		secureportASSERT( xSecureContextHandle != NULL );
+    /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
+     * when the processor is running in the Thread Mode. */
+    if( ulIPSR != 0 )
+    {
+        /* Ensure that valid parameters are passed. */
+        secureportASSERT( xSecureContextHandle != NULL );
 
-		/* Free the stack space. */
-		vPortFree( xSecureContextHandle->pucStackLimit );
+        /* Free the stack space. */
+        vPortFree( xSecureContextHandle->pucStackLimit );
 
-		/* Free the context itself. */
-		vPortFree( xSecureContextHandle );
-	}
+        /* Free the context itself. */
+        vPortFree( xSecureContextHandle );
+    }
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/GCC/ARM_CM23/secure/secure_context.h b/portable/GCC/ARM_CM23/secure/secure_context.h
index 747c2c6fd..681ac6916 100644
--- a/portable/GCC/ARM_CM23/secure/secure_context.h
+++ b/portable/GCC/ARM_CM23/secure/secure_context.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -37,13 +37,13 @@
 /**
  * @brief PSP value when no task's context is loaded.
  */
-#define securecontextNO_STACK	0x0
+#define securecontextNO_STACK    0x0
 
 /**
  * @brief Opaque handle.
  */
 struct SecureContext;
-typedef struct SecureContext*	SecureContextHandle_t;
+typedef struct SecureContext * SecureContextHandle_t;
 /*-----------------------------------------------------------*/
 
 /**
@@ -69,10 +69,11 @@ void SecureContext_Init( void );
  * @return Opaque context handle if context is successfully allocated, NULL
  * otherwise.
  */
-#if( configENABLE_MPU == 1 )
-	SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, uint32_t ulIsTaskPrivileged );
+#if ( configENABLE_MPU == 1 )
+    SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize,
+                                                         uint32_t ulIsTaskPrivileged );
 #else /* configENABLE_MPU */
-	SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize );
+    SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize );
 #endif /* configENABLE_MPU */
 
 /**
diff --git a/portable/GCC/ARM_CM23/secure/secure_context_port.c b/portable/GCC/ARM_CM23/secure/secure_context_port.c
index 616cfd78e..747ceb5d8 100644
--- a/portable/GCC/ARM_CM23/secure/secure_context_port.c
+++ b/portable/GCC/ARM_CM23/secure/secure_context_port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -31,61 +31,61 @@
 /* Secure port macros. */
 #include "secure_port_macros.h"
 
-#if( configENABLE_FPU == 1 )
-	#error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
+#if ( configENABLE_FPU == 1 )
+    #error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
 #endif
 
 secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle )
 {
-	/* xSecureContextHandle value is in r0. */
-	__asm volatile
-	(
-	"	.syntax unified							\n"
-	"											\n"
-	"	mrs r1, ipsr							\n" /* r1 = IPSR. */
-	"	cbz r1, load_ctx_therad_mode			\n" /* Do nothing if the processor is running in the Thread Mode. */
-	"	ldmia r0!, {r1, r2}						\n" /* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */
-	#if( configENABLE_MPU == 1 )
-	"	ldmia r1!, {r3}							\n" /* Read CONTROL register value from task's stack. r3 = CONTROL. */
-	"	msr control, r3							\n" /* CONTROL = r3. */
-	#endif /* configENABLE_MPU */
-	"	msr psplim, r2							\n" /* PSPLIM = r2. */
-	"	msr psp, r1								\n" /* PSP = r1. */
-	"											\n"
-	" load_ctx_therad_mode:						\n"
-	"	nop										\n"
-	"											\n"
-	:::"r0", "r1", "r2"
-	);
+    /* xSecureContextHandle value is in r0. */
+    __asm volatile
+    (
+        "	.syntax unified							\n"
+        "											\n"
+        "	mrs r1, ipsr							\n"/* r1 = IPSR. */
+        "	cbz r1, load_ctx_therad_mode			\n"/* Do nothing if the processor is running in the Thread Mode. */
+        "	ldmia r0!, {r1, r2}						\n"/* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */
+        #if ( configENABLE_MPU == 1 )
+            "	ldmia r1!, {r3}							\n"/* Read CONTROL register value from task's stack. r3 = CONTROL. */
+            "	msr control, r3							\n"/* CONTROL = r3. */
+        #endif /* configENABLE_MPU */
+        "	msr psplim, r2							\n"/* PSPLIM = r2. */
+        "	msr psp, r1								\n"/* PSP = r1. */
+        "											\n"
+        " load_ctx_therad_mode:						\n"
+        "	nop										\n"
+        "											\n"
+        ::: "r0", "r1", "r2"
+    );
 }
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle )
 {
-	/* xSecureContextHandle value is in r0. */
-	__asm volatile
-	(
-	"	.syntax unified							\n"
-	"											\n"
-	"	mrs r1, ipsr							\n" /* r1 = IPSR. */
-	"	cbz r1, save_ctx_therad_mode			\n" /* Do nothing if the processor is running in the Thread Mode. */
-	"	mrs r1, psp								\n" /* r1 = PSP. */
-	#if( configENABLE_MPU == 1 )
-	"	mrs r2, control							\n" /* r2 = CONTROL. */
-	"	subs r1, r1, #4							\n" /* Make space for the CONTROL value on the stack. */
-	"	str r1, [r0]							\n" /* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
-	"	stmia r1!, {r2}							\n" /* Store CONTROL value on the stack. */
-	#else /* configENABLE_MPU */
-	"	str r1, [r0]							\n" /* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
-	#endif /* configENABLE_MPU */
-	"	movs r1, %0								\n" /* r1 = securecontextNO_STACK. */
-	"	msr psplim, r1							\n" /* PSPLIM = securecontextNO_STACK. */
-	"	msr psp, r1								\n" /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
-	"											\n"
-	" save_ctx_therad_mode:						\n"
-	"	nop										\n"
-	"											\n"
-	:: "i" ( securecontextNO_STACK ) : "r1", "memory"
-	);
+    /* xSecureContextHandle value is in r0. */
+    __asm volatile
+    (
+        "	.syntax unified							\n"
+        "											\n"
+        "	mrs r1, ipsr							\n"/* r1 = IPSR. */
+        "	cbz r1, save_ctx_therad_mode			\n"/* Do nothing if the processor is running in the Thread Mode. */
+        "	mrs r1, psp								\n"/* r1 = PSP. */
+        #if ( configENABLE_MPU == 1 )
+            "	mrs r2, control							\n"/* r2 = CONTROL. */
+            "	subs r1, r1, #4							\n"/* Make space for the CONTROL value on the stack. */
+            "	str r1, [r0]							\n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
+            "	stmia r1!, {r2}							\n"/* Store CONTROL value on the stack. */
+        #else /* configENABLE_MPU */
+            "	str r1, [r0]							\n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
+        #endif /* configENABLE_MPU */
+        "	movs r1, %0								\n"/* r1 = securecontextNO_STACK. */
+        "	msr psplim, r1							\n"/* PSPLIM = securecontextNO_STACK. */
+        "	msr psp, r1								\n"/* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
+        "											\n"
+        " save_ctx_therad_mode:						\n"
+        "	nop										\n"
+        "											\n"
+        ::"i" ( securecontextNO_STACK ) : "r1", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/GCC/ARM_CM23/secure/secure_heap.c b/portable/GCC/ARM_CM23/secure/secure_heap.c
index 7995a7f12..7c3227b18 100644
--- a/portable/GCC/ARM_CM23/secure/secure_heap.c
+++ b/portable/GCC/ARM_CM23/secure/secure_heap.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -37,37 +37,38 @@
 /**
  * @brief Total heap size.
  */
-#define secureconfigTOTAL_HEAP_SIZE		( ( ( size_t ) ( 10 * 1024 ) ) )
+#define secureconfigTOTAL_HEAP_SIZE    ( ( ( size_t ) ( 10 * 1024 ) ) )
 
 /* No test marker by default. */
 #ifndef mtCOVERAGE_TEST_MARKER
-	#define mtCOVERAGE_TEST_MARKER()
+    #define mtCOVERAGE_TEST_MARKER()
 #endif
 
 /* No tracing by default. */
 #ifndef traceMALLOC
-	#define traceMALLOC( pvReturn, xWantedSize )
+    #define traceMALLOC( pvReturn, xWantedSize )
 #endif
 
 /* No tracing by default. */
 #ifndef traceFREE
-	#define traceFREE( pv, xBlockSize )
+    #define traceFREE( pv, xBlockSize )
 #endif
 
 /* Block sizes must not get too small. */
-#define secureheapMINIMUM_BLOCK_SIZE	( ( size_t ) ( xHeapStructSize << 1 ) )
+#define secureheapMINIMUM_BLOCK_SIZE    ( ( size_t ) ( xHeapStructSize << 1 ) )
 
 /* Assumes 8bit bytes! */
-#define secureheapBITS_PER_BYTE			( ( size_t ) 8 )
+#define secureheapBITS_PER_BYTE         ( ( size_t ) 8 )
 /*-----------------------------------------------------------*/
 
 /* Allocate the memory for the heap. */
-#if( configAPPLICATION_ALLOCATED_HEAP == 1 )
-	/* The application writer has already defined the array used for the RTOS
-	 * heap - probably so it can be placed in a special segment or address. */
-	extern uint8_t ucHeap[ secureconfigTOTAL_HEAP_SIZE ];
+#if ( configAPPLICATION_ALLOCATED_HEAP == 1 )
+
+/* The application writer has already defined the array used for the RTOS
+* heap - probably so it can be placed in a special segment or address. */
+    extern uint8_t ucHeap[ secureconfigTOTAL_HEAP_SIZE ];
 #else /* configAPPLICATION_ALLOCATED_HEAP */
-	static uint8_t ucHeap[ secureconfigTOTAL_HEAP_SIZE ];
+    static uint8_t ucHeap[ secureconfigTOTAL_HEAP_SIZE ];
 #endif /* configAPPLICATION_ALLOCATED_HEAP */
 
 /**
@@ -77,8 +78,8 @@
  */
 typedef struct A_BLOCK_LINK
 {
-	struct A_BLOCK_LINK *pxNextFreeBlock;	/**< The next free block in the list. */
-	size_t xBlockSize;						/**< The size of the free block. */
+    struct A_BLOCK_LINK * pxNextFreeBlock; /**< The next free block in the list. */
+    size_t xBlockSize;                     /**< The size of the free block. */
 } BlockLink_t;
 /*-----------------------------------------------------------*/
 
@@ -97,7 +98,7 @@ static void prvHeapInit( void );
  *
  * @param[in] pxBlockToInsert The block being freed.
  */
-static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert );
+static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert );
 /*-----------------------------------------------------------*/
 
 /**
@@ -109,7 +110,7 @@ static const size_t xHeapStructSize = ( sizeof( BlockLink_t ) + ( ( size_t ) ( s
 /**
  * @brief Create a couple of list links to mark the start and end of the list.
  */
-static BlockLink_t xStart, *pxEnd = NULL;
+static BlockLink_t xStart, * pxEnd = NULL;
 
 /**
  * @brief Keeps track of the number of free bytes remaining, but says nothing
@@ -130,321 +131,324 @@ static size_t xBlockAllocatedBit = 0;
 
 static void prvHeapInit( void )
 {
-BlockLink_t *pxFirstFreeBlock;
-uint8_t *pucAlignedHeap;
-size_t uxAddress;
-size_t xTotalHeapSize = secureconfigTOTAL_HEAP_SIZE;
+    BlockLink_t * pxFirstFreeBlock;
+    uint8_t * pucAlignedHeap;
+    size_t uxAddress;
+    size_t xTotalHeapSize = secureconfigTOTAL_HEAP_SIZE;
 
-	/* Ensure the heap starts on a correctly aligned boundary. */
-	uxAddress = ( size_t ) ucHeap;
+    /* Ensure the heap starts on a correctly aligned boundary. */
+    uxAddress = ( size_t ) ucHeap;
 
-	if( ( uxAddress & secureportBYTE_ALIGNMENT_MASK ) != 0 )
-	{
-		uxAddress += ( secureportBYTE_ALIGNMENT - 1 );
-		uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK );
-		xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
-	}
+    if( ( uxAddress & secureportBYTE_ALIGNMENT_MASK ) != 0 )
+    {
+        uxAddress += ( secureportBYTE_ALIGNMENT - 1 );
+        uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK );
+        xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
+    }
 
-	pucAlignedHeap = ( uint8_t * ) uxAddress;
+    pucAlignedHeap = ( uint8_t * ) uxAddress;
 
-	/* xStart is used to hold a pointer to the first item in the list of free
-	 * blocks.  The void cast is used to prevent compiler warnings. */
-	xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
-	xStart.xBlockSize = ( size_t ) 0;
+    /* xStart is used to hold a pointer to the first item in the list of free
+     * blocks.  The void cast is used to prevent compiler warnings. */
+    xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
+    xStart.xBlockSize = ( size_t ) 0;
 
-	/* pxEnd is used to mark the end of the list of free blocks and is inserted
-	 * at the end of the heap space. */
-	uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
-	uxAddress -= xHeapStructSize;
-	uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK );
-	pxEnd = ( void * ) uxAddress;
-	pxEnd->xBlockSize = 0;
-	pxEnd->pxNextFreeBlock = NULL;
+    /* pxEnd is used to mark the end of the list of free blocks and is inserted
+     * at the end of the heap space. */
+    uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
+    uxAddress -= xHeapStructSize;
+    uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK );
+    pxEnd = ( void * ) uxAddress;
+    pxEnd->xBlockSize = 0;
+    pxEnd->pxNextFreeBlock = NULL;
 
-	/* To start with there is a single free block that is sized to take up the
-	 * entire heap space, minus the space taken by pxEnd. */
-	pxFirstFreeBlock = ( void * ) pucAlignedHeap;
-	pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
-	pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
+    /* To start with there is a single free block that is sized to take up the
+     * entire heap space, minus the space taken by pxEnd. */
+    pxFirstFreeBlock = ( void * ) pucAlignedHeap;
+    pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
+    pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
 
-	/* Only one block exists - and it covers the entire usable heap space. */
-	xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
-	xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
+    /* Only one block exists - and it covers the entire usable heap space. */
+    xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
+    xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
 
-	/* Work out the position of the top bit in a size_t variable. */
-	xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * secureheapBITS_PER_BYTE ) - 1 );
+    /* Work out the position of the top bit in a size_t variable. */
+    xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * secureheapBITS_PER_BYTE ) - 1 );
 }
 /*-----------------------------------------------------------*/
 
-static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert )
+static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert )
 {
-BlockLink_t *pxIterator;
-uint8_t *puc;
+    BlockLink_t * pxIterator;
+    uint8_t * puc;
 
-	/* Iterate through the list until a block is found that has a higher address
-	 * than the block being inserted. */
-	for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
-	{
-		/* Nothing to do here, just iterate to the right position. */
-	}
+    /* Iterate through the list until a block is found that has a higher address
+     * than the block being inserted. */
+    for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
+    {
+        /* Nothing to do here, just iterate to the right position. */
+    }
 
-	/* Do the block being inserted, and the block it is being inserted after
-	 * make a contiguous block of memory? */
-	puc = ( uint8_t * ) pxIterator;
-	if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
-	{
-		pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
-		pxBlockToInsert = pxIterator;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    /* Do the block being inserted, and the block it is being inserted after
+     * make a contiguous block of memory? */
+    puc = ( uint8_t * ) pxIterator;
 
-	/* Do the block being inserted, and the block it is being inserted before
-	 * make a contiguous block of memory? */
-	puc = ( uint8_t * ) pxBlockToInsert;
-	if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
-	{
-		if( pxIterator->pxNextFreeBlock != pxEnd )
-		{
-			/* Form one big block from the two blocks. */
-			pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
-			pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
-		}
-		else
-		{
-			pxBlockToInsert->pxNextFreeBlock = pxEnd;
-		}
-	}
-	else
-	{
-		pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
-	}
+    if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
+    {
+        pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
+        pxBlockToInsert = pxIterator;
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	/* If the block being inserted plugged a gab, so was merged with the block
-	 * before and the block after, then it's pxNextFreeBlock pointer will have
-	 * already been set, and should not be set here as that would make it point
-	 * to itself. */
-	if( pxIterator != pxBlockToInsert )
-	{
-		pxIterator->pxNextFreeBlock = pxBlockToInsert;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    /* Do the block being inserted, and the block it is being inserted before
+     * make a contiguous block of memory? */
+    puc = ( uint8_t * ) pxBlockToInsert;
+
+    if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
+    {
+        if( pxIterator->pxNextFreeBlock != pxEnd )
+        {
+            /* Form one big block from the two blocks. */
+            pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
+            pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
+        }
+        else
+        {
+            pxBlockToInsert->pxNextFreeBlock = pxEnd;
+        }
+    }
+    else
+    {
+        pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
+    }
+
+    /* If the block being inserted plugged a gab, so was merged with the block
+     * before and the block after, then it's pxNextFreeBlock pointer will have
+     * already been set, and should not be set here as that would make it point
+     * to itself. */
+    if( pxIterator != pxBlockToInsert )
+    {
+        pxIterator->pxNextFreeBlock = pxBlockToInsert;
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 }
 /*-----------------------------------------------------------*/
 
-void *pvPortMalloc( size_t xWantedSize )
+void * pvPortMalloc( size_t xWantedSize )
 {
-BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
-void *pvReturn = NULL;
+    BlockLink_t * pxBlock, * pxPreviousBlock, * pxNewBlockLink;
+    void * pvReturn = NULL;
 
-	/* If this is the first call to malloc then the heap will require
-	 * initialisation to setup the list of free blocks. */
-	if( pxEnd == NULL )
-	{
-		prvHeapInit();
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    /* If this is the first call to malloc then the heap will require
+     * initialisation to setup the list of free blocks. */
+    if( pxEnd == NULL )
+    {
+        prvHeapInit();
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	/* Check the requested block size is not so large that the top bit is set.
-	 * The top bit of the block size member of the BlockLink_t structure is used
-	 * to determine who owns the block - the application or the kernel, so it
-	 * must be free. */
-	if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
-	{
-		/* The wanted size is increased so it can contain a BlockLink_t
-		 * structure in addition to the requested amount of bytes. */
-		if( xWantedSize > 0 )
-		{
-			xWantedSize += xHeapStructSize;
+    /* Check the requested block size is not so large that the top bit is set.
+     * The top bit of the block size member of the BlockLink_t structure is used
+     * to determine who owns the block - the application or the kernel, so it
+     * must be free. */
+    if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
+    {
+        /* The wanted size is increased so it can contain a BlockLink_t
+         * structure in addition to the requested amount of bytes. */
+        if( xWantedSize > 0 )
+        {
+            xWantedSize += xHeapStructSize;
 
-			/* Ensure that blocks are always aligned to the required number of
-			 * bytes. */
-			if( ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) != 0x00 )
-			{
-				/* Byte alignment required. */
-				xWantedSize += ( secureportBYTE_ALIGNMENT - ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) );
-				secureportASSERT( ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) == 0 );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
+            /* Ensure that blocks are always aligned to the required number of
+             * bytes. */
+            if( ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) != 0x00 )
+            {
+                /* Byte alignment required. */
+                xWantedSize += ( secureportBYTE_ALIGNMENT - ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) );
+                secureportASSERT( ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) == 0 );
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
 
-		if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
-		{
-			/* Traverse the list from the start (lowest address) block until
-			 * one of adequate size is found. */
-			pxPreviousBlock = &xStart;
-			pxBlock = xStart.pxNextFreeBlock;
-			while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
-			{
-				pxPreviousBlock = pxBlock;
-				pxBlock = pxBlock->pxNextFreeBlock;
-			}
+        if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
+        {
+            /* Traverse the list from the start (lowest address) block until
+             * one of adequate size is found. */
+            pxPreviousBlock = &xStart;
+            pxBlock = xStart.pxNextFreeBlock;
 
-			/* If the end marker was reached then a block of adequate size was
-			 * not found. */
-			if( pxBlock != pxEnd )
-			{
-				/* Return the memory space pointed to - jumping over the
-				 * BlockLink_t structure at its start. */
-				pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
+            while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
+            {
+                pxPreviousBlock = pxBlock;
+                pxBlock = pxBlock->pxNextFreeBlock;
+            }
 
-				/* This block is being returned for use so must be taken out
-				 * of the list of free blocks. */
-				pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
+            /* If the end marker was reached then a block of adequate size was
+             * not found. */
+            if( pxBlock != pxEnd )
+            {
+                /* Return the memory space pointed to - jumping over the
+                 * BlockLink_t structure at its start. */
+                pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
 
-				/* If the block is larger than required it can be split into
-				 * two. */
-				if( ( pxBlock->xBlockSize - xWantedSize ) > secureheapMINIMUM_BLOCK_SIZE )
-				{
-					/* This block is to be split into two.  Create a new
-					 * block following the number of bytes requested. The void
-					 * cast is used to prevent byte alignment warnings from the
-					 * compiler. */
-					pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
-					secureportASSERT( ( ( ( size_t ) pxNewBlockLink ) & secureportBYTE_ALIGNMENT_MASK ) == 0 );
+                /* This block is being returned for use so must be taken out
+                 * of the list of free blocks. */
+                pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
 
-					/* Calculate the sizes of two blocks split from the single
-					 * block. */
-					pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
-					pxBlock->xBlockSize = xWantedSize;
+                /* If the block is larger than required it can be split into
+                 * two. */
+                if( ( pxBlock->xBlockSize - xWantedSize ) > secureheapMINIMUM_BLOCK_SIZE )
+                {
+                    /* This block is to be split into two.  Create a new
+                     * block following the number of bytes requested. The void
+                     * cast is used to prevent byte alignment warnings from the
+                     * compiler. */
+                    pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
+                    secureportASSERT( ( ( ( size_t ) pxNewBlockLink ) & secureportBYTE_ALIGNMENT_MASK ) == 0 );
 
-					/* Insert the new block into the list of free blocks. */
-					prvInsertBlockIntoFreeList( pxNewBlockLink );
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
+                    /* Calculate the sizes of two blocks split from the single
+                     * block. */
+                    pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
+                    pxBlock->xBlockSize = xWantedSize;
 
-				xFreeBytesRemaining -= pxBlock->xBlockSize;
+                    /* Insert the new block into the list of free blocks. */
+                    prvInsertBlockIntoFreeList( pxNewBlockLink );
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
 
-				if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
-				{
-					xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
+                xFreeBytesRemaining -= pxBlock->xBlockSize;
 
-				/* The block is being returned - it is allocated and owned by
-				 * the application and has no "next" block. */
-				pxBlock->xBlockSize |= xBlockAllocatedBit;
-				pxBlock->pxNextFreeBlock = NULL;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+                if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
+                {
+                    xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
 
-	traceMALLOC( pvReturn, xWantedSize );
+                /* The block is being returned - it is allocated and owned by
+                 * the application and has no "next" block. */
+                pxBlock->xBlockSize |= xBlockAllocatedBit;
+                pxBlock->pxNextFreeBlock = NULL;
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	#if( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
-	{
-		if( pvReturn == NULL )
-		{
-			extern void vApplicationMallocFailedHook( void );
-			vApplicationMallocFailedHook();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	#endif
+    traceMALLOC( pvReturn, xWantedSize );
 
-	secureportASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) secureportBYTE_ALIGNMENT_MASK ) == 0 );
-	return pvReturn;
+    #if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
+        {
+            if( pvReturn == NULL )
+            {
+                extern void vApplicationMallocFailedHook( void );
+                vApplicationMallocFailedHook();
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+    #endif /* if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 ) */
+
+    secureportASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) secureportBYTE_ALIGNMENT_MASK ) == 0 );
+    return pvReturn;
 }
 /*-----------------------------------------------------------*/
 
-void vPortFree( void *pv )
+void vPortFree( void * pv )
 {
-uint8_t *puc = ( uint8_t * ) pv;
-BlockLink_t *pxLink;
+    uint8_t * puc = ( uint8_t * ) pv;
+    BlockLink_t * pxLink;
 
-	if( pv != NULL )
-	{
-		/* The memory being freed will have an BlockLink_t structure immediately
-		 * before it. */
-		puc -= xHeapStructSize;
+    if( pv != NULL )
+    {
+        /* The memory being freed will have an BlockLink_t structure immediately
+         * before it. */
+        puc -= xHeapStructSize;
 
-		/* This casting is to keep the compiler from issuing warnings. */
-		pxLink = ( void * ) puc;
+        /* This casting is to keep the compiler from issuing warnings. */
+        pxLink = ( void * ) puc;
 
-		/* Check the block is actually allocated. */
-		secureportASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
-		secureportASSERT( pxLink->pxNextFreeBlock == NULL );
+        /* Check the block is actually allocated. */
+        secureportASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
+        secureportASSERT( pxLink->pxNextFreeBlock == NULL );
 
-		if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
-		{
-			if( pxLink->pxNextFreeBlock == NULL )
-			{
-				/* The block is being returned to the heap - it is no longer
-				 * allocated. */
-				pxLink->xBlockSize &= ~xBlockAllocatedBit;
+        if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
+        {
+            if( pxLink->pxNextFreeBlock == NULL )
+            {
+                /* The block is being returned to the heap - it is no longer
+                 * allocated. */
+                pxLink->xBlockSize &= ~xBlockAllocatedBit;
 
-				secureportDISABLE_NON_SECURE_INTERRUPTS();
-				{
-					/* Add this block to the list of free blocks. */
-					xFreeBytesRemaining += pxLink->xBlockSize;
-					traceFREE( pv, pxLink->xBlockSize );
-					prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
-				}
-				secureportENABLE_NON_SECURE_INTERRUPTS();
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
+                secureportDISABLE_NON_SECURE_INTERRUPTS();
+                {
+                    /* Add this block to the list of free blocks. */
+                    xFreeBytesRemaining += pxLink->xBlockSize;
+                    traceFREE( pv, pxLink->xBlockSize );
+                    prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
+                }
+                secureportENABLE_NON_SECURE_INTERRUPTS();
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
 }
 /*-----------------------------------------------------------*/
 
 size_t xPortGetFreeHeapSize( void )
 {
-	return xFreeBytesRemaining;
+    return xFreeBytesRemaining;
 }
 /*-----------------------------------------------------------*/
 
 size_t xPortGetMinimumEverFreeHeapSize( void )
 {
-	return xMinimumEverFreeBytesRemaining;
+    return xMinimumEverFreeBytesRemaining;
 }
 /*-----------------------------------------------------------*/
 
 void vPortInitialiseBlocks( void )
 {
-	/* This just exists to keep the linker quiet. */
+    /* This just exists to keep the linker quiet. */
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/GCC/ARM_CM23/secure/secure_heap.h b/portable/GCC/ARM_CM23/secure/secure_heap.h
index aa67e39d8..d507107cd 100644
--- a/portable/GCC/ARM_CM23/secure/secure_heap.h
+++ b/portable/GCC/ARM_CM23/secure/secure_heap.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -39,13 +39,13 @@
  * @return Pointer to the memory region if the allocation is successful, NULL
  * otherwise.
  */
-void *pvPortMalloc( size_t xWantedSize );
+void * pvPortMalloc( size_t xWantedSize );
 
 /**
  * @brief Frees the previously allocated memory.
  *
  * @param[in] pv Pointer to the memory to be freed.
  */
-void vPortFree( void *pv );
+void vPortFree( void * pv );
 
 #endif /* __SECURE_HEAP_H__ */
diff --git a/portable/GCC/ARM_CM23/secure/secure_init.c b/portable/GCC/ARM_CM23/secure/secure_init.c
index 629186130..40b115f53 100644
--- a/portable/GCC/ARM_CM23/secure/secure_init.c
+++ b/portable/GCC/ARM_CM23/secure/secure_init.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -37,69 +37,69 @@
 /**
  * @brief Constants required to manipulate the SCB.
  */
-#define secureinitSCB_AIRCR					( ( volatile uint32_t * ) 0xe000ed0c )  /* Application Interrupt and Reset Control Register. */
-#define secureinitSCB_AIRCR_VECTKEY_POS		( 16UL )
-#define secureinitSCB_AIRCR_VECTKEY_MASK	( 0xFFFFUL << secureinitSCB_AIRCR_VECTKEY_POS )
-#define secureinitSCB_AIRCR_PRIS_POS		( 14UL )
-#define secureinitSCB_AIRCR_PRIS_MASK		( 1UL << secureinitSCB_AIRCR_PRIS_POS )
+#define secureinitSCB_AIRCR                 ( ( volatile uint32_t * ) 0xe000ed0c )  /* Application Interrupt and Reset Control Register. */
+#define secureinitSCB_AIRCR_VECTKEY_POS     ( 16UL )
+#define secureinitSCB_AIRCR_VECTKEY_MASK    ( 0xFFFFUL << secureinitSCB_AIRCR_VECTKEY_POS )
+#define secureinitSCB_AIRCR_PRIS_POS        ( 14UL )
+#define secureinitSCB_AIRCR_PRIS_MASK       ( 1UL << secureinitSCB_AIRCR_PRIS_POS )
 
 /**
  * @brief Constants required to manipulate the FPU.
  */
-#define secureinitFPCCR						( ( volatile uint32_t * ) 0xe000ef34 )  /* Floating Point Context Control Register. */
-#define secureinitFPCCR_LSPENS_POS			( 29UL )
-#define secureinitFPCCR_LSPENS_MASK			( 1UL << secureinitFPCCR_LSPENS_POS )
-#define secureinitFPCCR_TS_POS				( 26UL )
-#define secureinitFPCCR_TS_MASK				( 1UL << secureinitFPCCR_TS_POS )
+#define secureinitFPCCR                     ( ( volatile uint32_t * ) 0xe000ef34 )  /* Floating Point Context Control Register. */
+#define secureinitFPCCR_LSPENS_POS          ( 29UL )
+#define secureinitFPCCR_LSPENS_MASK         ( 1UL << secureinitFPCCR_LSPENS_POS )
+#define secureinitFPCCR_TS_POS              ( 26UL )
+#define secureinitFPCCR_TS_MASK             ( 1UL << secureinitFPCCR_TS_POS )
 
-#define secureinitNSACR						( ( volatile uint32_t * ) 0xe000ed8c )  /* Non-secure Access Control Register. */
-#define secureinitNSACR_CP10_POS			( 10UL )
-#define secureinitNSACR_CP10_MASK			( 1UL << secureinitNSACR_CP10_POS )
-#define secureinitNSACR_CP11_POS			( 11UL )
-#define secureinitNSACR_CP11_MASK			( 1UL << secureinitNSACR_CP11_POS )
+#define secureinitNSACR                     ( ( volatile uint32_t * ) 0xe000ed8c )  /* Non-secure Access Control Register. */
+#define secureinitNSACR_CP10_POS            ( 10UL )
+#define secureinitNSACR_CP10_MASK           ( 1UL << secureinitNSACR_CP10_POS )
+#define secureinitNSACR_CP11_POS            ( 11UL )
+#define secureinitNSACR_CP11_MASK           ( 1UL << secureinitNSACR_CP11_POS )
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureInit_DePrioritizeNSExceptions( void )
 {
-	uint32_t ulIPSR;
+    uint32_t ulIPSR;
 
-	 /* Read the Interrupt Program Status Register (IPSR) value. */
-	secureportREAD_IPSR( ulIPSR );
+    /* Read the Interrupt Program Status Register (IPSR) value. */
+    secureportREAD_IPSR( ulIPSR );
 
-	/* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-	 * when the processor is running in the Thread Mode. */
-	if( ulIPSR != 0 )
-	{
-		*( secureinitSCB_AIRCR ) =	( *( secureinitSCB_AIRCR ) & ~( secureinitSCB_AIRCR_VECTKEY_MASK | secureinitSCB_AIRCR_PRIS_MASK ) ) |
-									( ( 0x05FAUL << secureinitSCB_AIRCR_VECTKEY_POS ) & secureinitSCB_AIRCR_VECTKEY_MASK ) |
-									( ( 0x1UL	<< secureinitSCB_AIRCR_PRIS_POS )	& secureinitSCB_AIRCR_PRIS_MASK );
-	}
+    /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
+     * when the processor is running in the Thread Mode. */
+    if( ulIPSR != 0 )
+    {
+        *( secureinitSCB_AIRCR ) = ( *( secureinitSCB_AIRCR ) & ~( secureinitSCB_AIRCR_VECTKEY_MASK | secureinitSCB_AIRCR_PRIS_MASK ) ) |
+                                   ( ( 0x05FAUL << secureinitSCB_AIRCR_VECTKEY_POS ) & secureinitSCB_AIRCR_VECTKEY_MASK ) |
+                                   ( ( 0x1UL << secureinitSCB_AIRCR_PRIS_POS ) & secureinitSCB_AIRCR_PRIS_MASK );
+    }
 }
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureInit_EnableNSFPUAccess( void )
 {
-	uint32_t ulIPSR;
+    uint32_t ulIPSR;
 
-	 /* Read the Interrupt Program Status Register (IPSR) value. */
-	secureportREAD_IPSR( ulIPSR );
+    /* Read the Interrupt Program Status Register (IPSR) value. */
+    secureportREAD_IPSR( ulIPSR );
 
-	/* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-	 * when the processor is running in the Thread Mode. */
-	if( ulIPSR != 0 )
-	{
-		/* CP10 = 1 ==> Non-secure access to the Floating Point Unit is
-		 * permitted. CP11 should be programmed to the same value as CP10. */
-		*( secureinitNSACR ) |= ( secureinitNSACR_CP10_MASK | secureinitNSACR_CP11_MASK );
+    /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
+     * when the processor is running in the Thread Mode. */
+    if( ulIPSR != 0 )
+    {
+        /* CP10 = 1 ==> Non-secure access to the Floating Point Unit is
+         * permitted. CP11 should be programmed to the same value as CP10. */
+        *( secureinitNSACR ) |= ( secureinitNSACR_CP10_MASK | secureinitNSACR_CP11_MASK );
 
-		/* LSPENS = 0 ==> LSPEN is writable fron non-secure state. This ensures
-		 * that we can enable/disable lazy stacking in port.c file. */
-		*( secureinitFPCCR ) &= ~ ( secureinitFPCCR_LSPENS_MASK );
+        /* LSPENS = 0 ==> LSPEN is writable fron non-secure state. This ensures
+         * that we can enable/disable lazy stacking in port.c file. */
+        *( secureinitFPCCR ) &= ~( secureinitFPCCR_LSPENS_MASK );
 
-		/* TS = 1 ==> Treat FP registers as secure i.e. callee saved FP
-		 * registers (S16-S31) are also pushed to stack on exception entry and
-		 * restored on exception return. */
-		*( secureinitFPCCR ) |= ( secureinitFPCCR_TS_MASK );
-	}
+        /* TS = 1 ==> Treat FP registers as secure i.e. callee saved FP
+         * registers (S16-S31) are also pushed to stack on exception entry and
+         * restored on exception return. */
+        *( secureinitFPCCR ) |= ( secureinitFPCCR_TS_MASK );
+    }
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/GCC/ARM_CM23/secure/secure_init.h b/portable/GCC/ARM_CM23/secure/secure_init.h
index 643873468..c40ef3d8d 100644
--- a/portable/GCC/ARM_CM23/secure/secure_init.h
+++ b/portable/GCC/ARM_CM23/secure/secure_init.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ARM_CM23/secure/secure_port_macros.h b/portable/GCC/ARM_CM23/secure/secure_port_macros.h
index 14ed3f022..d495a0e02 100644
--- a/portable/GCC/ARM_CM23/secure/secure_port_macros.h
+++ b/portable/GCC/ARM_CM23/secure/secure_port_macros.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -31,103 +31,103 @@
 /**
  * @brief Byte alignment requirements.
  */
-#define secureportBYTE_ALIGNMENT					8
-#define secureportBYTE_ALIGNMENT_MASK				( 0x0007 )
+#define secureportBYTE_ALIGNMENT         8
+#define secureportBYTE_ALIGNMENT_MASK    ( 0x0007 )
 
 /**
  * @brief Macro to declare a function as non-secure callable.
  */
 #if defined( __IAR_SYSTEMS_ICC__ )
-	#define secureportNON_SECURE_CALLABLE			__cmse_nonsecure_entry __root
+    #define secureportNON_SECURE_CALLABLE    __cmse_nonsecure_entry __root
 #else
-	#define secureportNON_SECURE_CALLABLE			__attribute__((cmse_nonsecure_entry)) __attribute__((used))
+    #define secureportNON_SECURE_CALLABLE    __attribute__( ( cmse_nonsecure_entry ) ) __attribute__( ( used ) )
 #endif
 
 /**
  * @brief Set the secure PRIMASK value.
  */
 #define secureportSET_SECURE_PRIMASK( ulPrimaskValue ) \
-	__asm volatile ( "msr primask, %0" : : "r" ( ulPrimaskValue ) : "memory" )
+    __asm volatile ( "msr primask, %0" : : "r" ( ulPrimaskValue ) : "memory" )
 
 /**
  * @brief Set the non-secure PRIMASK value.
  */
 #define secureportSET_NON_SECURE_PRIMASK( ulPrimaskValue ) \
-	__asm volatile ( "msr primask_ns, %0" : : "r" ( ulPrimaskValue ) : "memory" )
+    __asm volatile ( "msr primask_ns, %0" : : "r" ( ulPrimaskValue ) : "memory" )
 
 /**
  * @brief Read the PSP value in the given variable.
  */
 #define secureportREAD_PSP( pucOutCurrentStackPointer ) \
-	__asm volatile ( "mrs %0, psp"  : "=r" ( pucOutCurrentStackPointer ) )
+    __asm volatile ( "mrs %0, psp"  : "=r" ( pucOutCurrentStackPointer ) )
 
 /**
  * @brief Set the PSP to the given value.
  */
 #define secureportSET_PSP( pucCurrentStackPointer ) \
-	__asm volatile ( "msr psp, %0" : : "r" ( pucCurrentStackPointer ) )
+    __asm volatile ( "msr psp, %0" : : "r" ( pucCurrentStackPointer ) )
 
 /**
  * @brief Set the PSPLIM to the given value.
  */
 #define secureportSET_PSPLIM( pucStackLimit ) \
-	__asm volatile ( "msr psplim, %0" : : "r" ( pucStackLimit ) )
+    __asm volatile ( "msr psplim, %0" : : "r" ( pucStackLimit ) )
 
 /**
  * @brief Set the NonSecure MSP to the given value.
  */
 #define secureportSET_MSP_NS( pucMainStackPointer ) \
-	__asm volatile ( "msr msp_ns, %0" : : "r" ( pucMainStackPointer ) )
+    __asm volatile ( "msr msp_ns, %0" : : "r" ( pucMainStackPointer ) )
 
 /**
  * @brief Set the CONTROL register to the given value.
  */
 #define secureportSET_CONTROL( ulControl ) \
-	__asm volatile ( "msr control, %0" : : "r" ( ulControl ) : "memory" )
+    __asm volatile ( "msr control, %0" : : "r" ( ulControl ) : "memory" )
 
 /**
  * @brief Read the Interrupt Program Status Register (IPSR) value in the given
  * variable.
  */
 #define secureportREAD_IPSR( ulIPSR ) \
-	__asm volatile ( "mrs %0, ipsr"  : "=r" ( ulIPSR ) )
+    __asm volatile ( "mrs %0, ipsr"  : "=r" ( ulIPSR ) )
 
 /**
  * @brief PRIMASK value to enable interrupts.
  */
-#define secureportPRIMASK_ENABLE_INTERRUPTS_VAL		0
+#define secureportPRIMASK_ENABLE_INTERRUPTS_VAL     0
 
 /**
  * @brief PRIMASK value to disable interrupts.
  */
-#define secureportPRIMASK_DISABLE_INTERRUPTS_VAL	1
+#define secureportPRIMASK_DISABLE_INTERRUPTS_VAL    1
 
 /**
  * @brief Disable secure interrupts.
  */
-#define secureportDISABLE_SECURE_INTERRUPTS()		secureportSET_SECURE_PRIMASK( secureportPRIMASK_DISABLE_INTERRUPTS_VAL )
+#define secureportDISABLE_SECURE_INTERRUPTS()        secureportSET_SECURE_PRIMASK( secureportPRIMASK_DISABLE_INTERRUPTS_VAL )
 
 /**
  * @brief Disable non-secure interrupts.
  *
  * This effectively disables context switches.
  */
-#define secureportDISABLE_NON_SECURE_INTERRUPTS()	secureportSET_NON_SECURE_PRIMASK( secureportPRIMASK_DISABLE_INTERRUPTS_VAL )
+#define secureportDISABLE_NON_SECURE_INTERRUPTS()    secureportSET_NON_SECURE_PRIMASK( secureportPRIMASK_DISABLE_INTERRUPTS_VAL )
 
 /**
  * @brief Enable non-secure interrupts.
  */
-#define secureportENABLE_NON_SECURE_INTERRUPTS()	secureportSET_NON_SECURE_PRIMASK( secureportPRIMASK_ENABLE_INTERRUPTS_VAL )
+#define secureportENABLE_NON_SECURE_INTERRUPTS()     secureportSET_NON_SECURE_PRIMASK( secureportPRIMASK_ENABLE_INTERRUPTS_VAL )
 
 /**
  * @brief Assert definition.
  */
-#define secureportASSERT( x )						\
-	if( ( x ) == 0 )								\
-	{												\
-		secureportDISABLE_SECURE_INTERRUPTS();		\
-		secureportDISABLE_NON_SECURE_INTERRUPTS();	\
-		for( ;; );									\
-	}
+#define secureportASSERT( x )                      \
+    if( ( x ) == 0 )                               \
+    {                                              \
+        secureportDISABLE_SECURE_INTERRUPTS();     \
+        secureportDISABLE_NON_SECURE_INTERRUPTS(); \
+        for( ; ; ) {; }                            \
+    }
 
 #endif /* __SECURE_PORT_MACROS_H__ */
diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c
index ba6bd2602..1923a9f39 100644
--- a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c
+++ b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c
@@ -1,1149 +1,1193 @@
-/*
- * FreeRTOS Kernel V10.3.1
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
- * all the API functions to use the MPU wrappers. That should only be done when
- * task.h is included from an application file. */
-#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-/* Scheduler includes. */
-#include "FreeRTOS.h"
-#include "task.h"
-
-/* MPU wrappers includes. */
-#include "mpu_wrappers.h"
-
-/* Portasm includes. */
-#include "portasm.h"
-
-#if( configENABLE_TRUSTZONE == 1 )
-	/* Secure components includes. */
-	#include "secure_context.h"
-	#include "secure_init.h"
-#endif /* configENABLE_TRUSTZONE */
-
-#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-/**
- * The FreeRTOS Cortex M33 port can be configured to run on the Secure Side only
- * i.e. the processor boots as secure and never jumps to the non-secure side.
- * The Trust Zone support in the port must be disabled in order to run FreeRTOS
- * on the secure side. The following are the valid configuration seetings:
- *
- * 1. Run FreeRTOS on the Secure Side:
- *		configRUN_FREERTOS_SECURE_ONLY = 1 and configENABLE_TRUSTZONE = 0
- *
- * 2. Run FreeRTOS on the Non-Secure Side with Secure Side function call support:
- *		configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 1
- *
- * 3. Run FreeRTOS on the Non-Secure Side only i.e. no Secure Side function call support:
- *		configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 0
- */
-#if( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) )
-	#error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side.
-#endif
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Constants required to manipulate the NVIC.
- */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portMIN_INTERRUPT_PRIORITY			( 255UL )
-#define portNVIC_PENDSV_PRI					( portMIN_INTERRUPT_PRIORITY << 16UL )
-#define portNVIC_SYSTICK_PRI				( portMIN_INTERRUPT_PRIORITY << 24UL )
-#ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ			configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT		( 1UL << 2UL )
-#else
-	/* The way the SysTick is clocked is not modified in case it is not the
-	 * same a the core. */
-	#define portNVIC_SYSTICK_CLK_BIT		( 0 )
-#endif
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Constants required to manipulate the SCB.
- */
-#define portSCB_SYS_HANDLER_CTRL_STATE_REG	( * ( volatile uint32_t * ) 0xe000ed24 )
-#define portSCB_MEM_FAULT_ENABLE_BIT		( 1UL << 16UL )
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Constants required to manipulate the FPU.
- */
-#define portCPACR							( ( volatile uint32_t * ) 0xe000ed88 )	/* Coprocessor Access Control Register. */
-#define portCPACR_CP10_VALUE				( 3UL )
-#define portCPACR_CP11_VALUE				portCPACR_CP10_VALUE
-#define portCPACR_CP10_POS					( 20UL )
-#define portCPACR_CP11_POS					( 22UL )
-
-#define portFPCCR							( ( volatile uint32_t * ) 0xe000ef34 )	/* Floating Point Context Control Register. */
-#define portFPCCR_ASPEN_POS					( 31UL )
-#define portFPCCR_ASPEN_MASK				( 1UL << portFPCCR_ASPEN_POS )
-#define portFPCCR_LSPEN_POS					( 30UL )
-#define portFPCCR_LSPEN_MASK				( 1UL << portFPCCR_LSPEN_POS )
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Constants required to manipulate the MPU.
- */
-#define portMPU_TYPE_REG					( * ( ( volatile uint32_t * ) 0xe000ed90 ) )
-#define portMPU_CTRL_REG					( * ( ( volatile uint32_t * ) 0xe000ed94 ) )
-#define portMPU_RNR_REG						( * ( ( volatile uint32_t * ) 0xe000ed98 ) )
-
-#define portMPU_RBAR_REG					( * ( ( volatile uint32_t * ) 0xe000ed9c ) )
-#define portMPU_RLAR_REG					( * ( ( volatile uint32_t * ) 0xe000eda0 ) )
-
-#define portMPU_RBAR_A1_REG					( * ( ( volatile uint32_t * ) 0xe000eda4 ) )
-#define portMPU_RLAR_A1_REG					( * ( ( volatile uint32_t * ) 0xe000eda8 ) )
-
-#define portMPU_RBAR_A2_REG					( * ( ( volatile uint32_t * ) 0xe000edac ) )
-#define portMPU_RLAR_A2_REG					( * ( ( volatile uint32_t * ) 0xe000edb0 ) )
-
-#define portMPU_RBAR_A3_REG					( * ( ( volatile uint32_t * ) 0xe000edb4 ) )
-#define portMPU_RLAR_A3_REG					( * ( ( volatile uint32_t * ) 0xe000edb8 ) )
-
-#define portMPU_MAIR0_REG					( * ( ( volatile uint32_t * ) 0xe000edc0 ) )
-#define portMPU_MAIR1_REG					( * ( ( volatile uint32_t * ) 0xe000edc4 ) )
-
-#define portMPU_RBAR_ADDRESS_MASK			( 0xffffffe0 ) /* Must be 32-byte aligned. */
-#define portMPU_RLAR_ADDRESS_MASK			( 0xffffffe0 ) /* Must be 32-byte aligned. */
-
-#define portMPU_MAIR_ATTR0_POS				( 0UL )
-#define portMPU_MAIR_ATTR0_MASK				( 0x000000ff )
-
-#define portMPU_MAIR_ATTR1_POS				( 8UL )
-#define portMPU_MAIR_ATTR1_MASK				( 0x0000ff00 )
-
-#define portMPU_MAIR_ATTR2_POS				( 16UL )
-#define portMPU_MAIR_ATTR2_MASK				( 0x00ff0000 )
-
-#define portMPU_MAIR_ATTR3_POS				( 24UL )
-#define portMPU_MAIR_ATTR3_MASK				( 0xff000000 )
-
-#define portMPU_MAIR_ATTR4_POS				( 0UL )
-#define portMPU_MAIR_ATTR4_MASK				( 0x000000ff )
-
-#define portMPU_MAIR_ATTR5_POS				( 8UL )
-#define portMPU_MAIR_ATTR5_MASK				( 0x0000ff00 )
-
-#define portMPU_MAIR_ATTR6_POS				( 16UL )
-#define portMPU_MAIR_ATTR6_MASK				( 0x00ff0000 )
-
-#define portMPU_MAIR_ATTR7_POS				( 24UL )
-#define portMPU_MAIR_ATTR7_MASK				( 0xff000000 )
-
-#define portMPU_RLAR_ATTR_INDEX0			( 0UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX1			( 1UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX2			( 2UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX3			( 3UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX4			( 4UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX5			( 5UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX6			( 6UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX7			( 7UL << 1UL )
-
-#define portMPU_RLAR_REGION_ENABLE			( 1UL )
-
-/* Enable privileged access to unmapped region. */
-#define portMPU_PRIV_BACKGROUND_ENABLE_BIT	( 1UL << 2UL )
-
-/* Enable MPU. */
-#define portMPU_ENABLE_BIT					( 1UL << 0UL )
-
-/* Expected value of the portMPU_TYPE register. */
-#define portEXPECTED_MPU_TYPE_VALUE			( 8UL << 8UL ) /* 8 regions, unified. */
-/*-----------------------------------------------------------*/
-
-/**
- * @brief The maximum 24-bit number.
- *
- * It is needed because the systick is a 24-bit counter.
- */
-#define portMAX_24_BIT_NUMBER				( 0xffffffUL )
-
-/**
- * @brief A fiddle factor to estimate the number of SysTick counts that would
- * have occurred while the SysTick counter is stopped during tickless idle
- * calculations.
- */
-#define portMISSED_COUNTS_FACTOR			( 45UL )
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Constants required to set up the initial stack.
- */
-#define portINITIAL_XPSR					( 0x01000000 )
-
-#if( configRUN_FREERTOS_SECURE_ONLY == 1 )
-	/**
-	 * @brief Initial EXC_RETURN value.
-	 *
-	 *     FF         FF         FF         FD
-	 * 1111 1111  1111 1111  1111 1111  1111 1101
-	 *
-	 * Bit[6] - 1 --> The exception was taken from the Secure state.
-	 * Bit[5] - 1 --> Do not skip stacking of additional state context.
-	 * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
-	 * Bit[3] - 1 --> Return to the Thread mode.
-	 * Bit[2] - 1 --> Restore registers from the process stack.
-	 * Bit[1] - 0 --> Reserved, 0.
-	 * Bit[0] - 1 --> The exception was taken to the Secure state.
-	 */
-	#define portINITIAL_EXC_RETURN			( 0xfffffffd )
-#else
-	/**
-	 * @brief Initial EXC_RETURN value.
-	 *
-	 *     FF         FF         FF         BC
-	 * 1111 1111  1111 1111  1111 1111  1011 1100
-	 *
-	 * Bit[6] - 0 --> The exception was taken from the Non-Secure state.
-	 * Bit[5] - 1 --> Do not skip stacking of additional state context.
-	 * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
-	 * Bit[3] - 1 --> Return to the Thread mode.
-	 * Bit[2] - 1 --> Restore registers from the process stack.
-	 * Bit[1] - 0 --> Reserved, 0.
-	 * Bit[0] - 0 --> The exception was taken to the Non-Secure state.
-	 */
-	#define portINITIAL_EXC_RETURN			( 0xffffffbc )
-#endif /* configRUN_FREERTOS_SECURE_ONLY */
-
-/**
- * @brief CONTROL register privileged bit mask.
- *
- * Bit[0] in CONTROL register tells the privilege:
- *  Bit[0] = 0 ==> The task is privileged.
- *  Bit[0] = 1 ==> The task is not privileged.
- */
-#define portCONTROL_PRIVILEGED_MASK			( 1UL << 0UL )
-
-/**
- * @brief Initial CONTROL register values.
- */
-#define portINITIAL_CONTROL_UNPRIVILEGED	( 0x3 )
-#define portINITIAL_CONTROL_PRIVILEGED		( 0x2 )
-
-/**
- * @brief Let the user override the pre-loading of the initial LR with the
- * address of prvTaskExitError() in case it messes up unwinding of the stack
- * in the debugger.
- */
-#ifdef configTASK_RETURN_ADDRESS
-	#define portTASK_RETURN_ADDRESS			configTASK_RETURN_ADDRESS
-#else
-	#define portTASK_RETURN_ADDRESS			prvTaskExitError
-#endif
-
-/**
- * @brief If portPRELOAD_REGISTERS then registers will be given an initial value
- * when a task is created. This helps in debugging at the cost of code size.
- */
-#define portPRELOAD_REGISTERS				1
-
-/**
- * @brief A task is created without a secure context, and must call
- * portALLOCATE_SECURE_CONTEXT() to give itself a secure context before it makes
- * any secure calls.
- */
-#define portNO_SECURE_CONTEXT				0
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Used to catch tasks that attempt to return from their implementing
- * function.
- */
-static void prvTaskExitError( void );
-
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Setup the Memory Protection Unit (MPU).
-	 */
-	static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
-#endif /* configENABLE_MPU */
-
-#if( configENABLE_FPU == 1 )
-	/**
-	 * @brief Setup the Floating Point Unit (FPU).
-	 */
-	static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;
-#endif /* configENABLE_FPU */
-
-/**
- * @brief Setup the timer to generate the tick interrupts.
- *
- * The implementation in this file is weak to allow application writers to
- * change the timer used to generate the tick interrupt.
- */
-void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;
-
-/**
- * @brief Checks whether the current execution context is interrupt.
- *
- * @return pdTRUE if the current execution context is interrupt, pdFALSE
- * otherwise.
- */
-BaseType_t xPortIsInsideInterrupt( void );
-
-/**
- * @brief Yield the processor.
- */
-void vPortYield( void ) PRIVILEGED_FUNCTION;
-
-/**
- * @brief Enter critical section.
- */
-void vPortEnterCritical( void ) PRIVILEGED_FUNCTION;
-
-/**
- * @brief Exit from critical section.
- */
-void vPortExitCritical( void ) PRIVILEGED_FUNCTION;
-
-/**
- * @brief SysTick handler.
- */
-void SysTick_Handler( void ) PRIVILEGED_FUNCTION;
-
-/**
- * @brief C part of SVC handler.
- */
-portDONT_DISCARD void vPortSVCHandler_C( uint32_t *pulCallerStackAddress ) PRIVILEGED_FUNCTION;
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Each task maintains its own interrupt status in the critical nesting
- * variable.
- */
-static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
-
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Saved as part of the task context to indicate which context the
-	 * task is using on the secure side.
-	 */
-	portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
-#endif /* configENABLE_TRUSTZONE */
-
-#if( configUSE_TICKLESS_IDLE == 1 )
-	/**
-	 * @brief The number of SysTick increments that make up one tick period.
-	 */
-	static uint32_t ulTimerCountsForOneTick = 0;
-
-	/**
-	 * @brief The maximum number of tick periods that can be suppressed is
-	 * limited by the 24 bit resolution of the SysTick timer.
-	 */
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
-
-	/**
-	 * @brief Compensate for the CPU cycles that pass while the SysTick is
-	 * stopped (low power functionality only).
-	 */
-	static uint32_t ulStoppedTimerCompensation = 0;
-#endif /* configUSE_TICKLESS_IDLE */
-/*-----------------------------------------------------------*/
-
-#if( configUSE_TICKLESS_IDLE == 1 )
-	__attribute__(( weak )) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-	{
-	uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
-	TickType_t xModifiableIdleTime;
-
-		/* Make sure the SysTick reload value does not overflow the counter. */
-		if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-		{
-			xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-		}
-
-		/* Stop the SysTick momentarily. The time the SysTick is stopped for is
-		 * accounted for as best it can be, but using the tickless mode will
-		 * inevitably result in some tiny drift of the time maintained by the
-		 * kernel with respect to calendar time. */
-		portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
-
-		/* Calculate the reload value required to wait xExpectedIdleTime
-		 * tick periods. -1 is used because this code will execute part way
-		 * through one of the tick periods. */
-		ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-		if( ulReloadValue > ulStoppedTimerCompensation )
-		{
-			ulReloadValue -= ulStoppedTimerCompensation;
-		}
-
-		/* Enter a critical section but don't use the taskENTER_CRITICAL()
-		 * method as that will mask interrupts that should exit sleep mode. */
-		__asm volatile( "cpsid i" ::: "memory" );
-		__asm volatile( "dsb" );
-		__asm volatile( "isb" );
-
-		/* If a context switch is pending or a task is waiting for the scheduler
-		 * to be un-suspended then abandon the low power entry. */
-		if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-		{
-			/* Restart from whatever is left in the count register to complete
-			 * this tick period. */
-			portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
-
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-
-			/* Reset the reload register to the value required for normal tick
-			 * periods. */
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
-
-			/* Re-enable interrupts - see comments above the cpsid instruction()
-			 * above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-		else
-		{
-			/* Set the new reload value. */
-			portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
-
-			/* Clear the SysTick count flag and set the count value back to
-			 * zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-
-			/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
-			 * set its parameter to 0 to indicate that its implementation
-			 * contains its own wait for interrupt or wait for event
-			 * instruction, and so wfi should not be executed again. However,
-			 * the original expected idle time variable must remain unmodified,
-			 * so a copy is taken. */
-			xModifiableIdleTime = xExpectedIdleTime;
-			configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-			if( xModifiableIdleTime > 0 )
-			{
-				__asm volatile( "dsb" ::: "memory" );
-				__asm volatile( "wfi" );
-				__asm volatile( "isb" );
-			}
-			configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
-
-			/* Re-enable interrupts to allow the interrupt that brought the MCU
-			 * out of sleep mode to execute immediately. See comments above
-			 * the cpsid instruction above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
-
-			/* Disable interrupts again because the clock is about to be stopped
-			 * and interrupts that execute while the clock is stopped will
-			 * increase any slippage between the time maintained by the RTOS and
-			 * calendar time. */
-			__asm volatile( "cpsid i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
-
-			/* Disable the SysTick clock without reading the
-			 * portNVIC_SYSTICK_CTRL_REG register to ensure the
-			 * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
-			 * Again, the time the SysTick is stopped for is accounted for as
-			 * best it can be, but using the tickless mode will inevitably
-			 * result in some tiny drift of the time maintained by the kernel
-			 * with respect to calendar time*/
-			portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
-
-			/* Determine if the SysTick clock has already counted to zero and
-			 * been set back to the current reload value (the reload back being
-			 * correct for the entire expected idle time) or if the SysTick is
-			 * yet to count to zero (in which case an interrupt other than the
-			 * SysTick must have brought the system out of sleep mode). */
-			if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-			{
-				uint32_t ulCalculatedLoadValue;
-
-				/* The tick interrupt is already pending, and the SysTick count
-				 * reloaded with ulReloadValue.  Reset the
-				 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
-				 * period. */
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
-
-				/* Don't allow a tiny value, or values that have somehow
-				 * underflowed because the post sleep hook did something
-				 * that took too long. */
-				if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-				{
-					ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-				}
-
-				portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
-
-				/* As the pending tick will be processed as soon as this
-				 * function exits, the tick value maintained by the tick is
-				 * stepped forward by one less than the time spent waiting. */
-				ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-			}
-			else
-			{
-				/* Something other than the tick interrupt ended the sleep.
-				 * Work out how long the sleep lasted rounded to complete tick
-				 * periods (not the ulReload value which accounted for part
-				 * ticks). */
-				ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
-
-				/* How many complete tick periods passed while the processor
-				 * was waiting? */
-				ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
-
-				/* The reload value is set to whatever fraction of a single tick
-				 * period remains. */
-				portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-			}
-
-			/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
-			 * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
-			 * value. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-			vTaskStepTick( ulCompleteTickPeriods );
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
-
-			/* Exit with interrupts enabled. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-	}
-#endif /* configUSE_TICKLESS_IDLE */
-/*-----------------------------------------------------------*/
-
-__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
-{
-	/* Calculate the constants required to configure the tick interrupt. */
-	#if( configUSE_TICKLESS_IDLE == 1 )
-	{
-		ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
-		xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
-	}
-	#endif /* configUSE_TICKLESS_IDLE */
-
-	/* Stop and reset the SysTick. */
-	portNVIC_SYSTICK_CTRL_REG = 0UL;
-	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-
-	/* Configure SysTick to interrupt at the requested rate. */
-	portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
-}
-/*-----------------------------------------------------------*/
-
-static void prvTaskExitError( void )
-{
-volatile uint32_t ulDummy = 0UL;
-
-	/* A function that implements a task must not exit or attempt to return to
-	 * its caller as there is nothing to return to. If a task wants to exit it
-	 * should instead call vTaskDelete( NULL ). Artificially force an assert()
-	 * to be triggered if configASSERT() is defined, then stop here so
-	 * application writers can catch the error. */
-	configASSERT( ulCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
-
-	while( ulDummy == 0 )
-	{
-		/* This file calls prvTaskExitError() after the scheduler has been
-		 * started to remove a compiler warning about the function being
-		 * defined but never called.  ulDummy is used purely to quieten other
-		 * warnings about code appearing after this function is called - making
-		 * ulDummy volatile makes the compiler think the function could return
-		 * and therefore not output an 'unreachable code' warning for code that
-		 * appears after it. */
-	}
-}
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_MPU == 1 )
-	static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
-	{
-	#if defined( __ARMCC_VERSION )
-		/* Declaration when these variable are defined in code instead of being
-		 * exported from linker scripts. */
-		extern uint32_t * __privileged_functions_start__;
-		extern uint32_t * __privileged_functions_end__;
-		extern uint32_t * __syscalls_flash_start__;
-		extern uint32_t * __syscalls_flash_end__;
-		extern uint32_t * __unprivileged_flash_start__;
-		extern uint32_t * __unprivileged_flash_end__;
-		extern uint32_t * __privileged_sram_start__;
-		extern uint32_t * __privileged_sram_end__;
-	#else
-		/* Declaration when these variable are exported from linker scripts. */
-		extern uint32_t __privileged_functions_start__[];
-		extern uint32_t __privileged_functions_end__[];
-		extern uint32_t __syscalls_flash_start__[];
-		extern uint32_t __syscalls_flash_end__[];
-		extern uint32_t __unprivileged_flash_start__[];
-		extern uint32_t __unprivileged_flash_end__[];
-		extern uint32_t __privileged_sram_start__[];
-		extern uint32_t __privileged_sram_end__[];
-	#endif /* defined( __ARMCC_VERSION ) */
-
-		/* Check that the MPU is present. */
-		if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
-		{
-			/* MAIR0 - Index 0. */
-			portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
-			/* MAIR0 - Index 1. */
-			portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
-
-			/* Setup privileged flash as Read Only so that privileged tasks can
-			 * read it but not modify. */
-			portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_PRIVILEGED_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
-
-			/* Setup unprivileged flash as Read Only by both privileged and
-			 * unprivileged tasks. All tasks can read it but no-one can modify. */
-			portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
-
-			/* Setup unprivileged syscalls flash as Read Only by both privileged
-			 * and unprivileged tasks. All tasks can read it but no-one can modify. */
-			portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
-
-			/* Setup RAM containing kernel data for privileged access only. */
-			portMPU_RNR_REG = portPRIVILEGED_RAM_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
-								( portMPU_REGION_EXECUTE_NEVER );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
-
-			/* Enable mem fault. */
-			portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
-
-			/* Enable MPU with privileged background access i.e. unmapped
-			 * regions have privileged access. */
-			portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
-		}
-	}
-#endif /* configENABLE_MPU */
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_FPU == 1 )
-	static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
-	{
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			/* Enable non-secure access to the FPU. */
-			SecureInit_EnableNSFPUAccess();
-		}
-		#endif /* configENABLE_TRUSTZONE */
-
-		/* CP10 = 11 ==> Full access to FPU i.e. both privileged and
-		 * unprivileged code should be able to access FPU. CP11 should be
-		 * programmed to the same value as CP10. */
-		*( portCPACR ) |=	(	( portCPACR_CP10_VALUE << portCPACR_CP10_POS ) |
-								( portCPACR_CP11_VALUE << portCPACR_CP11_POS )
-							);
-
-		/* ASPEN = 1 ==> Hardware should automatically preserve floating point
-		 * context on exception entry and restore on exception return.
-		 * LSPEN = 1 ==> Enable lazy context save of FP state. */
-		*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
-	}
-#endif /* configENABLE_FPU */
-/*-----------------------------------------------------------*/
-
-void vPortYield( void ) /* PRIVILEGED_FUNCTION */
-{
-	/* Set a PendSV to request a context switch. */
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-
-	/* Barriers are normally not required but do ensure the code is
-	 * completely within the specified behaviour for the architecture. */
-	__asm volatile( "dsb" ::: "memory" );
-	__asm volatile( "isb" );
-}
-/*-----------------------------------------------------------*/
-
-void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */
-{
-	portDISABLE_INTERRUPTS();
-	ulCriticalNesting++;
-
-	/* Barriers are normally not required but do ensure the code is
-	 * completely within the specified behaviour for the architecture. */
-	__asm volatile( "dsb" ::: "memory" );
-	__asm volatile( "isb" );
-}
-/*-----------------------------------------------------------*/
-
-void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */
-{
-	configASSERT( ulCriticalNesting );
-	ulCriticalNesting--;
-
-	if( ulCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
-}
-/*-----------------------------------------------------------*/
-
-void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
-{
-uint32_t ulPreviousMask;
-
-	ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* Pend a context switch. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
-}
-/*-----------------------------------------------------------*/
-
-void vPortSVCHandler_C( uint32_t *pulCallerStackAddress ) /* PRIVILEGED_FUNCTION portDONT_DISCARD */
-{
-#if( configENABLE_MPU == 1 )
-	#if defined( __ARMCC_VERSION )
-		/* Declaration when these variable are defined in code instead of being
-		 * exported from linker scripts. */
-		extern uint32_t * __syscalls_flash_start__;
-		extern uint32_t * __syscalls_flash_end__;
-	#else
-		/* Declaration when these variable are exported from linker scripts. */
-		extern uint32_t __syscalls_flash_start__[];
-		extern uint32_t __syscalls_flash_end__[];
-	#endif /* defined( __ARMCC_VERSION ) */
-#endif /* configENABLE_MPU */
-
-uint32_t ulPC;
-
-#if( configENABLE_TRUSTZONE == 1 )
-	uint32_t ulR0;
-	#if( configENABLE_MPU == 1 )
-		uint32_t ulControl, ulIsTaskPrivileged;
-	#endif /* configENABLE_MPU */
-#endif /* configENABLE_TRUSTZONE */
-uint8_t ucSVCNumber;
-
-	/* Register are stored on the stack in the following order - R0, R1, R2, R3,
-	 * R12, LR, PC, xPSR. */
-	ulPC = pulCallerStackAddress[ 6 ];
-	ucSVCNumber = ( ( uint8_t *) ulPC )[ -2 ];
-
-	switch( ucSVCNumber )
-	{
-		#if( configENABLE_TRUSTZONE == 1 )
-			case portSVC_ALLOCATE_SECURE_CONTEXT:
-			{
-				/* R0 contains the stack size passed as parameter to the
-				 * vPortAllocateSecureContext function. */
-				ulR0 = pulCallerStackAddress[ 0 ];
-
-				#if( configENABLE_MPU == 1 )
-				{
-					/* Read the CONTROL register value. */
-					__asm volatile ( "mrs %0, control"  : "=r" ( ulControl ) );
-
-					/* The task that raised the SVC is privileged if Bit[0]
-					 * in the CONTROL register is 0. */
-					ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 );
-
-					/* Allocate and load a context for the secure task. */
-					xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged );
-				}
-				#else
-				{
-					/* Allocate and load a context for the secure task. */
-					xSecureContext = SecureContext_AllocateContext( ulR0 );
-				}
-				#endif /* configENABLE_MPU */
-
-				configASSERT( xSecureContext != NULL );
-				SecureContext_LoadContext( xSecureContext );
-			}
-			break;
-
-			case portSVC_FREE_SECURE_CONTEXT:
-			{
-				/* R0 contains the secure context handle to be freed. */
-				ulR0 = pulCallerStackAddress[ 0 ];
-
-				/* Free the secure context. */
-				SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 );
-			}
-			break;
-		#endif /* configENABLE_TRUSTZONE */
-
-		case portSVC_START_SCHEDULER:
-		{
-			#if( configENABLE_TRUSTZONE == 1 )
-			{
-				/* De-prioritize the non-secure exceptions so that the
-				 * non-secure pendSV runs at the lowest priority. */
-				SecureInit_DePrioritizeNSExceptions();
-
-				/* Initialize the secure context management system. */
-				SecureContext_Init();
-			}
-			#endif /* configENABLE_TRUSTZONE */
-
-			#if( configENABLE_FPU == 1 )
-			{
-				/* Setup the Floating Point Unit (FPU). */
-				prvSetupFPU();
-			}
-			#endif /* configENABLE_FPU */
-
-			/* Setup the context of the first task so that the first task starts
-			 * executing. */
-			vRestoreContextOfFirstTask();
-		}
-		break;
-
-		#if( configENABLE_MPU == 1 )
-			case portSVC_RAISE_PRIVILEGE:
-			{
-				/* Only raise the privilege, if the svc was raised from any of
-				 * the system calls. */
-				if( ulPC >= ( uint32_t ) __syscalls_flash_start__ &&
-					ulPC <= ( uint32_t ) __syscalls_flash_end__ )
-				{
-					vRaisePrivilege();
-				}
-			}
-			break;
-		#endif /* configENABLE_MPU */
-
-		default:
-		{
-			/* Incorrect SVC call. */
-			configASSERT( pdFALSE );
-		}
-	}
-}
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_MPU == 1 )
-	StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */
-#else
-	StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters ) /* PRIVILEGED_FUNCTION */
-#endif /* configENABLE_MPU */
-{
-	/* Simulate the stack frame as it would be created by a context switch
-	 * interrupt. */
-	#if( portPRELOAD_REGISTERS == 0 )
-	{
-		pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-		*pxTopOfStack = portINITIAL_XPSR;							/* xPSR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxCode;						/* PC */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
-		pxTopOfStack -= 5;											/* R12, R3, R2 and R1. */
-		*pxTopOfStack = ( StackType_t ) pvParameters;				/* R0 */
-		pxTopOfStack -= 9;											/* R11..R4, EXC_RETURN. */
-		*pxTopOfStack = portINITIAL_EXC_RETURN;
-
-		#if( configENABLE_MPU == 1 )
-		{
-			pxTopOfStack--;
-			if( xRunPrivileged == pdTRUE )
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED;		/* Slot used to hold this task's CONTROL value. */
-			}
-			else
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED;	/* Slot used to hold this task's CONTROL value. */
-			}
-		}
-		#endif /* configENABLE_MPU */
-
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxEndOfStack;	/* Slot used to hold this task's PSPLIM value. */
-
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			pxTopOfStack--;
-			*pxTopOfStack = portNO_SECURE_CONTEXT;		/* Slot used to hold this task's xSecureContext value. */
-		}
-		#endif /* configENABLE_TRUSTZONE */
-	}
-	#else /* portPRELOAD_REGISTERS */
-	{
-		pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-		*pxTopOfStack = portINITIAL_XPSR;							/* xPSR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxCode;						/* PC */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x12121212UL;				/* R12 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x03030303UL;				/* R3 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x02020202UL;				/* R2 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x01010101UL;				/* R1 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pvParameters;				/* R0 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x11111111UL;				/* R11 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x10101010UL;				/* R10 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x09090909UL;				/* R09 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x08080808UL;				/* R08 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x07070707UL;				/* R07 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x06060606UL;				/* R06 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x05050505UL;				/* R05 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x04040404UL;				/* R04 */
-		pxTopOfStack--;
-		*pxTopOfStack = portINITIAL_EXC_RETURN;						/* EXC_RETURN */
-
-		#if( configENABLE_MPU == 1 )
-		{
-			pxTopOfStack--;
-			if( xRunPrivileged == pdTRUE )
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED;		/* Slot used to hold this task's CONTROL value. */
-			}
-			else
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED;	/* Slot used to hold this task's CONTROL value. */
-			}
-		}
-		#endif /* configENABLE_MPU */
-
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxEndOfStack;	/* Slot used to hold this task's PSPLIM value. */
-
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			pxTopOfStack--;
-			*pxTopOfStack = portNO_SECURE_CONTEXT;		/* Slot used to hold this task's xSecureContext value. */
-		}
-		#endif /* configENABLE_TRUSTZONE */
-	}
-	#endif /* portPRELOAD_REGISTERS */
-
-	return pxTopOfStack;
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
-{
-	/* Make PendSV, CallSV and SysTick the same priority as the kernel. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
-
-	#if( configENABLE_MPU == 1 )
-	{
-		/* Setup the Memory Protection Unit (MPU). */
-		prvSetupMPU();
-	}
-	#endif /* configENABLE_MPU */
-
-	/* Start the timer that generates the tick ISR. Interrupts are disabled
-	 * here already. */
-	vPortSetupTimerInterrupt();
-
-	/* Initialize the critical nesting count ready for the first task. */
-	ulCriticalNesting = 0;
-
-	/* Start the first task. */
-	vStartFirstTask();
-
-	/* Should never get here as the tasks will now be executing. Call the task
-	 * exit error function to prevent compiler warnings about a static function
-	 * not being called in the case that the application writer overrides this
-	 * functionality by defining configTASK_RETURN_ADDRESS. Call
-	 * vTaskSwitchContext() so link time optimization does not remove the
-	 * symbol. */
-	vTaskSwitchContext();
-	prvTaskExitError();
-
-	/* Should not get here. */
-	return 0;
-}
-/*-----------------------------------------------------------*/
-
-void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
-{
-	/* Not implemented in ports where there is nothing to return to.
-	 * Artificially force an assert. */
-	configASSERT( ulCriticalNesting == 1000UL );
-}
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_MPU == 1 )
-	void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t ulStackDepth )
-	{
-	uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
-	int32_t lIndex = 0;
-
-		/* Setup MAIR0. */
-		xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
-		xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
-
-		/* This function is called automatically when the task is created - in
-		 * which case the stack region parameters will be valid.  At all other
-		 * times the stack parameters will not be valid and it is assumed that
-		 * the stack region has already been configured. */
-		if( ulStackDepth > 0 )
-		{
-			/* Define the region that allows access to the stack. */
-			ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK;
-			ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1;
-			ulRegionEndAddress  &= portMPU_RLAR_ADDRESS_MASK;
-
-			xMPUSettings->xRegionsSettings[ 0 ].ulRBAR =	( ulRegionStartAddress ) |
-															( portMPU_REGION_NON_SHAREABLE ) |
-															( portMPU_REGION_READ_WRITE ) |
-															( portMPU_REGION_EXECUTE_NEVER );
-
-			xMPUSettings->xRegionsSettings[ 0 ].ulRLAR =	( ulRegionEndAddress ) |
-															( portMPU_RLAR_ATTR_INDEX0 ) |
-															( portMPU_RLAR_REGION_ENABLE );
-		}
-
-		/* User supplied configurable regions. */
-		for( ulRegionNumber = 1; ulRegionNumber <= portNUM_CONFIGURABLE_REGIONS; ulRegionNumber++ )
-		{
-			/* If xRegions is NULL i.e. the task has not specified any MPU
-			 * region, the else part ensures that all the configurable MPU
-			 * regions are invalidated. */
-			if( ( xRegions != NULL ) && ( xRegions[ lIndex ].ulLengthInBytes > 0UL ) )
-			{
-				/* Translate the generic region definition contained in xRegions
-				 * into the ARMv8 specific MPU settings that are then stored in
-				 * xMPUSettings. */
-				ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK;
-				ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1;
-				ulRegionEndAddress  &= portMPU_RLAR_ADDRESS_MASK;
-
-				/* Start address. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR =	( ulRegionStartAddress ) |
-																			( portMPU_REGION_NON_SHAREABLE );
-
-				/* RO/RW. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_READ_ONLY ) != 0 )
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_ONLY );
-				}
-				else
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_WRITE );
-				}
-
-				/* XN. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_EXECUTE_NEVER ) != 0 )
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_EXECUTE_NEVER );
-				}
-
-				/* End Address. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR =	( ulRegionEndAddress ) |
-																			( portMPU_RLAR_REGION_ENABLE );
-
-				/* Normal memory/ Device memory. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
-				{
-					/* Attr1 in MAIR0 is configured as device memory. */
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX1;
-				}
-				else
-				{
-					/* Attr1 in MAIR0 is configured as normal memory. */
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
-				}
-			}
-			else
-			{
-				/* Invalidate the region. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = 0UL;
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = 0UL;
-			}
-
-			lIndex++;
-		}
-	}
-#endif /* configENABLE_MPU */
-/*-----------------------------------------------------------*/
-
-BaseType_t xPortIsInsideInterrupt( void )
-{
-uint32_t ulCurrentInterrupt;
-BaseType_t xReturn;
-
-	/* Obtain the number of the currently executing interrupt. Interrupt Program
-	 * Status Register (IPSR) holds the exception number of the currently-executing
-	 * exception or zero for Thread mode.*/
-	__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
-
-	if( ulCurrentInterrupt == 0 )
-	{
-		xReturn = pdFALSE;
-	}
-	else
-	{
-		xReturn = pdTRUE;
-	}
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
\ No newline at end of file
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
+ * all the API functions to use the MPU wrappers. That should only be done when
+ * task.h is included from an application file. */
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+/* Scheduler includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+
+/* MPU wrappers includes. */
+#include "mpu_wrappers.h"
+
+/* Portasm includes. */
+#include "portasm.h"
+
+#if ( configENABLE_TRUSTZONE == 1 )
+    /* Secure components includes. */
+    #include "secure_context.h"
+    #include "secure_init.h"
+#endif /* configENABLE_TRUSTZONE */
+
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+/**
+ * The FreeRTOS Cortex M33 port can be configured to run on the Secure Side only
+ * i.e. the processor boots as secure and never jumps to the non-secure side.
+ * The Trust Zone support in the port must be disabled in order to run FreeRTOS
+ * on the secure side. The following are the valid configuration seetings:
+ *
+ * 1. Run FreeRTOS on the Secure Side:
+ *      configRUN_FREERTOS_SECURE_ONLY = 1 and configENABLE_TRUSTZONE = 0
+ *
+ * 2. Run FreeRTOS on the Non-Secure Side with Secure Side function call support:
+ *      configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 1
+ *
+ * 3. Run FreeRTOS on the Non-Secure Side only i.e. no Secure Side function call support:
+ *      configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 0
+ */
+#if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) )
+    #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side.
+#endif
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Constants required to manipulate the NVIC.
+ */
+#define portNVIC_SYSTICK_CTRL_REG             ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG             ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG    ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SHPR3_REG                    ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_ENABLE_BIT           ( 1UL << 0UL )
+#define portNVIC_SYSTICK_INT_BIT              ( 1UL << 1UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT       ( 1UL << 16UL )
+#define portMIN_INTERRUPT_PRIORITY            ( 255UL )
+#define portNVIC_PENDSV_PRI                   ( portMIN_INTERRUPT_PRIORITY << 16UL )
+#define portNVIC_SYSTICK_PRI                  ( portMIN_INTERRUPT_PRIORITY << 24UL )
+#ifndef configSYSTICK_CLOCK_HZ
+    #define configSYSTICK_CLOCK_HZ            configCPU_CLOCK_HZ
+    /* Ensure the SysTick is clocked at the same frequency as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT          ( 1UL << 2UL )
+#else
+
+/* The way the SysTick is clocked is not modified in case it is not the
+ * same a the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 0 )
+#endif
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Constants required to manipulate the SCB.
+ */
+#define portSCB_SYS_HANDLER_CTRL_STATE_REG    ( *( volatile uint32_t * ) 0xe000ed24 )
+#define portSCB_MEM_FAULT_ENABLE_BIT          ( 1UL << 16UL )
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Constants required to manipulate the FPU.
+ */
+#define portCPACR               ( ( volatile uint32_t * ) 0xe000ed88 )              /* Coprocessor Access Control Register. */
+#define portCPACR_CP10_VALUE    ( 3UL )
+#define portCPACR_CP11_VALUE    portCPACR_CP10_VALUE
+#define portCPACR_CP10_POS      ( 20UL )
+#define portCPACR_CP11_POS      ( 22UL )
+
+#define portFPCCR               ( ( volatile uint32_t * ) 0xe000ef34 )              /* Floating Point Context Control Register. */
+#define portFPCCR_ASPEN_POS     ( 31UL )
+#define portFPCCR_ASPEN_MASK    ( 1UL << portFPCCR_ASPEN_POS )
+#define portFPCCR_LSPEN_POS     ( 30UL )
+#define portFPCCR_LSPEN_MASK    ( 1UL << portFPCCR_LSPEN_POS )
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Constants required to manipulate the MPU.
+ */
+#define portMPU_TYPE_REG                      ( *( ( volatile uint32_t * ) 0xe000ed90 ) )
+#define portMPU_CTRL_REG                      ( *( ( volatile uint32_t * ) 0xe000ed94 ) )
+#define portMPU_RNR_REG                       ( *( ( volatile uint32_t * ) 0xe000ed98 ) )
+
+#define portMPU_RBAR_REG                      ( *( ( volatile uint32_t * ) 0xe000ed9c ) )
+#define portMPU_RLAR_REG                      ( *( ( volatile uint32_t * ) 0xe000eda0 ) )
+
+#define portMPU_RBAR_A1_REG                   ( *( ( volatile uint32_t * ) 0xe000eda4 ) )
+#define portMPU_RLAR_A1_REG                   ( *( ( volatile uint32_t * ) 0xe000eda8 ) )
+
+#define portMPU_RBAR_A2_REG                   ( *( ( volatile uint32_t * ) 0xe000edac ) )
+#define portMPU_RLAR_A2_REG                   ( *( ( volatile uint32_t * ) 0xe000edb0 ) )
+
+#define portMPU_RBAR_A3_REG                   ( *( ( volatile uint32_t * ) 0xe000edb4 ) )
+#define portMPU_RLAR_A3_REG                   ( *( ( volatile uint32_t * ) 0xe000edb8 ) )
+
+#define portMPU_MAIR0_REG                     ( *( ( volatile uint32_t * ) 0xe000edc0 ) )
+#define portMPU_MAIR1_REG                     ( *( ( volatile uint32_t * ) 0xe000edc4 ) )
+
+#define portMPU_RBAR_ADDRESS_MASK             ( 0xffffffe0 ) /* Must be 32-byte aligned. */
+#define portMPU_RLAR_ADDRESS_MASK             ( 0xffffffe0 ) /* Must be 32-byte aligned. */
+
+#define portMPU_MAIR_ATTR0_POS                ( 0UL )
+#define portMPU_MAIR_ATTR0_MASK               ( 0x000000ff )
+
+#define portMPU_MAIR_ATTR1_POS                ( 8UL )
+#define portMPU_MAIR_ATTR1_MASK               ( 0x0000ff00 )
+
+#define portMPU_MAIR_ATTR2_POS                ( 16UL )
+#define portMPU_MAIR_ATTR2_MASK               ( 0x00ff0000 )
+
+#define portMPU_MAIR_ATTR3_POS                ( 24UL )
+#define portMPU_MAIR_ATTR3_MASK               ( 0xff000000 )
+
+#define portMPU_MAIR_ATTR4_POS                ( 0UL )
+#define portMPU_MAIR_ATTR4_MASK               ( 0x000000ff )
+
+#define portMPU_MAIR_ATTR5_POS                ( 8UL )
+#define portMPU_MAIR_ATTR5_MASK               ( 0x0000ff00 )
+
+#define portMPU_MAIR_ATTR6_POS                ( 16UL )
+#define portMPU_MAIR_ATTR6_MASK               ( 0x00ff0000 )
+
+#define portMPU_MAIR_ATTR7_POS                ( 24UL )
+#define portMPU_MAIR_ATTR7_MASK               ( 0xff000000 )
+
+#define portMPU_RLAR_ATTR_INDEX0              ( 0UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX1              ( 1UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX2              ( 2UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX3              ( 3UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX4              ( 4UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX5              ( 5UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX6              ( 6UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX7              ( 7UL << 1UL )
+
+#define portMPU_RLAR_REGION_ENABLE            ( 1UL )
+
+/* Enable privileged access to unmapped region. */
+#define portMPU_PRIV_BACKGROUND_ENABLE_BIT    ( 1UL << 2UL )
+
+/* Enable MPU. */
+#define portMPU_ENABLE_BIT                    ( 1UL << 0UL )
+
+/* Expected value of the portMPU_TYPE register. */
+#define portEXPECTED_MPU_TYPE_VALUE           ( 8UL << 8UL ) /* 8 regions, unified. */
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief The maximum 24-bit number.
+ *
+ * It is needed because the systick is a 24-bit counter.
+ */
+#define portMAX_24_BIT_NUMBER       ( 0xffffffUL )
+
+/**
+ * @brief A fiddle factor to estimate the number of SysTick counts that would
+ * have occurred while the SysTick counter is stopped during tickless idle
+ * calculations.
+ */
+#define portMISSED_COUNTS_FACTOR    ( 45UL )
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Constants required to set up the initial stack.
+ */
+#define portINITIAL_XPSR    ( 0x01000000 )
+
+#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
+
+/**
+ * @brief Initial EXC_RETURN value.
+ *
+ *     FF         FF         FF         FD
+ * 1111 1111  1111 1111  1111 1111  1111 1101
+ *
+ * Bit[6] - 1 --> The exception was taken from the Secure state.
+ * Bit[5] - 1 --> Do not skip stacking of additional state context.
+ * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
+ * Bit[3] - 1 --> Return to the Thread mode.
+ * Bit[2] - 1 --> Restore registers from the process stack.
+ * Bit[1] - 0 --> Reserved, 0.
+ * Bit[0] - 1 --> The exception was taken to the Secure state.
+ */
+    #define portINITIAL_EXC_RETURN    ( 0xfffffffd )
+#else
+
+/**
+ * @brief Initial EXC_RETURN value.
+ *
+ *     FF         FF         FF         BC
+ * 1111 1111  1111 1111  1111 1111  1011 1100
+ *
+ * Bit[6] - 0 --> The exception was taken from the Non-Secure state.
+ * Bit[5] - 1 --> Do not skip stacking of additional state context.
+ * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
+ * Bit[3] - 1 --> Return to the Thread mode.
+ * Bit[2] - 1 --> Restore registers from the process stack.
+ * Bit[1] - 0 --> Reserved, 0.
+ * Bit[0] - 0 --> The exception was taken to the Non-Secure state.
+ */
+    #define portINITIAL_EXC_RETURN    ( 0xffffffbc )
+#endif /* configRUN_FREERTOS_SECURE_ONLY */
+
+/**
+ * @brief CONTROL register privileged bit mask.
+ *
+ * Bit[0] in CONTROL register tells the privilege:
+ *  Bit[0] = 0 ==> The task is privileged.
+ *  Bit[0] = 1 ==> The task is not privileged.
+ */
+#define portCONTROL_PRIVILEGED_MASK         ( 1UL << 0UL )
+
+/**
+ * @brief Initial CONTROL register values.
+ */
+#define portINITIAL_CONTROL_UNPRIVILEGED    ( 0x3 )
+#define portINITIAL_CONTROL_PRIVILEGED      ( 0x2 )
+
+/**
+ * @brief Let the user override the pre-loading of the initial LR with the
+ * address of prvTaskExitError() in case it messes up unwinding of the stack
+ * in the debugger.
+ */
+#ifdef configTASK_RETURN_ADDRESS
+    #define portTASK_RETURN_ADDRESS    configTASK_RETURN_ADDRESS
+#else
+    #define portTASK_RETURN_ADDRESS    prvTaskExitError
+#endif
+
+/**
+ * @brief If portPRELOAD_REGISTERS then registers will be given an initial value
+ * when a task is created. This helps in debugging at the cost of code size.
+ */
+#define portPRELOAD_REGISTERS    1
+
+/**
+ * @brief A task is created without a secure context, and must call
+ * portALLOCATE_SECURE_CONTEXT() to give itself a secure context before it makes
+ * any secure calls.
+ */
+#define portNO_SECURE_CONTEXT    0
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Used to catch tasks that attempt to return from their implementing
+ * function.
+ */
+static void prvTaskExitError( void );
+
+#if ( configENABLE_MPU == 1 )
+
+/**
+ * @brief Setup the Memory Protection Unit (MPU).
+ */
+    static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
+#endif /* configENABLE_MPU */
+
+#if ( configENABLE_FPU == 1 )
+
+/**
+ * @brief Setup the Floating Point Unit (FPU).
+ */
+    static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;
+#endif /* configENABLE_FPU */
+
+/**
+ * @brief Setup the timer to generate the tick interrupts.
+ *
+ * The implementation in this file is weak to allow application writers to
+ * change the timer used to generate the tick interrupt.
+ */
+void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * @brief Checks whether the current execution context is interrupt.
+ *
+ * @return pdTRUE if the current execution context is interrupt, pdFALSE
+ * otherwise.
+ */
+BaseType_t xPortIsInsideInterrupt( void );
+
+/**
+ * @brief Yield the processor.
+ */
+void vPortYield( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * @brief Enter critical section.
+ */
+void vPortEnterCritical( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * @brief Exit from critical section.
+ */
+void vPortExitCritical( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * @brief SysTick handler.
+ */
+void SysTick_Handler( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * @brief C part of SVC handler.
+ */
+portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIVILEGED_FUNCTION;
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Each task maintains its own interrupt status in the critical nesting
+ * variable.
+ */
+PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
+
+#if ( configENABLE_TRUSTZONE == 1 )
+
+/**
+ * @brief Saved as part of the task context to indicate which context the
+ * task is using on the secure side.
+ */
+    PRIVILEGED_DATA portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
+#endif /* configENABLE_TRUSTZONE */
+
+#if ( configUSE_TICKLESS_IDLE == 1 )
+
+/**
+ * @brief The number of SysTick increments that make up one tick period.
+ */
+    PRIVILEGED_DATA static uint32_t ulTimerCountsForOneTick = 0;
+
+/**
+ * @brief The maximum number of tick periods that can be suppressed is
+ * limited by the 24 bit resolution of the SysTick timer.
+ */
+    PRIVILEGED_DATA static uint32_t xMaximumPossibleSuppressedTicks = 0;
+
+/**
+ * @brief Compensate for the CPU cycles that pass while the SysTick is
+ * stopped (low power functionality only).
+ */
+    PRIVILEGED_DATA static uint32_t ulStoppedTimerCompensation = 0;
+#endif /* configUSE_TICKLESS_IDLE */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+    {
+        uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+        TickType_t xModifiableIdleTime;
+
+        /* Make sure the SysTick reload value does not overflow the counter. */
+        if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+        {
+            xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+        }
+
+        /* Stop the SysTick momentarily. The time the SysTick is stopped for is
+         * accounted for as best it can be, but using the tickless mode will
+         * inevitably result in some tiny drift of the time maintained by the
+         * kernel with respect to calendar time. */
+        portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+
+        /* Calculate the reload value required to wait xExpectedIdleTime
+         * tick periods. -1 is used because this code will execute part way
+         * through one of the tick periods. */
+        ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
+
+        if( ulReloadValue > ulStoppedTimerCompensation )
+        {
+            ulReloadValue -= ulStoppedTimerCompensation;
+        }
+
+        /* Enter a critical section but don't use the taskENTER_CRITICAL()
+         * method as that will mask interrupts that should exit sleep mode. */
+        __asm volatile ( "cpsid i" ::: "memory" );
+        __asm volatile ( "dsb" );
+        __asm volatile ( "isb" );
+
+        /* If a context switch is pending or a task is waiting for the scheduler
+         * to be un-suspended then abandon the low power entry. */
+        if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+        {
+            /* Restart from whatever is left in the count register to complete
+             * this tick period. */
+            portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+
+            /* Reset the reload register to the value required for normal tick
+             * periods. */
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Re-enable interrupts - see comments above the cpsid instruction()
+             * above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+        else
+        {
+            /* Set the new reload value. */
+            portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+
+            /* Clear the SysTick count flag and set the count value back to
+             * zero. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+
+            /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
+             * set its parameter to 0 to indicate that its implementation
+             * contains its own wait for interrupt or wait for event
+             * instruction, and so wfi should not be executed again. However,
+             * the original expected idle time variable must remain unmodified,
+             * so a copy is taken. */
+            xModifiableIdleTime = xExpectedIdleTime;
+            configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
+
+            if( xModifiableIdleTime > 0 )
+            {
+                __asm volatile ( "dsb" ::: "memory" );
+                __asm volatile ( "wfi" );
+                __asm volatile ( "isb" );
+            }
+
+            configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+
+            /* Re-enable interrupts to allow the interrupt that brought the MCU
+             * out of sleep mode to execute immediately. See comments above
+             * the cpsid instruction above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
+
+            /* Disable interrupts again because the clock is about to be stopped
+             * and interrupts that execute while the clock is stopped will
+             * increase any slippage between the time maintained by the RTOS and
+             * calendar time. */
+            __asm volatile ( "cpsid i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
+
+            /* Disable the SysTick clock without reading the
+             * portNVIC_SYSTICK_CTRL_REG register to ensure the
+             * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
+             * Again, the time the SysTick is stopped for is accounted for as
+             * best it can be, but using the tickless mode will inevitably
+             * result in some tiny drift of the time maintained by the kernel
+             * with respect to calendar time*/
+            portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+
+            /* Determine if the SysTick clock has already counted to zero and
+             * been set back to the current reload value (the reload back being
+             * correct for the entire expected idle time) or if the SysTick is
+             * yet to count to zero (in which case an interrupt other than the
+             * SysTick must have brought the system out of sleep mode). */
+            if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+            {
+                uint32_t ulCalculatedLoadValue;
+
+                /* The tick interrupt is already pending, and the SysTick count
+                 * reloaded with ulReloadValue.  Reset the
+                 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+                 * period. */
+                ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+
+                /* Don't allow a tiny value, or values that have somehow
+                 * underflowed because the post sleep hook did something
+                 * that took too long. */
+                if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+                {
+                    ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+                }
+
+                portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+
+                /* As the pending tick will be processed as soon as this
+                 * function exits, the tick value maintained by the tick is
+                 * stepped forward by one less than the time spent waiting. */
+                ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+            }
+            else
+            {
+                /* Something other than the tick interrupt ended the sleep.
+                 * Work out how long the sleep lasted rounded to complete tick
+                 * periods (not the ulReload value which accounted for part
+                 * ticks). */
+                ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+                /* How many complete tick periods passed while the processor
+                 * was waiting? */
+                ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+                /* The reload value is set to whatever fraction of a single tick
+                 * period remains. */
+                portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+            }
+
+            /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+             * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+             * value. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            vTaskStepTick( ulCompleteTickPeriods );
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Exit with interrupts enabled. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+    }
+#endif /* configUSE_TICKLESS_IDLE */
+/*-----------------------------------------------------------*/
+
+__attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
+{
+    /* Calculate the constants required to configure the tick interrupt. */
+    #if ( configUSE_TICKLESS_IDLE == 1 )
+        {
+            ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+            xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+            ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+        }
+    #endif /* configUSE_TICKLESS_IDLE */
+
+    /* Stop and reset the SysTick. */
+    portNVIC_SYSTICK_CTRL_REG = 0UL;
+    portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+
+    /* Configure SysTick to interrupt at the requested rate. */
+    portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+    portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
+}
+/*-----------------------------------------------------------*/
+
+static void prvTaskExitError( void )
+{
+    volatile uint32_t ulDummy = 0UL;
+
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to. If a task wants to exit it
+     * should instead call vTaskDelete( NULL ). Artificially force an assert()
+     * to be triggered if configASSERT() is defined, then stop here so
+     * application writers can catch the error. */
+    configASSERT( ulCriticalNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
+
+    while( ulDummy == 0 )
+    {
+        /* This file calls prvTaskExitError() after the scheduler has been
+         * started to remove a compiler warning about the function being
+         * defined but never called.  ulDummy is used purely to quieten other
+         * warnings about code appearing after this function is called - making
+         * ulDummy volatile makes the compiler think the function could return
+         * and therefore not output an 'unreachable code' warning for code that
+         * appears after it. */
+    }
+}
+/*-----------------------------------------------------------*/
+
+#if ( configENABLE_MPU == 1 )
+    static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
+    {
+        #if defined( __ARMCC_VERSION )
+
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __privileged_functions_start__;
+            extern uint32_t * __privileged_functions_end__;
+            extern uint32_t * __syscalls_flash_start__;
+            extern uint32_t * __syscalls_flash_end__;
+            extern uint32_t * __unprivileged_flash_start__;
+            extern uint32_t * __unprivileged_flash_end__;
+            extern uint32_t * __privileged_sram_start__;
+            extern uint32_t * __privileged_sram_end__;
+        #else /* if defined( __ARMCC_VERSION ) */
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __privileged_functions_start__[];
+            extern uint32_t __privileged_functions_end__[];
+            extern uint32_t __syscalls_flash_start__[];
+            extern uint32_t __syscalls_flash_end__[];
+            extern uint32_t __unprivileged_flash_start__[];
+            extern uint32_t __unprivileged_flash_end__[];
+            extern uint32_t __privileged_sram_start__[];
+            extern uint32_t __privileged_sram_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
+
+        /* Check that the MPU is present. */
+        if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
+        {
+            /* MAIR0 - Index 0. */
+            portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
+            /* MAIR0 - Index 1. */
+            portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
+
+            /* Setup privileged flash as Read Only so that privileged tasks can
+             * read it but not modify. */
+            portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_PRIVILEGED_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
+
+            /* Setup unprivileged flash as Read Only by both privileged and
+             * unprivileged tasks. All tasks can read it but no-one can modify. */
+            portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
+
+            /* Setup unprivileged syscalls flash as Read Only by both privileged
+             * and unprivileged tasks. All tasks can read it but no-one can modify. */
+            portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
+
+            /* Setup RAM containing kernel data for privileged access only. */
+            portMPU_RNR_REG = portPRIVILEGED_RAM_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
+                               ( portMPU_REGION_EXECUTE_NEVER );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
+
+            /* Enable mem fault. */
+            portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
+
+            /* Enable MPU with privileged background access i.e. unmapped
+             * regions have privileged access. */
+            portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
+        }
+    }
+#endif /* configENABLE_MPU */
+/*-----------------------------------------------------------*/
+
+#if ( configENABLE_FPU == 1 )
+    static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
+    {
+        #if ( configENABLE_TRUSTZONE == 1 )
+            {
+                /* Enable non-secure access to the FPU. */
+                SecureInit_EnableNSFPUAccess();
+            }
+        #endif /* configENABLE_TRUSTZONE */
+
+        /* CP10 = 11 ==> Full access to FPU i.e. both privileged and
+         * unprivileged code should be able to access FPU. CP11 should be
+         * programmed to the same value as CP10. */
+        *( portCPACR ) |= ( ( portCPACR_CP10_VALUE << portCPACR_CP10_POS ) |
+                            ( portCPACR_CP11_VALUE << portCPACR_CP11_POS )
+                            );
+
+        /* ASPEN = 1 ==> Hardware should automatically preserve floating point
+         * context on exception entry and restore on exception return.
+         * LSPEN = 1 ==> Enable lazy context save of FP state. */
+        *( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
+    }
+#endif /* configENABLE_FPU */
+/*-----------------------------------------------------------*/
+
+void vPortYield( void ) /* PRIVILEGED_FUNCTION */
+{
+    /* Set a PendSV to request a context switch. */
+    portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+
+    /* Barriers are normally not required but do ensure the code is
+     * completely within the specified behaviour for the architecture. */
+    __asm volatile ( "dsb" ::: "memory" );
+    __asm volatile ( "isb" );
+}
+/*-----------------------------------------------------------*/
+
+void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */
+{
+    portDISABLE_INTERRUPTS();
+    ulCriticalNesting++;
+
+    /* Barriers are normally not required but do ensure the code is
+     * completely within the specified behaviour for the architecture. */
+    __asm volatile ( "dsb" ::: "memory" );
+    __asm volatile ( "isb" );
+}
+/*-----------------------------------------------------------*/
+
+void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */
+{
+    configASSERT( ulCriticalNesting );
+    ulCriticalNesting--;
+
+    if( ulCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
+}
+/*-----------------------------------------------------------*/
+
+void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
+{
+    uint32_t ulPreviousMask;
+
+    ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* Pend a context switch. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
+}
+/*-----------------------------------------------------------*/
+
+void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTION portDONT_DISCARD */
+{
+    #if ( configENABLE_MPU == 1 )
+        #if defined( __ARMCC_VERSION )
+
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __syscalls_flash_start__;
+            extern uint32_t * __syscalls_flash_end__;
+        #else
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __syscalls_flash_start__[];
+            extern uint32_t __syscalls_flash_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
+    #endif /* configENABLE_MPU */
+
+    uint32_t ulPC;
+
+    #if ( configENABLE_TRUSTZONE == 1 )
+        uint32_t ulR0;
+        #if ( configENABLE_MPU == 1 )
+            uint32_t ulControl, ulIsTaskPrivileged;
+        #endif /* configENABLE_MPU */
+    #endif /* configENABLE_TRUSTZONE */
+    uint8_t ucSVCNumber;
+
+    /* Register are stored on the stack in the following order - R0, R1, R2, R3,
+     * R12, LR, PC, xPSR. */
+    ulPC = pulCallerStackAddress[ 6 ];
+    ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ];
+
+    switch( ucSVCNumber )
+    {
+        #if ( configENABLE_TRUSTZONE == 1 )
+            case portSVC_ALLOCATE_SECURE_CONTEXT:
+
+                /* R0 contains the stack size passed as parameter to the
+                 * vPortAllocateSecureContext function. */
+                ulR0 = pulCallerStackAddress[ 0 ];
+
+                #if ( configENABLE_MPU == 1 )
+                    {
+                        /* Read the CONTROL register value. */
+                        __asm volatile ( "mrs %0, control"  : "=r" ( ulControl ) );
+
+                        /* The task that raised the SVC is privileged if Bit[0]
+                         * in the CONTROL register is 0. */
+                        ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 );
+
+                        /* Allocate and load a context for the secure task. */
+                        xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged );
+                    }
+                #else /* if ( configENABLE_MPU == 1 ) */
+                    {
+                        /* Allocate and load a context for the secure task. */
+                        xSecureContext = SecureContext_AllocateContext( ulR0 );
+                    }
+                #endif /* configENABLE_MPU */
+
+                configASSERT( xSecureContext != NULL );
+                SecureContext_LoadContext( xSecureContext );
+                break;
+
+            case portSVC_FREE_SECURE_CONTEXT:
+                /* R0 contains the secure context handle to be freed. */
+                ulR0 = pulCallerStackAddress[ 0 ];
+
+                /* Free the secure context. */
+                SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 );
+                break;
+        #endif /* configENABLE_TRUSTZONE */
+
+        case portSVC_START_SCHEDULER:
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    /* De-prioritize the non-secure exceptions so that the
+                     * non-secure pendSV runs at the lowest priority. */
+                    SecureInit_DePrioritizeNSExceptions();
+
+                    /* Initialize the secure context management system. */
+                    SecureContext_Init();
+                }
+            #endif /* configENABLE_TRUSTZONE */
+
+            #if ( configENABLE_FPU == 1 )
+                {
+                    /* Setup the Floating Point Unit (FPU). */
+                    prvSetupFPU();
+                }
+            #endif /* configENABLE_FPU */
+
+            /* Setup the context of the first task so that the first task starts
+             * executing. */
+            vRestoreContextOfFirstTask();
+            break;
+
+            #if ( configENABLE_MPU == 1 )
+                case portSVC_RAISE_PRIVILEGE:
+
+                    /* Only raise the privilege, if the svc was raised from any of
+                     * the system calls. */
+                    if( ( ulPC >= ( uint32_t ) __syscalls_flash_start__ ) &&
+                        ( ulPC <= ( uint32_t ) __syscalls_flash_end__ ) )
+                    {
+                        vRaisePrivilege();
+                    }
+                    break;
+            #endif /* configENABLE_MPU */
+
+        default:
+            /* Incorrect SVC call. */
+            configASSERT( pdFALSE );
+    }
+}
+/*-----------------------------------------------------------*/
+
+/* *INDENT-OFF* */
+#if ( configENABLE_MPU == 1 )
+    StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                         StackType_t * pxEndOfStack,
+                                         TaskFunction_t pxCode,
+                                         void * pvParameters,
+                                         BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */
+#else
+    StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                         StackType_t * pxEndOfStack,
+                                         TaskFunction_t pxCode,
+                                         void * pvParameters ) /* PRIVILEGED_FUNCTION */
+#endif /* configENABLE_MPU */
+/* *INDENT-ON* */
+{
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
+    #if ( portPRELOAD_REGISTERS == 0 )
+        {
+            pxTopOfStack--;                                          /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+            *pxTopOfStack = portINITIAL_XPSR;                        /* xPSR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxCode;                  /* PC */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
+            pxTopOfStack -= 5;                                       /* R12, R3, R2 and R1. */
+            *pxTopOfStack = ( StackType_t ) pvParameters;            /* R0 */
+            pxTopOfStack -= 9;                                       /* R11..R4, EXC_RETURN. */
+            *pxTopOfStack = portINITIAL_EXC_RETURN;
+
+            #if ( configENABLE_MPU == 1 )
+                {
+                    pxTopOfStack--;
+
+                    if( xRunPrivileged == pdTRUE )
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                    else
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                }
+            #endif /* configENABLE_MPU */
+
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */
+
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    pxTopOfStack--;
+                    *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */
+                }
+            #endif /* configENABLE_TRUSTZONE */
+        }
+    #else /* portPRELOAD_REGISTERS */
+        {
+            pxTopOfStack--;                                          /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+            *pxTopOfStack = portINITIAL_XPSR;                        /* xPSR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxCode;                  /* PC */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x12121212UL;            /* R12 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x03030303UL;            /* R3 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x02020202UL;            /* R2 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x01010101UL;            /* R1 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pvParameters;            /* R0 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x11111111UL;            /* R11 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x10101010UL;            /* R10 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x09090909UL;            /* R09 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x08080808UL;            /* R08 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x07070707UL;            /* R07 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x06060606UL;            /* R06 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x05050505UL;            /* R05 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x04040404UL;            /* R04 */
+            pxTopOfStack--;
+            *pxTopOfStack = portINITIAL_EXC_RETURN;                  /* EXC_RETURN */
+
+            #if ( configENABLE_MPU == 1 )
+                {
+                    pxTopOfStack--;
+
+                    if( xRunPrivileged == pdTRUE )
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                    else
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                }
+            #endif /* configENABLE_MPU */
+
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */
+
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    pxTopOfStack--;
+                    *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */
+                }
+            #endif /* configENABLE_TRUSTZONE */
+        }
+    #endif /* portPRELOAD_REGISTERS */
+
+    return pxTopOfStack;
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
+{
+    /* Make PendSV, CallSV and SysTick the same priority as the kernel. */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
+
+    #if ( configENABLE_MPU == 1 )
+        {
+            /* Setup the Memory Protection Unit (MPU). */
+            prvSetupMPU();
+        }
+    #endif /* configENABLE_MPU */
+
+    /* Start the timer that generates the tick ISR. Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
+
+    /* Initialize the critical nesting count ready for the first task. */
+    ulCriticalNesting = 0;
+
+    /* Start the first task. */
+    vStartFirstTask();
+
+    /* Should never get here as the tasks will now be executing. Call the task
+     * exit error function to prevent compiler warnings about a static function
+     * not being called in the case that the application writer overrides this
+     * functionality by defining configTASK_RETURN_ADDRESS. Call
+     * vTaskSwitchContext() so link time optimization does not remove the
+     * symbol. */
+    vTaskSwitchContext();
+    prvTaskExitError();
+
+    /* Should not get here. */
+    return 0;
+}
+/*-----------------------------------------------------------*/
+
+void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
+{
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( ulCriticalNesting == 1000UL );
+}
+/*-----------------------------------------------------------*/
+
+#if ( configENABLE_MPU == 1 )
+    void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
+                                    const struct xMEMORY_REGION * const xRegions,
+                                    StackType_t * pxBottomOfStack,
+                                    uint32_t ulStackDepth )
+    {
+        uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
+        int32_t lIndex = 0;
+
+        #if defined( __ARMCC_VERSION )
+
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __privileged_sram_start__;
+            extern uint32_t * __privileged_sram_end__;
+        #else
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __privileged_sram_start__[];
+            extern uint32_t __privileged_sram_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
+
+        /* Setup MAIR0. */
+        xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
+        xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
+
+        /* This function is called automatically when the task is created - in
+         * which case the stack region parameters will be valid.  At all other
+         * times the stack parameters will not be valid and it is assumed that
+         * the stack region has already been configured. */
+        if( ulStackDepth > 0 )
+        {
+            ulRegionStartAddress = ( uint32_t ) pxBottomOfStack;
+            ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1;
+
+            /* If the stack is within the privileged SRAM, do not protect it
+             * using a separate MPU region. This is needed because privileged
+             * SRAM is already protected using an MPU region and ARMv8-M does
+             * not allow overlapping MPU regions. */
+            if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
+                ( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
+            {
+                xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
+                xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;
+            }
+            else
+            {
+                /* Define the region that allows access to the stack. */
+                ulRegionStartAddress &= portMPU_RBAR_ADDRESS_MASK;
+                ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK;
+
+                xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) |
+                                                             ( portMPU_REGION_NON_SHAREABLE ) |
+                                                             ( portMPU_REGION_READ_WRITE ) |
+                                                             ( portMPU_REGION_EXECUTE_NEVER );
+
+                xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = ( ulRegionEndAddress ) |
+                                                             ( portMPU_RLAR_ATTR_INDEX0 ) |
+                                                             ( portMPU_RLAR_REGION_ENABLE );
+            }
+        }
+
+        /* User supplied configurable regions. */
+        for( ulRegionNumber = 1; ulRegionNumber <= portNUM_CONFIGURABLE_REGIONS; ulRegionNumber++ )
+        {
+            /* If xRegions is NULL i.e. the task has not specified any MPU
+             * region, the else part ensures that all the configurable MPU
+             * regions are invalidated. */
+            if( ( xRegions != NULL ) && ( xRegions[ lIndex ].ulLengthInBytes > 0UL ) )
+            {
+                /* Translate the generic region definition contained in xRegions
+                 * into the ARMv8 specific MPU settings that are then stored in
+                 * xMPUSettings. */
+                ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK;
+                ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1;
+                ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK;
+
+                /* Start address. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = ( ulRegionStartAddress ) |
+                                                                          ( portMPU_REGION_NON_SHAREABLE );
+
+                /* RO/RW. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_READ_ONLY ) != 0 )
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_ONLY );
+                }
+                else
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_WRITE );
+                }
+
+                /* XN. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_EXECUTE_NEVER ) != 0 )
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_EXECUTE_NEVER );
+                }
+
+                /* End Address. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
+                                                                          ( portMPU_RLAR_REGION_ENABLE );
+
+                /* Normal memory/ Device memory. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
+                {
+                    /* Attr1 in MAIR0 is configured as device memory. */
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX1;
+                }
+                else
+                {
+                    /* Attr1 in MAIR0 is configured as normal memory. */
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
+                }
+            }
+            else
+            {
+                /* Invalidate the region. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = 0UL;
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = 0UL;
+            }
+
+            lIndex++;
+        }
+    }
+#endif /* configENABLE_MPU */
+/*-----------------------------------------------------------*/
+
+BaseType_t xPortIsInsideInterrupt( void )
+{
+    uint32_t ulCurrentInterrupt;
+    BaseType_t xReturn;
+
+    /* Obtain the number of the currently executing interrupt. Interrupt Program
+     * Status Register (IPSR) holds the exception number of the currently-executing
+     * exception or zero for Thread mode.*/
+    __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
+
+    if( ulCurrentInterrupt == 0 )
+    {
+        xReturn = pdFALSE;
+    }
+    else
+    {
+        xReturn = pdTRUE;
+    }
+
+    return xReturn;
+}
+/*-----------------------------------------------------------*/
diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c
index a34ef5185..fe79a141d 100644
--- a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c
+++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -39,328 +39,328 @@
  * header files. */
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
-#if( configENABLE_FPU == 1 )
-	#error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
+#if ( configENABLE_FPU == 1 )
+    #error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
 #endif
 
 void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	.syntax unified									\n"
-	"													\n"
-	"	ldr  r2, pxCurrentTCBConst2						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr  r1, [r2]									\n" /* Read pxCurrentTCB. */
-	"	ldr  r0, [r1]									\n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	dmb												\n" /* Complete outstanding transfers before disabling MPU. */
-	"	ldr r2, xMPUCTRLConst2							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r3, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	movs r4, #1										\n" /* r4 = 1. */
-	"	bics r3, r4										\n" /* r3 = r3 & ~r4 i.e. Clear the bit 0 in r3. */
-	"	str r3, [r2]									\n" /* Disable MPU. */
-	"													\n"
-	"	adds r1, #4										\n" /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
-	"	ldr  r4, [r1]									\n" /* r4 = *r1 i.e. r4 = MAIR0. */
-	"	ldr  r2, xMAIR0Const2							\n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-	"	str  r4, [r2]									\n" /* Program MAIR0. */
-	"	ldr  r2, xRNRConst2								\n" /* r2 = 0xe000ed98 [Location of RNR]. */
-	"	adds r1, #4										\n" /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
-	"	movs r4, #4										\n" /* r4 = 4. */
-	"	str  r4, [r2]									\n" /* Program RNR = 4. */
-	"	ldmia r1!, {r5,r6}								\n" /* Read first set of RBAR/RLAR from TCB. */
-	"	ldr  r3, xRBARConst2							\n" /* r3 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r3!, {r5,r6}								\n" /* Write first set of RBAR/RLAR registers. */
-	"	movs r4, #5										\n" /* r4 = 5. */
-	"	str  r4, [r2]									\n" /* Program RNR = 5. */
-	"	ldmia r1!, {r5,r6}								\n" /* Read second set of RBAR/RLAR from TCB. */
-	"	ldr  r3, xRBARConst2							\n" /* r3 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r3!, {r5,r6}								\n" /* Write second set of RBAR/RLAR registers. */
-	"	movs r4, #6										\n" /* r4 = 6. */
-	"	str  r4, [r2]									\n" /* Program RNR = 6. */
-	"	ldmia r1!, {r5,r6}								\n" /* Read third set of RBAR/RLAR from TCB. */
-	"	ldr  r3, xRBARConst2							\n" /* r3 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r3!, {r5,r6}								\n" /* Write third set of RBAR/RLAR registers. */
-	"	movs r4, #7										\n" /* r4 = 7. */
-	"	str  r4, [r2]									\n" /* Program RNR = 7. */
-	"	ldmia r1!, {r5,r6}								\n" /* Read fourth set of RBAR/RLAR from TCB. */
-	"	ldr  r3, xRBARConst2							\n" /* r3 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r3!, {r5,r6}								\n" /* Write fourth set of RBAR/RLAR registers. */
-	"													\n"
-	"	ldr r2, xMPUCTRLConst2							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r3, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	movs r4, #1										\n" /* r4 = 1. */
-	"	orrs r3, r4										\n" /* r3 = r3 | r4 i.e. Set the bit 0 in r3. */
-	"	str r3, [r2]									\n" /* Enable MPU. */
-	"	dsb												\n" /* Force memory writes before continuing. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	ldm  r0!, {r1-r3}								\n" /* Read from stack - r1 = PSPLIM, r2 = CONTROL and r3 = EXC_RETURN. */
-	"	msr  psplim, r1									\n" /* Set this task's PSPLIM value. */
-	"	msr  control, r2								\n" /* Set this task's CONTROL value. */
-	"	adds r0, #32									\n" /* Discard everything up to r0. */
-	"	msr  psp, r0									\n" /* This is now the new top of stack to use in the task. */
-	"	isb												\n"
-	"	bx   r3											\n" /* Finally, branch to EXC_RETURN. */
-	#else /* configENABLE_MPU */
-	"	ldm  r0!, {r1-r2}								\n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
-	"	msr  psplim, r1									\n" /* Set this task's PSPLIM value. */
-	"	movs r1, #2										\n" /* r1 = 2. */
-	"	msr  CONTROL, r1								\n" /* Switch to use PSP in the thread mode. */
-	"	adds r0, #32									\n" /* Discard everything up to r0. */
-	"	msr  psp, r0									\n" /* This is now the new top of stack to use in the task. */
-	"	isb												\n"
-	"	bx   r2											\n" /* Finally, branch to EXC_RETURN. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	"	.align 4										\n"
-	"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
-	#if( configENABLE_MPU == 1 )
-	"xMPUCTRLConst2: .word 0xe000ed94					\n"
-	"xMAIR0Const2: .word 0xe000edc0						\n"
-	"xRNRConst2: .word 0xe000ed98						\n"
-	"xRBARConst2: .word 0xe000ed9c						\n"
-	#endif /* configENABLE_MPU */
-	);
+    __asm volatile
+    (
+        "	.syntax unified									\n"
+        "													\n"
+        "	ldr  r2, pxCurrentTCBConst2						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr  r1, [r2]									\n"/* Read pxCurrentTCB. */
+        "	ldr  r0, [r1]									\n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	dmb												\n"/* Complete outstanding transfers before disabling MPU. */
+            "	ldr r2, xMPUCTRLConst2							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r3, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	movs r4, #1										\n"/* r4 = 1. */
+            "	bics r3, r4										\n"/* r3 = r3 & ~r4 i.e. Clear the bit 0 in r3. */
+            "	str r3, [r2]									\n"/* Disable MPU. */
+            "													\n"
+            "	adds r1, #4										\n"/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
+            "	ldr  r4, [r1]									\n"/* r4 = *r1 i.e. r4 = MAIR0. */
+            "	ldr  r2, xMAIR0Const2							\n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "	str  r4, [r2]									\n"/* Program MAIR0. */
+            "	ldr  r2, xRNRConst2								\n"/* r2 = 0xe000ed98 [Location of RNR]. */
+            "	adds r1, #4										\n"/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
+            "	movs r4, #4										\n"/* r4 = 4. */
+            "	str  r4, [r2]									\n"/* Program RNR = 4. */
+            "	ldmia r1!, {r5,r6}								\n"/* Read first set of RBAR/RLAR from TCB. */
+            "	ldr  r3, xRBARConst2							\n"/* r3 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r3!, {r5,r6}								\n"/* Write first set of RBAR/RLAR registers. */
+            "	movs r4, #5										\n"/* r4 = 5. */
+            "	str  r4, [r2]									\n"/* Program RNR = 5. */
+            "	ldmia r1!, {r5,r6}								\n"/* Read second set of RBAR/RLAR from TCB. */
+            "	ldr  r3, xRBARConst2							\n"/* r3 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r3!, {r5,r6}								\n"/* Write second set of RBAR/RLAR registers. */
+            "	movs r4, #6										\n"/* r4 = 6. */
+            "	str  r4, [r2]									\n"/* Program RNR = 6. */
+            "	ldmia r1!, {r5,r6}								\n"/* Read third set of RBAR/RLAR from TCB. */
+            "	ldr  r3, xRBARConst2							\n"/* r3 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r3!, {r5,r6}								\n"/* Write third set of RBAR/RLAR registers. */
+            "	movs r4, #7										\n"/* r4 = 7. */
+            "	str  r4, [r2]									\n"/* Program RNR = 7. */
+            "	ldmia r1!, {r5,r6}								\n"/* Read fourth set of RBAR/RLAR from TCB. */
+            "	ldr  r3, xRBARConst2							\n"/* r3 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r3!, {r5,r6}								\n"/* Write fourth set of RBAR/RLAR registers. */
+            "													\n"
+            "	ldr r2, xMPUCTRLConst2							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r3, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	movs r4, #1										\n"/* r4 = 1. */
+            "	orrs r3, r4										\n"/* r3 = r3 | r4 i.e. Set the bit 0 in r3. */
+            "	str r3, [r2]									\n"/* Enable MPU. */
+            "	dsb												\n"/* Force memory writes before continuing. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	ldm  r0!, {r1-r3}								\n"/* Read from stack - r1 = PSPLIM, r2 = CONTROL and r3 = EXC_RETURN. */
+            "	msr  psplim, r1									\n"/* Set this task's PSPLIM value. */
+            "	msr  control, r2								\n"/* Set this task's CONTROL value. */
+            "	adds r0, #32									\n"/* Discard everything up to r0. */
+            "	msr  psp, r0									\n"/* This is now the new top of stack to use in the task. */
+            "	isb												\n"
+            "	bx   r3											\n"/* Finally, branch to EXC_RETURN. */
+        #else /* configENABLE_MPU */
+            "	ldm  r0!, {r1-r2}								\n"/* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
+            "	msr  psplim, r1									\n"/* Set this task's PSPLIM value. */
+            "	movs r1, #2										\n"/* r1 = 2. */
+            "	msr  CONTROL, r1								\n"/* Switch to use PSP in the thread mode. */
+            "	adds r0, #32									\n"/* Discard everything up to r0. */
+            "	msr  psp, r0									\n"/* This is now the new top of stack to use in the task. */
+            "	isb												\n"
+            "	bx   r2											\n"/* Finally, branch to EXC_RETURN. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        "	.align 4										\n"
+        "pxCurrentTCBConst2: .word pxCurrentTCB				\n"
+        #if ( configENABLE_MPU == 1 )
+            "xMPUCTRLConst2: .word 0xe000ed94					\n"
+            "xMAIR0Const2: .word 0xe000edc0						\n"
+            "xRNRConst2: .word 0xe000ed98						\n"
+            "xRBARConst2: .word 0xe000ed9c						\n"
+        #endif /* configENABLE_MPU */
+    );
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
 {
-	__asm volatile
-	(
-	"	mrs r0, control									\n" /* r0 = CONTROL. */
-	"	movs r1, #1										\n" /* r1 = 1. */
-	"	tst r0, r1										\n" /* Perform r0 & r1 (bitwise AND) and update the conditions flag. */
-	"	beq running_privileged							\n" /* If the result of previous AND operation was 0, branch. */
-	"	movs r0, #0										\n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
-	"	bx lr											\n" /* Return. */
-	" running_privileged:								\n"
-	"	movs r0, #1										\n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
-	"	bx lr											\n" /* Return. */
-	"													\n"
-	"	.align 4										\n"
-	::: "r0", "r1", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, control									\n"/* r0 = CONTROL. */
+        "	movs r1, #1										\n"/* r1 = 1. */
+        "	tst r0, r1										\n"/* Perform r0 & r1 (bitwise AND) and update the conditions flag. */
+        "	beq running_privileged							\n"/* If the result of previous AND operation was 0, branch. */
+        "	movs r0, #0										\n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
+        "	bx lr											\n"/* Return. */
+        " running_privileged:								\n"
+        "	movs r0, #1										\n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
+        "	bx lr											\n"/* Return. */
+        "													\n"
+        "	.align 4										\n"
+        ::: "r0", "r1", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	 __asm volatile
-	(
-	"	mrs  r0, control								\n" /* Read the CONTROL register. */
-	"	movs r1, #1										\n" /* r1 = 1. */
-	"	bics r0, r1										\n" /* Clear the bit 0. */
-	"	msr  control, r0								\n" /* Write back the new CONTROL value. */
-	"	bx lr											\n" /* Return to the caller. */
-	::: "r0", "r1", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs  r0, control								\n"/* Read the CONTROL register. */
+        "	movs r1, #1										\n"/* r1 = 1. */
+        "	bics r0, r1										\n"/* Clear the bit 0. */
+        "	msr  control, r0								\n"/* Write back the new CONTROL value. */
+        "	bx lr											\n"/* Return to the caller. */
+        ::: "r0", "r1", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vResetPrivilege( void ) /* __attribute__ (( naked )) */
 {
-	__asm volatile
-	(
-	"	mrs r0, control									\n" /* r0 = CONTROL. */
-	"	movs r1, #1										\n" /* r1 = 1. */
-	"	orrs r0, r1										\n" /* r0 = r0 | r1. */
-	"	msr control, r0									\n" /* CONTROL = r0. */
-	"	bx lr											\n" /* Return to the caller. */
-	:::"r0", "r1", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, control									\n"/* r0 = CONTROL. */
+        "	movs r1, #1										\n"/* r1 = 1. */
+        "	orrs r0, r1										\n"/* r0 = r0 | r1. */
+        "	msr control, r0									\n"/* CONTROL = r0. */
+        "	bx lr											\n"/* Return to the caller. */
+        ::: "r0", "r1", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	ldr r0, xVTORConst								\n" /* Use the NVIC offset register to locate the stack. */
-	"	ldr r0, [r0]									\n" /* Read the VTOR register which gives the address of vector table. */
-	"	ldr r0, [r0]									\n" /* The first entry in vector table is stack pointer. */
-	"	msr msp, r0										\n" /* Set the MSP back to the start of the stack. */
-	"	cpsie i											\n" /* Globally enable interrupts. */
-	"	dsb												\n"
-	"	isb												\n"
-	"	svc %0											\n" /* System call to start the first task. */
-	"	nop												\n"
-	"													\n"
-	"   .align 4										\n"
-	"xVTORConst: .word 0xe000ed08						\n"
-	:: "i" ( portSVC_START_SCHEDULER ) : "memory"
-	);
+    __asm volatile
+    (
+        "	ldr r0, xVTORConst								\n"/* Use the NVIC offset register to locate the stack. */
+        "	ldr r0, [r0]									\n"/* Read the VTOR register which gives the address of vector table. */
+        "	ldr r0, [r0]									\n"/* The first entry in vector table is stack pointer. */
+        "	msr msp, r0										\n"/* Set the MSP back to the start of the stack. */
+        "	cpsie i											\n"/* Globally enable interrupts. */
+        "	dsb												\n"
+        "	isb												\n"
+        "	svc %0											\n"/* System call to start the first task. */
+        "	nop												\n"
+        "													\n"
+        "   .align 4										\n"
+        "xVTORConst: .word 0xe000ed08						\n"
+        ::"i" ( portSVC_START_SCHEDULER ) : "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	mrs r0, PRIMASK									\n"
-	"	cpsid i											\n"
-	"	bx lr											\n"
-	::: "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, PRIMASK									\n"
+        "	cpsid i											\n"
+        "	bx lr											\n"
+        ::: "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	msr PRIMASK, r0									\n"
-	"	bx lr											\n"
-	::: "memory"
-	);
+    __asm volatile
+    (
+        "	msr PRIMASK, r0									\n"
+        "	bx lr											\n"
+        ::: "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	.syntax unified									\n"
-	"													\n"
-	"	mrs r0, psp										\n" /* Read PSP in r0. */
-	"	ldr r2, pxCurrentTCBConst						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr r1, [r2]									\n" /* Read pxCurrentTCB. */
-	#if( configENABLE_MPU == 1 )
-	"	subs r0, r0, #44								\n" /* Make space for PSPLIM, CONTROL, LR and the remaining registers on the stack. */
-	"	str r0, [r1]									\n" /* Save the new top of stack in TCB. */
-	"	mrs r1, psplim									\n" /* r1 = PSPLIM. */
-	"	mrs r2, control									\n" /* r2 = CONTROL. */
-	"	mov r3, lr										\n" /* r3 = LR/EXC_RETURN. */
-	"	stmia r0!, {r1-r7}								\n" /* Store on the stack - PSPLIM, CONTROL, LR and low registers that are not automatically saved. */
-	"	mov r4, r8										\n" /* r4 = r8. */
-	"	mov r5, r9										\n" /* r5 = r9. */
-	"	mov r6, r10										\n" /* r6 = r10. */
-	"	mov r7, r11										\n" /* r7 = r11. */
-	"	stmia r0!, {r4-r7}								\n" /* Store the high registers that are not saved automatically. */
-	#else /* configENABLE_MPU */
-	"	subs r0, r0, #40								\n" /* Make space for PSPLIM, LR and the remaining registers on the stack. */
-	"	str r0, [r1]									\n" /* Save the new top of stack in TCB. */
-	"	mrs r2, psplim									\n" /* r2 = PSPLIM. */
-	"	mov r3, lr										\n" /* r3 = LR/EXC_RETURN. */
-	"	stmia r0!, {r2-r7}								\n" /* Store on the stack - PSPLIM, LR and low registers that are not automatically saved. */
-	"	mov r4, r8										\n" /* r4 = r8. */
-	"	mov r5, r9										\n" /* r5 = r9. */
-	"	mov r6, r10										\n" /* r6 = r10. */
-	"	mov r7, r11										\n" /* r7 = r11. */
-	"	stmia r0!, {r4-r7}								\n" /* Store the high registers that are not saved automatically. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	"	cpsid i											\n"
-	"	bl vTaskSwitchContext							\n"
-	"	cpsie i											\n"
-	"													\n"
-	"	ldr r2, pxCurrentTCBConst						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr r1, [r2]									\n" /* Read pxCurrentTCB. */
-	"	ldr r0, [r1]									\n" /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	dmb												\n" /* Complete outstanding transfers before disabling MPU. */
-	"	ldr r2, xMPUCTRLConst							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r3, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	movs r4, #1										\n" /* r4 = 1. */
-	"	bics r3, r4										\n" /* r3 = r3 & ~r4 i.e. Clear the bit 0 in r3. */
-	"	str r3, [r2]									\n" /* Disable MPU. */
-	"													\n"
-	"	adds r1, #4										\n" /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
-	"	ldr  r4, [r1]									\n" /* r4 = *r1 i.e. r4 = MAIR0. */
-	"	ldr  r2, xMAIR0Const							\n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-	"	str  r4, [r2]									\n" /* Program MAIR0. */
-	"	ldr  r2, xRNRConst								\n" /* r2 = 0xe000ed98 [Location of RNR]. */
-	"	adds r1, #4										\n" /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
-	"	movs r4, #4										\n" /* r4 = 4. */
-	"	str  r4, [r2]									\n" /* Program RNR = 4. */
-	"	ldmia r1!, {r5,r6}								\n" /* Read first set of RBAR/RLAR from TCB. */
-	"	ldr  r3, xRBARConst								\n" /* r3 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r3!, {r5,r6}								\n" /* Write first set of RBAR/RLAR registers. */
-	"	movs r4, #5										\n" /* r4 = 5. */
-	"	str  r4, [r2]									\n" /* Program RNR = 5. */
-	"	ldmia r1!, {r5,r6}								\n" /* Read second set of RBAR/RLAR from TCB. */
-	"	ldr  r3, xRBARConst								\n" /* r3 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r3!, {r5,r6}								\n" /* Write second set of RBAR/RLAR registers. */
-	"	movs r4, #6										\n" /* r4 = 6. */
-	"	str  r4, [r2]									\n" /* Program RNR = 6. */
-	"	ldmia r1!, {r5,r6}								\n" /* Read third set of RBAR/RLAR from TCB. */
-	"	ldr  r3, xRBARConst								\n" /* r3 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r3!, {r5,r6}								\n" /* Write third set of RBAR/RLAR registers. */
-	"	movs r4, #7										\n" /* r4 = 7. */
-	"	str  r4, [r2]									\n" /* Program RNR = 7. */
-	"	ldmia r1!, {r5,r6}								\n" /* Read fourth set of RBAR/RLAR from TCB. */
-	"	ldr  r3, xRBARConst								\n" /* r3 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r3!, {r5,r6}								\n" /* Write fourth set of RBAR/RLAR registers. */
-	"													\n"
-	"	ldr r2, xMPUCTRLConst							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r3, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	movs r4, #1										\n" /* r4 = 1. */
-	"	orrs r3, r4										\n" /* r3 = r3 | r4 i.e. Set the bit 0 in r3. */
-	"	str r3, [r2]									\n" /* Enable MPU. */
-	"	dsb												\n" /* Force memory writes before continuing. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	adds r0, r0, #28								\n" /* Move to the high registers. */
-	"	ldmia r0!, {r4-r7}								\n" /* Restore the high registers that are not automatically restored. */
-	"	mov r8, r4										\n" /* r8 = r4. */
-	"	mov r9, r5										\n" /* r9 = r5. */
-	"	mov r10, r6										\n" /* r10 = r6. */
-	"	mov r11, r7										\n" /* r11 = r7. */
-	"	msr psp, r0										\n" /* Remember the new top of stack for the task. */
-	"	subs r0, r0, #44								\n" /* Move to the starting of the saved context. */
-	"	ldmia r0!, {r1-r7}								\n" /* Read from stack - r1 = PSPLIM, r2 = CONTROL, r3 = LR and r4-r7 restored. */
-	"	msr psplim, r1									\n" /* Restore the PSPLIM register value for the task. */
-	"	msr control, r2									\n" /* Restore the CONTROL register value for the task. */
-	"	bx r3											\n"
-	#else /* configENABLE_MPU */
-	"	adds r0, r0, #24								\n" /* Move to the high registers. */
-	"	ldmia r0!, {r4-r7}								\n" /* Restore the high registers that are not automatically restored. */
-	"	mov r8, r4										\n" /* r8 = r4. */
-	"	mov r9, r5										\n" /* r9 = r5. */
-	"	mov r10, r6										\n" /* r10 = r6. */
-	"	mov r11, r7										\n" /* r11 = r7. */
-	"	msr psp, r0										\n" /* Remember the new top of stack for the task. */
-	"	subs r0, r0, #40								\n" /* Move to the starting of the saved context. */
-	"	ldmia r0!, {r2-r7}								\n" /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r7 restored. */
-	"	msr psplim, r2									\n" /* Restore the PSPLIM register value for the task. */
-	"	bx r3											\n"
-	#endif /* configENABLE_MPU */
-	"													\n"
-	"	.align 4										\n"
-	"pxCurrentTCBConst: .word pxCurrentTCB				\n"
-	#if( configENABLE_MPU == 1 )
-	"xMPUCTRLConst: .word 0xe000ed94					\n"
-	"xMAIR0Const: .word 0xe000edc0						\n"
-	"xRNRConst: .word 0xe000ed98						\n"
-	"xRBARConst: .word 0xe000ed9c						\n"
-	#endif /* configENABLE_MPU */
-	);
+    __asm volatile
+    (
+        "	.syntax unified									\n"
+        "													\n"
+        "	mrs r0, psp										\n"/* Read PSP in r0. */
+        "	ldr r2, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr r1, [r2]									\n"/* Read pxCurrentTCB. */
+        #if ( configENABLE_MPU == 1 )
+            "	subs r0, r0, #44								\n"/* Make space for PSPLIM, CONTROL, LR and the remaining registers on the stack. */
+            "	str r0, [r1]									\n"/* Save the new top of stack in TCB. */
+            "	mrs r1, psplim									\n"/* r1 = PSPLIM. */
+            "	mrs r2, control									\n"/* r2 = CONTROL. */
+            "	mov r3, lr										\n"/* r3 = LR/EXC_RETURN. */
+            "	stmia r0!, {r1-r7}								\n"/* Store on the stack - PSPLIM, CONTROL, LR and low registers that are not automatically saved. */
+            "	mov r4, r8										\n"/* r4 = r8. */
+            "	mov r5, r9										\n"/* r5 = r9. */
+            "	mov r6, r10										\n"/* r6 = r10. */
+            "	mov r7, r11										\n"/* r7 = r11. */
+            "	stmia r0!, {r4-r7}								\n"/* Store the high registers that are not saved automatically. */
+        #else /* configENABLE_MPU */
+            "	subs r0, r0, #40								\n"/* Make space for PSPLIM, LR and the remaining registers on the stack. */
+            "	str r0, [r1]									\n"/* Save the new top of stack in TCB. */
+            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
+            "	mov r3, lr										\n"/* r3 = LR/EXC_RETURN. */
+            "	stmia r0!, {r2-r7}								\n"/* Store on the stack - PSPLIM, LR and low registers that are not automatically saved. */
+            "	mov r4, r8										\n"/* r4 = r8. */
+            "	mov r5, r9										\n"/* r5 = r9. */
+            "	mov r6, r10										\n"/* r6 = r10. */
+            "	mov r7, r11										\n"/* r7 = r11. */
+            "	stmia r0!, {r4-r7}								\n"/* Store the high registers that are not saved automatically. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        "	cpsid i											\n"
+        "	bl vTaskSwitchContext							\n"
+        "	cpsie i											\n"
+        "													\n"
+        "	ldr r2, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr r1, [r2]									\n"/* Read pxCurrentTCB. */
+        "	ldr r0, [r1]									\n"/* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	dmb												\n"/* Complete outstanding transfers before disabling MPU. */
+            "	ldr r2, xMPUCTRLConst							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r3, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	movs r4, #1										\n"/* r4 = 1. */
+            "	bics r3, r4										\n"/* r3 = r3 & ~r4 i.e. Clear the bit 0 in r3. */
+            "	str r3, [r2]									\n"/* Disable MPU. */
+            "													\n"
+            "	adds r1, #4										\n"/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
+            "	ldr  r4, [r1]									\n"/* r4 = *r1 i.e. r4 = MAIR0. */
+            "	ldr  r2, xMAIR0Const							\n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "	str  r4, [r2]									\n"/* Program MAIR0. */
+            "	ldr  r2, xRNRConst								\n"/* r2 = 0xe000ed98 [Location of RNR]. */
+            "	adds r1, #4										\n"/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
+            "	movs r4, #4										\n"/* r4 = 4. */
+            "	str  r4, [r2]									\n"/* Program RNR = 4. */
+            "	ldmia r1!, {r5,r6}								\n"/* Read first set of RBAR/RLAR from TCB. */
+            "	ldr  r3, xRBARConst								\n"/* r3 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r3!, {r5,r6}								\n"/* Write first set of RBAR/RLAR registers. */
+            "	movs r4, #5										\n"/* r4 = 5. */
+            "	str  r4, [r2]									\n"/* Program RNR = 5. */
+            "	ldmia r1!, {r5,r6}								\n"/* Read second set of RBAR/RLAR from TCB. */
+            "	ldr  r3, xRBARConst								\n"/* r3 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r3!, {r5,r6}								\n"/* Write second set of RBAR/RLAR registers. */
+            "	movs r4, #6										\n"/* r4 = 6. */
+            "	str  r4, [r2]									\n"/* Program RNR = 6. */
+            "	ldmia r1!, {r5,r6}								\n"/* Read third set of RBAR/RLAR from TCB. */
+            "	ldr  r3, xRBARConst								\n"/* r3 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r3!, {r5,r6}								\n"/* Write third set of RBAR/RLAR registers. */
+            "	movs r4, #7										\n"/* r4 = 7. */
+            "	str  r4, [r2]									\n"/* Program RNR = 7. */
+            "	ldmia r1!, {r5,r6}								\n"/* Read fourth set of RBAR/RLAR from TCB. */
+            "	ldr  r3, xRBARConst								\n"/* r3 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r3!, {r5,r6}								\n"/* Write fourth set of RBAR/RLAR registers. */
+            "													\n"
+            "	ldr r2, xMPUCTRLConst							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r3, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	movs r4, #1										\n"/* r4 = 1. */
+            "	orrs r3, r4										\n"/* r3 = r3 | r4 i.e. Set the bit 0 in r3. */
+            "	str r3, [r2]									\n"/* Enable MPU. */
+            "	dsb												\n"/* Force memory writes before continuing. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	adds r0, r0, #28								\n"/* Move to the high registers. */
+            "	ldmia r0!, {r4-r7}								\n"/* Restore the high registers that are not automatically restored. */
+            "	mov r8, r4										\n"/* r8 = r4. */
+            "	mov r9, r5										\n"/* r9 = r5. */
+            "	mov r10, r6										\n"/* r10 = r6. */
+            "	mov r11, r7										\n"/* r11 = r7. */
+            "	msr psp, r0										\n"/* Remember the new top of stack for the task. */
+            "	subs r0, r0, #44								\n"/* Move to the starting of the saved context. */
+            "	ldmia r0!, {r1-r7}								\n"/* Read from stack - r1 = PSPLIM, r2 = CONTROL, r3 = LR and r4-r7 restored. */
+            "	msr psplim, r1									\n"/* Restore the PSPLIM register value for the task. */
+            "	msr control, r2									\n"/* Restore the CONTROL register value for the task. */
+            "	bx r3											\n"
+        #else /* configENABLE_MPU */
+            "	adds r0, r0, #24								\n"/* Move to the high registers. */
+            "	ldmia r0!, {r4-r7}								\n"/* Restore the high registers that are not automatically restored. */
+            "	mov r8, r4										\n"/* r8 = r4. */
+            "	mov r9, r5										\n"/* r9 = r5. */
+            "	mov r10, r6										\n"/* r10 = r6. */
+            "	mov r11, r7										\n"/* r11 = r7. */
+            "	msr psp, r0										\n"/* Remember the new top of stack for the task. */
+            "	subs r0, r0, #40								\n"/* Move to the starting of the saved context. */
+            "	ldmia r0!, {r2-r7}								\n"/* Read from stack - r2 = PSPLIM, r3 = LR and r4-r7 restored. */
+            "	msr psplim, r2									\n"/* Restore the PSPLIM register value for the task. */
+            "	bx r3											\n"
+        #endif /* configENABLE_MPU */
+        "													\n"
+        "	.align 4										\n"
+        "pxCurrentTCBConst: .word pxCurrentTCB				\n"
+        #if ( configENABLE_MPU == 1 )
+            "xMPUCTRLConst: .word 0xe000ed94					\n"
+            "xMAIR0Const: .word 0xe000edc0						\n"
+            "xRNRConst: .word 0xe000ed98						\n"
+            "xRBARConst: .word 0xe000ed9c						\n"
+        #endif /* configENABLE_MPU */
+    );
 }
 /*-----------------------------------------------------------*/
 
 void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	movs r0, #4										\n"
-	"	mov r1, lr										\n"
-	"	tst r0, r1										\n"
-	"	beq stacking_used_msp							\n"
-	"	mrs r0, psp										\n"
-	"	ldr r2, svchandler_address_const				\n"
-	"	bx r2											\n"
-	" stacking_used_msp:								\n"
-	"	mrs r0, msp										\n"
-	"	ldr r2, svchandler_address_const				\n"
-	"	bx r2											\n"
-	"													\n"
-	"	.align 4										\n"
-	"svchandler_address_const: .word vPortSVCHandler_C	\n"
-	);
+    __asm volatile
+    (
+        "	movs r0, #4										\n"
+        "	mov r1, lr										\n"
+        "	tst r0, r1										\n"
+        "	beq stacking_used_msp							\n"
+        "	mrs r0, psp										\n"
+        "	ldr r2, svchandler_address_const				\n"
+        "	bx r2											\n"
+        " stacking_used_msp:								\n"
+        "	mrs r0, msp										\n"
+        "	ldr r2, svchandler_address_const				\n"
+        "	bx r2											\n"
+        "													\n"
+        "	.align 4										\n"
+        "svchandler_address_const: .word vPortSVCHandler_C	\n"
+    );
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h
index 71d711c69..6aaee8fc8 100644
--- a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h
+++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -38,14 +38,14 @@
  * @brief Restore the context of the first task so that the first task starts
  * executing.
  */
-void vRestoreContextOfFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vRestoreContextOfFirstTask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Checks whether or not the processor is privileged.
  *
  * @return 1 if the processor is already privileged, 0 otherwise.
  */
-BaseType_t xIsPrivileged( void ) __attribute__ (( naked ));
+BaseType_t xIsPrivileged( void ) __attribute__( ( naked ) );
 
 /**
  * @brief Raises the privilege level by clearing the bit 0 of the CONTROL
@@ -58,7 +58,7 @@ BaseType_t xIsPrivileged( void ) __attribute__ (( naked ));
  *  Bit[0] = 0 --> The processor is running privileged
  *  Bit[0] = 1 --> The processor is running unprivileged.
  */
-void vRaisePrivilege( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vRaisePrivilege( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
@@ -68,32 +68,32 @@ void vRaisePrivilege( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
  *  Bit[0] = 0 --> The processor is running privileged
  *  Bit[0] = 1 --> The processor is running unprivileged.
  */
-void vResetPrivilege( void ) __attribute__ (( naked ));
+void vResetPrivilege( void ) __attribute__( ( naked ) );
 
 /**
  * @brief Starts the first task.
  */
-void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vStartFirstTask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Disables interrupts.
  */
-uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
+uint32_t ulSetInterruptMask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Enables interrupts.
  */
-void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
+void vClearInterruptMask( uint32_t ulMask ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief PendSV Exception handler.
  */
-void PendSV_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void PendSV_Handler( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief SVC Handler.
  */
-void SVC_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void SVC_Handler( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Allocate a Secure context for the calling task.
@@ -101,13 +101,13 @@ void SVC_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
  * @param[in] ulSecureStackSize The size of the stack to be allocated on the
  * secure side for the calling task.
  */
-void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) __attribute__ (( naked ));
+void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) __attribute__( ( naked ) );
 
 /**
  * @brief Free the task's secure context.
  *
  * @param[in] pulTCB Pointer to the Task Control Block (TCB) of the task.
  */
-void vPortFreeSecureContext( uint32_t *pulTCB ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vPortFreeSecureContext( uint32_t * pulTCB ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 #endif /* __PORT_ASM_H__ */
diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h
index 2e8bba256..fc12cf1a3 100644
--- a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h
+++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,18 +19,18 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*------------------------------------------------------------------------------
  * Port specific definitions.
@@ -42,109 +42,109 @@ extern "C" {
  *------------------------------------------------------------------------------
  */
 
-#ifndef configENABLE_FPU
-	#error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
-#endif /* configENABLE_FPU */
+    #ifndef configENABLE_FPU
+        #error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
+    #endif /* configENABLE_FPU */
 
-#ifndef configENABLE_MPU
-	#error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
-#endif /* configENABLE_MPU */
+    #ifndef configENABLE_MPU
+        #error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
+    #endif /* configENABLE_MPU */
 
-#ifndef configENABLE_TRUSTZONE
-	#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
-#endif /* configENABLE_TRUSTZONE */
+    #ifndef configENABLE_TRUSTZONE
+        #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
+    #endif /* configENABLE_TRUSTZONE */
 
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Type definitions.
  */
-#define portCHAR											char
-#define portFLOAT											float
-#define portDOUBLE											double
-#define portLONG											long
-#define portSHORT											short
-#define portSTACK_TYPE										uint32_t
-#define portBASE_TYPE										long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE										StackType_t;
-typedef long												BaseType_t;
-typedef unsigned long										UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	 * not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC							1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * Architecture specifics.
  */
-#define portARCH_NAME										"Cortex-M23"
-#define portSTACK_GROWTH									( -1 )
-#define portTICK_PERIOD_MS									( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT									8
-#define portNOP()
-#define portINLINE											__inline
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE								inline __attribute__(( always_inline ))
-#endif
-#define portHAS_STACK_OVERFLOW_CHECKING						1
-#define portDONT_DISCARD									__attribute__(( used ))
+    #define portARCH_NAME                      "Cortex-M23"
+    #define portSTACK_GROWTH                   ( -1 )
+    #define portTICK_PERIOD_MS                 ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT                 8
+    #define portNOP()
+    #define portINLINE                         __inline
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE               inline __attribute__( ( always_inline ) )
+    #endif
+    #define portHAS_STACK_OVERFLOW_CHECKING    1
+    #define portDONT_DISCARD                   __attribute__( ( used ) )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Extern declarations.
  */
-extern BaseType_t xPortIsInsideInterrupt( void );
+    extern BaseType_t xPortIsInsideInterrupt( void );
 
-extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
 
-extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
-extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
 
-extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
 
-#if( configENABLE_TRUSTZONE == 1 )
-	extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
-	extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
-#endif /* configENABLE_TRUSTZONE */
+    #if ( configENABLE_TRUSTZONE == 1 )
+        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
+        extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
+    #endif /* configENABLE_TRUSTZONE */
 
-#if( configENABLE_MPU == 1 )
-	extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
-	extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
+        extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief MPU specific constants.
  */
-#if( configENABLE_MPU == 1 )
-	#define portUSING_MPU_WRAPPERS							1
-	#define portPRIVILEGE_BIT								( 0x80000000UL )
-#else
-	#define portPRIVILEGE_BIT								( 0x0UL )
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        #define portUSING_MPU_WRAPPERS    1
+        #define portPRIVILEGE_BIT         ( 0x80000000UL )
+    #else
+        #define portPRIVILEGE_BIT         ( 0x0UL )
+    #endif /* configENABLE_MPU */
 
 
 /* MPU regions. */
-#define portPRIVILEGED_FLASH_REGION							( 0UL )
-#define portUNPRIVILEGED_FLASH_REGION						( 1UL )
-#define portUNPRIVILEGED_SYSCALLS_REGION					( 2UL )
-#define portPRIVILEGED_RAM_REGION							( 3UL )
-#define portSTACK_REGION									( 4UL )
-#define portFIRST_CONFIGURABLE_REGION						( 5UL )
-#define portLAST_CONFIGURABLE_REGION						( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS						( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS								( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
+    #define portPRIVILEGED_FLASH_REGION                   ( 0UL )
+    #define portUNPRIVILEGED_FLASH_REGION                 ( 1UL )
+    #define portUNPRIVILEGED_SYSCALLS_REGION              ( 2UL )
+    #define portPRIVILEGED_RAM_REGION                     ( 3UL )
+    #define portSTACK_REGION                              ( 4UL )
+    #define portFIRST_CONFIGURABLE_REGION                 ( 5UL )
+    #define portLAST_CONFIGURABLE_REGION                  ( 7UL )
+    #define portNUM_CONFIGURABLE_REGIONS                  ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
+    #define portTOTAL_NUM_REGIONS                         ( portNUM_CONFIGURABLE_REGIONS + 1 )   /* Plus one to make space for the stack region. */
 
 /* Device memory attributes used in MPU_MAIR registers.
  *
@@ -156,155 +156,157 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
  *				11 --> Device-GRE
  *  Bit[1:0] - 00, Reserved.
  */
-#define portMPU_DEVICE_MEMORY_nGnRnE						( 0x00 ) /* 0000 0000 */
-#define portMPU_DEVICE_MEMORY_nGnRE							( 0x04 ) /* 0000 0100 */
-#define portMPU_DEVICE_MEMORY_nGRE							( 0x08 ) /* 0000 1000 */
-#define portMPU_DEVICE_MEMORY_GRE							( 0x0C ) /* 0000 1100 */
+    #define portMPU_DEVICE_MEMORY_nGnRnE                  ( 0x00 )   /* 0000 0000 */
+    #define portMPU_DEVICE_MEMORY_nGnRE                   ( 0x04 )   /* 0000 0100 */
+    #define portMPU_DEVICE_MEMORY_nGRE                    ( 0x08 )   /* 0000 1000 */
+    #define portMPU_DEVICE_MEMORY_GRE                     ( 0x0C )   /* 0000 1100 */
 
 /* Normal memory attributes used in MPU_MAIR registers. */
-#define portMPU_NORMAL_MEMORY_NON_CACHEABLE					( 0x44 ) /* Non-cacheable. */
-#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE			( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
+    #define portMPU_NORMAL_MEMORY_NON_CACHEABLE           ( 0x44 )   /* Non-cacheable. */
+    #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE    ( 0xFF )   /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
 
 /* Attributes used in MPU_RBAR registers. */
-#define portMPU_REGION_NON_SHAREABLE						( 0UL << 3UL )
-#define portMPU_REGION_INNER_SHAREABLE						( 1UL << 3UL )
-#define portMPU_REGION_OUTER_SHAREABLE						( 2UL << 3UL )
+    #define portMPU_REGION_NON_SHAREABLE                  ( 0UL << 3UL )
+    #define portMPU_REGION_INNER_SHAREABLE                ( 1UL << 3UL )
+    #define portMPU_REGION_OUTER_SHAREABLE                ( 2UL << 3UL )
 
-#define portMPU_REGION_PRIVILEGED_READ_WRITE				( 0UL << 1UL )
-#define portMPU_REGION_READ_WRITE							( 1UL << 1UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY					( 2UL << 1UL )
-#define portMPU_REGION_READ_ONLY							( 3UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_WRITE          ( 0UL << 1UL )
+    #define portMPU_REGION_READ_WRITE                     ( 1UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_ONLY           ( 2UL << 1UL )
+    #define portMPU_REGION_READ_ONLY                      ( 3UL << 1UL )
 
-#define portMPU_REGION_EXECUTE_NEVER						( 1UL )
+    #define portMPU_REGION_EXECUTE_NEVER                  ( 1UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Settings to define an MPU region.
  */
-typedef struct MPURegionSettings
-{
-	uint32_t ulRBAR;	/**< RBAR for the region. */
-	uint32_t ulRLAR;	/**< RLAR for the region. */
-} MPURegionSettings_t;
+    typedef struct MPURegionSettings
+    {
+        uint32_t ulRBAR; /**< RBAR for the region. */
+        uint32_t ulRLAR; /**< RLAR for the region. */
+    } MPURegionSettings_t;
 
 /**
  * @brief MPU settings as stored in the TCB.
  */
-typedef struct MPU_SETTINGS
-{
-	uint32_t ulMAIR0;	/**< MAIR0 for the task containing attributes for all the 4 per task regions. */
-	MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
-} xMPU_SETTINGS;
+    typedef struct MPU_SETTINGS
+    {
+        uint32_t ulMAIR0;                                              /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
+        MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
+    } xMPU_SETTINGS;
 /*-----------------------------------------------------------*/
 
 /**
  * @brief SVC numbers.
  */
-#define portSVC_ALLOCATE_SECURE_CONTEXT						0
-#define portSVC_FREE_SECURE_CONTEXT							1
-#define portSVC_START_SCHEDULER								2
-#define portSVC_RAISE_PRIVILEGE								3
+    #define portSVC_ALLOCATE_SECURE_CONTEXT    0
+    #define portSVC_FREE_SECURE_CONTEXT        1
+    #define portSVC_START_SCHEDULER            2
+    #define portSVC_RAISE_PRIVILEGE            3
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Scheduler utilities.
  */
-#define portYIELD()											vPortYield()
-#define portNVIC_INT_CTRL_REG								( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT								( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired )			if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x )								portEND_SWITCHING_ISR( x )
+    #define portYIELD()                                 vPortYield()
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Critical section management.
  */
-#define portSET_INTERRUPT_MASK_FROM_ISR()					ulSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)				vClearInterruptMask( x )
-#define portDISABLE_INTERRUPTS()							__asm volatile ( " cpsid i " ::: "memory" )
-#define portENABLE_INTERRUPTS()								__asm volatile ( " cpsie i " ::: "memory" )
-#define portENTER_CRITICAL()								vPortEnterCritical()
-#define portEXIT_CRITICAL()									vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulSetInterruptMask()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vClearInterruptMask( x )
+    #define portDISABLE_INTERRUPTS()                  __asm volatile ( " cpsid i " ::: "memory" )
+    #define portENABLE_INTERRUPTS()                   __asm volatile ( " cpsie i " ::: "memory" )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Tickless idle/low power functionality.
  */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Task function macros as described on the FreeRTOS.org WEB site.
  */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters )		void vFunction( void *pvParameters )
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Allocate a secure context for the task.
-	 *
-	 * Tasks are not created with a secure context. Any task that is going to call
-	 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
-	 * secure context before it calls any secure function.
-	 *
-	 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
-	 */
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )	vPortAllocateSecureContext( ulSecureStackSize )
+    #if ( configENABLE_TRUSTZONE == 1 )
 
-	/**
-	 * @brief Called when a task is deleted to delete the task's secure context,
-	 * if it has one.
-	 *
-	 * @param[in] pxTCB The TCB of the task being deleted.
-	 */
-	#define portCLEAN_UP_TCB( pxTCB )							vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-#else
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-	#define portCLEAN_UP_TCB( pxTCB )
-#endif /* configENABLE_TRUSTZONE */
+/**
+ * @brief Allocate a secure context for the task.
+ *
+ * Tasks are not created with a secure context. Any task that is going to call
+ * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
+ * secure context before it calls any secure function.
+ *
+ * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
+ */
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )    vPortAllocateSecureContext( ulSecureStackSize )
+
+/**
+ * @brief Called when a task is deleted to delete the task's secure context,
+ * if it has one.
+ *
+ * @param[in] pxTCB The TCB of the task being deleted.
+ */
+        #define portCLEAN_UP_TCB( pxTCB )                           vPortFreeSecureContext( ( uint32_t * ) pxTCB )
+    #else
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
+        #define portCLEAN_UP_TCB( pxTCB )
+    #endif /* configENABLE_TRUSTZONE */
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Checks whether or not the processor is privileged.
-	 *
-	 * @return 1 if the processor is already privileged, 0 otherwise.
-	 */
-	#define portIS_PRIVILEGED()									xIsPrivileged()
+    #if ( configENABLE_MPU == 1 )
 
-	/**
-	 * @brief Raise an SVC request to raise privilege.
-	 *
-	 * The SVC handler checks that the SVC was raised from a system call and only
-	 * then it raises the privilege. If this is called from any other place,
-	 * the privilege is not raised.
-	 */
-	#define portRAISE_PRIVILEGE()								__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+/**
+ * @brief Checks whether or not the processor is privileged.
+ *
+ * @return 1 if the processor is already privileged, 0 otherwise.
+ */
+        #define portIS_PRIVILEGED()      xIsPrivileged()
 
-	/**
-	 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
-	 * register.
-	 */
-	#define portRESET_PRIVILEGE()								vResetPrivilege()
-#else
-	#define portIS_PRIVILEGED()
-	#define portRAISE_PRIVILEGE()
-	#define portRESET_PRIVILEGE()
-#endif /* configENABLE_MPU */
+/**
+ * @brief Raise an SVC request to raise privilege.
+ *
+ * The SVC handler checks that the SVC was raised from a system call and only
+ * then it raises the privilege. If this is called from any other place,
+ * the privilege is not raised.
+ */
+        #define portRAISE_PRIVILEGE()    __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+
+/**
+ * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
+ * register.
+ */
+        #define portRESET_PRIVILEGE()    vResetPrivilege()
+    #else
+        #define portIS_PRIVILEGED()
+        #define portRAISE_PRIVILEGE()
+        #define portRESET_PRIVILEGE()
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Barriers.
  */
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
+    #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
 /*-----------------------------------------------------------*/
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
diff --git a/portable/GCC/ARM_CM3/port.c b/portable/GCC/ARM_CM3/port.c
index 535926067..2546ffaf9 100644
--- a/portable/GCC/ARM_CM3/port.c
+++ b/portable/GCC/ARM_CM3/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,87 +19,87 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------
- * Implementation of functions defined in portable.h for the ARM CM3 port.
- *----------------------------------------------------------*/
+* Implementation of functions defined in portable.h for the ARM CM3 port.
+*----------------------------------------------------------*/
 
 /* Scheduler includes. */
 #include "FreeRTOS.h"
 #include "task.h"
 
 /* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is
-defined.  The value should also ensure backward compatibility.
-FreeRTOS.org versions prior to V4.4.0 did not include this definition. */
+ * defined.  The value should also ensure backward compatibility.
+ * FreeRTOS.org versions prior to V4.4.0 did not include this definition. */
 #ifndef configKERNEL_INTERRUPT_PRIORITY
-	#define configKERNEL_INTERRUPT_PRIORITY 255
+    #define configKERNEL_INTERRUPT_PRIORITY    255
 #endif
 
 #ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 1UL << 2UL )
+    #define configSYSTICK_CLOCK_HZ      configCPU_CLOCK_HZ
+    /* Ensure the SysTick is clocked at the same frequency as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 1UL << 2UL )
 #else
-	/* The way the SysTick is clocked is not modified in case it is not the same
-	as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 0 )
+
+/* The way the SysTick is clocked is not modified in case it is not the same
+ * as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 0 )
 #endif
 
 /* Constants required to manipulate the core.  Registers first... */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_CTRL_REG             ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG             ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG    ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SHPR3_REG                    ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
 /* ...then bits in the registers. */
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portNVIC_PENDSVCLEAR_BIT 			( 1UL << 27UL )
-#define portNVIC_PEND_SYSTICK_CLEAR_BIT		( 1UL << 25UL )
+#define portNVIC_SYSTICK_INT_BIT              ( 1UL << 1UL )
+#define portNVIC_SYSTICK_ENABLE_BIT           ( 1UL << 0UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT       ( 1UL << 16UL )
+#define portNVIC_PENDSVCLEAR_BIT              ( 1UL << 27UL )
+#define portNVIC_PEND_SYSTICK_CLEAR_BIT       ( 1UL << 25UL )
 
-#define portNVIC_PENDSV_PRI					( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
-#define portNVIC_SYSTICK_PRI				( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
+#define portNVIC_PENDSV_PRI                   ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
+#define portNVIC_SYSTICK_PRI                  ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
 
 /* Constants required to check the validity of an interrupt priority. */
-#define portFIRST_USER_INTERRUPT_NUMBER		( 16 )
-#define portNVIC_IP_REGISTERS_OFFSET_16 	( 0xE000E3F0 )
-#define portAIRCR_REG						( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
-#define portMAX_8_BIT_VALUE					( ( uint8_t ) 0xff )
-#define portTOP_BIT_OF_BYTE					( ( uint8_t ) 0x80 )
-#define portMAX_PRIGROUP_BITS				( ( uint8_t ) 7 )
-#define portPRIORITY_GROUP_MASK				( 0x07UL << 8UL )
-#define portPRIGROUP_SHIFT					( 8UL )
+#define portFIRST_USER_INTERRUPT_NUMBER       ( 16 )
+#define portNVIC_IP_REGISTERS_OFFSET_16       ( 0xE000E3F0 )
+#define portAIRCR_REG                         ( *( ( volatile uint32_t * ) 0xE000ED0C ) )
+#define portMAX_8_BIT_VALUE                   ( ( uint8_t ) 0xff )
+#define portTOP_BIT_OF_BYTE                   ( ( uint8_t ) 0x80 )
+#define portMAX_PRIGROUP_BITS                 ( ( uint8_t ) 7 )
+#define portPRIORITY_GROUP_MASK               ( 0x07UL << 8UL )
+#define portPRIGROUP_SHIFT                    ( 8UL )
 
 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
-#define portVECTACTIVE_MASK					( 0xFFUL )
+#define portVECTACTIVE_MASK                   ( 0xFFUL )
 
 /* Constants required to set up the initial stack. */
-#define portINITIAL_XPSR					( 0x01000000UL )
+#define portINITIAL_XPSR                      ( 0x01000000UL )
 
 /* The systick is a 24-bit counter. */
-#define portMAX_24_BIT_NUMBER				( 0xffffffUL )
+#define portMAX_24_BIT_NUMBER                 ( 0xffffffUL )
 
 /* A fiddle factor to estimate the number of SysTick counts that would have
-occurred while the SysTick counter is stopped during tickless idle
-calculations. */
-#define portMISSED_COUNTS_FACTOR			( 45UL )
+ * occurred while the SysTick counter is stopped during tickless idle
+ * calculations. */
+#define portMISSED_COUNTS_FACTOR              ( 45UL )
 
 /* For strict compliance with the Cortex-M spec the task start address should
-have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
-#define portSTART_ADDRESS_MASK				( ( StackType_t ) 0xfffffffeUL )
+ * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
+#define portSTART_ADDRESS_MASK                ( ( StackType_t ) 0xfffffffeUL )
 
 /* Let the user override the pre-loading of the initial LR with the address of
-prvTaskExitError() in case it messes up unwinding of the stack in the
-debugger. */
+ * prvTaskExitError() in case it messes up unwinding of the stack in the
+ * debugger. */
 #ifdef configTASK_RETURN_ADDRESS
-	#define portTASK_RETURN_ADDRESS	configTASK_RETURN_ADDRESS
+    #define portTASK_RETURN_ADDRESS    configTASK_RETURN_ADDRESS
 #else
-	#define portTASK_RETURN_ADDRESS	prvTaskExitError
+    #define portTASK_RETURN_ADDRESS    prvTaskExitError
 #endif
 
 /*
@@ -112,14 +112,14 @@ void vPortSetupTimerInterrupt( void );
 /*
  * Exception handlers.
  */
-void xPortPendSVHandler( void ) __attribute__ (( naked ));
+void xPortPendSVHandler( void ) __attribute__( ( naked ) );
 void xPortSysTickHandler( void );
-void vPortSVCHandler( void ) __attribute__ (( naked ));
+void vPortSVCHandler( void ) __attribute__( ( naked ) );
 
 /*
  * Start first task is a separate function so it can be tested in isolation.
  */
-static void prvPortStartFirstTask( void ) __attribute__ (( naked ));
+static void prvPortStartFirstTask( void ) __attribute__( ( naked ) );
 
 /*
  * Used to catch tasks that attempt to return from their implementing function.
@@ -129,30 +129,30 @@ static void prvTaskExitError( void );
 /*-----------------------------------------------------------*/
 
 /* Each task maintains its own interrupt status in the critical nesting
-variable. */
+ * variable. */
 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 
 /*
  * The number of SysTick increments that make up one tick period.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulTimerCountsForOneTick = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulTimerCountsForOneTick = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * The maximum number of tick periods that can be suppressed is limited by the
  * 24 bit resolution of the SysTick timer.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t xMaximumPossibleSuppressedTicks = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * Compensate for the CPU cycles that pass while the SysTick is stopped (low
  * power functionality only.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulStoppedTimerCompensation = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulStoppedTimerCompensation = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
@@ -160,10 +160,10 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
  * FreeRTOS API functions are not called from interrupts that have been assigned
  * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
  */
-#if( configASSERT_DEFINED == 1 )
-	 static uint8_t ucMaxSysCallPriority = 0;
-	 static uint32_t ulMaxPRIGROUPValue = 0;
-	 static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
+#if ( configASSERT_DEFINED == 1 )
+    static uint8_t ucMaxSysCallPriority = 0;
+    static uint32_t ulMaxPRIGROUPValue = 0;
+    static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
 #endif /* configASSERT_DEFINED */
 
 /*-----------------------------------------------------------*/
@@ -171,83 +171,87 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 /*
  * See header file for description.
  */
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	interrupt. */
-	pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
-	pxTopOfStack--;
-	*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;	/* PC */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
-	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
-	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
-	pxTopOfStack -= 8;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
+    pxTopOfStack--;                                                      /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+    *pxTopOfStack = portINITIAL_XPSR;                                    /* xPSR */
+    pxTopOfStack--;
+    *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;             /* LR */
+    pxTopOfStack -= 5;                                                   /* R12, R3, R2 and R1. */
+    *pxTopOfStack = ( StackType_t ) pvParameters;                        /* R0 */
+    pxTopOfStack -= 8;                                                   /* R11, R10, R9, R8, R7, R6, R5 and R4. */
 
-	return pxTopOfStack;
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 static void prvTaskExitError( void )
 {
-volatile uint32_t ulDummy = 0UL;
+    volatile uint32_t ulDummy = 0UL;
 
-	/* A function that implements a task must not exit or attempt to return to
-	its caller as there is nothing to return to.  If a task wants to exit it
-	should instead call vTaskDelete( NULL ).
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to.  If a task wants to exit it
+     * should instead call vTaskDelete( NULL ).
+     *
+     * Artificially force an assert() to be triggered if configASSERT() is
+     * defined, then stop here so application writers can catch the error. */
+    configASSERT( uxCriticalNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
 
-	Artificially force an assert() to be triggered if configASSERT() is
-	defined, then stop here so application writers can catch the error. */
-	configASSERT( uxCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
-	while( ulDummy == 0 )
-	{
-		/* This file calls prvTaskExitError() after the scheduler has been
-		started to remove a compiler warning about the function being defined
-		but never called.  ulDummy is used purely to quieten other warnings
-		about code appearing after this function is called - making ulDummy
-		volatile makes the compiler think the function could return and
-		therefore not output an 'unreachable code' warning for code that appears
-		after it. */
-	}
+    while( ulDummy == 0 )
+    {
+        /* This file calls prvTaskExitError() after the scheduler has been
+         * started to remove a compiler warning about the function being defined
+         * but never called.  ulDummy is used purely to quieten other warnings
+         * about code appearing after this function is called - making ulDummy
+         * volatile makes the compiler think the function could return and
+         * therefore not output an 'unreachable code' warning for code that appears
+         * after it. */
+    }
 }
 /*-----------------------------------------------------------*/
 
 void vPortSVCHandler( void )
 {
-	__asm volatile (
-					"	ldr	r3, pxCurrentTCBConst2		\n" /* Restore the context. */
-					"	ldr r1, [r3]					\n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
-					"	ldr r0, [r1]					\n" /* The first item in pxCurrentTCB is the task top of stack. */
-					"	ldmia r0!, {r4-r11}				\n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
-					"	msr psp, r0						\n" /* Restore the task stack pointer. */
-					"	isb								\n"
-					"	mov r0, #0 						\n"
-					"	msr	basepri, r0					\n"
-					"	orr r14, #0xd					\n"
-					"	bx r14							\n"
-					"									\n"
-					"	.align 4						\n"
-					"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
-				);
+    __asm volatile (
+        "	ldr	r3, pxCurrentTCBConst2		\n"/* Restore the context. */
+        "	ldr r1, [r3]					\n"/* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
+        "	ldr r0, [r1]					\n"/* The first item in pxCurrentTCB is the task top of stack. */
+        "	ldmia r0!, {r4-r11}				\n"/* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
+        "	msr psp, r0						\n"/* Restore the task stack pointer. */
+        "	isb								\n"
+        "	mov r0, #0 						\n"
+        "	msr	basepri, r0					\n"
+        "	orr r14, #0xd					\n"
+        "	bx r14							\n"
+        "									\n"
+        "	.align 4						\n"
+        "pxCurrentTCBConst2: .word pxCurrentTCB				\n"
+        );
 }
 /*-----------------------------------------------------------*/
 
 static void prvPortStartFirstTask( void )
 {
-	__asm volatile(
-					" ldr r0, =0xE000ED08 	\n" /* Use the NVIC offset register to locate the stack. */
-					" ldr r0, [r0] 			\n"
-					" ldr r0, [r0] 			\n"
-					" msr msp, r0			\n" /* Set the msp back to the start of the stack. */
-					" cpsie i				\n" /* Globally enable interrupts. */
-					" cpsie f				\n"
-					" dsb					\n"
-					" isb					\n"
-					" svc 0					\n" /* System call to start first task. */
-					" nop					\n"
-				);
+    __asm volatile (
+        " ldr r0, =0xE000ED08 	\n"/* Use the NVIC offset register to locate the stack. */
+        " ldr r0, [r0] 			\n"
+        " ldr r0, [r0] 			\n"
+        " msr msp, r0			\n"/* Set the msp back to the start of the stack. */
+        " cpsie i				\n"/* Globally enable interrupts. */
+        " cpsie f				\n"
+        " dsb					\n"
+        " isb					\n"
+        " svc 0					\n"/* System call to start first task. */
+        " nop					\n"
+        " .ltorg				\n"
+        );
 }
 /*-----------------------------------------------------------*/
 
@@ -256,356 +260,361 @@ static void prvPortStartFirstTask( void )
  */
 BaseType_t xPortStartScheduler( void )
 {
-	/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
-	See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
-	configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
+    /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
+     * See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
+    configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
 
-	#if( configASSERT_DEFINED == 1 )
-	{
-		volatile uint32_t ulOriginalPriority;
-		volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
-		volatile uint8_t ucMaxPriorityValue;
+    #if ( configASSERT_DEFINED == 1 )
+        {
+            volatile uint32_t ulOriginalPriority;
+            volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
+            volatile uint8_t ucMaxPriorityValue;
 
-		/* Determine the maximum priority from which ISR safe FreeRTOS API
-		functions can be called.  ISR safe functions are those that end in
-		"FromISR".  FreeRTOS maintains separate thread and ISR API functions to
-		ensure interrupt entry is as fast and simple as possible.
+            /* Determine the maximum priority from which ISR safe FreeRTOS API
+             * functions can be called.  ISR safe functions are those that end in
+             * "FromISR".  FreeRTOS maintains separate thread and ISR API functions to
+             * ensure interrupt entry is as fast and simple as possible.
+             *
+             * Save the interrupt priority value that is about to be clobbered. */
+            ulOriginalPriority = *pucFirstUserPriorityRegister;
 
-		Save the interrupt priority value that is about to be clobbered. */
-		ulOriginalPriority = *pucFirstUserPriorityRegister;
+            /* Determine the number of priority bits available.  First write to all
+             * possible bits. */
+            *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
 
-		/* Determine the number of priority bits available.  First write to all
-		possible bits. */
-		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
+            /* Read the value back to see how many bits stuck. */
+            ucMaxPriorityValue = *pucFirstUserPriorityRegister;
 
-		/* Read the value back to see how many bits stuck. */
-		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
+            /* Use the same mask on the maximum system call priority. */
+            ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
 
-		/* Use the same mask on the maximum system call priority. */
-		ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
+            /* Calculate the maximum acceptable priority group value for the number
+             * of bits read back. */
+            ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
 
-		/* Calculate the maximum acceptable priority group value for the number
-		of bits read back. */
-		ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
-		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
-		{
-			ulMaxPRIGROUPValue--;
-			ucMaxPriorityValue <<= ( uint8_t ) 0x01;
-		}
+            while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
+            {
+                ulMaxPRIGROUPValue--;
+                ucMaxPriorityValue <<= ( uint8_t ) 0x01;
+            }
 
-		#ifdef __NVIC_PRIO_BITS
-		{
-			/* Check the CMSIS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
-		}
-		#endif
+            #ifdef __NVIC_PRIO_BITS
+                {
+                    /* Check the CMSIS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
+                }
+            #endif
 
-		#ifdef configPRIO_BITS
-		{
-			/* Check the FreeRTOS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
-		}
-		#endif
+            #ifdef configPRIO_BITS
+                {
+                    /* Check the FreeRTOS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
+                }
+            #endif
 
-		/* Shift the priority group value back to its position within the AIRCR
-		register. */
-		ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
-		ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
+            /* Shift the priority group value back to its position within the AIRCR
+             * register. */
+            ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
+            ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
 
-		/* Restore the clobbered interrupt priority register to its original
-		value. */
-		*pucFirstUserPriorityRegister = ulOriginalPriority;
-	}
-	#endif /* conifgASSERT_DEFINED */
+            /* Restore the clobbered interrupt priority register to its original
+             * value. */
+            *pucFirstUserPriorityRegister = ulOriginalPriority;
+        }
+    #endif /* conifgASSERT_DEFINED */
 
-	/* Make PendSV and SysTick the lowest priority interrupts. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+    /* Make PendSV and SysTick the lowest priority interrupts. */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
-	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-	here already. */
-	vPortSetupTimerInterrupt();
+    /* Start the timer that generates the tick ISR.  Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
 
-	/* Initialise the critical nesting count ready for the first task. */
-	uxCriticalNesting = 0;
+    /* Initialise the critical nesting count ready for the first task. */
+    uxCriticalNesting = 0;
 
-	/* Start the first task. */
-	prvPortStartFirstTask();
+    /* Start the first task. */
+    prvPortStartFirstTask();
 
-	/* Should never get here as the tasks will now be executing!  Call the task
-	exit error function to prevent compiler warnings about a static function
-	not being called in the case that the application writer overrides this
-	functionality by defining configTASK_RETURN_ADDRESS.  Call
-	vTaskSwitchContext() so link time optimisation does not remove the
-	symbol. */
-	vTaskSwitchContext();
-	prvTaskExitError();
+    /* Should never get here as the tasks will now be executing!  Call the task
+     * exit error function to prevent compiler warnings about a static function
+     * not being called in the case that the application writer overrides this
+     * functionality by defining configTASK_RETURN_ADDRESS.  Call
+     * vTaskSwitchContext() so link time optimisation does not remove the
+     * symbol. */
+    vTaskSwitchContext();
+    prvTaskExitError();
 
-	/* Should not get here! */
-	return 0;
+    /* Should not get here! */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void )
 {
-	/* Not implemented in ports where there is nothing to return to.
-	Artificially force an assert. */
-	configASSERT( uxCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( uxCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void )
 {
-	portDISABLE_INTERRUPTS();
-	uxCriticalNesting++;
+    portDISABLE_INTERRUPTS();
+    uxCriticalNesting++;
 
-	/* This is not the interrupt safe version of the enter critical function so
-	assert() if it is being called from an interrupt context.  Only API
-	functions that end in "FromISR" can be used in an interrupt.  Only assert if
-	the critical nesting count is 1 to protect against recursive calls if the
-	assert function also uses a critical section. */
-	if( uxCriticalNesting == 1 )
-	{
-		configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
-	}
+    /* This is not the interrupt safe version of the enter critical function so
+     * assert() if it is being called from an interrupt context.  Only API
+     * functions that end in "FromISR" can be used in an interrupt.  Only assert if
+     * the critical nesting count is 1 to protect against recursive calls if the
+     * assert function also uses a critical section. */
+    if( uxCriticalNesting == 1 )
+    {
+        configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
+    }
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void )
 {
-	configASSERT( uxCriticalNesting );
-	uxCriticalNesting--;
-	if( uxCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
+    configASSERT( uxCriticalNesting );
+    uxCriticalNesting--;
+
+    if( uxCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
 }
 /*-----------------------------------------------------------*/
 
 void xPortPendSVHandler( void )
 {
-	/* This is a naked function. */
+    /* This is a naked function. */
 
-	__asm volatile
-	(
-	"	mrs r0, psp							\n"
-	"	isb									\n"
-	"										\n"
-	"	ldr	r3, pxCurrentTCBConst			\n" /* Get the location of the current TCB. */
-	"	ldr	r2, [r3]						\n"
-	"										\n"
-	"	stmdb r0!, {r4-r11}					\n" /* Save the remaining registers. */
-	"	str r0, [r2]						\n" /* Save the new top of stack into the first member of the TCB. */
-	"										\n"
-	"	stmdb sp!, {r3, r14}				\n"
-	"	mov r0, %0							\n"
-	"	msr basepri, r0						\n"
-	"	bl vTaskSwitchContext				\n"
-	"	mov r0, #0							\n"
-	"	msr basepri, r0						\n"
-	"	ldmia sp!, {r3, r14}				\n"
-	"										\n" /* Restore the context, including the critical nesting count. */
-	"	ldr r1, [r3]						\n"
-	"	ldr r0, [r1]						\n" /* The first item in pxCurrentTCB is the task top of stack. */
-	"	ldmia r0!, {r4-r11}					\n" /* Pop the registers. */
-	"	msr psp, r0							\n"
-	"	isb									\n"
-	"	bx r14								\n"
-	"										\n"
-	"	.align 4							\n"
-	"pxCurrentTCBConst: .word pxCurrentTCB	\n"
-	::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
-	);
+    __asm volatile
+    (
+        "	mrs r0, psp							\n"
+        "	isb									\n"
+        "										\n"
+        "	ldr	r3, pxCurrentTCBConst			\n"/* Get the location of the current TCB. */
+        "	ldr	r2, [r3]						\n"
+        "										\n"
+        "	stmdb r0!, {r4-r11}					\n"/* Save the remaining registers. */
+        "	str r0, [r2]						\n"/* Save the new top of stack into the first member of the TCB. */
+        "										\n"
+        "	stmdb sp!, {r3, r14}				\n"
+        "	mov r0, %0							\n"
+        "	msr basepri, r0						\n"
+        "	bl vTaskSwitchContext				\n"
+        "	mov r0, #0							\n"
+        "	msr basepri, r0						\n"
+        "	ldmia sp!, {r3, r14}				\n"
+        "										\n"/* Restore the context, including the critical nesting count. */
+        "	ldr r1, [r3]						\n"
+        "	ldr r0, [r1]						\n"/* The first item in pxCurrentTCB is the task top of stack. */
+        "	ldmia r0!, {r4-r11}					\n"/* Pop the registers. */
+        "	msr psp, r0							\n"
+        "	isb									\n"
+        "	bx r14								\n"
+        "										\n"
+        "	.align 4							\n"
+        "pxCurrentTCBConst: .word pxCurrentTCB	\n"
+        ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
+    );
 }
 /*-----------------------------------------------------------*/
 
 void xPortSysTickHandler( void )
 {
-	/* The SysTick runs at the lowest interrupt priority, so when this interrupt
-	executes all interrupts must be unmasked.  There is therefore no need to
-	save and then restore the interrupt mask value as its value is already
-	known. */
-	portDISABLE_INTERRUPTS();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* A context switch is required.  Context switching is performed in
-			the PendSV interrupt.  Pend the PendSV interrupt. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portENABLE_INTERRUPTS();
+    /* The SysTick runs at the lowest interrupt priority, so when this interrupt
+     * executes all interrupts must be unmasked.  There is therefore no need to
+     * save and then restore the interrupt mask value as its value is already
+     * known. */
+    portDISABLE_INTERRUPTS();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* A context switch is required.  Context switching is performed in
+             * the PendSV interrupt.  Pend the PendSV interrupt. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+    portENABLE_INTERRUPTS();
 }
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TICKLESS_IDLE == 1 )
+#if ( configUSE_TICKLESS_IDLE == 1 )
 
-	__attribute__((weak)) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-	{
-	uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
-	TickType_t xModifiableIdleTime;
+    __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+    {
+        uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+        TickType_t xModifiableIdleTime;
 
-		/* Make sure the SysTick reload value does not overflow the counter. */
-		if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-		{
-			xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-		}
+        /* Make sure the SysTick reload value does not overflow the counter. */
+        if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+        {
+            xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+        }
 
-		/* Stop the SysTick momentarily.  The time the SysTick is stopped for
-		is accounted for as best it can be, but using the tickless mode will
-		inevitably result in some tiny drift of the time maintained by the
-		kernel with respect to calendar time. */
-		portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+        /* Stop the SysTick momentarily.  The time the SysTick is stopped for
+         * is accounted for as best it can be, but using the tickless mode will
+         * inevitably result in some tiny drift of the time maintained by the
+         * kernel with respect to calendar time. */
+        portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
 
-		/* Calculate the reload value required to wait xExpectedIdleTime
-		tick periods.  -1 is used because this code will execute part way
-		through one of the tick periods. */
-		ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-		if( ulReloadValue > ulStoppedTimerCompensation )
-		{
-			ulReloadValue -= ulStoppedTimerCompensation;
-		}
+        /* Calculate the reload value required to wait xExpectedIdleTime
+         * tick periods.  -1 is used because this code will execute part way
+         * through one of the tick periods. */
+        ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
 
-		/* Enter a critical section but don't use the taskENTER_CRITICAL()
-		method as that will mask interrupts that should exit sleep mode. */
-		__asm volatile( "cpsid i" ::: "memory" );
-		__asm volatile( "dsb" );
-		__asm volatile( "isb" );
+        if( ulReloadValue > ulStoppedTimerCompensation )
+        {
+            ulReloadValue -= ulStoppedTimerCompensation;
+        }
 
-		/* If a context switch is pending or a task is waiting for the scheduler
-		to be unsuspended then abandon the low power entry. */
-		if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-		{
-			/* Restart from whatever is left in the count register to complete
-			this tick period. */
-			portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+        /* Enter a critical section but don't use the taskENTER_CRITICAL()
+         * method as that will mask interrupts that should exit sleep mode. */
+        __asm volatile ( "cpsid i" ::: "memory" );
+        __asm volatile ( "dsb" );
+        __asm volatile ( "isb" );
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+        /* If a context switch is pending or a task is waiting for the scheduler
+         * to be unsuspended then abandon the low power entry. */
+        if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+        {
+            /* Restart from whatever is left in the count register to complete
+             * this tick period. */
+            portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Reset the reload register to the value required for normal tick
-			periods. */
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts - see comments above the cpsid instruction()
-			above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-		else
-		{
-			/* Set the new reload value. */
-			portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+            /* Reset the reload register to the value required for normal tick
+             * periods. */
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
 
-			/* Clear the SysTick count flag and set the count value back to
-			zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            /* Re-enable interrupts - see comments above the cpsid instruction()
+             * above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+        else
+        {
+            /* Set the new reload value. */
+            portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            /* Clear the SysTick count flag and set the count value back to
+             * zero. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-			/* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
-			set its parameter to 0 to indicate that its implementation contains
-			its own wait for interrupt or wait for event instruction, and so wfi
-			should not be executed again.  However, the original expected idle
-			time variable must remain unmodified, so a copy is taken. */
-			xModifiableIdleTime = xExpectedIdleTime;
-			configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-			if( xModifiableIdleTime > 0 )
-			{
-				__asm volatile( "dsb" ::: "memory" );
-				__asm volatile( "wfi" );
-				__asm volatile( "isb" );
-			}
-			configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts to allow the interrupt that brought the MCU
-			out of sleep mode to execute immediately.  see comments above
-			__disable_interrupt() call above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
+            /* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
+             * set its parameter to 0 to indicate that its implementation contains
+             * its own wait for interrupt or wait for event instruction, and so wfi
+             * should not be executed again.  However, the original expected idle
+             * time variable must remain unmodified, so a copy is taken. */
+            xModifiableIdleTime = xExpectedIdleTime;
+            configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
 
-			/* Disable interrupts again because the clock is about to be stopped
-			and interrupts that execute while the clock is stopped will increase
-			any slippage between the time maintained by the RTOS and calendar
-			time. */
-			__asm volatile( "cpsid i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
+            if( xModifiableIdleTime > 0 )
+            {
+                __asm volatile ( "dsb" ::: "memory" );
+                __asm volatile ( "wfi" );
+                __asm volatile ( "isb" );
+            }
 
-			/* Disable the SysTick clock without reading the
-			portNVIC_SYSTICK_CTRL_REG register to ensure the
-			portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
-			the time the SysTick is stopped for is accounted for as best it can
-			be, but using the tickless mode will inevitably result in some tiny
-			drift of the time maintained by the kernel with respect to calendar
-			time*/
-			portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+            configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
 
-			/* Determine if the SysTick clock has already counted to zero and
-			been set back to the current reload value (the reload back being
-			correct for the entire expected idle time) or if the SysTick is yet
-			to count to zero (in which case an interrupt other than the SysTick
-			must have brought the system out of sleep mode). */
-			if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-			{
-				uint32_t ulCalculatedLoadValue;
+            /* Re-enable interrupts to allow the interrupt that brought the MCU
+             * out of sleep mode to execute immediately.  see comments above
+             * __disable_interrupt() call above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
 
-				/* The tick interrupt is already pending, and the SysTick count
-				reloaded with ulReloadValue.  Reset the
-				portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
-				period. */
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+            /* Disable interrupts again because the clock is about to be stopped
+             * and interrupts that execute while the clock is stopped will increase
+             * any slippage between the time maintained by the RTOS and calendar
+             * time. */
+            __asm volatile ( "cpsid i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
 
-				/* Don't allow a tiny value, or values that have somehow
-				underflowed because the post sleep hook did something
-				that took too long. */
-				if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-				{
-					ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-				}
+            /* Disable the SysTick clock without reading the
+             * portNVIC_SYSTICK_CTRL_REG register to ensure the
+             * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
+             * the time the SysTick is stopped for is accounted for as best it can
+             * be, but using the tickless mode will inevitably result in some tiny
+             * drift of the time maintained by the kernel with respect to calendar
+             * time*/
+            portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
 
-				portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+            /* Determine if the SysTick clock has already counted to zero and
+             * been set back to the current reload value (the reload back being
+             * correct for the entire expected idle time) or if the SysTick is yet
+             * to count to zero (in which case an interrupt other than the SysTick
+             * must have brought the system out of sleep mode). */
+            if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+            {
+                uint32_t ulCalculatedLoadValue;
 
-				/* As the pending tick will be processed as soon as this
-				function exits, the tick value maintained by the tick is stepped
-				forward by one less than the time spent waiting. */
-				ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-			}
-			else
-			{
-				/* Something other than the tick interrupt ended the sleep.
-				Work out how long the sleep lasted rounded to complete tick
-				periods (not the ulReload value which accounted for part
-				ticks). */
-				ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+                /* The tick interrupt is already pending, and the SysTick count
+                 * reloaded with ulReloadValue.  Reset the
+                 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+                 * period. */
+                ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
 
-				/* How many complete tick periods passed while the processor
-				was waiting? */
-				ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+                /* Don't allow a tiny value, or values that have somehow
+                 * underflowed because the post sleep hook did something
+                 * that took too long. */
+                if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+                {
+                    ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+                }
 
-				/* The reload value is set to whatever fraction of a single tick
-				period remains. */
-				portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-			}
+                portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
 
-			/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
-			again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
-			value. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-			vTaskStepTick( ulCompleteTickPeriods );
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+                /* As the pending tick will be processed as soon as this
+                 * function exits, the tick value maintained by the tick is stepped
+                 * forward by one less than the time spent waiting. */
+                ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+            }
+            else
+            {
+                /* Something other than the tick interrupt ended the sleep.
+                 * Work out how long the sleep lasted rounded to complete tick
+                 * periods (not the ulReload value which accounted for part
+                 * ticks). */
+                ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Exit with interrupts enabled. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-	}
+                /* How many complete tick periods passed while the processor
+                 * was waiting? */
+                ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+                /* The reload value is set to whatever fraction of a single tick
+                 * period remains. */
+                portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+            }
+
+            /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+             * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+             * value. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            vTaskStepTick( ulCompleteTickPeriods );
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Exit with interrupts enabled. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+    }
 
 #endif /* configUSE_TICKLESS_IDLE */
 /*-----------------------------------------------------------*/
@@ -614,104 +623,83 @@ void xPortSysTickHandler( void )
  * Setup the systick timer to generate the tick interrupts at the required
  * frequency.
  */
-__attribute__(( weak )) void vPortSetupTimerInterrupt( void )
+__attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void )
 {
-	/* Calculate the constants required to configure the tick interrupt. */
-	#if( configUSE_TICKLESS_IDLE == 1 )
-	{
-		ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
-		xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
-	}
-	#endif /* configUSE_TICKLESS_IDLE */
+    /* Calculate the constants required to configure the tick interrupt. */
+    #if ( configUSE_TICKLESS_IDLE == 1 )
+        {
+            ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+            xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+            ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+        }
+    #endif /* configUSE_TICKLESS_IDLE */
 
-	/* Stop and clear the SysTick. */
-	portNVIC_SYSTICK_CTRL_REG = 0UL;
-	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+    /* Stop and clear the SysTick. */
+    portNVIC_SYSTICK_CTRL_REG = 0UL;
+    portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-	/* Configure SysTick to interrupt at the requested rate. */
-	portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
+    /* Configure SysTick to interrupt at the requested rate. */
+    portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+    portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
 }
 /*-----------------------------------------------------------*/
 
-#if( configASSERT_DEFINED == 1 )
+#if ( configASSERT_DEFINED == 1 )
 
-	void vPortValidateInterruptPriority( void )
-	{
-	uint32_t ulCurrentInterrupt;
-	uint8_t ucCurrentPriority;
+    void vPortValidateInterruptPriority( void )
+    {
+        uint32_t ulCurrentInterrupt;
+        uint8_t ucCurrentPriority;
 
-		/* Obtain the number of the currently executing interrupt. */
-		__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+        /* Obtain the number of the currently executing interrupt. */
+        __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
-		/* Is the interrupt number a user defined interrupt? */
-		if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
-		{
-			/* Look up the interrupt's priority. */
-			ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
+        /* Is the interrupt number a user defined interrupt? */
+        if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
+        {
+            /* Look up the interrupt's priority. */
+            ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
 
-			/* The following assertion will fail if a service routine (ISR) for
-			an interrupt that has been assigned a priority above
-			configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
-			function.  ISR safe FreeRTOS API functions must *only* be called
-			from interrupts that have been assigned a priority at or below
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
+            /* The following assertion will fail if a service routine (ISR) for
+             * an interrupt that has been assigned a priority above
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
+             * function.  ISR safe FreeRTOS API functions must *only* be called
+             * from interrupts that have been assigned a priority at or below
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Numerically low interrupt priority numbers represent logically high
+             * interrupt priorities, therefore the priority of the interrupt must
+             * be set to a value equal to or numerically *higher* than
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Interrupts that	use the FreeRTOS API must not be left at their
+             * default priority of	zero as that is the highest possible priority,
+             * which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
+             * and	therefore also guaranteed to be invalid.
+             *
+             * FreeRTOS maintains separate thread and ISR API functions to ensure
+             * interrupt entry is as fast and simple as possible.
+             *
+             * The following links provide detailed information:
+             * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+             * https://www.FreeRTOS.org/FAQHelp.html */
+            configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
+        }
 
-			Numerically low interrupt priority numbers represent logically high
-			interrupt priorities, therefore the priority of the interrupt must
-			be set to a value equal to or numerically *higher* than
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
-
-			Interrupts that	use the FreeRTOS API must not be left at their
-			default priority of	zero as that is the highest possible priority,
-			which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
-			and	therefore also guaranteed to be invalid.
-
-			FreeRTOS maintains separate thread and ISR API functions to ensure
-			interrupt entry is as fast and simple as possible.
-
-			The following links provide detailed information:
-			http://www.freertos.org/RTOS-Cortex-M3-M4.html
-			http://www.freertos.org/FAQHelp.html */
-			configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
-		}
-
-		/* Priority grouping:  The interrupt controller (NVIC) allows the bits
-		that define each interrupt's priority to be split between bits that
-		define the interrupt's pre-emption priority bits and bits that define
-		the interrupt's sub-priority.  For simplicity all bits must be defined
-		to be pre-emption priority bits.  The following assertion will fail if
-		this is not the case (if some bits represent a sub-priority).
-
-		If the application only uses CMSIS libraries for interrupt
-		configuration then the correct setting can be achieved on all Cortex-M
-		devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
-		scheduler.  Note however that some vendor specific peripheral libraries
-		assume a non-zero priority group setting, in which cases using a value
-		of zero will result in unpredictable behaviour. */
-		configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
-	}
+        /* Priority grouping:  The interrupt controller (NVIC) allows the bits
+         * that define each interrupt's priority to be split between bits that
+         * define the interrupt's pre-emption priority bits and bits that define
+         * the interrupt's sub-priority.  For simplicity all bits must be defined
+         * to be pre-emption priority bits.  The following assertion will fail if
+         * this is not the case (if some bits represent a sub-priority).
+         *
+         * If the application only uses CMSIS libraries for interrupt
+         * configuration then the correct setting can be achieved on all Cortex-M
+         * devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
+         * scheduler.  Note however that some vendor specific peripheral libraries
+         * assume a non-zero priority group setting, in which cases using a value
+         * of zero will result in unpredictable behaviour. */
+        configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
+    }
 
 #endif /* configASSERT_DEFINED */
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
diff --git a/portable/GCC/ARM_CM3/portmacro.h b/portable/GCC/ARM_CM3/portmacro.h
index 673d93757..157e9a470 100644
--- a/portable/GCC/ARM_CM3/portmacro.h
+++ b/portable/GCC/ARM_CM3/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,19 +19,19 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -44,203 +44,203 @@ extern "C" {
  */
 
 /* Type definitions. */
-#define portCHAR		char
-#define portFLOAT		float
-#define portDOUBLE		double
-#define portLONG		long
-#define portSHORT		short
-#define portSTACK_TYPE	uint32_t
-#define portBASE_TYPE	long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE StackType_t;
-typedef long BaseType_t;
-typedef unsigned long UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC 1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Architecture specifics. */
-#define portSTACK_GROWTH			( -1 )
-#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT			8
-#define portDONT_DISCARD			__attribute__(( used ))
+    #define portSTACK_GROWTH      ( -1 )
+    #define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT    8
+    #define portDONT_DISCARD      __attribute__( ( used ) )
 /*-----------------------------------------------------------*/
 
 /* Scheduler utilities. */
-#define portYIELD() 															\
-{																				\
-	/* Set a PendSV to request a context switch. */								\
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;								\
-																				\
-	/* Barriers are normally not required but do ensure the code is completely	\
-	within the specified behaviour for the architecture. */						\
-	__asm volatile( "dsb" ::: "memory" );										\
-	__asm volatile( "isb" );													\
-}
+    #define portYIELD()                                 \
+    {                                                   \
+        /* Set a PendSV to request a context switch. */ \
+        portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
+                                                        \
+        /* Barriers are normally not required but do ensure the code is completely \
+         * within the specified behaviour for the architecture. */ \
+        __asm volatile ( "dsb" ::: "memory" );                     \
+        __asm volatile ( "isb" );                                  \
+    }
 
-#define portNVIC_INT_CTRL_REG		( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT		( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()
-#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired != pdFALSE ) portYIELD()
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /* Critical section management. */
-extern void vPortEnterCritical( void );
-extern void vPortExitCritical( void );
-#define portSET_INTERRUPT_MASK_FROM_ISR()		ulPortRaiseBASEPRI()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)	vPortSetBASEPRI(x)
-#define portDISABLE_INTERRUPTS()				vPortRaiseBASEPRI()
-#define portENABLE_INTERRUPTS()					vPortSetBASEPRI(0)
-#define portENTER_CRITICAL()					vPortEnterCritical()
-#define portEXIT_CRITICAL()						vPortExitCritical()
+    extern void vPortEnterCritical( void );
+    extern void vPortExitCritical( void );
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulPortRaiseBASEPRI()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vPortSetBASEPRI( x )
+    #define portDISABLE_INTERRUPTS()                  vPortRaiseBASEPRI()
+    #define portENABLE_INTERRUPTS()                   vPortSetBASEPRI( 0 )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
 
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site.  These are
-not necessary for to use this port.  They are defined so the common demo files
-(which build with all the ports) will build. */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+ * not necessary for to use this port.  They are defined so the common demo files
+ * (which build with all the ports) will build. */
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
 /* Tickless idle/low power functionality. */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Architecture specific optimisations. */
-#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
-	#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
-#endif
+    #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
+        #define configUSE_PORT_OPTIMISED_TASK_SELECTION    1
+    #endif
 
-#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
+    #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
 
-	/* Generic helper function. */
-	__attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
-	{
-	uint8_t ucReturn;
+/* Generic helper function. */
+        __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
+        {
+            uint8_t ucReturn;
 
-		__asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
-		return ucReturn;
-	}
+            __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
 
-	/* Check the configuration. */
-	#if( configMAX_PRIORITIES > 32 )
-		#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
-	#endif
+            return ucReturn;
+        }
 
-	/* Store/clear the ready priorities in a bit map. */
-	#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
-	#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
+/* Check the configuration. */
+        #if ( configMAX_PRIORITIES > 32 )
+            #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
+        #endif
 
-	/*-----------------------------------------------------------*/
-
-	#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
-
-#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
+/* Store/clear the ready priorities in a bit map. */
+        #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities )    ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
+        #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities )     ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
 
 /*-----------------------------------------------------------*/
 
-#ifdef configASSERT
-	void vPortValidateInterruptPriority( void );
-	#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() 	vPortValidateInterruptPriority()
-#endif
+        #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities )    uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
+
+    #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
+
+/*-----------------------------------------------------------*/
+
+    #ifdef configASSERT
+        void vPortValidateInterruptPriority( void );
+        #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()    vPortValidateInterruptPriority()
+    #endif
 
 /* portNOP() is not required by this port. */
-#define portNOP()
+    #define portNOP()
 
-#define portINLINE	__inline
+    #define portINLINE              __inline
 
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE inline __attribute__(( always_inline))
-#endif
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE    inline __attribute__( ( always_inline ) )
+    #endif
 
 /*-----------------------------------------------------------*/
 
-portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
-{
-uint32_t ulCurrentInterrupt;
-BaseType_t xReturn;
+    portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
+    {
+        uint32_t ulCurrentInterrupt;
+        BaseType_t xReturn;
 
-	/* Obtain the number of the currently executing interrupt. */
-	__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+        /* Obtain the number of the currently executing interrupt. */
+        __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
-	if( ulCurrentInterrupt == 0 )
-	{
-		xReturn = pdFALSE;
-	}
-	else
-	{
-		xReturn = pdTRUE;
-	}
+        if( ulCurrentInterrupt == 0 )
+        {
+            xReturn = pdFALSE;
+        }
+        else
+        {
+            xReturn = pdTRUE;
+        }
 
-	return xReturn;
-}
+        return xReturn;
+    }
 
 /*-----------------------------------------------------------*/
 
-portFORCE_INLINE static void vPortRaiseBASEPRI( void )
-{
-uint32_t ulNewBASEPRI;
+    portFORCE_INLINE static void vPortRaiseBASEPRI( void )
+    {
+        uint32_t ulNewBASEPRI;
 
-	__asm volatile
-	(
-		"	mov %0, %1												\n" \
-		"	msr basepri, %0											\n" \
-		"	isb														\n" \
-		"	dsb														\n" \
-		:"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
-	);
-}
+        __asm volatile
+        (
+            "	mov %0, %1												\n"\
+            "	msr basepri, %0											\n"\
+            "	isb														\n"\
+            "	dsb														\n"\
+            : "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
+        );
+    }
 
 /*-----------------------------------------------------------*/
 
-portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
-{
-uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
+    portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
+    {
+        uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
 
-	__asm volatile
-	(
-		"	mrs %0, basepri											\n" \
-		"	mov %1, %2												\n" \
-		"	msr basepri, %1											\n" \
-		"	isb														\n" \
-		"	dsb														\n" \
-		:"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
-	);
+        __asm volatile
+        (
+            "	mrs %0, basepri											\n"\
+            "	mov %1, %2												\n"\
+            "	msr basepri, %1											\n"\
+            "	isb														\n"\
+            "	dsb														\n"\
+            : "=r" ( ulOriginalBASEPRI ), "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
+        );
 
-	/* This return will not be reached but is necessary to prevent compiler
-	warnings. */
-	return ulOriginalBASEPRI;
-}
+        /* This return will not be reached but is necessary to prevent compiler
+         * warnings. */
+        return ulOriginalBASEPRI;
+    }
 /*-----------------------------------------------------------*/
 
-portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
-{
-	__asm volatile
-	(
-		"	msr basepri, %0	" :: "r" ( ulNewMaskValue ) : "memory"
-	);
-}
+    portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
+    {
+        __asm volatile
+        (
+            "	msr basepri, %0	"::"r" ( ulNewMaskValue ) : "memory"
+        );
+    }
 /*-----------------------------------------------------------*/
 
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
+    #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
-
diff --git a/portable/GCC/ARM_CM33/non_secure/port.c b/portable/GCC/ARM_CM33/non_secure/port.c
index ba6bd2602..caa9f7912 100644
--- a/portable/GCC/ARM_CM33/non_secure/port.c
+++ b/portable/GCC/ARM_CM33/non_secure/port.c
@@ -1,1149 +1,1193 @@
-/*
- * FreeRTOS Kernel V10.3.1
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
- * all the API functions to use the MPU wrappers. That should only be done when
- * task.h is included from an application file. */
-#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-/* Scheduler includes. */
-#include "FreeRTOS.h"
-#include "task.h"
-
-/* MPU wrappers includes. */
-#include "mpu_wrappers.h"
-
-/* Portasm includes. */
-#include "portasm.h"
-
-#if( configENABLE_TRUSTZONE == 1 )
-	/* Secure components includes. */
-	#include "secure_context.h"
-	#include "secure_init.h"
-#endif /* configENABLE_TRUSTZONE */
-
-#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-/**
- * The FreeRTOS Cortex M33 port can be configured to run on the Secure Side only
- * i.e. the processor boots as secure and never jumps to the non-secure side.
- * The Trust Zone support in the port must be disabled in order to run FreeRTOS
- * on the secure side. The following are the valid configuration seetings:
- *
- * 1. Run FreeRTOS on the Secure Side:
- *		configRUN_FREERTOS_SECURE_ONLY = 1 and configENABLE_TRUSTZONE = 0
- *
- * 2. Run FreeRTOS on the Non-Secure Side with Secure Side function call support:
- *		configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 1
- *
- * 3. Run FreeRTOS on the Non-Secure Side only i.e. no Secure Side function call support:
- *		configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 0
- */
-#if( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) )
-	#error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side.
-#endif
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Constants required to manipulate the NVIC.
- */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portMIN_INTERRUPT_PRIORITY			( 255UL )
-#define portNVIC_PENDSV_PRI					( portMIN_INTERRUPT_PRIORITY << 16UL )
-#define portNVIC_SYSTICK_PRI				( portMIN_INTERRUPT_PRIORITY << 24UL )
-#ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ			configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT		( 1UL << 2UL )
-#else
-	/* The way the SysTick is clocked is not modified in case it is not the
-	 * same a the core. */
-	#define portNVIC_SYSTICK_CLK_BIT		( 0 )
-#endif
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Constants required to manipulate the SCB.
- */
-#define portSCB_SYS_HANDLER_CTRL_STATE_REG	( * ( volatile uint32_t * ) 0xe000ed24 )
-#define portSCB_MEM_FAULT_ENABLE_BIT		( 1UL << 16UL )
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Constants required to manipulate the FPU.
- */
-#define portCPACR							( ( volatile uint32_t * ) 0xe000ed88 )	/* Coprocessor Access Control Register. */
-#define portCPACR_CP10_VALUE				( 3UL )
-#define portCPACR_CP11_VALUE				portCPACR_CP10_VALUE
-#define portCPACR_CP10_POS					( 20UL )
-#define portCPACR_CP11_POS					( 22UL )
-
-#define portFPCCR							( ( volatile uint32_t * ) 0xe000ef34 )	/* Floating Point Context Control Register. */
-#define portFPCCR_ASPEN_POS					( 31UL )
-#define portFPCCR_ASPEN_MASK				( 1UL << portFPCCR_ASPEN_POS )
-#define portFPCCR_LSPEN_POS					( 30UL )
-#define portFPCCR_LSPEN_MASK				( 1UL << portFPCCR_LSPEN_POS )
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Constants required to manipulate the MPU.
- */
-#define portMPU_TYPE_REG					( * ( ( volatile uint32_t * ) 0xe000ed90 ) )
-#define portMPU_CTRL_REG					( * ( ( volatile uint32_t * ) 0xe000ed94 ) )
-#define portMPU_RNR_REG						( * ( ( volatile uint32_t * ) 0xe000ed98 ) )
-
-#define portMPU_RBAR_REG					( * ( ( volatile uint32_t * ) 0xe000ed9c ) )
-#define portMPU_RLAR_REG					( * ( ( volatile uint32_t * ) 0xe000eda0 ) )
-
-#define portMPU_RBAR_A1_REG					( * ( ( volatile uint32_t * ) 0xe000eda4 ) )
-#define portMPU_RLAR_A1_REG					( * ( ( volatile uint32_t * ) 0xe000eda8 ) )
-
-#define portMPU_RBAR_A2_REG					( * ( ( volatile uint32_t * ) 0xe000edac ) )
-#define portMPU_RLAR_A2_REG					( * ( ( volatile uint32_t * ) 0xe000edb0 ) )
-
-#define portMPU_RBAR_A3_REG					( * ( ( volatile uint32_t * ) 0xe000edb4 ) )
-#define portMPU_RLAR_A3_REG					( * ( ( volatile uint32_t * ) 0xe000edb8 ) )
-
-#define portMPU_MAIR0_REG					( * ( ( volatile uint32_t * ) 0xe000edc0 ) )
-#define portMPU_MAIR1_REG					( * ( ( volatile uint32_t * ) 0xe000edc4 ) )
-
-#define portMPU_RBAR_ADDRESS_MASK			( 0xffffffe0 ) /* Must be 32-byte aligned. */
-#define portMPU_RLAR_ADDRESS_MASK			( 0xffffffe0 ) /* Must be 32-byte aligned. */
-
-#define portMPU_MAIR_ATTR0_POS				( 0UL )
-#define portMPU_MAIR_ATTR0_MASK				( 0x000000ff )
-
-#define portMPU_MAIR_ATTR1_POS				( 8UL )
-#define portMPU_MAIR_ATTR1_MASK				( 0x0000ff00 )
-
-#define portMPU_MAIR_ATTR2_POS				( 16UL )
-#define portMPU_MAIR_ATTR2_MASK				( 0x00ff0000 )
-
-#define portMPU_MAIR_ATTR3_POS				( 24UL )
-#define portMPU_MAIR_ATTR3_MASK				( 0xff000000 )
-
-#define portMPU_MAIR_ATTR4_POS				( 0UL )
-#define portMPU_MAIR_ATTR4_MASK				( 0x000000ff )
-
-#define portMPU_MAIR_ATTR5_POS				( 8UL )
-#define portMPU_MAIR_ATTR5_MASK				( 0x0000ff00 )
-
-#define portMPU_MAIR_ATTR6_POS				( 16UL )
-#define portMPU_MAIR_ATTR6_MASK				( 0x00ff0000 )
-
-#define portMPU_MAIR_ATTR7_POS				( 24UL )
-#define portMPU_MAIR_ATTR7_MASK				( 0xff000000 )
-
-#define portMPU_RLAR_ATTR_INDEX0			( 0UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX1			( 1UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX2			( 2UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX3			( 3UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX4			( 4UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX5			( 5UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX6			( 6UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX7			( 7UL << 1UL )
-
-#define portMPU_RLAR_REGION_ENABLE			( 1UL )
-
-/* Enable privileged access to unmapped region. */
-#define portMPU_PRIV_BACKGROUND_ENABLE_BIT	( 1UL << 2UL )
-
-/* Enable MPU. */
-#define portMPU_ENABLE_BIT					( 1UL << 0UL )
-
-/* Expected value of the portMPU_TYPE register. */
-#define portEXPECTED_MPU_TYPE_VALUE			( 8UL << 8UL ) /* 8 regions, unified. */
-/*-----------------------------------------------------------*/
-
-/**
- * @brief The maximum 24-bit number.
- *
- * It is needed because the systick is a 24-bit counter.
- */
-#define portMAX_24_BIT_NUMBER				( 0xffffffUL )
-
-/**
- * @brief A fiddle factor to estimate the number of SysTick counts that would
- * have occurred while the SysTick counter is stopped during tickless idle
- * calculations.
- */
-#define portMISSED_COUNTS_FACTOR			( 45UL )
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Constants required to set up the initial stack.
- */
-#define portINITIAL_XPSR					( 0x01000000 )
-
-#if( configRUN_FREERTOS_SECURE_ONLY == 1 )
-	/**
-	 * @brief Initial EXC_RETURN value.
-	 *
-	 *     FF         FF         FF         FD
-	 * 1111 1111  1111 1111  1111 1111  1111 1101
-	 *
-	 * Bit[6] - 1 --> The exception was taken from the Secure state.
-	 * Bit[5] - 1 --> Do not skip stacking of additional state context.
-	 * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
-	 * Bit[3] - 1 --> Return to the Thread mode.
-	 * Bit[2] - 1 --> Restore registers from the process stack.
-	 * Bit[1] - 0 --> Reserved, 0.
-	 * Bit[0] - 1 --> The exception was taken to the Secure state.
-	 */
-	#define portINITIAL_EXC_RETURN			( 0xfffffffd )
-#else
-	/**
-	 * @brief Initial EXC_RETURN value.
-	 *
-	 *     FF         FF         FF         BC
-	 * 1111 1111  1111 1111  1111 1111  1011 1100
-	 *
-	 * Bit[6] - 0 --> The exception was taken from the Non-Secure state.
-	 * Bit[5] - 1 --> Do not skip stacking of additional state context.
-	 * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
-	 * Bit[3] - 1 --> Return to the Thread mode.
-	 * Bit[2] - 1 --> Restore registers from the process stack.
-	 * Bit[1] - 0 --> Reserved, 0.
-	 * Bit[0] - 0 --> The exception was taken to the Non-Secure state.
-	 */
-	#define portINITIAL_EXC_RETURN			( 0xffffffbc )
-#endif /* configRUN_FREERTOS_SECURE_ONLY */
-
-/**
- * @brief CONTROL register privileged bit mask.
- *
- * Bit[0] in CONTROL register tells the privilege:
- *  Bit[0] = 0 ==> The task is privileged.
- *  Bit[0] = 1 ==> The task is not privileged.
- */
-#define portCONTROL_PRIVILEGED_MASK			( 1UL << 0UL )
-
-/**
- * @brief Initial CONTROL register values.
- */
-#define portINITIAL_CONTROL_UNPRIVILEGED	( 0x3 )
-#define portINITIAL_CONTROL_PRIVILEGED		( 0x2 )
-
-/**
- * @brief Let the user override the pre-loading of the initial LR with the
- * address of prvTaskExitError() in case it messes up unwinding of the stack
- * in the debugger.
- */
-#ifdef configTASK_RETURN_ADDRESS
-	#define portTASK_RETURN_ADDRESS			configTASK_RETURN_ADDRESS
-#else
-	#define portTASK_RETURN_ADDRESS			prvTaskExitError
-#endif
-
-/**
- * @brief If portPRELOAD_REGISTERS then registers will be given an initial value
- * when a task is created. This helps in debugging at the cost of code size.
- */
-#define portPRELOAD_REGISTERS				1
-
-/**
- * @brief A task is created without a secure context, and must call
- * portALLOCATE_SECURE_CONTEXT() to give itself a secure context before it makes
- * any secure calls.
- */
-#define portNO_SECURE_CONTEXT				0
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Used to catch tasks that attempt to return from their implementing
- * function.
- */
-static void prvTaskExitError( void );
-
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Setup the Memory Protection Unit (MPU).
-	 */
-	static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
-#endif /* configENABLE_MPU */
-
-#if( configENABLE_FPU == 1 )
-	/**
-	 * @brief Setup the Floating Point Unit (FPU).
-	 */
-	static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;
-#endif /* configENABLE_FPU */
-
-/**
- * @brief Setup the timer to generate the tick interrupts.
- *
- * The implementation in this file is weak to allow application writers to
- * change the timer used to generate the tick interrupt.
- */
-void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;
-
-/**
- * @brief Checks whether the current execution context is interrupt.
- *
- * @return pdTRUE if the current execution context is interrupt, pdFALSE
- * otherwise.
- */
-BaseType_t xPortIsInsideInterrupt( void );
-
-/**
- * @brief Yield the processor.
- */
-void vPortYield( void ) PRIVILEGED_FUNCTION;
-
-/**
- * @brief Enter critical section.
- */
-void vPortEnterCritical( void ) PRIVILEGED_FUNCTION;
-
-/**
- * @brief Exit from critical section.
- */
-void vPortExitCritical( void ) PRIVILEGED_FUNCTION;
-
-/**
- * @brief SysTick handler.
- */
-void SysTick_Handler( void ) PRIVILEGED_FUNCTION;
-
-/**
- * @brief C part of SVC handler.
- */
-portDONT_DISCARD void vPortSVCHandler_C( uint32_t *pulCallerStackAddress ) PRIVILEGED_FUNCTION;
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Each task maintains its own interrupt status in the critical nesting
- * variable.
- */
-static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
-
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Saved as part of the task context to indicate which context the
-	 * task is using on the secure side.
-	 */
-	portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
-#endif /* configENABLE_TRUSTZONE */
-
-#if( configUSE_TICKLESS_IDLE == 1 )
-	/**
-	 * @brief The number of SysTick increments that make up one tick period.
-	 */
-	static uint32_t ulTimerCountsForOneTick = 0;
-
-	/**
-	 * @brief The maximum number of tick periods that can be suppressed is
-	 * limited by the 24 bit resolution of the SysTick timer.
-	 */
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
-
-	/**
-	 * @brief Compensate for the CPU cycles that pass while the SysTick is
-	 * stopped (low power functionality only).
-	 */
-	static uint32_t ulStoppedTimerCompensation = 0;
-#endif /* configUSE_TICKLESS_IDLE */
-/*-----------------------------------------------------------*/
-
-#if( configUSE_TICKLESS_IDLE == 1 )
-	__attribute__(( weak )) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-	{
-	uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
-	TickType_t xModifiableIdleTime;
-
-		/* Make sure the SysTick reload value does not overflow the counter. */
-		if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-		{
-			xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-		}
-
-		/* Stop the SysTick momentarily. The time the SysTick is stopped for is
-		 * accounted for as best it can be, but using the tickless mode will
-		 * inevitably result in some tiny drift of the time maintained by the
-		 * kernel with respect to calendar time. */
-		portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
-
-		/* Calculate the reload value required to wait xExpectedIdleTime
-		 * tick periods. -1 is used because this code will execute part way
-		 * through one of the tick periods. */
-		ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-		if( ulReloadValue > ulStoppedTimerCompensation )
-		{
-			ulReloadValue -= ulStoppedTimerCompensation;
-		}
-
-		/* Enter a critical section but don't use the taskENTER_CRITICAL()
-		 * method as that will mask interrupts that should exit sleep mode. */
-		__asm volatile( "cpsid i" ::: "memory" );
-		__asm volatile( "dsb" );
-		__asm volatile( "isb" );
-
-		/* If a context switch is pending or a task is waiting for the scheduler
-		 * to be un-suspended then abandon the low power entry. */
-		if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-		{
-			/* Restart from whatever is left in the count register to complete
-			 * this tick period. */
-			portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
-
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-
-			/* Reset the reload register to the value required for normal tick
-			 * periods. */
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
-
-			/* Re-enable interrupts - see comments above the cpsid instruction()
-			 * above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-		else
-		{
-			/* Set the new reload value. */
-			portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
-
-			/* Clear the SysTick count flag and set the count value back to
-			 * zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-
-			/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
-			 * set its parameter to 0 to indicate that its implementation
-			 * contains its own wait for interrupt or wait for event
-			 * instruction, and so wfi should not be executed again. However,
-			 * the original expected idle time variable must remain unmodified,
-			 * so a copy is taken. */
-			xModifiableIdleTime = xExpectedIdleTime;
-			configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-			if( xModifiableIdleTime > 0 )
-			{
-				__asm volatile( "dsb" ::: "memory" );
-				__asm volatile( "wfi" );
-				__asm volatile( "isb" );
-			}
-			configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
-
-			/* Re-enable interrupts to allow the interrupt that brought the MCU
-			 * out of sleep mode to execute immediately. See comments above
-			 * the cpsid instruction above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
-
-			/* Disable interrupts again because the clock is about to be stopped
-			 * and interrupts that execute while the clock is stopped will
-			 * increase any slippage between the time maintained by the RTOS and
-			 * calendar time. */
-			__asm volatile( "cpsid i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
-
-			/* Disable the SysTick clock without reading the
-			 * portNVIC_SYSTICK_CTRL_REG register to ensure the
-			 * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
-			 * Again, the time the SysTick is stopped for is accounted for as
-			 * best it can be, but using the tickless mode will inevitably
-			 * result in some tiny drift of the time maintained by the kernel
-			 * with respect to calendar time*/
-			portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
-
-			/* Determine if the SysTick clock has already counted to zero and
-			 * been set back to the current reload value (the reload back being
-			 * correct for the entire expected idle time) or if the SysTick is
-			 * yet to count to zero (in which case an interrupt other than the
-			 * SysTick must have brought the system out of sleep mode). */
-			if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-			{
-				uint32_t ulCalculatedLoadValue;
-
-				/* The tick interrupt is already pending, and the SysTick count
-				 * reloaded with ulReloadValue.  Reset the
-				 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
-				 * period. */
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
-
-				/* Don't allow a tiny value, or values that have somehow
-				 * underflowed because the post sleep hook did something
-				 * that took too long. */
-				if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-				{
-					ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-				}
-
-				portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
-
-				/* As the pending tick will be processed as soon as this
-				 * function exits, the tick value maintained by the tick is
-				 * stepped forward by one less than the time spent waiting. */
-				ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-			}
-			else
-			{
-				/* Something other than the tick interrupt ended the sleep.
-				 * Work out how long the sleep lasted rounded to complete tick
-				 * periods (not the ulReload value which accounted for part
-				 * ticks). */
-				ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
-
-				/* How many complete tick periods passed while the processor
-				 * was waiting? */
-				ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
-
-				/* The reload value is set to whatever fraction of a single tick
-				 * period remains. */
-				portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-			}
-
-			/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
-			 * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
-			 * value. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-			vTaskStepTick( ulCompleteTickPeriods );
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
-
-			/* Exit with interrupts enabled. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-	}
-#endif /* configUSE_TICKLESS_IDLE */
-/*-----------------------------------------------------------*/
-
-__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
-{
-	/* Calculate the constants required to configure the tick interrupt. */
-	#if( configUSE_TICKLESS_IDLE == 1 )
-	{
-		ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
-		xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
-	}
-	#endif /* configUSE_TICKLESS_IDLE */
-
-	/* Stop and reset the SysTick. */
-	portNVIC_SYSTICK_CTRL_REG = 0UL;
-	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-
-	/* Configure SysTick to interrupt at the requested rate. */
-	portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
-}
-/*-----------------------------------------------------------*/
-
-static void prvTaskExitError( void )
-{
-volatile uint32_t ulDummy = 0UL;
-
-	/* A function that implements a task must not exit or attempt to return to
-	 * its caller as there is nothing to return to. If a task wants to exit it
-	 * should instead call vTaskDelete( NULL ). Artificially force an assert()
-	 * to be triggered if configASSERT() is defined, then stop here so
-	 * application writers can catch the error. */
-	configASSERT( ulCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
-
-	while( ulDummy == 0 )
-	{
-		/* This file calls prvTaskExitError() after the scheduler has been
-		 * started to remove a compiler warning about the function being
-		 * defined but never called.  ulDummy is used purely to quieten other
-		 * warnings about code appearing after this function is called - making
-		 * ulDummy volatile makes the compiler think the function could return
-		 * and therefore not output an 'unreachable code' warning for code that
-		 * appears after it. */
-	}
-}
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_MPU == 1 )
-	static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
-	{
-	#if defined( __ARMCC_VERSION )
-		/* Declaration when these variable are defined in code instead of being
-		 * exported from linker scripts. */
-		extern uint32_t * __privileged_functions_start__;
-		extern uint32_t * __privileged_functions_end__;
-		extern uint32_t * __syscalls_flash_start__;
-		extern uint32_t * __syscalls_flash_end__;
-		extern uint32_t * __unprivileged_flash_start__;
-		extern uint32_t * __unprivileged_flash_end__;
-		extern uint32_t * __privileged_sram_start__;
-		extern uint32_t * __privileged_sram_end__;
-	#else
-		/* Declaration when these variable are exported from linker scripts. */
-		extern uint32_t __privileged_functions_start__[];
-		extern uint32_t __privileged_functions_end__[];
-		extern uint32_t __syscalls_flash_start__[];
-		extern uint32_t __syscalls_flash_end__[];
-		extern uint32_t __unprivileged_flash_start__[];
-		extern uint32_t __unprivileged_flash_end__[];
-		extern uint32_t __privileged_sram_start__[];
-		extern uint32_t __privileged_sram_end__[];
-	#endif /* defined( __ARMCC_VERSION ) */
-
-		/* Check that the MPU is present. */
-		if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
-		{
-			/* MAIR0 - Index 0. */
-			portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
-			/* MAIR0 - Index 1. */
-			portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
-
-			/* Setup privileged flash as Read Only so that privileged tasks can
-			 * read it but not modify. */
-			portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_PRIVILEGED_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
-
-			/* Setup unprivileged flash as Read Only by both privileged and
-			 * unprivileged tasks. All tasks can read it but no-one can modify. */
-			portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
-
-			/* Setup unprivileged syscalls flash as Read Only by both privileged
-			 * and unprivileged tasks. All tasks can read it but no-one can modify. */
-			portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
-
-			/* Setup RAM containing kernel data for privileged access only. */
-			portMPU_RNR_REG = portPRIVILEGED_RAM_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
-								( portMPU_REGION_EXECUTE_NEVER );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
-
-			/* Enable mem fault. */
-			portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
-
-			/* Enable MPU with privileged background access i.e. unmapped
-			 * regions have privileged access. */
-			portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
-		}
-	}
-#endif /* configENABLE_MPU */
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_FPU == 1 )
-	static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
-	{
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			/* Enable non-secure access to the FPU. */
-			SecureInit_EnableNSFPUAccess();
-		}
-		#endif /* configENABLE_TRUSTZONE */
-
-		/* CP10 = 11 ==> Full access to FPU i.e. both privileged and
-		 * unprivileged code should be able to access FPU. CP11 should be
-		 * programmed to the same value as CP10. */
-		*( portCPACR ) |=	(	( portCPACR_CP10_VALUE << portCPACR_CP10_POS ) |
-								( portCPACR_CP11_VALUE << portCPACR_CP11_POS )
-							);
-
-		/* ASPEN = 1 ==> Hardware should automatically preserve floating point
-		 * context on exception entry and restore on exception return.
-		 * LSPEN = 1 ==> Enable lazy context save of FP state. */
-		*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
-	}
-#endif /* configENABLE_FPU */
-/*-----------------------------------------------------------*/
-
-void vPortYield( void ) /* PRIVILEGED_FUNCTION */
-{
-	/* Set a PendSV to request a context switch. */
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-
-	/* Barriers are normally not required but do ensure the code is
-	 * completely within the specified behaviour for the architecture. */
-	__asm volatile( "dsb" ::: "memory" );
-	__asm volatile( "isb" );
-}
-/*-----------------------------------------------------------*/
-
-void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */
-{
-	portDISABLE_INTERRUPTS();
-	ulCriticalNesting++;
-
-	/* Barriers are normally not required but do ensure the code is
-	 * completely within the specified behaviour for the architecture. */
-	__asm volatile( "dsb" ::: "memory" );
-	__asm volatile( "isb" );
-}
-/*-----------------------------------------------------------*/
-
-void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */
-{
-	configASSERT( ulCriticalNesting );
-	ulCriticalNesting--;
-
-	if( ulCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
-}
-/*-----------------------------------------------------------*/
-
-void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
-{
-uint32_t ulPreviousMask;
-
-	ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* Pend a context switch. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
-}
-/*-----------------------------------------------------------*/
-
-void vPortSVCHandler_C( uint32_t *pulCallerStackAddress ) /* PRIVILEGED_FUNCTION portDONT_DISCARD */
-{
-#if( configENABLE_MPU == 1 )
-	#if defined( __ARMCC_VERSION )
-		/* Declaration when these variable are defined in code instead of being
-		 * exported from linker scripts. */
-		extern uint32_t * __syscalls_flash_start__;
-		extern uint32_t * __syscalls_flash_end__;
-	#else
-		/* Declaration when these variable are exported from linker scripts. */
-		extern uint32_t __syscalls_flash_start__[];
-		extern uint32_t __syscalls_flash_end__[];
-	#endif /* defined( __ARMCC_VERSION ) */
-#endif /* configENABLE_MPU */
-
-uint32_t ulPC;
-
-#if( configENABLE_TRUSTZONE == 1 )
-	uint32_t ulR0;
-	#if( configENABLE_MPU == 1 )
-		uint32_t ulControl, ulIsTaskPrivileged;
-	#endif /* configENABLE_MPU */
-#endif /* configENABLE_TRUSTZONE */
-uint8_t ucSVCNumber;
-
-	/* Register are stored on the stack in the following order - R0, R1, R2, R3,
-	 * R12, LR, PC, xPSR. */
-	ulPC = pulCallerStackAddress[ 6 ];
-	ucSVCNumber = ( ( uint8_t *) ulPC )[ -2 ];
-
-	switch( ucSVCNumber )
-	{
-		#if( configENABLE_TRUSTZONE == 1 )
-			case portSVC_ALLOCATE_SECURE_CONTEXT:
-			{
-				/* R0 contains the stack size passed as parameter to the
-				 * vPortAllocateSecureContext function. */
-				ulR0 = pulCallerStackAddress[ 0 ];
-
-				#if( configENABLE_MPU == 1 )
-				{
-					/* Read the CONTROL register value. */
-					__asm volatile ( "mrs %0, control"  : "=r" ( ulControl ) );
-
-					/* The task that raised the SVC is privileged if Bit[0]
-					 * in the CONTROL register is 0. */
-					ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 );
-
-					/* Allocate and load a context for the secure task. */
-					xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged );
-				}
-				#else
-				{
-					/* Allocate and load a context for the secure task. */
-					xSecureContext = SecureContext_AllocateContext( ulR0 );
-				}
-				#endif /* configENABLE_MPU */
-
-				configASSERT( xSecureContext != NULL );
-				SecureContext_LoadContext( xSecureContext );
-			}
-			break;
-
-			case portSVC_FREE_SECURE_CONTEXT:
-			{
-				/* R0 contains the secure context handle to be freed. */
-				ulR0 = pulCallerStackAddress[ 0 ];
-
-				/* Free the secure context. */
-				SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 );
-			}
-			break;
-		#endif /* configENABLE_TRUSTZONE */
-
-		case portSVC_START_SCHEDULER:
-		{
-			#if( configENABLE_TRUSTZONE == 1 )
-			{
-				/* De-prioritize the non-secure exceptions so that the
-				 * non-secure pendSV runs at the lowest priority. */
-				SecureInit_DePrioritizeNSExceptions();
-
-				/* Initialize the secure context management system. */
-				SecureContext_Init();
-			}
-			#endif /* configENABLE_TRUSTZONE */
-
-			#if( configENABLE_FPU == 1 )
-			{
-				/* Setup the Floating Point Unit (FPU). */
-				prvSetupFPU();
-			}
-			#endif /* configENABLE_FPU */
-
-			/* Setup the context of the first task so that the first task starts
-			 * executing. */
-			vRestoreContextOfFirstTask();
-		}
-		break;
-
-		#if( configENABLE_MPU == 1 )
-			case portSVC_RAISE_PRIVILEGE:
-			{
-				/* Only raise the privilege, if the svc was raised from any of
-				 * the system calls. */
-				if( ulPC >= ( uint32_t ) __syscalls_flash_start__ &&
-					ulPC <= ( uint32_t ) __syscalls_flash_end__ )
-				{
-					vRaisePrivilege();
-				}
-			}
-			break;
-		#endif /* configENABLE_MPU */
-
-		default:
-		{
-			/* Incorrect SVC call. */
-			configASSERT( pdFALSE );
-		}
-	}
-}
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_MPU == 1 )
-	StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */
-#else
-	StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters ) /* PRIVILEGED_FUNCTION */
-#endif /* configENABLE_MPU */
-{
-	/* Simulate the stack frame as it would be created by a context switch
-	 * interrupt. */
-	#if( portPRELOAD_REGISTERS == 0 )
-	{
-		pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-		*pxTopOfStack = portINITIAL_XPSR;							/* xPSR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxCode;						/* PC */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
-		pxTopOfStack -= 5;											/* R12, R3, R2 and R1. */
-		*pxTopOfStack = ( StackType_t ) pvParameters;				/* R0 */
-		pxTopOfStack -= 9;											/* R11..R4, EXC_RETURN. */
-		*pxTopOfStack = portINITIAL_EXC_RETURN;
-
-		#if( configENABLE_MPU == 1 )
-		{
-			pxTopOfStack--;
-			if( xRunPrivileged == pdTRUE )
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED;		/* Slot used to hold this task's CONTROL value. */
-			}
-			else
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED;	/* Slot used to hold this task's CONTROL value. */
-			}
-		}
-		#endif /* configENABLE_MPU */
-
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxEndOfStack;	/* Slot used to hold this task's PSPLIM value. */
-
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			pxTopOfStack--;
-			*pxTopOfStack = portNO_SECURE_CONTEXT;		/* Slot used to hold this task's xSecureContext value. */
-		}
-		#endif /* configENABLE_TRUSTZONE */
-	}
-	#else /* portPRELOAD_REGISTERS */
-	{
-		pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-		*pxTopOfStack = portINITIAL_XPSR;							/* xPSR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxCode;						/* PC */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x12121212UL;				/* R12 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x03030303UL;				/* R3 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x02020202UL;				/* R2 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x01010101UL;				/* R1 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pvParameters;				/* R0 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x11111111UL;				/* R11 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x10101010UL;				/* R10 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x09090909UL;				/* R09 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x08080808UL;				/* R08 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x07070707UL;				/* R07 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x06060606UL;				/* R06 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x05050505UL;				/* R05 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x04040404UL;				/* R04 */
-		pxTopOfStack--;
-		*pxTopOfStack = portINITIAL_EXC_RETURN;						/* EXC_RETURN */
-
-		#if( configENABLE_MPU == 1 )
-		{
-			pxTopOfStack--;
-			if( xRunPrivileged == pdTRUE )
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED;		/* Slot used to hold this task's CONTROL value. */
-			}
-			else
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED;	/* Slot used to hold this task's CONTROL value. */
-			}
-		}
-		#endif /* configENABLE_MPU */
-
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxEndOfStack;	/* Slot used to hold this task's PSPLIM value. */
-
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			pxTopOfStack--;
-			*pxTopOfStack = portNO_SECURE_CONTEXT;		/* Slot used to hold this task's xSecureContext value. */
-		}
-		#endif /* configENABLE_TRUSTZONE */
-	}
-	#endif /* portPRELOAD_REGISTERS */
-
-	return pxTopOfStack;
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
-{
-	/* Make PendSV, CallSV and SysTick the same priority as the kernel. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
-
-	#if( configENABLE_MPU == 1 )
-	{
-		/* Setup the Memory Protection Unit (MPU). */
-		prvSetupMPU();
-	}
-	#endif /* configENABLE_MPU */
-
-	/* Start the timer that generates the tick ISR. Interrupts are disabled
-	 * here already. */
-	vPortSetupTimerInterrupt();
-
-	/* Initialize the critical nesting count ready for the first task. */
-	ulCriticalNesting = 0;
-
-	/* Start the first task. */
-	vStartFirstTask();
-
-	/* Should never get here as the tasks will now be executing. Call the task
-	 * exit error function to prevent compiler warnings about a static function
-	 * not being called in the case that the application writer overrides this
-	 * functionality by defining configTASK_RETURN_ADDRESS. Call
-	 * vTaskSwitchContext() so link time optimization does not remove the
-	 * symbol. */
-	vTaskSwitchContext();
-	prvTaskExitError();
-
-	/* Should not get here. */
-	return 0;
-}
-/*-----------------------------------------------------------*/
-
-void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
-{
-	/* Not implemented in ports where there is nothing to return to.
-	 * Artificially force an assert. */
-	configASSERT( ulCriticalNesting == 1000UL );
-}
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_MPU == 1 )
-	void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t ulStackDepth )
-	{
-	uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
-	int32_t lIndex = 0;
-
-		/* Setup MAIR0. */
-		xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
-		xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
-
-		/* This function is called automatically when the task is created - in
-		 * which case the stack region parameters will be valid.  At all other
-		 * times the stack parameters will not be valid and it is assumed that
-		 * the stack region has already been configured. */
-		if( ulStackDepth > 0 )
-		{
-			/* Define the region that allows access to the stack. */
-			ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK;
-			ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1;
-			ulRegionEndAddress  &= portMPU_RLAR_ADDRESS_MASK;
-
-			xMPUSettings->xRegionsSettings[ 0 ].ulRBAR =	( ulRegionStartAddress ) |
-															( portMPU_REGION_NON_SHAREABLE ) |
-															( portMPU_REGION_READ_WRITE ) |
-															( portMPU_REGION_EXECUTE_NEVER );
-
-			xMPUSettings->xRegionsSettings[ 0 ].ulRLAR =	( ulRegionEndAddress ) |
-															( portMPU_RLAR_ATTR_INDEX0 ) |
-															( portMPU_RLAR_REGION_ENABLE );
-		}
-
-		/* User supplied configurable regions. */
-		for( ulRegionNumber = 1; ulRegionNumber <= portNUM_CONFIGURABLE_REGIONS; ulRegionNumber++ )
-		{
-			/* If xRegions is NULL i.e. the task has not specified any MPU
-			 * region, the else part ensures that all the configurable MPU
-			 * regions are invalidated. */
-			if( ( xRegions != NULL ) && ( xRegions[ lIndex ].ulLengthInBytes > 0UL ) )
-			{
-				/* Translate the generic region definition contained in xRegions
-				 * into the ARMv8 specific MPU settings that are then stored in
-				 * xMPUSettings. */
-				ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK;
-				ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1;
-				ulRegionEndAddress  &= portMPU_RLAR_ADDRESS_MASK;
-
-				/* Start address. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR =	( ulRegionStartAddress ) |
-																			( portMPU_REGION_NON_SHAREABLE );
-
-				/* RO/RW. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_READ_ONLY ) != 0 )
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_ONLY );
-				}
-				else
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_WRITE );
-				}
-
-				/* XN. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_EXECUTE_NEVER ) != 0 )
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_EXECUTE_NEVER );
-				}
-
-				/* End Address. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR =	( ulRegionEndAddress ) |
-																			( portMPU_RLAR_REGION_ENABLE );
-
-				/* Normal memory/ Device memory. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
-				{
-					/* Attr1 in MAIR0 is configured as device memory. */
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX1;
-				}
-				else
-				{
-					/* Attr1 in MAIR0 is configured as normal memory. */
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
-				}
-			}
-			else
-			{
-				/* Invalidate the region. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = 0UL;
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = 0UL;
-			}
-
-			lIndex++;
-		}
-	}
-#endif /* configENABLE_MPU */
-/*-----------------------------------------------------------*/
-
-BaseType_t xPortIsInsideInterrupt( void )
-{
-uint32_t ulCurrentInterrupt;
-BaseType_t xReturn;
-
-	/* Obtain the number of the currently executing interrupt. Interrupt Program
-	 * Status Register (IPSR) holds the exception number of the currently-executing
-	 * exception or zero for Thread mode.*/
-	__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
-
-	if( ulCurrentInterrupt == 0 )
-	{
-		xReturn = pdFALSE;
-	}
-	else
-	{
-		xReturn = pdTRUE;
-	}
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
\ No newline at end of file
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
+ * all the API functions to use the MPU wrappers. That should only be done when
+ * task.h is included from an application file. */
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+/* Scheduler includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+
+/* MPU wrappers includes. */
+#include "mpu_wrappers.h"
+
+/* Portasm includes. */
+#include "portasm.h"
+
+#if ( configENABLE_TRUSTZONE == 1 )
+    /* Secure components includes. */
+    #include "secure_context.h"
+    #include "secure_init.h"
+#endif /* configENABLE_TRUSTZONE */
+
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+/**
+ * The FreeRTOS Cortex M33 port can be configured to run on the Secure Side only
+ * i.e. the processor boots as secure and never jumps to the non-secure side.
+ * The Trust Zone support in the port must be disabled in order to run FreeRTOS
+ * on the secure side. The following are the valid configuration seetings:
+ *
+ * 1. Run FreeRTOS on the Secure Side:
+ *		configRUN_FREERTOS_SECURE_ONLY = 1 and configENABLE_TRUSTZONE = 0
+ *
+ * 2. Run FreeRTOS on the Non-Secure Side with Secure Side function call support:
+ *		configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 1
+ *
+ * 3. Run FreeRTOS on the Non-Secure Side only i.e. no Secure Side function call support:
+ *		configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 0
+ */
+#if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) )
+    #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side.
+#endif
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Constants required to manipulate the NVIC.
+ */
+#define portNVIC_SYSTICK_CTRL_REG             ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG             ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG    ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SHPR3_REG                    ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_ENABLE_BIT           ( 1UL << 0UL )
+#define portNVIC_SYSTICK_INT_BIT              ( 1UL << 1UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT       ( 1UL << 16UL )
+#define portMIN_INTERRUPT_PRIORITY            ( 255UL )
+#define portNVIC_PENDSV_PRI                   ( portMIN_INTERRUPT_PRIORITY << 16UL )
+#define portNVIC_SYSTICK_PRI                  ( portMIN_INTERRUPT_PRIORITY << 24UL )
+#ifndef configSYSTICK_CLOCK_HZ
+    #define configSYSTICK_CLOCK_HZ            configCPU_CLOCK_HZ
+    /* Ensure the SysTick is clocked at the same frequency as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT          ( 1UL << 2UL )
+#else
+
+/* The way the SysTick is clocked is not modified in case it is not the
+ * same a the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 0 )
+#endif
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Constants required to manipulate the SCB.
+ */
+#define portSCB_SYS_HANDLER_CTRL_STATE_REG    ( *( volatile uint32_t * ) 0xe000ed24 )
+#define portSCB_MEM_FAULT_ENABLE_BIT          ( 1UL << 16UL )
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Constants required to manipulate the FPU.
+ */
+#define portCPACR               ( ( volatile uint32_t * ) 0xe000ed88 )              /* Coprocessor Access Control Register. */
+#define portCPACR_CP10_VALUE    ( 3UL )
+#define portCPACR_CP11_VALUE    portCPACR_CP10_VALUE
+#define portCPACR_CP10_POS      ( 20UL )
+#define portCPACR_CP11_POS      ( 22UL )
+
+#define portFPCCR               ( ( volatile uint32_t * ) 0xe000ef34 )              /* Floating Point Context Control Register. */
+#define portFPCCR_ASPEN_POS     ( 31UL )
+#define portFPCCR_ASPEN_MASK    ( 1UL << portFPCCR_ASPEN_POS )
+#define portFPCCR_LSPEN_POS     ( 30UL )
+#define portFPCCR_LSPEN_MASK    ( 1UL << portFPCCR_LSPEN_POS )
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Constants required to manipulate the MPU.
+ */
+#define portMPU_TYPE_REG                      ( *( ( volatile uint32_t * ) 0xe000ed90 ) )
+#define portMPU_CTRL_REG                      ( *( ( volatile uint32_t * ) 0xe000ed94 ) )
+#define portMPU_RNR_REG                       ( *( ( volatile uint32_t * ) 0xe000ed98 ) )
+
+#define portMPU_RBAR_REG                      ( *( ( volatile uint32_t * ) 0xe000ed9c ) )
+#define portMPU_RLAR_REG                      ( *( ( volatile uint32_t * ) 0xe000eda0 ) )
+
+#define portMPU_RBAR_A1_REG                   ( *( ( volatile uint32_t * ) 0xe000eda4 ) )
+#define portMPU_RLAR_A1_REG                   ( *( ( volatile uint32_t * ) 0xe000eda8 ) )
+
+#define portMPU_RBAR_A2_REG                   ( *( ( volatile uint32_t * ) 0xe000edac ) )
+#define portMPU_RLAR_A2_REG                   ( *( ( volatile uint32_t * ) 0xe000edb0 ) )
+
+#define portMPU_RBAR_A3_REG                   ( *( ( volatile uint32_t * ) 0xe000edb4 ) )
+#define portMPU_RLAR_A3_REG                   ( *( ( volatile uint32_t * ) 0xe000edb8 ) )
+
+#define portMPU_MAIR0_REG                     ( *( ( volatile uint32_t * ) 0xe000edc0 ) )
+#define portMPU_MAIR1_REG                     ( *( ( volatile uint32_t * ) 0xe000edc4 ) )
+
+#define portMPU_RBAR_ADDRESS_MASK             ( 0xffffffe0 ) /* Must be 32-byte aligned. */
+#define portMPU_RLAR_ADDRESS_MASK             ( 0xffffffe0 ) /* Must be 32-byte aligned. */
+
+#define portMPU_MAIR_ATTR0_POS                ( 0UL )
+#define portMPU_MAIR_ATTR0_MASK               ( 0x000000ff )
+
+#define portMPU_MAIR_ATTR1_POS                ( 8UL )
+#define portMPU_MAIR_ATTR1_MASK               ( 0x0000ff00 )
+
+#define portMPU_MAIR_ATTR2_POS                ( 16UL )
+#define portMPU_MAIR_ATTR2_MASK               ( 0x00ff0000 )
+
+#define portMPU_MAIR_ATTR3_POS                ( 24UL )
+#define portMPU_MAIR_ATTR3_MASK               ( 0xff000000 )
+
+#define portMPU_MAIR_ATTR4_POS                ( 0UL )
+#define portMPU_MAIR_ATTR4_MASK               ( 0x000000ff )
+
+#define portMPU_MAIR_ATTR5_POS                ( 8UL )
+#define portMPU_MAIR_ATTR5_MASK               ( 0x0000ff00 )
+
+#define portMPU_MAIR_ATTR6_POS                ( 16UL )
+#define portMPU_MAIR_ATTR6_MASK               ( 0x00ff0000 )
+
+#define portMPU_MAIR_ATTR7_POS                ( 24UL )
+#define portMPU_MAIR_ATTR7_MASK               ( 0xff000000 )
+
+#define portMPU_RLAR_ATTR_INDEX0              ( 0UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX1              ( 1UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX2              ( 2UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX3              ( 3UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX4              ( 4UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX5              ( 5UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX6              ( 6UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX7              ( 7UL << 1UL )
+
+#define portMPU_RLAR_REGION_ENABLE            ( 1UL )
+
+/* Enable privileged access to unmapped region. */
+#define portMPU_PRIV_BACKGROUND_ENABLE_BIT    ( 1UL << 2UL )
+
+/* Enable MPU. */
+#define portMPU_ENABLE_BIT                    ( 1UL << 0UL )
+
+/* Expected value of the portMPU_TYPE register. */
+#define portEXPECTED_MPU_TYPE_VALUE           ( 8UL << 8UL ) /* 8 regions, unified. */
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief The maximum 24-bit number.
+ *
+ * It is needed because the systick is a 24-bit counter.
+ */
+#define portMAX_24_BIT_NUMBER       ( 0xffffffUL )
+
+/**
+ * @brief A fiddle factor to estimate the number of SysTick counts that would
+ * have occurred while the SysTick counter is stopped during tickless idle
+ * calculations.
+ */
+#define portMISSED_COUNTS_FACTOR    ( 45UL )
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Constants required to set up the initial stack.
+ */
+#define portINITIAL_XPSR    ( 0x01000000 )
+
+#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
+
+/**
+ * @brief Initial EXC_RETURN value.
+ *
+ *     FF         FF         FF         FD
+ * 1111 1111  1111 1111  1111 1111  1111 1101
+ *
+ * Bit[6] - 1 --> The exception was taken from the Secure state.
+ * Bit[5] - 1 --> Do not skip stacking of additional state context.
+ * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
+ * Bit[3] - 1 --> Return to the Thread mode.
+ * Bit[2] - 1 --> Restore registers from the process stack.
+ * Bit[1] - 0 --> Reserved, 0.
+ * Bit[0] - 1 --> The exception was taken to the Secure state.
+ */
+    #define portINITIAL_EXC_RETURN    ( 0xfffffffd )
+#else
+
+/**
+ * @brief Initial EXC_RETURN value.
+ *
+ *     FF         FF         FF         BC
+ * 1111 1111  1111 1111  1111 1111  1011 1100
+ *
+ * Bit[6] - 0 --> The exception was taken from the Non-Secure state.
+ * Bit[5] - 1 --> Do not skip stacking of additional state context.
+ * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
+ * Bit[3] - 1 --> Return to the Thread mode.
+ * Bit[2] - 1 --> Restore registers from the process stack.
+ * Bit[1] - 0 --> Reserved, 0.
+ * Bit[0] - 0 --> The exception was taken to the Non-Secure state.
+ */
+    #define portINITIAL_EXC_RETURN    ( 0xffffffbc )
+#endif /* configRUN_FREERTOS_SECURE_ONLY */
+
+/**
+ * @brief CONTROL register privileged bit mask.
+ *
+ * Bit[0] in CONTROL register tells the privilege:
+ *  Bit[0] = 0 ==> The task is privileged.
+ *  Bit[0] = 1 ==> The task is not privileged.
+ */
+#define portCONTROL_PRIVILEGED_MASK         ( 1UL << 0UL )
+
+/**
+ * @brief Initial CONTROL register values.
+ */
+#define portINITIAL_CONTROL_UNPRIVILEGED    ( 0x3 )
+#define portINITIAL_CONTROL_PRIVILEGED      ( 0x2 )
+
+/**
+ * @brief Let the user override the pre-loading of the initial LR with the
+ * address of prvTaskExitError() in case it messes up unwinding of the stack
+ * in the debugger.
+ */
+#ifdef configTASK_RETURN_ADDRESS
+    #define portTASK_RETURN_ADDRESS    configTASK_RETURN_ADDRESS
+#else
+    #define portTASK_RETURN_ADDRESS    prvTaskExitError
+#endif
+
+/**
+ * @brief If portPRELOAD_REGISTERS then registers will be given an initial value
+ * when a task is created. This helps in debugging at the cost of code size.
+ */
+#define portPRELOAD_REGISTERS    1
+
+/**
+ * @brief A task is created without a secure context, and must call
+ * portALLOCATE_SECURE_CONTEXT() to give itself a secure context before it makes
+ * any secure calls.
+ */
+#define portNO_SECURE_CONTEXT    0
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Used to catch tasks that attempt to return from their implementing
+ * function.
+ */
+static void prvTaskExitError( void );
+
+#if ( configENABLE_MPU == 1 )
+
+/**
+ * @brief Setup the Memory Protection Unit (MPU).
+ */
+    static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
+#endif /* configENABLE_MPU */
+
+#if ( configENABLE_FPU == 1 )
+
+/**
+ * @brief Setup the Floating Point Unit (FPU).
+ */
+    static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;
+#endif /* configENABLE_FPU */
+
+/**
+ * @brief Setup the timer to generate the tick interrupts.
+ *
+ * The implementation in this file is weak to allow application writers to
+ * change the timer used to generate the tick interrupt.
+ */
+void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * @brief Checks whether the current execution context is interrupt.
+ *
+ * @return pdTRUE if the current execution context is interrupt, pdFALSE
+ * otherwise.
+ */
+BaseType_t xPortIsInsideInterrupt( void );
+
+/**
+ * @brief Yield the processor.
+ */
+void vPortYield( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * @brief Enter critical section.
+ */
+void vPortEnterCritical( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * @brief Exit from critical section.
+ */
+void vPortExitCritical( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * @brief SysTick handler.
+ */
+void SysTick_Handler( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * @brief C part of SVC handler.
+ */
+portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIVILEGED_FUNCTION;
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Each task maintains its own interrupt status in the critical nesting
+ * variable.
+ */
+PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
+
+#if ( configENABLE_TRUSTZONE == 1 )
+
+/**
+ * @brief Saved as part of the task context to indicate which context the
+ * task is using on the secure side.
+ */
+    PRIVILEGED_DATA portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
+#endif /* configENABLE_TRUSTZONE */
+
+#if ( configUSE_TICKLESS_IDLE == 1 )
+
+/**
+ * @brief The number of SysTick increments that make up one tick period.
+ */
+    PRIVILEGED_DATA static uint32_t ulTimerCountsForOneTick = 0;
+
+/**
+ * @brief The maximum number of tick periods that can be suppressed is
+ * limited by the 24 bit resolution of the SysTick timer.
+ */
+    PRIVILEGED_DATA static uint32_t xMaximumPossibleSuppressedTicks = 0;
+
+/**
+ * @brief Compensate for the CPU cycles that pass while the SysTick is
+ * stopped (low power functionality only).
+ */
+    PRIVILEGED_DATA static uint32_t ulStoppedTimerCompensation = 0;
+#endif /* configUSE_TICKLESS_IDLE */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+    {
+        uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+        TickType_t xModifiableIdleTime;
+
+        /* Make sure the SysTick reload value does not overflow the counter. */
+        if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+        {
+            xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+        }
+
+        /* Stop the SysTick momentarily. The time the SysTick is stopped for is
+         * accounted for as best it can be, but using the tickless mode will
+         * inevitably result in some tiny drift of the time maintained by the
+         * kernel with respect to calendar time. */
+        portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+
+        /* Calculate the reload value required to wait xExpectedIdleTime
+         * tick periods. -1 is used because this code will execute part way
+         * through one of the tick periods. */
+        ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
+
+        if( ulReloadValue > ulStoppedTimerCompensation )
+        {
+            ulReloadValue -= ulStoppedTimerCompensation;
+        }
+
+        /* Enter a critical section but don't use the taskENTER_CRITICAL()
+         * method as that will mask interrupts that should exit sleep mode. */
+        __asm volatile ( "cpsid i" ::: "memory" );
+        __asm volatile ( "dsb" );
+        __asm volatile ( "isb" );
+
+        /* If a context switch is pending or a task is waiting for the scheduler
+         * to be un-suspended then abandon the low power entry. */
+        if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+        {
+            /* Restart from whatever is left in the count register to complete
+             * this tick period. */
+            portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+
+            /* Reset the reload register to the value required for normal tick
+             * periods. */
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Re-enable interrupts - see comments above the cpsid instruction()
+             * above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+        else
+        {
+            /* Set the new reload value. */
+            portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+
+            /* Clear the SysTick count flag and set the count value back to
+             * zero. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+
+            /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
+             * set its parameter to 0 to indicate that its implementation
+             * contains its own wait for interrupt or wait for event
+             * instruction, and so wfi should not be executed again. However,
+             * the original expected idle time variable must remain unmodified,
+             * so a copy is taken. */
+            xModifiableIdleTime = xExpectedIdleTime;
+            configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
+
+            if( xModifiableIdleTime > 0 )
+            {
+                __asm volatile ( "dsb" ::: "memory" );
+                __asm volatile ( "wfi" );
+                __asm volatile ( "isb" );
+            }
+
+            configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+
+            /* Re-enable interrupts to allow the interrupt that brought the MCU
+             * out of sleep mode to execute immediately. See comments above
+             * the cpsid instruction above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
+
+            /* Disable interrupts again because the clock is about to be stopped
+             * and interrupts that execute while the clock is stopped will
+             * increase any slippage between the time maintained by the RTOS and
+             * calendar time. */
+            __asm volatile ( "cpsid i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
+
+            /* Disable the SysTick clock without reading the
+             * portNVIC_SYSTICK_CTRL_REG register to ensure the
+             * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
+             * Again, the time the SysTick is stopped for is accounted for as
+             * best it can be, but using the tickless mode will inevitably
+             * result in some tiny drift of the time maintained by the kernel
+             * with respect to calendar time*/
+            portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+
+            /* Determine if the SysTick clock has already counted to zero and
+             * been set back to the current reload value (the reload back being
+             * correct for the entire expected idle time) or if the SysTick is
+             * yet to count to zero (in which case an interrupt other than the
+             * SysTick must have brought the system out of sleep mode). */
+            if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+            {
+                uint32_t ulCalculatedLoadValue;
+
+                /* The tick interrupt is already pending, and the SysTick count
+                 * reloaded with ulReloadValue.  Reset the
+                 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+                 * period. */
+                ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+
+                /* Don't allow a tiny value, or values that have somehow
+                 * underflowed because the post sleep hook did something
+                 * that took too long. */
+                if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+                {
+                    ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+                }
+
+                portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+
+                /* As the pending tick will be processed as soon as this
+                 * function exits, the tick value maintained by the tick is
+                 * stepped forward by one less than the time spent waiting. */
+                ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+            }
+            else
+            {
+                /* Something other than the tick interrupt ended the sleep.
+                 * Work out how long the sleep lasted rounded to complete tick
+                 * periods (not the ulReload value which accounted for part
+                 * ticks). */
+                ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+                /* How many complete tick periods passed while the processor
+                 * was waiting? */
+                ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+                /* The reload value is set to whatever fraction of a single tick
+                 * period remains. */
+                portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+            }
+
+            /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+             * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+             * value. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            vTaskStepTick( ulCompleteTickPeriods );
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Exit with interrupts enabled. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+    }
+#endif /* configUSE_TICKLESS_IDLE */
+/*-----------------------------------------------------------*/
+
+__attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
+{
+    /* Calculate the constants required to configure the tick interrupt. */
+    #if ( configUSE_TICKLESS_IDLE == 1 )
+        {
+            ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+            xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+            ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+        }
+    #endif /* configUSE_TICKLESS_IDLE */
+
+    /* Stop and reset the SysTick. */
+    portNVIC_SYSTICK_CTRL_REG = 0UL;
+    portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+
+    /* Configure SysTick to interrupt at the requested rate. */
+    portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+    portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
+}
+/*-----------------------------------------------------------*/
+
+static void prvTaskExitError( void )
+{
+    volatile uint32_t ulDummy = 0UL;
+
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to. If a task wants to exit it
+     * should instead call vTaskDelete( NULL ). Artificially force an assert()
+     * to be triggered if configASSERT() is defined, then stop here so
+     * application writers can catch the error. */
+    configASSERT( ulCriticalNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
+
+    while( ulDummy == 0 )
+    {
+        /* This file calls prvTaskExitError() after the scheduler has been
+         * started to remove a compiler warning about the function being
+         * defined but never called.  ulDummy is used purely to quieten other
+         * warnings about code appearing after this function is called - making
+         * ulDummy volatile makes the compiler think the function could return
+         * and therefore not output an 'unreachable code' warning for code that
+         * appears after it. */
+    }
+}
+/*-----------------------------------------------------------*/
+
+#if ( configENABLE_MPU == 1 )
+    static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
+    {
+        #if defined( __ARMCC_VERSION )
+
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __privileged_functions_start__;
+            extern uint32_t * __privileged_functions_end__;
+            extern uint32_t * __syscalls_flash_start__;
+            extern uint32_t * __syscalls_flash_end__;
+            extern uint32_t * __unprivileged_flash_start__;
+            extern uint32_t * __unprivileged_flash_end__;
+            extern uint32_t * __privileged_sram_start__;
+            extern uint32_t * __privileged_sram_end__;
+        #else /* if defined( __ARMCC_VERSION ) */
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __privileged_functions_start__[];
+            extern uint32_t __privileged_functions_end__[];
+            extern uint32_t __syscalls_flash_start__[];
+            extern uint32_t __syscalls_flash_end__[];
+            extern uint32_t __unprivileged_flash_start__[];
+            extern uint32_t __unprivileged_flash_end__[];
+            extern uint32_t __privileged_sram_start__[];
+            extern uint32_t __privileged_sram_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
+
+        /* Check that the MPU is present. */
+        if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
+        {
+            /* MAIR0 - Index 0. */
+            portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
+            /* MAIR0 - Index 1. */
+            portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
+
+            /* Setup privileged flash as Read Only so that privileged tasks can
+             * read it but not modify. */
+            portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_PRIVILEGED_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
+
+            /* Setup unprivileged flash as Read Only by both privileged and
+             * unprivileged tasks. All tasks can read it but no-one can modify. */
+            portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
+
+            /* Setup unprivileged syscalls flash as Read Only by both privileged
+             * and unprivileged tasks. All tasks can read it but no-one can modify. */
+            portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
+
+            /* Setup RAM containing kernel data for privileged access only. */
+            portMPU_RNR_REG = portPRIVILEGED_RAM_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
+                               ( portMPU_REGION_EXECUTE_NEVER );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
+
+            /* Enable mem fault. */
+            portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
+
+            /* Enable MPU with privileged background access i.e. unmapped
+             * regions have privileged access. */
+            portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
+        }
+    }
+#endif /* configENABLE_MPU */
+/*-----------------------------------------------------------*/
+
+#if ( configENABLE_FPU == 1 )
+    static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
+    {
+        #if ( configENABLE_TRUSTZONE == 1 )
+            {
+                /* Enable non-secure access to the FPU. */
+                SecureInit_EnableNSFPUAccess();
+            }
+        #endif /* configENABLE_TRUSTZONE */
+
+        /* CP10 = 11 ==> Full access to FPU i.e. both privileged and
+         * unprivileged code should be able to access FPU. CP11 should be
+         * programmed to the same value as CP10. */
+        *( portCPACR ) |= ( ( portCPACR_CP10_VALUE << portCPACR_CP10_POS ) |
+                            ( portCPACR_CP11_VALUE << portCPACR_CP11_POS )
+                            );
+
+        /* ASPEN = 1 ==> Hardware should automatically preserve floating point
+         * context on exception entry and restore on exception return.
+         * LSPEN = 1 ==> Enable lazy context save of FP state. */
+        *( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
+    }
+#endif /* configENABLE_FPU */
+/*-----------------------------------------------------------*/
+
+void vPortYield( void ) /* PRIVILEGED_FUNCTION */
+{
+    /* Set a PendSV to request a context switch. */
+    portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+
+    /* Barriers are normally not required but do ensure the code is
+     * completely within the specified behaviour for the architecture. */
+    __asm volatile ( "dsb" ::: "memory" );
+    __asm volatile ( "isb" );
+}
+/*-----------------------------------------------------------*/
+
+void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */
+{
+    portDISABLE_INTERRUPTS();
+    ulCriticalNesting++;
+
+    /* Barriers are normally not required but do ensure the code is
+     * completely within the specified behaviour for the architecture. */
+    __asm volatile ( "dsb" ::: "memory" );
+    __asm volatile ( "isb" );
+}
+/*-----------------------------------------------------------*/
+
+void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */
+{
+    configASSERT( ulCriticalNesting );
+    ulCriticalNesting--;
+
+    if( ulCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
+}
+/*-----------------------------------------------------------*/
+
+void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
+{
+    uint32_t ulPreviousMask;
+
+    ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* Pend a context switch. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
+}
+/*-----------------------------------------------------------*/
+
+void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTION portDONT_DISCARD */
+{
+    #if ( configENABLE_MPU == 1 )
+        #if defined( __ARMCC_VERSION )
+
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __syscalls_flash_start__;
+            extern uint32_t * __syscalls_flash_end__;
+        #else
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __syscalls_flash_start__[];
+            extern uint32_t __syscalls_flash_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
+    #endif /* configENABLE_MPU */
+
+    uint32_t ulPC;
+
+    #if ( configENABLE_TRUSTZONE == 1 )
+        uint32_t ulR0;
+        #if ( configENABLE_MPU == 1 )
+            uint32_t ulControl, ulIsTaskPrivileged;
+        #endif /* configENABLE_MPU */
+    #endif /* configENABLE_TRUSTZONE */
+    uint8_t ucSVCNumber;
+
+    /* Register are stored on the stack in the following order - R0, R1, R2, R3,
+     * R12, LR, PC, xPSR. */
+    ulPC = pulCallerStackAddress[ 6 ];
+    ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ];
+
+    switch( ucSVCNumber )
+    {
+        #if ( configENABLE_TRUSTZONE == 1 )
+            case portSVC_ALLOCATE_SECURE_CONTEXT:
+
+                /* R0 contains the stack size passed as parameter to the
+                 * vPortAllocateSecureContext function. */
+                ulR0 = pulCallerStackAddress[ 0 ];
+
+                #if ( configENABLE_MPU == 1 )
+                    {
+                        /* Read the CONTROL register value. */
+                        __asm volatile ( "mrs %0, control"  : "=r" ( ulControl ) );
+
+                        /* The task that raised the SVC is privileged if Bit[0]
+                         * in the CONTROL register is 0. */
+                        ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 );
+
+                        /* Allocate and load a context for the secure task. */
+                        xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged );
+                    }
+                #else /* if ( configENABLE_MPU == 1 ) */
+                    {
+                        /* Allocate and load a context for the secure task. */
+                        xSecureContext = SecureContext_AllocateContext( ulR0 );
+                    }
+                #endif /* configENABLE_MPU */
+
+                configASSERT( xSecureContext != NULL );
+                SecureContext_LoadContext( xSecureContext );
+                break;
+
+            case portSVC_FREE_SECURE_CONTEXT:
+                /* R0 contains the secure context handle to be freed. */
+                ulR0 = pulCallerStackAddress[ 0 ];
+
+                /* Free the secure context. */
+                SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 );
+                break;
+        #endif /* configENABLE_TRUSTZONE */
+
+        case portSVC_START_SCHEDULER:
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    /* De-prioritize the non-secure exceptions so that the
+                     * non-secure pendSV runs at the lowest priority. */
+                    SecureInit_DePrioritizeNSExceptions();
+
+                    /* Initialize the secure context management system. */
+                    SecureContext_Init();
+                }
+            #endif /* configENABLE_TRUSTZONE */
+
+            #if ( configENABLE_FPU == 1 )
+                {
+                    /* Setup the Floating Point Unit (FPU). */
+                    prvSetupFPU();
+                }
+            #endif /* configENABLE_FPU */
+
+            /* Setup the context of the first task so that the first task starts
+             * executing. */
+            vRestoreContextOfFirstTask();
+            break;
+
+            #if ( configENABLE_MPU == 1 )
+                case portSVC_RAISE_PRIVILEGE:
+
+                    /* Only raise the privilege, if the svc was raised from any of
+                     * the system calls. */
+                    if( ( ulPC >= ( uint32_t ) __syscalls_flash_start__ ) &&
+                        ( ulPC <= ( uint32_t ) __syscalls_flash_end__ ) )
+                    {
+                        vRaisePrivilege();
+                    }
+                    break;
+            #endif /* configENABLE_MPU */
+
+        default:
+            /* Incorrect SVC call. */
+            configASSERT( pdFALSE );
+    }
+}
+/*-----------------------------------------------------------*/
+
+/* *INDENT-OFF* */
+#if ( configENABLE_MPU == 1 )
+    StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                         StackType_t * pxEndOfStack,
+                                         TaskFunction_t pxCode,
+                                         void * pvParameters,
+                                         BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */
+#else
+    StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                         StackType_t * pxEndOfStack,
+                                         TaskFunction_t pxCode,
+                                         void * pvParameters ) /* PRIVILEGED_FUNCTION */
+#endif /* configENABLE_MPU */
+/* *INDENT-ON* */
+{
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
+    #if ( portPRELOAD_REGISTERS == 0 )
+        {
+            pxTopOfStack--;                                          /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+            *pxTopOfStack = portINITIAL_XPSR;                        /* xPSR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxCode;                  /* PC */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
+            pxTopOfStack -= 5;                                       /* R12, R3, R2 and R1. */
+            *pxTopOfStack = ( StackType_t ) pvParameters;            /* R0 */
+            pxTopOfStack -= 9;                                       /* R11..R4, EXC_RETURN. */
+            *pxTopOfStack = portINITIAL_EXC_RETURN;
+
+            #if ( configENABLE_MPU == 1 )
+                {
+                    pxTopOfStack--;
+
+                    if( xRunPrivileged == pdTRUE )
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                    else
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                }
+            #endif /* configENABLE_MPU */
+
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */
+
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    pxTopOfStack--;
+                    *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */
+                }
+            #endif /* configENABLE_TRUSTZONE */
+        }
+    #else /* portPRELOAD_REGISTERS */
+        {
+            pxTopOfStack--;                                          /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+            *pxTopOfStack = portINITIAL_XPSR;                        /* xPSR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxCode;                  /* PC */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x12121212UL;            /* R12 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x03030303UL;            /* R3 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x02020202UL;            /* R2 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x01010101UL;            /* R1 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pvParameters;            /* R0 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x11111111UL;            /* R11 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x10101010UL;            /* R10 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x09090909UL;            /* R09 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x08080808UL;            /* R08 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x07070707UL;            /* R07 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x06060606UL;            /* R06 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x05050505UL;            /* R05 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x04040404UL;            /* R04 */
+            pxTopOfStack--;
+            *pxTopOfStack = portINITIAL_EXC_RETURN;                  /* EXC_RETURN */
+
+            #if ( configENABLE_MPU == 1 )
+                {
+                    pxTopOfStack--;
+
+                    if( xRunPrivileged == pdTRUE )
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                    else
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                }
+            #endif /* configENABLE_MPU */
+
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */
+
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    pxTopOfStack--;
+                    *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */
+                }
+            #endif /* configENABLE_TRUSTZONE */
+        }
+    #endif /* portPRELOAD_REGISTERS */
+
+    return pxTopOfStack;
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
+{
+    /* Make PendSV, CallSV and SysTick the same priority as the kernel. */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
+
+    #if ( configENABLE_MPU == 1 )
+        {
+            /* Setup the Memory Protection Unit (MPU). */
+            prvSetupMPU();
+        }
+    #endif /* configENABLE_MPU */
+
+    /* Start the timer that generates the tick ISR. Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
+
+    /* Initialize the critical nesting count ready for the first task. */
+    ulCriticalNesting = 0;
+
+    /* Start the first task. */
+    vStartFirstTask();
+
+    /* Should never get here as the tasks will now be executing. Call the task
+     * exit error function to prevent compiler warnings about a static function
+     * not being called in the case that the application writer overrides this
+     * functionality by defining configTASK_RETURN_ADDRESS. Call
+     * vTaskSwitchContext() so link time optimization does not remove the
+     * symbol. */
+    vTaskSwitchContext();
+    prvTaskExitError();
+
+    /* Should not get here. */
+    return 0;
+}
+/*-----------------------------------------------------------*/
+
+void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
+{
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( ulCriticalNesting == 1000UL );
+}
+/*-----------------------------------------------------------*/
+
+#if ( configENABLE_MPU == 1 )
+    void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
+                                    const struct xMEMORY_REGION * const xRegions,
+                                    StackType_t * pxBottomOfStack,
+                                    uint32_t ulStackDepth )
+    {
+        uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
+        int32_t lIndex = 0;
+
+        #if defined( __ARMCC_VERSION )
+
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __privileged_sram_start__;
+            extern uint32_t * __privileged_sram_end__;
+        #else
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __privileged_sram_start__[];
+            extern uint32_t __privileged_sram_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
+
+        /* Setup MAIR0. */
+        xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
+        xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
+
+        /* This function is called automatically when the task is created - in
+         * which case the stack region parameters will be valid.  At all other
+         * times the stack parameters will not be valid and it is assumed that
+         * the stack region has already been configured. */
+        if( ulStackDepth > 0 )
+        {
+            ulRegionStartAddress = ( uint32_t ) pxBottomOfStack;
+            ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1;
+
+            /* If the stack is within the privileged SRAM, do not protect it
+             * using a separate MPU region. This is needed because privileged
+             * SRAM is already protected using an MPU region and ARMv8-M does
+             * not allow overlapping MPU regions. */
+            if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
+                ( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
+            {
+                xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
+                xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;
+            }
+            else
+            {
+                /* Define the region that allows access to the stack. */
+                ulRegionStartAddress &= portMPU_RBAR_ADDRESS_MASK;
+                ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK;
+
+                xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) |
+                                                             ( portMPU_REGION_NON_SHAREABLE ) |
+                                                             ( portMPU_REGION_READ_WRITE ) |
+                                                             ( portMPU_REGION_EXECUTE_NEVER );
+
+                xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = ( ulRegionEndAddress ) |
+                                                             ( portMPU_RLAR_ATTR_INDEX0 ) |
+                                                             ( portMPU_RLAR_REGION_ENABLE );
+            }
+        }
+
+        /* User supplied configurable regions. */
+        for( ulRegionNumber = 1; ulRegionNumber <= portNUM_CONFIGURABLE_REGIONS; ulRegionNumber++ )
+        {
+            /* If xRegions is NULL i.e. the task has not specified any MPU
+             * region, the else part ensures that all the configurable MPU
+             * regions are invalidated. */
+            if( ( xRegions != NULL ) && ( xRegions[ lIndex ].ulLengthInBytes > 0UL ) )
+            {
+                /* Translate the generic region definition contained in xRegions
+                 * into the ARMv8 specific MPU settings that are then stored in
+                 * xMPUSettings. */
+                ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK;
+                ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1;
+                ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK;
+
+                /* Start address. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = ( ulRegionStartAddress ) |
+                                                                          ( portMPU_REGION_NON_SHAREABLE );
+
+                /* RO/RW. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_READ_ONLY ) != 0 )
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_ONLY );
+                }
+                else
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_WRITE );
+                }
+
+                /* XN. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_EXECUTE_NEVER ) != 0 )
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_EXECUTE_NEVER );
+                }
+
+                /* End Address. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
+                                                                          ( portMPU_RLAR_REGION_ENABLE );
+
+                /* Normal memory/ Device memory. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
+                {
+                    /* Attr1 in MAIR0 is configured as device memory. */
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX1;
+                }
+                else
+                {
+                    /* Attr1 in MAIR0 is configured as normal memory. */
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
+                }
+            }
+            else
+            {
+                /* Invalidate the region. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = 0UL;
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = 0UL;
+            }
+
+            lIndex++;
+        }
+    }
+#endif /* configENABLE_MPU */
+/*-----------------------------------------------------------*/
+
+BaseType_t xPortIsInsideInterrupt( void )
+{
+    uint32_t ulCurrentInterrupt;
+    BaseType_t xReturn;
+
+    /* Obtain the number of the currently executing interrupt. Interrupt Program
+     * Status Register (IPSR) holds the exception number of the currently-executing
+     * exception or zero for Thread mode.*/
+    __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
+
+    if( ulCurrentInterrupt == 0 )
+    {
+        xReturn = pdFALSE;
+    }
+    else
+    {
+        xReturn = pdTRUE;
+    }
+
+    return xReturn;
+}
+/*-----------------------------------------------------------*/
diff --git a/portable/GCC/ARM_CM33/non_secure/portasm.c b/portable/GCC/ARM_CM33/non_secure/portasm.c
index 443dc184e..dcb7d8554 100644
--- a/portable/GCC/ARM_CM33/non_secure/portasm.c
+++ b/portable/GCC/ARM_CM33/non_secure/portasm.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -41,370 +41,370 @@
 
 void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	.syntax unified									\n"
-	"													\n"
-	"	ldr  r2, pxCurrentTCBConst2						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr  r3, [r2]									\n" /* Read pxCurrentTCB. */
-	"	ldr  r0, [r3]									\n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	dmb												\n" /* Complete outstanding transfers before disabling MPU. */
-	"	ldr r2, xMPUCTRLConst2							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	bic r4, #1										\n" /* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Disable MPU. */
-	"													\n"
-	"	adds r3, #4										\n" /* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
-	"	ldr  r4, [r3]									\n" /* r4 = *r3 i.e. r4 = MAIR0. */
-	"	ldr  r2, xMAIR0Const2							\n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-	"	str  r4, [r2]									\n" /* Program MAIR0. */
-	"	ldr  r2, xRNRConst2								\n" /* r2 = 0xe000ed98 [Location of RNR]. */
-	"	movs r4, #4										\n" /* r4 = 4. */
-	"	str  r4, [r2]									\n" /* Program RNR = 4. */
-	"	adds r3, #4										\n" /* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
-	"	ldr  r2, xRBARConst2							\n" /* r2 = 0xe000ed9c [Location of RBAR]. */
-	"	ldmia r3!, {r4-r11}								\n" /* Read 4 set of RBAR/RLAR registers from TCB. */
-	"	stmia r2!, {r4-r11}								\n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-	"													\n"
-	"	ldr r2, xMPUCTRLConst2							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	orr r4, #1										\n" /* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Enable MPU. */
-	"	dsb												\n" /* Force memory writes before continuing. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	ldm  r0!, {r1-r4}								\n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */
-	"	ldr  r5, xSecureContextConst2					\n"
-	"	str  r1, [r5]									\n" /* Set xSecureContext to this task's value for the same. */
-	"	msr  psplim, r2									\n" /* Set this task's PSPLIM value. */
-	"	msr  control, r3								\n" /* Set this task's CONTROL value. */
-	"	adds r0, #32									\n" /* Discard everything up to r0. */
-	"	msr  psp, r0									\n" /* This is now the new top of stack to use in the task. */
-	"	isb												\n"
-	"	bx   r4											\n" /* Finally, branch to EXC_RETURN. */
-	#else /* configENABLE_MPU */
-	"	ldm  r0!, {r1-r3}								\n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
-	"	ldr  r4, xSecureContextConst2					\n"
-	"	str  r1, [r4]									\n" /* Set xSecureContext to this task's value for the same. */
-	"	msr  psplim, r2									\n" /* Set this task's PSPLIM value. */
-	"	movs r1, #2										\n" /* r1 = 2. */
-	"	msr  CONTROL, r1								\n" /* Switch to use PSP in the thread mode. */
-	"	adds r0, #32									\n" /* Discard everything up to r0. */
-	"	msr  psp, r0									\n" /* This is now the new top of stack to use in the task. */
-	"	isb												\n"
-	"	bx   r3											\n" /* Finally, branch to EXC_RETURN. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	"	.align 4										\n"
-	"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
-	"xSecureContextConst2: .word xSecureContext			\n"
-	#if( configENABLE_MPU == 1 )
-	"xMPUCTRLConst2: .word 0xe000ed94					\n"
-	"xMAIR0Const2: .word 0xe000edc0						\n"
-	"xRNRConst2: .word 0xe000ed98						\n"
-	"xRBARConst2: .word 0xe000ed9c						\n"
-	#endif /* configENABLE_MPU */
-	);
+    __asm volatile
+    (
+        "	.syntax unified									\n"
+        "													\n"
+        "	ldr  r2, pxCurrentTCBConst2						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr  r3, [r2]									\n"/* Read pxCurrentTCB. */
+        "	ldr  r0, [r3]									\n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	dmb												\n"/* Complete outstanding transfers before disabling MPU. */
+            "	ldr r2, xMPUCTRLConst2							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	bic r4, #1										\n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
+            "	str r4, [r2]									\n"/* Disable MPU. */
+            "													\n"
+            "	adds r3, #4										\n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
+            "	ldr  r4, [r3]									\n"/* r4 = *r3 i.e. r4 = MAIR0. */
+            "	ldr  r2, xMAIR0Const2							\n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "	str  r4, [r2]									\n"/* Program MAIR0. */
+            "	ldr  r2, xRNRConst2								\n"/* r2 = 0xe000ed98 [Location of RNR]. */
+            "	movs r4, #4										\n"/* r4 = 4. */
+            "	str  r4, [r2]									\n"/* Program RNR = 4. */
+            "	adds r3, #4										\n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
+            "	ldr  r2, xRBARConst2							\n"/* r2 = 0xe000ed9c [Location of RBAR]. */
+            "	ldmia r3!, {r4-r11}								\n"/* Read 4 set of RBAR/RLAR registers from TCB. */
+            "	stmia r2!, {r4-r11}								\n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "													\n"
+            "	ldr r2, xMPUCTRLConst2							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	orr r4, #1										\n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
+            "	str r4, [r2]									\n"/* Enable MPU. */
+            "	dsb												\n"/* Force memory writes before continuing. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	ldm  r0!, {r1-r4}								\n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */
+            "	ldr  r5, xSecureContextConst2					\n"
+            "	str  r1, [r5]									\n"/* Set xSecureContext to this task's value for the same. */
+            "	msr  psplim, r2									\n"/* Set this task's PSPLIM value. */
+            "	msr  control, r3								\n"/* Set this task's CONTROL value. */
+            "	adds r0, #32									\n"/* Discard everything up to r0. */
+            "	msr  psp, r0									\n"/* This is now the new top of stack to use in the task. */
+            "	isb												\n"
+            "	bx   r4											\n"/* Finally, branch to EXC_RETURN. */
+        #else /* configENABLE_MPU */
+            "	ldm  r0!, {r1-r3}								\n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
+            "	ldr  r4, xSecureContextConst2					\n"
+            "	str  r1, [r4]									\n"/* Set xSecureContext to this task's value for the same. */
+            "	msr  psplim, r2									\n"/* Set this task's PSPLIM value. */
+            "	movs r1, #2										\n"/* r1 = 2. */
+            "	msr  CONTROL, r1								\n"/* Switch to use PSP in the thread mode. */
+            "	adds r0, #32									\n"/* Discard everything up to r0. */
+            "	msr  psp, r0									\n"/* This is now the new top of stack to use in the task. */
+            "	isb												\n"
+            "	bx   r3											\n"/* Finally, branch to EXC_RETURN. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        "	.align 4										\n"
+        "pxCurrentTCBConst2: .word pxCurrentTCB				\n"
+        "xSecureContextConst2: .word xSecureContext			\n"
+        #if ( configENABLE_MPU == 1 )
+            "xMPUCTRLConst2: .word 0xe000ed94					\n"
+            "xMAIR0Const2: .word 0xe000edc0						\n"
+            "xRNRConst2: .word 0xe000ed98						\n"
+            "xRBARConst2: .word 0xe000ed9c						\n"
+        #endif /* configENABLE_MPU */
+    );
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
 {
-	__asm volatile
-	(
-	"	mrs r0, control									\n" /* r0 = CONTROL. */
-	"	tst r0, #1										\n" /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
-	"	ite ne											\n"
-	"	movne r0, #0									\n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
-	"	moveq r0, #1									\n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
-	"	bx lr											\n" /* Return. */
-	"													\n"
-	"	.align 4										\n"
-	::: "r0", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, control									\n"/* r0 = CONTROL. */
+        "	tst r0, #1										\n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
+        "	ite ne											\n"
+        "	movne r0, #0									\n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
+        "	moveq r0, #1									\n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
+        "	bx lr											\n"/* Return. */
+        "													\n"
+        "	.align 4										\n"
+        ::: "r0", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	 __asm volatile
-	(
-	"	mrs r0, control									\n" /* Read the CONTROL register. */
-	"	bic r0, #1										\n" /* Clear the bit 0. */
-	"	msr control, r0									\n" /* Write back the new CONTROL value. */
-	"	bx lr											\n" /* Return to the caller. */
-	::: "r0", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, control									\n"/* Read the CONTROL register. */
+        "	bic r0, #1										\n"/* Clear the bit 0. */
+        "	msr control, r0									\n"/* Write back the new CONTROL value. */
+        "	bx lr											\n"/* Return to the caller. */
+        ::: "r0", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vResetPrivilege( void ) /* __attribute__ (( naked )) */
 {
-	__asm volatile
-	(
-	"	mrs r0, control									\n" /* r0 = CONTROL. */
-	"	orr r0, #1										\n" /* r0 = r0 | 1. */
-	"	msr control, r0									\n" /* CONTROL = r0. */
-	"	bx lr											\n" /* Return to the caller. */
-	:::"r0", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, control									\n"/* r0 = CONTROL. */
+        "	orr r0, #1										\n"/* r0 = r0 | 1. */
+        "	msr control, r0									\n"/* CONTROL = r0. */
+        "	bx lr											\n"/* Return to the caller. */
+        ::: "r0", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	ldr r0, xVTORConst								\n" /* Use the NVIC offset register to locate the stack. */
-	"	ldr r0, [r0]									\n" /* Read the VTOR register which gives the address of vector table. */
-	"	ldr r0, [r0]									\n" /* The first entry in vector table is stack pointer. */
-	"	msr msp, r0										\n" /* Set the MSP back to the start of the stack. */
-	"	cpsie i											\n" /* Globally enable interrupts. */
-	"	cpsie f											\n"
-	"	dsb												\n"
-	"	isb												\n"
-	"	svc %0											\n" /* System call to start the first task. */
-	"	nop												\n"
-	"													\n"
-	"   .align 4										\n"
-	"xVTORConst: .word 0xe000ed08						\n"
-	:: "i" ( portSVC_START_SCHEDULER ) : "memory"
-	);
+    __asm volatile
+    (
+        "	ldr r0, xVTORConst								\n"/* Use the NVIC offset register to locate the stack. */
+        "	ldr r0, [r0]									\n"/* Read the VTOR register which gives the address of vector table. */
+        "	ldr r0, [r0]									\n"/* The first entry in vector table is stack pointer. */
+        "	msr msp, r0										\n"/* Set the MSP back to the start of the stack. */
+        "	cpsie i											\n"/* Globally enable interrupts. */
+        "	cpsie f											\n"
+        "	dsb												\n"
+        "	isb												\n"
+        "	svc %0											\n"/* System call to start the first task. */
+        "	nop												\n"
+        "													\n"
+        "   .align 4										\n"
+        "xVTORConst: .word 0xe000ed08						\n"
+        ::"i" ( portSVC_START_SCHEDULER ) : "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	mrs r0, basepri									\n" /* r0 = basepri. Return original basepri value. */
-	"	mov r1, %0										\n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-	"	msr basepri, r1									\n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-	"	dsb												\n"
-	"	isb												\n"
-	"	bx lr											\n" /* Return. */
-	:: "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, basepri									\n"/* r0 = basepri. Return original basepri value. */
+        "	mov r1, %0										\n"/* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+        "	msr basepri, r1									\n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+        "	dsb												\n"
+        "	isb												\n"
+        "	bx lr											\n"/* Return. */
+        ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	msr basepri, r0									\n" /* basepri = ulMask. */
-	"	dsb												\n"
-	"	isb												\n"
-	"	bx lr											\n" /* Return. */
-	::: "memory"
-	);
+    __asm volatile
+    (
+        "	msr basepri, r0									\n"/* basepri = ulMask. */
+        "	dsb												\n"
+        "	isb												\n"
+        "	bx lr											\n"/* Return. */
+        ::: "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	.syntax unified									\n"
-	"	.extern SecureContext_SaveContext				\n"
-	"	.extern SecureContext_LoadContext				\n"
-	"													\n"
-	"	mrs r1, psp										\n" /* Read PSP in r1. */
-	"	ldr r2, xSecureContextConst						\n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
-	"	ldr r0, [r2]									\n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
-	"													\n"
-	"	cbz r0, save_ns_context							\n" /* No secure context to save. */
-	"	push {r0-r2, r14}								\n"
-	"	bl SecureContext_SaveContext					\n"
-	"	pop {r0-r3}										\n" /* LR is now in r3. */
-	"	mov lr, r3										\n" /* LR = r3. */
-	"	lsls r2, r3, #25								\n" /* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-	"	bpl save_ns_context								\n" /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-	"	ldr r3, pxCurrentTCBConst						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr r2, [r3]									\n" /* Read pxCurrentTCB. */
-	#if( configENABLE_MPU == 1 )
-	"	subs r1, r1, #16								\n" /* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
-	"	str r1, [r2]									\n" /* Save the new top of stack in TCB. */
-	"	mrs r2, psplim									\n" /* r2 = PSPLIM. */
-	"	mrs r3, control									\n" /* r3 = CONTROL. */
-	"	mov r4, lr										\n" /* r4 = LR/EXC_RETURN. */
-	"	stmia r1!, {r0, r2-r4}							\n" /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
-	#else /* configENABLE_MPU */
-	"	subs r1, r1, #12								\n" /* Make space for xSecureContext, PSPLIM and LR on the stack. */
-	"	str r1, [r2]									\n" /* Save the new top of stack in TCB. */
-	"	mrs r2, psplim									\n" /* r2 = PSPLIM. */
-	"	mov r3, lr										\n" /* r3 = LR/EXC_RETURN. */
-	"	stmia r1!, {r0, r2-r3}							\n" /* Store xSecureContext, PSPLIM and LR on the stack. */
-	#endif /* configENABLE_MPU */
-	"	b select_next_task								\n"
-	"													\n"
-	" save_ns_context:									\n"
-	"	ldr r3, pxCurrentTCBConst						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr r2, [r3]									\n" /* Read pxCurrentTCB. */
-	#if( configENABLE_FPU == 1 )
-	"	tst lr, #0x10									\n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
-	"	it eq											\n"
-	"	vstmdbeq r1!, {s16-s31}							\n" /* Store the FPU registers which are not saved automatically. */
-	#endif /* configENABLE_FPU */
-	#if( configENABLE_MPU == 1 )
-	"	subs r1, r1, #48								\n" /* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
-	"	str r1, [r2]									\n" /* Save the new top of stack in TCB. */
-	"	adds r1, r1, #16								\n" /* r1 = r1 + 16. */
-	"	stm r1, {r4-r11}								\n" /* Store the registers that are not saved automatically. */
-	"	mrs r2, psplim									\n" /* r2 = PSPLIM. */
-	"	mrs r3, control									\n" /* r3 = CONTROL. */
-	"	mov r4, lr										\n" /* r4 = LR/EXC_RETURN. */
-	"	subs r1, r1, #16								\n" /* r1 = r1 - 16. */
-	"	stm r1, {r0, r2-r4}								\n" /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
-	#else /* configENABLE_MPU */
-	"	subs r1, r1, #44								\n" /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
-	"	str r1, [r2]									\n" /* Save the new top of stack in TCB. */
-	"	adds r1, r1, #12								\n" /* r1 = r1 + 12. */
-	"	stm r1, {r4-r11}								\n" /* Store the registers that are not saved automatically. */
-	"	mrs r2, psplim									\n" /* r2 = PSPLIM. */
-	"	mov r3, lr										\n" /* r3 = LR/EXC_RETURN. */
-	"	subs r1, r1, #12								\n" /* r1 = r1 - 12. */
-	"	stmia r1!, {r0, r2-r3}							\n" /* Store xSecureContext, PSPLIM and LR on the stack. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	" select_next_task:									\n"
-	"	mov r0, %0										\n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
-	"	msr basepri, r0									\n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-	"	dsb												\n"
-	"	isb												\n"
-	"	bl vTaskSwitchContext							\n"
-	"	mov r0, #0										\n" /* r0 = 0. */
-	"	msr basepri, r0									\n" /* Enable interrupts. */
-	"													\n"
-	"	ldr r2, pxCurrentTCBConst						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr r3, [r2]									\n" /* Read pxCurrentTCB. */
-	"	ldr r1, [r3]									\n" /* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	dmb												\n" /* Complete outstanding transfers before disabling MPU. */
-	"	ldr r2, xMPUCTRLConst							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	bic r4, #1										\n" /* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Disable MPU. */
-	"													\n"
-	"	adds r3, #4										\n" /* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
-	"	ldr r4, [r3]									\n" /* r4 = *r3 i.e. r4 = MAIR0. */
-	"	ldr r2, xMAIR0Const								\n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-	"	str r4, [r2]									\n" /* Program MAIR0. */
-	"	ldr r2, xRNRConst								\n" /* r2 = 0xe000ed98 [Location of RNR]. */
-	"	movs r4, #4										\n" /* r4 = 4. */
-	"	str r4, [r2]									\n" /* Program RNR = 4. */
-	"	adds r3, #4										\n" /* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
-	"	ldr  r2, xRBARConst								\n" /* r2 = 0xe000ed9c [Location of RBAR]. */
-	"	ldmia r3!, {r4-r11}								\n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
-	"	stmia r2!, {r4-r11}								\n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-	"													\n"
-	"	ldr r2, xMPUCTRLConst							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	orr r4, #1										\n" /* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Enable MPU. */
-	"	dsb												\n" /* Force memory writes before continuing. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	ldmia r1!, {r0, r2-r4}							\n" /* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */
-	"	msr psplim, r2									\n" /* Restore the PSPLIM register value for the task. */
-	"	msr control, r3									\n" /* Restore the CONTROL register value for the task. */
-	"	mov lr, r4										\n" /* LR = r4. */
-	"	ldr r2, xSecureContextConst						\n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
-	"	str r0, [r2]									\n" /* Restore the task's xSecureContext. */
-	"	cbz r0, restore_ns_context						\n" /* If there is no secure context for the task, restore the non-secure context. */
-	"	push {r1,r4}									\n"
-	"	bl SecureContext_LoadContext					\n" /* Restore the secure context. */
-	"	pop {r1,r4}										\n"
-	"	mov lr, r4										\n" /* LR = r4. */
-	"	lsls r2, r4, #25								\n" /* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-	"	bpl restore_ns_context							\n" /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-	"	msr psp, r1										\n" /* Remember the new top of stack for the task. */
-	"	bx lr											\n"
-	#else /* configENABLE_MPU */
-	"	ldmia r1!, {r0, r2-r3}							\n" /* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */
-	"	msr psplim, r2									\n" /* Restore the PSPLIM register value for the task. */
-	"	mov lr, r3										\n" /* LR = r3. */
-	"	ldr r2, xSecureContextConst						\n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
-	"	str r0, [r2]									\n" /* Restore the task's xSecureContext. */
-	"	cbz r0, restore_ns_context						\n" /* If there is no secure context for the task, restore the non-secure context. */
-	"	push {r1,r3}									\n"
-	"	bl SecureContext_LoadContext					\n" /* Restore the secure context. */
-	"	pop {r1,r3}										\n"
-	"	mov lr, r3										\n" /* LR = r3. */
-	"	lsls r2, r3, #25								\n" /* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-	"	bpl restore_ns_context							\n" /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-	"	msr psp, r1										\n" /* Remember the new top of stack for the task. */
-	"	bx lr											\n"
-	#endif /* configENABLE_MPU */
-	"													\n"
-	" restore_ns_context:								\n"
-	"	ldmia r1!, {r4-r11}								\n" /* Restore the registers that are not automatically restored. */
-	#if( configENABLE_FPU == 1 )
-	"	tst lr, #0x10									\n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
-	"	it eq											\n"
-	"	vldmiaeq r1!, {s16-s31}							\n" /* Restore the FPU registers which are not restored automatically. */
-	#endif /* configENABLE_FPU */
-	"	msr psp, r1										\n" /* Remember the new top of stack for the task. */
-	"	bx lr											\n"
-	"													\n"
-	"	.align 4										\n"
-	"pxCurrentTCBConst: .word pxCurrentTCB				\n"
-	"xSecureContextConst: .word xSecureContext			\n"
-	#if( configENABLE_MPU == 1 )
-	"xMPUCTRLConst: .word 0xe000ed94					\n"
-	"xMAIR0Const: .word 0xe000edc0						\n"
-	"xRNRConst: .word 0xe000ed98						\n"
-	"xRBARConst: .word 0xe000ed9c						\n"
-	#endif /* configENABLE_MPU */
-	:: "i"( configMAX_SYSCALL_INTERRUPT_PRIORITY )
-	);
+    __asm volatile
+    (
+        "	.syntax unified									\n"
+        "	.extern SecureContext_SaveContext				\n"
+        "	.extern SecureContext_LoadContext				\n"
+        "													\n"
+        "	mrs r1, psp										\n"/* Read PSP in r1. */
+        "	ldr r2, xSecureContextConst						\n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+        "	ldr r0, [r2]									\n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
+        "													\n"
+        "	cbz r0, save_ns_context							\n"/* No secure context to save. */
+        "	push {r0-r2, r14}								\n"
+        "	bl SecureContext_SaveContext					\n"
+        "	pop {r0-r3}										\n"/* LR is now in r3. */
+        "	mov lr, r3										\n"/* LR = r3. */
+        "	lsls r2, r3, #25								\n"/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+        "	bpl save_ns_context								\n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+        "	ldr r3, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr r2, [r3]									\n"/* Read pxCurrentTCB. */
+        #if ( configENABLE_MPU == 1 )
+            "	subs r1, r1, #16								\n"/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
+            "	str r1, [r2]									\n"/* Save the new top of stack in TCB. */
+            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
+            "	mrs r3, control									\n"/* r3 = CONTROL. */
+            "	mov r4, lr										\n"/* r4 = LR/EXC_RETURN. */
+            "	stmia r1!, {r0, r2-r4}							\n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
+        #else /* configENABLE_MPU */
+            "	subs r1, r1, #12								\n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */
+            "	str r1, [r2]									\n"/* Save the new top of stack in TCB. */
+            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
+            "	mov r3, lr										\n"/* r3 = LR/EXC_RETURN. */
+            "	stmia r1!, {r0, r2-r3}							\n"/* Store xSecureContext, PSPLIM and LR on the stack. */
+        #endif /* configENABLE_MPU */
+        "	b select_next_task								\n"
+        "													\n"
+        " save_ns_context:									\n"
+        "	ldr r3, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr r2, [r3]									\n"/* Read pxCurrentTCB. */
+        #if ( configENABLE_FPU == 1 )
+            "	tst lr, #0x10									\n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
+            "	it eq											\n"
+            "	vstmdbeq r1!, {s16-s31}							\n"/* Store the FPU registers which are not saved automatically. */
+        #endif /* configENABLE_FPU */
+        #if ( configENABLE_MPU == 1 )
+            "	subs r1, r1, #48								\n"/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
+            "	str r1, [r2]									\n"/* Save the new top of stack in TCB. */
+            "	adds r1, r1, #16								\n"/* r1 = r1 + 16. */
+            "	stm r1, {r4-r11}								\n"/* Store the registers that are not saved automatically. */
+            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
+            "	mrs r3, control									\n"/* r3 = CONTROL. */
+            "	mov r4, lr										\n"/* r4 = LR/EXC_RETURN. */
+            "	subs r1, r1, #16								\n"/* r1 = r1 - 16. */
+            "	stm r1, {r0, r2-r4}								\n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
+        #else /* configENABLE_MPU */
+            "	subs r1, r1, #44								\n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
+            "	str r1, [r2]									\n"/* Save the new top of stack in TCB. */
+            "	adds r1, r1, #12								\n"/* r1 = r1 + 12. */
+            "	stm r1, {r4-r11}								\n"/* Store the registers that are not saved automatically. */
+            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
+            "	mov r3, lr										\n"/* r3 = LR/EXC_RETURN. */
+            "	subs r1, r1, #12								\n"/* r1 = r1 - 12. */
+            "	stmia r1!, {r0, r2-r3}							\n"/* Store xSecureContext, PSPLIM and LR on the stack. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        " select_next_task:									\n"
+        "	mov r0, %0										\n"/* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
+        "	msr basepri, r0									\n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+        "	dsb												\n"
+        "	isb												\n"
+        "	bl vTaskSwitchContext							\n"
+        "	mov r0, #0										\n"/* r0 = 0. */
+        "	msr basepri, r0									\n"/* Enable interrupts. */
+        "													\n"
+        "	ldr r2, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr r3, [r2]									\n"/* Read pxCurrentTCB. */
+        "	ldr r1, [r3]									\n"/* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	dmb												\n"/* Complete outstanding transfers before disabling MPU. */
+            "	ldr r2, xMPUCTRLConst							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	bic r4, #1										\n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
+            "	str r4, [r2]									\n"/* Disable MPU. */
+            "													\n"
+            "	adds r3, #4										\n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
+            "	ldr r4, [r3]									\n"/* r4 = *r3 i.e. r4 = MAIR0. */
+            "	ldr r2, xMAIR0Const								\n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "	str r4, [r2]									\n"/* Program MAIR0. */
+            "	ldr r2, xRNRConst								\n"/* r2 = 0xe000ed98 [Location of RNR]. */
+            "	movs r4, #4										\n"/* r4 = 4. */
+            "	str r4, [r2]									\n"/* Program RNR = 4. */
+            "	adds r3, #4										\n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
+            "	ldr  r2, xRBARConst								\n"/* r2 = 0xe000ed9c [Location of RBAR]. */
+            "	ldmia r3!, {r4-r11}								\n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
+            "	stmia r2!, {r4-r11}								\n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "													\n"
+            "	ldr r2, xMPUCTRLConst							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	orr r4, #1										\n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
+            "	str r4, [r2]									\n"/* Enable MPU. */
+            "	dsb												\n"/* Force memory writes before continuing. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	ldmia r1!, {r0, r2-r4}							\n"/* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */
+            "	msr psplim, r2									\n"/* Restore the PSPLIM register value for the task. */
+            "	msr control, r3									\n"/* Restore the CONTROL register value for the task. */
+            "	mov lr, r4										\n"/* LR = r4. */
+            "	ldr r2, xSecureContextConst						\n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            "	str r0, [r2]									\n"/* Restore the task's xSecureContext. */
+            "	cbz r0, restore_ns_context						\n"/* If there is no secure context for the task, restore the non-secure context. */
+            "	push {r1,r4}									\n"
+            "	bl SecureContext_LoadContext					\n"/* Restore the secure context. */
+            "	pop {r1,r4}										\n"
+            "	mov lr, r4										\n"/* LR = r4. */
+            "	lsls r2, r4, #25								\n"/* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+            "	bpl restore_ns_context							\n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+            "	msr psp, r1										\n"/* Remember the new top of stack for the task. */
+            "	bx lr											\n"
+        #else /* configENABLE_MPU */
+            "	ldmia r1!, {r0, r2-r3}							\n"/* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */
+            "	msr psplim, r2									\n"/* Restore the PSPLIM register value for the task. */
+            "	mov lr, r3										\n"/* LR = r3. */
+            "	ldr r2, xSecureContextConst						\n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            "	str r0, [r2]									\n"/* Restore the task's xSecureContext. */
+            "	cbz r0, restore_ns_context						\n"/* If there is no secure context for the task, restore the non-secure context. */
+            "	push {r1,r3}									\n"
+            "	bl SecureContext_LoadContext					\n"/* Restore the secure context. */
+            "	pop {r1,r3}										\n"
+            "	mov lr, r3										\n"/* LR = r3. */
+            "	lsls r2, r3, #25								\n"/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+            "	bpl restore_ns_context							\n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+            "	msr psp, r1										\n"/* Remember the new top of stack for the task. */
+            "	bx lr											\n"
+        #endif /* configENABLE_MPU */
+        "													\n"
+        " restore_ns_context:								\n"
+        "	ldmia r1!, {r4-r11}								\n"/* Restore the registers that are not automatically restored. */
+        #if ( configENABLE_FPU == 1 )
+            "	tst lr, #0x10									\n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
+            "	it eq											\n"
+            "	vldmiaeq r1!, {s16-s31}							\n"/* Restore the FPU registers which are not restored automatically. */
+        #endif /* configENABLE_FPU */
+        "	msr psp, r1										\n"/* Remember the new top of stack for the task. */
+        "	bx lr											\n"
+        "													\n"
+        "	.align 4										\n"
+        "pxCurrentTCBConst: .word pxCurrentTCB				\n"
+        "xSecureContextConst: .word xSecureContext			\n"
+        #if ( configENABLE_MPU == 1 )
+            "xMPUCTRLConst: .word 0xe000ed94					\n"
+            "xMAIR0Const: .word 0xe000edc0						\n"
+            "xRNRConst: .word 0xe000ed98						\n"
+            "xRBARConst: .word 0xe000ed9c						\n"
+        #endif /* configENABLE_MPU */
+        ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
+    );
 }
 /*-----------------------------------------------------------*/
 
 void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	tst lr, #4										\n"
-	"	ite eq											\n"
-	"	mrseq r0, msp									\n"
-	"	mrsne r0, psp									\n"
-	"	ldr r1, svchandler_address_const				\n"
-	"	bx r1											\n"
-	"													\n"
-	"	.align 4										\n"
-	"svchandler_address_const: .word vPortSVCHandler_C	\n"
-	);
+    __asm volatile
+    (
+        "	tst lr, #4										\n"
+        "	ite eq											\n"
+        "	mrseq r0, msp									\n"
+        "	mrsne r0, psp									\n"
+        "	ldr r1, svchandler_address_const				\n"
+        "	bx r1											\n"
+        "													\n"
+        "	.align 4										\n"
+        "svchandler_address_const: .word vPortSVCHandler_C	\n"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attribute__ (( naked )) */
 {
-	__asm volatile
-	(
-	"	svc %0											\n" /* Secure context is allocated in the supervisor call. */
-	"	bx lr											\n" /* Return. */
-	:: "i" ( portSVC_ALLOCATE_SECURE_CONTEXT ) : "memory"
-	);
+    __asm volatile
+    (
+        "	svc %0											\n"/* Secure context is allocated in the supervisor call. */
+        "	bx lr											\n"/* Return. */
+        ::"i" ( portSVC_ALLOCATE_SECURE_CONTEXT ) : "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
-void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	ldr r1, [r0]									\n" /* The first item in the TCB is the top of the stack. */
-	"	ldr r0, [r1]									\n" /* The first item on the stack is the task's xSecureContext. */
-	"	cmp r0, #0										\n" /* Raise svc if task's xSecureContext is not NULL. */
-	"	it ne											\n"
-	"	svcne %0										\n" /* Secure context is freed in the supervisor call. */
-	"	bx lr											\n" /* Return. */
-	:: "i" ( portSVC_FREE_SECURE_CONTEXT ) : "memory"
-	);
+    __asm volatile
+    (
+        "	ldr r1, [r0]									\n"/* The first item in the TCB is the top of the stack. */
+        "	ldr r0, [r1]									\n"/* The first item on the stack is the task's xSecureContext. */
+        "	cmp r0, #0										\n"/* Raise svc if task's xSecureContext is not NULL. */
+        "	it ne											\n"
+        "	svcne %0										\n"/* Secure context is freed in the supervisor call. */
+        "	bx lr											\n"/* Return. */
+        ::"i" ( portSVC_FREE_SECURE_CONTEXT ) : "memory"
+    );
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/GCC/ARM_CM33/non_secure/portasm.h b/portable/GCC/ARM_CM33/non_secure/portasm.h
index 71d711c69..6aaee8fc8 100644
--- a/portable/GCC/ARM_CM33/non_secure/portasm.h
+++ b/portable/GCC/ARM_CM33/non_secure/portasm.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -38,14 +38,14 @@
  * @brief Restore the context of the first task so that the first task starts
  * executing.
  */
-void vRestoreContextOfFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vRestoreContextOfFirstTask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Checks whether or not the processor is privileged.
  *
  * @return 1 if the processor is already privileged, 0 otherwise.
  */
-BaseType_t xIsPrivileged( void ) __attribute__ (( naked ));
+BaseType_t xIsPrivileged( void ) __attribute__( ( naked ) );
 
 /**
  * @brief Raises the privilege level by clearing the bit 0 of the CONTROL
@@ -58,7 +58,7 @@ BaseType_t xIsPrivileged( void ) __attribute__ (( naked ));
  *  Bit[0] = 0 --> The processor is running privileged
  *  Bit[0] = 1 --> The processor is running unprivileged.
  */
-void vRaisePrivilege( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vRaisePrivilege( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
@@ -68,32 +68,32 @@ void vRaisePrivilege( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
  *  Bit[0] = 0 --> The processor is running privileged
  *  Bit[0] = 1 --> The processor is running unprivileged.
  */
-void vResetPrivilege( void ) __attribute__ (( naked ));
+void vResetPrivilege( void ) __attribute__( ( naked ) );
 
 /**
  * @brief Starts the first task.
  */
-void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vStartFirstTask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Disables interrupts.
  */
-uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
+uint32_t ulSetInterruptMask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Enables interrupts.
  */
-void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
+void vClearInterruptMask( uint32_t ulMask ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief PendSV Exception handler.
  */
-void PendSV_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void PendSV_Handler( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief SVC Handler.
  */
-void SVC_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void SVC_Handler( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Allocate a Secure context for the calling task.
@@ -101,13 +101,13 @@ void SVC_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
  * @param[in] ulSecureStackSize The size of the stack to be allocated on the
  * secure side for the calling task.
  */
-void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) __attribute__ (( naked ));
+void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) __attribute__( ( naked ) );
 
 /**
  * @brief Free the task's secure context.
  *
  * @param[in] pulTCB Pointer to the Task Control Block (TCB) of the task.
  */
-void vPortFreeSecureContext( uint32_t *pulTCB ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vPortFreeSecureContext( uint32_t * pulTCB ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 #endif /* __PORT_ASM_H__ */
diff --git a/portable/GCC/ARM_CM33/non_secure/portmacro.h b/portable/GCC/ARM_CM33/non_secure/portmacro.h
index 64fea84e2..851c22c8a 100644
--- a/portable/GCC/ARM_CM33/non_secure/portmacro.h
+++ b/portable/GCC/ARM_CM33/non_secure/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,18 +19,18 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*------------------------------------------------------------------------------
  * Port specific definitions.
@@ -42,109 +42,109 @@ extern "C" {
  *------------------------------------------------------------------------------
  */
 
-#ifndef configENABLE_FPU
-	#error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
-#endif /* configENABLE_FPU */
+    #ifndef configENABLE_FPU
+        #error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
+    #endif /* configENABLE_FPU */
 
-#ifndef configENABLE_MPU
-	#error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
-#endif /* configENABLE_MPU */
+    #ifndef configENABLE_MPU
+        #error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
+    #endif /* configENABLE_MPU */
 
-#ifndef configENABLE_TRUSTZONE
-	#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
-#endif /* configENABLE_TRUSTZONE */
+    #ifndef configENABLE_TRUSTZONE
+        #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
+    #endif /* configENABLE_TRUSTZONE */
 
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Type definitions.
  */
-#define portCHAR											char
-#define portFLOAT											float
-#define portDOUBLE											double
-#define portLONG											long
-#define portSHORT											short
-#define portSTACK_TYPE										uint32_t
-#define portBASE_TYPE										long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE										StackType_t;
-typedef long												BaseType_t;
-typedef unsigned long										UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	 * not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC							1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * Architecture specifics.
  */
-#define portARCH_NAME										"Cortex-M33"
-#define portSTACK_GROWTH									( -1 )
-#define portTICK_PERIOD_MS									( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT									8
-#define portNOP()
-#define portINLINE											__inline
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE								inline __attribute__(( always_inline ))
-#endif
-#define portHAS_STACK_OVERFLOW_CHECKING						1
-#define portDONT_DISCARD									__attribute__(( used ))
+    #define portARCH_NAME                      "Cortex-M33"
+    #define portSTACK_GROWTH                   ( -1 )
+    #define portTICK_PERIOD_MS                 ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT                 8
+    #define portNOP()
+    #define portINLINE                         __inline
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE               inline __attribute__( ( always_inline ) )
+    #endif
+    #define portHAS_STACK_OVERFLOW_CHECKING    1
+    #define portDONT_DISCARD                   __attribute__( ( used ) )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Extern declarations.
  */
-extern BaseType_t xPortIsInsideInterrupt( void );
+    extern BaseType_t xPortIsInsideInterrupt( void );
 
-extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
 
-extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
-extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
 
-extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
 
-#if( configENABLE_TRUSTZONE == 1 )
-	extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
-	extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
-#endif /* configENABLE_TRUSTZONE */
+    #if ( configENABLE_TRUSTZONE == 1 )
+        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
+        extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
+    #endif /* configENABLE_TRUSTZONE */
 
-#if( configENABLE_MPU == 1 )
-	extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
-	extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
+        extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief MPU specific constants.
  */
-#if( configENABLE_MPU == 1 )
-	#define portUSING_MPU_WRAPPERS							1
-	#define portPRIVILEGE_BIT								( 0x80000000UL )
-#else
-	#define portPRIVILEGE_BIT								( 0x0UL )
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        #define portUSING_MPU_WRAPPERS    1
+        #define portPRIVILEGE_BIT         ( 0x80000000UL )
+    #else
+        #define portPRIVILEGE_BIT         ( 0x0UL )
+    #endif /* configENABLE_MPU */
 
 
 /* MPU regions. */
-#define portPRIVILEGED_FLASH_REGION							( 0UL )
-#define portUNPRIVILEGED_FLASH_REGION						( 1UL )
-#define portUNPRIVILEGED_SYSCALLS_REGION					( 2UL )
-#define portPRIVILEGED_RAM_REGION							( 3UL )
-#define portSTACK_REGION									( 4UL )
-#define portFIRST_CONFIGURABLE_REGION						( 5UL )
-#define portLAST_CONFIGURABLE_REGION						( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS						( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS								( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
+    #define portPRIVILEGED_FLASH_REGION                   ( 0UL )
+    #define portUNPRIVILEGED_FLASH_REGION                 ( 1UL )
+    #define portUNPRIVILEGED_SYSCALLS_REGION              ( 2UL )
+    #define portPRIVILEGED_RAM_REGION                     ( 3UL )
+    #define portSTACK_REGION                              ( 4UL )
+    #define portFIRST_CONFIGURABLE_REGION                 ( 5UL )
+    #define portLAST_CONFIGURABLE_REGION                  ( 7UL )
+    #define portNUM_CONFIGURABLE_REGIONS                  ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
+    #define portTOTAL_NUM_REGIONS                         ( portNUM_CONFIGURABLE_REGIONS + 1 )   /* Plus one to make space for the stack region. */
 
 /* Device memory attributes used in MPU_MAIR registers.
  *
@@ -156,155 +156,157 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
  *				11 --> Device-GRE
  *  Bit[1:0] - 00, Reserved.
  */
-#define portMPU_DEVICE_MEMORY_nGnRnE						( 0x00 ) /* 0000 0000 */
-#define portMPU_DEVICE_MEMORY_nGnRE							( 0x04 ) /* 0000 0100 */
-#define portMPU_DEVICE_MEMORY_nGRE							( 0x08 ) /* 0000 1000 */
-#define portMPU_DEVICE_MEMORY_GRE							( 0x0C ) /* 0000 1100 */
+    #define portMPU_DEVICE_MEMORY_nGnRnE                  ( 0x00 )   /* 0000 0000 */
+    #define portMPU_DEVICE_MEMORY_nGnRE                   ( 0x04 )   /* 0000 0100 */
+    #define portMPU_DEVICE_MEMORY_nGRE                    ( 0x08 )   /* 0000 1000 */
+    #define portMPU_DEVICE_MEMORY_GRE                     ( 0x0C )   /* 0000 1100 */
 
 /* Normal memory attributes used in MPU_MAIR registers. */
-#define portMPU_NORMAL_MEMORY_NON_CACHEABLE					( 0x44 ) /* Non-cacheable. */
-#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE			( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
+    #define portMPU_NORMAL_MEMORY_NON_CACHEABLE           ( 0x44 )   /* Non-cacheable. */
+    #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE    ( 0xFF )   /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
 
 /* Attributes used in MPU_RBAR registers. */
-#define portMPU_REGION_NON_SHAREABLE						( 0UL << 3UL )
-#define portMPU_REGION_INNER_SHAREABLE						( 1UL << 3UL )
-#define portMPU_REGION_OUTER_SHAREABLE						( 2UL << 3UL )
+    #define portMPU_REGION_NON_SHAREABLE                  ( 0UL << 3UL )
+    #define portMPU_REGION_INNER_SHAREABLE                ( 1UL << 3UL )
+    #define portMPU_REGION_OUTER_SHAREABLE                ( 2UL << 3UL )
 
-#define portMPU_REGION_PRIVILEGED_READ_WRITE				( 0UL << 1UL )
-#define portMPU_REGION_READ_WRITE							( 1UL << 1UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY					( 2UL << 1UL )
-#define portMPU_REGION_READ_ONLY							( 3UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_WRITE          ( 0UL << 1UL )
+    #define portMPU_REGION_READ_WRITE                     ( 1UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_ONLY           ( 2UL << 1UL )
+    #define portMPU_REGION_READ_ONLY                      ( 3UL << 1UL )
 
-#define portMPU_REGION_EXECUTE_NEVER						( 1UL )
+    #define portMPU_REGION_EXECUTE_NEVER                  ( 1UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Settings to define an MPU region.
  */
-typedef struct MPURegionSettings
-{
-	uint32_t ulRBAR;	/**< RBAR for the region. */
-	uint32_t ulRLAR;	/**< RLAR for the region. */
-} MPURegionSettings_t;
+    typedef struct MPURegionSettings
+    {
+        uint32_t ulRBAR; /**< RBAR for the region. */
+        uint32_t ulRLAR; /**< RLAR for the region. */
+    } MPURegionSettings_t;
 
 /**
  * @brief MPU settings as stored in the TCB.
  */
-typedef struct MPU_SETTINGS
-{
-	uint32_t ulMAIR0;	/**< MAIR0 for the task containing attributes for all the 4 per task regions. */
-	MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
-} xMPU_SETTINGS;
+    typedef struct MPU_SETTINGS
+    {
+        uint32_t ulMAIR0;                                              /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
+        MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
+    } xMPU_SETTINGS;
 /*-----------------------------------------------------------*/
 
 /**
  * @brief SVC numbers.
  */
-#define portSVC_ALLOCATE_SECURE_CONTEXT						0
-#define portSVC_FREE_SECURE_CONTEXT							1
-#define portSVC_START_SCHEDULER								2
-#define portSVC_RAISE_PRIVILEGE								3
+    #define portSVC_ALLOCATE_SECURE_CONTEXT    0
+    #define portSVC_FREE_SECURE_CONTEXT        1
+    #define portSVC_START_SCHEDULER            2
+    #define portSVC_RAISE_PRIVILEGE            3
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Scheduler utilities.
  */
-#define portYIELD()											vPortYield()
-#define portNVIC_INT_CTRL_REG								( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT								( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired )			if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x )								portEND_SWITCHING_ISR( x )
+    #define portYIELD()                                 vPortYield()
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Critical section management.
  */
-#define portSET_INTERRUPT_MASK_FROM_ISR()					ulSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )				vClearInterruptMask( x )
-#define portDISABLE_INTERRUPTS()							ulSetInterruptMask()
-#define portENABLE_INTERRUPTS()								vClearInterruptMask( 0 )
-#define portENTER_CRITICAL()								vPortEnterCritical()
-#define portEXIT_CRITICAL()									vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulSetInterruptMask()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vClearInterruptMask( x )
+    #define portDISABLE_INTERRUPTS()                  ulSetInterruptMask()
+    #define portENABLE_INTERRUPTS()                   vClearInterruptMask( 0 )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Tickless idle/low power functionality.
  */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Task function macros as described on the FreeRTOS.org WEB site.
  */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters )		void vFunction( void *pvParameters )
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Allocate a secure context for the task.
-	 *
-	 * Tasks are not created with a secure context. Any task that is going to call
-	 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
-	 * secure context before it calls any secure function.
-	 *
-	 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
-	 */
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )	vPortAllocateSecureContext( ulSecureStackSize )
+    #if ( configENABLE_TRUSTZONE == 1 )
 
-	/**
-	 * @brief Called when a task is deleted to delete the task's secure context,
-	 * if it has one.
-	 *
-	 * @param[in] pxTCB The TCB of the task being deleted.
-	 */
-	#define portCLEAN_UP_TCB( pxTCB )							vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-#else
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-	#define portCLEAN_UP_TCB( pxTCB )
-#endif /* configENABLE_TRUSTZONE */
+/**
+ * @brief Allocate a secure context for the task.
+ *
+ * Tasks are not created with a secure context. Any task that is going to call
+ * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
+ * secure context before it calls any secure function.
+ *
+ * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
+ */
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )    vPortAllocateSecureContext( ulSecureStackSize )
+
+/**
+ * @brief Called when a task is deleted to delete the task's secure context,
+ * if it has one.
+ *
+ * @param[in] pxTCB The TCB of the task being deleted.
+ */
+        #define portCLEAN_UP_TCB( pxTCB )                           vPortFreeSecureContext( ( uint32_t * ) pxTCB )
+    #else
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
+        #define portCLEAN_UP_TCB( pxTCB )
+    #endif /* configENABLE_TRUSTZONE */
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Checks whether or not the processor is privileged.
-	 *
-	 * @return 1 if the processor is already privileged, 0 otherwise.
-	 */
-	#define portIS_PRIVILEGED()									xIsPrivileged()
+    #if ( configENABLE_MPU == 1 )
 
-	/**
-	 * @brief Raise an SVC request to raise privilege.
-	 *
-	 * The SVC handler checks that the SVC was raised from a system call and only
-	 * then it raises the privilege. If this is called from any other place,
-	 * the privilege is not raised.
-	 */
-	#define portRAISE_PRIVILEGE()								__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+/**
+ * @brief Checks whether or not the processor is privileged.
+ *
+ * @return 1 if the processor is already privileged, 0 otherwise.
+ */
+        #define portIS_PRIVILEGED()      xIsPrivileged()
 
-	/**
-	 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
-	 * register.
-	 */
-	#define portRESET_PRIVILEGE()								vResetPrivilege()
-#else
-	#define portIS_PRIVILEGED()
-	#define portRAISE_PRIVILEGE()
-	#define portRESET_PRIVILEGE()
-#endif /* configENABLE_MPU */
+/**
+ * @brief Raise an SVC request to raise privilege.
+ *
+ * The SVC handler checks that the SVC was raised from a system call and only
+ * then it raises the privilege. If this is called from any other place,
+ * the privilege is not raised.
+ */
+        #define portRAISE_PRIVILEGE()    __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+
+/**
+ * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
+ * register.
+ */
+        #define portRESET_PRIVILEGE()    vResetPrivilege()
+    #else
+        #define portIS_PRIVILEGED()
+        #define portRAISE_PRIVILEGE()
+        #define portRESET_PRIVILEGE()
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Barriers.
  */
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
+    #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
 /*-----------------------------------------------------------*/
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
diff --git a/portable/GCC/ARM_CM33/secure/secure_context.c b/portable/GCC/ARM_CM33/secure/secure_context.c
index 39fabbf60..59c09ed58 100644
--- a/portable/GCC/ARM_CM33/secure/secure_context.c
+++ b/portable/GCC/ARM_CM33/secure/secure_context.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -40,7 +40,7 @@
  * Bit[0] - 0 --> Thread mode is privileged.
  * Bit[1] - 1 --> Thread mode uses PSP.
  */
-#define securecontextCONTROL_VALUE_PRIVILEGED		0x02
+#define securecontextCONTROL_VALUE_PRIVILEGED      0x02
 
 /**
  * @brief CONTROL value for un-privileged tasks.
@@ -48,7 +48,7 @@
  * Bit[0] - 1 --> Thread mode is un-privileged.
  * Bit[1] - 1 --> Thread mode uses PSP.
  */
-#define securecontextCONTROL_VALUE_UNPRIVILEGED		0x03
+#define securecontextCONTROL_VALUE_UNPRIVILEGED    0x03
 /*-----------------------------------------------------------*/
 
 /**
@@ -59,146 +59,148 @@
  */
 typedef struct SecureContext
 {
-	uint8_t *pucCurrentStackPointer;	/**< Current value of stack pointer (PSP). */
-	uint8_t *pucStackLimit;				/**< Last location of the stack memory (PSPLIM). */
-	uint8_t *pucStackStart;				/**< First location of the stack memory. */
+    uint8_t * pucCurrentStackPointer; /**< Current value of stack pointer (PSP). */
+    uint8_t * pucStackLimit;          /**< Last location of the stack memory (PSPLIM). */
+    uint8_t * pucStackStart;          /**< First location of the stack memory. */
 } SecureContext_t;
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureContext_Init( void )
 {
-	uint32_t ulIPSR;
+    uint32_t ulIPSR;
 
-	/* Read the Interrupt Program Status Register (IPSR) value. */
-	secureportREAD_IPSR( ulIPSR );
+    /* Read the Interrupt Program Status Register (IPSR) value. */
+    secureportREAD_IPSR( ulIPSR );
 
-	/* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-	 * when the processor is running in the Thread Mode. */
-	if( ulIPSR != 0 )
-	{
-		/* No stack for thread mode until a task's context is loaded. */
-		secureportSET_PSPLIM( securecontextNO_STACK );
-		secureportSET_PSP( securecontextNO_STACK );
+    /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
+     * when the processor is running in the Thread Mode. */
+    if( ulIPSR != 0 )
+    {
+        /* No stack for thread mode until a task's context is loaded. */
+        secureportSET_PSPLIM( securecontextNO_STACK );
+        secureportSET_PSP( securecontextNO_STACK );
 
-		#if( configENABLE_MPU == 1 )
-		{
-			/* Configure thread mode to use PSP and to be unprivileged. */
-			secureportSET_CONTROL( securecontextCONTROL_VALUE_UNPRIVILEGED );
-		}
-		#else /* configENABLE_MPU */
-		{
-			/* Configure thread mode to use PSP and to be privileged.. */
-			secureportSET_CONTROL( securecontextCONTROL_VALUE_PRIVILEGED );
-		}
-		#endif /* configENABLE_MPU */
-	}
+        #if ( configENABLE_MPU == 1 )
+            {
+                /* Configure thread mode to use PSP and to be unprivileged. */
+                secureportSET_CONTROL( securecontextCONTROL_VALUE_UNPRIVILEGED );
+            }
+        #else /* configENABLE_MPU */
+            {
+                /* Configure thread mode to use PSP and to be privileged.. */
+                secureportSET_CONTROL( securecontextCONTROL_VALUE_PRIVILEGED );
+            }
+        #endif /* configENABLE_MPU */
+    }
 }
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, uint32_t ulIsTaskPrivileged )
+#if ( configENABLE_MPU == 1 )
+    secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize,
+                                                                                       uint32_t ulIsTaskPrivileged )
 #else /* configENABLE_MPU */
-	secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize )
+    secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize )
 #endif /* configENABLE_MPU */
 {
-	uint8_t *pucStackMemory = NULL;
-	uint32_t ulIPSR;
-	SecureContextHandle_t xSecureContextHandle = NULL;
-	#if( configENABLE_MPU == 1 )
-		uint32_t *pulCurrentStackPointer = NULL;
-	#endif /* configENABLE_MPU */
+    uint8_t * pucStackMemory = NULL;
+    uint32_t ulIPSR;
+    SecureContextHandle_t xSecureContextHandle = NULL;
 
-	/* Read the Interrupt Program Status Register (IPSR) value. */
-	secureportREAD_IPSR( ulIPSR );
+    #if ( configENABLE_MPU == 1 )
+        uint32_t * pulCurrentStackPointer = NULL;
+    #endif /* configENABLE_MPU */
 
-	/* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-	 * when the processor is running in the Thread Mode. */
-	if( ulIPSR != 0 )
-	{
-		/* Allocate the context structure. */
-		xSecureContextHandle = ( SecureContextHandle_t ) pvPortMalloc( sizeof( SecureContext_t ) );
+    /* Read the Interrupt Program Status Register (IPSR) value. */
+    secureportREAD_IPSR( ulIPSR );
 
-		if( xSecureContextHandle != NULL )
-		{
-			/* Allocate the stack space. */
-			pucStackMemory = pvPortMalloc( ulSecureStackSize );
+    /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
+     * when the processor is running in the Thread Mode. */
+    if( ulIPSR != 0 )
+    {
+        /* Allocate the context structure. */
+        xSecureContextHandle = ( SecureContextHandle_t ) pvPortMalloc( sizeof( SecureContext_t ) );
 
-			if( pucStackMemory != NULL )
-			{
-				/* Since stack grows down, the starting point will be the last
-				 * location. Note that this location is next to the last
-				 * allocated byte because the hardware decrements the stack
-				 * pointer before writing i.e. if stack pointer is 0x2, a push
-				 * operation will decrement the stack pointer to 0x1 and then
-				 * write at 0x1. */
-				xSecureContextHandle->pucStackStart = pucStackMemory + ulSecureStackSize;
+        if( xSecureContextHandle != NULL )
+        {
+            /* Allocate the stack space. */
+            pucStackMemory = pvPortMalloc( ulSecureStackSize );
 
-				/* The stack cannot go beyond this location. This value is
-				 * programmed in the PSPLIM register on context switch.*/
-				xSecureContextHandle->pucStackLimit = pucStackMemory;
+            if( pucStackMemory != NULL )
+            {
+                /* Since stack grows down, the starting point will be the last
+                 * location. Note that this location is next to the last
+                 * allocated byte because the hardware decrements the stack
+                 * pointer before writing i.e. if stack pointer is 0x2, a push
+                 * operation will decrement the stack pointer to 0x1 and then
+                 * write at 0x1. */
+                xSecureContextHandle->pucStackStart = pucStackMemory + ulSecureStackSize;
 
-				#if( configENABLE_MPU == 1 )
-				{
-					/* Store the correct CONTROL value for the task on the stack.
-					 * This value is programmed in the CONTROL register on
-					 * context switch. */
-					pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart;
-					pulCurrentStackPointer--;
-					if( ulIsTaskPrivileged )
-					{
-						*( pulCurrentStackPointer ) = securecontextCONTROL_VALUE_PRIVILEGED;
-					}
-					else
-					{
-						*( pulCurrentStackPointer ) = securecontextCONTROL_VALUE_UNPRIVILEGED;
-					}
+                /* The stack cannot go beyond this location. This value is
+                 * programmed in the PSPLIM register on context switch.*/
+                xSecureContextHandle->pucStackLimit = pucStackMemory;
 
-					/* Store the current stack pointer. This value is programmed in
-					 * the PSP register on context switch. */
-					xSecureContextHandle->pucCurrentStackPointer = ( uint8_t * ) pulCurrentStackPointer;
-				}
-				#else /* configENABLE_MPU */
-				{
-					/* Current SP is set to the starting of the stack. This
-					 * value programmed in the PSP register on context switch. */
-					xSecureContextHandle->pucCurrentStackPointer = xSecureContextHandle->pucStackStart;
+                #if ( configENABLE_MPU == 1 )
+                    {
+                        /* Store the correct CONTROL value for the task on the stack.
+                         * This value is programmed in the CONTROL register on
+                         * context switch. */
+                        pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart;
+                        pulCurrentStackPointer--;
 
-				}
-				#endif /* configENABLE_MPU */
-			}
-			else
-			{
-				/* Free the context to avoid memory leak and make sure to return
-				 * NULL to indicate failure. */
-				vPortFree( xSecureContextHandle );
-				xSecureContextHandle = NULL;
-			}
-		}
-	}
+                        if( ulIsTaskPrivileged )
+                        {
+                            *( pulCurrentStackPointer ) = securecontextCONTROL_VALUE_PRIVILEGED;
+                        }
+                        else
+                        {
+                            *( pulCurrentStackPointer ) = securecontextCONTROL_VALUE_UNPRIVILEGED;
+                        }
 
-	return xSecureContextHandle;
+                        /* Store the current stack pointer. This value is programmed in
+                         * the PSP register on context switch. */
+                        xSecureContextHandle->pucCurrentStackPointer = ( uint8_t * ) pulCurrentStackPointer;
+                    }
+                #else /* configENABLE_MPU */
+                    {
+                        /* Current SP is set to the starting of the stack. This
+                         * value programmed in the PSP register on context switch. */
+                        xSecureContextHandle->pucCurrentStackPointer = xSecureContextHandle->pucStackStart;
+                    }
+                #endif /* configENABLE_MPU */
+            }
+            else
+            {
+                /* Free the context to avoid memory leak and make sure to return
+                 * NULL to indicate failure. */
+                vPortFree( xSecureContextHandle );
+                xSecureContextHandle = NULL;
+            }
+        }
+    }
+
+    return xSecureContextHandle;
 }
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle )
 {
-	uint32_t ulIPSR;
+    uint32_t ulIPSR;
 
-	/* Read the Interrupt Program Status Register (IPSR) value. */
-	secureportREAD_IPSR( ulIPSR );
+    /* Read the Interrupt Program Status Register (IPSR) value. */
+    secureportREAD_IPSR( ulIPSR );
 
-	/* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-	 * when the processor is running in the Thread Mode. */
-	if( ulIPSR != 0 )
-	{
-		/* Ensure that valid parameters are passed. */
-		secureportASSERT( xSecureContextHandle != NULL );
+    /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
+     * when the processor is running in the Thread Mode. */
+    if( ulIPSR != 0 )
+    {
+        /* Ensure that valid parameters are passed. */
+        secureportASSERT( xSecureContextHandle != NULL );
 
-		/* Free the stack space. */
-		vPortFree( xSecureContextHandle->pucStackLimit );
+        /* Free the stack space. */
+        vPortFree( xSecureContextHandle->pucStackLimit );
 
-		/* Free the context itself. */
-		vPortFree( xSecureContextHandle );
-	}
+        /* Free the context itself. */
+        vPortFree( xSecureContextHandle );
+    }
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/GCC/ARM_CM33/secure/secure_context.h b/portable/GCC/ARM_CM33/secure/secure_context.h
index 747c2c6fd..681ac6916 100644
--- a/portable/GCC/ARM_CM33/secure/secure_context.h
+++ b/portable/GCC/ARM_CM33/secure/secure_context.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -37,13 +37,13 @@
 /**
  * @brief PSP value when no task's context is loaded.
  */
-#define securecontextNO_STACK	0x0
+#define securecontextNO_STACK    0x0
 
 /**
  * @brief Opaque handle.
  */
 struct SecureContext;
-typedef struct SecureContext*	SecureContextHandle_t;
+typedef struct SecureContext * SecureContextHandle_t;
 /*-----------------------------------------------------------*/
 
 /**
@@ -69,10 +69,11 @@ void SecureContext_Init( void );
  * @return Opaque context handle if context is successfully allocated, NULL
  * otherwise.
  */
-#if( configENABLE_MPU == 1 )
-	SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, uint32_t ulIsTaskPrivileged );
+#if ( configENABLE_MPU == 1 )
+    SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize,
+                                                         uint32_t ulIsTaskPrivileged );
 #else /* configENABLE_MPU */
-	SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize );
+    SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize );
 #endif /* configENABLE_MPU */
 
 /**
diff --git a/portable/GCC/ARM_CM33/secure/secure_context_port.c b/portable/GCC/ARM_CM33/secure/secure_context_port.c
index 6b4bc50c7..d4d831e65 100644
--- a/portable/GCC/ARM_CM33/secure/secure_context_port.c
+++ b/portable/GCC/ARM_CM33/secure/secure_context_port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -33,56 +33,56 @@
 
 secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle )
 {
-	/* xSecureContextHandle value is in r0. */
-	__asm volatile
-	(
-	"	.syntax unified							\n"
-	"											\n"
-	"	mrs r1, ipsr							\n" /* r1 = IPSR. */
-	"	cbz r1, load_ctx_therad_mode			\n" /* Do nothing if the processor is running in the Thread Mode. */
-	"	ldmia r0!, {r1, r2}						\n" /* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */
-	#if( configENABLE_MPU == 1 )
-	"	ldmia r1!, {r3}							\n" /* Read CONTROL register value from task's stack. r3 = CONTROL. */
-	"	msr control, r3							\n" /* CONTROL = r3. */
-	#endif /* configENABLE_MPU */
-	"	msr psplim, r2							\n" /* PSPLIM = r2. */
-	"	msr psp, r1								\n" /* PSP = r1. */
-	"											\n"
-	" load_ctx_therad_mode:						\n"
-	"	nop										\n"
-	"											\n"
-	:::"r0", "r1", "r2"
-	);
+    /* xSecureContextHandle value is in r0. */
+    __asm volatile
+    (
+        "	.syntax unified							\n"
+        "											\n"
+        "	mrs r1, ipsr							\n"/* r1 = IPSR. */
+        "	cbz r1, load_ctx_therad_mode			\n"/* Do nothing if the processor is running in the Thread Mode. */
+        "	ldmia r0!, {r1, r2}						\n"/* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */
+        #if ( configENABLE_MPU == 1 )
+            "	ldmia r1!, {r3}							\n"/* Read CONTROL register value from task's stack. r3 = CONTROL. */
+            "	msr control, r3							\n"/* CONTROL = r3. */
+        #endif /* configENABLE_MPU */
+        "	msr psplim, r2							\n"/* PSPLIM = r2. */
+        "	msr psp, r1								\n"/* PSP = r1. */
+        "											\n"
+        " load_ctx_therad_mode:						\n"
+        "	nop										\n"
+        "											\n"
+        ::: "r0", "r1", "r2"
+    );
 }
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle )
 {
-	/* xSecureContextHandle value is in r0. */
-	__asm volatile
-	(
-	"	.syntax unified							\n"
-	"											\n"
-	"	mrs r1, ipsr							\n" /* r1 = IPSR. */
-	"	cbz r1, save_ctx_therad_mode			\n" /* Do nothing if the processor is running in the Thread Mode. */
-	"	mrs r1, psp								\n" /* r1 = PSP. */
-	#if( configENABLE_FPU == 1 )
-	"	vstmdb r1!, {s0}						\n" /* Trigger the defferred stacking of FPU registers. */
-	"	vldmia r1!, {s0}						\n" /* Nullify the effect of the pervious statement. */
-	#endif /* configENABLE_FPU */
-	#if( configENABLE_MPU == 1 )
-	"	mrs r2, control							\n" /* r2 = CONTROL. */
-	"	stmdb r1!, {r2}							\n" /* Store CONTROL value on the stack. */
-	#endif /* configENABLE_MPU */
-	"	str r1, [r0]							\n" /* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
-	"	movs r1, %0								\n" /* r1 = securecontextNO_STACK. */
-	"	msr psplim, r1							\n" /* PSPLIM = securecontextNO_STACK. */
-	"	msr psp, r1								\n" /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
-	"											\n"
-	" save_ctx_therad_mode:						\n"
-	"	nop										\n"
-	"											\n"
-	:: "i" ( securecontextNO_STACK ) : "r1", "memory"
-	);
+    /* xSecureContextHandle value is in r0. */
+    __asm volatile
+    (
+        "	.syntax unified							\n"
+        "											\n"
+        "	mrs r1, ipsr							\n"/* r1 = IPSR. */
+        "	cbz r1, save_ctx_therad_mode			\n"/* Do nothing if the processor is running in the Thread Mode. */
+        "	mrs r1, psp								\n"/* r1 = PSP. */
+        #if ( configENABLE_FPU == 1 )
+            "	vstmdb r1!, {s0}						\n"/* Trigger the defferred stacking of FPU registers. */
+            "	vldmia r1!, {s0}						\n"/* Nullify the effect of the pervious statement. */
+        #endif /* configENABLE_FPU */
+        #if ( configENABLE_MPU == 1 )
+            "	mrs r2, control							\n"/* r2 = CONTROL. */
+            "	stmdb r1!, {r2}							\n"/* Store CONTROL value on the stack. */
+        #endif /* configENABLE_MPU */
+        "	str r1, [r0]							\n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
+        "	movs r1, %0								\n"/* r1 = securecontextNO_STACK. */
+        "	msr psplim, r1							\n"/* PSPLIM = securecontextNO_STACK. */
+        "	msr psp, r1								\n"/* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
+        "											\n"
+        " save_ctx_therad_mode:						\n"
+        "	nop										\n"
+        "											\n"
+        ::"i" ( securecontextNO_STACK ) : "r1", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/GCC/ARM_CM33/secure/secure_heap.c b/portable/GCC/ARM_CM33/secure/secure_heap.c
index 7995a7f12..7c3227b18 100644
--- a/portable/GCC/ARM_CM33/secure/secure_heap.c
+++ b/portable/GCC/ARM_CM33/secure/secure_heap.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -37,37 +37,38 @@
 /**
  * @brief Total heap size.
  */
-#define secureconfigTOTAL_HEAP_SIZE		( ( ( size_t ) ( 10 * 1024 ) ) )
+#define secureconfigTOTAL_HEAP_SIZE    ( ( ( size_t ) ( 10 * 1024 ) ) )
 
 /* No test marker by default. */
 #ifndef mtCOVERAGE_TEST_MARKER
-	#define mtCOVERAGE_TEST_MARKER()
+    #define mtCOVERAGE_TEST_MARKER()
 #endif
 
 /* No tracing by default. */
 #ifndef traceMALLOC
-	#define traceMALLOC( pvReturn, xWantedSize )
+    #define traceMALLOC( pvReturn, xWantedSize )
 #endif
 
 /* No tracing by default. */
 #ifndef traceFREE
-	#define traceFREE( pv, xBlockSize )
+    #define traceFREE( pv, xBlockSize )
 #endif
 
 /* Block sizes must not get too small. */
-#define secureheapMINIMUM_BLOCK_SIZE	( ( size_t ) ( xHeapStructSize << 1 ) )
+#define secureheapMINIMUM_BLOCK_SIZE    ( ( size_t ) ( xHeapStructSize << 1 ) )
 
 /* Assumes 8bit bytes! */
-#define secureheapBITS_PER_BYTE			( ( size_t ) 8 )
+#define secureheapBITS_PER_BYTE         ( ( size_t ) 8 )
 /*-----------------------------------------------------------*/
 
 /* Allocate the memory for the heap. */
-#if( configAPPLICATION_ALLOCATED_HEAP == 1 )
-	/* The application writer has already defined the array used for the RTOS
-	 * heap - probably so it can be placed in a special segment or address. */
-	extern uint8_t ucHeap[ secureconfigTOTAL_HEAP_SIZE ];
+#if ( configAPPLICATION_ALLOCATED_HEAP == 1 )
+
+/* The application writer has already defined the array used for the RTOS
+* heap - probably so it can be placed in a special segment or address. */
+    extern uint8_t ucHeap[ secureconfigTOTAL_HEAP_SIZE ];
 #else /* configAPPLICATION_ALLOCATED_HEAP */
-	static uint8_t ucHeap[ secureconfigTOTAL_HEAP_SIZE ];
+    static uint8_t ucHeap[ secureconfigTOTAL_HEAP_SIZE ];
 #endif /* configAPPLICATION_ALLOCATED_HEAP */
 
 /**
@@ -77,8 +78,8 @@
  */
 typedef struct A_BLOCK_LINK
 {
-	struct A_BLOCK_LINK *pxNextFreeBlock;	/**< The next free block in the list. */
-	size_t xBlockSize;						/**< The size of the free block. */
+    struct A_BLOCK_LINK * pxNextFreeBlock; /**< The next free block in the list. */
+    size_t xBlockSize;                     /**< The size of the free block. */
 } BlockLink_t;
 /*-----------------------------------------------------------*/
 
@@ -97,7 +98,7 @@ static void prvHeapInit( void );
  *
  * @param[in] pxBlockToInsert The block being freed.
  */
-static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert );
+static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert );
 /*-----------------------------------------------------------*/
 
 /**
@@ -109,7 +110,7 @@ static const size_t xHeapStructSize = ( sizeof( BlockLink_t ) + ( ( size_t ) ( s
 /**
  * @brief Create a couple of list links to mark the start and end of the list.
  */
-static BlockLink_t xStart, *pxEnd = NULL;
+static BlockLink_t xStart, * pxEnd = NULL;
 
 /**
  * @brief Keeps track of the number of free bytes remaining, but says nothing
@@ -130,321 +131,324 @@ static size_t xBlockAllocatedBit = 0;
 
 static void prvHeapInit( void )
 {
-BlockLink_t *pxFirstFreeBlock;
-uint8_t *pucAlignedHeap;
-size_t uxAddress;
-size_t xTotalHeapSize = secureconfigTOTAL_HEAP_SIZE;
+    BlockLink_t * pxFirstFreeBlock;
+    uint8_t * pucAlignedHeap;
+    size_t uxAddress;
+    size_t xTotalHeapSize = secureconfigTOTAL_HEAP_SIZE;
 
-	/* Ensure the heap starts on a correctly aligned boundary. */
-	uxAddress = ( size_t ) ucHeap;
+    /* Ensure the heap starts on a correctly aligned boundary. */
+    uxAddress = ( size_t ) ucHeap;
 
-	if( ( uxAddress & secureportBYTE_ALIGNMENT_MASK ) != 0 )
-	{
-		uxAddress += ( secureportBYTE_ALIGNMENT - 1 );
-		uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK );
-		xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
-	}
+    if( ( uxAddress & secureportBYTE_ALIGNMENT_MASK ) != 0 )
+    {
+        uxAddress += ( secureportBYTE_ALIGNMENT - 1 );
+        uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK );
+        xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
+    }
 
-	pucAlignedHeap = ( uint8_t * ) uxAddress;
+    pucAlignedHeap = ( uint8_t * ) uxAddress;
 
-	/* xStart is used to hold a pointer to the first item in the list of free
-	 * blocks.  The void cast is used to prevent compiler warnings. */
-	xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
-	xStart.xBlockSize = ( size_t ) 0;
+    /* xStart is used to hold a pointer to the first item in the list of free
+     * blocks.  The void cast is used to prevent compiler warnings. */
+    xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
+    xStart.xBlockSize = ( size_t ) 0;
 
-	/* pxEnd is used to mark the end of the list of free blocks and is inserted
-	 * at the end of the heap space. */
-	uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
-	uxAddress -= xHeapStructSize;
-	uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK );
-	pxEnd = ( void * ) uxAddress;
-	pxEnd->xBlockSize = 0;
-	pxEnd->pxNextFreeBlock = NULL;
+    /* pxEnd is used to mark the end of the list of free blocks and is inserted
+     * at the end of the heap space. */
+    uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
+    uxAddress -= xHeapStructSize;
+    uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK );
+    pxEnd = ( void * ) uxAddress;
+    pxEnd->xBlockSize = 0;
+    pxEnd->pxNextFreeBlock = NULL;
 
-	/* To start with there is a single free block that is sized to take up the
-	 * entire heap space, minus the space taken by pxEnd. */
-	pxFirstFreeBlock = ( void * ) pucAlignedHeap;
-	pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
-	pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
+    /* To start with there is a single free block that is sized to take up the
+     * entire heap space, minus the space taken by pxEnd. */
+    pxFirstFreeBlock = ( void * ) pucAlignedHeap;
+    pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
+    pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
 
-	/* Only one block exists - and it covers the entire usable heap space. */
-	xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
-	xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
+    /* Only one block exists - and it covers the entire usable heap space. */
+    xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
+    xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
 
-	/* Work out the position of the top bit in a size_t variable. */
-	xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * secureheapBITS_PER_BYTE ) - 1 );
+    /* Work out the position of the top bit in a size_t variable. */
+    xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * secureheapBITS_PER_BYTE ) - 1 );
 }
 /*-----------------------------------------------------------*/
 
-static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert )
+static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert )
 {
-BlockLink_t *pxIterator;
-uint8_t *puc;
+    BlockLink_t * pxIterator;
+    uint8_t * puc;
 
-	/* Iterate through the list until a block is found that has a higher address
-	 * than the block being inserted. */
-	for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
-	{
-		/* Nothing to do here, just iterate to the right position. */
-	}
+    /* Iterate through the list until a block is found that has a higher address
+     * than the block being inserted. */
+    for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
+    {
+        /* Nothing to do here, just iterate to the right position. */
+    }
 
-	/* Do the block being inserted, and the block it is being inserted after
-	 * make a contiguous block of memory? */
-	puc = ( uint8_t * ) pxIterator;
-	if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
-	{
-		pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
-		pxBlockToInsert = pxIterator;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    /* Do the block being inserted, and the block it is being inserted after
+     * make a contiguous block of memory? */
+    puc = ( uint8_t * ) pxIterator;
 
-	/* Do the block being inserted, and the block it is being inserted before
-	 * make a contiguous block of memory? */
-	puc = ( uint8_t * ) pxBlockToInsert;
-	if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
-	{
-		if( pxIterator->pxNextFreeBlock != pxEnd )
-		{
-			/* Form one big block from the two blocks. */
-			pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
-			pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
-		}
-		else
-		{
-			pxBlockToInsert->pxNextFreeBlock = pxEnd;
-		}
-	}
-	else
-	{
-		pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
-	}
+    if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
+    {
+        pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
+        pxBlockToInsert = pxIterator;
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	/* If the block being inserted plugged a gab, so was merged with the block
-	 * before and the block after, then it's pxNextFreeBlock pointer will have
-	 * already been set, and should not be set here as that would make it point
-	 * to itself. */
-	if( pxIterator != pxBlockToInsert )
-	{
-		pxIterator->pxNextFreeBlock = pxBlockToInsert;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    /* Do the block being inserted, and the block it is being inserted before
+     * make a contiguous block of memory? */
+    puc = ( uint8_t * ) pxBlockToInsert;
+
+    if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
+    {
+        if( pxIterator->pxNextFreeBlock != pxEnd )
+        {
+            /* Form one big block from the two blocks. */
+            pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
+            pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
+        }
+        else
+        {
+            pxBlockToInsert->pxNextFreeBlock = pxEnd;
+        }
+    }
+    else
+    {
+        pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
+    }
+
+    /* If the block being inserted plugged a gab, so was merged with the block
+     * before and the block after, then it's pxNextFreeBlock pointer will have
+     * already been set, and should not be set here as that would make it point
+     * to itself. */
+    if( pxIterator != pxBlockToInsert )
+    {
+        pxIterator->pxNextFreeBlock = pxBlockToInsert;
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 }
 /*-----------------------------------------------------------*/
 
-void *pvPortMalloc( size_t xWantedSize )
+void * pvPortMalloc( size_t xWantedSize )
 {
-BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
-void *pvReturn = NULL;
+    BlockLink_t * pxBlock, * pxPreviousBlock, * pxNewBlockLink;
+    void * pvReturn = NULL;
 
-	/* If this is the first call to malloc then the heap will require
-	 * initialisation to setup the list of free blocks. */
-	if( pxEnd == NULL )
-	{
-		prvHeapInit();
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    /* If this is the first call to malloc then the heap will require
+     * initialisation to setup the list of free blocks. */
+    if( pxEnd == NULL )
+    {
+        prvHeapInit();
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	/* Check the requested block size is not so large that the top bit is set.
-	 * The top bit of the block size member of the BlockLink_t structure is used
-	 * to determine who owns the block - the application or the kernel, so it
-	 * must be free. */
-	if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
-	{
-		/* The wanted size is increased so it can contain a BlockLink_t
-		 * structure in addition to the requested amount of bytes. */
-		if( xWantedSize > 0 )
-		{
-			xWantedSize += xHeapStructSize;
+    /* Check the requested block size is not so large that the top bit is set.
+     * The top bit of the block size member of the BlockLink_t structure is used
+     * to determine who owns the block - the application or the kernel, so it
+     * must be free. */
+    if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
+    {
+        /* The wanted size is increased so it can contain a BlockLink_t
+         * structure in addition to the requested amount of bytes. */
+        if( xWantedSize > 0 )
+        {
+            xWantedSize += xHeapStructSize;
 
-			/* Ensure that blocks are always aligned to the required number of
-			 * bytes. */
-			if( ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) != 0x00 )
-			{
-				/* Byte alignment required. */
-				xWantedSize += ( secureportBYTE_ALIGNMENT - ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) );
-				secureportASSERT( ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) == 0 );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
+            /* Ensure that blocks are always aligned to the required number of
+             * bytes. */
+            if( ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) != 0x00 )
+            {
+                /* Byte alignment required. */
+                xWantedSize += ( secureportBYTE_ALIGNMENT - ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) );
+                secureportASSERT( ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) == 0 );
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
 
-		if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
-		{
-			/* Traverse the list from the start (lowest address) block until
-			 * one of adequate size is found. */
-			pxPreviousBlock = &xStart;
-			pxBlock = xStart.pxNextFreeBlock;
-			while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
-			{
-				pxPreviousBlock = pxBlock;
-				pxBlock = pxBlock->pxNextFreeBlock;
-			}
+        if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
+        {
+            /* Traverse the list from the start (lowest address) block until
+             * one of adequate size is found. */
+            pxPreviousBlock = &xStart;
+            pxBlock = xStart.pxNextFreeBlock;
 
-			/* If the end marker was reached then a block of adequate size was
-			 * not found. */
-			if( pxBlock != pxEnd )
-			{
-				/* Return the memory space pointed to - jumping over the
-				 * BlockLink_t structure at its start. */
-				pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
+            while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
+            {
+                pxPreviousBlock = pxBlock;
+                pxBlock = pxBlock->pxNextFreeBlock;
+            }
 
-				/* This block is being returned for use so must be taken out
-				 * of the list of free blocks. */
-				pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
+            /* If the end marker was reached then a block of adequate size was
+             * not found. */
+            if( pxBlock != pxEnd )
+            {
+                /* Return the memory space pointed to - jumping over the
+                 * BlockLink_t structure at its start. */
+                pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
 
-				/* If the block is larger than required it can be split into
-				 * two. */
-				if( ( pxBlock->xBlockSize - xWantedSize ) > secureheapMINIMUM_BLOCK_SIZE )
-				{
-					/* This block is to be split into two.  Create a new
-					 * block following the number of bytes requested. The void
-					 * cast is used to prevent byte alignment warnings from the
-					 * compiler. */
-					pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
-					secureportASSERT( ( ( ( size_t ) pxNewBlockLink ) & secureportBYTE_ALIGNMENT_MASK ) == 0 );
+                /* This block is being returned for use so must be taken out
+                 * of the list of free blocks. */
+                pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
 
-					/* Calculate the sizes of two blocks split from the single
-					 * block. */
-					pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
-					pxBlock->xBlockSize = xWantedSize;
+                /* If the block is larger than required it can be split into
+                 * two. */
+                if( ( pxBlock->xBlockSize - xWantedSize ) > secureheapMINIMUM_BLOCK_SIZE )
+                {
+                    /* This block is to be split into two.  Create a new
+                     * block following the number of bytes requested. The void
+                     * cast is used to prevent byte alignment warnings from the
+                     * compiler. */
+                    pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
+                    secureportASSERT( ( ( ( size_t ) pxNewBlockLink ) & secureportBYTE_ALIGNMENT_MASK ) == 0 );
 
-					/* Insert the new block into the list of free blocks. */
-					prvInsertBlockIntoFreeList( pxNewBlockLink );
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
+                    /* Calculate the sizes of two blocks split from the single
+                     * block. */
+                    pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
+                    pxBlock->xBlockSize = xWantedSize;
 
-				xFreeBytesRemaining -= pxBlock->xBlockSize;
+                    /* Insert the new block into the list of free blocks. */
+                    prvInsertBlockIntoFreeList( pxNewBlockLink );
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
 
-				if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
-				{
-					xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
+                xFreeBytesRemaining -= pxBlock->xBlockSize;
 
-				/* The block is being returned - it is allocated and owned by
-				 * the application and has no "next" block. */
-				pxBlock->xBlockSize |= xBlockAllocatedBit;
-				pxBlock->pxNextFreeBlock = NULL;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+                if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
+                {
+                    xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
 
-	traceMALLOC( pvReturn, xWantedSize );
+                /* The block is being returned - it is allocated and owned by
+                 * the application and has no "next" block. */
+                pxBlock->xBlockSize |= xBlockAllocatedBit;
+                pxBlock->pxNextFreeBlock = NULL;
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	#if( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
-	{
-		if( pvReturn == NULL )
-		{
-			extern void vApplicationMallocFailedHook( void );
-			vApplicationMallocFailedHook();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	#endif
+    traceMALLOC( pvReturn, xWantedSize );
 
-	secureportASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) secureportBYTE_ALIGNMENT_MASK ) == 0 );
-	return pvReturn;
+    #if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
+        {
+            if( pvReturn == NULL )
+            {
+                extern void vApplicationMallocFailedHook( void );
+                vApplicationMallocFailedHook();
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+    #endif /* if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 ) */
+
+    secureportASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) secureportBYTE_ALIGNMENT_MASK ) == 0 );
+    return pvReturn;
 }
 /*-----------------------------------------------------------*/
 
-void vPortFree( void *pv )
+void vPortFree( void * pv )
 {
-uint8_t *puc = ( uint8_t * ) pv;
-BlockLink_t *pxLink;
+    uint8_t * puc = ( uint8_t * ) pv;
+    BlockLink_t * pxLink;
 
-	if( pv != NULL )
-	{
-		/* The memory being freed will have an BlockLink_t structure immediately
-		 * before it. */
-		puc -= xHeapStructSize;
+    if( pv != NULL )
+    {
+        /* The memory being freed will have an BlockLink_t structure immediately
+         * before it. */
+        puc -= xHeapStructSize;
 
-		/* This casting is to keep the compiler from issuing warnings. */
-		pxLink = ( void * ) puc;
+        /* This casting is to keep the compiler from issuing warnings. */
+        pxLink = ( void * ) puc;
 
-		/* Check the block is actually allocated. */
-		secureportASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
-		secureportASSERT( pxLink->pxNextFreeBlock == NULL );
+        /* Check the block is actually allocated. */
+        secureportASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
+        secureportASSERT( pxLink->pxNextFreeBlock == NULL );
 
-		if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
-		{
-			if( pxLink->pxNextFreeBlock == NULL )
-			{
-				/* The block is being returned to the heap - it is no longer
-				 * allocated. */
-				pxLink->xBlockSize &= ~xBlockAllocatedBit;
+        if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
+        {
+            if( pxLink->pxNextFreeBlock == NULL )
+            {
+                /* The block is being returned to the heap - it is no longer
+                 * allocated. */
+                pxLink->xBlockSize &= ~xBlockAllocatedBit;
 
-				secureportDISABLE_NON_SECURE_INTERRUPTS();
-				{
-					/* Add this block to the list of free blocks. */
-					xFreeBytesRemaining += pxLink->xBlockSize;
-					traceFREE( pv, pxLink->xBlockSize );
-					prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
-				}
-				secureportENABLE_NON_SECURE_INTERRUPTS();
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
+                secureportDISABLE_NON_SECURE_INTERRUPTS();
+                {
+                    /* Add this block to the list of free blocks. */
+                    xFreeBytesRemaining += pxLink->xBlockSize;
+                    traceFREE( pv, pxLink->xBlockSize );
+                    prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
+                }
+                secureportENABLE_NON_SECURE_INTERRUPTS();
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
 }
 /*-----------------------------------------------------------*/
 
 size_t xPortGetFreeHeapSize( void )
 {
-	return xFreeBytesRemaining;
+    return xFreeBytesRemaining;
 }
 /*-----------------------------------------------------------*/
 
 size_t xPortGetMinimumEverFreeHeapSize( void )
 {
-	return xMinimumEverFreeBytesRemaining;
+    return xMinimumEverFreeBytesRemaining;
 }
 /*-----------------------------------------------------------*/
 
 void vPortInitialiseBlocks( void )
 {
-	/* This just exists to keep the linker quiet. */
+    /* This just exists to keep the linker quiet. */
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/GCC/ARM_CM33/secure/secure_heap.h b/portable/GCC/ARM_CM33/secure/secure_heap.h
index aa67e39d8..d507107cd 100644
--- a/portable/GCC/ARM_CM33/secure/secure_heap.h
+++ b/portable/GCC/ARM_CM33/secure/secure_heap.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -39,13 +39,13 @@
  * @return Pointer to the memory region if the allocation is successful, NULL
  * otherwise.
  */
-void *pvPortMalloc( size_t xWantedSize );
+void * pvPortMalloc( size_t xWantedSize );
 
 /**
  * @brief Frees the previously allocated memory.
  *
  * @param[in] pv Pointer to the memory to be freed.
  */
-void vPortFree( void *pv );
+void vPortFree( void * pv );
 
 #endif /* __SECURE_HEAP_H__ */
diff --git a/portable/GCC/ARM_CM33/secure/secure_init.c b/portable/GCC/ARM_CM33/secure/secure_init.c
index 629186130..40b115f53 100644
--- a/portable/GCC/ARM_CM33/secure/secure_init.c
+++ b/portable/GCC/ARM_CM33/secure/secure_init.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -37,69 +37,69 @@
 /**
  * @brief Constants required to manipulate the SCB.
  */
-#define secureinitSCB_AIRCR					( ( volatile uint32_t * ) 0xe000ed0c )  /* Application Interrupt and Reset Control Register. */
-#define secureinitSCB_AIRCR_VECTKEY_POS		( 16UL )
-#define secureinitSCB_AIRCR_VECTKEY_MASK	( 0xFFFFUL << secureinitSCB_AIRCR_VECTKEY_POS )
-#define secureinitSCB_AIRCR_PRIS_POS		( 14UL )
-#define secureinitSCB_AIRCR_PRIS_MASK		( 1UL << secureinitSCB_AIRCR_PRIS_POS )
+#define secureinitSCB_AIRCR                 ( ( volatile uint32_t * ) 0xe000ed0c )  /* Application Interrupt and Reset Control Register. */
+#define secureinitSCB_AIRCR_VECTKEY_POS     ( 16UL )
+#define secureinitSCB_AIRCR_VECTKEY_MASK    ( 0xFFFFUL << secureinitSCB_AIRCR_VECTKEY_POS )
+#define secureinitSCB_AIRCR_PRIS_POS        ( 14UL )
+#define secureinitSCB_AIRCR_PRIS_MASK       ( 1UL << secureinitSCB_AIRCR_PRIS_POS )
 
 /**
  * @brief Constants required to manipulate the FPU.
  */
-#define secureinitFPCCR						( ( volatile uint32_t * ) 0xe000ef34 )  /* Floating Point Context Control Register. */
-#define secureinitFPCCR_LSPENS_POS			( 29UL )
-#define secureinitFPCCR_LSPENS_MASK			( 1UL << secureinitFPCCR_LSPENS_POS )
-#define secureinitFPCCR_TS_POS				( 26UL )
-#define secureinitFPCCR_TS_MASK				( 1UL << secureinitFPCCR_TS_POS )
+#define secureinitFPCCR                     ( ( volatile uint32_t * ) 0xe000ef34 )  /* Floating Point Context Control Register. */
+#define secureinitFPCCR_LSPENS_POS          ( 29UL )
+#define secureinitFPCCR_LSPENS_MASK         ( 1UL << secureinitFPCCR_LSPENS_POS )
+#define secureinitFPCCR_TS_POS              ( 26UL )
+#define secureinitFPCCR_TS_MASK             ( 1UL << secureinitFPCCR_TS_POS )
 
-#define secureinitNSACR						( ( volatile uint32_t * ) 0xe000ed8c )  /* Non-secure Access Control Register. */
-#define secureinitNSACR_CP10_POS			( 10UL )
-#define secureinitNSACR_CP10_MASK			( 1UL << secureinitNSACR_CP10_POS )
-#define secureinitNSACR_CP11_POS			( 11UL )
-#define secureinitNSACR_CP11_MASK			( 1UL << secureinitNSACR_CP11_POS )
+#define secureinitNSACR                     ( ( volatile uint32_t * ) 0xe000ed8c )  /* Non-secure Access Control Register. */
+#define secureinitNSACR_CP10_POS            ( 10UL )
+#define secureinitNSACR_CP10_MASK           ( 1UL << secureinitNSACR_CP10_POS )
+#define secureinitNSACR_CP11_POS            ( 11UL )
+#define secureinitNSACR_CP11_MASK           ( 1UL << secureinitNSACR_CP11_POS )
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureInit_DePrioritizeNSExceptions( void )
 {
-	uint32_t ulIPSR;
+    uint32_t ulIPSR;
 
-	 /* Read the Interrupt Program Status Register (IPSR) value. */
-	secureportREAD_IPSR( ulIPSR );
+    /* Read the Interrupt Program Status Register (IPSR) value. */
+    secureportREAD_IPSR( ulIPSR );
 
-	/* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-	 * when the processor is running in the Thread Mode. */
-	if( ulIPSR != 0 )
-	{
-		*( secureinitSCB_AIRCR ) =	( *( secureinitSCB_AIRCR ) & ~( secureinitSCB_AIRCR_VECTKEY_MASK | secureinitSCB_AIRCR_PRIS_MASK ) ) |
-									( ( 0x05FAUL << secureinitSCB_AIRCR_VECTKEY_POS ) & secureinitSCB_AIRCR_VECTKEY_MASK ) |
-									( ( 0x1UL	<< secureinitSCB_AIRCR_PRIS_POS )	& secureinitSCB_AIRCR_PRIS_MASK );
-	}
+    /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
+     * when the processor is running in the Thread Mode. */
+    if( ulIPSR != 0 )
+    {
+        *( secureinitSCB_AIRCR ) = ( *( secureinitSCB_AIRCR ) & ~( secureinitSCB_AIRCR_VECTKEY_MASK | secureinitSCB_AIRCR_PRIS_MASK ) ) |
+                                   ( ( 0x05FAUL << secureinitSCB_AIRCR_VECTKEY_POS ) & secureinitSCB_AIRCR_VECTKEY_MASK ) |
+                                   ( ( 0x1UL << secureinitSCB_AIRCR_PRIS_POS ) & secureinitSCB_AIRCR_PRIS_MASK );
+    }
 }
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureInit_EnableNSFPUAccess( void )
 {
-	uint32_t ulIPSR;
+    uint32_t ulIPSR;
 
-	 /* Read the Interrupt Program Status Register (IPSR) value. */
-	secureportREAD_IPSR( ulIPSR );
+    /* Read the Interrupt Program Status Register (IPSR) value. */
+    secureportREAD_IPSR( ulIPSR );
 
-	/* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-	 * when the processor is running in the Thread Mode. */
-	if( ulIPSR != 0 )
-	{
-		/* CP10 = 1 ==> Non-secure access to the Floating Point Unit is
-		 * permitted. CP11 should be programmed to the same value as CP10. */
-		*( secureinitNSACR ) |= ( secureinitNSACR_CP10_MASK | secureinitNSACR_CP11_MASK );
+    /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
+     * when the processor is running in the Thread Mode. */
+    if( ulIPSR != 0 )
+    {
+        /* CP10 = 1 ==> Non-secure access to the Floating Point Unit is
+         * permitted. CP11 should be programmed to the same value as CP10. */
+        *( secureinitNSACR ) |= ( secureinitNSACR_CP10_MASK | secureinitNSACR_CP11_MASK );
 
-		/* LSPENS = 0 ==> LSPEN is writable fron non-secure state. This ensures
-		 * that we can enable/disable lazy stacking in port.c file. */
-		*( secureinitFPCCR ) &= ~ ( secureinitFPCCR_LSPENS_MASK );
+        /* LSPENS = 0 ==> LSPEN is writable fron non-secure state. This ensures
+         * that we can enable/disable lazy stacking in port.c file. */
+        *( secureinitFPCCR ) &= ~( secureinitFPCCR_LSPENS_MASK );
 
-		/* TS = 1 ==> Treat FP registers as secure i.e. callee saved FP
-		 * registers (S16-S31) are also pushed to stack on exception entry and
-		 * restored on exception return. */
-		*( secureinitFPCCR ) |= ( secureinitFPCCR_TS_MASK );
-	}
+        /* TS = 1 ==> Treat FP registers as secure i.e. callee saved FP
+         * registers (S16-S31) are also pushed to stack on exception entry and
+         * restored on exception return. */
+        *( secureinitFPCCR ) |= ( secureinitFPCCR_TS_MASK );
+    }
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/GCC/ARM_CM33/secure/secure_init.h b/portable/GCC/ARM_CM33/secure/secure_init.h
index 643873468..c40ef3d8d 100644
--- a/portable/GCC/ARM_CM33/secure/secure_init.h
+++ b/portable/GCC/ARM_CM33/secure/secure_init.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ARM_CM33/secure/secure_port_macros.h b/portable/GCC/ARM_CM33/secure/secure_port_macros.h
index 14ed3f022..d495a0e02 100644
--- a/portable/GCC/ARM_CM33/secure/secure_port_macros.h
+++ b/portable/GCC/ARM_CM33/secure/secure_port_macros.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -31,103 +31,103 @@
 /**
  * @brief Byte alignment requirements.
  */
-#define secureportBYTE_ALIGNMENT					8
-#define secureportBYTE_ALIGNMENT_MASK				( 0x0007 )
+#define secureportBYTE_ALIGNMENT         8
+#define secureportBYTE_ALIGNMENT_MASK    ( 0x0007 )
 
 /**
  * @brief Macro to declare a function as non-secure callable.
  */
 #if defined( __IAR_SYSTEMS_ICC__ )
-	#define secureportNON_SECURE_CALLABLE			__cmse_nonsecure_entry __root
+    #define secureportNON_SECURE_CALLABLE    __cmse_nonsecure_entry __root
 #else
-	#define secureportNON_SECURE_CALLABLE			__attribute__((cmse_nonsecure_entry)) __attribute__((used))
+    #define secureportNON_SECURE_CALLABLE    __attribute__( ( cmse_nonsecure_entry ) ) __attribute__( ( used ) )
 #endif
 
 /**
  * @brief Set the secure PRIMASK value.
  */
 #define secureportSET_SECURE_PRIMASK( ulPrimaskValue ) \
-	__asm volatile ( "msr primask, %0" : : "r" ( ulPrimaskValue ) : "memory" )
+    __asm volatile ( "msr primask, %0" : : "r" ( ulPrimaskValue ) : "memory" )
 
 /**
  * @brief Set the non-secure PRIMASK value.
  */
 #define secureportSET_NON_SECURE_PRIMASK( ulPrimaskValue ) \
-	__asm volatile ( "msr primask_ns, %0" : : "r" ( ulPrimaskValue ) : "memory" )
+    __asm volatile ( "msr primask_ns, %0" : : "r" ( ulPrimaskValue ) : "memory" )
 
 /**
  * @brief Read the PSP value in the given variable.
  */
 #define secureportREAD_PSP( pucOutCurrentStackPointer ) \
-	__asm volatile ( "mrs %0, psp"  : "=r" ( pucOutCurrentStackPointer ) )
+    __asm volatile ( "mrs %0, psp"  : "=r" ( pucOutCurrentStackPointer ) )
 
 /**
  * @brief Set the PSP to the given value.
  */
 #define secureportSET_PSP( pucCurrentStackPointer ) \
-	__asm volatile ( "msr psp, %0" : : "r" ( pucCurrentStackPointer ) )
+    __asm volatile ( "msr psp, %0" : : "r" ( pucCurrentStackPointer ) )
 
 /**
  * @brief Set the PSPLIM to the given value.
  */
 #define secureportSET_PSPLIM( pucStackLimit ) \
-	__asm volatile ( "msr psplim, %0" : : "r" ( pucStackLimit ) )
+    __asm volatile ( "msr psplim, %0" : : "r" ( pucStackLimit ) )
 
 /**
  * @brief Set the NonSecure MSP to the given value.
  */
 #define secureportSET_MSP_NS( pucMainStackPointer ) \
-	__asm volatile ( "msr msp_ns, %0" : : "r" ( pucMainStackPointer ) )
+    __asm volatile ( "msr msp_ns, %0" : : "r" ( pucMainStackPointer ) )
 
 /**
  * @brief Set the CONTROL register to the given value.
  */
 #define secureportSET_CONTROL( ulControl ) \
-	__asm volatile ( "msr control, %0" : : "r" ( ulControl ) : "memory" )
+    __asm volatile ( "msr control, %0" : : "r" ( ulControl ) : "memory" )
 
 /**
  * @brief Read the Interrupt Program Status Register (IPSR) value in the given
  * variable.
  */
 #define secureportREAD_IPSR( ulIPSR ) \
-	__asm volatile ( "mrs %0, ipsr"  : "=r" ( ulIPSR ) )
+    __asm volatile ( "mrs %0, ipsr"  : "=r" ( ulIPSR ) )
 
 /**
  * @brief PRIMASK value to enable interrupts.
  */
-#define secureportPRIMASK_ENABLE_INTERRUPTS_VAL		0
+#define secureportPRIMASK_ENABLE_INTERRUPTS_VAL     0
 
 /**
  * @brief PRIMASK value to disable interrupts.
  */
-#define secureportPRIMASK_DISABLE_INTERRUPTS_VAL	1
+#define secureportPRIMASK_DISABLE_INTERRUPTS_VAL    1
 
 /**
  * @brief Disable secure interrupts.
  */
-#define secureportDISABLE_SECURE_INTERRUPTS()		secureportSET_SECURE_PRIMASK( secureportPRIMASK_DISABLE_INTERRUPTS_VAL )
+#define secureportDISABLE_SECURE_INTERRUPTS()        secureportSET_SECURE_PRIMASK( secureportPRIMASK_DISABLE_INTERRUPTS_VAL )
 
 /**
  * @brief Disable non-secure interrupts.
  *
  * This effectively disables context switches.
  */
-#define secureportDISABLE_NON_SECURE_INTERRUPTS()	secureportSET_NON_SECURE_PRIMASK( secureportPRIMASK_DISABLE_INTERRUPTS_VAL )
+#define secureportDISABLE_NON_SECURE_INTERRUPTS()    secureportSET_NON_SECURE_PRIMASK( secureportPRIMASK_DISABLE_INTERRUPTS_VAL )
 
 /**
  * @brief Enable non-secure interrupts.
  */
-#define secureportENABLE_NON_SECURE_INTERRUPTS()	secureportSET_NON_SECURE_PRIMASK( secureportPRIMASK_ENABLE_INTERRUPTS_VAL )
+#define secureportENABLE_NON_SECURE_INTERRUPTS()     secureportSET_NON_SECURE_PRIMASK( secureportPRIMASK_ENABLE_INTERRUPTS_VAL )
 
 /**
  * @brief Assert definition.
  */
-#define secureportASSERT( x )						\
-	if( ( x ) == 0 )								\
-	{												\
-		secureportDISABLE_SECURE_INTERRUPTS();		\
-		secureportDISABLE_NON_SECURE_INTERRUPTS();	\
-		for( ;; );									\
-	}
+#define secureportASSERT( x )                      \
+    if( ( x ) == 0 )                               \
+    {                                              \
+        secureportDISABLE_SECURE_INTERRUPTS();     \
+        secureportDISABLE_NON_SECURE_INTERRUPTS(); \
+        for( ; ; ) {; }                            \
+    }
 
 #endif /* __SECURE_PORT_MACROS_H__ */
diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c
index ba6bd2602..60733484b 100644
--- a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c
+++ b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,10 +19,9 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
@@ -40,10 +39,10 @@
 /* Portasm includes. */
 #include "portasm.h"
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/* Secure components includes. */
-	#include "secure_context.h"
-	#include "secure_init.h"
+#if ( configENABLE_TRUSTZONE == 1 )
+    /* Secure components includes. */
+    #include "secure_context.h"
+    #include "secure_init.h"
 #endif /* configENABLE_TRUSTZONE */
 
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
@@ -63,126 +62,127 @@
  * 3. Run FreeRTOS on the Non-Secure Side only i.e. no Secure Side function call support:
  *		configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 0
  */
-#if( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) )
-	#error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side.
+#if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) )
+    #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side.
 #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to manipulate the NVIC.
  */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portMIN_INTERRUPT_PRIORITY			( 255UL )
-#define portNVIC_PENDSV_PRI					( portMIN_INTERRUPT_PRIORITY << 16UL )
-#define portNVIC_SYSTICK_PRI				( portMIN_INTERRUPT_PRIORITY << 24UL )
+#define portNVIC_SYSTICK_CTRL_REG             ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG             ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG    ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SHPR3_REG                    ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_ENABLE_BIT           ( 1UL << 0UL )
+#define portNVIC_SYSTICK_INT_BIT              ( 1UL << 1UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT       ( 1UL << 16UL )
+#define portMIN_INTERRUPT_PRIORITY            ( 255UL )
+#define portNVIC_PENDSV_PRI                   ( portMIN_INTERRUPT_PRIORITY << 16UL )
+#define portNVIC_SYSTICK_PRI                  ( portMIN_INTERRUPT_PRIORITY << 24UL )
 #ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ			configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT		( 1UL << 2UL )
+    #define configSYSTICK_CLOCK_HZ            configCPU_CLOCK_HZ
+    /* Ensure the SysTick is clocked at the same frequency as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT          ( 1UL << 2UL )
 #else
-	/* The way the SysTick is clocked is not modified in case it is not the
-	 * same a the core. */
-	#define portNVIC_SYSTICK_CLK_BIT		( 0 )
+
+/* The way the SysTick is clocked is not modified in case it is not the
+ * same a the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 0 )
 #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to manipulate the SCB.
  */
-#define portSCB_SYS_HANDLER_CTRL_STATE_REG	( * ( volatile uint32_t * ) 0xe000ed24 )
-#define portSCB_MEM_FAULT_ENABLE_BIT		( 1UL << 16UL )
+#define portSCB_SYS_HANDLER_CTRL_STATE_REG    ( *( volatile uint32_t * ) 0xe000ed24 )
+#define portSCB_MEM_FAULT_ENABLE_BIT          ( 1UL << 16UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to manipulate the FPU.
  */
-#define portCPACR							( ( volatile uint32_t * ) 0xe000ed88 )	/* Coprocessor Access Control Register. */
-#define portCPACR_CP10_VALUE				( 3UL )
-#define portCPACR_CP11_VALUE				portCPACR_CP10_VALUE
-#define portCPACR_CP10_POS					( 20UL )
-#define portCPACR_CP11_POS					( 22UL )
+#define portCPACR               ( ( volatile uint32_t * ) 0xe000ed88 )              /* Coprocessor Access Control Register. */
+#define portCPACR_CP10_VALUE    ( 3UL )
+#define portCPACR_CP11_VALUE    portCPACR_CP10_VALUE
+#define portCPACR_CP10_POS      ( 20UL )
+#define portCPACR_CP11_POS      ( 22UL )
 
-#define portFPCCR							( ( volatile uint32_t * ) 0xe000ef34 )	/* Floating Point Context Control Register. */
-#define portFPCCR_ASPEN_POS					( 31UL )
-#define portFPCCR_ASPEN_MASK				( 1UL << portFPCCR_ASPEN_POS )
-#define portFPCCR_LSPEN_POS					( 30UL )
-#define portFPCCR_LSPEN_MASK				( 1UL << portFPCCR_LSPEN_POS )
+#define portFPCCR               ( ( volatile uint32_t * ) 0xe000ef34 )              /* Floating Point Context Control Register. */
+#define portFPCCR_ASPEN_POS     ( 31UL )
+#define portFPCCR_ASPEN_MASK    ( 1UL << portFPCCR_ASPEN_POS )
+#define portFPCCR_LSPEN_POS     ( 30UL )
+#define portFPCCR_LSPEN_MASK    ( 1UL << portFPCCR_LSPEN_POS )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to manipulate the MPU.
  */
-#define portMPU_TYPE_REG					( * ( ( volatile uint32_t * ) 0xe000ed90 ) )
-#define portMPU_CTRL_REG					( * ( ( volatile uint32_t * ) 0xe000ed94 ) )
-#define portMPU_RNR_REG						( * ( ( volatile uint32_t * ) 0xe000ed98 ) )
+#define portMPU_TYPE_REG                      ( *( ( volatile uint32_t * ) 0xe000ed90 ) )
+#define portMPU_CTRL_REG                      ( *( ( volatile uint32_t * ) 0xe000ed94 ) )
+#define portMPU_RNR_REG                       ( *( ( volatile uint32_t * ) 0xe000ed98 ) )
 
-#define portMPU_RBAR_REG					( * ( ( volatile uint32_t * ) 0xe000ed9c ) )
-#define portMPU_RLAR_REG					( * ( ( volatile uint32_t * ) 0xe000eda0 ) )
+#define portMPU_RBAR_REG                      ( *( ( volatile uint32_t * ) 0xe000ed9c ) )
+#define portMPU_RLAR_REG                      ( *( ( volatile uint32_t * ) 0xe000eda0 ) )
 
-#define portMPU_RBAR_A1_REG					( * ( ( volatile uint32_t * ) 0xe000eda4 ) )
-#define portMPU_RLAR_A1_REG					( * ( ( volatile uint32_t * ) 0xe000eda8 ) )
+#define portMPU_RBAR_A1_REG                   ( *( ( volatile uint32_t * ) 0xe000eda4 ) )
+#define portMPU_RLAR_A1_REG                   ( *( ( volatile uint32_t * ) 0xe000eda8 ) )
 
-#define portMPU_RBAR_A2_REG					( * ( ( volatile uint32_t * ) 0xe000edac ) )
-#define portMPU_RLAR_A2_REG					( * ( ( volatile uint32_t * ) 0xe000edb0 ) )
+#define portMPU_RBAR_A2_REG                   ( *( ( volatile uint32_t * ) 0xe000edac ) )
+#define portMPU_RLAR_A2_REG                   ( *( ( volatile uint32_t * ) 0xe000edb0 ) )
 
-#define portMPU_RBAR_A3_REG					( * ( ( volatile uint32_t * ) 0xe000edb4 ) )
-#define portMPU_RLAR_A3_REG					( * ( ( volatile uint32_t * ) 0xe000edb8 ) )
+#define portMPU_RBAR_A3_REG                   ( *( ( volatile uint32_t * ) 0xe000edb4 ) )
+#define portMPU_RLAR_A3_REG                   ( *( ( volatile uint32_t * ) 0xe000edb8 ) )
 
-#define portMPU_MAIR0_REG					( * ( ( volatile uint32_t * ) 0xe000edc0 ) )
-#define portMPU_MAIR1_REG					( * ( ( volatile uint32_t * ) 0xe000edc4 ) )
+#define portMPU_MAIR0_REG                     ( *( ( volatile uint32_t * ) 0xe000edc0 ) )
+#define portMPU_MAIR1_REG                     ( *( ( volatile uint32_t * ) 0xe000edc4 ) )
 
-#define portMPU_RBAR_ADDRESS_MASK			( 0xffffffe0 ) /* Must be 32-byte aligned. */
-#define portMPU_RLAR_ADDRESS_MASK			( 0xffffffe0 ) /* Must be 32-byte aligned. */
+#define portMPU_RBAR_ADDRESS_MASK             ( 0xffffffe0 ) /* Must be 32-byte aligned. */
+#define portMPU_RLAR_ADDRESS_MASK             ( 0xffffffe0 ) /* Must be 32-byte aligned. */
 
-#define portMPU_MAIR_ATTR0_POS				( 0UL )
-#define portMPU_MAIR_ATTR0_MASK				( 0x000000ff )
+#define portMPU_MAIR_ATTR0_POS                ( 0UL )
+#define portMPU_MAIR_ATTR0_MASK               ( 0x000000ff )
 
-#define portMPU_MAIR_ATTR1_POS				( 8UL )
-#define portMPU_MAIR_ATTR1_MASK				( 0x0000ff00 )
+#define portMPU_MAIR_ATTR1_POS                ( 8UL )
+#define portMPU_MAIR_ATTR1_MASK               ( 0x0000ff00 )
 
-#define portMPU_MAIR_ATTR2_POS				( 16UL )
-#define portMPU_MAIR_ATTR2_MASK				( 0x00ff0000 )
+#define portMPU_MAIR_ATTR2_POS                ( 16UL )
+#define portMPU_MAIR_ATTR2_MASK               ( 0x00ff0000 )
 
-#define portMPU_MAIR_ATTR3_POS				( 24UL )
-#define portMPU_MAIR_ATTR3_MASK				( 0xff000000 )
+#define portMPU_MAIR_ATTR3_POS                ( 24UL )
+#define portMPU_MAIR_ATTR3_MASK               ( 0xff000000 )
 
-#define portMPU_MAIR_ATTR4_POS				( 0UL )
-#define portMPU_MAIR_ATTR4_MASK				( 0x000000ff )
+#define portMPU_MAIR_ATTR4_POS                ( 0UL )
+#define portMPU_MAIR_ATTR4_MASK               ( 0x000000ff )
 
-#define portMPU_MAIR_ATTR5_POS				( 8UL )
-#define portMPU_MAIR_ATTR5_MASK				( 0x0000ff00 )
+#define portMPU_MAIR_ATTR5_POS                ( 8UL )
+#define portMPU_MAIR_ATTR5_MASK               ( 0x0000ff00 )
 
-#define portMPU_MAIR_ATTR6_POS				( 16UL )
-#define portMPU_MAIR_ATTR6_MASK				( 0x00ff0000 )
+#define portMPU_MAIR_ATTR6_POS                ( 16UL )
+#define portMPU_MAIR_ATTR6_MASK               ( 0x00ff0000 )
 
-#define portMPU_MAIR_ATTR7_POS				( 24UL )
-#define portMPU_MAIR_ATTR7_MASK				( 0xff000000 )
+#define portMPU_MAIR_ATTR7_POS                ( 24UL )
+#define portMPU_MAIR_ATTR7_MASK               ( 0xff000000 )
 
-#define portMPU_RLAR_ATTR_INDEX0			( 0UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX1			( 1UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX2			( 2UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX3			( 3UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX4			( 4UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX5			( 5UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX6			( 6UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX7			( 7UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX0              ( 0UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX1              ( 1UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX2              ( 2UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX3              ( 3UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX4              ( 4UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX5              ( 5UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX6              ( 6UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX7              ( 7UL << 1UL )
 
-#define portMPU_RLAR_REGION_ENABLE			( 1UL )
+#define portMPU_RLAR_REGION_ENABLE            ( 1UL )
 
 /* Enable privileged access to unmapped region. */
-#define portMPU_PRIV_BACKGROUND_ENABLE_BIT	( 1UL << 2UL )
+#define portMPU_PRIV_BACKGROUND_ENABLE_BIT    ( 1UL << 2UL )
 
 /* Enable MPU. */
-#define portMPU_ENABLE_BIT					( 1UL << 0UL )
+#define portMPU_ENABLE_BIT                    ( 1UL << 0UL )
 
 /* Expected value of the portMPU_TYPE register. */
-#define portEXPECTED_MPU_TYPE_VALUE			( 8UL << 8UL ) /* 8 regions, unified. */
+#define portEXPECTED_MPU_TYPE_VALUE           ( 8UL << 8UL ) /* 8 regions, unified. */
 /*-----------------------------------------------------------*/
 
 /**
@@ -190,53 +190,55 @@
  *
  * It is needed because the systick is a 24-bit counter.
  */
-#define portMAX_24_BIT_NUMBER				( 0xffffffUL )
+#define portMAX_24_BIT_NUMBER       ( 0xffffffUL )
 
 /**
  * @brief A fiddle factor to estimate the number of SysTick counts that would
  * have occurred while the SysTick counter is stopped during tickless idle
  * calculations.
  */
-#define portMISSED_COUNTS_FACTOR			( 45UL )
+#define portMISSED_COUNTS_FACTOR    ( 45UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to set up the initial stack.
  */
-#define portINITIAL_XPSR					( 0x01000000 )
+#define portINITIAL_XPSR    ( 0x01000000 )
 
-#if( configRUN_FREERTOS_SECURE_ONLY == 1 )
-	/**
-	 * @brief Initial EXC_RETURN value.
-	 *
-	 *     FF         FF         FF         FD
-	 * 1111 1111  1111 1111  1111 1111  1111 1101
-	 *
-	 * Bit[6] - 1 --> The exception was taken from the Secure state.
-	 * Bit[5] - 1 --> Do not skip stacking of additional state context.
-	 * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
-	 * Bit[3] - 1 --> Return to the Thread mode.
-	 * Bit[2] - 1 --> Restore registers from the process stack.
-	 * Bit[1] - 0 --> Reserved, 0.
-	 * Bit[0] - 1 --> The exception was taken to the Secure state.
-	 */
-	#define portINITIAL_EXC_RETURN			( 0xfffffffd )
+#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
+
+/**
+ * @brief Initial EXC_RETURN value.
+ *
+ *     FF         FF         FF         FD
+ * 1111 1111  1111 1111  1111 1111  1111 1101
+ *
+ * Bit[6] - 1 --> The exception was taken from the Secure state.
+ * Bit[5] - 1 --> Do not skip stacking of additional state context.
+ * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
+ * Bit[3] - 1 --> Return to the Thread mode.
+ * Bit[2] - 1 --> Restore registers from the process stack.
+ * Bit[1] - 0 --> Reserved, 0.
+ * Bit[0] - 1 --> The exception was taken to the Secure state.
+ */
+    #define portINITIAL_EXC_RETURN    ( 0xfffffffd )
 #else
-	/**
-	 * @brief Initial EXC_RETURN value.
-	 *
-	 *     FF         FF         FF         BC
-	 * 1111 1111  1111 1111  1111 1111  1011 1100
-	 *
-	 * Bit[6] - 0 --> The exception was taken from the Non-Secure state.
-	 * Bit[5] - 1 --> Do not skip stacking of additional state context.
-	 * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
-	 * Bit[3] - 1 --> Return to the Thread mode.
-	 * Bit[2] - 1 --> Restore registers from the process stack.
-	 * Bit[1] - 0 --> Reserved, 0.
-	 * Bit[0] - 0 --> The exception was taken to the Non-Secure state.
-	 */
-	#define portINITIAL_EXC_RETURN			( 0xffffffbc )
+
+/**
+ * @brief Initial EXC_RETURN value.
+ *
+ *     FF         FF         FF         BC
+ * 1111 1111  1111 1111  1111 1111  1011 1100
+ *
+ * Bit[6] - 0 --> The exception was taken from the Non-Secure state.
+ * Bit[5] - 1 --> Do not skip stacking of additional state context.
+ * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
+ * Bit[3] - 1 --> Return to the Thread mode.
+ * Bit[2] - 1 --> Restore registers from the process stack.
+ * Bit[1] - 0 --> Reserved, 0.
+ * Bit[0] - 0 --> The exception was taken to the Non-Secure state.
+ */
+    #define portINITIAL_EXC_RETURN    ( 0xffffffbc )
 #endif /* configRUN_FREERTOS_SECURE_ONLY */
 
 /**
@@ -246,13 +248,13 @@
  *  Bit[0] = 0 ==> The task is privileged.
  *  Bit[0] = 1 ==> The task is not privileged.
  */
-#define portCONTROL_PRIVILEGED_MASK			( 1UL << 0UL )
+#define portCONTROL_PRIVILEGED_MASK         ( 1UL << 0UL )
 
 /**
  * @brief Initial CONTROL register values.
  */
-#define portINITIAL_CONTROL_UNPRIVILEGED	( 0x3 )
-#define portINITIAL_CONTROL_PRIVILEGED		( 0x2 )
+#define portINITIAL_CONTROL_UNPRIVILEGED    ( 0x3 )
+#define portINITIAL_CONTROL_PRIVILEGED      ( 0x2 )
 
 /**
  * @brief Let the user override the pre-loading of the initial LR with the
@@ -260,23 +262,23 @@
  * in the debugger.
  */
 #ifdef configTASK_RETURN_ADDRESS
-	#define portTASK_RETURN_ADDRESS			configTASK_RETURN_ADDRESS
+    #define portTASK_RETURN_ADDRESS    configTASK_RETURN_ADDRESS
 #else
-	#define portTASK_RETURN_ADDRESS			prvTaskExitError
+    #define portTASK_RETURN_ADDRESS    prvTaskExitError
 #endif
 
 /**
  * @brief If portPRELOAD_REGISTERS then registers will be given an initial value
  * when a task is created. This helps in debugging at the cost of code size.
  */
-#define portPRELOAD_REGISTERS				1
+#define portPRELOAD_REGISTERS    1
 
 /**
  * @brief A task is created without a secure context, and must call
  * portALLOCATE_SECURE_CONTEXT() to give itself a secure context before it makes
  * any secure calls.
  */
-#define portNO_SECURE_CONTEXT				0
+#define portNO_SECURE_CONTEXT    0
 /*-----------------------------------------------------------*/
 
 /**
@@ -285,18 +287,20 @@
  */
 static void prvTaskExitError( void );
 
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Setup the Memory Protection Unit (MPU).
-	 */
-	static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
+#if ( configENABLE_MPU == 1 )
+
+/**
+ * @brief Setup the Memory Protection Unit (MPU).
+ */
+    static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
 #endif /* configENABLE_MPU */
 
-#if( configENABLE_FPU == 1 )
-	/**
-	 * @brief Setup the Floating Point Unit (FPU).
-	 */
-	static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;
+#if ( configENABLE_FPU == 1 )
+
+/**
+ * @brief Setup the Floating Point Unit (FPU).
+ */
+    static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;
 #endif /* configENABLE_FPU */
 
 /**
@@ -338,812 +342,852 @@ void SysTick_Handler( void ) PRIVILEGED_FUNCTION;
 /**
  * @brief C part of SVC handler.
  */
-portDONT_DISCARD void vPortSVCHandler_C( uint32_t *pulCallerStackAddress ) PRIVILEGED_FUNCTION;
+portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIVILEGED_FUNCTION;
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Each task maintains its own interrupt status in the critical nesting
  * variable.
  */
-static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
+PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Saved as part of the task context to indicate which context the
-	 * task is using on the secure side.
-	 */
-	portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
+#if ( configENABLE_TRUSTZONE == 1 )
+
+/**
+ * @brief Saved as part of the task context to indicate which context the
+ * task is using on the secure side.
+ */
+    PRIVILEGED_DATA portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
 #endif /* configENABLE_TRUSTZONE */
 
-#if( configUSE_TICKLESS_IDLE == 1 )
-	/**
-	 * @brief The number of SysTick increments that make up one tick period.
-	 */
-	static uint32_t ulTimerCountsForOneTick = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
 
-	/**
-	 * @brief The maximum number of tick periods that can be suppressed is
-	 * limited by the 24 bit resolution of the SysTick timer.
-	 */
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
+/**
+ * @brief The number of SysTick increments that make up one tick period.
+ */
+    PRIVILEGED_DATA static uint32_t ulTimerCountsForOneTick = 0;
 
-	/**
-	 * @brief Compensate for the CPU cycles that pass while the SysTick is
-	 * stopped (low power functionality only).
-	 */
-	static uint32_t ulStoppedTimerCompensation = 0;
+/**
+ * @brief The maximum number of tick periods that can be suppressed is
+ * limited by the 24 bit resolution of the SysTick timer.
+ */
+    PRIVILEGED_DATA static uint32_t xMaximumPossibleSuppressedTicks = 0;
+
+/**
+ * @brief Compensate for the CPU cycles that pass while the SysTick is
+ * stopped (low power functionality only).
+ */
+    PRIVILEGED_DATA static uint32_t ulStoppedTimerCompensation = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TICKLESS_IDLE == 1 )
-	__attribute__(( weak )) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-	{
-	uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
-	TickType_t xModifiableIdleTime;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+    {
+        uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+        TickType_t xModifiableIdleTime;
 
-		/* Make sure the SysTick reload value does not overflow the counter. */
-		if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-		{
-			xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-		}
+        /* Make sure the SysTick reload value does not overflow the counter. */
+        if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+        {
+            xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+        }
 
-		/* Stop the SysTick momentarily. The time the SysTick is stopped for is
-		 * accounted for as best it can be, but using the tickless mode will
-		 * inevitably result in some tiny drift of the time maintained by the
-		 * kernel with respect to calendar time. */
-		portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+        /* Stop the SysTick momentarily. The time the SysTick is stopped for is
+         * accounted for as best it can be, but using the tickless mode will
+         * inevitably result in some tiny drift of the time maintained by the
+         * kernel with respect to calendar time. */
+        portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
 
-		/* Calculate the reload value required to wait xExpectedIdleTime
-		 * tick periods. -1 is used because this code will execute part way
-		 * through one of the tick periods. */
-		ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-		if( ulReloadValue > ulStoppedTimerCompensation )
-		{
-			ulReloadValue -= ulStoppedTimerCompensation;
-		}
+        /* Calculate the reload value required to wait xExpectedIdleTime
+         * tick periods. -1 is used because this code will execute part way
+         * through one of the tick periods. */
+        ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
 
-		/* Enter a critical section but don't use the taskENTER_CRITICAL()
-		 * method as that will mask interrupts that should exit sleep mode. */
-		__asm volatile( "cpsid i" ::: "memory" );
-		__asm volatile( "dsb" );
-		__asm volatile( "isb" );
+        if( ulReloadValue > ulStoppedTimerCompensation )
+        {
+            ulReloadValue -= ulStoppedTimerCompensation;
+        }
 
-		/* If a context switch is pending or a task is waiting for the scheduler
-		 * to be un-suspended then abandon the low power entry. */
-		if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-		{
-			/* Restart from whatever is left in the count register to complete
-			 * this tick period. */
-			portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+        /* Enter a critical section but don't use the taskENTER_CRITICAL()
+         * method as that will mask interrupts that should exit sleep mode. */
+        __asm volatile ( "cpsid i" ::: "memory" );
+        __asm volatile ( "dsb" );
+        __asm volatile ( "isb" );
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+        /* If a context switch is pending or a task is waiting for the scheduler
+         * to be un-suspended then abandon the low power entry. */
+        if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+        {
+            /* Restart from whatever is left in the count register to complete
+             * this tick period. */
+            portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Reset the reload register to the value required for normal tick
-			 * periods. */
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts - see comments above the cpsid instruction()
-			 * above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-		else
-		{
-			/* Set the new reload value. */
-			portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+            /* Reset the reload register to the value required for normal tick
+             * periods. */
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
 
-			/* Clear the SysTick count flag and set the count value back to
-			 * zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            /* Re-enable interrupts - see comments above the cpsid instruction()
+             * above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+        else
+        {
+            /* Set the new reload value. */
+            portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            /* Clear the SysTick count flag and set the count value back to
+             * zero. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-			/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
-			 * set its parameter to 0 to indicate that its implementation
-			 * contains its own wait for interrupt or wait for event
-			 * instruction, and so wfi should not be executed again. However,
-			 * the original expected idle time variable must remain unmodified,
-			 * so a copy is taken. */
-			xModifiableIdleTime = xExpectedIdleTime;
-			configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-			if( xModifiableIdleTime > 0 )
-			{
-				__asm volatile( "dsb" ::: "memory" );
-				__asm volatile( "wfi" );
-				__asm volatile( "isb" );
-			}
-			configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts to allow the interrupt that brought the MCU
-			 * out of sleep mode to execute immediately. See comments above
-			 * the cpsid instruction above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
+            /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
+             * set its parameter to 0 to indicate that its implementation
+             * contains its own wait for interrupt or wait for event
+             * instruction, and so wfi should not be executed again. However,
+             * the original expected idle time variable must remain unmodified,
+             * so a copy is taken. */
+            xModifiableIdleTime = xExpectedIdleTime;
+            configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
 
-			/* Disable interrupts again because the clock is about to be stopped
-			 * and interrupts that execute while the clock is stopped will
-			 * increase any slippage between the time maintained by the RTOS and
-			 * calendar time. */
-			__asm volatile( "cpsid i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
+            if( xModifiableIdleTime > 0 )
+            {
+                __asm volatile ( "dsb" ::: "memory" );
+                __asm volatile ( "wfi" );
+                __asm volatile ( "isb" );
+            }
 
-			/* Disable the SysTick clock without reading the
-			 * portNVIC_SYSTICK_CTRL_REG register to ensure the
-			 * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
-			 * Again, the time the SysTick is stopped for is accounted for as
-			 * best it can be, but using the tickless mode will inevitably
-			 * result in some tiny drift of the time maintained by the kernel
-			 * with respect to calendar time*/
-			portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+            configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
 
-			/* Determine if the SysTick clock has already counted to zero and
-			 * been set back to the current reload value (the reload back being
-			 * correct for the entire expected idle time) or if the SysTick is
-			 * yet to count to zero (in which case an interrupt other than the
-			 * SysTick must have brought the system out of sleep mode). */
-			if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-			{
-				uint32_t ulCalculatedLoadValue;
+            /* Re-enable interrupts to allow the interrupt that brought the MCU
+             * out of sleep mode to execute immediately. See comments above
+             * the cpsid instruction above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
 
-				/* The tick interrupt is already pending, and the SysTick count
-				 * reloaded with ulReloadValue.  Reset the
-				 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
-				 * period. */
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+            /* Disable interrupts again because the clock is about to be stopped
+             * and interrupts that execute while the clock is stopped will
+             * increase any slippage between the time maintained by the RTOS and
+             * calendar time. */
+            __asm volatile ( "cpsid i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
 
-				/* Don't allow a tiny value, or values that have somehow
-				 * underflowed because the post sleep hook did something
-				 * that took too long. */
-				if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-				{
-					ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-				}
+            /* Disable the SysTick clock without reading the
+             * portNVIC_SYSTICK_CTRL_REG register to ensure the
+             * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
+             * Again, the time the SysTick is stopped for is accounted for as
+             * best it can be, but using the tickless mode will inevitably
+             * result in some tiny drift of the time maintained by the kernel
+             * with respect to calendar time*/
+            portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
 
-				portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+            /* Determine if the SysTick clock has already counted to zero and
+             * been set back to the current reload value (the reload back being
+             * correct for the entire expected idle time) or if the SysTick is
+             * yet to count to zero (in which case an interrupt other than the
+             * SysTick must have brought the system out of sleep mode). */
+            if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+            {
+                uint32_t ulCalculatedLoadValue;
 
-				/* As the pending tick will be processed as soon as this
-				 * function exits, the tick value maintained by the tick is
-				 * stepped forward by one less than the time spent waiting. */
-				ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-			}
-			else
-			{
-				/* Something other than the tick interrupt ended the sleep.
-				 * Work out how long the sleep lasted rounded to complete tick
-				 * periods (not the ulReload value which accounted for part
-				 * ticks). */
-				ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+                /* The tick interrupt is already pending, and the SysTick count
+                 * reloaded with ulReloadValue.  Reset the
+                 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+                 * period. */
+                ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
 
-				/* How many complete tick periods passed while the processor
-				 * was waiting? */
-				ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+                /* Don't allow a tiny value, or values that have somehow
+                 * underflowed because the post sleep hook did something
+                 * that took too long. */
+                if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+                {
+                    ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+                }
 
-				/* The reload value is set to whatever fraction of a single tick
-				 * period remains. */
-				portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-			}
+                portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
 
-			/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
-			 * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
-			 * value. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-			vTaskStepTick( ulCompleteTickPeriods );
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+                /* As the pending tick will be processed as soon as this
+                 * function exits, the tick value maintained by the tick is
+                 * stepped forward by one less than the time spent waiting. */
+                ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+            }
+            else
+            {
+                /* Something other than the tick interrupt ended the sleep.
+                 * Work out how long the sleep lasted rounded to complete tick
+                 * periods (not the ulReload value which accounted for part
+                 * ticks). */
+                ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Exit with interrupts enabled. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-	}
+                /* How many complete tick periods passed while the processor
+                 * was waiting? */
+                ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+                /* The reload value is set to whatever fraction of a single tick
+                 * period remains. */
+                portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+            }
+
+            /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+             * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+             * value. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            vTaskStepTick( ulCompleteTickPeriods );
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Exit with interrupts enabled. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+    }
 #endif /* configUSE_TICKLESS_IDLE */
 /*-----------------------------------------------------------*/
 
-__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
+__attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
 {
-	/* Calculate the constants required to configure the tick interrupt. */
-	#if( configUSE_TICKLESS_IDLE == 1 )
-	{
-		ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
-		xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
-	}
-	#endif /* configUSE_TICKLESS_IDLE */
+    /* Calculate the constants required to configure the tick interrupt. */
+    #if ( configUSE_TICKLESS_IDLE == 1 )
+        {
+            ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+            xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+            ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+        }
+    #endif /* configUSE_TICKLESS_IDLE */
 
-	/* Stop and reset the SysTick. */
-	portNVIC_SYSTICK_CTRL_REG = 0UL;
-	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+    /* Stop and reset the SysTick. */
+    portNVIC_SYSTICK_CTRL_REG = 0UL;
+    portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-	/* Configure SysTick to interrupt at the requested rate. */
-	portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
+    /* Configure SysTick to interrupt at the requested rate. */
+    portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+    portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
 }
 /*-----------------------------------------------------------*/
 
 static void prvTaskExitError( void )
 {
-volatile uint32_t ulDummy = 0UL;
+    volatile uint32_t ulDummy = 0UL;
 
-	/* A function that implements a task must not exit or attempt to return to
-	 * its caller as there is nothing to return to. If a task wants to exit it
-	 * should instead call vTaskDelete( NULL ). Artificially force an assert()
-	 * to be triggered if configASSERT() is defined, then stop here so
-	 * application writers can catch the error. */
-	configASSERT( ulCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to. If a task wants to exit it
+     * should instead call vTaskDelete( NULL ). Artificially force an assert()
+     * to be triggered if configASSERT() is defined, then stop here so
+     * application writers can catch the error. */
+    configASSERT( ulCriticalNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
 
-	while( ulDummy == 0 )
-	{
-		/* This file calls prvTaskExitError() after the scheduler has been
-		 * started to remove a compiler warning about the function being
-		 * defined but never called.  ulDummy is used purely to quieten other
-		 * warnings about code appearing after this function is called - making
-		 * ulDummy volatile makes the compiler think the function could return
-		 * and therefore not output an 'unreachable code' warning for code that
-		 * appears after it. */
-	}
+    while( ulDummy == 0 )
+    {
+        /* This file calls prvTaskExitError() after the scheduler has been
+         * started to remove a compiler warning about the function being
+         * defined but never called.  ulDummy is used purely to quieten other
+         * warnings about code appearing after this function is called - making
+         * ulDummy volatile makes the compiler think the function could return
+         * and therefore not output an 'unreachable code' warning for code that
+         * appears after it. */
+    }
 }
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
-	{
-	#if defined( __ARMCC_VERSION )
-		/* Declaration when these variable are defined in code instead of being
-		 * exported from linker scripts. */
-		extern uint32_t * __privileged_functions_start__;
-		extern uint32_t * __privileged_functions_end__;
-		extern uint32_t * __syscalls_flash_start__;
-		extern uint32_t * __syscalls_flash_end__;
-		extern uint32_t * __unprivileged_flash_start__;
-		extern uint32_t * __unprivileged_flash_end__;
-		extern uint32_t * __privileged_sram_start__;
-		extern uint32_t * __privileged_sram_end__;
-	#else
-		/* Declaration when these variable are exported from linker scripts. */
-		extern uint32_t __privileged_functions_start__[];
-		extern uint32_t __privileged_functions_end__[];
-		extern uint32_t __syscalls_flash_start__[];
-		extern uint32_t __syscalls_flash_end__[];
-		extern uint32_t __unprivileged_flash_start__[];
-		extern uint32_t __unprivileged_flash_end__[];
-		extern uint32_t __privileged_sram_start__[];
-		extern uint32_t __privileged_sram_end__[];
-	#endif /* defined( __ARMCC_VERSION ) */
+#if ( configENABLE_MPU == 1 )
+    static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
+    {
+        #if defined( __ARMCC_VERSION )
 
-		/* Check that the MPU is present. */
-		if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
-		{
-			/* MAIR0 - Index 0. */
-			portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
-			/* MAIR0 - Index 1. */
-			portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __privileged_functions_start__;
+            extern uint32_t * __privileged_functions_end__;
+            extern uint32_t * __syscalls_flash_start__;
+            extern uint32_t * __syscalls_flash_end__;
+            extern uint32_t * __unprivileged_flash_start__;
+            extern uint32_t * __unprivileged_flash_end__;
+            extern uint32_t * __privileged_sram_start__;
+            extern uint32_t * __privileged_sram_end__;
+        #else /* if defined( __ARMCC_VERSION ) */
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __privileged_functions_start__[];
+            extern uint32_t __privileged_functions_end__[];
+            extern uint32_t __syscalls_flash_start__[];
+            extern uint32_t __syscalls_flash_end__[];
+            extern uint32_t __unprivileged_flash_start__[];
+            extern uint32_t __unprivileged_flash_end__[];
+            extern uint32_t __privileged_sram_start__[];
+            extern uint32_t __privileged_sram_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
 
-			/* Setup privileged flash as Read Only so that privileged tasks can
-			 * read it but not modify. */
-			portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_PRIVILEGED_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
+        /* Check that the MPU is present. */
+        if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
+        {
+            /* MAIR0 - Index 0. */
+            portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
+            /* MAIR0 - Index 1. */
+            portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
 
-			/* Setup unprivileged flash as Read Only by both privileged and
-			 * unprivileged tasks. All tasks can read it but no-one can modify. */
-			portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
+            /* Setup privileged flash as Read Only so that privileged tasks can
+             * read it but not modify. */
+            portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_PRIVILEGED_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
 
-			/* Setup unprivileged syscalls flash as Read Only by both privileged
-			 * and unprivileged tasks. All tasks can read it but no-one can modify. */
-			portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
+            /* Setup unprivileged flash as Read Only by both privileged and
+             * unprivileged tasks. All tasks can read it but no-one can modify. */
+            portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
 
-			/* Setup RAM containing kernel data for privileged access only. */
-			portMPU_RNR_REG = portPRIVILEGED_RAM_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
-								( portMPU_REGION_EXECUTE_NEVER );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
+            /* Setup unprivileged syscalls flash as Read Only by both privileged
+             * and unprivileged tasks. All tasks can read it but no-one can modify. */
+            portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
 
-			/* Enable mem fault. */
-			portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
+            /* Setup RAM containing kernel data for privileged access only. */
+            portMPU_RNR_REG = portPRIVILEGED_RAM_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
+                               ( portMPU_REGION_EXECUTE_NEVER );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
 
-			/* Enable MPU with privileged background access i.e. unmapped
-			 * regions have privileged access. */
-			portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
-		}
-	}
+            /* Enable mem fault. */
+            portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
+
+            /* Enable MPU with privileged background access i.e. unmapped
+             * regions have privileged access. */
+            portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
+        }
+    }
 #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_FPU == 1 )
-	static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
-	{
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			/* Enable non-secure access to the FPU. */
-			SecureInit_EnableNSFPUAccess();
-		}
-		#endif /* configENABLE_TRUSTZONE */
+#if ( configENABLE_FPU == 1 )
+    static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
+    {
+        #if ( configENABLE_TRUSTZONE == 1 )
+            {
+                /* Enable non-secure access to the FPU. */
+                SecureInit_EnableNSFPUAccess();
+            }
+        #endif /* configENABLE_TRUSTZONE */
 
-		/* CP10 = 11 ==> Full access to FPU i.e. both privileged and
-		 * unprivileged code should be able to access FPU. CP11 should be
-		 * programmed to the same value as CP10. */
-		*( portCPACR ) |=	(	( portCPACR_CP10_VALUE << portCPACR_CP10_POS ) |
-								( portCPACR_CP11_VALUE << portCPACR_CP11_POS )
-							);
+        /* CP10 = 11 ==> Full access to FPU i.e. both privileged and
+         * unprivileged code should be able to access FPU. CP11 should be
+         * programmed to the same value as CP10. */
+        *( portCPACR ) |= ( ( portCPACR_CP10_VALUE << portCPACR_CP10_POS ) |
+                            ( portCPACR_CP11_VALUE << portCPACR_CP11_POS )
+                            );
 
-		/* ASPEN = 1 ==> Hardware should automatically preserve floating point
-		 * context on exception entry and restore on exception return.
-		 * LSPEN = 1 ==> Enable lazy context save of FP state. */
-		*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
-	}
+        /* ASPEN = 1 ==> Hardware should automatically preserve floating point
+         * context on exception entry and restore on exception return.
+         * LSPEN = 1 ==> Enable lazy context save of FP state. */
+        *( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
+    }
 #endif /* configENABLE_FPU */
 /*-----------------------------------------------------------*/
 
 void vPortYield( void ) /* PRIVILEGED_FUNCTION */
 {
-	/* Set a PendSV to request a context switch. */
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+    /* Set a PendSV to request a context switch. */
+    portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
 
-	/* Barriers are normally not required but do ensure the code is
-	 * completely within the specified behaviour for the architecture. */
-	__asm volatile( "dsb" ::: "memory" );
-	__asm volatile( "isb" );
+    /* Barriers are normally not required but do ensure the code is
+     * completely within the specified behaviour for the architecture. */
+    __asm volatile ( "dsb" ::: "memory" );
+    __asm volatile ( "isb" );
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */
 {
-	portDISABLE_INTERRUPTS();
-	ulCriticalNesting++;
+    portDISABLE_INTERRUPTS();
+    ulCriticalNesting++;
 
-	/* Barriers are normally not required but do ensure the code is
-	 * completely within the specified behaviour for the architecture. */
-	__asm volatile( "dsb" ::: "memory" );
-	__asm volatile( "isb" );
+    /* Barriers are normally not required but do ensure the code is
+     * completely within the specified behaviour for the architecture. */
+    __asm volatile ( "dsb" ::: "memory" );
+    __asm volatile ( "isb" );
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */
 {
-	configASSERT( ulCriticalNesting );
-	ulCriticalNesting--;
+    configASSERT( ulCriticalNesting );
+    ulCriticalNesting--;
 
-	if( ulCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
+    if( ulCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
 }
 /*-----------------------------------------------------------*/
 
 void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
 {
-uint32_t ulPreviousMask;
+    uint32_t ulPreviousMask;
 
-	ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* Pend a context switch. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
+    ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* Pend a context switch. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
 }
 /*-----------------------------------------------------------*/
 
-void vPortSVCHandler_C( uint32_t *pulCallerStackAddress ) /* PRIVILEGED_FUNCTION portDONT_DISCARD */
+void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTION portDONT_DISCARD */
 {
-#if( configENABLE_MPU == 1 )
-	#if defined( __ARMCC_VERSION )
-		/* Declaration when these variable are defined in code instead of being
-		 * exported from linker scripts. */
-		extern uint32_t * __syscalls_flash_start__;
-		extern uint32_t * __syscalls_flash_end__;
-	#else
-		/* Declaration when these variable are exported from linker scripts. */
-		extern uint32_t __syscalls_flash_start__[];
-		extern uint32_t __syscalls_flash_end__[];
-	#endif /* defined( __ARMCC_VERSION ) */
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        #if defined( __ARMCC_VERSION )
 
-uint32_t ulPC;
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __syscalls_flash_start__;
+            extern uint32_t * __syscalls_flash_end__;
+        #else
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __syscalls_flash_start__[];
+            extern uint32_t __syscalls_flash_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
+    #endif /* configENABLE_MPU */
 
-#if( configENABLE_TRUSTZONE == 1 )
-	uint32_t ulR0;
-	#if( configENABLE_MPU == 1 )
-		uint32_t ulControl, ulIsTaskPrivileged;
-	#endif /* configENABLE_MPU */
-#endif /* configENABLE_TRUSTZONE */
-uint8_t ucSVCNumber;
+    uint32_t ulPC;
 
-	/* Register are stored on the stack in the following order - R0, R1, R2, R3,
-	 * R12, LR, PC, xPSR. */
-	ulPC = pulCallerStackAddress[ 6 ];
-	ucSVCNumber = ( ( uint8_t *) ulPC )[ -2 ];
+    #if ( configENABLE_TRUSTZONE == 1 )
+        uint32_t ulR0;
+        #if ( configENABLE_MPU == 1 )
+            uint32_t ulControl, ulIsTaskPrivileged;
+        #endif /* configENABLE_MPU */
+    #endif /* configENABLE_TRUSTZONE */
+    uint8_t ucSVCNumber;
 
-	switch( ucSVCNumber )
-	{
-		#if( configENABLE_TRUSTZONE == 1 )
-			case portSVC_ALLOCATE_SECURE_CONTEXT:
-			{
-				/* R0 contains the stack size passed as parameter to the
-				 * vPortAllocateSecureContext function. */
-				ulR0 = pulCallerStackAddress[ 0 ];
+    /* Register are stored on the stack in the following order - R0, R1, R2, R3,
+     * R12, LR, PC, xPSR. */
+    ulPC = pulCallerStackAddress[ 6 ];
+    ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ];
 
-				#if( configENABLE_MPU == 1 )
-				{
-					/* Read the CONTROL register value. */
-					__asm volatile ( "mrs %0, control"  : "=r" ( ulControl ) );
+    switch( ucSVCNumber )
+    {
+        #if ( configENABLE_TRUSTZONE == 1 )
+            case portSVC_ALLOCATE_SECURE_CONTEXT:
 
-					/* The task that raised the SVC is privileged if Bit[0]
-					 * in the CONTROL register is 0. */
-					ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 );
+                /* R0 contains the stack size passed as parameter to the
+                 * vPortAllocateSecureContext function. */
+                ulR0 = pulCallerStackAddress[ 0 ];
 
-					/* Allocate and load a context for the secure task. */
-					xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged );
-				}
-				#else
-				{
-					/* Allocate and load a context for the secure task. */
-					xSecureContext = SecureContext_AllocateContext( ulR0 );
-				}
-				#endif /* configENABLE_MPU */
+                #if ( configENABLE_MPU == 1 )
+                    {
+                        /* Read the CONTROL register value. */
+                        __asm volatile ( "mrs %0, control"  : "=r" ( ulControl ) );
 
-				configASSERT( xSecureContext != NULL );
-				SecureContext_LoadContext( xSecureContext );
-			}
-			break;
+                        /* The task that raised the SVC is privileged if Bit[0]
+                         * in the CONTROL register is 0. */
+                        ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 );
 
-			case portSVC_FREE_SECURE_CONTEXT:
-			{
-				/* R0 contains the secure context handle to be freed. */
-				ulR0 = pulCallerStackAddress[ 0 ];
+                        /* Allocate and load a context for the secure task. */
+                        xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged );
+                    }
+                #else /* if ( configENABLE_MPU == 1 ) */
+                    {
+                        /* Allocate and load a context for the secure task. */
+                        xSecureContext = SecureContext_AllocateContext( ulR0 );
+                    }
+                #endif /* configENABLE_MPU */
 
-				/* Free the secure context. */
-				SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 );
-			}
-			break;
-		#endif /* configENABLE_TRUSTZONE */
+                configASSERT( xSecureContext != NULL );
+                SecureContext_LoadContext( xSecureContext );
+                break;
 
-		case portSVC_START_SCHEDULER:
-		{
-			#if( configENABLE_TRUSTZONE == 1 )
-			{
-				/* De-prioritize the non-secure exceptions so that the
-				 * non-secure pendSV runs at the lowest priority. */
-				SecureInit_DePrioritizeNSExceptions();
+            case portSVC_FREE_SECURE_CONTEXT:
+                /* R0 contains the secure context handle to be freed. */
+                ulR0 = pulCallerStackAddress[ 0 ];
 
-				/* Initialize the secure context management system. */
-				SecureContext_Init();
-			}
-			#endif /* configENABLE_TRUSTZONE */
+                /* Free the secure context. */
+                SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 );
+                break;
+        #endif /* configENABLE_TRUSTZONE */
 
-			#if( configENABLE_FPU == 1 )
-			{
-				/* Setup the Floating Point Unit (FPU). */
-				prvSetupFPU();
-			}
-			#endif /* configENABLE_FPU */
+        case portSVC_START_SCHEDULER:
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    /* De-prioritize the non-secure exceptions so that the
+                     * non-secure pendSV runs at the lowest priority. */
+                    SecureInit_DePrioritizeNSExceptions();
 
-			/* Setup the context of the first task so that the first task starts
-			 * executing. */
-			vRestoreContextOfFirstTask();
-		}
-		break;
+                    /* Initialize the secure context management system. */
+                    SecureContext_Init();
+                }
+            #endif /* configENABLE_TRUSTZONE */
 
-		#if( configENABLE_MPU == 1 )
-			case portSVC_RAISE_PRIVILEGE:
-			{
-				/* Only raise the privilege, if the svc was raised from any of
-				 * the system calls. */
-				if( ulPC >= ( uint32_t ) __syscalls_flash_start__ &&
-					ulPC <= ( uint32_t ) __syscalls_flash_end__ )
-				{
-					vRaisePrivilege();
-				}
-			}
-			break;
-		#endif /* configENABLE_MPU */
+            #if ( configENABLE_FPU == 1 )
+                {
+                    /* Setup the Floating Point Unit (FPU). */
+                    prvSetupFPU();
+                }
+            #endif /* configENABLE_FPU */
 
-		default:
-		{
-			/* Incorrect SVC call. */
-			configASSERT( pdFALSE );
-		}
-	}
+            /* Setup the context of the first task so that the first task starts
+             * executing. */
+            vRestoreContextOfFirstTask();
+            break;
+
+            #if ( configENABLE_MPU == 1 )
+                case portSVC_RAISE_PRIVILEGE:
+
+                    /* Only raise the privilege, if the svc was raised from any of
+                     * the system calls. */
+                    if( ( ulPC >= ( uint32_t ) __syscalls_flash_start__ ) &&
+                        ( ulPC <= ( uint32_t ) __syscalls_flash_end__ ) )
+                    {
+                        vRaisePrivilege();
+                    }
+                    break;
+            #endif /* configENABLE_MPU */
+
+        default:
+            /* Incorrect SVC call. */
+            configASSERT( pdFALSE );
+    }
 }
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */
+/* *INDENT-OFF* */
+#if ( configENABLE_MPU == 1 )
+    StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                         StackType_t * pxEndOfStack,
+                                         TaskFunction_t pxCode,
+                                         void * pvParameters,
+                                         BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */
 #else
-	StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters ) /* PRIVILEGED_FUNCTION */
+    StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                         StackType_t * pxEndOfStack,
+                                         TaskFunction_t pxCode,
+                                         void * pvParameters )       /* PRIVILEGED_FUNCTION */
 #endif /* configENABLE_MPU */
+/* *INDENT-ON* */
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	 * interrupt. */
-	#if( portPRELOAD_REGISTERS == 0 )
-	{
-		pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-		*pxTopOfStack = portINITIAL_XPSR;							/* xPSR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxCode;						/* PC */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
-		pxTopOfStack -= 5;											/* R12, R3, R2 and R1. */
-		*pxTopOfStack = ( StackType_t ) pvParameters;				/* R0 */
-		pxTopOfStack -= 9;											/* R11..R4, EXC_RETURN. */
-		*pxTopOfStack = portINITIAL_EXC_RETURN;
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
+    #if ( portPRELOAD_REGISTERS == 0 )
+        {
+            pxTopOfStack--;                                          /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+            *pxTopOfStack = portINITIAL_XPSR;                        /* xPSR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxCode;                  /* PC */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
+            pxTopOfStack -= 5;                                       /* R12, R3, R2 and R1. */
+            *pxTopOfStack = ( StackType_t ) pvParameters;            /* R0 */
+            pxTopOfStack -= 9;                                       /* R11..R4, EXC_RETURN. */
+            *pxTopOfStack = portINITIAL_EXC_RETURN;
 
-		#if( configENABLE_MPU == 1 )
-		{
-			pxTopOfStack--;
-			if( xRunPrivileged == pdTRUE )
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED;		/* Slot used to hold this task's CONTROL value. */
-			}
-			else
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED;	/* Slot used to hold this task's CONTROL value. */
-			}
-		}
-		#endif /* configENABLE_MPU */
+            #if ( configENABLE_MPU == 1 )
+                {
+                    pxTopOfStack--;
 
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxEndOfStack;	/* Slot used to hold this task's PSPLIM value. */
+                    if( xRunPrivileged == pdTRUE )
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                    else
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                }
+            #endif /* configENABLE_MPU */
 
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			pxTopOfStack--;
-			*pxTopOfStack = portNO_SECURE_CONTEXT;		/* Slot used to hold this task's xSecureContext value. */
-		}
-		#endif /* configENABLE_TRUSTZONE */
-	}
-	#else /* portPRELOAD_REGISTERS */
-	{
-		pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-		*pxTopOfStack = portINITIAL_XPSR;							/* xPSR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxCode;						/* PC */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x12121212UL;				/* R12 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x03030303UL;				/* R3 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x02020202UL;				/* R2 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x01010101UL;				/* R1 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pvParameters;				/* R0 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x11111111UL;				/* R11 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x10101010UL;				/* R10 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x09090909UL;				/* R09 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x08080808UL;				/* R08 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x07070707UL;				/* R07 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x06060606UL;				/* R06 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x05050505UL;				/* R05 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x04040404UL;				/* R04 */
-		pxTopOfStack--;
-		*pxTopOfStack = portINITIAL_EXC_RETURN;						/* EXC_RETURN */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */
 
-		#if( configENABLE_MPU == 1 )
-		{
-			pxTopOfStack--;
-			if( xRunPrivileged == pdTRUE )
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED;		/* Slot used to hold this task's CONTROL value. */
-			}
-			else
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED;	/* Slot used to hold this task's CONTROL value. */
-			}
-		}
-		#endif /* configENABLE_MPU */
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    pxTopOfStack--;
+                    *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */
+                }
+            #endif /* configENABLE_TRUSTZONE */
+        }
+    #else /* portPRELOAD_REGISTERS */
+        {
+            pxTopOfStack--;                                          /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+            *pxTopOfStack = portINITIAL_XPSR;                        /* xPSR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxCode;                  /* PC */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x12121212UL;            /* R12 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x03030303UL;            /* R3 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x02020202UL;            /* R2 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x01010101UL;            /* R1 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pvParameters;            /* R0 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x11111111UL;            /* R11 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x10101010UL;            /* R10 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x09090909UL;            /* R09 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x08080808UL;            /* R08 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x07070707UL;            /* R07 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x06060606UL;            /* R06 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x05050505UL;            /* R05 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x04040404UL;            /* R04 */
+            pxTopOfStack--;
+            *pxTopOfStack = portINITIAL_EXC_RETURN;                  /* EXC_RETURN */
 
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxEndOfStack;	/* Slot used to hold this task's PSPLIM value. */
+            #if ( configENABLE_MPU == 1 )
+                {
+                    pxTopOfStack--;
 
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			pxTopOfStack--;
-			*pxTopOfStack = portNO_SECURE_CONTEXT;		/* Slot used to hold this task's xSecureContext value. */
-		}
-		#endif /* configENABLE_TRUSTZONE */
-	}
-	#endif /* portPRELOAD_REGISTERS */
+                    if( xRunPrivileged == pdTRUE )
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                    else
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                }
+            #endif /* configENABLE_MPU */
 
-	return pxTopOfStack;
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */
+
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    pxTopOfStack--;
+                    *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */
+                }
+            #endif /* configENABLE_TRUSTZONE */
+        }
+    #endif /* portPRELOAD_REGISTERS */
+
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
 {
-	/* Make PendSV, CallSV and SysTick the same priority as the kernel. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+    /* Make PendSV, CallSV and SysTick the same priority as the kernel. */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
-	#if( configENABLE_MPU == 1 )
-	{
-		/* Setup the Memory Protection Unit (MPU). */
-		prvSetupMPU();
-	}
-	#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        {
+            /* Setup the Memory Protection Unit (MPU). */
+            prvSetupMPU();
+        }
+    #endif /* configENABLE_MPU */
 
-	/* Start the timer that generates the tick ISR. Interrupts are disabled
-	 * here already. */
-	vPortSetupTimerInterrupt();
+    /* Start the timer that generates the tick ISR. Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
 
-	/* Initialize the critical nesting count ready for the first task. */
-	ulCriticalNesting = 0;
+    /* Initialize the critical nesting count ready for the first task. */
+    ulCriticalNesting = 0;
 
-	/* Start the first task. */
-	vStartFirstTask();
+    /* Start the first task. */
+    vStartFirstTask();
 
-	/* Should never get here as the tasks will now be executing. Call the task
-	 * exit error function to prevent compiler warnings about a static function
-	 * not being called in the case that the application writer overrides this
-	 * functionality by defining configTASK_RETURN_ADDRESS. Call
-	 * vTaskSwitchContext() so link time optimization does not remove the
-	 * symbol. */
-	vTaskSwitchContext();
-	prvTaskExitError();
+    /* Should never get here as the tasks will now be executing. Call the task
+     * exit error function to prevent compiler warnings about a static function
+     * not being called in the case that the application writer overrides this
+     * functionality by defining configTASK_RETURN_ADDRESS. Call
+     * vTaskSwitchContext() so link time optimization does not remove the
+     * symbol. */
+    vTaskSwitchContext();
+    prvTaskExitError();
 
-	/* Should not get here. */
-	return 0;
+    /* Should not get here. */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
 {
-	/* Not implemented in ports where there is nothing to return to.
-	 * Artificially force an assert. */
-	configASSERT( ulCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( ulCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t ulStackDepth )
-	{
-	uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
-	int32_t lIndex = 0;
+#if ( configENABLE_MPU == 1 )
+    void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
+                                    const struct xMEMORY_REGION * const xRegions,
+                                    StackType_t * pxBottomOfStack,
+                                    uint32_t ulStackDepth )
+    {
+        uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
+        int32_t lIndex = 0;
 
-		/* Setup MAIR0. */
-		xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
-		xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
+        #if defined( __ARMCC_VERSION )
 
-		/* This function is called automatically when the task is created - in
-		 * which case the stack region parameters will be valid.  At all other
-		 * times the stack parameters will not be valid and it is assumed that
-		 * the stack region has already been configured. */
-		if( ulStackDepth > 0 )
-		{
-			/* Define the region that allows access to the stack. */
-			ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK;
-			ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1;
-			ulRegionEndAddress  &= portMPU_RLAR_ADDRESS_MASK;
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __privileged_sram_start__;
+            extern uint32_t * __privileged_sram_end__;
+        #else
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __privileged_sram_start__[];
+            extern uint32_t __privileged_sram_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
 
-			xMPUSettings->xRegionsSettings[ 0 ].ulRBAR =	( ulRegionStartAddress ) |
-															( portMPU_REGION_NON_SHAREABLE ) |
-															( portMPU_REGION_READ_WRITE ) |
-															( portMPU_REGION_EXECUTE_NEVER );
+        /* Setup MAIR0. */
+        xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
+        xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
 
-			xMPUSettings->xRegionsSettings[ 0 ].ulRLAR =	( ulRegionEndAddress ) |
-															( portMPU_RLAR_ATTR_INDEX0 ) |
-															( portMPU_RLAR_REGION_ENABLE );
-		}
+        /* This function is called automatically when the task is created - in
+         * which case the stack region parameters will be valid.  At all other
+         * times the stack parameters will not be valid and it is assumed that
+         * the stack region has already been configured. */
+        if( ulStackDepth > 0 )
+        {
+            ulRegionStartAddress = ( uint32_t ) pxBottomOfStack;
+            ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1;
 
-		/* User supplied configurable regions. */
-		for( ulRegionNumber = 1; ulRegionNumber <= portNUM_CONFIGURABLE_REGIONS; ulRegionNumber++ )
-		{
-			/* If xRegions is NULL i.e. the task has not specified any MPU
-			 * region, the else part ensures that all the configurable MPU
-			 * regions are invalidated. */
-			if( ( xRegions != NULL ) && ( xRegions[ lIndex ].ulLengthInBytes > 0UL ) )
-			{
-				/* Translate the generic region definition contained in xRegions
-				 * into the ARMv8 specific MPU settings that are then stored in
-				 * xMPUSettings. */
-				ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK;
-				ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1;
-				ulRegionEndAddress  &= portMPU_RLAR_ADDRESS_MASK;
+            /* If the stack is within the privileged SRAM, do not protect it
+             * using a separate MPU region. This is needed because privileged
+             * SRAM is already protected using an MPU region and ARMv8-M does
+             * not allow overlapping MPU regions. */
+            if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
+                ( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
+            {
+                xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
+                xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;
+            }
+            else
+            {
+                /* Define the region that allows access to the stack. */
+                ulRegionStartAddress &= portMPU_RBAR_ADDRESS_MASK;
+                ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK;
 
-				/* Start address. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR =	( ulRegionStartAddress ) |
-																			( portMPU_REGION_NON_SHAREABLE );
+                xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) |
+                                                             ( portMPU_REGION_NON_SHAREABLE ) |
+                                                             ( portMPU_REGION_READ_WRITE ) |
+                                                             ( portMPU_REGION_EXECUTE_NEVER );
 
-				/* RO/RW. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_READ_ONLY ) != 0 )
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_ONLY );
-				}
-				else
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_WRITE );
-				}
+                xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = ( ulRegionEndAddress ) |
+                                                             ( portMPU_RLAR_ATTR_INDEX0 ) |
+                                                             ( portMPU_RLAR_REGION_ENABLE );
+            }
+        }
 
-				/* XN. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_EXECUTE_NEVER ) != 0 )
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_EXECUTE_NEVER );
-				}
+        /* User supplied configurable regions. */
+        for( ulRegionNumber = 1; ulRegionNumber <= portNUM_CONFIGURABLE_REGIONS; ulRegionNumber++ )
+        {
+            /* If xRegions is NULL i.e. the task has not specified any MPU
+             * region, the else part ensures that all the configurable MPU
+             * regions are invalidated. */
+            if( ( xRegions != NULL ) && ( xRegions[ lIndex ].ulLengthInBytes > 0UL ) )
+            {
+                /* Translate the generic region definition contained in xRegions
+                 * into the ARMv8 specific MPU settings that are then stored in
+                 * xMPUSettings. */
+                ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK;
+                ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1;
+                ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK;
 
-				/* End Address. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR =	( ulRegionEndAddress ) |
-																			( portMPU_RLAR_REGION_ENABLE );
+                /* Start address. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = ( ulRegionStartAddress ) |
+                                                                          ( portMPU_REGION_NON_SHAREABLE );
 
-				/* Normal memory/ Device memory. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
-				{
-					/* Attr1 in MAIR0 is configured as device memory. */
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX1;
-				}
-				else
-				{
-					/* Attr1 in MAIR0 is configured as normal memory. */
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
-				}
-			}
-			else
-			{
-				/* Invalidate the region. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = 0UL;
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = 0UL;
-			}
+                /* RO/RW. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_READ_ONLY ) != 0 )
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_ONLY );
+                }
+                else
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_WRITE );
+                }
 
-			lIndex++;
-		}
-	}
+                /* XN. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_EXECUTE_NEVER ) != 0 )
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_EXECUTE_NEVER );
+                }
+
+                /* End Address. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
+                                                                          ( portMPU_RLAR_REGION_ENABLE );
+
+                /* Normal memory/ Device memory. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
+                {
+                    /* Attr1 in MAIR0 is configured as device memory. */
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX1;
+                }
+                else
+                {
+                    /* Attr1 in MAIR0 is configured as normal memory. */
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
+                }
+            }
+            else
+            {
+                /* Invalidate the region. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = 0UL;
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = 0UL;
+            }
+
+            lIndex++;
+        }
+    }
 #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 BaseType_t xPortIsInsideInterrupt( void )
 {
-uint32_t ulCurrentInterrupt;
-BaseType_t xReturn;
+    uint32_t ulCurrentInterrupt;
+    BaseType_t xReturn;
 
-	/* Obtain the number of the currently executing interrupt. Interrupt Program
-	 * Status Register (IPSR) holds the exception number of the currently-executing
-	 * exception or zero for Thread mode.*/
-	__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+    /* Obtain the number of the currently executing interrupt. Interrupt Program
+     * Status Register (IPSR) holds the exception number of the currently-executing
+     * exception or zero for Thread mode.*/
+    __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
-	if( ulCurrentInterrupt == 0 )
-	{
-		xReturn = pdFALSE;
-	}
-	else
-	{
-		xReturn = pdTRUE;
-	}
+    if( ulCurrentInterrupt == 0 )
+    {
+        xReturn = pdFALSE;
+    }
+    else
+    {
+        xReturn = pdTRUE;
+    }
 
-	return xReturn;
+    return xReturn;
 }
-/*-----------------------------------------------------------*/
\ No newline at end of file
+/*-----------------------------------------------------------*/
diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c
index 1e3a4fc43..6038c5734 100644
--- a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c
+++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -41,276 +41,276 @@
 
 void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	.syntax unified									\n"
-	"													\n"
-	"	ldr  r2, pxCurrentTCBConst2						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr  r1, [r2]									\n" /* Read pxCurrentTCB. */
-	"	ldr  r0, [r1]									\n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	dmb												\n" /* Complete outstanding transfers before disabling MPU. */
-	"	ldr r2, xMPUCTRLConst2							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	bic r4, #1										\n" /* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Disable MPU. */
-	"													\n"
-	"	adds r1, #4										\n" /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
-	"	ldr  r3, [r1]									\n" /* r3 = *r1 i.e. r3 = MAIR0. */
-	"	ldr  r2, xMAIR0Const2							\n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-	"	str  r3, [r2]									\n" /* Program MAIR0. */
-	"	ldr  r2, xRNRConst2								\n" /* r2 = 0xe000ed98 [Location of RNR]. */
-	"	movs r3, #4										\n" /* r3 = 4. */
-	"	str  r3, [r2]									\n" /* Program RNR = 4. */
-	"	adds r1, #4										\n" /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
-	"	ldr  r2, xRBARConst2							\n" /* r2 = 0xe000ed9c [Location of RBAR]. */
-	"	ldmia r1!, {r4-r11}								\n" /* Read 4 set of RBAR/RLAR registers from TCB. */
-	"	stmia r2!, {r4-r11}								\n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-	"													\n"
-	"	ldr r2, xMPUCTRLConst2							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	orr r4, #1										\n" /* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Enable MPU. */
-	"	dsb												\n" /* Force memory writes before continuing. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	ldm  r0!, {r1-r3}								\n" /* Read from stack - r1 = PSPLIM, r2 = CONTROL and r3 = EXC_RETURN. */
-	"	msr  psplim, r1									\n" /* Set this task's PSPLIM value. */
-	"	msr  control, r2								\n" /* Set this task's CONTROL value. */
-	"	adds r0, #32									\n" /* Discard everything up to r0. */
-	"	msr  psp, r0									\n" /* This is now the new top of stack to use in the task. */
-	"	isb												\n"
-	"	bx   r3											\n" /* Finally, branch to EXC_RETURN. */
-	#else /* configENABLE_MPU */
-	"	ldm  r0!, {r1-r2}								\n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
-	"	msr  psplim, r1									\n" /* Set this task's PSPLIM value. */
-	"	movs r1, #2										\n" /* r1 = 2. */
-	"	msr  CONTROL, r1								\n" /* Switch to use PSP in the thread mode. */
-	"	adds r0, #32									\n" /* Discard everything up to r0. */
-	"	msr  psp, r0									\n" /* This is now the new top of stack to use in the task. */
-	"	isb												\n"
-	"	bx   r2											\n" /* Finally, branch to EXC_RETURN. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	"	.align 4										\n"
-	"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
-	#if( configENABLE_MPU == 1 )
-	"xMPUCTRLConst2: .word 0xe000ed94					\n"
-	"xMAIR0Const2: .word 0xe000edc0						\n"
-	"xRNRConst2: .word 0xe000ed98						\n"
-	"xRBARConst2: .word 0xe000ed9c						\n"
-	#endif /* configENABLE_MPU */
-	);
+    __asm volatile
+    (
+        "	.syntax unified									\n"
+        "													\n"
+        "	ldr  r2, pxCurrentTCBConst2						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr  r1, [r2]									\n"/* Read pxCurrentTCB. */
+        "	ldr  r0, [r1]									\n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	dmb												\n"/* Complete outstanding transfers before disabling MPU. */
+            "	ldr r2, xMPUCTRLConst2							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	bic r4, #1										\n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
+            "	str r4, [r2]									\n"/* Disable MPU. */
+            "													\n"
+            "	adds r1, #4										\n"/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
+            "	ldr  r3, [r1]									\n"/* r3 = *r1 i.e. r3 = MAIR0. */
+            "	ldr  r2, xMAIR0Const2							\n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "	str  r3, [r2]									\n"/* Program MAIR0. */
+            "	ldr  r2, xRNRConst2								\n"/* r2 = 0xe000ed98 [Location of RNR]. */
+            "	movs r3, #4										\n"/* r3 = 4. */
+            "	str  r3, [r2]									\n"/* Program RNR = 4. */
+            "	adds r1, #4										\n"/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
+            "	ldr  r2, xRBARConst2							\n"/* r2 = 0xe000ed9c [Location of RBAR]. */
+            "	ldmia r1!, {r4-r11}								\n"/* Read 4 set of RBAR/RLAR registers from TCB. */
+            "	stmia r2!, {r4-r11}								\n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "													\n"
+            "	ldr r2, xMPUCTRLConst2							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	orr r4, #1										\n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
+            "	str r4, [r2]									\n"/* Enable MPU. */
+            "	dsb												\n"/* Force memory writes before continuing. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	ldm  r0!, {r1-r3}								\n"/* Read from stack - r1 = PSPLIM, r2 = CONTROL and r3 = EXC_RETURN. */
+            "	msr  psplim, r1									\n"/* Set this task's PSPLIM value. */
+            "	msr  control, r2								\n"/* Set this task's CONTROL value. */
+            "	adds r0, #32									\n"/* Discard everything up to r0. */
+            "	msr  psp, r0									\n"/* This is now the new top of stack to use in the task. */
+            "	isb												\n"
+            "	bx   r3											\n"/* Finally, branch to EXC_RETURN. */
+        #else /* configENABLE_MPU */
+            "	ldm  r0!, {r1-r2}								\n"/* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
+            "	msr  psplim, r1									\n"/* Set this task's PSPLIM value. */
+            "	movs r1, #2										\n"/* r1 = 2. */
+            "	msr  CONTROL, r1								\n"/* Switch to use PSP in the thread mode. */
+            "	adds r0, #32									\n"/* Discard everything up to r0. */
+            "	msr  psp, r0									\n"/* This is now the new top of stack to use in the task. */
+            "	isb												\n"
+            "	bx   r2											\n"/* Finally, branch to EXC_RETURN. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        "	.align 4										\n"
+        "pxCurrentTCBConst2: .word pxCurrentTCB				\n"
+        #if ( configENABLE_MPU == 1 )
+            "xMPUCTRLConst2: .word 0xe000ed94					\n"
+            "xMAIR0Const2: .word 0xe000edc0						\n"
+            "xRNRConst2: .word 0xe000ed98						\n"
+            "xRBARConst2: .word 0xe000ed9c						\n"
+        #endif /* configENABLE_MPU */
+    );
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
 {
-	__asm volatile
-	(
-	"	mrs r0, control									\n" /* r0 = CONTROL. */
-	"	tst r0, #1										\n" /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
-	"	ite ne											\n"
-	"	movne r0, #0									\n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
-	"	moveq r0, #1									\n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
-	"	bx lr											\n" /* Return. */
-	"													\n"
-	"	.align 4										\n"
-	::: "r0", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, control									\n"/* r0 = CONTROL. */
+        "	tst r0, #1										\n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
+        "	ite ne											\n"
+        "	movne r0, #0									\n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
+        "	moveq r0, #1									\n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
+        "	bx lr											\n"/* Return. */
+        "													\n"
+        "	.align 4										\n"
+        ::: "r0", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	 __asm volatile
-	(
-	"	mrs  r0, control								\n" /* Read the CONTROL register. */
-	"	bic r0, #1										\n" /* Clear the bit 0. */
-	"	msr  control, r0								\n" /* Write back the new CONTROL value. */
-	"	bx lr											\n" /* Return to the caller. */
-	::: "r0", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs  r0, control								\n"/* Read the CONTROL register. */
+        "	bic r0, #1										\n"/* Clear the bit 0. */
+        "	msr  control, r0								\n"/* Write back the new CONTROL value. */
+        "	bx lr											\n"/* Return to the caller. */
+        ::: "r0", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vResetPrivilege( void ) /* __attribute__ (( naked )) */
 {
-	__asm volatile
-	(
-	"	mrs r0, control									\n" /* r0 = CONTROL. */
-	"	orr r0, #1										\n" /* r0 = r0 | 1. */
-	"	msr control, r0									\n" /* CONTROL = r0. */
-	"	bx lr											\n" /* Return to the caller. */
-	:::"r0", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, control									\n"/* r0 = CONTROL. */
+        "	orr r0, #1										\n"/* r0 = r0 | 1. */
+        "	msr control, r0									\n"/* CONTROL = r0. */
+        "	bx lr											\n"/* Return to the caller. */
+        ::: "r0", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	ldr r0, xVTORConst								\n" /* Use the NVIC offset register to locate the stack. */
-	"	ldr r0, [r0]									\n" /* Read the VTOR register which gives the address of vector table. */
-	"	ldr r0, [r0]									\n" /* The first entry in vector table is stack pointer. */
-	"	msr msp, r0										\n" /* Set the MSP back to the start of the stack. */
-	"	cpsie i											\n" /* Globally enable interrupts. */
-	"	cpsie f											\n"
-	"	dsb												\n"
-	"	isb												\n"
-	"	svc %0											\n" /* System call to start the first task. */
-	"	nop												\n"
-	"													\n"
-	"   .align 4										\n"
-	"xVTORConst: .word 0xe000ed08						\n"
-	:: "i" ( portSVC_START_SCHEDULER ) : "memory"
-	);
+    __asm volatile
+    (
+        "	ldr r0, xVTORConst								\n"/* Use the NVIC offset register to locate the stack. */
+        "	ldr r0, [r0]									\n"/* Read the VTOR register which gives the address of vector table. */
+        "	ldr r0, [r0]									\n"/* The first entry in vector table is stack pointer. */
+        "	msr msp, r0										\n"/* Set the MSP back to the start of the stack. */
+        "	cpsie i											\n"/* Globally enable interrupts. */
+        "	cpsie f											\n"
+        "	dsb												\n"
+        "	isb												\n"
+        "	svc %0											\n"/* System call to start the first task. */
+        "	nop												\n"
+        "													\n"
+        "   .align 4										\n"
+        "xVTORConst: .word 0xe000ed08						\n"
+        ::"i" ( portSVC_START_SCHEDULER ) : "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	mrs r0, basepri									\n" /* r0 = basepri. Return original basepri value. */
-	"	mov r1, %0										\n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-	"	msr basepri, r1									\n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-	"	dsb												\n"
-	"	isb												\n"
-	"	bx lr											\n" /* Return. */
-	:: "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, basepri									\n"/* r0 = basepri. Return original basepri value. */
+        "	mov r1, %0										\n"/* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+        "	msr basepri, r1									\n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+        "	dsb												\n"
+        "	isb												\n"
+        "	bx lr											\n"/* Return. */
+        ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	msr basepri, r0									\n" /* basepri = ulMask. */
-	"	dsb												\n"
-	"	isb												\n"
-	"	bx lr											\n" /* Return. */
-	::: "memory"
-	);
+    __asm volatile
+    (
+        "	msr basepri, r0									\n"/* basepri = ulMask. */
+        "	dsb												\n"
+        "	isb												\n"
+        "	bx lr											\n"/* Return. */
+        ::: "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	.syntax unified									\n"
-	"													\n"
-	"	mrs r0, psp										\n" /* Read PSP in r0. */
-	#if( configENABLE_FPU == 1 )
-	"	tst lr, #0x10									\n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
-	"	it eq											\n"
-	"	vstmdbeq r0!, {s16-s31}							\n" /* Store the FPU registers which are not saved automatically. */
-	#endif /* configENABLE_FPU */
-	#if( configENABLE_MPU == 1 )
-	"	mrs r1, psplim									\n" /* r1 = PSPLIM. */
-	"	mrs r2, control									\n" /* r2 = CONTROL. */
-	"	mov r3, lr										\n" /* r3 = LR/EXC_RETURN. */
-	"	stmdb r0!, {r1-r11}								\n" /* Store on the stack - PSPLIM, CONTROL, LR and registers that are not automatically saved. */
-	#else /* configENABLE_MPU */
-	"	mrs r2, psplim									\n" /* r2 = PSPLIM. */
-	"	mov r3, lr										\n" /* r3 = LR/EXC_RETURN. */
-	"	stmdb r0!, {r2-r11}								\n" /* Store on the stack - PSPLIM, LR and registers that are not automatically saved. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	"	ldr r2, pxCurrentTCBConst						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr r1, [r2]									\n" /* Read pxCurrentTCB. */
-	"	str r0, [r1]									\n" /* Save the new top of stack in TCB. */
-	"													\n"
-	"	mov r0, %0										\n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
-	"	msr basepri, r0									\n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-	"	dsb												\n"
-	"	isb												\n"
-	"	bl vTaskSwitchContext							\n"
-	"	mov r0, #0										\n" /* r0 = 0. */
-	"	msr basepri, r0									\n" /* Enable interrupts. */
-	"													\n"
-	"	ldr r2, pxCurrentTCBConst						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr r1, [r2]									\n" /* Read pxCurrentTCB. */
-	"	ldr r0, [r1]									\n" /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	dmb												\n" /* Complete outstanding transfers before disabling MPU. */
-	"	ldr r2, xMPUCTRLConst							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	bic r4, #1										\n" /* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Disable MPU. */
-	"													\n"
-	"	adds r1, #4										\n" /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
-	"	ldr r3, [r1]									\n" /* r3 = *r1 i.e. r3 = MAIR0. */
-	"	ldr r2, xMAIR0Const								\n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-	"	str r3, [r2]									\n" /* Program MAIR0. */
-	"	ldr r2, xRNRConst								\n" /* r2 = 0xe000ed98 [Location of RNR]. */
-	"	movs r3, #4										\n" /* r3 = 4. */
-	"	str r3, [r2]									\n" /* Program RNR = 4. */
-	"	adds r1, #4										\n" /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
-	"	ldr r2, xRBARConst								\n" /* r2 = 0xe000ed9c [Location of RBAR]. */
-	"	ldmia r1!, {r4-r11}								\n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
-	"	stmia r2!, {r4-r11}								\n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-	"													\n"
-	"	ldr r2, xMPUCTRLConst							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	orr r4, #1										\n" /* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Enable MPU. */
-	"	dsb												\n" /* Force memory writes before continuing. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	ldmia r0!, {r1-r11}								\n" /* Read from stack - r1 = PSPLIM, r2 = CONTROL, r3 = LR and r4-r11 restored. */
-	#else /* configENABLE_MPU */
-	"	ldmia r0!, {r2-r11}								\n" /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	#if( configENABLE_FPU == 1 )
-	"	tst r3, #0x10									\n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
-	"	it eq											\n"
-	"	vldmiaeq r0!, {s16-s31}							\n" /* Restore the FPU registers which are not restored automatically. */
-	#endif /* configENABLE_FPU */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	msr psplim, r1									\n" /* Restore the PSPLIM register value for the task. */
-	"	msr control, r2									\n" /* Restore the CONTROL register value for the task. */
-	#else /* configENABLE_MPU */
-	"	msr psplim, r2									\n" /* Restore the PSPLIM register value for the task. */
-	#endif /* configENABLE_MPU */
-	"	msr psp, r0										\n" /* Remember the new top of stack for the task. */
-	"	bx r3											\n"
-	"													\n"
-	"	.align 4										\n"
-	"pxCurrentTCBConst: .word pxCurrentTCB				\n"
-	#if( configENABLE_MPU == 1 )
-	"xMPUCTRLConst: .word 0xe000ed94					\n"
-	"xMAIR0Const: .word 0xe000edc0						\n"
-	"xRNRConst: .word 0xe000ed98						\n"
-	"xRBARConst: .word 0xe000ed9c						\n"
-	#endif /* configENABLE_MPU */
-	:: "i"( configMAX_SYSCALL_INTERRUPT_PRIORITY )
-	);
+    __asm volatile
+    (
+        "	.syntax unified									\n"
+        "													\n"
+        "	mrs r0, psp										\n"/* Read PSP in r0. */
+        #if ( configENABLE_FPU == 1 )
+            "	tst lr, #0x10									\n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
+            "	it eq											\n"
+            "	vstmdbeq r0!, {s16-s31}							\n"/* Store the FPU registers which are not saved automatically. */
+        #endif /* configENABLE_FPU */
+        #if ( configENABLE_MPU == 1 )
+            "	mrs r1, psplim									\n"/* r1 = PSPLIM. */
+            "	mrs r2, control									\n"/* r2 = CONTROL. */
+            "	mov r3, lr										\n"/* r3 = LR/EXC_RETURN. */
+            "	stmdb r0!, {r1-r11}								\n"/* Store on the stack - PSPLIM, CONTROL, LR and registers that are not automatically saved. */
+        #else /* configENABLE_MPU */
+            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
+            "	mov r3, lr										\n"/* r3 = LR/EXC_RETURN. */
+            "	stmdb r0!, {r2-r11}								\n"/* Store on the stack - PSPLIM, LR and registers that are not automatically saved. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        "	ldr r2, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr r1, [r2]									\n"/* Read pxCurrentTCB. */
+        "	str r0, [r1]									\n"/* Save the new top of stack in TCB. */
+        "													\n"
+        "	mov r0, %0										\n"/* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
+        "	msr basepri, r0									\n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+        "	dsb												\n"
+        "	isb												\n"
+        "	bl vTaskSwitchContext							\n"
+        "	mov r0, #0										\n"/* r0 = 0. */
+        "	msr basepri, r0									\n"/* Enable interrupts. */
+        "													\n"
+        "	ldr r2, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr r1, [r2]									\n"/* Read pxCurrentTCB. */
+        "	ldr r0, [r1]									\n"/* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	dmb												\n"/* Complete outstanding transfers before disabling MPU. */
+            "	ldr r2, xMPUCTRLConst							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	bic r4, #1										\n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
+            "	str r4, [r2]									\n"/* Disable MPU. */
+            "													\n"
+            "	adds r1, #4										\n"/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
+            "	ldr r3, [r1]									\n"/* r3 = *r1 i.e. r3 = MAIR0. */
+            "	ldr r2, xMAIR0Const								\n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "	str r3, [r2]									\n"/* Program MAIR0. */
+            "	ldr r2, xRNRConst								\n"/* r2 = 0xe000ed98 [Location of RNR]. */
+            "	movs r3, #4										\n"/* r3 = 4. */
+            "	str r3, [r2]									\n"/* Program RNR = 4. */
+            "	adds r1, #4										\n"/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
+            "	ldr r2, xRBARConst								\n"/* r2 = 0xe000ed9c [Location of RBAR]. */
+            "	ldmia r1!, {r4-r11}								\n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
+            "	stmia r2!, {r4-r11}								\n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "													\n"
+            "	ldr r2, xMPUCTRLConst							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
+            "	orr r4, #1										\n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
+            "	str r4, [r2]									\n"/* Enable MPU. */
+            "	dsb												\n"/* Force memory writes before continuing. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	ldmia r0!, {r1-r11}								\n"/* Read from stack - r1 = PSPLIM, r2 = CONTROL, r3 = LR and r4-r11 restored. */
+        #else /* configENABLE_MPU */
+            "	ldmia r0!, {r2-r11}								\n"/* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */
+        #endif /* configENABLE_MPU */
+        "													\n"
+        #if ( configENABLE_FPU == 1 )
+            "	tst r3, #0x10									\n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
+            "	it eq											\n"
+            "	vldmiaeq r0!, {s16-s31}							\n"/* Restore the FPU registers which are not restored automatically. */
+        #endif /* configENABLE_FPU */
+        "													\n"
+        #if ( configENABLE_MPU == 1 )
+            "	msr psplim, r1									\n"/* Restore the PSPLIM register value for the task. */
+            "	msr control, r2									\n"/* Restore the CONTROL register value for the task. */
+        #else /* configENABLE_MPU */
+            "	msr psplim, r2									\n"/* Restore the PSPLIM register value for the task. */
+        #endif /* configENABLE_MPU */
+        "	msr psp, r0										\n"/* Remember the new top of stack for the task. */
+        "	bx r3											\n"
+        "													\n"
+        "	.align 4										\n"
+        "pxCurrentTCBConst: .word pxCurrentTCB				\n"
+        #if ( configENABLE_MPU == 1 )
+            "xMPUCTRLConst: .word 0xe000ed94					\n"
+            "xMAIR0Const: .word 0xe000edc0						\n"
+            "xRNRConst: .word 0xe000ed98						\n"
+            "xRBARConst: .word 0xe000ed9c						\n"
+        #endif /* configENABLE_MPU */
+        ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
+    );
 }
 /*-----------------------------------------------------------*/
 
 void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 {
-	__asm volatile
-	(
-	"	tst lr, #4										\n"
-	"	ite eq											\n"
-	"	mrseq r0, msp									\n"
-	"	mrsne r0, psp									\n"
-	"	ldr r1, svchandler_address_const				\n"
-	"	bx r1											\n"
-	"													\n"
-	"	.align 4										\n"
-	"svchandler_address_const: .word vPortSVCHandler_C	\n"
-	);
+    __asm volatile
+    (
+        "	tst lr, #4										\n"
+        "	ite eq											\n"
+        "	mrseq r0, msp									\n"
+        "	mrsne r0, psp									\n"
+        "	ldr r1, svchandler_address_const				\n"
+        "	bx r1											\n"
+        "													\n"
+        "	.align 4										\n"
+        "svchandler_address_const: .word vPortSVCHandler_C	\n"
+    );
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h
index 71d711c69..6aaee8fc8 100644
--- a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h
+++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -38,14 +38,14 @@
  * @brief Restore the context of the first task so that the first task starts
  * executing.
  */
-void vRestoreContextOfFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vRestoreContextOfFirstTask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Checks whether or not the processor is privileged.
  *
  * @return 1 if the processor is already privileged, 0 otherwise.
  */
-BaseType_t xIsPrivileged( void ) __attribute__ (( naked ));
+BaseType_t xIsPrivileged( void ) __attribute__( ( naked ) );
 
 /**
  * @brief Raises the privilege level by clearing the bit 0 of the CONTROL
@@ -58,7 +58,7 @@ BaseType_t xIsPrivileged( void ) __attribute__ (( naked ));
  *  Bit[0] = 0 --> The processor is running privileged
  *  Bit[0] = 1 --> The processor is running unprivileged.
  */
-void vRaisePrivilege( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vRaisePrivilege( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
@@ -68,32 +68,32 @@ void vRaisePrivilege( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
  *  Bit[0] = 0 --> The processor is running privileged
  *  Bit[0] = 1 --> The processor is running unprivileged.
  */
-void vResetPrivilege( void ) __attribute__ (( naked ));
+void vResetPrivilege( void ) __attribute__( ( naked ) );
 
 /**
  * @brief Starts the first task.
  */
-void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vStartFirstTask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Disables interrupts.
  */
-uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
+uint32_t ulSetInterruptMask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Enables interrupts.
  */
-void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
+void vClearInterruptMask( uint32_t ulMask ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief PendSV Exception handler.
  */
-void PendSV_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void PendSV_Handler( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief SVC Handler.
  */
-void SVC_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void SVC_Handler( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Allocate a Secure context for the calling task.
@@ -101,13 +101,13 @@ void SVC_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
  * @param[in] ulSecureStackSize The size of the stack to be allocated on the
  * secure side for the calling task.
  */
-void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) __attribute__ (( naked ));
+void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) __attribute__( ( naked ) );
 
 /**
  * @brief Free the task's secure context.
  *
  * @param[in] pulTCB Pointer to the Task Control Block (TCB) of the task.
  */
-void vPortFreeSecureContext( uint32_t *pulTCB ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vPortFreeSecureContext( uint32_t * pulTCB ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 #endif /* __PORT_ASM_H__ */
diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h
index d2c849c77..851c22c8a 100644
--- a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h
+++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,18 +19,18 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*------------------------------------------------------------------------------
  * Port specific definitions.
@@ -42,109 +42,109 @@ extern "C" {
  *------------------------------------------------------------------------------
  */
 
-#ifndef configENABLE_FPU
-	#error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
-#endif /* configENABLE_FPU */
+    #ifndef configENABLE_FPU
+        #error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
+    #endif /* configENABLE_FPU */
 
-#ifndef configENABLE_MPU
-	#error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
-#endif /* configENABLE_MPU */
+    #ifndef configENABLE_MPU
+        #error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
+    #endif /* configENABLE_MPU */
 
-#ifndef configENABLE_TRUSTZONE
-	#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
-#endif /* configENABLE_TRUSTZONE */
+    #ifndef configENABLE_TRUSTZONE
+        #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
+    #endif /* configENABLE_TRUSTZONE */
 
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Type definitions.
  */
-#define portCHAR											char
-#define portFLOAT											float
-#define portDOUBLE											double
-#define portLONG											long
-#define portSHORT											short
-#define portSTACK_TYPE										uint32_t
-#define portBASE_TYPE										long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE										StackType_t;
-typedef long												BaseType_t;
-typedef unsigned long										UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	 * not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC							1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * Architecture specifics.
  */
-#define portARCH_NAME										"Cortex-M33"
-#define portSTACK_GROWTH									( -1 )
-#define portTICK_PERIOD_MS									( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT									8
-#define portNOP()
-#define portINLINE											__inline
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE								inline __attribute__(( always_inline ))
-#endif
-#define portHAS_STACK_OVERFLOW_CHECKING						1
-#define portDONT_DISCARD									__attribute__(( used ))
+    #define portARCH_NAME                      "Cortex-M33"
+    #define portSTACK_GROWTH                   ( -1 )
+    #define portTICK_PERIOD_MS                 ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT                 8
+    #define portNOP()
+    #define portINLINE                         __inline
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE               inline __attribute__( ( always_inline ) )
+    #endif
+    #define portHAS_STACK_OVERFLOW_CHECKING    1
+    #define portDONT_DISCARD                   __attribute__( ( used ) )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Extern declarations.
  */
-extern BaseType_t xPortIsInsideInterrupt( void );
+    extern BaseType_t xPortIsInsideInterrupt( void );
 
-extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
 
-extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
-extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
 
-extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
 
-#if( configENABLE_TRUSTZONE == 1 )
-	extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
-	extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
-#endif /* configENABLE_TRUSTZONE */
+    #if ( configENABLE_TRUSTZONE == 1 )
+        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
+        extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
+    #endif /* configENABLE_TRUSTZONE */
 
-#if( configENABLE_MPU == 1 )
-	extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
-	extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
+        extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief MPU specific constants.
  */
-#if( configENABLE_MPU == 1 )
-	#define portUSING_MPU_WRAPPERS							1
-	#define portPRIVILEGE_BIT								( 0x80000000UL )
-#else
-	#define portPRIVILEGE_BIT								( 0x0UL )
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        #define portUSING_MPU_WRAPPERS    1
+        #define portPRIVILEGE_BIT         ( 0x80000000UL )
+    #else
+        #define portPRIVILEGE_BIT         ( 0x0UL )
+    #endif /* configENABLE_MPU */
 
 
 /* MPU regions. */
-#define portPRIVILEGED_FLASH_REGION							( 0UL )
-#define portUNPRIVILEGED_FLASH_REGION						( 1UL )
-#define portUNPRIVILEGED_SYSCALLS_REGION					( 2UL )
-#define portPRIVILEGED_RAM_REGION							( 3UL )
-#define portSTACK_REGION									( 4UL )
-#define portFIRST_CONFIGURABLE_REGION						( 5UL )
-#define portLAST_CONFIGURABLE_REGION						( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS						( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS								( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
+    #define portPRIVILEGED_FLASH_REGION                   ( 0UL )
+    #define portUNPRIVILEGED_FLASH_REGION                 ( 1UL )
+    #define portUNPRIVILEGED_SYSCALLS_REGION              ( 2UL )
+    #define portPRIVILEGED_RAM_REGION                     ( 3UL )
+    #define portSTACK_REGION                              ( 4UL )
+    #define portFIRST_CONFIGURABLE_REGION                 ( 5UL )
+    #define portLAST_CONFIGURABLE_REGION                  ( 7UL )
+    #define portNUM_CONFIGURABLE_REGIONS                  ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
+    #define portTOTAL_NUM_REGIONS                         ( portNUM_CONFIGURABLE_REGIONS + 1 )   /* Plus one to make space for the stack region. */
 
 /* Device memory attributes used in MPU_MAIR registers.
  *
@@ -156,155 +156,157 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
  *				11 --> Device-GRE
  *  Bit[1:0] - 00, Reserved.
  */
-#define portMPU_DEVICE_MEMORY_nGnRnE						( 0x00 ) /* 0000 0000 */
-#define portMPU_DEVICE_MEMORY_nGnRE							( 0x04 ) /* 0000 0100 */
-#define portMPU_DEVICE_MEMORY_nGRE							( 0x08 ) /* 0000 1000 */
-#define portMPU_DEVICE_MEMORY_GRE							( 0x0C ) /* 0000 1100 */
+    #define portMPU_DEVICE_MEMORY_nGnRnE                  ( 0x00 )   /* 0000 0000 */
+    #define portMPU_DEVICE_MEMORY_nGnRE                   ( 0x04 )   /* 0000 0100 */
+    #define portMPU_DEVICE_MEMORY_nGRE                    ( 0x08 )   /* 0000 1000 */
+    #define portMPU_DEVICE_MEMORY_GRE                     ( 0x0C )   /* 0000 1100 */
 
 /* Normal memory attributes used in MPU_MAIR registers. */
-#define portMPU_NORMAL_MEMORY_NON_CACHEABLE					( 0x44 ) /* Non-cacheable. */
-#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE			( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
+    #define portMPU_NORMAL_MEMORY_NON_CACHEABLE           ( 0x44 )   /* Non-cacheable. */
+    #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE    ( 0xFF )   /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
 
 /* Attributes used in MPU_RBAR registers. */
-#define portMPU_REGION_NON_SHAREABLE						( 0UL << 3UL )
-#define portMPU_REGION_INNER_SHAREABLE						( 1UL << 3UL )
-#define portMPU_REGION_OUTER_SHAREABLE						( 2UL << 3UL )
+    #define portMPU_REGION_NON_SHAREABLE                  ( 0UL << 3UL )
+    #define portMPU_REGION_INNER_SHAREABLE                ( 1UL << 3UL )
+    #define portMPU_REGION_OUTER_SHAREABLE                ( 2UL << 3UL )
 
-#define portMPU_REGION_PRIVILEGED_READ_WRITE				( 0UL << 1UL )
-#define portMPU_REGION_READ_WRITE							( 1UL << 1UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY					( 2UL << 1UL )
-#define portMPU_REGION_READ_ONLY							( 3UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_WRITE          ( 0UL << 1UL )
+    #define portMPU_REGION_READ_WRITE                     ( 1UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_ONLY           ( 2UL << 1UL )
+    #define portMPU_REGION_READ_ONLY                      ( 3UL << 1UL )
 
-#define portMPU_REGION_EXECUTE_NEVER						( 1UL )
+    #define portMPU_REGION_EXECUTE_NEVER                  ( 1UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Settings to define an MPU region.
  */
-typedef struct MPURegionSettings
-{
-	uint32_t ulRBAR;	/**< RBAR for the region. */
-	uint32_t ulRLAR;	/**< RLAR for the region. */
-} MPURegionSettings_t;
+    typedef struct MPURegionSettings
+    {
+        uint32_t ulRBAR; /**< RBAR for the region. */
+        uint32_t ulRLAR; /**< RLAR for the region. */
+    } MPURegionSettings_t;
 
 /**
  * @brief MPU settings as stored in the TCB.
  */
-typedef struct MPU_SETTINGS
-{
-	uint32_t ulMAIR0;	/**< MAIR0 for the task containing attributes for all the 4 per task regions. */
-	MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
-} xMPU_SETTINGS;
+    typedef struct MPU_SETTINGS
+    {
+        uint32_t ulMAIR0;                                              /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
+        MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
+    } xMPU_SETTINGS;
 /*-----------------------------------------------------------*/
 
 /**
  * @brief SVC numbers.
  */
-#define portSVC_ALLOCATE_SECURE_CONTEXT						0
-#define portSVC_FREE_SECURE_CONTEXT							1
-#define portSVC_START_SCHEDULER								2
-#define portSVC_RAISE_PRIVILEGE								3
+    #define portSVC_ALLOCATE_SECURE_CONTEXT    0
+    #define portSVC_FREE_SECURE_CONTEXT        1
+    #define portSVC_START_SCHEDULER            2
+    #define portSVC_RAISE_PRIVILEGE            3
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Scheduler utilities.
  */
-#define portYIELD()											vPortYield()
-#define portNVIC_INT_CTRL_REG								( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT								( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired )			if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x )								portEND_SWITCHING_ISR( x )
+    #define portYIELD()                                 vPortYield()
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Critical section management.
  */
-#define portSET_INTERRUPT_MASK_FROM_ISR()					ulSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)				vClearInterruptMask( x )
-#define portDISABLE_INTERRUPTS()							ulSetInterruptMask()
-#define portENABLE_INTERRUPTS()								vClearInterruptMask( 0 )
-#define portENTER_CRITICAL()								vPortEnterCritical()
-#define portEXIT_CRITICAL()									vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulSetInterruptMask()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vClearInterruptMask( x )
+    #define portDISABLE_INTERRUPTS()                  ulSetInterruptMask()
+    #define portENABLE_INTERRUPTS()                   vClearInterruptMask( 0 )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Tickless idle/low power functionality.
  */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Task function macros as described on the FreeRTOS.org WEB site.
  */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters )		void vFunction( void *pvParameters )
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Allocate a secure context for the task.
-	 *
-	 * Tasks are not created with a secure context. Any task that is going to call
-	 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
-	 * secure context before it calls any secure function.
-	 *
-	 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
-	 */
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )	vPortAllocateSecureContext( ulSecureStackSize )
+    #if ( configENABLE_TRUSTZONE == 1 )
 
-	/**
-	 * @brief Called when a task is deleted to delete the task's secure context,
-	 * if it has one.
-	 *
-	 * @param[in] pxTCB The TCB of the task being deleted.
-	 */
-	#define portCLEAN_UP_TCB( pxTCB )							vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-#else
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-	#define portCLEAN_UP_TCB( pxTCB )
-#endif /* configENABLE_TRUSTZONE */
+/**
+ * @brief Allocate a secure context for the task.
+ *
+ * Tasks are not created with a secure context. Any task that is going to call
+ * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
+ * secure context before it calls any secure function.
+ *
+ * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
+ */
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )    vPortAllocateSecureContext( ulSecureStackSize )
+
+/**
+ * @brief Called when a task is deleted to delete the task's secure context,
+ * if it has one.
+ *
+ * @param[in] pxTCB The TCB of the task being deleted.
+ */
+        #define portCLEAN_UP_TCB( pxTCB )                           vPortFreeSecureContext( ( uint32_t * ) pxTCB )
+    #else
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
+        #define portCLEAN_UP_TCB( pxTCB )
+    #endif /* configENABLE_TRUSTZONE */
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Checks whether or not the processor is privileged.
-	 *
-	 * @return 1 if the processor is already privileged, 0 otherwise.
-	 */
-	#define portIS_PRIVILEGED()									xIsPrivileged()
+    #if ( configENABLE_MPU == 1 )
 
-	/**
-	 * @brief Raise an SVC request to raise privilege.
-	 *
-	 * The SVC handler checks that the SVC was raised from a system call and only
-	 * then it raises the privilege. If this is called from any other place,
-	 * the privilege is not raised.
-	 */
-	#define portRAISE_PRIVILEGE()								__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+/**
+ * @brief Checks whether or not the processor is privileged.
+ *
+ * @return 1 if the processor is already privileged, 0 otherwise.
+ */
+        #define portIS_PRIVILEGED()      xIsPrivileged()
 
-	/**
-	 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
-	 * register.
-	 */
-	#define portRESET_PRIVILEGE()								vResetPrivilege()
-#else
-	#define portIS_PRIVILEGED()
-	#define portRAISE_PRIVILEGE()
-	#define portRESET_PRIVILEGE()
-#endif /* configENABLE_MPU */
+/**
+ * @brief Raise an SVC request to raise privilege.
+ *
+ * The SVC handler checks that the SVC was raised from a system call and only
+ * then it raises the privilege. If this is called from any other place,
+ * the privilege is not raised.
+ */
+        #define portRAISE_PRIVILEGE()    __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+
+/**
+ * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
+ * register.
+ */
+        #define portRESET_PRIVILEGE()    vResetPrivilege()
+    #else
+        #define portIS_PRIVILEGED()
+        #define portRAISE_PRIVILEGE()
+        #define portRESET_PRIVILEGE()
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Barriers.
  */
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
+    #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
 /*-----------------------------------------------------------*/
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
diff --git a/portable/GCC/ARM_CM3_MPU/port.c b/portable/GCC/ARM_CM3_MPU/port.c
index 5693a2ff7..6e8f3f806 100644
--- a/portable/GCC/ARM_CM3_MPU/port.c
+++ b/portable/GCC/ARM_CM3_MPU/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,15 +19,14 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------
- * Implementation of functions defined in portable.h for the ARM CM3 port.
- *----------------------------------------------------------*/
+* Implementation of functions defined in portable.h for the ARM CM3 MPU port.
+*----------------------------------------------------------*/
 
 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
  * all the API functions to use the MPU wrappers.  That should only be done when
@@ -41,66 +40,67 @@
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
 #ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK	( 1UL << 2UL )
+    #define configSYSTICK_CLOCK_HZ    configCPU_CLOCK_HZ
+    /* Ensure the SysTick is clocked at the same frequency as the core. */
+    #define portNVIC_SYSTICK_CLK      ( 1UL << 2UL )
 #else
-	/* The way the SysTick is clocked is not modified in case it is not the same
-	 * as the core. */
-	#define portNVIC_SYSTICK_CLK	( 0 )
+
+/* The way the SysTick is clocked is not modified in case it is not the same
+ * as the core. */
+    #define portNVIC_SYSTICK_CLK    ( 0 )
 #endif
 
 /* Constants required to access and manipulate the NVIC. */
-#define portNVIC_SYSTICK_CTRL_REG				( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG				( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG		( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG					( *	( ( volatile uint32_t * ) 0xe000ed20 ) )
-#define portNVIC_SYSPRI1_REG					( * ( ( volatile uint32_t * ) 0xe000ed1c ) )
-#define portNVIC_SYS_CTRL_STATE_REG				( * ( ( volatile uint32_t * ) 0xe000ed24 ) )
-#define portNVIC_MEM_FAULT_ENABLE				( 1UL << 16UL )
+#define portNVIC_SYSTICK_CTRL_REG                 ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG                 ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG        ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SHPR3_REG                        ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SHPR2_REG                        ( *( ( volatile uint32_t * ) 0xe000ed1c ) )
+#define portNVIC_SYS_CTRL_STATE_REG               ( *( ( volatile uint32_t * ) 0xe000ed24 ) )
+#define portNVIC_MEM_FAULT_ENABLE                 ( 1UL << 16UL )
 
 /* Constants required to access and manipulate the MPU. */
-#define portMPU_TYPE_REG						( * ( ( volatile uint32_t * ) 0xe000ed90 ) )
-#define portMPU_REGION_BASE_ADDRESS_REG			( * ( ( volatile uint32_t * ) 0xe000ed9C ) )
-#define portMPU_REGION_ATTRIBUTE_REG			( * ( ( volatile uint32_t * ) 0xe000edA0 ) )
-#define portMPU_CTRL_REG						( * ( ( volatile uint32_t * ) 0xe000ed94 ) )
-#define portEXPECTED_MPU_TYPE_VALUE				( 8UL << 8UL ) /* 8 regions, unified. */
-#define portMPU_ENABLE							( 0x01UL )
-#define portMPU_BACKGROUND_ENABLE				( 1UL << 2UL )
-#define portPRIVILEGED_EXECUTION_START_ADDRESS	( 0UL )
-#define portMPU_REGION_VALID					( 0x10UL )
-#define portMPU_REGION_ENABLE					( 0x01UL )
-#define portPERIPHERALS_START_ADDRESS			0x40000000UL
-#define portPERIPHERALS_END_ADDRESS				0x5FFFFFFFUL
+#define portMPU_TYPE_REG                          ( *( ( volatile uint32_t * ) 0xe000ed90 ) )
+#define portMPU_REGION_BASE_ADDRESS_REG           ( *( ( volatile uint32_t * ) 0xe000ed9C ) )
+#define portMPU_REGION_ATTRIBUTE_REG              ( *( ( volatile uint32_t * ) 0xe000edA0 ) )
+#define portMPU_CTRL_REG                          ( *( ( volatile uint32_t * ) 0xe000ed94 ) )
+#define portEXPECTED_MPU_TYPE_VALUE               ( 8UL << 8UL ) /* 8 regions, unified. */
+#define portMPU_ENABLE                            ( 0x01UL )
+#define portMPU_BACKGROUND_ENABLE                 ( 1UL << 2UL )
+#define portPRIVILEGED_EXECUTION_START_ADDRESS    ( 0UL )
+#define portMPU_REGION_VALID                      ( 0x10UL )
+#define portMPU_REGION_ENABLE                     ( 0x01UL )
+#define portPERIPHERALS_START_ADDRESS             0x40000000UL
+#define portPERIPHERALS_END_ADDRESS               0x5FFFFFFFUL
 
 /* Constants required to access and manipulate the SysTick. */
-#define portNVIC_SYSTICK_INT					( 0x00000002UL )
-#define portNVIC_SYSTICK_ENABLE					( 0x00000001UL )
-#define portNVIC_PENDSV_PRI						( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
-#define portNVIC_SYSTICK_PRI					( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
-#define portNVIC_SVC_PRI						( ( ( uint32_t ) configMAX_SYSCALL_INTERRUPT_PRIORITY - 1UL ) << 24UL )
+#define portNVIC_SYSTICK_INT                      ( 0x00000002UL )
+#define portNVIC_SYSTICK_ENABLE                   ( 0x00000001UL )
+#define portNVIC_PENDSV_PRI                       ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
+#define portNVIC_SYSTICK_PRI                      ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
+#define portNVIC_SVC_PRI                          ( ( ( uint32_t ) configMAX_SYSCALL_INTERRUPT_PRIORITY - 1UL ) << 24UL )
 
 /* Constants required to set up the initial stack. */
-#define portINITIAL_XPSR						( 0x01000000 )
-#define portINITIAL_CONTROL_IF_UNPRIVILEGED		( 0x03 )
-#define portINITIAL_CONTROL_IF_PRIVILEGED		( 0x02 )
+#define portINITIAL_XPSR                          ( 0x01000000 )
+#define portINITIAL_CONTROL_IF_UNPRIVILEGED       ( 0x03 )
+#define portINITIAL_CONTROL_IF_PRIVILEGED         ( 0x02 )
 
 /* Constants required to check the validity of an interrupt priority. */
-#define portFIRST_USER_INTERRUPT_NUMBER			( 16 )
-#define portNVIC_IP_REGISTERS_OFFSET_16 		( 0xE000E3F0 )
-#define portAIRCR_REG							( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
-#define portMAX_8_BIT_VALUE						( ( uint8_t ) 0xff )
-#define portTOP_BIT_OF_BYTE						( ( uint8_t ) 0x80 )
-#define portMAX_PRIGROUP_BITS					( ( uint8_t ) 7 )
-#define portPRIORITY_GROUP_MASK					( 0x07UL << 8UL )
-#define portPRIGROUP_SHIFT						( 8UL )
+#define portFIRST_USER_INTERRUPT_NUMBER           ( 16 )
+#define portNVIC_IP_REGISTERS_OFFSET_16           ( 0xE000E3F0 )
+#define portAIRCR_REG                             ( *( ( volatile uint32_t * ) 0xE000ED0C ) )
+#define portMAX_8_BIT_VALUE                       ( ( uint8_t ) 0xff )
+#define portTOP_BIT_OF_BYTE                       ( ( uint8_t ) 0x80 )
+#define portMAX_PRIGROUP_BITS                     ( ( uint8_t ) 7 )
+#define portPRIORITY_GROUP_MASK                   ( 0x07UL << 8UL )
+#define portPRIGROUP_SHIFT                        ( 8UL )
 
 /* Offsets in the stack to the parameters when inside the SVC handler. */
-#define portOFFSET_TO_PC						( 6 )
+#define portOFFSET_TO_PC                          ( 6 )
 
 /* For strict compliance with the Cortex-M spec the task start address should
  * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
-#define portSTART_ADDRESS_MASK					( ( StackType_t ) 0xfffffffeUL )
+#define portSTART_ADDRESS_MASK                    ( ( StackType_t ) 0xfffffffeUL )
 /*-----------------------------------------------------------*/
 
 /*
@@ -125,27 +125,27 @@ void vPortSetupTimerInterrupt( void );
 /*
  * Standard FreeRTOS exception handlers.
  */
-void xPortPendSVHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
-void xPortSysTickHandler( void )  __attribute__ ((optimize("3"))) PRIVILEGED_FUNCTION;
-void vPortSVCHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void xPortPendSVHandler( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
+void xPortSysTickHandler( void )  __attribute__( ( optimize( "3" ) ) ) PRIVILEGED_FUNCTION;
+void vPortSVCHandler( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /*
  * Starts the scheduler by restoring the context of the first task to run.
  */
-static void prvRestoreContextOfFirstTask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
+static void prvRestoreContextOfFirstTask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /*
  * C portion of the SVC handler.  The SVC handler is split between an asm entry
  * and a C wrapper for simplicity of coding and maintenance.
  */
-static void prvSVCHandler( uint32_t *pulRegisters ) __attribute__(( noinline )) PRIVILEGED_FUNCTION;
+static void prvSVCHandler( uint32_t * pulRegisters ) __attribute__( ( noinline ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Checks whether or not the processor is privileged.
  *
  * @return 1 if the processor is already privileged, 0 otherwise.
  */
-BaseType_t xIsPrivileged( void ) __attribute__ (( naked ));
+BaseType_t xIsPrivileged( void ) __attribute__( ( naked ) );
 
 /**
  * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
@@ -155,7 +155,7 @@ BaseType_t xIsPrivileged( void ) __attribute__ (( naked ));
  *  Bit[0] = 0 --> The processor is running privileged
  *  Bit[0] = 1 --> The processor is running unprivileged.
  */
-void vResetPrivilege( void ) __attribute__ (( naked ));
+void vResetPrivilege( void ) __attribute__( ( naked ) );
 
 /**
  * @brief Calls the port specific code to raise the privilege.
@@ -182,173 +182,184 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
  * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
  */
 #if ( configASSERT_DEFINED == 1 )
-	 static uint8_t ucMaxSysCallPriority = 0;
-	 static uint32_t ulMaxPRIGROUPValue = 0;
-	 static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
+    static uint8_t ucMaxSysCallPriority = 0;
+    static uint32_t ulMaxPRIGROUPValue = 0;
+    static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
 #endif /* configASSERT_DEFINED */
 /*-----------------------------------------------------------*/
 
 /*
  * See header file for description.
  */
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged )
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters,
+                                     BaseType_t xRunPrivileged )
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	 * interrupt. */
-	pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
-	pxTopOfStack--;
-	*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;	/* PC */
-	pxTopOfStack--;
-	*pxTopOfStack = 0;	/* LR */
-	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
-	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
-	pxTopOfStack -= 9;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
+    pxTopOfStack--;                                                      /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+    *pxTopOfStack = portINITIAL_XPSR;                                    /* xPSR */
+    pxTopOfStack--;
+    *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
+    pxTopOfStack--;
+    *pxTopOfStack = 0;                                                   /* LR */
+    pxTopOfStack -= 5;                                                   /* R12, R3, R2 and R1. */
+    *pxTopOfStack = ( StackType_t ) pvParameters;                        /* R0 */
+    pxTopOfStack -= 9;                                                   /* R11, R10, R9, R8, R7, R6, R5 and R4. */
 
-	if( xRunPrivileged == pdTRUE )
-	{
-		*pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;
-	}
-	else
-	{
-		*pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;
-	}
+    if( xRunPrivileged == pdTRUE )
+    {
+        *pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;
+    }
+    else
+    {
+        *pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;
+    }
 
-	return pxTopOfStack;
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 void vPortSVCHandler( void )
 {
-	/* Assumes psp was in use. */
-	__asm volatile
-	(
-		#ifndef USE_PROCESS_STACK	/* Code should not be required if a main() is using the process stack. */
-			"	tst lr, #4						\n"
-			"	ite eq							\n"
-			"	mrseq r0, msp					\n"
-			"	mrsne r0, psp					\n"
-		#else
-			"	mrs r0, psp						\n"
-		#endif
-			"	b %0							\n"
-			::"i"(prvSVCHandler):"r0", "memory"
-	);
+    /* Assumes psp was in use. */
+    __asm volatile
+    (
+        #ifndef USE_PROCESS_STACK   /* Code should not be required if a main() is using the process stack. */
+            "	tst lr, #4						\n"
+            "	ite eq							\n"
+            "	mrseq r0, msp					\n"
+            "	mrsne r0, psp					\n"
+        #else
+            "	mrs r0, psp						\n"
+        #endif
+        "	b %0							\n"
+        ::"i" ( prvSVCHandler ) : "r0", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
-static void prvSVCHandler(	uint32_t *pulParam )
+static void prvSVCHandler( uint32_t * pulParam )
 {
-uint8_t ucSVCNumber;
-uint32_t ulPC;
-#if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 )
-	#if defined( __ARMCC_VERSION )
-		/* Declaration when these variable are defined in code instead of being
-		 * exported from linker scripts. */
-		extern uint32_t * __syscalls_flash_start__;
-		extern uint32_t * __syscalls_flash_end__;
-	#else
-		/* Declaration when these variable are exported from linker scripts. */
-		extern uint32_t __syscalls_flash_start__[];
-		extern uint32_t __syscalls_flash_end__[];
-	#endif /* #if defined( __ARMCC_VERSION ) */
-#endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */
+    uint8_t ucSVCNumber;
+    uint32_t ulPC;
 
-	/* The stack contains: r0, r1, r2, r3, r12, LR, PC and xPSR.  The first
-	 * argument (r0) is pulParam[ 0 ]. */
-	ulPC = pulParam[ portOFFSET_TO_PC ];
-	ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ];
+    #if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 )
+        #if defined( __ARMCC_VERSION )
 
-	switch( ucSVCNumber )
-	{
-		case portSVC_START_SCHEDULER	:	portNVIC_SYSPRI1_REG |= portNVIC_SVC_PRI;
-											prvRestoreContextOfFirstTask();
-											break;
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __syscalls_flash_start__;
+            extern uint32_t * __syscalls_flash_end__;
+        #else
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __syscalls_flash_start__[];
+            extern uint32_t __syscalls_flash_end__[];
+        #endif /* #if defined( __ARMCC_VERSION ) */
+    #endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */
 
-		case portSVC_YIELD				:	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-											/* Barriers are normally not required
-											 * but do ensure the code is completely
-											 * within the specified behaviour for the
-											 * architecture. */
-											__asm volatile( "dsb" ::: "memory" );
-											__asm volatile( "isb" );
+    /* The stack contains: r0, r1, r2, r3, r12, LR, PC and xPSR.  The first
+     * argument (r0) is pulParam[ 0 ]. */
+    ulPC = pulParam[ portOFFSET_TO_PC ];
+    ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ];
 
-											break;
+    switch( ucSVCNumber )
+    {
+        case portSVC_START_SCHEDULER:
+            portNVIC_SHPR2_REG |= portNVIC_SVC_PRI;
+            prvRestoreContextOfFirstTask();
+            break;
+
+        case portSVC_YIELD:
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+
+            /* Barriers are normally not required
+             * but do ensure the code is completely
+             * within the specified behaviour for the
+             * architecture. */
+            __asm volatile ( "dsb" ::: "memory" );
+            __asm volatile ( "isb" );
+
+            break;
 
 
-	#if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 )
-		case portSVC_RAISE_PRIVILEGE	:	/* Only raise the privilege, if the
-											 * svc was raised from any of the
-											 * system calls. */
-											if( ulPC >= ( uint32_t ) __syscalls_flash_start__ &&
-												ulPC <= ( uint32_t ) __syscalls_flash_end__ )
-											{
-												__asm volatile
-												(
-													"	mrs r1, control		\n" /* Obtain current control value. */
-													"	bic r1, #1			\n" /* Set privilege bit. */
-													"	msr control, r1		\n" /* Write back new control value. */
-													::: "r1", "memory"
-												);
-											}
-											break;
-	#else
-		case portSVC_RAISE_PRIVILEGE	:	__asm volatile
-											(
-												"	mrs r1, control		\n" /* Obtain current control value. */
-												"	bic r1, #1			\n" /* Set privilege bit. */
-												"	msr control, r1		\n" /* Write back new control value. */
-												::: "r1", "memory"
-											);
-											break;
-	#endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */
+            #if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 )
+                case portSVC_RAISE_PRIVILEGE: /* Only raise the privilege, if the
+                                               * svc was raised from any of the
+                                               * system calls. */
 
-		default							:	/* Unknown SVC call. */
-											break;
-	}
+                    if( ( ulPC >= ( uint32_t ) __syscalls_flash_start__ ) &&
+                        ( ulPC <= ( uint32_t ) __syscalls_flash_end__ ) )
+                    {
+                        __asm volatile
+                        (
+                            "	mrs r1, control		\n"/* Obtain current control value. */
+                            "	bic r1, #1			\n"/* Set privilege bit. */
+                            "	msr control, r1		\n"/* Write back new control value. */
+                            ::: "r1", "memory"
+                        );
+                    }
+
+                    break;
+            #else /* if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */
+                case portSVC_RAISE_PRIVILEGE:
+                    __asm volatile
+                    (
+                        "	mrs r1, control		\n"/* Obtain current control value. */
+                        "	bic r1, #1			\n"/* Set privilege bit. */
+                        "	msr control, r1		\n"/* Write back new control value. */
+                        ::: "r1", "memory"
+                    );
+                    break;
+                    #endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */
+
+                default: /* Unknown SVC call. */
+                    break;
+    }
 }
 /*-----------------------------------------------------------*/
 
 static void prvRestoreContextOfFirstTask( void )
 {
-	__asm volatile
-	(
-		"	ldr r0, =0xE000ED08				\n" /* Use the NVIC offset register to locate the stack. */
-		"	ldr r0, [r0]					\n"
-		"	ldr r0, [r0]					\n"
-		"	msr msp, r0						\n" /* Set the msp back to the start of the stack. */
-		"	ldr	r3, pxCurrentTCBConst2		\n" /* Restore the context. */
-		"	ldr r1, [r3]					\n"
-		"	ldr r0, [r1]					\n" /* The first item in the TCB is the task top of stack. */
-		"	add r1, r1, #4					\n" /* Move onto the second item in the TCB... */
-		"									\n"
-		"	dmb								\n" /* Complete outstanding transfers before disabling MPU. */
-		"	ldr r2, =0xe000ed94				\n" /* MPU_CTRL register. */
-		"	ldr r3, [r2]					\n" /* Read the value of MPU_CTRL. */
-		"	bic r3, #1						\n" /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
-		"	str r3, [r2]					\n" /* Disable MPU. */
-		"									\n"
-		"	ldr r2, =0xe000ed9c				\n" /* Region Base Address register. */
-		"	ldmia r1!, {r4-r11}				\n" /* Read 4 sets of MPU registers. */
-		"	stmia r2!, {r4-r11}				\n" /* Write 4 sets of MPU registers. */
-		"									\n"
-		"	ldr r2, =0xe000ed94				\n" /* MPU_CTRL register. */
-		"	ldr r3, [r2]					\n" /* Read the value of MPU_CTRL. */
-		"	orr r3, #1						\n" /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
-		"	str r3, [r2]					\n" /* Enable MPU. */
-		"	dsb								\n" /* Force memory writes before continuing. */
-		"									\n"
-		"	ldmia r0!, {r3, r4-r11}			\n" /* Pop the registers that are not automatically saved on exception entry. */
-		"	msr control, r3					\n"
-		"	msr psp, r0						\n" /* Restore the task stack pointer. */
-		"	mov r0, #0						\n"
-		"	msr	basepri, r0					\n"
-		"	ldr r14, =0xfffffffd			\n" /* Load exec return code. */
-		"	bx r14							\n"
-		"									\n"
-		"	.align 4						\n"
-		"pxCurrentTCBConst2: .word pxCurrentTCB	\n"
-	);
+    __asm volatile
+    (
+        "	ldr r0, =0xE000ED08				\n"/* Use the NVIC offset register to locate the stack. */
+        "	ldr r0, [r0]					\n"
+        "	ldr r0, [r0]					\n"
+        "	msr msp, r0						\n"/* Set the msp back to the start of the stack. */
+        "	ldr	r3, pxCurrentTCBConst2		\n"/* Restore the context. */
+        "	ldr r1, [r3]					\n"
+        "	ldr r0, [r1]					\n"/* The first item in the TCB is the task top of stack. */
+        "	add r1, r1, #4					\n"/* Move onto the second item in the TCB... */
+        "									\n"
+        "	dmb								\n"/* Complete outstanding transfers before disabling MPU. */
+        "	ldr r2, =0xe000ed94				\n"/* MPU_CTRL register. */
+        "	ldr r3, [r2]					\n"/* Read the value of MPU_CTRL. */
+        "	bic r3, #1						\n"/* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
+        "	str r3, [r2]					\n"/* Disable MPU. */
+        "									\n"
+        "	ldr r2, =0xe000ed9c				\n"/* Region Base Address register. */
+        "	ldmia r1!, {r4-r11}				\n"/* Read 4 sets of MPU registers. */
+        "	stmia r2!, {r4-r11}				\n"/* Write 4 sets of MPU registers. */
+        "									\n"
+        "	ldr r2, =0xe000ed94				\n"/* MPU_CTRL register. */
+        "	ldr r3, [r2]					\n"/* Read the value of MPU_CTRL. */
+        "	orr r3, #1						\n"/* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
+        "	str r3, [r2]					\n"/* Enable MPU. */
+        "	dsb								\n"/* Force memory writes before continuing. */
+        "									\n"
+        "	ldmia r0!, {r3, r4-r11}			\n"/* Pop the registers that are not automatically saved on exception entry. */
+        "	msr control, r3					\n"
+        "	msr psp, r0						\n"/* Restore the task stack pointer. */
+        "	mov r0, #0						\n"
+        "	msr	basepri, r0					\n"
+        "	ldr r14, =0xfffffffd			\n"/* Load exec return code. */
+        "	bx r14							\n"
+        "									\n"
+        "	.align 4						\n"
+        "pxCurrentTCBConst2: .word pxCurrentTCB	\n"
+    );
 }
 /*-----------------------------------------------------------*/
 
@@ -357,212 +368,216 @@ static void prvRestoreContextOfFirstTask( void )
  */
 BaseType_t xPortStartScheduler( void )
 {
-	/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See
-	 * http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
-	configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) );
+    /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See
+     * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
+    configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) );
 
-	#if( configASSERT_DEFINED == 1 )
-	{
-		volatile uint32_t ulOriginalPriority;
-		volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
-		volatile uint8_t ucMaxPriorityValue;
+    #if ( configASSERT_DEFINED == 1 )
+        {
+            volatile uint32_t ulOriginalPriority;
+            volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
+            volatile uint8_t ucMaxPriorityValue;
 
-		/* Determine the maximum priority from which ISR safe FreeRTOS API
-		 * functions can be called.  ISR safe functions are those that end in
-		 * "FromISR".  FreeRTOS maintains separate thread and ISR API functions
-		 * to ensure interrupt entry is as fast and simple as possible.
+            /* Determine the maximum priority from which ISR safe FreeRTOS API
+             * functions can be called.  ISR safe functions are those that end in
+             * "FromISR".  FreeRTOS maintains separate thread and ISR API functions
+             * to ensure interrupt entry is as fast and simple as possible.
+             *
+             * Save the interrupt priority value that is about to be clobbered. */
+            ulOriginalPriority = *pucFirstUserPriorityRegister;
 
-		 * Save the interrupt priority value that is about to be clobbered. */
-		ulOriginalPriority = *pucFirstUserPriorityRegister;
+            /* Determine the number of priority bits available.  First write to all
+             * possible bits. */
+            *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
 
-		/* Determine the number of priority bits available.  First write to all
-		 * possible bits. */
-		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
+            /* Read the value back to see how many bits stuck. */
+            ucMaxPriorityValue = *pucFirstUserPriorityRegister;
 
-		/* Read the value back to see how many bits stuck. */
-		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
+            /* Use the same mask on the maximum system call priority. */
+            ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
 
-		/* Use the same mask on the maximum system call priority. */
-		ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
+            /* Calculate the maximum acceptable priority group value for the number
+             * of bits read back. */
+            ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
 
-		/* Calculate the maximum acceptable priority group value for the number
-		 * of bits read back. */
-		ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
-		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
-		{
-			ulMaxPRIGROUPValue--;
-			ucMaxPriorityValue <<= ( uint8_t ) 0x01;
-		}
+            while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
+            {
+                ulMaxPRIGROUPValue--;
+                ucMaxPriorityValue <<= ( uint8_t ) 0x01;
+            }
 
-		#ifdef __NVIC_PRIO_BITS
-		{
-			/* Check the CMSIS configuration that defines the number of
-			 * priority bits matches the number of priority bits actually queried
-			 * from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
-		}
-		#endif
+            #ifdef __NVIC_PRIO_BITS
+                {
+                    /* Check the CMSIS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
+                }
+            #endif
 
-		#ifdef configPRIO_BITS
-		{
-			/* Check the FreeRTOS configuration that defines the number of
-			 * priority bits matches the number of priority bits actually queried
-			 * from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
-		}
-		#endif
+            #ifdef configPRIO_BITS
+                {
+                    /* Check the FreeRTOS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
+                }
+            #endif
 
-		/* Shift the priority group value back to its position within the AIRCR
-		 * register. */
-		ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
-		ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
+            /* Shift the priority group value back to its position within the AIRCR
+             * register. */
+            ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
+            ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
 
-		/* Restore the clobbered interrupt priority register to its original
-		 * value. */
-		*pucFirstUserPriorityRegister = ulOriginalPriority;
-	}
-	#endif /* conifgASSERT_DEFINED */
+            /* Restore the clobbered interrupt priority register to its original
+             * value. */
+            *pucFirstUserPriorityRegister = ulOriginalPriority;
+        }
+    #endif /* conifgASSERT_DEFINED */
 
-	/* Make PendSV and SysTick the same priority as the kernel, and the SVC
-	 * handler higher priority so it can be used to exit a critical section (where
-	 * lower priorities are masked). */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+    /* Make PendSV and SysTick the same priority as the kernel, and the SVC
+     * handler higher priority so it can be used to exit a critical section (where
+     * lower priorities are masked). */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
-	/* Configure the regions in the MPU that are common to all tasks. */
-	prvSetupMPU();
+    /* Configure the regions in the MPU that are common to all tasks. */
+    prvSetupMPU();
 
-	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-	 * here already. */
-	vPortSetupTimerInterrupt();
+    /* Start the timer that generates the tick ISR.  Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
 
-	/* Initialise the critical nesting count ready for the first task. */
-	uxCriticalNesting = 0;
+    /* Initialise the critical nesting count ready for the first task. */
+    uxCriticalNesting = 0;
 
-	/* Start the first task. */
-	__asm volatile(
-					" ldr r0, =0xE000ED08 	\n" /* Use the NVIC offset register to locate the stack. */
-					" ldr r0, [r0] 			\n"
-					" ldr r0, [r0] 			\n"
-					" msr msp, r0			\n" /* Set the msp back to the start of the stack. */
-					" cpsie i				\n" /* Globally enable interrupts. */
-					" cpsie f				\n"
-					" dsb					\n"
-					" isb					\n"
-					" svc %0				\n" /* System call to start first task. */
-					" nop					\n"
-					:: "i" (portSVC_START_SCHEDULER) : "memory" );
+    /* Start the first task. */
+    __asm volatile (
+        " ldr r0, =0xE000ED08 	\n"/* Use the NVIC offset register to locate the stack. */
+        " ldr r0, [r0] 			\n"
+        " ldr r0, [r0] 			\n"
+        " msr msp, r0			\n"/* Set the msp back to the start of the stack. */
+        " cpsie i				\n"/* Globally enable interrupts. */
+        " cpsie f				\n"
+        " dsb					\n"
+        " isb					\n"
+        " svc %0				\n"/* System call to start first task. */
+        " nop					\n"
+        " .ltorg				\n"
+        ::"i" ( portSVC_START_SCHEDULER ) : "memory" );
 
-	/* Should not get here! */
-	return 0;
+    /* Should not get here! */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void )
 {
-	/* Not implemented in ports where there is nothing to return to.
-	 * Artificially force an assert. */
-	configASSERT( uxCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( uxCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void )
 {
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	portDISABLE_INTERRUPTS();
-	uxCriticalNesting++;
+    portDISABLE_INTERRUPTS();
+    uxCriticalNesting++;
 
-	vPortResetPrivilege( xRunningPrivileged );
+    vPortResetPrivilege( xRunningPrivileged );
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void )
 {
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	configASSERT( uxCriticalNesting );
-	uxCriticalNesting--;
-	if( uxCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
-	vPortResetPrivilege( xRunningPrivileged );
+    configASSERT( uxCriticalNesting );
+    uxCriticalNesting--;
+
+    if( uxCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
+
+    vPortResetPrivilege( xRunningPrivileged );
 }
 /*-----------------------------------------------------------*/
 
 void xPortPendSVHandler( void )
 {
-	/* This is a naked function. */
+    /* This is a naked function. */
 
-	__asm volatile
-	(
-		"	mrs r0, psp							\n"
-		"										\n"
-		"	ldr	r3, pxCurrentTCBConst			\n" /* Get the location of the current TCB. */
-		"	ldr	r2, [r3]						\n"
-		"										\n"
-		"	mrs r1, control						\n"
-		"	stmdb r0!, {r1, r4-r11}				\n" /* Save the remaining registers. */
-		"	str r0, [r2]						\n" /* Save the new top of stack into the first member of the TCB. */
-		"										\n"
-		"	stmdb sp!, {r3, r14}				\n"
-		"	mov r0, %0							\n"
-		"	msr basepri, r0						\n"
-		"	dsb									\n"
-		"	isb									\n"
-		"	bl vTaskSwitchContext				\n"
-		"	mov r0, #0							\n"
-		"	msr basepri, r0						\n"
-		"	ldmia sp!, {r3, r14}				\n"
-		"										\n"	/* Restore the context. */
-		"	ldr r1, [r3]						\n"
-		"	ldr r0, [r1]						\n" /* The first item in the TCB is the task top of stack. */
-		"	add r1, r1, #4						\n" /* Move onto the second item in the TCB... */
-		"										\n"
-		"	dmb									\n" /* Complete outstanding transfers before disabling MPU. */
-		"	ldr r2, =0xe000ed94					\n" /* MPU_CTRL register. */
-		"	ldr r3, [r2]						\n" /* Read the value of MPU_CTRL. */
-		"	bic r3, #1							\n" /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
-		"	str r3, [r2]						\n" /* Disable MPU. */
-		"										\n"
-		"	ldr r2, =0xe000ed9c					\n" /* Region Base Address register. */
-		"	ldmia r1!, {r4-r11}					\n" /* Read 4 sets of MPU registers. */
-		"	stmia r2!, {r4-r11}					\n" /* Write 4 sets of MPU registers. */
-		"										\n"
-		"	ldr r2, =0xe000ed94					\n" /* MPU_CTRL register. */
-		"	ldr r3, [r2]						\n" /* Read the value of MPU_CTRL. */
-		"	orr r3, #1							\n" /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
-		"	str r3, [r2]						\n" /* Enable MPU. */
-		"	dsb									\n" /* Force memory writes before continuing. */
-		"										\n"
-		"	ldmia r0!, {r3, r4-r11}				\n" /* Pop the registers that are not automatically saved on exception entry. */
-		"	msr control, r3						\n"
-		"										\n"
-		"	msr psp, r0							\n"
-		"	bx r14								\n"
-		"										\n"
-		"	.align 4							\n"
-		"pxCurrentTCBConst: .word pxCurrentTCB	\n"
-		::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
-	);
+    __asm volatile
+    (
+        "	mrs r0, psp							\n"
+        "										\n"
+        "	ldr	r3, pxCurrentTCBConst			\n"/* Get the location of the current TCB. */
+        "	ldr	r2, [r3]						\n"
+        "										\n"
+        "	mrs r1, control						\n"
+        "	stmdb r0!, {r1, r4-r11}				\n"/* Save the remaining registers. */
+        "	str r0, [r2]						\n"/* Save the new top of stack into the first member of the TCB. */
+        "										\n"
+        "	stmdb sp!, {r3, r14}				\n"
+        "	mov r0, %0							\n"
+        "	msr basepri, r0						\n"
+        "	dsb									\n"
+        "	isb									\n"
+        "	bl vTaskSwitchContext				\n"
+        "	mov r0, #0							\n"
+        "	msr basepri, r0						\n"
+        "	ldmia sp!, {r3, r14}				\n"
+        "										\n"/* Restore the context. */
+        "	ldr r1, [r3]						\n"
+        "	ldr r0, [r1]						\n"/* The first item in the TCB is the task top of stack. */
+        "	add r1, r1, #4						\n"/* Move onto the second item in the TCB... */
+        "										\n"
+        "	dmb									\n"/* Complete outstanding transfers before disabling MPU. */
+        "	ldr r2, =0xe000ed94					\n"/* MPU_CTRL register. */
+        "	ldr r3, [r2]						\n"/* Read the value of MPU_CTRL. */
+        "	bic r3, #1							\n"/* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
+        "	str r3, [r2]						\n"/* Disable MPU. */
+        "										\n"
+        "	ldr r2, =0xe000ed9c					\n"/* Region Base Address register. */
+        "	ldmia r1!, {r4-r11}					\n"/* Read 4 sets of MPU registers. */
+        "	stmia r2!, {r4-r11}					\n"/* Write 4 sets of MPU registers. */
+        "										\n"
+        "	ldr r2, =0xe000ed94					\n"/* MPU_CTRL register. */
+        "	ldr r3, [r2]						\n"/* Read the value of MPU_CTRL. */
+        "	orr r3, #1							\n"/* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
+        "	str r3, [r2]						\n"/* Enable MPU. */
+        "	dsb									\n"/* Force memory writes before continuing. */
+        "										\n"
+        "	ldmia r0!, {r3, r4-r11}				\n"/* Pop the registers that are not automatically saved on exception entry. */
+        "	msr control, r3						\n"
+        "										\n"
+        "	msr psp, r0							\n"
+        "	bx r14								\n"
+        "										\n"
+        "	.align 4							\n"
+        "pxCurrentTCBConst: .word pxCurrentTCB	\n"
+        ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
+    );
 }
 /*-----------------------------------------------------------*/
 
 void xPortSysTickHandler( void )
 {
-uint32_t ulDummy;
+    uint32_t ulDummy;
 
-	ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* Pend a context switch. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
+    ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* Pend a context switch. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
 }
 /*-----------------------------------------------------------*/
 
@@ -570,288 +585,291 @@ uint32_t ulDummy;
  * Setup the systick timer to generate the tick interrupts at the required
  * frequency.
  */
-__attribute__(( weak )) void vPortSetupTimerInterrupt( void )
+__attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void )
 {
-	/* Stop and clear the SysTick. */
-	portNVIC_SYSTICK_CTRL_REG = 0UL;
-	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+    /* Stop and clear the SysTick. */
+    portNVIC_SYSTICK_CTRL_REG = 0UL;
+    portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-	/* Configure SysTick to interrupt at the requested rate. */
-	portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE );
+    /* Configure SysTick to interrupt at the requested rate. */
+    portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+    portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE );
 }
 /*-----------------------------------------------------------*/
 
 static void prvSetupMPU( void )
 {
-extern uint32_t __privileged_functions_start__[];
-extern uint32_t __privileged_functions_end__[];
-extern uint32_t __FLASH_segment_start__[];
-extern uint32_t __FLASH_segment_end__[];
-extern uint32_t __privileged_data_start__[];
-extern uint32_t __privileged_data_end__[];
+    extern uint32_t __privileged_functions_start__[];
+    extern uint32_t __privileged_functions_end__[];
+    extern uint32_t __FLASH_segment_start__[];
+    extern uint32_t __FLASH_segment_end__[];
+    extern uint32_t __privileged_data_start__[];
+    extern uint32_t __privileged_data_end__[];
 
-	/* Check the expected MPU is present. */
-	if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
-	{
-		/* First setup the unprivileged flash for unprivileged read only access. */
-		portMPU_REGION_BASE_ADDRESS_REG =	( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */
-											( portMPU_REGION_VALID ) |
-											( portUNPRIVILEGED_FLASH_REGION );
+    /* Check the expected MPU is present. */
+    if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
+    {
+        /* First setup the unprivileged flash for unprivileged read only access. */
+        portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */
+                                          ( portMPU_REGION_VALID ) |
+                                          ( portUNPRIVILEGED_FLASH_REGION );
 
-		portMPU_REGION_ATTRIBUTE_REG =	( portMPU_REGION_READ_ONLY ) |
-										( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
-										( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |
-										( portMPU_REGION_ENABLE );
+        portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_ONLY ) |
+                                       ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
+                                       ( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |
+                                       ( portMPU_REGION_ENABLE );
 
-		/* Setup the privileged flash for privileged only access.  This is where
-		 * the kernel code is * placed. */
-		portMPU_REGION_BASE_ADDRESS_REG =	( ( uint32_t ) __privileged_functions_start__ ) | /* Base address. */
-											( portMPU_REGION_VALID ) |
-											( portPRIVILEGED_FLASH_REGION );
+        /* Setup the privileged flash for privileged only access.  This is where
+         * the kernel code is * placed. */
+        portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __privileged_functions_start__ ) | /* Base address. */
+                                          ( portMPU_REGION_VALID ) |
+                                          ( portPRIVILEGED_FLASH_REGION );
 
-		portMPU_REGION_ATTRIBUTE_REG =	( portMPU_REGION_PRIVILEGED_READ_ONLY ) |
-										( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
-										( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __privileged_functions_start__ ) ) |
-										( portMPU_REGION_ENABLE );
+        portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |
+                                       ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
+                                       ( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __privileged_functions_start__ ) ) |
+                                       ( portMPU_REGION_ENABLE );
 
-		/* Setup the privileged data RAM region.  This is where the kernel data
-		 * is placed. */
-		portMPU_REGION_BASE_ADDRESS_REG =	( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
-											( portMPU_REGION_VALID ) |
-											( portPRIVILEGED_RAM_REGION );
+        /* Setup the privileged data RAM region.  This is where the kernel data
+         * is placed. */
+        portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
+                                          ( portMPU_REGION_VALID ) |
+                                          ( portPRIVILEGED_RAM_REGION );
 
-		portMPU_REGION_ATTRIBUTE_REG =	( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
-										( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
-										prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |
-										( portMPU_REGION_ENABLE );
+        portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
+                                       ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
+                                       prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |
+                                       ( portMPU_REGION_ENABLE );
 
-		/* By default allow everything to access the general peripherals.  The
-		 * system peripherals and registers are protected. */
-		portMPU_REGION_BASE_ADDRESS_REG =	( portPERIPHERALS_START_ADDRESS ) |
-											( portMPU_REGION_VALID ) |
-											( portGENERAL_PERIPHERALS_REGION );
+        /* By default allow everything to access the general peripherals.  The
+         * system peripherals and registers are protected. */
+        portMPU_REGION_BASE_ADDRESS_REG = ( portPERIPHERALS_START_ADDRESS ) |
+                                          ( portMPU_REGION_VALID ) |
+                                          ( portGENERAL_PERIPHERALS_REGION );
 
-		portMPU_REGION_ATTRIBUTE_REG =	( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |
-										( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |
-										( portMPU_REGION_ENABLE );
+        portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |
+                                       ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |
+                                       ( portMPU_REGION_ENABLE );
 
-		/* Enable the memory fault exception. */
-		portNVIC_SYS_CTRL_STATE_REG |= portNVIC_MEM_FAULT_ENABLE;
+        /* Enable the memory fault exception. */
+        portNVIC_SYS_CTRL_STATE_REG |= portNVIC_MEM_FAULT_ENABLE;
 
-		/* Enable the MPU with the background region configured. */
-		portMPU_CTRL_REG |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );
-	}
+        /* Enable the MPU with the background region configured. */
+        portMPU_CTRL_REG |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );
+    }
 }
 /*-----------------------------------------------------------*/
 
 static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes )
 {
-uint32_t ulRegionSize, ulReturnValue = 4;
+    uint32_t ulRegionSize, ulReturnValue = 4;
 
-	/* 32 is the smallest region size, 31 is the largest valid value for
-	 * ulReturnValue. */
-	for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )
-	{
-		if( ulActualSizeInBytes <= ulRegionSize )
-		{
-			break;
-		}
-		else
-		{
-			ulReturnValue++;
-		}
-	}
+    /* 32 is the smallest region size, 31 is the largest valid value for
+     * ulReturnValue. */
+    for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )
+    {
+        if( ulActualSizeInBytes <= ulRegionSize )
+        {
+            break;
+        }
+        else
+        {
+            ulReturnValue++;
+        }
+    }
 
-	/* Shift the code by one before returning so it can be written directly
-	 * into the the correct bit position of the attribute register. */
-	return ( ulReturnValue << 1UL );
+    /* Shift the code by one before returning so it can be written directly
+     * into the the correct bit position of the attribute register. */
+    return( ulReturnValue << 1UL );
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
 {
-	__asm volatile
-	(
-	"	mrs r0, control							\n" /* r0 = CONTROL. */
-	"	tst r0, #1								\n" /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
-	"	ite ne									\n"
-	"	movne r0, #0							\n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
-	"	moveq r0, #1							\n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
-	"	bx lr									\n" /* Return. */
-	"											\n"
-	"	.align 4								\n"
-	::: "r0", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, control							\n"/* r0 = CONTROL. */
+        "	tst r0, #1								\n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
+        "	ite ne									\n"
+        "	movne r0, #0							\n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
+        "	moveq r0, #1							\n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
+        "	bx lr									\n"/* Return. */
+        "											\n"
+        "	.align 4								\n"
+        ::: "r0", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vResetPrivilege( void ) /* __attribute__ (( naked )) */
 {
-	__asm volatile
-	(
-	"	mrs r0, control							\n" /* r0 = CONTROL. */
-	"	orr r0, #1								\n" /* r0 = r0 | 1. */
-	"	msr control, r0							\n" /* CONTROL = r0. */
-	"	bx lr									\n" /* Return to the caller. */
-	:::"r0", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, control							\n"/* r0 = CONTROL. */
+        "	orr r0, #1								\n"/* r0 = r0 | 1. */
+        "	msr control, r0							\n"/* CONTROL = r0. */
+        "	bx lr									\n"/* Return to the caller. */
+        ::: "r0", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
-void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t ulStackDepth )
+void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
+                                const struct xMEMORY_REGION * const xRegions,
+                                StackType_t * pxBottomOfStack,
+                                uint32_t ulStackDepth )
 {
-extern uint32_t __SRAM_segment_start__[];
-extern uint32_t __SRAM_segment_end__[];
-extern uint32_t __privileged_data_start__[];
-extern uint32_t __privileged_data_end__[];
-int32_t lIndex;
-uint32_t ul;
+    extern uint32_t __SRAM_segment_start__[];
+    extern uint32_t __SRAM_segment_end__[];
+    extern uint32_t __privileged_data_start__[];
+    extern uint32_t __privileged_data_end__[];
+    int32_t lIndex;
+    uint32_t ul;
 
-	if( xRegions == NULL )
-	{
-		/* No MPU regions are specified so allow access to all RAM. */
-		xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
-				( ( uint32_t ) __SRAM_segment_start__ ) | /* Base address. */
-				( portMPU_REGION_VALID ) |
-				( portSTACK_REGION );
+    if( xRegions == NULL )
+    {
+        /* No MPU regions are specified so allow access to all RAM. */
+        xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
+            ( ( uint32_t ) __SRAM_segment_start__ ) | /* Base address. */
+            ( portMPU_REGION_VALID ) |
+            ( portSTACK_REGION );
 
-		xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
-				( portMPU_REGION_READ_WRITE ) |
-				( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
-				( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) |
-				( portMPU_REGION_ENABLE );
+        xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
+            ( portMPU_REGION_READ_WRITE ) |
+            ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
+            ( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) |
+            ( portMPU_REGION_ENABLE );
 
-		/* Re-instate the privileged only RAM region as xRegion[ 0 ] will have
-		 * just removed the privileged only parameters. */
-		xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =
-				( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
-				( portMPU_REGION_VALID ) |
-				( portSTACK_REGION + 1 );
+        /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have
+         * just removed the privileged only parameters. */
+        xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =
+            ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
+            ( portMPU_REGION_VALID ) |
+            ( portSTACK_REGION + 1 );
 
-		xMPUSettings->xRegion[ 1 ].ulRegionAttribute =
-				( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
-				( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
-				prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |
-				( portMPU_REGION_ENABLE );
+        xMPUSettings->xRegion[ 1 ].ulRegionAttribute =
+            ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
+            ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
+            prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |
+            ( portMPU_REGION_ENABLE );
 
-		/* Invalidate all other regions. */
-		for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
-		{
-			xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
-			xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
-		}
-	}
-	else
-	{
-		/* This function is called automatically when the task is created - in
-		 * which case the stack region parameters will be valid.  At all other
-		 * times the stack parameters will not be valid and it is assumed that the
-		 * stack region has already been configured. */
-		if( ulStackDepth > 0 )
-		{
-			/* Define the region that allows access to the stack. */
-			xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
-					( ( uint32_t ) pxBottomOfStack ) |
-					( portMPU_REGION_VALID ) |
-					( portSTACK_REGION ); /* Region number. */
+        /* Invalidate all other regions. */
+        for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
+        {
+            xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
+            xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
+        }
+    }
+    else
+    {
+        /* This function is called automatically when the task is created - in
+         * which case the stack region parameters will be valid.  At all other
+         * times the stack parameters will not be valid and it is assumed that the
+         * stack region has already been configured. */
+        if( ulStackDepth > 0 )
+        {
+            /* Define the region that allows access to the stack. */
+            xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
+                ( ( uint32_t ) pxBottomOfStack ) |
+                ( portMPU_REGION_VALID ) |
+                ( portSTACK_REGION ); /* Region number. */
 
-			xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
-					( portMPU_REGION_READ_WRITE ) | /* Read and write. */
-					( prvGetMPURegionSizeSetting( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) ) |
-					( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
-					( portMPU_REGION_ENABLE );
-		}
+            xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
+                ( portMPU_REGION_READ_WRITE ) | /* Read and write. */
+                ( prvGetMPURegionSizeSetting( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) ) |
+                ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
+                ( portMPU_REGION_ENABLE );
+        }
 
-		lIndex = 0;
+        lIndex = 0;
 
-		for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
-		{
-			if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )
-			{
-				/* Translate the generic region definition contained in
-				 * xRegions into the CM3 specific MPU settings that are then
-				 * stored in xMPUSettings. */
-				xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =
-						( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) |
-						( portMPU_REGION_VALID ) |
-						( portSTACK_REGION + ul ); /* Region number. */
+        for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
+        {
+            if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )
+            {
+                /* Translate the generic region definition contained in
+                 * xRegions into the CM3 specific MPU settings that are then
+                 * stored in xMPUSettings. */
+                xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =
+                    ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) |
+                    ( portMPU_REGION_VALID ) |
+                    ( portSTACK_REGION + ul ); /* Region number. */
 
-				xMPUSettings->xRegion[ ul ].ulRegionAttribute =
-						( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |
-						( xRegions[ lIndex ].ulParameters ) |
-						( portMPU_REGION_ENABLE );
-			}
-			else
-			{
-				/* Invalidate the region. */
-				xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
-				xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
-			}
+                xMPUSettings->xRegion[ ul ].ulRegionAttribute =
+                    ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |
+                    ( xRegions[ lIndex ].ulParameters ) |
+                    ( portMPU_REGION_ENABLE );
+            }
+            else
+            {
+                /* Invalidate the region. */
+                xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
+                xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
+            }
 
-			lIndex++;
-		}
-	}
+            lIndex++;
+        }
+    }
 }
 /*-----------------------------------------------------------*/
 
-#if( configASSERT_DEFINED == 1 )
+#if ( configASSERT_DEFINED == 1 )
 
-	void vPortValidateInterruptPriority( void )
-	{
-	uint32_t ulCurrentInterrupt;
-	uint8_t ucCurrentPriority;
+    void vPortValidateInterruptPriority( void )
+    {
+        uint32_t ulCurrentInterrupt;
+        uint8_t ucCurrentPriority;
 
-		/* Obtain the number of the currently executing interrupt. */
-		__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+        /* Obtain the number of the currently executing interrupt. */
+        __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
-		/* Is the interrupt number a user defined interrupt? */
-		if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
-		{
-			/* Look up the interrupt's priority. */
-			ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
+        /* Is the interrupt number a user defined interrupt? */
+        if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
+        {
+            /* Look up the interrupt's priority. */
+            ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
 
-			/* The following assertion will fail if a service routine (ISR) for
-			 * an interrupt that has been assigned a priority above
-			 * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
-			 * function.  ISR safe FreeRTOS API functions must *only* be called
-			 * from interrupts that have been assigned a priority at or below
-			 * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+            /* The following assertion will fail if a service routine (ISR) for
+             * an interrupt that has been assigned a priority above
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
+             * function.  ISR safe FreeRTOS API functions must *only* be called
+             * from interrupts that have been assigned a priority at or below
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Numerically low interrupt priority numbers represent logically high
+             * interrupt priorities, therefore the priority of the interrupt must
+             * be set to a value equal to or numerically *higher* than
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Interrupts that	use the FreeRTOS API must not be left at their
+             * default priority of	zero as that is the highest possible priority,
+             * which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
+             * and	therefore also guaranteed to be invalid.
+             *
+             * FreeRTOS maintains separate thread and ISR API functions to ensure
+             * interrupt entry is as fast and simple as possible.
+             *
+             * The following links provide detailed information:
+             * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+             * https://www.FreeRTOS.org/FAQHelp.html */
+            configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
+        }
 
-			 * Numerically low interrupt priority numbers represent logically high
-			 * interrupt priorities, therefore the priority of the interrupt must
-			 * be set to a value equal to or numerically *higher* than
-			 * configMAX_SYSCALL_INTERRUPT_PRIORITY.
-
-			 * Interrupts that	use the FreeRTOS API must not be left at their
-			 * default priority of	zero as that is the highest possible priority,
-			 * which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
-			 * and	therefore also guaranteed to be invalid.
-
-			 * FreeRTOS maintains separate thread and ISR API functions to ensure
-			 * interrupt entry is as fast and simple as possible.
-
-			 * The following links provide detailed information:
-			 * http://www.freertos.org/RTOS-Cortex-M3-M4.html
-			 * http://www.freertos.org/FAQHelp.html */
-			configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
-		}
-
-		/* Priority grouping:  The interrupt controller (NVIC) allows the bits
-		 * that define each interrupt's priority to be split between bits that
-		 * define the interrupt's pre-emption priority bits and bits that define
-		 * the interrupt's sub-priority.  For simplicity all bits must be defined
-		 * to be pre-emption priority bits.  The following assertion will fail if
-		 * this is not the case (if some bits represent a sub-priority).
-
-		 * If the application only uses CMSIS libraries for interrupt
-		 * configuration then the correct setting can be achieved on all Cortex-M
-		 * devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
-		 * scheduler.  Note however that some vendor specific peripheral libraries
-		 * assume a non-zero priority group setting, in which cases using a value
-		 * of zero will result in unpredicable behaviour. */
-		configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
-	}
+        /* Priority grouping:  The interrupt controller (NVIC) allows the bits
+         * that define each interrupt's priority to be split between bits that
+         * define the interrupt's pre-emption priority bits and bits that define
+         * the interrupt's sub-priority.  For simplicity all bits must be defined
+         * to be pre-emption priority bits.  The following assertion will fail if
+         * this is not the case (if some bits represent a sub-priority).
+         *
+         * If the application only uses CMSIS libraries for interrupt
+         * configuration then the correct setting can be achieved on all Cortex-M
+         * devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
+         * scheduler.  Note however that some vendor specific peripheral libraries
+         * assume a non-zero priority group setting, in which cases using a value
+         * of zero will result in unpredicable behaviour. */
+        configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
+    }
 
 #endif /* configASSERT_DEFINED */
 /*-----------------------------------------------------------*/
diff --git a/portable/GCC/ARM_CM3_MPU/portmacro.h b/portable/GCC/ARM_CM3_MPU/portmacro.h
index 61da7413a..60ed239e5 100644
--- a/portable/GCC/ARM_CM3_MPU/portmacro.h
+++ b/portable/GCC/ARM_CM3_MPU/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,19 +19,19 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -44,265 +44,265 @@ extern "C" {
  */
 
 /* Type definitions. */
-#define portCHAR		char
-#define portFLOAT		float
-#define portDOUBLE		double
-#define portLONG		long
-#define portSHORT		short
-#define portSTACK_TYPE	uint32_t
-#define portBASE_TYPE	long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE StackType_t;
-typedef long BaseType_t;
-typedef unsigned long UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC 1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /* MPU specific constants. */
-#define portUSING_MPU_WRAPPERS		1
-#define portPRIVILEGE_BIT			( 0x80000000UL )
+    #define portUSING_MPU_WRAPPERS                                   1
+    #define portPRIVILEGE_BIT                                        ( 0x80000000UL )
 
-#define portMPU_REGION_READ_WRITE								( 0x03UL << 24UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY						( 0x05UL << 24UL )
-#define portMPU_REGION_READ_ONLY								( 0x06UL << 24UL )
-#define portMPU_REGION_PRIVILEGED_READ_WRITE					( 0x01UL << 24UL )
-#define portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY	( 0x02UL << 24UL )
-#define portMPU_REGION_CACHEABLE_BUFFERABLE						( 0x07UL << 16UL )
-#define portMPU_REGION_EXECUTE_NEVER							( 0x01UL << 28UL )
+    #define portMPU_REGION_READ_WRITE                                ( 0x03UL << 24UL )
+    #define portMPU_REGION_PRIVILEGED_READ_ONLY                      ( 0x05UL << 24UL )
+    #define portMPU_REGION_READ_ONLY                                 ( 0x06UL << 24UL )
+    #define portMPU_REGION_PRIVILEGED_READ_WRITE                     ( 0x01UL << 24UL )
+    #define portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY    ( 0x02UL << 24UL )
+    #define portMPU_REGION_CACHEABLE_BUFFERABLE                      ( 0x07UL << 16UL )
+    #define portMPU_REGION_EXECUTE_NEVER                             ( 0x01UL << 28UL )
 
-#define portUNPRIVILEGED_FLASH_REGION		( 0UL )
-#define portPRIVILEGED_FLASH_REGION			( 1UL )
-#define portPRIVILEGED_RAM_REGION			( 2UL )
-#define portGENERAL_PERIPHERALS_REGION		( 3UL )
-#define portSTACK_REGION					( 4UL )
-#define portFIRST_CONFIGURABLE_REGION	    ( 5UL )
-#define portLAST_CONFIGURABLE_REGION		( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS		( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS				( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
+    #define portUNPRIVILEGED_FLASH_REGION                            ( 0UL )
+    #define portPRIVILEGED_FLASH_REGION                              ( 1UL )
+    #define portPRIVILEGED_RAM_REGION                                ( 2UL )
+    #define portGENERAL_PERIPHERALS_REGION                           ( 3UL )
+    #define portSTACK_REGION                                         ( 4UL )
+    #define portFIRST_CONFIGURABLE_REGION                            ( 5UL )
+    #define portLAST_CONFIGURABLE_REGION                             ( 7UL )
+    #define portNUM_CONFIGURABLE_REGIONS                             ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
+    #define portTOTAL_NUM_REGIONS                                    ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
 
-#define portSWITCH_TO_USER_MODE() __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0 " ::: "r0", "memory" )
+    #define portSWITCH_TO_USER_MODE()    __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0 " ::: "r0", "memory" )
 
-typedef struct MPU_REGION_REGISTERS
-{
-	uint32_t ulRegionBaseAddress;
-	uint32_t ulRegionAttribute;
-} xMPU_REGION_REGISTERS;
+    typedef struct MPU_REGION_REGISTERS
+    {
+        uint32_t ulRegionBaseAddress;
+        uint32_t ulRegionAttribute;
+    } xMPU_REGION_REGISTERS;
 
 /* Plus 1 to create space for the stack region. */
-typedef struct MPU_SETTINGS
-{
-	xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS ];
-} xMPU_SETTINGS;
+    typedef struct MPU_SETTINGS
+    {
+        xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS ];
+    } xMPU_SETTINGS;
 
 /* Architecture specifics. */
-#define portSTACK_GROWTH			( -1 )
-#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT			8
-#define portDONT_DISCARD			__attribute__(( used ))
+    #define portSTACK_GROWTH      ( -1 )
+    #define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT    8
+    #define portDONT_DISCARD      __attribute__( ( used ) )
 /*-----------------------------------------------------------*/
 
 /* SVC numbers for various services. */
-#define portSVC_START_SCHEDULER				0
-#define portSVC_YIELD						1
-#define portSVC_RAISE_PRIVILEGE				2
+    #define portSVC_START_SCHEDULER    0
+    #define portSVC_YIELD              1
+    #define portSVC_RAISE_PRIVILEGE    2
 
 /* Scheduler utilities. */
 
-#define portYIELD()				__asm volatile ( "	SVC	%0	\n" :: "i" (portSVC_YIELD) : "memory" )
-#define portYIELD_WITHIN_API() 													\
-{																				\
-	/* Set a PendSV to request a context switch. */								\
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;								\
-																				\
-	/* Barriers are normally not required but do ensure the code is completely	\
-	within the specified behaviour for the architecture. */						\
-	__asm volatile( "dsb" ::: "memory" );										\
-	__asm volatile( "isb" );													\
-}
+    #define portYIELD()    __asm volatile ( "	SVC	%0	\n"::"i" ( portSVC_YIELD ) : "memory" )
+    #define portYIELD_WITHIN_API()                      \
+    {                                                   \
+        /* Set a PendSV to request a context switch. */ \
+        portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
+                                                        \
+        /* Barriers are normally not required but do ensure the code is completely \
+         * within the specified behaviour for the architecture. */ \
+        __asm volatile ( "dsb" ::: "memory" );                     \
+        __asm volatile ( "isb" );                                  \
+    }
 
-#define portNVIC_INT_CTRL_REG		( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT		( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /* Critical section management. */
-extern void vPortEnterCritical( void );
-extern void vPortExitCritical( void );
-#define portSET_INTERRUPT_MASK_FROM_ISR()		ulPortRaiseBASEPRI()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)	vPortSetBASEPRI(x)
-#define portDISABLE_INTERRUPTS()				vPortRaiseBASEPRI()
-#define portENABLE_INTERRUPTS()					vPortSetBASEPRI(0)
-#define portENTER_CRITICAL()					vPortEnterCritical()
-#define portEXIT_CRITICAL()						vPortExitCritical()
+    extern void vPortEnterCritical( void );
+    extern void vPortExitCritical( void );
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulPortRaiseBASEPRI()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vPortSetBASEPRI( x )
+    #define portDISABLE_INTERRUPTS()                  vPortRaiseBASEPRI()
+    #define portENABLE_INTERRUPTS()                   vPortSetBASEPRI( 0 )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
 
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site.  These are
-not necessary for to use this port.  They are defined so the common demo files
-(which build with all the ports) will build. */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+ * not necessary for to use this port.  They are defined so the common demo files
+ * (which build with all the ports) will build. */
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
 /* Architecture specific optimisations. */
-#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
-	#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
-#endif
+    #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
+        #define configUSE_PORT_OPTIMISED_TASK_SELECTION    1
+    #endif
 
-#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
+    #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
 
-	/* Generic helper function. */
-	__attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
-	{
-	uint8_t ucReturn;
+/* Generic helper function. */
+        __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
+        {
+            uint8_t ucReturn;
 
-		__asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
-		return ucReturn;
-	}
+            __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
 
-	/* Check the configuration. */
-	#if( configMAX_PRIORITIES > 32 )
-		#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
-	#endif
+            return ucReturn;
+        }
 
-	/* Store/clear the ready priorities in a bit map. */
-	#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
-	#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
+/* Check the configuration. */
+        #if ( configMAX_PRIORITIES > 32 )
+            #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
+        #endif
 
-	/*-----------------------------------------------------------*/
-
-	#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
-
-#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
+/* Store/clear the ready priorities in a bit map. */
+        #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities )    ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
+        #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities )     ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
 
 /*-----------------------------------------------------------*/
 
-#ifdef configASSERT
-	void vPortValidateInterruptPriority( void );
-	#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() 	vPortValidateInterruptPriority()
-#endif
+        #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities )    uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
+
+    #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
+
+/*-----------------------------------------------------------*/
+
+    #ifdef configASSERT
+        void vPortValidateInterruptPriority( void );
+        #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()    vPortValidateInterruptPriority()
+    #endif
 
 /* portNOP() is not required by this port. */
-#define portNOP()
+    #define portNOP()
 
-#define portINLINE	__inline
+    #define portINLINE              __inline
 
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE inline __attribute__(( always_inline))
-#endif
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE    inline __attribute__( ( always_inline ) )
+    #endif
 /*-----------------------------------------------------------*/
 
-extern BaseType_t xIsPrivileged( void );
-extern void vResetPrivilege( void );
+    extern BaseType_t xIsPrivileged( void );
+    extern void vResetPrivilege( void );
 
 /**
  * @brief Checks whether or not the processor is privileged.
  *
  * @return 1 if the processor is already privileged, 0 otherwise.
  */
-#define portIS_PRIVILEGED()			xIsPrivileged()
+    #define portIS_PRIVILEGED()      xIsPrivileged()
 
 /**
  * @brief Raise an SVC request to raise privilege.
-*/
-#define portRAISE_PRIVILEGE()		__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+ */
+    #define portRAISE_PRIVILEGE()    __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
 
 /**
  * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
  * register.
  */
-#define portRESET_PRIVILEGE()		vResetPrivilege()
+    #define portRESET_PRIVILEGE()    vResetPrivilege()
 /*-----------------------------------------------------------*/
 
-portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
-{
-uint32_t ulCurrentInterrupt;
-BaseType_t xReturn;
+    portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
+    {
+        uint32_t ulCurrentInterrupt;
+        BaseType_t xReturn;
 
-	/* Obtain the number of the currently executing interrupt. */
-	__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+        /* Obtain the number of the currently executing interrupt. */
+        __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
-	if( ulCurrentInterrupt == 0 )
-	{
-		xReturn = pdFALSE;
-	}
-	else
-	{
-		xReturn = pdTRUE;
-	}
+        if( ulCurrentInterrupt == 0 )
+        {
+            xReturn = pdFALSE;
+        }
+        else
+        {
+            xReturn = pdTRUE;
+        }
 
-	return xReturn;
-}
+        return xReturn;
+    }
 
 /*-----------------------------------------------------------*/
 
-portFORCE_INLINE static void vPortRaiseBASEPRI( void )
-{
-uint32_t ulNewBASEPRI;
+    portFORCE_INLINE static void vPortRaiseBASEPRI( void )
+    {
+        uint32_t ulNewBASEPRI;
 
-	__asm volatile
-	(
-		"	mov %0, %1												\n"	\
-		"	msr basepri, %0											\n" \
-		"	isb														\n" \
-		"	dsb														\n" \
-		:"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
-	);
-}
+        __asm volatile
+        (
+            "	mov %0, %1												\n"\
+            "	msr basepri, %0											\n"\
+            "	isb														\n"\
+            "	dsb														\n"\
+            : "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
+        );
+    }
 
 /*-----------------------------------------------------------*/
 
-portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
-{
-uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
+    portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
+    {
+        uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
 
-	__asm volatile
-	(
-		"	mrs %0, basepri											\n" \
-		"	mov %1, %2												\n"	\
-		"	msr basepri, %1											\n" \
-		"	isb														\n" \
-		"	dsb														\n" \
-		:"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
-	);
+        __asm volatile
+        (
+            "	mrs %0, basepri											\n"\
+            "	mov %1, %2												\n"\
+            "	msr basepri, %1											\n"\
+            "	isb														\n"\
+            "	dsb														\n"\
+            : "=r" ( ulOriginalBASEPRI ), "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
+        );
 
-	/* This return will not be reached but is necessary to prevent compiler
-	warnings. */
-	return ulOriginalBASEPRI;
-}
+        /* This return will not be reached but is necessary to prevent compiler
+         * warnings. */
+        return ulOriginalBASEPRI;
+    }
 /*-----------------------------------------------------------*/
 
-portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
-{
-	__asm volatile
-	(
-		"	msr basepri, %0	" :: "r" ( ulNewMaskValue ) : "memory"
-	);
-}
+    portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
+    {
+        __asm volatile
+        (
+            "	msr basepri, %0	"::"r" ( ulNewMaskValue ) : "memory"
+        );
+    }
 /*-----------------------------------------------------------*/
 
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
+    #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
 
-#ifndef configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY
-	#warning "configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY is not defined. We recommend defining it to 1 in FreeRTOSConfig.h for better security. https://www.freertos.org/FreeRTOS-V10.3.x.html"
-	#define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY 0
-#endif
+    #ifndef configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY
+        #warning "configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY is not defined. We recommend defining it to 1 in FreeRTOSConfig.h for better security. https://www.FreeRTOS.org/FreeRTOS-V10.3.x.html"
+        #define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY    0
+    #endif
 /*-----------------------------------------------------------*/
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
-
diff --git a/portable/GCC/ARM_CM4F/port.c b/portable/GCC/ARM_CM4F/port.c
index 9e1d1a891..f05a48f42 100644
--- a/portable/GCC/ARM_CM4F/port.c
+++ b/portable/GCC/ARM_CM4F/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,95 +19,95 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------
- * Implementation of functions defined in portable.h for the ARM CM4F port.
- *----------------------------------------------------------*/
+* Implementation of functions defined in portable.h for the ARM CM4F port.
+*----------------------------------------------------------*/
 
 /* Scheduler includes. */
 #include "FreeRTOS.h"
 #include "task.h"
 
 #ifndef __VFP_FP__
-	#error This port can only be used when the project options are configured to enable hardware floating point support.
+    #error This port can only be used when the project options are configured to enable hardware floating point support.
 #endif
 
 #ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 1UL << 2UL )
+    #define configSYSTICK_CLOCK_HZ      configCPU_CLOCK_HZ
+    /* Ensure the SysTick is clocked at the same frequency as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 1UL << 2UL )
 #else
-	/* The way the SysTick is clocked is not modified in case it is not the same
-	as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 0 )
+
+/* The way the SysTick is clocked is not modified in case it is not the same
+ * as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 0 )
 #endif
 
 /* Constants required to manipulate the core.  Registers first... */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_CTRL_REG             ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG             ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG    ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SHPR3_REG                    ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
 /* ...then bits in the registers. */
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portNVIC_PENDSVCLEAR_BIT 			( 1UL << 27UL )
-#define portNVIC_PEND_SYSTICK_CLEAR_BIT		( 1UL << 25UL )
+#define portNVIC_SYSTICK_INT_BIT              ( 1UL << 1UL )
+#define portNVIC_SYSTICK_ENABLE_BIT           ( 1UL << 0UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT       ( 1UL << 16UL )
+#define portNVIC_PENDSVCLEAR_BIT              ( 1UL << 27UL )
+#define portNVIC_PEND_SYSTICK_CLEAR_BIT       ( 1UL << 25UL )
 
 /* Constants used to detect a Cortex-M7 r0p1 core, which should use the ARM_CM7
-r0p1 port. */
-#define portCPUID							( * ( ( volatile uint32_t * ) 0xE000ed00 ) )
-#define portCORTEX_M7_r0p1_ID				( 0x410FC271UL )
-#define portCORTEX_M7_r0p0_ID				( 0x410FC270UL )
+ * r0p1 port. */
+#define portCPUID                             ( *( ( volatile uint32_t * ) 0xE000ed00 ) )
+#define portCORTEX_M7_r0p1_ID                 ( 0x410FC271UL )
+#define portCORTEX_M7_r0p0_ID                 ( 0x410FC270UL )
 
-#define portNVIC_PENDSV_PRI					( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
-#define portNVIC_SYSTICK_PRI				( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
+#define portNVIC_PENDSV_PRI                   ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
+#define portNVIC_SYSTICK_PRI                  ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
 
 /* Constants required to check the validity of an interrupt priority. */
-#define portFIRST_USER_INTERRUPT_NUMBER		( 16 )
-#define portNVIC_IP_REGISTERS_OFFSET_16 	( 0xE000E3F0 )
-#define portAIRCR_REG						( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
-#define portMAX_8_BIT_VALUE					( ( uint8_t ) 0xff )
-#define portTOP_BIT_OF_BYTE					( ( uint8_t ) 0x80 )
-#define portMAX_PRIGROUP_BITS				( ( uint8_t ) 7 )
-#define portPRIORITY_GROUP_MASK				( 0x07UL << 8UL )
-#define portPRIGROUP_SHIFT					( 8UL )
+#define portFIRST_USER_INTERRUPT_NUMBER       ( 16 )
+#define portNVIC_IP_REGISTERS_OFFSET_16       ( 0xE000E3F0 )
+#define portAIRCR_REG                         ( *( ( volatile uint32_t * ) 0xE000ED0C ) )
+#define portMAX_8_BIT_VALUE                   ( ( uint8_t ) 0xff )
+#define portTOP_BIT_OF_BYTE                   ( ( uint8_t ) 0x80 )
+#define portMAX_PRIGROUP_BITS                 ( ( uint8_t ) 7 )
+#define portPRIORITY_GROUP_MASK               ( 0x07UL << 8UL )
+#define portPRIGROUP_SHIFT                    ( 8UL )
 
 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
-#define portVECTACTIVE_MASK					( 0xFFUL )
+#define portVECTACTIVE_MASK                   ( 0xFFUL )
 
 /* Constants required to manipulate the VFP. */
-#define portFPCCR							( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
-#define portASPEN_AND_LSPEN_BITS			( 0x3UL << 30UL )
+#define portFPCCR                             ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
+#define portASPEN_AND_LSPEN_BITS              ( 0x3UL << 30UL )
 
 /* Constants required to set up the initial stack. */
-#define portINITIAL_XPSR					( 0x01000000 )
-#define portINITIAL_EXC_RETURN				( 0xfffffffd )
+#define portINITIAL_XPSR                      ( 0x01000000 )
+#define portINITIAL_EXC_RETURN                ( 0xfffffffd )
 
 /* The systick is a 24-bit counter. */
-#define portMAX_24_BIT_NUMBER				( 0xffffffUL )
+#define portMAX_24_BIT_NUMBER                 ( 0xffffffUL )
 
 /* For strict compliance with the Cortex-M spec the task start address should
-have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
-#define portSTART_ADDRESS_MASK		( ( StackType_t ) 0xfffffffeUL )
+ * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
+#define portSTART_ADDRESS_MASK                ( ( StackType_t ) 0xfffffffeUL )
 
 /* A fiddle factor to estimate the number of SysTick counts that would have
-occurred while the SysTick counter is stopped during tickless idle
-calculations. */
-#define portMISSED_COUNTS_FACTOR			( 45UL )
+ * occurred while the SysTick counter is stopped during tickless idle
+ * calculations. */
+#define portMISSED_COUNTS_FACTOR              ( 45UL )
 
 /* Let the user override the pre-loading of the initial LR with the address of
-prvTaskExitError() in case it messes up unwinding of the stack in the
-debugger. */
+ * prvTaskExitError() in case it messes up unwinding of the stack in the
+ * debugger. */
 #ifdef configTASK_RETURN_ADDRESS
-	#define portTASK_RETURN_ADDRESS	configTASK_RETURN_ADDRESS
+    #define portTASK_RETURN_ADDRESS    configTASK_RETURN_ADDRESS
 #else
-	#define portTASK_RETURN_ADDRESS	prvTaskExitError
+    #define portTASK_RETURN_ADDRESS    prvTaskExitError
 #endif
 
 /*
@@ -120,19 +120,19 @@ void vPortSetupTimerInterrupt( void );
 /*
  * Exception handlers.
  */
-void xPortPendSVHandler( void ) __attribute__ (( naked ));
+void xPortPendSVHandler( void ) __attribute__( ( naked ) );
 void xPortSysTickHandler( void );
-void vPortSVCHandler( void ) __attribute__ (( naked ));
+void vPortSVCHandler( void ) __attribute__( ( naked ) );
 
 /*
  * Start first task is a separate function so it can be tested in isolation.
  */
-static void prvPortStartFirstTask( void ) __attribute__ (( naked ));
+static void prvPortStartFirstTask( void ) __attribute__( ( naked ) );
 
 /*
  * Function to enable the VFP.
  */
-static void vPortEnableVFP( void ) __attribute__ (( naked ));
+static void vPortEnableVFP( void ) __attribute__( ( naked ) );
 
 /*
  * Used to catch tasks that attempt to return from their implementing function.
@@ -142,30 +142,30 @@ static void prvTaskExitError( void );
 /*-----------------------------------------------------------*/
 
 /* Each task maintains its own interrupt status in the critical nesting
-variable. */
+ * variable. */
 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 
 /*
  * The number of SysTick increments that make up one tick period.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulTimerCountsForOneTick = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulTimerCountsForOneTick = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * The maximum number of tick periods that can be suppressed is limited by the
  * 24 bit resolution of the SysTick timer.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t xMaximumPossibleSuppressedTicks = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * Compensate for the CPU cycles that pass while the SysTick is stopped (low
  * power functionality only.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulStoppedTimerCompensation = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulStoppedTimerCompensation = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
@@ -173,10 +173,10 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
  * FreeRTOS API functions are not called from interrupts that have been assigned
  * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
  */
-#if( configASSERT_DEFINED == 1 )
-	 static uint8_t ucMaxSysCallPriority = 0;
-	 static uint32_t ulMaxPRIGROUPValue = 0;
-	 static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
+#if ( configASSERT_DEFINED == 1 )
+    static uint8_t ucMaxSysCallPriority = 0;
+    static uint32_t ulMaxPRIGROUPValue = 0;
+    static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
 #endif /* configASSERT_DEFINED */
 
 /*-----------------------------------------------------------*/
@@ -184,100 +184,104 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 /*
  * See header file for description.
  */
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	interrupt. */
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
 
-	/* Offset added to account for the way the MCU uses the stack on entry/exit
-	of interrupts, and to ensure alignment. */
-	pxTopOfStack--;
+    /* Offset added to account for the way the MCU uses the stack on entry/exit
+     * of interrupts, and to ensure alignment. */
+    pxTopOfStack--;
 
-	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
-	pxTopOfStack--;
-	*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;	/* PC */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
+    *pxTopOfStack = portINITIAL_XPSR;                                    /* xPSR */
+    pxTopOfStack--;
+    *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;             /* LR */
 
-	/* Save code space by skipping register initialisation. */
-	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
-	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
+    /* Save code space by skipping register initialisation. */
+    pxTopOfStack -= 5;                            /* R12, R3, R2 and R1. */
+    *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
 
-	/* A save method is being used that requires each task to maintain its
-	own exec return value. */
-	pxTopOfStack--;
-	*pxTopOfStack = portINITIAL_EXC_RETURN;
+    /* A save method is being used that requires each task to maintain its
+     * own exec return value. */
+    pxTopOfStack--;
+    *pxTopOfStack = portINITIAL_EXC_RETURN;
 
-	pxTopOfStack -= 8;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
+    pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
 
-	return pxTopOfStack;
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 static void prvTaskExitError( void )
 {
-volatile uint32_t ulDummy = 0;
+    volatile uint32_t ulDummy = 0;
 
-	/* A function that implements a task must not exit or attempt to return to
-	its caller as there is nothing to return to.  If a task wants to exit it
-	should instead call vTaskDelete( NULL ).
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to.  If a task wants to exit it
+     * should instead call vTaskDelete( NULL ).
+     *
+     * Artificially force an assert() to be triggered if configASSERT() is
+     * defined, then stop here so application writers can catch the error. */
+    configASSERT( uxCriticalNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
 
-	Artificially force an assert() to be triggered if configASSERT() is
-	defined, then stop here so application writers can catch the error. */
-	configASSERT( uxCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
-	while( ulDummy == 0 )
-	{
-		/* This file calls prvTaskExitError() after the scheduler has been
-		started to remove a compiler warning about the function being defined
-		but never called.  ulDummy is used purely to quieten other warnings
-		about code appearing after this function is called - making ulDummy
-		volatile makes the compiler think the function could return and
-		therefore not output an 'unreachable code' warning for code that appears
-		after it. */
-	}
+    while( ulDummy == 0 )
+    {
+        /* This file calls prvTaskExitError() after the scheduler has been
+         * started to remove a compiler warning about the function being defined
+         * but never called.  ulDummy is used purely to quieten other warnings
+         * about code appearing after this function is called - making ulDummy
+         * volatile makes the compiler think the function could return and
+         * therefore not output an 'unreachable code' warning for code that appears
+         * after it. */
+    }
 }
 /*-----------------------------------------------------------*/
 
 void vPortSVCHandler( void )
 {
-	__asm volatile (
-					"	ldr	r3, pxCurrentTCBConst2		\n" /* Restore the context. */
-					"	ldr r1, [r3]					\n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
-					"	ldr r0, [r1]					\n" /* The first item in pxCurrentTCB is the task top of stack. */
-					"	ldmia r0!, {r4-r11, r14}		\n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
-					"	msr psp, r0						\n" /* Restore the task stack pointer. */
-					"	isb								\n"
-					"	mov r0, #0 						\n"
-					"	msr	basepri, r0					\n"
-					"	bx r14							\n"
-					"									\n"
-					"	.align 4						\n"
-					"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
-				);
+    __asm volatile (
+        "	ldr	r3, pxCurrentTCBConst2		\n"/* Restore the context. */
+        "	ldr r1, [r3]					\n"/* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
+        "	ldr r0, [r1]					\n"/* The first item in pxCurrentTCB is the task top of stack. */
+        "	ldmia r0!, {r4-r11, r14}		\n"/* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
+        "	msr psp, r0						\n"/* Restore the task stack pointer. */
+        "	isb								\n"
+        "	mov r0, #0 						\n"
+        "	msr	basepri, r0					\n"
+        "	bx r14							\n"
+        "									\n"
+        "	.align 4						\n"
+        "pxCurrentTCBConst2: .word pxCurrentTCB				\n"
+        );
 }
 /*-----------------------------------------------------------*/
 
 static void prvPortStartFirstTask( void )
 {
-	/* Start the first task.  This also clears the bit that indicates the FPU is
-	in use in case the FPU was used before the scheduler was started - which
-	would otherwise result in the unnecessary leaving of space in the SVC stack
-	for lazy saving of FPU registers. */
-	__asm volatile(
-					" ldr r0, =0xE000ED08 	\n" /* Use the NVIC offset register to locate the stack. */
-					" ldr r0, [r0] 			\n"
-					" ldr r0, [r0] 			\n"
-					" msr msp, r0			\n" /* Set the msp back to the start of the stack. */
-					" mov r0, #0			\n" /* Clear the bit that indicates the FPU is in use, see comment above. */
-					" msr control, r0		\n"
-					" cpsie i				\n" /* Globally enable interrupts. */
-					" cpsie f				\n"
-					" dsb					\n"
-					" isb					\n"
-					" svc 0					\n" /* System call to start first task. */
-					" nop					\n"
-				);
+    /* Start the first task.  This also clears the bit that indicates the FPU is
+     * in use in case the FPU was used before the scheduler was started - which
+     * would otherwise result in the unnecessary leaving of space in the SVC stack
+     * for lazy saving of FPU registers. */
+    __asm volatile (
+        " ldr r0, =0xE000ED08 	\n"/* Use the NVIC offset register to locate the stack. */
+        " ldr r0, [r0] 			\n"
+        " ldr r0, [r0] 			\n"
+        " msr msp, r0			\n"/* Set the msp back to the start of the stack. */
+        " mov r0, #0			\n"/* Clear the bit that indicates the FPU is in use, see comment above. */
+        " msr control, r0		\n"
+        " cpsie i				\n"/* Globally enable interrupts. */
+        " cpsie f				\n"
+        " dsb					\n"
+        " isb					\n"
+        " svc 0					\n"/* System call to start first task. */
+        " nop					\n"
+        " .ltorg				\n"
+        );
 }
 /*-----------------------------------------------------------*/
 
@@ -286,388 +290,393 @@ static void prvPortStartFirstTask( void )
  */
 BaseType_t xPortStartScheduler( void )
 {
-	/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
-	See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
-	configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
+    /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
+     * See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
+    configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
 
-	/* This port can be used on all revisions of the Cortex-M7 core other than
-	the r0p1 parts.  r0p1 parts should use the port from the
-	/source/portable/GCC/ARM_CM7/r0p1 directory. */
-	configASSERT( portCPUID != portCORTEX_M7_r0p1_ID );
-	configASSERT( portCPUID != portCORTEX_M7_r0p0_ID );
+    /* This port can be used on all revisions of the Cortex-M7 core other than
+     * the r0p1 parts.  r0p1 parts should use the port from the
+     * /source/portable/GCC/ARM_CM7/r0p1 directory. */
+    configASSERT( portCPUID != portCORTEX_M7_r0p1_ID );
+    configASSERT( portCPUID != portCORTEX_M7_r0p0_ID );
 
-	#if( configASSERT_DEFINED == 1 )
-	{
-		volatile uint32_t ulOriginalPriority;
-		volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
-		volatile uint8_t ucMaxPriorityValue;
+    #if ( configASSERT_DEFINED == 1 )
+        {
+            volatile uint32_t ulOriginalPriority;
+            volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
+            volatile uint8_t ucMaxPriorityValue;
 
-		/* Determine the maximum priority from which ISR safe FreeRTOS API
-		functions can be called.  ISR safe functions are those that end in
-		"FromISR".  FreeRTOS maintains separate thread and ISR API functions to
-		ensure interrupt entry is as fast and simple as possible.
+            /* Determine the maximum priority from which ISR safe FreeRTOS API
+             * functions can be called.  ISR safe functions are those that end in
+             * "FromISR".  FreeRTOS maintains separate thread and ISR API functions to
+             * ensure interrupt entry is as fast and simple as possible.
+             *
+             * Save the interrupt priority value that is about to be clobbered. */
+            ulOriginalPriority = *pucFirstUserPriorityRegister;
 
-		Save the interrupt priority value that is about to be clobbered. */
-		ulOriginalPriority = *pucFirstUserPriorityRegister;
+            /* Determine the number of priority bits available.  First write to all
+             * possible bits. */
+            *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
 
-		/* Determine the number of priority bits available.  First write to all
-		possible bits. */
-		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
+            /* Read the value back to see how many bits stuck. */
+            ucMaxPriorityValue = *pucFirstUserPriorityRegister;
 
-		/* Read the value back to see how many bits stuck. */
-		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
+            /* Use the same mask on the maximum system call priority. */
+            ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
 
-		/* Use the same mask on the maximum system call priority. */
-		ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
+            /* Calculate the maximum acceptable priority group value for the number
+             * of bits read back. */
+            ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
 
-		/* Calculate the maximum acceptable priority group value for the number
-		of bits read back. */
-		ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
-		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
-		{
-			ulMaxPRIGROUPValue--;
-			ucMaxPriorityValue <<= ( uint8_t ) 0x01;
-		}
+            while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
+            {
+                ulMaxPRIGROUPValue--;
+                ucMaxPriorityValue <<= ( uint8_t ) 0x01;
+            }
 
-		#ifdef __NVIC_PRIO_BITS
-		{
-			/* Check the CMSIS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
-		}
-		#endif
+            #ifdef __NVIC_PRIO_BITS
+                {
+                    /* Check the CMSIS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
+                }
+            #endif
 
-		#ifdef configPRIO_BITS
-		{
-			/* Check the FreeRTOS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
-		}
-		#endif
+            #ifdef configPRIO_BITS
+                {
+                    /* Check the FreeRTOS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
+                }
+            #endif
 
-		/* Shift the priority group value back to its position within the AIRCR
-		register. */
-		ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
-		ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
+            /* Shift the priority group value back to its position within the AIRCR
+             * register. */
+            ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
+            ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
 
-		/* Restore the clobbered interrupt priority register to its original
-		value. */
-		*pucFirstUserPriorityRegister = ulOriginalPriority;
-	}
-	#endif /* conifgASSERT_DEFINED */
+            /* Restore the clobbered interrupt priority register to its original
+             * value. */
+            *pucFirstUserPriorityRegister = ulOriginalPriority;
+        }
+    #endif /* conifgASSERT_DEFINED */
 
-	/* Make PendSV and SysTick the lowest priority interrupts. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+    /* Make PendSV and SysTick the lowest priority interrupts. */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
-	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-	here already. */
-	vPortSetupTimerInterrupt();
+    /* Start the timer that generates the tick ISR.  Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
 
-	/* Initialise the critical nesting count ready for the first task. */
-	uxCriticalNesting = 0;
+    /* Initialise the critical nesting count ready for the first task. */
+    uxCriticalNesting = 0;
 
-	/* Ensure the VFP is enabled - it should be anyway. */
-	vPortEnableVFP();
+    /* Ensure the VFP is enabled - it should be anyway. */
+    vPortEnableVFP();
 
-	/* Lazy save always. */
-	*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
+    /* Lazy save always. */
+    *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
 
-	/* Start the first task. */
-	prvPortStartFirstTask();
+    /* Start the first task. */
+    prvPortStartFirstTask();
 
-	/* Should never get here as the tasks will now be executing!  Call the task
-	exit error function to prevent compiler warnings about a static function
-	not being called in the case that the application writer overrides this
-	functionality by defining configTASK_RETURN_ADDRESS.  Call
-	vTaskSwitchContext() so link time optimisation does not remove the
-	symbol. */
-	vTaskSwitchContext();
-	prvTaskExitError();
+    /* Should never get here as the tasks will now be executing!  Call the task
+     * exit error function to prevent compiler warnings about a static function
+     * not being called in the case that the application writer overrides this
+     * functionality by defining configTASK_RETURN_ADDRESS.  Call
+     * vTaskSwitchContext() so link time optimisation does not remove the
+     * symbol. */
+    vTaskSwitchContext();
+    prvTaskExitError();
 
-	/* Should not get here! */
-	return 0;
+    /* Should not get here! */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void )
 {
-	/* Not implemented in ports where there is nothing to return to.
-	Artificially force an assert. */
-	configASSERT( uxCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( uxCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void )
 {
-	portDISABLE_INTERRUPTS();
-	uxCriticalNesting++;
+    portDISABLE_INTERRUPTS();
+    uxCriticalNesting++;
 
-	/* This is not the interrupt safe version of the enter critical function so
-	assert() if it is being called from an interrupt context.  Only API
-	functions that end in "FromISR" can be used in an interrupt.  Only assert if
-	the critical nesting count is 1 to protect against recursive calls if the
-	assert function also uses a critical section. */
-	if( uxCriticalNesting == 1 )
-	{
-		configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
-	}
+    /* This is not the interrupt safe version of the enter critical function so
+     * assert() if it is being called from an interrupt context.  Only API
+     * functions that end in "FromISR" can be used in an interrupt.  Only assert if
+     * the critical nesting count is 1 to protect against recursive calls if the
+     * assert function also uses a critical section. */
+    if( uxCriticalNesting == 1 )
+    {
+        configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
+    }
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void )
 {
-	configASSERT( uxCriticalNesting );
-	uxCriticalNesting--;
-	if( uxCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
+    configASSERT( uxCriticalNesting );
+    uxCriticalNesting--;
+
+    if( uxCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
 }
 /*-----------------------------------------------------------*/
 
 void xPortPendSVHandler( void )
 {
-	/* This is a naked function. */
+    /* This is a naked function. */
 
-	__asm volatile
-	(
-	"	mrs r0, psp							\n"
-	"	isb									\n"
-	"										\n"
-	"	ldr	r3, pxCurrentTCBConst			\n" /* Get the location of the current TCB. */
-	"	ldr	r2, [r3]						\n"
-	"										\n"
-	"	tst r14, #0x10						\n" /* Is the task using the FPU context?  If so, push high vfp registers. */
-	"	it eq								\n"
-	"	vstmdbeq r0!, {s16-s31}				\n"
-	"										\n"
-	"	stmdb r0!, {r4-r11, r14}			\n" /* Save the core registers. */
-	"	str r0, [r2]						\n" /* Save the new top of stack into the first member of the TCB. */
-	"										\n"
-	"	stmdb sp!, {r0, r3}					\n"
-	"	mov r0, %0 							\n"
-	"	msr basepri, r0						\n"
-	"	dsb									\n"
-	"	isb									\n"
-	"	bl vTaskSwitchContext				\n"
-	"	mov r0, #0							\n"
-	"	msr basepri, r0						\n"
-	"	ldmia sp!, {r0, r3}					\n"
-	"										\n"
-	"	ldr r1, [r3]						\n" /* The first item in pxCurrentTCB is the task top of stack. */
-	"	ldr r0, [r1]						\n"
-	"										\n"
-	"	ldmia r0!, {r4-r11, r14}			\n" /* Pop the core registers. */
-	"										\n"
-	"	tst r14, #0x10						\n" /* Is the task using the FPU context?  If so, pop the high vfp registers too. */
-	"	it eq								\n"
-	"	vldmiaeq r0!, {s16-s31}				\n"
-	"										\n"
-	"	msr psp, r0							\n"
-	"	isb									\n"
-	"										\n"
-	#ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata workaround. */
-		#if WORKAROUND_PMU_CM001 == 1
-	"			push { r14 }				\n"
-	"			pop { pc }					\n"
-		#endif
-	#endif
-	"										\n"
-	"	bx r14								\n"
-	"										\n"
-	"	.align 4							\n"
-	"pxCurrentTCBConst: .word pxCurrentTCB	\n"
-	::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
-	);
+    __asm volatile
+    (
+        "	mrs r0, psp							\n"
+        "	isb									\n"
+        "										\n"
+        "	ldr	r3, pxCurrentTCBConst			\n"/* Get the location of the current TCB. */
+        "	ldr	r2, [r3]						\n"
+        "										\n"
+        "	tst r14, #0x10						\n"/* Is the task using the FPU context?  If so, push high vfp registers. */
+        "	it eq								\n"
+        "	vstmdbeq r0!, {s16-s31}				\n"
+        "										\n"
+        "	stmdb r0!, {r4-r11, r14}			\n"/* Save the core registers. */
+        "	str r0, [r2]						\n"/* Save the new top of stack into the first member of the TCB. */
+        "										\n"
+        "	stmdb sp!, {r0, r3}					\n"
+        "	mov r0, %0 							\n"
+        "	msr basepri, r0						\n"
+        "	dsb									\n"
+        "	isb									\n"
+        "	bl vTaskSwitchContext				\n"
+        "	mov r0, #0							\n"
+        "	msr basepri, r0						\n"
+        "	ldmia sp!, {r0, r3}					\n"
+        "										\n"
+        "	ldr r1, [r3]						\n"/* The first item in pxCurrentTCB is the task top of stack. */
+        "	ldr r0, [r1]						\n"
+        "										\n"
+        "	ldmia r0!, {r4-r11, r14}			\n"/* Pop the core registers. */
+        "										\n"
+        "	tst r14, #0x10						\n"/* Is the task using the FPU context?  If so, pop the high vfp registers too. */
+        "	it eq								\n"
+        "	vldmiaeq r0!, {s16-s31}				\n"
+        "										\n"
+        "	msr psp, r0							\n"
+        "	isb									\n"
+        "										\n"
+        #ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata workaround. */
+            #if WORKAROUND_PMU_CM001 == 1
+                "			push { r14 }				\n"
+                "			pop { pc }					\n"
+            #endif
+        #endif
+        "										\n"
+        "	bx r14								\n"
+        "										\n"
+        "	.align 4							\n"
+        "pxCurrentTCBConst: .word pxCurrentTCB	\n"
+        ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
+    );
 }
 /*-----------------------------------------------------------*/
 
 void xPortSysTickHandler( void )
 {
-	/* The SysTick runs at the lowest interrupt priority, so when this interrupt
-	executes all interrupts must be unmasked.  There is therefore no need to
-	save and then restore the interrupt mask value as its value is already
-	known. */
-	portDISABLE_INTERRUPTS();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* A context switch is required.  Context switching is performed in
-			the PendSV interrupt.  Pend the PendSV interrupt. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portENABLE_INTERRUPTS();
+    /* The SysTick runs at the lowest interrupt priority, so when this interrupt
+     * executes all interrupts must be unmasked.  There is therefore no need to
+     * save and then restore the interrupt mask value as its value is already
+     * known. */
+    portDISABLE_INTERRUPTS();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* A context switch is required.  Context switching is performed in
+             * the PendSV interrupt.  Pend the PendSV interrupt. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+    portENABLE_INTERRUPTS();
 }
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TICKLESS_IDLE == 1 )
+#if ( configUSE_TICKLESS_IDLE == 1 )
 
-	__attribute__((weak)) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-	{
-	uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
-	TickType_t xModifiableIdleTime;
+    __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+    {
+        uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+        TickType_t xModifiableIdleTime;
 
-		/* Make sure the SysTick reload value does not overflow the counter. */
-		if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-		{
-			xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-		}
+        /* Make sure the SysTick reload value does not overflow the counter. */
+        if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+        {
+            xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+        }
 
-		/* Stop the SysTick momentarily.  The time the SysTick is stopped for
-		is accounted for as best it can be, but using the tickless mode will
-		inevitably result in some tiny drift of the time maintained by the
-		kernel with respect to calendar time. */
-		portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+        /* Stop the SysTick momentarily.  The time the SysTick is stopped for
+         * is accounted for as best it can be, but using the tickless mode will
+         * inevitably result in some tiny drift of the time maintained by the
+         * kernel with respect to calendar time. */
+        portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
 
-		/* Calculate the reload value required to wait xExpectedIdleTime
-		tick periods.  -1 is used because this code will execute part way
-		through one of the tick periods. */
-		ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-		if( ulReloadValue > ulStoppedTimerCompensation )
-		{
-			ulReloadValue -= ulStoppedTimerCompensation;
-		}
+        /* Calculate the reload value required to wait xExpectedIdleTime
+         * tick periods.  -1 is used because this code will execute part way
+         * through one of the tick periods. */
+        ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
 
-		/* Enter a critical section but don't use the taskENTER_CRITICAL()
-		method as that will mask interrupts that should exit sleep mode. */
-		__asm volatile( "cpsid i" ::: "memory" );
-		__asm volatile( "dsb" );
-		__asm volatile( "isb" );
+        if( ulReloadValue > ulStoppedTimerCompensation )
+        {
+            ulReloadValue -= ulStoppedTimerCompensation;
+        }
 
-		/* If a context switch is pending or a task is waiting for the scheduler
-		to be unsuspended then abandon the low power entry. */
-		if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-		{
-			/* Restart from whatever is left in the count register to complete
-			this tick period. */
-			portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+        /* Enter a critical section but don't use the taskENTER_CRITICAL()
+         * method as that will mask interrupts that should exit sleep mode. */
+        __asm volatile ( "cpsid i" ::: "memory" );
+        __asm volatile ( "dsb" );
+        __asm volatile ( "isb" );
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+        /* If a context switch is pending or a task is waiting for the scheduler
+         * to be unsuspended then abandon the low power entry. */
+        if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+        {
+            /* Restart from whatever is left in the count register to complete
+             * this tick period. */
+            portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Reset the reload register to the value required for normal tick
-			periods. */
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts - see comments above the cpsid instruction()
-			above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-		else
-		{
-			/* Set the new reload value. */
-			portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+            /* Reset the reload register to the value required for normal tick
+             * periods. */
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
 
-			/* Clear the SysTick count flag and set the count value back to
-			zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            /* Re-enable interrupts - see comments above the cpsid instruction()
+             * above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+        else
+        {
+            /* Set the new reload value. */
+            portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            /* Clear the SysTick count flag and set the count value back to
+             * zero. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-			/* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
-			set its parameter to 0 to indicate that its implementation contains
-			its own wait for interrupt or wait for event instruction, and so wfi
-			should not be executed again.  However, the original expected idle
-			time variable must remain unmodified, so a copy is taken. */
-			xModifiableIdleTime = xExpectedIdleTime;
-			configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-			if( xModifiableIdleTime > 0 )
-			{
-				__asm volatile( "dsb" ::: "memory" );
-				__asm volatile( "wfi" );
-				__asm volatile( "isb" );
-			}
-			configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts to allow the interrupt that brought the MCU
-			out of sleep mode to execute immediately.  see comments above
-			__disable_interrupt() call above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
+            /* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
+             * set its parameter to 0 to indicate that its implementation contains
+             * its own wait for interrupt or wait for event instruction, and so wfi
+             * should not be executed again.  However, the original expected idle
+             * time variable must remain unmodified, so a copy is taken. */
+            xModifiableIdleTime = xExpectedIdleTime;
+            configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
 
-			/* Disable interrupts again because the clock is about to be stopped
-			and interrupts that execute while the clock is stopped will increase
-			any slippage between the time maintained by the RTOS and calendar
-			time. */
-			__asm volatile( "cpsid i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
+            if( xModifiableIdleTime > 0 )
+            {
+                __asm volatile ( "dsb" ::: "memory" );
+                __asm volatile ( "wfi" );
+                __asm volatile ( "isb" );
+            }
 
-			/* Disable the SysTick clock without reading the
-			portNVIC_SYSTICK_CTRL_REG register to ensure the
-			portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
-			the time the SysTick is stopped for is accounted for as best it can
-			be, but using the tickless mode will inevitably result in some tiny
-			drift of the time maintained by the kernel with respect to calendar
-			time*/
-			portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+            configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
 
-			/* Determine if the SysTick clock has already counted to zero and
-			been set back to the current reload value (the reload back being
-			correct for the entire expected idle time) or if the SysTick is yet
-			to count to zero (in which case an interrupt other than the SysTick
-			must have brought the system out of sleep mode). */
-			if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-			{
-				uint32_t ulCalculatedLoadValue;
+            /* Re-enable interrupts to allow the interrupt that brought the MCU
+             * out of sleep mode to execute immediately.  see comments above
+             * __disable_interrupt() call above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
 
-				/* The tick interrupt is already pending, and the SysTick count
-				reloaded with ulReloadValue.  Reset the
-				portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
-				period. */
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+            /* Disable interrupts again because the clock is about to be stopped
+             * and interrupts that execute while the clock is stopped will increase
+             * any slippage between the time maintained by the RTOS and calendar
+             * time. */
+            __asm volatile ( "cpsid i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
 
-				/* Don't allow a tiny value, or values that have somehow
-				underflowed because the post sleep hook did something
-				that took too long. */
-				if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-				{
-					ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-				}
+            /* Disable the SysTick clock without reading the
+             * portNVIC_SYSTICK_CTRL_REG register to ensure the
+             * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
+             * the time the SysTick is stopped for is accounted for as best it can
+             * be, but using the tickless mode will inevitably result in some tiny
+             * drift of the time maintained by the kernel with respect to calendar
+             * time*/
+            portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
 
-				portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+            /* Determine if the SysTick clock has already counted to zero and
+             * been set back to the current reload value (the reload back being
+             * correct for the entire expected idle time) or if the SysTick is yet
+             * to count to zero (in which case an interrupt other than the SysTick
+             * must have brought the system out of sleep mode). */
+            if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+            {
+                uint32_t ulCalculatedLoadValue;
 
-				/* As the pending tick will be processed as soon as this
-				function exits, the tick value maintained by the tick is stepped
-				forward by one less than the time spent waiting. */
-				ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-			}
-			else
-			{
-				/* Something other than the tick interrupt ended the sleep.
-				Work out how long the sleep lasted rounded to complete tick
-				periods (not the ulReload value which accounted for part
-				ticks). */
-				ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+                /* The tick interrupt is already pending, and the SysTick count
+                 * reloaded with ulReloadValue.  Reset the
+                 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+                 * period. */
+                ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
 
-				/* How many complete tick periods passed while the processor
-				was waiting? */
-				ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+                /* Don't allow a tiny value, or values that have somehow
+                 * underflowed because the post sleep hook did something
+                 * that took too long. */
+                if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+                {
+                    ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+                }
 
-				/* The reload value is set to whatever fraction of a single tick
-				period remains. */
-				portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-			}
+                portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
 
-			/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
-			again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
-			value. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-			vTaskStepTick( ulCompleteTickPeriods );
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+                /* As the pending tick will be processed as soon as this
+                 * function exits, the tick value maintained by the tick is stepped
+                 * forward by one less than the time spent waiting. */
+                ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+            }
+            else
+            {
+                /* Something other than the tick interrupt ended the sleep.
+                 * Work out how long the sleep lasted rounded to complete tick
+                 * periods (not the ulReload value which accounted for part
+                 * ticks). */
+                ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Exit with interrupts enabled. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-	}
+                /* How many complete tick periods passed while the processor
+                 * was waiting? */
+                ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+                /* The reload value is set to whatever fraction of a single tick
+                 * period remains. */
+                portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+            }
+
+            /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+             * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+             * value. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            vTaskStepTick( ulCompleteTickPeriods );
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Exit with interrupts enabled. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+    }
 
 #endif /* #if configUSE_TICKLESS_IDLE */
 /*-----------------------------------------------------------*/
@@ -676,100 +685,99 @@ void xPortSysTickHandler( void )
  * Setup the systick timer to generate the tick interrupts at the required
  * frequency.
  */
-__attribute__(( weak )) void vPortSetupTimerInterrupt( void )
+__attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void )
 {
-	/* Calculate the constants required to configure the tick interrupt. */
-	#if( configUSE_TICKLESS_IDLE == 1 )
-	{
-		ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
-		xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
-	}
-	#endif /* configUSE_TICKLESS_IDLE */
+    /* Calculate the constants required to configure the tick interrupt. */
+    #if ( configUSE_TICKLESS_IDLE == 1 )
+        {
+            ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+            xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+            ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+        }
+    #endif /* configUSE_TICKLESS_IDLE */
 
-	/* Stop and clear the SysTick. */
-	portNVIC_SYSTICK_CTRL_REG = 0UL;
-	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+    /* Stop and clear the SysTick. */
+    portNVIC_SYSTICK_CTRL_REG = 0UL;
+    portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-	/* Configure SysTick to interrupt at the requested rate. */
-	portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
+    /* Configure SysTick to interrupt at the requested rate. */
+    portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+    portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
 }
 /*-----------------------------------------------------------*/
 
 /* This is a naked function. */
 static void vPortEnableVFP( void )
 {
-	__asm volatile
-	(
-		"	ldr.w r0, =0xE000ED88		\n" /* The FPU enable bits are in the CPACR. */
-		"	ldr r1, [r0]				\n"
-		"								\n"
-		"	orr r1, r1, #( 0xf << 20 )	\n" /* Enable CP10 and CP11 coprocessors, then save back. */
-		"	str r1, [r0]				\n"
-		"	bx r14						"
-	);
+    __asm volatile
+    (
+        "	ldr.w r0, =0xE000ED88		\n"/* The FPU enable bits are in the CPACR. */
+        "	ldr r1, [r0]				\n"
+        "								\n"
+        "	orr r1, r1, #( 0xf << 20 )	\n"/* Enable CP10 and CP11 coprocessors, then save back. */
+        "	str r1, [r0]				\n"
+        "	bx r14						\n"
+        "	.ltorg						\n"
+    );
 }
 /*-----------------------------------------------------------*/
 
-#if( configASSERT_DEFINED == 1 )
+#if ( configASSERT_DEFINED == 1 )
 
-	void vPortValidateInterruptPriority( void )
-	{
-	uint32_t ulCurrentInterrupt;
-	uint8_t ucCurrentPriority;
+    void vPortValidateInterruptPriority( void )
+    {
+        uint32_t ulCurrentInterrupt;
+        uint8_t ucCurrentPriority;
 
-		/* Obtain the number of the currently executing interrupt. */
-		__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+        /* Obtain the number of the currently executing interrupt. */
+        __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
-		/* Is the interrupt number a user defined interrupt? */
-		if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
-		{
-			/* Look up the interrupt's priority. */
-			ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
+        /* Is the interrupt number a user defined interrupt? */
+        if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
+        {
+            /* Look up the interrupt's priority. */
+            ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
 
-			/* The following assertion will fail if a service routine (ISR) for
-			an interrupt that has been assigned a priority above
-			configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
-			function.  ISR safe FreeRTOS API functions must *only* be called
-			from interrupts that have been assigned a priority at or below
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
+            /* The following assertion will fail if a service routine (ISR) for
+             * an interrupt that has been assigned a priority above
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
+             * function.  ISR safe FreeRTOS API functions must *only* be called
+             * from interrupts that have been assigned a priority at or below
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Numerically low interrupt priority numbers represent logically high
+             * interrupt priorities, therefore the priority of the interrupt must
+             * be set to a value equal to or numerically *higher* than
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Interrupts that	use the FreeRTOS API must not be left at their
+             * default priority of	zero as that is the highest possible priority,
+             * which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
+             * and	therefore also guaranteed to be invalid.
+             *
+             * FreeRTOS maintains separate thread and ISR API functions to ensure
+             * interrupt entry is as fast and simple as possible.
+             *
+             * The following links provide detailed information:
+             * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+             * https://www.FreeRTOS.org/FAQHelp.html */
+            configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
+        }
 
-			Numerically low interrupt priority numbers represent logically high
-			interrupt priorities, therefore the priority of the interrupt must
-			be set to a value equal to or numerically *higher* than
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
-
-			Interrupts that	use the FreeRTOS API must not be left at their
-			default priority of	zero as that is the highest possible priority,
-			which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
-			and	therefore also guaranteed to be invalid.
-
-			FreeRTOS maintains separate thread and ISR API functions to ensure
-			interrupt entry is as fast and simple as possible.
-
-			The following links provide detailed information:
-			http://www.freertos.org/RTOS-Cortex-M3-M4.html
-			http://www.freertos.org/FAQHelp.html */
-			configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
-		}
-
-		/* Priority grouping:  The interrupt controller (NVIC) allows the bits
-		that define each interrupt's priority to be split between bits that
-		define the interrupt's pre-emption priority bits and bits that define
-		the interrupt's sub-priority.  For simplicity all bits must be defined
-		to be pre-emption priority bits.  The following assertion will fail if
-		this is not the case (if some bits represent a sub-priority).
-
-		If the application only uses CMSIS libraries for interrupt
-		configuration then the correct setting can be achieved on all Cortex-M
-		devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
-		scheduler.  Note however that some vendor specific peripheral libraries
-		assume a non-zero priority group setting, in which cases using a value
-		of zero will result in unpredictable behaviour. */
-		configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
-	}
+        /* Priority grouping:  The interrupt controller (NVIC) allows the bits
+         * that define each interrupt's priority to be split between bits that
+         * define the interrupt's pre-emption priority bits and bits that define
+         * the interrupt's sub-priority.  For simplicity all bits must be defined
+         * to be pre-emption priority bits.  The following assertion will fail if
+         * this is not the case (if some bits represent a sub-priority).
+         *
+         * If the application only uses CMSIS libraries for interrupt
+         * configuration then the correct setting can be achieved on all Cortex-M
+         * devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
+         * scheduler.  Note however that some vendor specific peripheral libraries
+         * assume a non-zero priority group setting, in which cases using a value
+         * of zero will result in unpredictable behaviour. */
+        configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
+    }
 
 #endif /* configASSERT_DEFINED */
-
-
diff --git a/portable/GCC/ARM_CM4F/portmacro.h b/portable/GCC/ARM_CM4F/portmacro.h
index b94366dfd..f3c708d3d 100644
--- a/portable/GCC/ARM_CM4F/portmacro.h
+++ b/portable/GCC/ARM_CM4F/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,19 +19,19 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -44,201 +44,201 @@ extern "C" {
  */
 
 /* Type definitions. */
-#define portCHAR		char
-#define portFLOAT		float
-#define portDOUBLE		double
-#define portLONG		long
-#define portSHORT		short
-#define portSTACK_TYPE	uint32_t
-#define portBASE_TYPE	long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE StackType_t;
-typedef long BaseType_t;
-typedef unsigned long UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC 1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Architecture specifics. */
-#define portSTACK_GROWTH			( -1 )
-#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT			8
-#define portDONT_DISCARD			__attribute__(( used ))
+    #define portSTACK_GROWTH      ( -1 )
+    #define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT    8
+    #define portDONT_DISCARD      __attribute__( ( used ) )
 /*-----------------------------------------------------------*/
 
 /* Scheduler utilities. */
-#define portYIELD() 															\
-{																				\
-	/* Set a PendSV to request a context switch. */								\
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;								\
-																				\
-	/* Barriers are normally not required but do ensure the code is completely	\
-	within the specified behaviour for the architecture. */						\
-	__asm volatile( "dsb" ::: "memory" );										\
-	__asm volatile( "isb" );													\
-}
+    #define portYIELD()                                 \
+    {                                                   \
+        /* Set a PendSV to request a context switch. */ \
+        portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
+                                                        \
+        /* Barriers are normally not required but do ensure the code is completely \
+         * within the specified behaviour for the architecture. */ \
+        __asm volatile ( "dsb" ::: "memory" );                     \
+        __asm volatile ( "isb" );                                  \
+    }
 
-#define portNVIC_INT_CTRL_REG		( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT		( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()
-#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired != pdFALSE ) portYIELD()
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /* Critical section management. */
-extern void vPortEnterCritical( void );
-extern void vPortExitCritical( void );
-#define portSET_INTERRUPT_MASK_FROM_ISR()		ulPortRaiseBASEPRI()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)	vPortSetBASEPRI(x)
-#define portDISABLE_INTERRUPTS()				vPortRaiseBASEPRI()
-#define portENABLE_INTERRUPTS()					vPortSetBASEPRI(0)
-#define portENTER_CRITICAL()					vPortEnterCritical()
-#define portEXIT_CRITICAL()						vPortExitCritical()
+    extern void vPortEnterCritical( void );
+    extern void vPortExitCritical( void );
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulPortRaiseBASEPRI()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vPortSetBASEPRI( x )
+    #define portDISABLE_INTERRUPTS()                  vPortRaiseBASEPRI()
+    #define portENABLE_INTERRUPTS()                   vPortSetBASEPRI( 0 )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
 
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site.  These are
-not necessary for to use this port.  They are defined so the common demo files
-(which build with all the ports) will build. */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+ * not necessary for to use this port.  They are defined so the common demo files
+ * (which build with all the ports) will build. */
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
 /* Tickless idle/low power functionality. */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Architecture specific optimisations. */
-#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
-	#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
-#endif
+    #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
+        #define configUSE_PORT_OPTIMISED_TASK_SELECTION    1
+    #endif
 
-#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
+    #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
 
-	/* Generic helper function. */
-	__attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
-	{
-	uint8_t ucReturn;
+/* Generic helper function. */
+        __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
+        {
+            uint8_t ucReturn;
 
-		__asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
-		return ucReturn;
-	}
+            __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
 
-	/* Check the configuration. */
-	#if( configMAX_PRIORITIES > 32 )
-		#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
-	#endif
+            return ucReturn;
+        }
 
-	/* Store/clear the ready priorities in a bit map. */
-	#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
-	#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
+/* Check the configuration. */
+        #if ( configMAX_PRIORITIES > 32 )
+            #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
+        #endif
 
-	/*-----------------------------------------------------------*/
-
-	#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
-
-#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
+/* Store/clear the ready priorities in a bit map. */
+        #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities )    ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
+        #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities )     ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
 
 /*-----------------------------------------------------------*/
 
-#ifdef configASSERT
-	void vPortValidateInterruptPriority( void );
-	#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() 	vPortValidateInterruptPriority()
-#endif
+        #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities )    uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
+
+    #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
+
+/*-----------------------------------------------------------*/
+
+    #ifdef configASSERT
+        void vPortValidateInterruptPriority( void );
+        #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()    vPortValidateInterruptPriority()
+    #endif
 
 /* portNOP() is not required by this port. */
-#define portNOP()
+    #define portNOP()
 
-#define portINLINE	__inline
+    #define portINLINE              __inline
 
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE inline __attribute__(( always_inline))
-#endif
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE    inline __attribute__( ( always_inline ) )
+    #endif
 
-portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
-{
-uint32_t ulCurrentInterrupt;
-BaseType_t xReturn;
+    portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
+    {
+        uint32_t ulCurrentInterrupt;
+        BaseType_t xReturn;
 
-	/* Obtain the number of the currently executing interrupt. */
-	__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+        /* Obtain the number of the currently executing interrupt. */
+        __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
-	if( ulCurrentInterrupt == 0 )
-	{
-		xReturn = pdFALSE;
-	}
-	else
-	{
-		xReturn = pdTRUE;
-	}
+        if( ulCurrentInterrupt == 0 )
+        {
+            xReturn = pdFALSE;
+        }
+        else
+        {
+            xReturn = pdTRUE;
+        }
 
-	return xReturn;
-}
+        return xReturn;
+    }
 
 /*-----------------------------------------------------------*/
 
-portFORCE_INLINE static void vPortRaiseBASEPRI( void )
-{
-uint32_t ulNewBASEPRI;
+    portFORCE_INLINE static void vPortRaiseBASEPRI( void )
+    {
+        uint32_t ulNewBASEPRI;
 
-	__asm volatile
-	(
-		"	mov %0, %1												\n"	\
-		"	msr basepri, %0											\n" \
-		"	isb														\n" \
-		"	dsb														\n" \
-		:"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
-	);
-}
+        __asm volatile
+        (
+            "	mov %0, %1												\n"\
+            "	msr basepri, %0											\n"\
+            "	isb														\n"\
+            "	dsb														\n"\
+            : "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
+        );
+    }
 
 /*-----------------------------------------------------------*/
 
-portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
-{
-uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
+    portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
+    {
+        uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
 
-	__asm volatile
-	(
-		"	mrs %0, basepri											\n" \
-		"	mov %1, %2												\n"	\
-		"	msr basepri, %1											\n" \
-		"	isb														\n" \
-		"	dsb														\n" \
-		:"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
-	);
+        __asm volatile
+        (
+            "	mrs %0, basepri											\n"\
+            "	mov %1, %2												\n"\
+            "	msr basepri, %1											\n"\
+            "	isb														\n"\
+            "	dsb														\n"\
+            : "=r" ( ulOriginalBASEPRI ), "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
+        );
 
-	/* This return will not be reached but is necessary to prevent compiler
-	warnings. */
-	return ulOriginalBASEPRI;
-}
+        /* This return will not be reached but is necessary to prevent compiler
+         * warnings. */
+        return ulOriginalBASEPRI;
+    }
 /*-----------------------------------------------------------*/
 
-portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
-{
-	__asm volatile
-	(
-		"	msr basepri, %0	" :: "r" ( ulNewMaskValue ) : "memory"
-	);
-}
+    portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
+    {
+        __asm volatile
+        (
+            "	msr basepri, %0	"::"r" ( ulNewMaskValue ) : "memory"
+        );
+    }
 /*-----------------------------------------------------------*/
 
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
+    #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
-
diff --git a/portable/GCC/ARM_CM4_MPU/port.c b/portable/GCC/ARM_CM4_MPU/port.c
index 5f9697cea..34356dcf0 100644
--- a/portable/GCC/ARM_CM4_MPU/port.c
+++ b/portable/GCC/ARM_CM4_MPU/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,19 +19,18 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------
- * Implementation of functions defined in portable.h for the ARM CM3 port.
- *----------------------------------------------------------*/
+* Implementation of functions defined in portable.h for the ARM CM4 MPU port.
+*----------------------------------------------------------*/
 
 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
-all the API functions to use the MPU wrappers.  That should only be done when
-task.h is included from an application file. */
+ * all the API functions to use the MPU wrappers.  That should only be done when
+ * task.h is included from an application file. */
 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
 /* Scheduler includes. */
@@ -39,77 +38,78 @@ task.h is included from an application file. */
 #include "task.h"
 
 #ifndef __VFP_FP__
-	#error This port can only be used when the project options are configured to enable hardware floating point support.
+    #error This port can only be used when the project options are configured to enable hardware floating point support.
 #endif
 
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
 #ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK	( 1UL << 2UL )
+    #define configSYSTICK_CLOCK_HZ    configCPU_CLOCK_HZ
+    /* Ensure the SysTick is clocked at the same frequency as the core. */
+    #define portNVIC_SYSTICK_CLK      ( 1UL << 2UL )
 #else
-	/* The way the SysTick is clocked is not modified in case it is not the same
-	as the core. */
-	#define portNVIC_SYSTICK_CLK	( 0 )
+
+/* The way the SysTick is clocked is not modified in case it is not the same
+ * as the core. */
+    #define portNVIC_SYSTICK_CLK    ( 0 )
 #endif
 
 /* Constants required to access and manipulate the NVIC. */
-#define portNVIC_SYSTICK_CTRL_REG				( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG				( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG		( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG					( *	( ( volatile uint32_t * ) 0xe000ed20 ) )
-#define portNVIC_SYSPRI1_REG					( * ( ( volatile uint32_t * ) 0xe000ed1c ) )
-#define portNVIC_SYS_CTRL_STATE_REG				( * ( ( volatile uint32_t * ) 0xe000ed24 ) )
-#define portNVIC_MEM_FAULT_ENABLE				( 1UL << 16UL )
+#define portNVIC_SYSTICK_CTRL_REG                 ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG                 ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG        ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SHPR3_REG                        ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SHPR2_REG                        ( *( ( volatile uint32_t * ) 0xe000ed1c ) )
+#define portNVIC_SYS_CTRL_STATE_REG               ( *( ( volatile uint32_t * ) 0xe000ed24 ) )
+#define portNVIC_MEM_FAULT_ENABLE                 ( 1UL << 16UL )
 
 /* Constants required to access and manipulate the MPU. */
-#define portMPU_TYPE_REG						( * ( ( volatile uint32_t * ) 0xe000ed90 ) )
-#define portMPU_REGION_BASE_ADDRESS_REG			( * ( ( volatile uint32_t * ) 0xe000ed9C ) )
-#define portMPU_REGION_ATTRIBUTE_REG			( * ( ( volatile uint32_t * ) 0xe000edA0 ) )
-#define portMPU_CTRL_REG						( * ( ( volatile uint32_t * ) 0xe000ed94 ) )
-#define portEXPECTED_MPU_TYPE_VALUE				( 8UL << 8UL ) /* 8 regions, unified. */
-#define portMPU_ENABLE							( 0x01UL )
-#define portMPU_BACKGROUND_ENABLE				( 1UL << 2UL )
-#define portPRIVILEGED_EXECUTION_START_ADDRESS	( 0UL )
-#define portMPU_REGION_VALID					( 0x10UL )
-#define portMPU_REGION_ENABLE					( 0x01UL )
-#define portPERIPHERALS_START_ADDRESS			0x40000000UL
-#define portPERIPHERALS_END_ADDRESS				0x5FFFFFFFUL
+#define portMPU_TYPE_REG                          ( *( ( volatile uint32_t * ) 0xe000ed90 ) )
+#define portMPU_REGION_BASE_ADDRESS_REG           ( *( ( volatile uint32_t * ) 0xe000ed9C ) )
+#define portMPU_REGION_ATTRIBUTE_REG              ( *( ( volatile uint32_t * ) 0xe000edA0 ) )
+#define portMPU_CTRL_REG                          ( *( ( volatile uint32_t * ) 0xe000ed94 ) )
+#define portEXPECTED_MPU_TYPE_VALUE               ( portTOTAL_NUM_REGIONS << 8UL )
+#define portMPU_ENABLE                            ( 0x01UL )
+#define portMPU_BACKGROUND_ENABLE                 ( 1UL << 2UL )
+#define portPRIVILEGED_EXECUTION_START_ADDRESS    ( 0UL )
+#define portMPU_REGION_VALID                      ( 0x10UL )
+#define portMPU_REGION_ENABLE                     ( 0x01UL )
+#define portPERIPHERALS_START_ADDRESS             0x40000000UL
+#define portPERIPHERALS_END_ADDRESS               0x5FFFFFFFUL
 
 /* Constants required to access and manipulate the SysTick. */
-#define portNVIC_SYSTICK_INT					( 0x00000002UL )
-#define portNVIC_SYSTICK_ENABLE					( 0x00000001UL )
-#define portNVIC_PENDSV_PRI						( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
-#define portNVIC_SYSTICK_PRI					( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
-#define portNVIC_SVC_PRI						( ( ( uint32_t ) configMAX_SYSCALL_INTERRUPT_PRIORITY - 1UL ) << 24UL )
+#define portNVIC_SYSTICK_INT                      ( 0x00000002UL )
+#define portNVIC_SYSTICK_ENABLE                   ( 0x00000001UL )
+#define portNVIC_PENDSV_PRI                       ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
+#define portNVIC_SYSTICK_PRI                      ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
+#define portNVIC_SVC_PRI                          ( ( ( uint32_t ) configMAX_SYSCALL_INTERRUPT_PRIORITY - 1UL ) << 24UL )
 
 /* Constants required to manipulate the VFP. */
-#define portFPCCR								( ( volatile uint32_t * ) 0xe000ef34UL ) /* Floating point context control register. */
-#define portASPEN_AND_LSPEN_BITS				( 0x3UL << 30UL )
+#define portFPCCR                                 ( ( volatile uint32_t * ) 0xe000ef34UL ) /* Floating point context control register. */
+#define portASPEN_AND_LSPEN_BITS                  ( 0x3UL << 30UL )
 
 /* Constants required to set up the initial stack. */
-#define portINITIAL_XPSR						( 0x01000000UL )
-#define portINITIAL_EXC_RETURN					( 0xfffffffdUL )
-#define portINITIAL_CONTROL_IF_UNPRIVILEGED		( 0x03 )
-#define portINITIAL_CONTROL_IF_PRIVILEGED		( 0x02 )
+#define portINITIAL_XPSR                          ( 0x01000000UL )
+#define portINITIAL_EXC_RETURN                    ( 0xfffffffdUL )
+#define portINITIAL_CONTROL_IF_UNPRIVILEGED       ( 0x03 )
+#define portINITIAL_CONTROL_IF_PRIVILEGED         ( 0x02 )
 
 /* Constants required to check the validity of an interrupt priority. */
-#define portFIRST_USER_INTERRUPT_NUMBER		( 16 )
-#define portNVIC_IP_REGISTERS_OFFSET_16 	( 0xE000E3F0 )
-#define portAIRCR_REG						( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
-#define portMAX_8_BIT_VALUE					( ( uint8_t ) 0xff )
-#define portTOP_BIT_OF_BYTE					( ( uint8_t ) 0x80 )
-#define portMAX_PRIGROUP_BITS				( ( uint8_t ) 7 )
-#define portPRIORITY_GROUP_MASK				( 0x07UL << 8UL )
-#define portPRIGROUP_SHIFT					( 8UL )
+#define portFIRST_USER_INTERRUPT_NUMBER           ( 16 )
+#define portNVIC_IP_REGISTERS_OFFSET_16           ( 0xE000E3F0 )
+#define portAIRCR_REG                             ( *( ( volatile uint32_t * ) 0xE000ED0C ) )
+#define portMAX_8_BIT_VALUE                       ( ( uint8_t ) 0xff )
+#define portTOP_BIT_OF_BYTE                       ( ( uint8_t ) 0x80 )
+#define portMAX_PRIGROUP_BITS                     ( ( uint8_t ) 7 )
+#define portPRIORITY_GROUP_MASK                   ( 0x07UL << 8UL )
+#define portPRIGROUP_SHIFT                        ( 8UL )
 
 /* Offsets in the stack to the parameters when inside the SVC handler. */
-#define portOFFSET_TO_PC						( 6 )
+#define portOFFSET_TO_PC                          ( 6 )
 
 /* For strict compliance with the Cortex-M spec the task start address should
-have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
-#define portSTART_ADDRESS_MASK				( ( StackType_t ) 0xfffffffeUL )
+ * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
+#define portSTART_ADDRESS_MASK                    ( ( StackType_t ) 0xfffffffeUL )
 
 /*
  * Configure a number of standard MPU regions that are used by all tasks.
@@ -133,32 +133,32 @@ void vPortSetupTimerInterrupt( void );
 /*
  * Standard FreeRTOS exception handlers.
  */
-void xPortPendSVHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void xPortPendSVHandler( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 void xPortSysTickHandler( void ) PRIVILEGED_FUNCTION;
-void vPortSVCHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vPortSVCHandler( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /*
  * Starts the scheduler by restoring the context of the first task to run.
  */
-static void prvRestoreContextOfFirstTask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
+static void prvRestoreContextOfFirstTask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /*
  * C portion of the SVC handler.  The SVC handler is split between an asm entry
  * and a C wrapper for simplicity of coding and maintenance.
  */
-static void prvSVCHandler( uint32_t *pulRegisters ) __attribute__(( noinline )) PRIVILEGED_FUNCTION;
+static void prvSVCHandler( uint32_t * pulRegisters ) __attribute__( ( noinline ) ) PRIVILEGED_FUNCTION;
 
 /*
  * Function to enable the VFP.
  */
- static void vPortEnableVFP( void ) __attribute__ (( naked ));
+static void vPortEnableVFP( void ) __attribute__( ( naked ) );
 
 /**
  * @brief Checks whether or not the processor is privileged.
  *
  * @return 1 if the processor is already privileged, 0 otherwise.
  */
-BaseType_t xIsPrivileged( void ) __attribute__ (( naked ));
+BaseType_t xIsPrivileged( void ) __attribute__( ( naked ) );
 
 /**
  * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
@@ -168,7 +168,7 @@ BaseType_t xIsPrivileged( void ) __attribute__ (( naked ));
  *  Bit[0] = 0 --> The processor is running privileged
  *  Bit[0] = 1 --> The processor is running unprivileged.
  */
-void vResetPrivilege( void ) __attribute__ (( naked ));
+void vResetPrivilege( void ) __attribute__( ( naked ) );
 
 /**
  * @brief Calls the port specific code to raise the privilege.
@@ -185,8 +185,8 @@ extern void vPortResetPrivilege( BaseType_t xRunningPrivileged );
 /*-----------------------------------------------------------*/
 
 /* Each task maintains its own interrupt status in the critical nesting
-variable.  Note this is not saved as part of the task context as context
-switches can only occur when uxCriticalNesting is zero. */
+ * variable.  Note this is not saved as part of the task context as context
+ * switches can only occur when uxCriticalNesting is zero. */
 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 
 /*
@@ -195,9 +195,9 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
  * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
  */
 #if ( configASSERT_DEFINED == 1 )
-	 static uint8_t ucMaxSysCallPriority = 0;
-	 static uint32_t ulMaxPRIGROUPValue = 0;
-	 static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
+    static uint8_t ucMaxSysCallPriority = 0;
+    static uint32_t ulMaxPRIGROUPValue = 0;
+    static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
 #endif /* configASSERT_DEFINED */
 
 /*-----------------------------------------------------------*/
@@ -205,168 +205,186 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 /*
  * See header file for description.
  */
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged )
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters,
+                                     BaseType_t xRunPrivileged )
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	interrupt. */
-	pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
-	pxTopOfStack--;
-	*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;	/* PC */
-	pxTopOfStack--;
-	*pxTopOfStack = 0;	/* LR */
-	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
-	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
+    pxTopOfStack--;                                                      /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+    *pxTopOfStack = portINITIAL_XPSR;                                    /* xPSR */
+    pxTopOfStack--;
+    *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
+    pxTopOfStack--;
+    *pxTopOfStack = 0;                                                   /* LR */
+    pxTopOfStack -= 5;                                                   /* R12, R3, R2 and R1. */
+    *pxTopOfStack = ( StackType_t ) pvParameters;                        /* R0 */
 
-	/* A save method is being used that requires each task to maintain its
-	own exec return value. */
-	pxTopOfStack--;
-	*pxTopOfStack = portINITIAL_EXC_RETURN;
+    /* A save method is being used that requires each task to maintain its
+     * own exec return value. */
+    pxTopOfStack--;
+    *pxTopOfStack = portINITIAL_EXC_RETURN;
 
-	pxTopOfStack -= 9;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
+    pxTopOfStack -= 9; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
 
-	if( xRunPrivileged == pdTRUE )
-	{
-		*pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;
-	}
-	else
-	{
-		*pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;
-	}
+    if( xRunPrivileged == pdTRUE )
+    {
+        *pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;
+    }
+    else
+    {
+        *pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;
+    }
 
-	return pxTopOfStack;
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 void vPortSVCHandler( void )
 {
-	/* Assumes psp was in use. */
-	__asm volatile
-	(
-		#ifndef USE_PROCESS_STACK	/* Code should not be required if a main() is using the process stack. */
-			"	tst lr, #4						\n"
-			"	ite eq							\n"
-			"	mrseq r0, msp					\n"
-			"	mrsne r0, psp					\n"
-		#else
-			"	mrs r0, psp						\n"
-		#endif
-			"	b %0							\n"
-			::"i"(prvSVCHandler):"r0", "memory"
-	);
+    /* Assumes psp was in use. */
+    __asm volatile
+    (
+        #ifndef USE_PROCESS_STACK   /* Code should not be required if a main() is using the process stack. */
+            "	tst lr, #4						\n"
+            "	ite eq							\n"
+            "	mrseq r0, msp					\n"
+            "	mrsne r0, psp					\n"
+        #else
+            "	mrs r0, psp						\n"
+        #endif
+        "	b %0							\n"
+        ::"i" ( prvSVCHandler ) : "r0", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
-static void prvSVCHandler(	uint32_t *pulParam )
+static void prvSVCHandler( uint32_t * pulParam )
 {
-uint8_t ucSVCNumber;
-uint32_t ulPC;
-#if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 )
-	#if defined( __ARMCC_VERSION )
-		/* Declaration when these variable are defined in code instead of being
-		* exported from linker scripts. */
-		extern uint32_t * __syscalls_flash_start__;
-		extern uint32_t * __syscalls_flash_end__;
-	#else
-		/* Declaration when these variable are exported from linker scripts. */
-		extern uint32_t __syscalls_flash_start__[];
-		extern uint32_t __syscalls_flash_end__[];
-	#endif /* #if defined( __ARMCC_VERSION ) */
-#endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */
+    uint8_t ucSVCNumber;
+    uint32_t ulPC;
 
-	/* The stack contains: r0, r1, r2, r3, r12, LR, PC and xPSR.  The first
-	argument (r0) is pulParam[ 0 ]. */
-	ulPC = pulParam[ portOFFSET_TO_PC ];
-	ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ];
+    #if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 )
+        #if defined( __ARMCC_VERSION )
 
-	switch( ucSVCNumber )
-	{
-		case portSVC_START_SCHEDULER	:	portNVIC_SYSPRI1_REG |= portNVIC_SVC_PRI;
-											prvRestoreContextOfFirstTask();
-											break;
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __syscalls_flash_start__;
+            extern uint32_t * __syscalls_flash_end__;
+        #else
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __syscalls_flash_start__[];
+            extern uint32_t __syscalls_flash_end__[];
+        #endif /* #if defined( __ARMCC_VERSION ) */
+    #endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */
 
-		case portSVC_YIELD				:	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-											/* Barriers are normally not required
-											but do ensure the code is completely
-											within the specified behaviour for the
-											architecture. */
-											__asm volatile( "dsb" ::: "memory" );
-											__asm volatile( "isb" );
+    /* The stack contains: r0, r1, r2, r3, r12, LR, PC and xPSR.  The first
+     * argument (r0) is pulParam[ 0 ]. */
+    ulPC = pulParam[ portOFFSET_TO_PC ];
+    ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ];
 
-											break;
+    switch( ucSVCNumber )
+    {
+        case portSVC_START_SCHEDULER:
+            portNVIC_SHPR2_REG |= portNVIC_SVC_PRI;
+            prvRestoreContextOfFirstTask();
+            break;
 
-	#if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 )
-		case portSVC_RAISE_PRIVILEGE	:	/* Only raise the privilege, if the
-											 * svc was raised from any of the
-											 * system calls. */
-											if( ulPC >= ( uint32_t ) __syscalls_flash_start__ &&
-												ulPC <= ( uint32_t ) __syscalls_flash_end__ )
-											{
-												__asm volatile
-												(
-													"	mrs r1, control		\n" /* Obtain current control value. */
-													"	bic r1, #1			\n" /* Set privilege bit. */
-													"	msr control, r1		\n" /* Write back new control value. */
-													::: "r1", "memory"
-												);
-											}
-											break;
-	#else
-		case portSVC_RAISE_PRIVILEGE	:	__asm volatile
-											(
-												"	mrs r1, control		\n" /* Obtain current control value. */
-												"	bic r1, #1			\n" /* Set privilege bit. */
-												"	msr control, r1		\n" /* Write back new control value. */
-												::: "r1", "memory"
-											);
-											break;
-	#endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */
+        case portSVC_YIELD:
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
 
-		default							:	/* Unknown SVC call. */
-											break;
-	}
+            /* Barriers are normally not required
+             * but do ensure the code is completely
+             * within the specified behaviour for the
+             * architecture. */
+            __asm volatile ( "dsb" ::: "memory" );
+            __asm volatile ( "isb" );
+
+            break;
+
+            #if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 )
+                case portSVC_RAISE_PRIVILEGE: /* Only raise the privilege, if the
+                                               * svc was raised from any of the
+                                               * system calls. */
+
+                    if( ( ulPC >= ( uint32_t ) __syscalls_flash_start__ ) &&
+                        ( ulPC <= ( uint32_t ) __syscalls_flash_end__ ) )
+                    {
+                        __asm volatile
+                        (
+                            "	mrs r1, control		\n"/* Obtain current control value. */
+                            "	bic r1, #1			\n"/* Set privilege bit. */
+                            "	msr control, r1		\n"/* Write back new control value. */
+                            ::: "r1", "memory"
+                        );
+                    }
+
+                    break;
+            #else /* if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */
+                case portSVC_RAISE_PRIVILEGE:
+                    __asm volatile
+                    (
+                        "	mrs r1, control		\n"/* Obtain current control value. */
+                        "	bic r1, #1			\n"/* Set privilege bit. */
+                        "	msr control, r1		\n"/* Write back new control value. */
+                        ::: "r1", "memory"
+                    );
+                    break;
+                    #endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */
+
+                default: /* Unknown SVC call. */
+                    break;
+    }
 }
 /*-----------------------------------------------------------*/
 
 static void prvRestoreContextOfFirstTask( void )
 {
-	__asm volatile
-	(
-		"	ldr r0, =0xE000ED08				\n" /* Use the NVIC offset register to locate the stack. */
-		"	ldr r0, [r0]					\n"
-		"	ldr r0, [r0]					\n"
-		"	msr msp, r0						\n" /* Set the msp back to the start of the stack. */
-		"	ldr	r3, pxCurrentTCBConst2		\n" /* Restore the context. */
-		"	ldr r1, [r3]					\n"
-		"	ldr r0, [r1]					\n" /* The first item in the TCB is the task top of stack. */
-		"	add r1, r1, #4					\n" /* Move onto the second item in the TCB... */
-		"									\n"
-		"	dmb								\n" /* Complete outstanding transfers before disabling MPU. */
-		"	ldr r2, =0xe000ed94				\n" /* MPU_CTRL register. */
-		"	ldr r3, [r2]					\n" /* Read the value of MPU_CTRL. */
-		"	bic r3, #1						\n" /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
-		"	str r3, [r2]					\n" /* Disable MPU. */
-		"									\n"
-		"	ldr r2, =0xe000ed9c				\n" /* Region Base Address register. */
-		"	ldmia r1!, {r4-r11}				\n" /* Read 4 sets of MPU registers from TCB. */
-		"	stmia r2!, {r4-r11}				\n" /* Write 4 sets of MPU registers. */
-		"									\n"
-		"	ldr r2, =0xe000ed94				\n" /* MPU_CTRL register. */
-		"	ldr r3, [r2]					\n" /* Read the value of MPU_CTRL. */
-		"	orr r3, #1						\n" /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
-		"	str r3, [r2]					\n" /* Enable MPU. */
-		"	dsb								\n" /* Force memory writes before continuing. */
-		"									\n"
-		"	ldmia r0!, {r3-r11, r14}		\n" /* Pop the registers that are not automatically saved on exception entry. */
-		"	msr control, r3					\n"
-		"	msr psp, r0						\n" /* Restore the task stack pointer. */
-		"	mov r0, #0						\n"
-		"	msr	basepri, r0					\n"
-		"	bx r14							\n"
-		"									\n"
-		"	.align 4						\n"
-		"pxCurrentTCBConst2: .word pxCurrentTCB	\n"
-	);
+    __asm volatile
+    (
+        "	ldr r0, =0xE000ED08				\n"/* Use the NVIC offset register to locate the stack. */
+        "	ldr r0, [r0]					\n"
+        "	ldr r0, [r0]					\n"
+        "	msr msp, r0						\n"/* Set the msp back to the start of the stack. */
+        "	ldr	r3, pxCurrentTCBConst2		\n"/* Restore the context. */
+        "	ldr r1, [r3]					\n"
+        "	ldr r0, [r1]					\n"/* The first item in the TCB is the task top of stack. */
+        "	add r1, r1, #4					\n"/* Move onto the second item in the TCB... */
+        "									\n"
+        "	dmb								\n"/* Complete outstanding transfers before disabling MPU. */
+        "	ldr r2, =0xe000ed94				\n"/* MPU_CTRL register. */
+        "	ldr r3, [r2]					\n"/* Read the value of MPU_CTRL. */
+        "	bic r3, #1						\n"/* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
+        "	str r3, [r2]					\n"/* Disable MPU. */
+        "									\n"
+        "	ldr r2, =0xe000ed9c				\n"/* Region Base Address register. */
+        "	ldmia r1!, {r4-r11}				\n"/* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
+        "	stmia r2, {r4-r11}				\n"/* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
+        "									\n"
+        #if ( portTOTAL_NUM_REGIONS == 16 )
+            "	ldmia r1!, {r4-r11}				\n"/* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
+            "	stmia r2, {r4-r11}				\n"/* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
+            "	ldmia r1!, {r4-r11}				\n"/* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
+            "	stmia r2, {r4-r11}				\n"/* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
+        #endif /* portTOTAL_NUM_REGIONS == 16. */
+        "									\n"
+        "	ldr r2, =0xe000ed94				\n"/* MPU_CTRL register. */
+        "	ldr r3, [r2]					\n"/* Read the value of MPU_CTRL. */
+        "	orr r3, #1						\n"/* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
+        "	str r3, [r2]					\n"/* Enable MPU. */
+        "	dsb								\n"/* Force memory writes before continuing. */
+        "									\n"
+        "	ldmia r0!, {r3-r11, r14}		\n"/* Pop the registers that are not automatically saved on exception entry. */
+        "	msr control, r3					\n"
+        "	msr psp, r0						\n"/* Restore the task stack pointer. */
+        "	mov r0, #0						\n"
+        "	msr	basepri, r0					\n"
+        "	bx r14							\n"
+        "									\n"
+        "	.align 4						\n"
+        "pxCurrentTCBConst2: .word pxCurrentTCB	\n"
+    );
 }
 /*-----------------------------------------------------------*/
 
@@ -375,232 +393,243 @@ static void prvRestoreContextOfFirstTask( void )
  */
 BaseType_t xPortStartScheduler( void )
 {
-	/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See
-	http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
-	configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) );
+    /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See
+     * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
+    configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) );
 
-	#if( configASSERT_DEFINED == 1 )
-	{
-		volatile uint32_t ulOriginalPriority;
-		volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
-		volatile uint8_t ucMaxPriorityValue;
+    #if ( configASSERT_DEFINED == 1 )
+        {
+            volatile uint32_t ulOriginalPriority;
+            volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
+            volatile uint8_t ucMaxPriorityValue;
 
-		/* Determine the maximum priority from which ISR safe FreeRTOS API
-		functions can be called.  ISR safe functions are those that end in
-		"FromISR".  FreeRTOS maintains separate thread and ISR API functions to
-		ensure interrupt entry is as fast and simple as possible.
+            /* Determine the maximum priority from which ISR safe FreeRTOS API
+             * functions can be called.  ISR safe functions are those that end in
+             * "FromISR".  FreeRTOS maintains separate thread and ISR API functions to
+             * ensure interrupt entry is as fast and simple as possible.
+             *
+             * Save the interrupt priority value that is about to be clobbered. */
+            ulOriginalPriority = *pucFirstUserPriorityRegister;
 
-		Save the interrupt priority value that is about to be clobbered. */
-		ulOriginalPriority = *pucFirstUserPriorityRegister;
+            /* Determine the number of priority bits available.  First write to all
+             * possible bits. */
+            *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
 
-		/* Determine the number of priority bits available.  First write to all
-		possible bits. */
-		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
+            /* Read the value back to see how many bits stuck. */
+            ucMaxPriorityValue = *pucFirstUserPriorityRegister;
 
-		/* Read the value back to see how many bits stuck. */
-		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
+            /* Use the same mask on the maximum system call priority. */
+            ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
 
-		/* Use the same mask on the maximum system call priority. */
-		ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
+            /* Calculate the maximum acceptable priority group value for the number
+             * of bits read back. */
+            ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
 
-		/* Calculate the maximum acceptable priority group value for the number
-		of bits read back. */
-		ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
-		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
-		{
-			ulMaxPRIGROUPValue--;
-			ucMaxPriorityValue <<= ( uint8_t ) 0x01;
-		}
+            while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
+            {
+                ulMaxPRIGROUPValue--;
+                ucMaxPriorityValue <<= ( uint8_t ) 0x01;
+            }
 
-		#ifdef __NVIC_PRIO_BITS
-		{
-			/* Check the CMSIS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
-		}
-		#endif
+            #ifdef __NVIC_PRIO_BITS
+                {
+                    /* Check the CMSIS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
+                }
+            #endif
 
-		#ifdef configPRIO_BITS
-		{
-			/* Check the FreeRTOS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
-		}
-		#endif
+            #ifdef configPRIO_BITS
+                {
+                    /* Check the FreeRTOS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
+                }
+            #endif
 
-		/* Shift the priority group value back to its position within the AIRCR
-		register. */
-		ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
-		ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
+            /* Shift the priority group value back to its position within the AIRCR
+             * register. */
+            ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
+            ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
 
-		/* Restore the clobbered interrupt priority register to its original
-		value. */
-		*pucFirstUserPriorityRegister = ulOriginalPriority;
-	}
-	#endif /* conifgASSERT_DEFINED */
+            /* Restore the clobbered interrupt priority register to its original
+             * value. */
+            *pucFirstUserPriorityRegister = ulOriginalPriority;
+        }
+    #endif /* conifgASSERT_DEFINED */
 
-	/* Make PendSV and SysTick the same priority as the kernel, and the SVC
-	handler higher priority so it can be used to exit a critical section (where
-	lower priorities are masked). */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+    /* Make PendSV and SysTick the same priority as the kernel, and the SVC
+     * handler higher priority so it can be used to exit a critical section (where
+     * lower priorities are masked). */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
-	/* Configure the regions in the MPU that are common to all tasks. */
-	prvSetupMPU();
+    /* Configure the regions in the MPU that are common to all tasks. */
+    prvSetupMPU();
 
-	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-	here already. */
-	vPortSetupTimerInterrupt();
+    /* Start the timer that generates the tick ISR.  Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
 
-	/* Initialise the critical nesting count ready for the first task. */
-	uxCriticalNesting = 0;
+    /* Initialise the critical nesting count ready for the first task. */
+    uxCriticalNesting = 0;
 
-	/* Ensure the VFP is enabled - it should be anyway. */
-	vPortEnableVFP();
+    /* Ensure the VFP is enabled - it should be anyway. */
+    vPortEnableVFP();
 
-	/* Lazy save always. */
-	*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
+    /* Lazy save always. */
+    *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
 
-	/* Start the first task.  This also clears the bit that indicates the FPU is
-	in use in case the FPU was used before the scheduler was started - which
-	would otherwise result in the unnecessary leaving of space in the SVC stack
-	for lazy saving of FPU registers. */
-	__asm volatile(
-					" ldr r0, =0xE000ED08 	\n" /* Use the NVIC offset register to locate the stack. */
-					" ldr r0, [r0] 			\n"
-					" ldr r0, [r0] 			\n"
-					" msr msp, r0			\n" /* Set the msp back to the start of the stack. */
-					" mov r0, #0			\n" /* Clear the bit that indicates the FPU is in use, see comment above. */
-					" msr control, r0		\n"
-					" cpsie i				\n" /* Globally enable interrupts. */
-					" cpsie f				\n"
-					" dsb					\n"
-					" isb					\n"
-					" svc %0				\n" /* System call to start first task. */
-					" nop					\n"
-					:: "i" (portSVC_START_SCHEDULER) : "memory" );
+    /* Start the first task.  This also clears the bit that indicates the FPU is
+     * in use in case the FPU was used before the scheduler was started - which
+     * would otherwise result in the unnecessary leaving of space in the SVC stack
+     * for lazy saving of FPU registers. */
+    __asm volatile (
+        " ldr r0, =0xE000ED08 	\n"/* Use the NVIC offset register to locate the stack. */
+        " ldr r0, [r0] 			\n"
+        " ldr r0, [r0] 			\n"
+        " msr msp, r0			\n"/* Set the msp back to the start of the stack. */
+        " mov r0, #0			\n"/* Clear the bit that indicates the FPU is in use, see comment above. */
+        " msr control, r0		\n"
+        " cpsie i				\n"/* Globally enable interrupts. */
+        " cpsie f				\n"
+        " dsb					\n"
+        " isb					\n"
+        " svc %0				\n"/* System call to start first task. */
+        " nop					\n"
+        " .ltorg				\n"
+        ::"i" ( portSVC_START_SCHEDULER ) : "memory" );
 
-	/* Should not get here! */
-	return 0;
+    /* Should not get here! */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void )
 {
-	/* Not implemented in ports where there is nothing to return to.
-	Artificially force an assert. */
-	configASSERT( uxCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( uxCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void )
 {
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	portDISABLE_INTERRUPTS();
-	uxCriticalNesting++;
+    portDISABLE_INTERRUPTS();
+    uxCriticalNesting++;
 
-	vPortResetPrivilege( xRunningPrivileged );
+    vPortResetPrivilege( xRunningPrivileged );
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void )
 {
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	configASSERT( uxCriticalNesting );
-	uxCriticalNesting--;
-	if( uxCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
-	vPortResetPrivilege( xRunningPrivileged );
+    configASSERT( uxCriticalNesting );
+    uxCriticalNesting--;
+
+    if( uxCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
+
+    vPortResetPrivilege( xRunningPrivileged );
 }
 /*-----------------------------------------------------------*/
 
 void xPortPendSVHandler( void )
 {
-	/* This is a naked function. */
+    /* This is a naked function. */
 
-	__asm volatile
-	(
-		"	mrs r0, psp							\n"
-		"	isb									\n"
-		"										\n"
-		"	ldr	r3, pxCurrentTCBConst			\n" /* Get the location of the current TCB. */
-		"	ldr	r2, [r3]						\n"
-		"										\n"
-		"	tst r14, #0x10						\n" /* Is the task using the FPU context?  If so, push high vfp registers. */
-		"	it eq								\n"
-		"	vstmdbeq r0!, {s16-s31}				\n"
-		"										\n"
-		"	mrs r1, control						\n"
-		"	stmdb r0!, {r1, r4-r11, r14}		\n" /* Save the remaining registers. */
-		"	str r0, [r2]						\n" /* Save the new top of stack into the first member of the TCB. */
-		"										\n"
-		"	stmdb sp!, {r0, r3}					\n"
-		"	mov r0, %0							\n"
-		"	msr basepri, r0						\n"
-		"	dsb									\n"
-		"	isb									\n"
-		"	bl vTaskSwitchContext				\n"
-		"	mov r0, #0							\n"
-		"	msr basepri, r0						\n"
-		"	ldmia sp!, {r0, r3}					\n"
-		"										\n" /* Restore the context. */
-		"	ldr r1, [r3]						\n"
-		"	ldr r0, [r1]						\n" /* The first item in the TCB is the task top of stack. */
-		"	add r1, r1, #4						\n" /* Move onto the second item in the TCB... */
-		"										\n"
-		"	dmb									\n" /* Complete outstanding transfers before disabling MPU. */
-		"	ldr r2, =0xe000ed94					\n" /* MPU_CTRL register. */
-		"	ldr r3, [r2]						\n" /* Read the value of MPU_CTRL. */
-		"	bic r3, #1							\n" /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
-		"	str r3, [r2]						\n" /* Disable MPU. */
-		"										\n"
-		"	ldr r2, =0xe000ed9c					\n" /* Region Base Address register. */
-		"	ldmia r1!, {r4-r11}					\n" /* Read 4 sets of MPU registers from TCB. */
-		"	stmia r2!, {r4-r11}					\n" /* Write 4 sets of MPU registers. */
-		"										\n"
-		"	ldr r2, =0xe000ed94					\n" /* MPU_CTRL register. */
-		"	ldr r3, [r2]						\n" /* Read the value of MPU_CTRL. */
-		"	orr r3, #1							\n" /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
-		"	str r3, [r2]						\n" /* Enable MPU. */
-		"	dsb									\n" /* Force memory writes before continuing. */
-		"										\n"
-		"	ldmia r0!, {r3-r11, r14}			\n" /* Pop the registers that are not automatically saved on exception entry. */
-		"	msr control, r3						\n"
-		"										\n"
-		"	tst r14, #0x10						\n" /* Is the task using the FPU context?  If so, pop the high vfp registers too. */
-		"	it eq								\n"
-		"	vldmiaeq r0!, {s16-s31}				\n"
-		"										\n"
-		"	msr psp, r0							\n"
-		"	bx r14								\n"
-		"										\n"
-		"	.align 4							\n"
-		"pxCurrentTCBConst: .word pxCurrentTCB	\n"
-		::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
-	);
+    __asm volatile
+    (
+        "	mrs r0, psp							\n"
+        "	isb									\n"
+        "										\n"
+        "	ldr	r3, pxCurrentTCBConst			\n"/* Get the location of the current TCB. */
+        "	ldr	r2, [r3]						\n"
+        "										\n"
+        "	tst r14, #0x10						\n"/* Is the task using the FPU context?  If so, push high vfp registers. */
+        "	it eq								\n"
+        "	vstmdbeq r0!, {s16-s31}				\n"
+        "										\n"
+        "	mrs r1, control						\n"
+        "	stmdb r0!, {r1, r4-r11, r14}		\n"/* Save the remaining registers. */
+        "	str r0, [r2]						\n"/* Save the new top of stack into the first member of the TCB. */
+        "										\n"
+        "	stmdb sp!, {r0, r3}					\n"
+        "	mov r0, %0							\n"
+        "	msr basepri, r0						\n"
+        "	dsb									\n"
+        "	isb									\n"
+        "	bl vTaskSwitchContext				\n"
+        "	mov r0, #0							\n"
+        "	msr basepri, r0						\n"
+        "	ldmia sp!, {r0, r3}					\n"
+        "										\n"/* Restore the context. */
+        "	ldr r1, [r3]						\n"
+        "	ldr r0, [r1]						\n"/* The first item in the TCB is the task top of stack. */
+        "	add r1, r1, #4						\n"/* Move onto the second item in the TCB... */
+        "										\n"
+        "	dmb									\n"/* Complete outstanding transfers before disabling MPU. */
+        "	ldr r2, =0xe000ed94					\n"/* MPU_CTRL register. */
+        "	ldr r3, [r2]						\n"/* Read the value of MPU_CTRL. */
+        "	bic r3, #1							\n"/* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
+        "	str r3, [r2]						\n"/* Disable MPU. */
+        "										\n"
+        "	ldr r2, =0xe000ed9c					\n"/* Region Base Address register. */
+        "	ldmia r1!, {r4-r11}					\n"/* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
+        "	stmia r2, {r4-r11}					\n"/* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
+        "										\n"
+        #if ( portTOTAL_NUM_REGIONS == 16 )
+            "	ldmia r1!, {r4-r11}					\n"/* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
+            "	stmia r2, {r4-r11}					\n"/* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
+            "	ldmia r1!, {r4-r11}					\n"/* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
+            "	stmia r2, {r4-r11}					\n"/* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
+        #endif /* portTOTAL_NUM_REGIONS == 16. */
+        "										\n"
+        "	ldr r2, =0xe000ed94					\n"/* MPU_CTRL register. */
+        "	ldr r3, [r2]						\n"/* Read the value of MPU_CTRL. */
+        "	orr r3, #1							\n"/* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
+        "	str r3, [r2]						\n"/* Enable MPU. */
+        "	dsb									\n"/* Force memory writes before continuing. */
+        "										\n"
+        "	ldmia r0!, {r3-r11, r14}			\n"/* Pop the registers that are not automatically saved on exception entry. */
+        "	msr control, r3						\n"
+        "										\n"
+        "	tst r14, #0x10						\n"/* Is the task using the FPU context?  If so, pop the high vfp registers too. */
+        "	it eq								\n"
+        "	vldmiaeq r0!, {s16-s31}				\n"
+        "										\n"
+        "	msr psp, r0							\n"
+        "	bx r14								\n"
+        "										\n"
+        "	.align 4							\n"
+        "pxCurrentTCBConst: .word pxCurrentTCB	\n"
+        ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
+    );
 }
 /*-----------------------------------------------------------*/
 
 void xPortSysTickHandler( void )
 {
-uint32_t ulDummy;
+    uint32_t ulDummy;
 
-	ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* Pend a context switch. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
+    ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* Pend a context switch. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
 }
 /*-----------------------------------------------------------*/
 
@@ -608,327 +637,338 @@ uint32_t ulDummy;
  * Setup the systick timer to generate the tick interrupts at the required
  * frequency.
  */
-__attribute__(( weak )) void vPortSetupTimerInterrupt( void )
+__attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void )
 {
-	/* Stop and clear the SysTick. */
-	portNVIC_SYSTICK_CTRL_REG = 0UL;
-	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+    /* Stop and clear the SysTick. */
+    portNVIC_SYSTICK_CTRL_REG = 0UL;
+    portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-	/* Configure SysTick to interrupt at the requested rate. */
-	portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE );
+    /* Configure SysTick to interrupt at the requested rate. */
+    portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+    portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE );
 }
 /*-----------------------------------------------------------*/
 
 /* This is a naked function. */
 static void vPortEnableVFP( void )
 {
-	__asm volatile
-	(
-		"	ldr.w r0, =0xE000ED88		\n" /* The FPU enable bits are in the CPACR. */
-		"	ldr r1, [r0]				\n"
-		"								\n"
-		"	orr r1, r1, #( 0xf << 20 )	\n" /* Enable CP10 and CP11 coprocessors, then save back. */
-		"	str r1, [r0]				\n"
-		"	bx r14						"
-	);
+    __asm volatile
+    (
+        "	ldr.w r0, =0xE000ED88		\n"/* The FPU enable bits are in the CPACR. */
+        "	ldr r1, [r0]				\n"
+        "								\n"
+        "	orr r1, r1, #( 0xf << 20 )	\n"/* Enable CP10 and CP11 coprocessors, then save back. */
+        "	str r1, [r0]				\n"
+        "	bx r14						\n"
+        "	.ltorg						\n"
+    );
 }
 /*-----------------------------------------------------------*/
 
 static void prvSetupMPU( void )
 {
-#if defined( __ARMCC_VERSION )
-	/* Declaration when these variable are defined in code instead of being
-	 * exported from linker scripts. */
-	extern uint32_t * __privileged_functions_start__;
-	extern uint32_t * __privileged_functions_end__;
-	extern uint32_t * __FLASH_segment_start__;
-	extern uint32_t * __FLASH_segment_end__;
-	extern uint32_t * __privileged_data_start__;
-	extern uint32_t * __privileged_data_end__;
-#else
-	/* Declaration when these variable are exported from linker scripts. */
-	extern uint32_t __privileged_functions_start__[];
-	extern uint32_t __privileged_functions_end__[];
-	extern uint32_t __FLASH_segment_start__[];
-	extern uint32_t __FLASH_segment_end__[];
-	extern uint32_t __privileged_data_start__[];
-	extern uint32_t __privileged_data_end__[];
-#endif
-	/* Check the expected MPU is present. */
-	if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
-	{
-		/* First setup the unprivileged flash for unprivileged read only access. */
-		portMPU_REGION_BASE_ADDRESS_REG =	( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */
-											( portMPU_REGION_VALID ) |
-											( portUNPRIVILEGED_FLASH_REGION );
+    #if defined( __ARMCC_VERSION )
 
-		portMPU_REGION_ATTRIBUTE_REG =	( portMPU_REGION_READ_ONLY ) |
-										( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
-										( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |
-										( portMPU_REGION_ENABLE );
+        /* Declaration when these variable are defined in code instead of being
+         * exported from linker scripts. */
+        extern uint32_t * __privileged_functions_start__;
+        extern uint32_t * __privileged_functions_end__;
+        extern uint32_t * __FLASH_segment_start__;
+        extern uint32_t * __FLASH_segment_end__;
+        extern uint32_t * __privileged_data_start__;
+        extern uint32_t * __privileged_data_end__;
+    #else
+        /* Declaration when these variable are exported from linker scripts. */
+        extern uint32_t __privileged_functions_start__[];
+        extern uint32_t __privileged_functions_end__[];
+        extern uint32_t __FLASH_segment_start__[];
+        extern uint32_t __FLASH_segment_end__[];
+        extern uint32_t __privileged_data_start__[];
+        extern uint32_t __privileged_data_end__[];
+    #endif /* if defined( __ARMCC_VERSION ) */
 
-		/* Setup the privileged flash for privileged only access.  This is where
-		the kernel code is placed. */
-		portMPU_REGION_BASE_ADDRESS_REG =	( ( uint32_t ) __privileged_functions_start__ ) | /* Base address. */
-											( portMPU_REGION_VALID ) |
-											( portPRIVILEGED_FLASH_REGION );
+    /* The only permitted number of regions are 8 or 16. */
+    configASSERT( ( portTOTAL_NUM_REGIONS == 8 ) || ( portTOTAL_NUM_REGIONS == 16 ) );
 
-		portMPU_REGION_ATTRIBUTE_REG =	( portMPU_REGION_PRIVILEGED_READ_ONLY ) |
-										( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
-										( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __privileged_functions_start__ ) ) |
-										( portMPU_REGION_ENABLE );
+    /* Ensure that the configTOTAL_MPU_REGIONS is configured correctly. */
+    configASSERT( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE );
 
-		/* Setup the privileged data RAM region.  This is where the kernel data
-		is placed. */
-		portMPU_REGION_BASE_ADDRESS_REG =	( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
-											( portMPU_REGION_VALID ) |
-											( portPRIVILEGED_RAM_REGION );
+    /* Check the expected MPU is present. */
+    if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
+    {
+        /* First setup the unprivileged flash for unprivileged read only access. */
+        portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */
+                                          ( portMPU_REGION_VALID ) |
+                                          ( portUNPRIVILEGED_FLASH_REGION );
 
-		portMPU_REGION_ATTRIBUTE_REG =	( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
-										( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
-										prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |
-										( portMPU_REGION_ENABLE );
+        portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_ONLY ) |
+                                       ( ( configTEX_S_C_B_FLASH & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) |
+                                       ( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |
+                                       ( portMPU_REGION_ENABLE );
 
-		/* By default allow everything to access the general peripherals.  The
-		system peripherals and registers are protected. */
-		portMPU_REGION_BASE_ADDRESS_REG =	( portPERIPHERALS_START_ADDRESS ) |
-											( portMPU_REGION_VALID ) |
-											( portGENERAL_PERIPHERALS_REGION );
+        /* Setup the privileged flash for privileged only access.  This is where
+         * the kernel code is placed. */
+        portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __privileged_functions_start__ ) | /* Base address. */
+                                          ( portMPU_REGION_VALID ) |
+                                          ( portPRIVILEGED_FLASH_REGION );
 
-		portMPU_REGION_ATTRIBUTE_REG =	( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |
-										( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |
-										( portMPU_REGION_ENABLE );
+        portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |
+                                       ( ( configTEX_S_C_B_FLASH & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) |
+                                       ( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __privileged_functions_start__ ) ) |
+                                       ( portMPU_REGION_ENABLE );
 
-		/* Enable the memory fault exception. */
-		portNVIC_SYS_CTRL_STATE_REG |= portNVIC_MEM_FAULT_ENABLE;
+        /* Setup the privileged data RAM region.  This is where the kernel data
+         * is placed. */
+        portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
+                                          ( portMPU_REGION_VALID ) |
+                                          ( portPRIVILEGED_RAM_REGION );
 
-		/* Enable the MPU with the background region configured. */
-		portMPU_CTRL_REG |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );
-	}
+        portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
+                                       ( ( configTEX_S_C_B_SRAM & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) |
+                                       prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |
+                                       ( portMPU_REGION_ENABLE );
+
+        /* By default allow everything to access the general peripherals.  The
+         * system peripherals and registers are protected. */
+        portMPU_REGION_BASE_ADDRESS_REG = ( portPERIPHERALS_START_ADDRESS ) |
+                                          ( portMPU_REGION_VALID ) |
+                                          ( portGENERAL_PERIPHERALS_REGION );
+
+        portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |
+                                       ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |
+                                       ( portMPU_REGION_ENABLE );
+
+        /* Enable the memory fault exception. */
+        portNVIC_SYS_CTRL_STATE_REG |= portNVIC_MEM_FAULT_ENABLE;
+
+        /* Enable the MPU with the background region configured. */
+        portMPU_CTRL_REG |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );
+    }
 }
 /*-----------------------------------------------------------*/
 
 static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes )
 {
-uint32_t ulRegionSize, ulReturnValue = 4;
+    uint32_t ulRegionSize, ulReturnValue = 4;
 
-	/* 32 is the smallest region size, 31 is the largest valid value for
-	ulReturnValue. */
-	for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )
-	{
-		if( ulActualSizeInBytes <= ulRegionSize )
-		{
-			break;
-		}
-		else
-		{
-			ulReturnValue++;
-		}
-	}
+    /* 32 is the smallest region size, 31 is the largest valid value for
+     * ulReturnValue. */
+    for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )
+    {
+        if( ulActualSizeInBytes <= ulRegionSize )
+        {
+            break;
+        }
+        else
+        {
+            ulReturnValue++;
+        }
+    }
 
-	/* Shift the code by one before returning so it can be written directly
-	into the the correct bit position of the attribute register. */
-	return ( ulReturnValue << 1UL );
+    /* Shift the code by one before returning so it can be written directly
+     * into the the correct bit position of the attribute register. */
+    return( ulReturnValue << 1UL );
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
 {
-	__asm volatile
-	(
-	"	mrs r0, control							\n" /* r0 = CONTROL. */
-	"	tst r0, #1								\n" /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
-	"	ite ne									\n"
-	"	movne r0, #0							\n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
-	"	moveq r0, #1							\n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
-	"	bx lr									\n" /* Return. */
-	"											\n"
-	"	.align 4								\n"
-	::: "r0", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, control							\n"/* r0 = CONTROL. */
+        "	tst r0, #1								\n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
+        "	ite ne									\n"
+        "	movne r0, #0							\n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
+        "	moveq r0, #1							\n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
+        "	bx lr									\n"/* Return. */
+        "											\n"
+        "	.align 4								\n"
+        ::: "r0", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
 void vResetPrivilege( void ) /* __attribute__ (( naked )) */
 {
-	__asm volatile
-	(
-	"	mrs r0, control							\n" /* r0 = CONTROL. */
-	"	orr r0, #1								\n" /* r0 = r0 | 1. */
-	"	msr control, r0							\n" /* CONTROL = r0. */
-	"	bx lr									\n" /* Return to the caller. */
-	:::"r0", "memory"
-	);
+    __asm volatile
+    (
+        "	mrs r0, control							\n"/* r0 = CONTROL. */
+        "	orr r0, #1								\n"/* r0 = r0 | 1. */
+        "	msr control, r0							\n"/* CONTROL = r0. */
+        "	bx lr									\n"/* Return to the caller. */
+        ::: "r0", "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
-void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t ulStackDepth )
+void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
+                                const struct xMEMORY_REGION * const xRegions,
+                                StackType_t * pxBottomOfStack,
+                                uint32_t ulStackDepth )
 {
-#if defined( __ARMCC_VERSION )
-	/* Declaration when these variable are defined in code instead of being
-	 * exported from linker scripts. */
-	extern uint32_t * __SRAM_segment_start__;
-	extern uint32_t * __SRAM_segment_end__;
-	extern uint32_t * __privileged_data_start__;
-	extern uint32_t * __privileged_data_end__;
-#else
-	/* Declaration when these variable are exported from linker scripts. */
-	extern uint32_t __SRAM_segment_start__[];
-	extern uint32_t __SRAM_segment_end__[];
-	extern uint32_t __privileged_data_start__[];
-	extern uint32_t __privileged_data_end__[];
-#endif
+    #if defined( __ARMCC_VERSION )
 
-int32_t lIndex;
-uint32_t ul;
+        /* Declaration when these variable are defined in code instead of being
+         * exported from linker scripts. */
+        extern uint32_t * __SRAM_segment_start__;
+        extern uint32_t * __SRAM_segment_end__;
+        extern uint32_t * __privileged_data_start__;
+        extern uint32_t * __privileged_data_end__;
+    #else
+        /* Declaration when these variable are exported from linker scripts. */
+        extern uint32_t __SRAM_segment_start__[];
+        extern uint32_t __SRAM_segment_end__[];
+        extern uint32_t __privileged_data_start__[];
+        extern uint32_t __privileged_data_end__[];
+    #endif /* if defined( __ARMCC_VERSION ) */
 
-	if( xRegions == NULL )
-	{
-		/* No MPU regions are specified so allow access to all RAM. */
-		xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
-				( ( uint32_t ) __SRAM_segment_start__ ) | /* Base address. */
-				( portMPU_REGION_VALID ) |
-				( portSTACK_REGION );
+    int32_t lIndex;
+    uint32_t ul;
 
-		xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
-				( portMPU_REGION_READ_WRITE ) |
-				( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
-				( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) |
-				( portMPU_REGION_ENABLE );
+    if( xRegions == NULL )
+    {
+        /* No MPU regions are specified so allow access to all RAM. */
+        xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
+            ( ( uint32_t ) __SRAM_segment_start__ ) | /* Base address. */
+            ( portMPU_REGION_VALID ) |
+            ( portSTACK_REGION );
 
-		/* Re-instate the privileged only RAM region as xRegion[ 0 ] will have
-		just removed the privileged only parameters. */
-		xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =
-				( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
-				( portMPU_REGION_VALID ) |
-				( portSTACK_REGION + 1 );
+        xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
+            ( portMPU_REGION_READ_WRITE ) |
+            ( ( configTEX_S_C_B_SRAM & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) |
+            ( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) |
+            ( portMPU_REGION_ENABLE );
 
-		xMPUSettings->xRegion[ 1 ].ulRegionAttribute =
-				( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
-				( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
-				prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |
-				( portMPU_REGION_ENABLE );
+        /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have
+         * just removed the privileged only parameters. */
+        xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =
+            ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
+            ( portMPU_REGION_VALID ) |
+            ( portSTACK_REGION + 1 );
 
-		/* Invalidate all other regions. */
-		for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
-		{
-			xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
-			xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
-		}
-	}
-	else
-	{
-		/* This function is called automatically when the task is created - in
-		which case the stack region parameters will be valid.  At all other
-		times the stack parameters will not be valid and it is assumed that the
-		stack region has already been configured. */
-		if( ulStackDepth > 0 )
-		{
-			/* Define the region that allows access to the stack. */
-			xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
-					( ( uint32_t ) pxBottomOfStack ) |
-					( portMPU_REGION_VALID ) |
-					( portSTACK_REGION ); /* Region number. */
+        xMPUSettings->xRegion[ 1 ].ulRegionAttribute =
+            ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
+            ( ( configTEX_S_C_B_SRAM & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) |
+            prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |
+            ( portMPU_REGION_ENABLE );
 
-			xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
-					( portMPU_REGION_READ_WRITE ) | /* Read and write. */
-					( prvGetMPURegionSizeSetting( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) ) |
-					( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
-					( portMPU_REGION_ENABLE );
-		}
+        /* Invalidate all other regions. */
+        for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
+        {
+            xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
+            xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
+        }
+    }
+    else
+    {
+        /* This function is called automatically when the task is created - in
+         * which case the stack region parameters will be valid.  At all other
+         * times the stack parameters will not be valid and it is assumed that the
+         * stack region has already been configured. */
+        if( ulStackDepth > 0 )
+        {
+            /* Define the region that allows access to the stack. */
+            xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
+                ( ( uint32_t ) pxBottomOfStack ) |
+                ( portMPU_REGION_VALID ) |
+                ( portSTACK_REGION ); /* Region number. */
 
-		lIndex = 0;
+            xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
+                ( portMPU_REGION_READ_WRITE ) | /* Read and write. */
+                ( prvGetMPURegionSizeSetting( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) ) |
+                ( ( configTEX_S_C_B_SRAM & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) |
+                ( portMPU_REGION_ENABLE );
+        }
 
-		for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
-		{
-			if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )
-			{
-				/* Translate the generic region definition contained in
-				xRegions into the CM3 specific MPU settings that are then
-				stored in xMPUSettings. */
-				xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =
-						( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) |
-						( portMPU_REGION_VALID ) |
-						( portSTACK_REGION + ul ); /* Region number. */
+        lIndex = 0;
 
-				xMPUSettings->xRegion[ ul ].ulRegionAttribute =
-						( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |
-						( xRegions[ lIndex ].ulParameters ) |
-						( portMPU_REGION_ENABLE );
-			}
-			else
-			{
-				/* Invalidate the region. */
-				xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
-				xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
-			}
+        for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
+        {
+            if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )
+            {
+                /* Translate the generic region definition contained in
+                 * xRegions into the CM4 specific MPU settings that are then
+                 * stored in xMPUSettings. */
+                xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =
+                    ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) |
+                    ( portMPU_REGION_VALID ) |
+                    ( portSTACK_REGION + ul ); /* Region number. */
 
-			lIndex++;
-		}
-	}
+                xMPUSettings->xRegion[ ul ].ulRegionAttribute =
+                    ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |
+                    ( xRegions[ lIndex ].ulParameters ) |
+                    ( portMPU_REGION_ENABLE );
+            }
+            else
+            {
+                /* Invalidate the region. */
+                xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
+                xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
+            }
+
+            lIndex++;
+        }
+    }
 }
 /*-----------------------------------------------------------*/
 
-#if( configASSERT_DEFINED == 1 )
+#if ( configASSERT_DEFINED == 1 )
 
-	void vPortValidateInterruptPriority( void )
-	{
-	uint32_t ulCurrentInterrupt;
-	uint8_t ucCurrentPriority;
+    void vPortValidateInterruptPriority( void )
+    {
+        uint32_t ulCurrentInterrupt;
+        uint8_t ucCurrentPriority;
 
-		/* Obtain the number of the currently executing interrupt. */
-		__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+        /* Obtain the number of the currently executing interrupt. */
+        __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
-		/* Is the interrupt number a user defined interrupt? */
-		if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
-		{
-			/* Look up the interrupt's priority. */
-			ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
+        /* Is the interrupt number a user defined interrupt? */
+        if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
+        {
+            /* Look up the interrupt's priority. */
+            ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
 
-			/* The following assertion will fail if a service routine (ISR) for
-			an interrupt that has been assigned a priority above
-			configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
-			function.  ISR safe FreeRTOS API functions must *only* be called
-			from interrupts that have been assigned a priority at or below
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
+            /* The following assertion will fail if a service routine (ISR) for
+             * an interrupt that has been assigned a priority above
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
+             * function.  ISR safe FreeRTOS API functions must *only* be called
+             * from interrupts that have been assigned a priority at or below
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Numerically low interrupt priority numbers represent logically high
+             * interrupt priorities, therefore the priority of the interrupt must
+             * be set to a value equal to or numerically *higher* than
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Interrupts that use the FreeRTOS API must not be left at their
+             * default priority of zero as that is the highest possible priority,
+             * which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
+             * and therefore also guaranteed to be invalid.
+             *
+             * FreeRTOS maintains separate thread and ISR API functions to ensure
+             * interrupt entry is as fast and simple as possible.
+             *
+             * The following links provide detailed information:
+             * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+             * https://www.FreeRTOS.org/FAQHelp.html */
+            configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
+        }
 
-			Numerically low interrupt priority numbers represent logically high
-			interrupt priorities, therefore the priority of the interrupt must
-			be set to a value equal to or numerically *higher* than
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
-
-			Interrupts that	use the FreeRTOS API must not be left at their
-			default priority of	zero as that is the highest possible priority,
-			which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
-			and	therefore also guaranteed to be invalid.
-
-			FreeRTOS maintains separate thread and ISR API functions to ensure
-			interrupt entry is as fast and simple as possible.
-
-			The following links provide detailed information:
-			http://www.freertos.org/RTOS-Cortex-M3-M4.html
-			http://www.freertos.org/FAQHelp.html */
-			configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
-		}
-
-		/* Priority grouping:  The interrupt controller (NVIC) allows the bits
-		that define each interrupt's priority to be split between bits that
-		define the interrupt's pre-emption priority bits and bits that define
-		the interrupt's sub-priority.  For simplicity all bits must be defined
-		to be pre-emption priority bits.  The following assertion will fail if
-		this is not the case (if some bits represent a sub-priority).
-
-		If the application only uses CMSIS libraries for interrupt
-		configuration then the correct setting can be achieved on all Cortex-M
-		devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
-		scheduler.  Note however that some vendor specific peripheral libraries
-		assume a non-zero priority group setting, in which cases using a value
-		of zero will result in unpredicable behaviour. */
-		configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
-	}
+        /* Priority grouping:  The interrupt controller (NVIC) allows the bits
+         * that define each interrupt's priority to be split between bits that
+         * define the interrupt's pre-emption priority bits and bits that define
+         * the interrupt's sub-priority.  For simplicity all bits must be defined
+         * to be pre-emption priority bits.  The following assertion will fail if
+         * this is not the case (if some bits represent a sub-priority).
+         *
+         * If the application only uses CMSIS libraries for interrupt
+         * configuration then the correct setting can be achieved on all Cortex-M
+         * devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
+         * scheduler.  Note however that some vendor specific peripheral libraries
+         * assume a non-zero priority group setting, in which cases using a value
+         * of zero will result in unpredicable behaviour. */
+        configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
+    }
 
 #endif /* configASSERT_DEFINED */
 /*-----------------------------------------------------------*/
-
-
diff --git a/portable/GCC/ARM_CM4_MPU/portmacro.h b/portable/GCC/ARM_CM4_MPU/portmacro.h
index 61da7413a..935c89e4e 100644
--- a/portable/GCC/ARM_CM4_MPU/portmacro.h
+++ b/portable/GCC/ARM_CM4_MPU/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,19 +19,21 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 
 #ifndef PORTMACRO_H
 #define PORTMACRO_H
 
+
+/* *INDENT-OFF* */
 #ifdef __cplusplus
-extern "C" {
+    extern "C" {
 #endif
+/* *INDENT-ON* */
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -44,163 +46,251 @@ extern "C" {
  */
 
 /* Type definitions. */
-#define portCHAR		char
-#define portFLOAT		float
-#define portDOUBLE		double
-#define portLONG		long
-#define portSHORT		short
-#define portSTACK_TYPE	uint32_t
-#define portBASE_TYPE	long
+#define portCHAR          char
+#define portFLOAT         float
+#define portDOUBLE        double
+#define portLONG          long
+#define portSHORT         short
+#define portSTACK_TYPE    uint32_t
+#define portBASE_TYPE     long
 
-typedef portSTACK_TYPE StackType_t;
-typedef long BaseType_t;
-typedef unsigned long UBaseType_t;
+typedef portSTACK_TYPE   StackType_t;
+typedef long             BaseType_t;
+typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffff
+#if ( configUSE_16_BIT_TICKS == 1 )
+    typedef uint16_t     TickType_t;
+    #define portMAX_DELAY              ( TickType_t ) 0xffff
 #else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+    typedef uint32_t     TickType_t;
+    #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC 1
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+    #define portTICK_TYPE_IS_ATOMIC    1
 #endif
 /*-----------------------------------------------------------*/
 
 /* MPU specific constants. */
-#define portUSING_MPU_WRAPPERS		1
-#define portPRIVILEGE_BIT			( 0x80000000UL )
+#define portUSING_MPU_WRAPPERS                                   1
+#define portPRIVILEGE_BIT                                        ( 0x80000000UL )
 
-#define portMPU_REGION_READ_WRITE								( 0x03UL << 24UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY						( 0x05UL << 24UL )
-#define portMPU_REGION_READ_ONLY								( 0x06UL << 24UL )
-#define portMPU_REGION_PRIVILEGED_READ_WRITE					( 0x01UL << 24UL )
-#define portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY	( 0x02UL << 24UL )
-#define portMPU_REGION_CACHEABLE_BUFFERABLE						( 0x07UL << 16UL )
-#define portMPU_REGION_EXECUTE_NEVER							( 0x01UL << 28UL )
+#define portMPU_REGION_READ_WRITE                                ( 0x03UL << 24UL )
+#define portMPU_REGION_PRIVILEGED_READ_ONLY                      ( 0x05UL << 24UL )
+#define portMPU_REGION_READ_ONLY                                 ( 0x06UL << 24UL )
+#define portMPU_REGION_PRIVILEGED_READ_WRITE                     ( 0x01UL << 24UL )
+#define portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY    ( 0x02UL << 24UL )
+#define portMPU_REGION_CACHEABLE_BUFFERABLE                      ( 0x07UL << 16UL )
+#define portMPU_REGION_EXECUTE_NEVER                             ( 0x01UL << 28UL )
 
-#define portUNPRIVILEGED_FLASH_REGION		( 0UL )
-#define portPRIVILEGED_FLASH_REGION			( 1UL )
-#define portPRIVILEGED_RAM_REGION			( 2UL )
-#define portGENERAL_PERIPHERALS_REGION		( 3UL )
-#define portSTACK_REGION					( 4UL )
-#define portFIRST_CONFIGURABLE_REGION	    ( 5UL )
-#define portLAST_CONFIGURABLE_REGION		( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS		( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS				( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
+/* Location of the TEX,S,C,B bits in the MPU Region Attribute and Size
+ * Register (RASR). */
+#define portMPU_RASR_TEX_S_C_B_LOCATION                          ( 16UL )
+#define portMPU_RASR_TEX_S_C_B_MASK                              ( 0x3FUL )
 
-#define portSWITCH_TO_USER_MODE() __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0 " ::: "r0", "memory" )
+/* MPU settings that can be overriden in FreeRTOSConfig.h. */
+#ifndef configTOTAL_MPU_REGIONS
+    /* Define to 8 for backward compatibility. */
+    #define configTOTAL_MPU_REGIONS    ( 8UL )
+#endif
+
+/*
+ * The TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits define the
+ * memory type, and where necessary the cacheable and shareable properties
+ * of the memory region.
+ *
+ * The TEX, C, and B bits together indicate the memory type of the region,
+ * and:
+ * - For Normal memory, the cacheable properties of the region.
+ * - For Device memory, whether the region is shareable.
+ *
+ * For Normal memory regions, the S bit indicates whether the region is
+ * shareable. For Strongly-ordered and Device memory, the S bit is ignored.
+ *
+ * See the following two tables for setting TEX, S, C and B bits for
+ * unprivileged flash, privileged flash and privileged RAM regions.
+ *
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | TEX | C | B | Memory type            |  Description or Normal region cacheability             |  Shareable?             |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 000 | 0 | 0 | Strongly-ordered       |  Strongly ordered                                      |  Shareable              |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 000 | 0 | 1 | Device                 |  Shared device                                         |  Shareable              |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 000 | 1 | 0 | Normal                 |  Outer and inner   write-through; no write allocate    |  S bit                  |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 000 | 1 | 1 | Normal                 |  Outer and inner   write-back; no write allocate       |  S bit                  |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 001 | 0 | 0 | Normal                 |  Outer and inner   Non-cacheable                       |  S bit                  |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 001 | 0 | 1 | Reserved               |  Reserved                                              |  Reserved               |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 001 | 1 | 0 | IMPLEMENTATION DEFINED |  IMPLEMENTATION DEFINED                                |  IMPLEMENTATION DEFINED |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 001 | 1 | 1 | Normal                 |  Outer and inner   write-back; write and read allocate |  S bit                  |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 010 | 0 | 0 | Device                 |  Non-shared device                                     |  Not shareable          |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 010 | 0 | 1 | Reserved               |  Reserved                                              |  Reserved               |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 010 | 1 | X | Reserved               |  Reserved                                              |  Reserved               |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 011 | X | X | Reserved               |  Reserved                                              |  Reserved               |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 1BB | A | A | Normal                 | Cached memory, with AA and BB indicating the inner and |  Reserved               |
+ |     |   |   |                        | outer cacheability rules that must be exported on the  |                         |
+ |     |   |   |                        | bus. See the table below for the cacheability policy   |                         |
+ |     |   |   |                        | encoding. memory, BB=Outer policy, AA=Inner policy.    |                         |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ |
+ +-----------------------------------------+----------------------------------------+
+ | AA or BB subfield of {TEX,C,B} encoding |  Cacheability policy                   |
+ +-----------------------------------------+----------------------------------------+
+ | 00                                      |  Non-cacheable                         |
+ +-----------------------------------------+----------------------------------------+
+ | 01                                      |  Write-back, write and   read allocate |
+ +-----------------------------------------+----------------------------------------+
+ | 10                                      |  Write-through, no write   allocate    |
+ +-----------------------------------------+----------------------------------------+
+ | 11                                      |  Write-back, no write   allocate       |
+ +-----------------------------------------+----------------------------------------+
+ */
+
+/* TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits for flash
+ * region. */
+#ifndef configTEX_S_C_B_FLASH
+    /* Default to TEX=000, S=1, C=1, B=1 for backward compatibility. */
+    #define configTEX_S_C_B_FLASH    ( 0x07UL )
+#endif
+
+/* TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits for RAM
+ * region. */
+#ifndef configTEX_S_C_B_SRAM
+    /* Default to TEX=000, S=1, C=1, B=1 for backward compatibility. */
+    #define configTEX_S_C_B_SRAM          ( 0x07UL )
+#endif
+
+#define portUNPRIVILEGED_FLASH_REGION     ( 0UL )
+#define portPRIVILEGED_FLASH_REGION       ( 1UL )
+#define portPRIVILEGED_RAM_REGION         ( 2UL )
+#define portGENERAL_PERIPHERALS_REGION    ( 3UL )
+#define portSTACK_REGION                  ( 4UL )
+#define portFIRST_CONFIGURABLE_REGION     ( 5UL )
+#define portTOTAL_NUM_REGIONS             ( configTOTAL_MPU_REGIONS )
+#define portNUM_CONFIGURABLE_REGIONS      ( portTOTAL_NUM_REGIONS - portFIRST_CONFIGURABLE_REGION )
+#define portLAST_CONFIGURABLE_REGION      ( portTOTAL_NUM_REGIONS - 1 )
+
+#define portSWITCH_TO_USER_MODE()    __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0 " ::: "r0", "memory" )
 
 typedef struct MPU_REGION_REGISTERS
 {
-	uint32_t ulRegionBaseAddress;
-	uint32_t ulRegionAttribute;
+    uint32_t ulRegionBaseAddress;
+    uint32_t ulRegionAttribute;
 } xMPU_REGION_REGISTERS;
 
 /* Plus 1 to create space for the stack region. */
 typedef struct MPU_SETTINGS
 {
-	xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS ];
+    xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS ];
 } xMPU_SETTINGS;
 
 /* Architecture specifics. */
-#define portSTACK_GROWTH			( -1 )
-#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT			8
-#define portDONT_DISCARD			__attribute__(( used ))
+#define portSTACK_GROWTH      ( -1 )
+#define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+#define portBYTE_ALIGNMENT    8
+#define portDONT_DISCARD      __attribute__( ( used ) )
 /*-----------------------------------------------------------*/
 
 /* SVC numbers for various services. */
-#define portSVC_START_SCHEDULER				0
-#define portSVC_YIELD						1
-#define portSVC_RAISE_PRIVILEGE				2
+#define portSVC_START_SCHEDULER    0
+#define portSVC_YIELD              1
+#define portSVC_RAISE_PRIVILEGE    2
 
 /* Scheduler utilities. */
 
-#define portYIELD()				__asm volatile ( "	SVC	%0	\n" :: "i" (portSVC_YIELD) : "memory" )
-#define portYIELD_WITHIN_API() 													\
-{																				\
-	/* Set a PendSV to request a context switch. */								\
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;								\
-																				\
-	/* Barriers are normally not required but do ensure the code is completely	\
-	within the specified behaviour for the architecture. */						\
-	__asm volatile( "dsb" ::: "memory" );										\
-	__asm volatile( "isb" );													\
-}
+#define portYIELD()    __asm volatile ( "	SVC	%0	\n"::"i" ( portSVC_YIELD ) : "memory" )
+#define portYIELD_WITHIN_API()                          \
+    {                                                   \
+        /* Set a PendSV to request a context switch. */ \
+        portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
+                                                        \
+        /* Barriers are normally not required but do ensure the code is completely \
+         * within the specified behaviour for the architecture. */ \
+        __asm volatile ( "dsb" ::: "memory" );                     \
+        __asm volatile ( "isb" );                                  \
+    }
 
-#define portNVIC_INT_CTRL_REG		( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT		( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
+#define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+#define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+#define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+#define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /* Critical section management. */
 extern void vPortEnterCritical( void );
 extern void vPortExitCritical( void );
-#define portSET_INTERRUPT_MASK_FROM_ISR()		ulPortRaiseBASEPRI()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)	vPortSetBASEPRI(x)
-#define portDISABLE_INTERRUPTS()				vPortRaiseBASEPRI()
-#define portENABLE_INTERRUPTS()					vPortSetBASEPRI(0)
-#define portENTER_CRITICAL()					vPortEnterCritical()
-#define portEXIT_CRITICAL()						vPortExitCritical()
+#define portSET_INTERRUPT_MASK_FROM_ISR()         ulPortRaiseBASEPRI()
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vPortSetBASEPRI( x )
+#define portDISABLE_INTERRUPTS()                  vPortRaiseBASEPRI()
+#define portENABLE_INTERRUPTS()                   vPortSetBASEPRI( 0 )
+#define portENTER_CRITICAL()                      vPortEnterCritical()
+#define portEXIT_CRITICAL()                       vPortExitCritical()
 
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site.  These are
-not necessary for to use this port.  They are defined so the common demo files
-(which build with all the ports) will build. */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+ * not necessary for to use this port.  They are defined so the common demo files
+ * (which build with all the ports) will build. */
+#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+#define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
 /* Architecture specific optimisations. */
 #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
-	#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
+    #define configUSE_PORT_OPTIMISED_TASK_SELECTION    1
 #endif
 
 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
 
-	/* Generic helper function. */
-	__attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
-	{
-	uint8_t ucReturn;
+/* Generic helper function. */
+    __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
+    {
+        uint8_t ucReturn;
 
-		__asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
-		return ucReturn;
-	}
+        __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
 
-	/* Check the configuration. */
-	#if( configMAX_PRIORITIES > 32 )
-		#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
-	#endif
+        return ucReturn;
+    }
 
-	/* Store/clear the ready priorities in a bit map. */
-	#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
-	#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
+/* Check the configuration. */
+    #if ( configMAX_PRIORITIES > 32 )
+        #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
+    #endif
 
-	/*-----------------------------------------------------------*/
+/* Store/clear the ready priorities in a bit map. */
+    #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities )    ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
+    #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities )     ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
 
-	#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
+/*-----------------------------------------------------------*/
+
+    #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities )    uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
 
 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
 
 /*-----------------------------------------------------------*/
 
 #ifdef configASSERT
-	void vPortValidateInterruptPriority( void );
-	#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() 	vPortValidateInterruptPriority()
+    void vPortValidateInterruptPriority( void );
+    #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()    vPortValidateInterruptPriority()
 #endif
 
 /* portNOP() is not required by this port. */
 #define portNOP()
 
-#define portINLINE	__inline
+#define portINLINE              __inline
 
 #ifndef portFORCE_INLINE
-	#define portFORCE_INLINE inline __attribute__(( always_inline))
+    #define portFORCE_INLINE    inline __attribute__( ( always_inline ) )
 #endif
 /*-----------------------------------------------------------*/
 
@@ -212,97 +302,99 @@ extern void vResetPrivilege( void );
  *
  * @return 1 if the processor is already privileged, 0 otherwise.
  */
-#define portIS_PRIVILEGED()			xIsPrivileged()
+#define portIS_PRIVILEGED()      xIsPrivileged()
 
 /**
  * @brief Raise an SVC request to raise privilege.
-*/
-#define portRAISE_PRIVILEGE()		__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+ */
+#define portRAISE_PRIVILEGE()    __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
 
 /**
  * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
  * register.
  */
-#define portRESET_PRIVILEGE()		vResetPrivilege()
+#define portRESET_PRIVILEGE()    vResetPrivilege()
 /*-----------------------------------------------------------*/
 
 portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
 {
-uint32_t ulCurrentInterrupt;
-BaseType_t xReturn;
+    uint32_t ulCurrentInterrupt;
+    BaseType_t xReturn;
 
-	/* Obtain the number of the currently executing interrupt. */
-	__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+    /* Obtain the number of the currently executing interrupt. */
+    __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
-	if( ulCurrentInterrupt == 0 )
-	{
-		xReturn = pdFALSE;
-	}
-	else
-	{
-		xReturn = pdTRUE;
-	}
+    if( ulCurrentInterrupt == 0 )
+    {
+        xReturn = pdFALSE;
+    }
+    else
+    {
+        xReturn = pdTRUE;
+    }
 
-	return xReturn;
+    return xReturn;
 }
 
 /*-----------------------------------------------------------*/
 
 portFORCE_INLINE static void vPortRaiseBASEPRI( void )
 {
-uint32_t ulNewBASEPRI;
+    uint32_t ulNewBASEPRI;
 
-	__asm volatile
-	(
-		"	mov %0, %1												\n"	\
-		"	msr basepri, %0											\n" \
-		"	isb														\n" \
-		"	dsb														\n" \
-		:"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
-	);
+    __asm volatile
+    (
+        "	mov %0, %1												\n"\
+        "	msr basepri, %0											\n"\
+        "	isb														\n"\
+        "	dsb														\n"\
+        : "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
+    );
 }
 
 /*-----------------------------------------------------------*/
 
 portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
 {
-uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
+    uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
 
-	__asm volatile
-	(
-		"	mrs %0, basepri											\n" \
-		"	mov %1, %2												\n"	\
-		"	msr basepri, %1											\n" \
-		"	isb														\n" \
-		"	dsb														\n" \
-		:"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
-	);
+    __asm volatile
+    (
+        "	mrs %0, basepri											\n"\
+        "	mov %1, %2												\n"\
+        "	msr basepri, %1											\n"\
+        "	isb														\n"\
+        "	dsb														\n"\
+        : "=r" ( ulOriginalBASEPRI ), "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
+    );
 
-	/* This return will not be reached but is necessary to prevent compiler
-	warnings. */
-	return ulOriginalBASEPRI;
+    /* This return will not be reached but is necessary to prevent compiler
+     * warnings. */
+    return ulOriginalBASEPRI;
 }
 /*-----------------------------------------------------------*/
 
 portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
 {
-	__asm volatile
-	(
-		"	msr basepri, %0	" :: "r" ( ulNewMaskValue ) : "memory"
-	);
+    __asm volatile
+    (
+        "	msr basepri, %0	"::"r" ( ulNewMaskValue ) : "memory"
+    );
 }
 /*-----------------------------------------------------------*/
 
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
+#define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
 
 #ifndef configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY
-	#warning "configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY is not defined. We recommend defining it to 1 in FreeRTOSConfig.h for better security. https://www.freertos.org/FreeRTOS-V10.3.x.html"
-	#define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY 0
+    #warning "configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY is not defined. We recommend defining it to 1 in FreeRTOSConfig.h for better security. https://www.FreeRTOS.org/FreeRTOS-V10.3.x.html"
+    #define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY    0
 #endif
 /*-----------------------------------------------------------*/
-#ifdef __cplusplus
-}
-#endif
+
+/* *INDENT-OFF* */
+    #ifdef __cplusplus
+        }
+    #endif
+/* *INDENT-ON* */
 
 #endif /* PORTMACRO_H */
-
diff --git a/portable/GCC/ARM_CM7/r0p1/port.c b/portable/GCC/ARM_CM7/r0p1/port.c
index e13edf94d..f9e240e58 100644
--- a/portable/GCC/ARM_CM7/r0p1/port.c
+++ b/portable/GCC/ARM_CM7/r0p1/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,89 +19,89 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------
- * Implementation of functions defined in portable.h for the ARM CM4F port.
- *----------------------------------------------------------*/
+* Implementation of functions defined in portable.h for the ARM CM7 port.
+*----------------------------------------------------------*/
 
 /* Scheduler includes. */
 #include "FreeRTOS.h"
 #include "task.h"
 
 #ifndef __VFP_FP__
-	#error This port can only be used when the project options are configured to enable hardware floating point support.
+    #error This port can only be used when the project options are configured to enable hardware floating point support.
 #endif
 
 #ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 1UL << 2UL )
+    #define configSYSTICK_CLOCK_HZ      configCPU_CLOCK_HZ
+    /* Ensure the SysTick is clocked at the same frequency as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 1UL << 2UL )
 #else
-	/* The way the SysTick is clocked is not modified in case it is not the same
-	as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 0 )
+
+/* The way the SysTick is clocked is not modified in case it is not the same
+ * as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 0 )
 #endif
 
 /* Constants required to manipulate the core.  Registers first... */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_CTRL_REG             ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG             ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG    ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SHPR3_REG                    ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
 /* ...then bits in the registers. */
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portNVIC_PENDSVCLEAR_BIT 			( 1UL << 27UL )
-#define portNVIC_PEND_SYSTICK_CLEAR_BIT		( 1UL << 25UL )
+#define portNVIC_SYSTICK_INT_BIT              ( 1UL << 1UL )
+#define portNVIC_SYSTICK_ENABLE_BIT           ( 1UL << 0UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT       ( 1UL << 16UL )
+#define portNVIC_PENDSVCLEAR_BIT              ( 1UL << 27UL )
+#define portNVIC_PEND_SYSTICK_CLEAR_BIT       ( 1UL << 25UL )
 
-#define portNVIC_PENDSV_PRI					( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
-#define portNVIC_SYSTICK_PRI				( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
+#define portNVIC_PENDSV_PRI                   ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
+#define portNVIC_SYSTICK_PRI                  ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
 
 /* Constants required to check the validity of an interrupt priority. */
-#define portFIRST_USER_INTERRUPT_NUMBER		( 16 )
-#define portNVIC_IP_REGISTERS_OFFSET_16 	( 0xE000E3F0 )
-#define portAIRCR_REG						( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
-#define portMAX_8_BIT_VALUE					( ( uint8_t ) 0xff )
-#define portTOP_BIT_OF_BYTE					( ( uint8_t ) 0x80 )
-#define portMAX_PRIGROUP_BITS				( ( uint8_t ) 7 )
-#define portPRIORITY_GROUP_MASK				( 0x07UL << 8UL )
-#define portPRIGROUP_SHIFT					( 8UL )
+#define portFIRST_USER_INTERRUPT_NUMBER       ( 16 )
+#define portNVIC_IP_REGISTERS_OFFSET_16       ( 0xE000E3F0 )
+#define portAIRCR_REG                         ( *( ( volatile uint32_t * ) 0xE000ED0C ) )
+#define portMAX_8_BIT_VALUE                   ( ( uint8_t ) 0xff )
+#define portTOP_BIT_OF_BYTE                   ( ( uint8_t ) 0x80 )
+#define portMAX_PRIGROUP_BITS                 ( ( uint8_t ) 7 )
+#define portPRIORITY_GROUP_MASK               ( 0x07UL << 8UL )
+#define portPRIGROUP_SHIFT                    ( 8UL )
 
 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
-#define portVECTACTIVE_MASK					( 0xFFUL )
+#define portVECTACTIVE_MASK                   ( 0xFFUL )
 
 /* Constants required to manipulate the VFP. */
-#define portFPCCR							( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
-#define portASPEN_AND_LSPEN_BITS			( 0x3UL << 30UL )
+#define portFPCCR                             ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
+#define portASPEN_AND_LSPEN_BITS              ( 0x3UL << 30UL )
 
 /* Constants required to set up the initial stack. */
-#define portINITIAL_XPSR					( 0x01000000 )
-#define portINITIAL_EXC_RETURN				( 0xfffffffd )
+#define portINITIAL_XPSR                      ( 0x01000000 )
+#define portINITIAL_EXC_RETURN                ( 0xfffffffd )
 
 /* The systick is a 24-bit counter. */
-#define portMAX_24_BIT_NUMBER				( 0xffffffUL )
+#define portMAX_24_BIT_NUMBER                 ( 0xffffffUL )
 
 /* For strict compliance with the Cortex-M spec the task start address should
-have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
-#define portSTART_ADDRESS_MASK		( ( StackType_t ) 0xfffffffeUL )
+ * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
+#define portSTART_ADDRESS_MASK                ( ( StackType_t ) 0xfffffffeUL )
 
 /* A fiddle factor to estimate the number of SysTick counts that would have
-occurred while the SysTick counter is stopped during tickless idle
-calculations. */
-#define portMISSED_COUNTS_FACTOR			( 45UL )
+ * occurred while the SysTick counter is stopped during tickless idle
+ * calculations. */
+#define portMISSED_COUNTS_FACTOR              ( 45UL )
 
 /* Let the user override the pre-loading of the initial LR with the address of
-prvTaskExitError() in case it messes up unwinding of the stack in the
-debugger. */
+ * prvTaskExitError() in case it messes up unwinding of the stack in the
+ * debugger. */
 #ifdef configTASK_RETURN_ADDRESS
-	#define portTASK_RETURN_ADDRESS	configTASK_RETURN_ADDRESS
+    #define portTASK_RETURN_ADDRESS    configTASK_RETURN_ADDRESS
 #else
-	#define portTASK_RETURN_ADDRESS	prvTaskExitError
+    #define portTASK_RETURN_ADDRESS    prvTaskExitError
 #endif
 
 /*
@@ -114,19 +114,19 @@ void vPortSetupTimerInterrupt( void );
 /*
  * Exception handlers.
  */
-void xPortPendSVHandler( void ) __attribute__ (( naked ));
+void xPortPendSVHandler( void ) __attribute__( ( naked ) );
 void xPortSysTickHandler( void );
-void vPortSVCHandler( void ) __attribute__ (( naked ));
+void vPortSVCHandler( void ) __attribute__( ( naked ) );
 
 /*
  * Start first task is a separate function so it can be tested in isolation.
  */
-static void prvPortStartFirstTask( void ) __attribute__ (( naked ));
+static void prvPortStartFirstTask( void ) __attribute__( ( naked ) );
 
 /*
  * Function to enable the VFP.
  */
-static void vPortEnableVFP( void ) __attribute__ (( naked ));
+static void vPortEnableVFP( void ) __attribute__( ( naked ) );
 
 /*
  * Used to catch tasks that attempt to return from their implementing function.
@@ -136,30 +136,30 @@ static void prvTaskExitError( void );
 /*-----------------------------------------------------------*/
 
 /* Each task maintains its own interrupt status in the critical nesting
-variable. */
+ * variable. */
 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 
 /*
  * The number of SysTick increments that make up one tick period.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulTimerCountsForOneTick = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulTimerCountsForOneTick = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * The maximum number of tick periods that can be suppressed is limited by the
  * 24 bit resolution of the SysTick timer.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t xMaximumPossibleSuppressedTicks = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * Compensate for the CPU cycles that pass while the SysTick is stopped (low
  * power functionality only.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulStoppedTimerCompensation = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulStoppedTimerCompensation = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
@@ -167,10 +167,10 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
  * FreeRTOS API functions are not called from interrupts that have been assigned
  * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
  */
-#if( configASSERT_DEFINED == 1 )
-	 static uint8_t ucMaxSysCallPriority = 0;
-	 static uint32_t ulMaxPRIGROUPValue = 0;
-	 static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
+#if ( configASSERT_DEFINED == 1 )
+    static uint8_t ucMaxSysCallPriority = 0;
+    static uint32_t ulMaxPRIGROUPValue = 0;
+    static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
 #endif /* configASSERT_DEFINED */
 
 /*-----------------------------------------------------------*/
@@ -178,100 +178,104 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 /*
  * See header file for description.
  */
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	interrupt. */
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
 
-	/* Offset added to account for the way the MCU uses the stack on entry/exit
-	of interrupts, and to ensure alignment. */
-	pxTopOfStack--;
+    /* Offset added to account for the way the MCU uses the stack on entry/exit
+     * of interrupts, and to ensure alignment. */
+    pxTopOfStack--;
 
-	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
-	pxTopOfStack--;
-	*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;	/* PC */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
+    *pxTopOfStack = portINITIAL_XPSR;                                    /* xPSR */
+    pxTopOfStack--;
+    *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;             /* LR */
 
-	/* Save code space by skipping register initialisation. */
-	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
-	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
+    /* Save code space by skipping register initialisation. */
+    pxTopOfStack -= 5;                            /* R12, R3, R2 and R1. */
+    *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
 
-	/* A save method is being used that requires each task to maintain its
-	own exec return value. */
-	pxTopOfStack--;
-	*pxTopOfStack = portINITIAL_EXC_RETURN;
+    /* A save method is being used that requires each task to maintain its
+     * own exec return value. */
+    pxTopOfStack--;
+    *pxTopOfStack = portINITIAL_EXC_RETURN;
 
-	pxTopOfStack -= 8;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
+    pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
 
-	return pxTopOfStack;
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 static void prvTaskExitError( void )
 {
-volatile uint32_t ulDummy = 0;
+    volatile uint32_t ulDummy = 0;
 
-	/* A function that implements a task must not exit or attempt to return to
-	its caller as there is nothing to return to.  If a task wants to exit it
-	should instead call vTaskDelete( NULL ).
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to.  If a task wants to exit it
+     * should instead call vTaskDelete( NULL ).
+     *
+     * Artificially force an assert() to be triggered if configASSERT() is
+     * defined, then stop here so application writers can catch the error. */
+    configASSERT( uxCriticalNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
 
-	Artificially force an assert() to be triggered if configASSERT() is
-	defined, then stop here so application writers can catch the error. */
-	configASSERT( uxCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
-	while( ulDummy == 0 )
-	{
-		/* This file calls prvTaskExitError() after the scheduler has been
-		started to remove a compiler warning about the function being defined
-		but never called.  ulDummy is used purely to quieten other warnings
-		about code appearing after this function is called - making ulDummy
-		volatile makes the compiler think the function could return and
-		therefore not output an 'unreachable code' warning for code that appears
-		after it. */
-	}
+    while( ulDummy == 0 )
+    {
+        /* This file calls prvTaskExitError() after the scheduler has been
+         * started to remove a compiler warning about the function being defined
+         * but never called.  ulDummy is used purely to quieten other warnings
+         * about code appearing after this function is called - making ulDummy
+         * volatile makes the compiler think the function could return and
+         * therefore not output an 'unreachable code' warning for code that appears
+         * after it. */
+    }
 }
 /*-----------------------------------------------------------*/
 
 void vPortSVCHandler( void )
 {
-	__asm volatile (
-					"	ldr	r3, pxCurrentTCBConst2		\n" /* Restore the context. */
-					"	ldr r1, [r3]					\n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
-					"	ldr r0, [r1]					\n" /* The first item in pxCurrentTCB is the task top of stack. */
-					"	ldmia r0!, {r4-r11, r14}		\n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
-					"	msr psp, r0						\n" /* Restore the task stack pointer. */
-					"	isb								\n"
-					"	mov r0, #0 						\n"
-					"	msr	basepri, r0					\n"
-					"	bx r14							\n"
-					"									\n"
-					"	.align 4						\n"
-					"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
-				);
+    __asm volatile (
+        "	ldr	r3, pxCurrentTCBConst2		\n"/* Restore the context. */
+        "	ldr r1, [r3]					\n"/* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
+        "	ldr r0, [r1]					\n"/* The first item in pxCurrentTCB is the task top of stack. */
+        "	ldmia r0!, {r4-r11, r14}		\n"/* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
+        "	msr psp, r0						\n"/* Restore the task stack pointer. */
+        "	isb								\n"
+        "	mov r0, #0 						\n"
+        "	msr	basepri, r0					\n"
+        "	bx r14							\n"
+        "									\n"
+        "	.align 4						\n"
+        "pxCurrentTCBConst2: .word pxCurrentTCB				\n"
+        );
 }
 /*-----------------------------------------------------------*/
 
 static void prvPortStartFirstTask( void )
 {
-	/* Start the first task.  This also clears the bit that indicates the FPU is
-	in use in case the FPU was used before the scheduler was started - which
-	would otherwise result in the unnecessary leaving of space in the SVC stack
-	for lazy saving of FPU registers. */
-	__asm volatile(
-					" ldr r0, =0xE000ED08 	\n" /* Use the NVIC offset register to locate the stack. */
-					" ldr r0, [r0] 			\n"
-					" ldr r0, [r0] 			\n"
-					" msr msp, r0			\n" /* Set the msp back to the start of the stack. */
-					" mov r0, #0			\n" /* Clear the bit that indicates the FPU is in use, see comment above. */
-					" msr control, r0		\n"
-					" cpsie i				\n" /* Globally enable interrupts. */
-					" cpsie f				\n"
-					" dsb					\n"
-					" isb					\n"
-					" svc 0					\n" /* System call to start first task. */
-					" nop					\n"
-				);
+    /* Start the first task.  This also clears the bit that indicates the FPU is
+     * in use in case the FPU was used before the scheduler was started - which
+     * would otherwise result in the unnecessary leaving of space in the SVC stack
+     * for lazy saving of FPU registers. */
+    __asm volatile (
+        " ldr r0, =0xE000ED08 	\n"/* Use the NVIC offset register to locate the stack. */
+        " ldr r0, [r0] 			\n"
+        " ldr r0, [r0] 			\n"
+        " msr msp, r0			\n"/* Set the msp back to the start of the stack. */
+        " mov r0, #0			\n"/* Clear the bit that indicates the FPU is in use, see comment above. */
+        " msr control, r0		\n"
+        " cpsie i				\n"/* Globally enable interrupts. */
+        " cpsie f				\n"
+        " dsb					\n"
+        " isb					\n"
+        " svc 0					\n"/* System call to start first task. */
+        " nop					\n"
+        " .ltorg				\n"
+        );
 }
 /*-----------------------------------------------------------*/
 
@@ -280,384 +284,389 @@ static void prvPortStartFirstTask( void )
  */
 BaseType_t xPortStartScheduler( void )
 {
-	/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
-	See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
-	configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
+    /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
+     * See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
+    configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
 
-	#if( configASSERT_DEFINED == 1 )
-	{
-		volatile uint32_t ulOriginalPriority;
-		volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
-		volatile uint8_t ucMaxPriorityValue;
+    #if ( configASSERT_DEFINED == 1 )
+        {
+            volatile uint32_t ulOriginalPriority;
+            volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
+            volatile uint8_t ucMaxPriorityValue;
 
-		/* Determine the maximum priority from which ISR safe FreeRTOS API
-		functions can be called.  ISR safe functions are those that end in
-		"FromISR".  FreeRTOS maintains separate thread and ISR API functions to
-		ensure interrupt entry is as fast and simple as possible.
+            /* Determine the maximum priority from which ISR safe FreeRTOS API
+             * functions can be called.  ISR safe functions are those that end in
+             * "FromISR".  FreeRTOS maintains separate thread and ISR API functions to
+             * ensure interrupt entry is as fast and simple as possible.
+             *
+             * Save the interrupt priority value that is about to be clobbered. */
+            ulOriginalPriority = *pucFirstUserPriorityRegister;
 
-		Save the interrupt priority value that is about to be clobbered. */
-		ulOriginalPriority = *pucFirstUserPriorityRegister;
+            /* Determine the number of priority bits available.  First write to all
+             * possible bits. */
+            *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
 
-		/* Determine the number of priority bits available.  First write to all
-		possible bits. */
-		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
+            /* Read the value back to see how many bits stuck. */
+            ucMaxPriorityValue = *pucFirstUserPriorityRegister;
 
-		/* Read the value back to see how many bits stuck. */
-		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
+            /* Use the same mask on the maximum system call priority. */
+            ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
 
-		/* Use the same mask on the maximum system call priority. */
-		ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
+            /* Calculate the maximum acceptable priority group value for the number
+             * of bits read back. */
+            ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
 
-		/* Calculate the maximum acceptable priority group value for the number
-		of bits read back. */
-		ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
-		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
-		{
-			ulMaxPRIGROUPValue--;
-			ucMaxPriorityValue <<= ( uint8_t ) 0x01;
-		}
+            while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
+            {
+                ulMaxPRIGROUPValue--;
+                ucMaxPriorityValue <<= ( uint8_t ) 0x01;
+            }
 
-		#ifdef __NVIC_PRIO_BITS
-		{
-			/* Check the CMSIS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
-		}
-		#endif
+            #ifdef __NVIC_PRIO_BITS
+                {
+                    /* Check the CMSIS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
+                }
+            #endif
 
-		#ifdef configPRIO_BITS
-		{
-			/* Check the FreeRTOS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
-		}
-		#endif
+            #ifdef configPRIO_BITS
+                {
+                    /* Check the FreeRTOS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
+                }
+            #endif
 
-		/* Shift the priority group value back to its position within the AIRCR
-		register. */
-		ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
-		ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
+            /* Shift the priority group value back to its position within the AIRCR
+             * register. */
+            ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
+            ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
 
-		/* Restore the clobbered interrupt priority register to its original
-		value. */
-		*pucFirstUserPriorityRegister = ulOriginalPriority;
-	}
-	#endif /* conifgASSERT_DEFINED */
+            /* Restore the clobbered interrupt priority register to its original
+             * value. */
+            *pucFirstUserPriorityRegister = ulOriginalPriority;
+        }
+    #endif /* conifgASSERT_DEFINED */
 
-	/* Make PendSV and SysTick the lowest priority interrupts. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+    /* Make PendSV and SysTick the lowest priority interrupts. */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
-	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-	here already. */
-	vPortSetupTimerInterrupt();
+    /* Start the timer that generates the tick ISR.  Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
 
-	/* Initialise the critical nesting count ready for the first task. */
-	uxCriticalNesting = 0;
+    /* Initialise the critical nesting count ready for the first task. */
+    uxCriticalNesting = 0;
 
-	/* Ensure the VFP is enabled - it should be anyway. */
-	vPortEnableVFP();
+    /* Ensure the VFP is enabled - it should be anyway. */
+    vPortEnableVFP();
 
-	/* Lazy save always. */
-	*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
+    /* Lazy save always. */
+    *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
 
-	/* Start the first task. */
-	prvPortStartFirstTask();
+    /* Start the first task. */
+    prvPortStartFirstTask();
 
-	/* Should never get here as the tasks will now be executing!  Call the task
-	exit error function to prevent compiler warnings about a static function
-	not being called in the case that the application writer overrides this
-	functionality by defining configTASK_RETURN_ADDRESS.  Call
-	vTaskSwitchContext() so link time optimisation does not remove the
-	symbol. */
-	vTaskSwitchContext();
-	prvTaskExitError();
+    /* Should never get here as the tasks will now be executing!  Call the task
+     * exit error function to prevent compiler warnings about a static function
+     * not being called in the case that the application writer overrides this
+     * functionality by defining configTASK_RETURN_ADDRESS.  Call
+     * vTaskSwitchContext() so link time optimisation does not remove the
+     * symbol. */
+    vTaskSwitchContext();
+    prvTaskExitError();
 
-	/* Should not get here! */
-	return 0;
+    /* Should not get here! */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void )
 {
-	/* Not implemented in ports where there is nothing to return to.
-	Artificially force an assert. */
-	configASSERT( uxCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( uxCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void )
 {
-	portDISABLE_INTERRUPTS();
-	uxCriticalNesting++;
+    portDISABLE_INTERRUPTS();
+    uxCriticalNesting++;
 
-	/* This is not the interrupt safe version of the enter critical function so
-	assert() if it is being called from an interrupt context.  Only API
-	functions that end in "FromISR" can be used in an interrupt.  Only assert if
-	the critical nesting count is 1 to protect against recursive calls if the
-	assert function also uses a critical section. */
-	if( uxCriticalNesting == 1 )
-	{
-		configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
-	}
+    /* This is not the interrupt safe version of the enter critical function so
+     * assert() if it is being called from an interrupt context.  Only API
+     * functions that end in "FromISR" can be used in an interrupt.  Only assert if
+     * the critical nesting count is 1 to protect against recursive calls if the
+     * assert function also uses a critical section. */
+    if( uxCriticalNesting == 1 )
+    {
+        configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
+    }
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void )
 {
-	configASSERT( uxCriticalNesting );
-	uxCriticalNesting--;
-	if( uxCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
+    configASSERT( uxCriticalNesting );
+    uxCriticalNesting--;
+
+    if( uxCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
 }
 /*-----------------------------------------------------------*/
 
 void xPortPendSVHandler( void )
 {
-	/* This is a naked function. */
+    /* This is a naked function. */
 
-	__asm volatile
-	(
-	"	mrs r0, psp							\n"
-	"	isb									\n"
-	"										\n"
-	"	ldr	r3, pxCurrentTCBConst			\n" /* Get the location of the current TCB. */
-	"	ldr	r2, [r3]						\n"
-	"										\n"
-	"	tst r14, #0x10						\n" /* Is the task using the FPU context?  If so, push high vfp registers. */
-	"	it eq								\n"
-	"	vstmdbeq r0!, {s16-s31}				\n"
-	"										\n"
-	"	stmdb r0!, {r4-r11, r14}			\n" /* Save the core registers. */
-	"	str r0, [r2]						\n" /* Save the new top of stack into the first member of the TCB. */
-	"										\n"
-	"	stmdb sp!, {r0, r3}					\n"
-	"	mov r0, %0 							\n"
-	"	cpsid i								\n" /* Errata workaround. */
-	"	msr basepri, r0						\n"
-	"	dsb									\n"
-	"	isb									\n"
-	"	cpsie i								\n" /* Errata workaround. */
-	"	bl vTaskSwitchContext				\n"
-	"	mov r0, #0							\n"
-	"	msr basepri, r0						\n"
-	"	ldmia sp!, {r0, r3}					\n"
-	"										\n"
-	"	ldr r1, [r3]						\n" /* The first item in pxCurrentTCB is the task top of stack. */
-	"	ldr r0, [r1]						\n"
-	"										\n"
-	"	ldmia r0!, {r4-r11, r14}			\n" /* Pop the core registers. */
-	"										\n"
-	"	tst r14, #0x10						\n" /* Is the task using the FPU context?  If so, pop the high vfp registers too. */
-	"	it eq								\n"
-	"	vldmiaeq r0!, {s16-s31}				\n"
-	"										\n"
-	"	msr psp, r0							\n"
-	"	isb									\n"
-	"										\n"
-	#ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata workaround. */
-		#if WORKAROUND_PMU_CM001 == 1
-	"			push { r14 }				\n"
-	"			pop { pc }					\n"
-		#endif
-	#endif
-	"										\n"
-	"	bx r14								\n"
-	"										\n"
-	"	.align 4							\n"
-	"pxCurrentTCBConst: .word pxCurrentTCB	\n"
-	::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
-	);
+    __asm volatile
+    (
+        "	mrs r0, psp							\n"
+        "	isb									\n"
+        "										\n"
+        "	ldr	r3, pxCurrentTCBConst			\n"/* Get the location of the current TCB. */
+        "	ldr	r2, [r3]						\n"
+        "										\n"
+        "	tst r14, #0x10						\n"/* Is the task using the FPU context?  If so, push high vfp registers. */
+        "	it eq								\n"
+        "	vstmdbeq r0!, {s16-s31}				\n"
+        "										\n"
+        "	stmdb r0!, {r4-r11, r14}			\n"/* Save the core registers. */
+        "	str r0, [r2]						\n"/* Save the new top of stack into the first member of the TCB. */
+        "										\n"
+        "	stmdb sp!, {r0, r3}					\n"
+        "	mov r0, %0 							\n"
+        "	cpsid i								\n"/* Errata workaround. */
+        "	msr basepri, r0						\n"
+        "	dsb									\n"
+        "	isb									\n"
+        "	cpsie i								\n"/* Errata workaround. */
+        "	bl vTaskSwitchContext				\n"
+        "	mov r0, #0							\n"
+        "	msr basepri, r0						\n"
+        "	ldmia sp!, {r0, r3}					\n"
+        "										\n"
+        "	ldr r1, [r3]						\n"/* The first item in pxCurrentTCB is the task top of stack. */
+        "	ldr r0, [r1]						\n"
+        "										\n"
+        "	ldmia r0!, {r4-r11, r14}			\n"/* Pop the core registers. */
+        "										\n"
+        "	tst r14, #0x10						\n"/* Is the task using the FPU context?  If so, pop the high vfp registers too. */
+        "	it eq								\n"
+        "	vldmiaeq r0!, {s16-s31}				\n"
+        "										\n"
+        "	msr psp, r0							\n"
+        "	isb									\n"
+        "										\n"
+        #ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata workaround. */
+            #if WORKAROUND_PMU_CM001 == 1
+                "			push { r14 }				\n"
+                "			pop { pc }					\n"
+            #endif
+        #endif
+        "										\n"
+        "	bx r14								\n"
+        "										\n"
+        "	.align 4							\n"
+        "pxCurrentTCBConst: .word pxCurrentTCB	\n"
+        ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
+    );
 }
 /*-----------------------------------------------------------*/
 
 void xPortSysTickHandler( void )
 {
-	/* The SysTick runs at the lowest interrupt priority, so when this interrupt
-	executes all interrupts must be unmasked.  There is therefore no need to
-	save and then restore the interrupt mask value as its value is already
-	known. */
-	portDISABLE_INTERRUPTS();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* A context switch is required.  Context switching is performed in
-			the PendSV interrupt.  Pend the PendSV interrupt. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portENABLE_INTERRUPTS();
+    /* The SysTick runs at the lowest interrupt priority, so when this interrupt
+     * executes all interrupts must be unmasked.  There is therefore no need to
+     * save and then restore the interrupt mask value as its value is already
+     * known. */
+    portDISABLE_INTERRUPTS();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* A context switch is required.  Context switching is performed in
+             * the PendSV interrupt.  Pend the PendSV interrupt. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+    portENABLE_INTERRUPTS();
 }
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TICKLESS_IDLE == 1 )
+#if ( configUSE_TICKLESS_IDLE == 1 )
 
-	__attribute__((weak)) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-	{
-	uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
-	TickType_t xModifiableIdleTime;
+    __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+    {
+        uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+        TickType_t xModifiableIdleTime;
 
-		/* Make sure the SysTick reload value does not overflow the counter. */
-		if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-		{
-			xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-		}
+        /* Make sure the SysTick reload value does not overflow the counter. */
+        if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+        {
+            xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+        }
 
-		/* Stop the SysTick momentarily.  The time the SysTick is stopped for
-		is accounted for as best it can be, but using the tickless mode will
-		inevitably result in some tiny drift of the time maintained by the
-		kernel with respect to calendar time. */
-		portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+        /* Stop the SysTick momentarily.  The time the SysTick is stopped for
+         * is accounted for as best it can be, but using the tickless mode will
+         * inevitably result in some tiny drift of the time maintained by the
+         * kernel with respect to calendar time. */
+        portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
 
-		/* Calculate the reload value required to wait xExpectedIdleTime
-		tick periods.  -1 is used because this code will execute part way
-		through one of the tick periods. */
-		ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-		if( ulReloadValue > ulStoppedTimerCompensation )
-		{
-			ulReloadValue -= ulStoppedTimerCompensation;
-		}
+        /* Calculate the reload value required to wait xExpectedIdleTime
+         * tick periods.  -1 is used because this code will execute part way
+         * through one of the tick periods. */
+        ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
 
-		/* Enter a critical section but don't use the taskENTER_CRITICAL()
-		method as that will mask interrupts that should exit sleep mode. */
-		__asm volatile( "cpsid i" ::: "memory" );
-		__asm volatile( "dsb" );
-		__asm volatile( "isb" );
+        if( ulReloadValue > ulStoppedTimerCompensation )
+        {
+            ulReloadValue -= ulStoppedTimerCompensation;
+        }
 
-		/* If a context switch is pending or a task is waiting for the scheduler
-		to be unsuspended then abandon the low power entry. */
-		if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-		{
-			/* Restart from whatever is left in the count register to complete
-			this tick period. */
-			portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+        /* Enter a critical section but don't use the taskENTER_CRITICAL()
+         * method as that will mask interrupts that should exit sleep mode. */
+        __asm volatile ( "cpsid i" ::: "memory" );
+        __asm volatile ( "dsb" );
+        __asm volatile ( "isb" );
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+        /* If a context switch is pending or a task is waiting for the scheduler
+         * to be unsuspended then abandon the low power entry. */
+        if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+        {
+            /* Restart from whatever is left in the count register to complete
+             * this tick period. */
+            portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Reset the reload register to the value required for normal tick
-			periods. */
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts - see comments above the cpsid instruction()
-			above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-		else
-		{
-			/* Set the new reload value. */
-			portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+            /* Reset the reload register to the value required for normal tick
+             * periods. */
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
 
-			/* Clear the SysTick count flag and set the count value back to
-			zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            /* Re-enable interrupts - see comments above the cpsid instruction()
+             * above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+        else
+        {
+            /* Set the new reload value. */
+            portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            /* Clear the SysTick count flag and set the count value back to
+             * zero. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-			/* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
-			set its parameter to 0 to indicate that its implementation contains
-			its own wait for interrupt or wait for event instruction, and so wfi
-			should not be executed again.  However, the original expected idle
-			time variable must remain unmodified, so a copy is taken. */
-			xModifiableIdleTime = xExpectedIdleTime;
-			configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-			if( xModifiableIdleTime > 0 )
-			{
-				__asm volatile( "dsb" ::: "memory" );
-				__asm volatile( "wfi" );
-				__asm volatile( "isb" );
-			}
-			configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts to allow the interrupt that brought the MCU
-			out of sleep mode to execute immediately.  see comments above
-			__disable_interrupt() call above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
+            /* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
+             * set its parameter to 0 to indicate that its implementation contains
+             * its own wait for interrupt or wait for event instruction, and so wfi
+             * should not be executed again.  However, the original expected idle
+             * time variable must remain unmodified, so a copy is taken. */
+            xModifiableIdleTime = xExpectedIdleTime;
+            configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
 
-			/* Disable interrupts again because the clock is about to be stopped
-			and interrupts that execute while the clock is stopped will increase
-			any slippage between the time maintained by the RTOS and calendar
-			time. */
-			__asm volatile( "cpsid i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
+            if( xModifiableIdleTime > 0 )
+            {
+                __asm volatile ( "dsb" ::: "memory" );
+                __asm volatile ( "wfi" );
+                __asm volatile ( "isb" );
+            }
 
-			/* Disable the SysTick clock without reading the
-			portNVIC_SYSTICK_CTRL_REG register to ensure the
-			portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
-			the time the SysTick is stopped for is accounted for as best it can
-			be, but using the tickless mode will inevitably result in some tiny
-			drift of the time maintained by the kernel with respect to calendar
-			time*/
-			portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+            configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
 
-			/* Determine if the SysTick clock has already counted to zero and
-			been set back to the current reload value (the reload back being
-			correct for the entire expected idle time) or if the SysTick is yet
-			to count to zero (in which case an interrupt other than the SysTick
-			must have brought the system out of sleep mode). */
-			if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-			{
-				uint32_t ulCalculatedLoadValue;
+            /* Re-enable interrupts to allow the interrupt that brought the MCU
+             * out of sleep mode to execute immediately.  see comments above
+             * __disable_interrupt() call above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
 
-				/* The tick interrupt is already pending, and the SysTick count
-				reloaded with ulReloadValue.  Reset the
-				portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
-				period. */
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+            /* Disable interrupts again because the clock is about to be stopped
+             * and interrupts that execute while the clock is stopped will increase
+             * any slippage between the time maintained by the RTOS and calendar
+             * time. */
+            __asm volatile ( "cpsid i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
 
-				/* Don't allow a tiny value, or values that have somehow
-				underflowed because the post sleep hook did something
-				that took too long. */
-				if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-				{
-					ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-				}
+            /* Disable the SysTick clock without reading the
+             * portNVIC_SYSTICK_CTRL_REG register to ensure the
+             * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
+             * the time the SysTick is stopped for is accounted for as best it can
+             * be, but using the tickless mode will inevitably result in some tiny
+             * drift of the time maintained by the kernel with respect to calendar
+             * time*/
+            portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
 
-				portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+            /* Determine if the SysTick clock has already counted to zero and
+             * been set back to the current reload value (the reload back being
+             * correct for the entire expected idle time) or if the SysTick is yet
+             * to count to zero (in which case an interrupt other than the SysTick
+             * must have brought the system out of sleep mode). */
+            if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+            {
+                uint32_t ulCalculatedLoadValue;
 
-				/* As the pending tick will be processed as soon as this
-				function exits, the tick value maintained by the tick is stepped
-				forward by one less than the time spent waiting. */
-				ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-			}
-			else
-			{
-				/* Something other than the tick interrupt ended the sleep.
-				Work out how long the sleep lasted rounded to complete tick
-				periods (not the ulReload value which accounted for part
-				ticks). */
-				ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+                /* The tick interrupt is already pending, and the SysTick count
+                 * reloaded with ulReloadValue.  Reset the
+                 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+                 * period. */
+                ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
 
-				/* How many complete tick periods passed while the processor
-				was waiting? */
-				ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+                /* Don't allow a tiny value, or values that have somehow
+                 * underflowed because the post sleep hook did something
+                 * that took too long. */
+                if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+                {
+                    ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+                }
 
-				/* The reload value is set to whatever fraction of a single tick
-				period remains. */
-				portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-			}
+                portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
 
-			/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
-			again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
-			value. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-			vTaskStepTick( ulCompleteTickPeriods );
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+                /* As the pending tick will be processed as soon as this
+                 * function exits, the tick value maintained by the tick is stepped
+                 * forward by one less than the time spent waiting. */
+                ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+            }
+            else
+            {
+                /* Something other than the tick interrupt ended the sleep.
+                 * Work out how long the sleep lasted rounded to complete tick
+                 * periods (not the ulReload value which accounted for part
+                 * ticks). */
+                ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Exit with interrupts enabled. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-	}
+                /* How many complete tick periods passed while the processor
+                 * was waiting? */
+                ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+                /* The reload value is set to whatever fraction of a single tick
+                 * period remains. */
+                portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+            }
+
+            /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+             * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+             * value. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            vTaskStepTick( ulCompleteTickPeriods );
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Exit with interrupts enabled. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+    }
 
 #endif /* #if configUSE_TICKLESS_IDLE */
 /*-----------------------------------------------------------*/
@@ -666,100 +675,99 @@ void xPortSysTickHandler( void )
  * Setup the systick timer to generate the tick interrupts at the required
  * frequency.
  */
-__attribute__(( weak )) void vPortSetupTimerInterrupt( void )
+__attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void )
 {
-	/* Calculate the constants required to configure the tick interrupt. */
-	#if( configUSE_TICKLESS_IDLE == 1 )
-	{
-		ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
-		xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
-	}
-	#endif /* configUSE_TICKLESS_IDLE */
+    /* Calculate the constants required to configure the tick interrupt. */
+    #if ( configUSE_TICKLESS_IDLE == 1 )
+        {
+            ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+            xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+            ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+        }
+    #endif /* configUSE_TICKLESS_IDLE */
 
-	/* Stop and clear the SysTick. */
-	portNVIC_SYSTICK_CTRL_REG = 0UL;
-	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+    /* Stop and clear the SysTick. */
+    portNVIC_SYSTICK_CTRL_REG = 0UL;
+    portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-	/* Configure SysTick to interrupt at the requested rate. */
-	portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
+    /* Configure SysTick to interrupt at the requested rate. */
+    portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+    portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
 }
 /*-----------------------------------------------------------*/
 
 /* This is a naked function. */
 static void vPortEnableVFP( void )
 {
-	__asm volatile
-	(
-		"	ldr.w r0, =0xE000ED88		\n" /* The FPU enable bits are in the CPACR. */
-		"	ldr r1, [r0]				\n"
-		"								\n"
-		"	orr r1, r1, #( 0xf << 20 )	\n" /* Enable CP10 and CP11 coprocessors, then save back. */
-		"	str r1, [r0]				\n"
-		"	bx r14						"
-	);
+    __asm volatile
+    (
+        "	ldr.w r0, =0xE000ED88		\n"/* The FPU enable bits are in the CPACR. */
+        "	ldr r1, [r0]				\n"
+        "								\n"
+        "	orr r1, r1, #( 0xf << 20 )	\n"/* Enable CP10 and CP11 coprocessors, then save back. */
+        "	str r1, [r0]				\n"
+        "	bx r14						\n"
+        "	.ltorg						\n"
+    );
 }
 /*-----------------------------------------------------------*/
 
-#if( configASSERT_DEFINED == 1 )
+#if ( configASSERT_DEFINED == 1 )
 
-	void vPortValidateInterruptPriority( void )
-	{
-	uint32_t ulCurrentInterrupt;
-	uint8_t ucCurrentPriority;
+    void vPortValidateInterruptPriority( void )
+    {
+        uint32_t ulCurrentInterrupt;
+        uint8_t ucCurrentPriority;
 
-		/* Obtain the number of the currently executing interrupt. */
-		__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+        /* Obtain the number of the currently executing interrupt. */
+        __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
-		/* Is the interrupt number a user defined interrupt? */
-		if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
-		{
-			/* Look up the interrupt's priority. */
-			ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
+        /* Is the interrupt number a user defined interrupt? */
+        if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
+        {
+            /* Look up the interrupt's priority. */
+            ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
 
-			/* The following assertion will fail if a service routine (ISR) for
-			an interrupt that has been assigned a priority above
-			configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
-			function.  ISR safe FreeRTOS API functions must *only* be called
-			from interrupts that have been assigned a priority at or below
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
+            /* The following assertion will fail if a service routine (ISR) for
+             * an interrupt that has been assigned a priority above
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
+             * function.  ISR safe FreeRTOS API functions must *only* be called
+             * from interrupts that have been assigned a priority at or below
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Numerically low interrupt priority numbers represent logically high
+             * interrupt priorities, therefore the priority of the interrupt must
+             * be set to a value equal to or numerically *higher* than
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Interrupts that	use the FreeRTOS API must not be left at their
+             * default priority of	zero as that is the highest possible priority,
+             * which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
+             * and	therefore also guaranteed to be invalid.
+             *
+             * FreeRTOS maintains separate thread and ISR API functions to ensure
+             * interrupt entry is as fast and simple as possible.
+             *
+             * The following links provide detailed information:
+             * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+             * https://www.FreeRTOS.org/FAQHelp.html */
+            configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
+        }
 
-			Numerically low interrupt priority numbers represent logically high
-			interrupt priorities, therefore the priority of the interrupt must
-			be set to a value equal to or numerically *higher* than
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
-
-			Interrupts that	use the FreeRTOS API must not be left at their
-			default priority of	zero as that is the highest possible priority,
-			which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
-			and	therefore also guaranteed to be invalid.
-
-			FreeRTOS maintains separate thread and ISR API functions to ensure
-			interrupt entry is as fast and simple as possible.
-
-			The following links provide detailed information:
-			http://www.freertos.org/RTOS-Cortex-M3-M4.html
-			http://www.freertos.org/FAQHelp.html */
-			configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
-		}
-
-		/* Priority grouping:  The interrupt controller (NVIC) allows the bits
-		that define each interrupt's priority to be split between bits that
-		define the interrupt's pre-emption priority bits and bits that define
-		the interrupt's sub-priority.  For simplicity all bits must be defined
-		to be pre-emption priority bits.  The following assertion will fail if
-		this is not the case (if some bits represent a sub-priority).
-
-		If the application only uses CMSIS libraries for interrupt
-		configuration then the correct setting can be achieved on all Cortex-M
-		devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
-		scheduler.  Note however that some vendor specific peripheral libraries
-		assume a non-zero priority group setting, in which cases using a value
-		of zero will result in unpredictable behaviour. */
-		configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
-	}
+        /* Priority grouping:  The interrupt controller (NVIC) allows the bits
+         * that define each interrupt's priority to be split between bits that
+         * define the interrupt's pre-emption priority bits and bits that define
+         * the interrupt's sub-priority.  For simplicity all bits must be defined
+         * to be pre-emption priority bits.  The following assertion will fail if
+         * this is not the case (if some bits represent a sub-priority).
+         *
+         * If the application only uses CMSIS libraries for interrupt
+         * configuration then the correct setting can be achieved on all Cortex-M
+         * devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
+         * scheduler.  Note however that some vendor specific peripheral libraries
+         * assume a non-zero priority group setting, in which cases using a value
+         * of zero will result in unpredictable behaviour. */
+        configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
+    }
 
 #endif /* configASSERT_DEFINED */
-
-
diff --git a/portable/GCC/ARM_CM7/r0p1/portmacro.h b/portable/GCC/ARM_CM7/r0p1/portmacro.h
index 124e8073a..c53bfd172 100644
--- a/portable/GCC/ARM_CM7/r0p1/portmacro.h
+++ b/portable/GCC/ARM_CM7/r0p1/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,19 +19,19 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -44,205 +44,205 @@ extern "C" {
  */
 
 /* Type definitions. */
-#define portCHAR		char
-#define portFLOAT		float
-#define portDOUBLE		double
-#define portLONG		long
-#define portSHORT		short
-#define portSTACK_TYPE	uint32_t
-#define portBASE_TYPE	long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE StackType_t;
-typedef long BaseType_t;
-typedef unsigned long UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC 1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Architecture specifics. */
-#define portSTACK_GROWTH			( -1 )
-#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT			8
-#define portDONT_DISCARD			__attribute__(( used ))
+    #define portSTACK_GROWTH      ( -1 )
+    #define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT    8
+    #define portDONT_DISCARD      __attribute__( ( used ) )
 /*-----------------------------------------------------------*/
 
 /* Scheduler utilities. */
-#define portYIELD() 															\
-{																				\
-	/* Set a PendSV to request a context switch. */								\
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;								\
-																				\
-	/* Barriers are normally not required but do ensure the code is completely	\
-	within the specified behaviour for the architecture. */						\
-	__asm volatile( "dsb" ::: "memory" );										\
-	__asm volatile( "isb" );													\
-}
+    #define portYIELD()                                 \
+    {                                                   \
+        /* Set a PendSV to request a context switch. */ \
+        portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
+                                                        \
+        /* Barriers are normally not required but do ensure the code is completely \
+         * within the specified behaviour for the architecture. */ \
+        __asm volatile ( "dsb" ::: "memory" );                     \
+        __asm volatile ( "isb" );                                  \
+    }
 
-#define portNVIC_INT_CTRL_REG		( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT		( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()
-#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired != pdFALSE ) portYIELD()
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /* Critical section management. */
-extern void vPortEnterCritical( void );
-extern void vPortExitCritical( void );
-#define portSET_INTERRUPT_MASK_FROM_ISR()		ulPortRaiseBASEPRI()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)	vPortSetBASEPRI(x)
-#define portDISABLE_INTERRUPTS()				vPortRaiseBASEPRI()
-#define portENABLE_INTERRUPTS()					vPortSetBASEPRI(0)
-#define portENTER_CRITICAL()					vPortEnterCritical()
-#define portEXIT_CRITICAL()						vPortExitCritical()
+    extern void vPortEnterCritical( void );
+    extern void vPortExitCritical( void );
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulPortRaiseBASEPRI()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vPortSetBASEPRI( x )
+    #define portDISABLE_INTERRUPTS()                  vPortRaiseBASEPRI()
+    #define portENABLE_INTERRUPTS()                   vPortSetBASEPRI( 0 )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
 
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site.  These are
-not necessary for to use this port.  They are defined so the common demo files
-(which build with all the ports) will build. */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+ * not necessary for to use this port.  They are defined so the common demo files
+ * (which build with all the ports) will build. */
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
 /* Tickless idle/low power functionality. */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Architecture specific optimisations. */
-#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
-	#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
-#endif
+    #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
+        #define configUSE_PORT_OPTIMISED_TASK_SELECTION    1
+    #endif
 
-#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
+    #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
 
-	/* Generic helper function. */
-	__attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
-	{
-	uint8_t ucReturn;
+/* Generic helper function. */
+        __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
+        {
+            uint8_t ucReturn;
 
-		__asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
-		return ucReturn;
-	}
+            __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
 
-	/* Check the configuration. */
-	#if( configMAX_PRIORITIES > 32 )
-		#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
-	#endif
+            return ucReturn;
+        }
 
-	/* Store/clear the ready priorities in a bit map. */
-	#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
-	#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
+/* Check the configuration. */
+        #if ( configMAX_PRIORITIES > 32 )
+            #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
+        #endif
 
-	/*-----------------------------------------------------------*/
-
-	#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
-
-#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
+/* Store/clear the ready priorities in a bit map. */
+        #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities )    ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
+        #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities )     ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
 
 /*-----------------------------------------------------------*/
 
-#ifdef configASSERT
-	void vPortValidateInterruptPriority( void );
-	#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() 	vPortValidateInterruptPriority()
-#endif
+        #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities )    uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
+
+    #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
+
+/*-----------------------------------------------------------*/
+
+    #ifdef configASSERT
+        void vPortValidateInterruptPriority( void );
+        #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()    vPortValidateInterruptPriority()
+    #endif
 
 /* portNOP() is not required by this port. */
-#define portNOP()
+    #define portNOP()
 
-#define portINLINE	__inline
+    #define portINLINE              __inline
 
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE inline __attribute__(( always_inline))
-#endif
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE    inline __attribute__( ( always_inline ) )
+    #endif
 
-portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
-{
-uint32_t ulCurrentInterrupt;
-BaseType_t xReturn;
+    portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
+    {
+        uint32_t ulCurrentInterrupt;
+        BaseType_t xReturn;
 
-	/* Obtain the number of the currently executing interrupt. */
-	__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+        /* Obtain the number of the currently executing interrupt. */
+        __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
-	if( ulCurrentInterrupt == 0 )
-	{
-		xReturn = pdFALSE;
-	}
-	else
-	{
-		xReturn = pdTRUE;
-	}
+        if( ulCurrentInterrupt == 0 )
+        {
+            xReturn = pdFALSE;
+        }
+        else
+        {
+            xReturn = pdTRUE;
+        }
 
-	return xReturn;
-}
+        return xReturn;
+    }
 
 /*-----------------------------------------------------------*/
 
-portFORCE_INLINE static void vPortRaiseBASEPRI( void )
-{
-uint32_t ulNewBASEPRI;
+    portFORCE_INLINE static void vPortRaiseBASEPRI( void )
+    {
+        uint32_t ulNewBASEPRI;
 
-	__asm volatile
-	(
-		"	mov %0, %1												\n"	\
-		"	cpsid i													\n" \
-		"	msr basepri, %0											\n" \
-		"	isb														\n" \
-		"	dsb														\n" \
-		"	cpsie i													\n" \
-		:"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
-	);
-}
+        __asm volatile
+        (
+            "	mov %0, %1												\n"\
+            "	cpsid i													\n"\
+            "	msr basepri, %0											\n"\
+            "	isb														\n"\
+            "	dsb														\n"\
+            "	cpsie i													\n"\
+            : "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
+        );
+    }
 
 /*-----------------------------------------------------------*/
 
-portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
-{
-uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
+    portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
+    {
+        uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
 
-	__asm volatile
-	(
-		"	mrs %0, basepri											\n" \
-		"	mov %1, %2												\n"	\
-		"	cpsid i													\n" \
-		"	msr basepri, %1											\n" \
-		"	isb														\n" \
-		"	dsb														\n" \
-		"	cpsie i													\n" \
-		:"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
-	);
+        __asm volatile
+        (
+            "	mrs %0, basepri											\n"\
+            "	mov %1, %2												\n"\
+            "	cpsid i													\n"\
+            "	msr basepri, %1											\n"\
+            "	isb														\n"\
+            "	dsb														\n"\
+            "	cpsie i													\n"\
+            : "=r" ( ulOriginalBASEPRI ), "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
+        );
 
-	/* This return will not be reached but is necessary to prevent compiler
-	warnings. */
-	return ulOriginalBASEPRI;
-}
+        /* This return will not be reached but is necessary to prevent compiler
+         * warnings. */
+        return ulOriginalBASEPRI;
+    }
 /*-----------------------------------------------------------*/
 
-portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
-{
-	__asm volatile
-	(
-		"	msr basepri, %0	" :: "r" ( ulNewMaskValue ) : "memory"
-	);
-}
+    portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
+    {
+        __asm volatile
+        (
+            "	msr basepri, %0	"::"r" ( ulNewMaskValue ) : "memory"
+        );
+    }
 /*-----------------------------------------------------------*/
 
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
+    #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
-
diff --git a/portable/GCC/ARM_CR5/port.c b/portable/GCC/ARM_CR5/port.c
index 6823f94d7..6dbd247be 100644
--- a/portable/GCC/ARM_CR5/port.c
+++ b/portable/GCC/ARM_CR5/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,10 +19,9 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /* Standard includes. */
@@ -33,118 +32,118 @@
 #include "task.h"
 
 #ifndef configINTERRUPT_CONTROLLER_BASE_ADDRESS
-	#error configINTERRUPT_CONTROLLER_BASE_ADDRESS must be defined.  Refer to Cortex-A equivalent: http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+    #error configINTERRUPT_CONTROLLER_BASE_ADDRESS must be defined.  Refer to Cortex-A equivalent: http: /*www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html */
 #endif
 
 #ifndef configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET
-	#error configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET must be defined.  Refer to Cortex-A equivalent: http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+    #error configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET must be defined.  Refer to Cortex-A equivalent: http: /*www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html */
 #endif
 
 #ifndef configUNIQUE_INTERRUPT_PRIORITIES
-	#error configUNIQUE_INTERRUPT_PRIORITIES must be defined.  Refer to Cortex-A equivalent: http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+    #error configUNIQUE_INTERRUPT_PRIORITIES must be defined.  Refer to Cortex-A equivalent: http: /*www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html */
 #endif
 
 #ifndef configSETUP_TICK_INTERRUPT
-	#error configSETUP_TICK_INTERRUPT() must be defined.  Refer to Cortex-A equivalent: http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+    #error configSETUP_TICK_INTERRUPT() must be defined.  Refer to Cortex-A equivalent: http: /*www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html */
 #endif /* configSETUP_TICK_INTERRUPT */
 
 #ifndef configMAX_API_CALL_INTERRUPT_PRIORITY
-	#error configMAX_API_CALL_INTERRUPT_PRIORITY must be defined.  Refer to Cortex-A equivalent: http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+    #error configMAX_API_CALL_INTERRUPT_PRIORITY must be defined.  Refer to Cortex-A equivalent: http: /*www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html */
 #endif
 
 #if configMAX_API_CALL_INTERRUPT_PRIORITY == 0
-	#error configMAX_API_CALL_INTERRUPT_PRIORITY must not be set to 0
+    #error configMAX_API_CALL_INTERRUPT_PRIORITY must not be set to 0
 #endif
 
 #if configMAX_API_CALL_INTERRUPT_PRIORITY > configUNIQUE_INTERRUPT_PRIORITIES
-	#error configMAX_API_CALL_INTERRUPT_PRIORITY must be less than or equal to configUNIQUE_INTERRUPT_PRIORITIES as the lower the numeric priority value the higher the logical interrupt priority
+    #error configMAX_API_CALL_INTERRUPT_PRIORITY must be less than or equal to configUNIQUE_INTERRUPT_PRIORITIES as the lower the numeric priority value the higher the logical interrupt priority
 #endif
 
 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
-	/* Check the configuration. */
-	#if( configMAX_PRIORITIES > 32 )
-		#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
-	#endif
+    /* Check the configuration. */
+    #if ( configMAX_PRIORITIES > 32 )
+        #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
+    #endif
 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
 
 /* In case security extensions are implemented. */
 #if configMAX_API_CALL_INTERRUPT_PRIORITY <= ( configUNIQUE_INTERRUPT_PRIORITIES / 2 )
-	#error configMAX_API_CALL_INTERRUPT_PRIORITY must be greater than ( configUNIQUE_INTERRUPT_PRIORITIES / 2 )
+    #error configMAX_API_CALL_INTERRUPT_PRIORITY must be greater than ( configUNIQUE_INTERRUPT_PRIORITIES / 2 )
 #endif
 
 /* Some vendor specific files default configCLEAR_TICK_INTERRUPT() in
-portmacro.h. */
+ * portmacro.h. */
 #ifndef configCLEAR_TICK_INTERRUPT
-	#define configCLEAR_TICK_INTERRUPT()
+    #define configCLEAR_TICK_INTERRUPT()
 #endif
 
 /* A critical section is exited when the critical section nesting count reaches
-this value. */
-#define portNO_CRITICAL_NESTING			( ( uint32_t ) 0 )
+ * this value. */
+#define portNO_CRITICAL_NESTING          ( ( uint32_t ) 0 )
 
 /* In all GICs 255 can be written to the priority mask register to unmask all
-(but the lowest) interrupt priority. */
-#define portUNMASK_VALUE				( 0xFFUL )
+ * (but the lowest) interrupt priority. */
+#define portUNMASK_VALUE                 ( 0xFFUL )
 
 /* Tasks are not created with a floating point context, but can be given a
-floating point context after they have been created.  A variable is stored as
-part of the tasks context that holds portNO_FLOATING_POINT_CONTEXT if the task
-does not have an FPU context, or any other value if the task does have an FPU
-context. */
-#define portNO_FLOATING_POINT_CONTEXT	( ( StackType_t ) 0 )
+ * floating point context after they have been created.  A variable is stored as
+ * part of the tasks context that holds portNO_FLOATING_POINT_CONTEXT if the task
+ * does not have an FPU context, or any other value if the task does have an FPU
+ * context. */
+#define portNO_FLOATING_POINT_CONTEXT    ( ( StackType_t ) 0 )
 
 /* Constants required to setup the initial task context. */
-#define portINITIAL_SPSR				( ( StackType_t ) 0x1f ) /* System mode, ARM mode, IRQ enabled FIQ enabled. */
-#define portTHUMB_MODE_BIT				( ( StackType_t ) 0x20 )
-#define portINTERRUPT_ENABLE_BIT		( 0x80UL )
-#define portTHUMB_MODE_ADDRESS			( 0x01UL )
+#define portINITIAL_SPSR                 ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, IRQ enabled FIQ enabled. */
+#define portTHUMB_MODE_BIT               ( ( StackType_t ) 0x20 )
+#define portINTERRUPT_ENABLE_BIT         ( 0x80UL )
+#define portTHUMB_MODE_ADDRESS           ( 0x01UL )
 
 /* Used by portASSERT_IF_INTERRUPT_PRIORITY_INVALID() when ensuring the binary
-point is zero. */
-#define portBINARY_POINT_BITS			( ( uint8_t ) 0x03 )
+ * point is zero. */
+#define portBINARY_POINT_BITS            ( ( uint8_t ) 0x03 )
 
 /* Masks all bits in the APSR other than the mode bits. */
-#define portAPSR_MODE_BITS_MASK			( 0x1F )
+#define portAPSR_MODE_BITS_MASK          ( 0x1F )
 
 /* The value of the mode bits in the APSR when the CPU is executing in user
-mode. */
-#define portAPSR_USER_MODE				( 0x10 )
+ * mode. */
+#define portAPSR_USER_MODE               ( 0x10 )
 
 /* The critical section macros only mask interrupts up to an application
-determined priority level.  Sometimes it is necessary to turn interrupt off in
-the CPU itself before modifying certain hardware registers. */
-#define portCPU_IRQ_DISABLE()										\
-	__asm volatile ( "CPSID i" ::: "memory" );						\
-	__asm volatile ( "DSB" );										\
-	__asm volatile ( "ISB" );
+ * determined priority level.  Sometimes it is necessary to turn interrupt off in
+ * the CPU itself before modifying certain hardware registers. */
+#define portCPU_IRQ_DISABLE()                  \
+    __asm volatile ( "CPSID i" ::: "memory" ); \
+    __asm volatile ( "DSB" );                  \
+    __asm volatile ( "ISB" );
 
-#define portCPU_IRQ_ENABLE()										\
-	__asm volatile ( "CPSIE i" ::: "memory" );						\
-	__asm volatile ( "DSB" );										\
-	__asm volatile ( "ISB" );
+#define portCPU_IRQ_ENABLE()                   \
+    __asm volatile ( "CPSIE i" ::: "memory" ); \
+    __asm volatile ( "DSB" );                  \
+    __asm volatile ( "ISB" );
 
 
 /* Macro to unmask all interrupt priorities. */
-#define portCLEAR_INTERRUPT_MASK()									\
-{																	\
-	portCPU_IRQ_DISABLE();											\
-	portICCPMR_PRIORITY_MASK_REGISTER = portUNMASK_VALUE;			\
-	__asm volatile (	"DSB		\n"								\
-						"ISB		\n" );							\
-	portCPU_IRQ_ENABLE();											\
-}
+#define portCLEAR_INTERRUPT_MASK()                            \
+    {                                                         \
+        portCPU_IRQ_DISABLE();                                \
+        portICCPMR_PRIORITY_MASK_REGISTER = portUNMASK_VALUE; \
+        __asm volatile ( "DSB		\n"                       \
+                         "ISB		\n");                         \
+        portCPU_IRQ_ENABLE();                                 \
+    }
 
-#define portINTERRUPT_PRIORITY_REGISTER_OFFSET		0x400UL
-#define portMAX_8_BIT_VALUE							( ( uint8_t ) 0xff )
-#define portBIT_0_SET								( ( uint8_t ) 0x01 )
+#define portINTERRUPT_PRIORITY_REGISTER_OFFSET    0x400UL
+#define portMAX_8_BIT_VALUE                       ( ( uint8_t ) 0xff )
+#define portBIT_0_SET                             ( ( uint8_t ) 0x01 )
 
 /* Let the user override the pre-loading of the initial LR with the address of
-prvTaskExitError() in case is messes up unwinding of the stack in the
-debugger. */
+ * prvTaskExitError() in case is messes up unwinding of the stack in the
+ * debugger. */
 #ifdef configTASK_RETURN_ADDRESS
-	#define portTASK_RETURN_ADDRESS	configTASK_RETURN_ADDRESS
+    #define portTASK_RETURN_ADDRESS    configTASK_RETURN_ADDRESS
 #else
-	#define portTASK_RETURN_ADDRESS	prvTaskExitError
+    #define portTASK_RETURN_ADDRESS    prvTaskExitError
 #endif
 
 /*-----------------------------------------------------------*/
@@ -163,363 +162,368 @@ static void prvTaskExitError( void );
 /*-----------------------------------------------------------*/
 
 /* A variable is used to keep track of the critical section nesting.  This
-variable has to be stored as part of the task context and must be initialised to
-a non zero value to ensure interrupts don't inadvertently become unmasked before
-the scheduler starts.  As it is stored as part of the task context it will
-automatically be set to 0 when the first task is started. */
+ * variable has to be stored as part of the task context and must be initialised to
+ * a non zero value to ensure interrupts don't inadvertently become unmasked before
+ * the scheduler starts.  As it is stored as part of the task context it will
+ * automatically be set to 0 when the first task is started. */
 volatile uint32_t ulCriticalNesting = 9999UL;
 
 /* Saved as part of the task context.  If ulPortTaskHasFPUContext is non-zero then
-a floating point context must be saved and restored for the task. */
+ * a floating point context must be saved and restored for the task. */
 uint32_t ulPortTaskHasFPUContext = pdFALSE;
 
 /* Set to 1 to pend a context switch from an ISR. */
 uint32_t ulPortYieldRequired = pdFALSE;
 
 /* Counts the interrupt nesting depth.  A context switch is only performed if
-if the nesting depth is 0. */
+ * if the nesting depth is 0. */
 uint32_t ulPortInterruptNesting = 0UL;
 
 /* Used in asm code. */
-__attribute__(( used )) const uint32_t ulICCIAR = portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS;
-__attribute__(( used )) const uint32_t ulICCEOIR = portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS;
-__attribute__(( used )) const uint32_t ulICCPMR	= portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS;
-__attribute__(( used )) const uint32_t ulMaxAPIPriorityMask = ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );
+__attribute__( ( used ) ) const uint32_t ulICCIAR = portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS;
+__attribute__( ( used ) ) const uint32_t ulICCEOIR = portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS;
+__attribute__( ( used ) ) const uint32_t ulICCPMR = portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS;
+__attribute__( ( used ) ) const uint32_t ulMaxAPIPriorityMask = ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );
 
 /*-----------------------------------------------------------*/
 
 /*
  * See header file for description.
  */
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
 {
-	/* Setup the initial stack of the task.  The stack is set exactly as
-	expected by the portRESTORE_CONTEXT() macro.
+    /* Setup the initial stack of the task.  The stack is set exactly as
+     * expected by the portRESTORE_CONTEXT() macro.
+     *
+     * The fist real value on the stack is the status register, which is set for
+     * system mode, with interrupts enabled.  A few NULLs are added first to ensure
+     * GDB does not try decoding a non-existent return address. */
+    *pxTopOfStack = ( StackType_t ) NULL;
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) NULL;
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) NULL;
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
 
-	The fist real value on the stack is the status register, which is set for
-	system mode, with interrupts enabled.  A few NULLs are added first to ensure
-	GDB does not try decoding a non-existent return address. */
-	*pxTopOfStack = ( StackType_t ) NULL;
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) NULL;
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) NULL;
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
+    if( ( ( uint32_t ) pxCode & portTHUMB_MODE_ADDRESS ) != 0x00UL )
+    {
+        /* The task will start in THUMB mode. */
+        *pxTopOfStack |= portTHUMB_MODE_BIT;
+    }
 
-	if( ( ( uint32_t ) pxCode & portTHUMB_MODE_ADDRESS ) != 0x00UL )
-	{
-		/* The task will start in THUMB mode. */
-		*pxTopOfStack |= portTHUMB_MODE_BIT;
-	}
+    pxTopOfStack--;
 
-	pxTopOfStack--;
+    /* Next the return address, which in this case is the start of the task. */
+    *pxTopOfStack = ( StackType_t ) pxCode;
+    pxTopOfStack--;
 
-	/* Next the return address, which in this case is the start of the task. */
-	*pxTopOfStack = ( StackType_t ) pxCode;
-	pxTopOfStack--;
+    /* Next all the registers other than the stack pointer. */
+    *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* R14 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x12121212;              /* R12 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x11111111;              /* R11 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x10101010;              /* R10 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x09090909;              /* R9 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x08080808;              /* R8 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x07070707;              /* R7 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x06060606;              /* R6 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x05050505;              /* R5 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x04040404;              /* R4 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x03030303;              /* R3 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x02020202;              /* R2 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x01010101;              /* R1 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) pvParameters;            /* R0 */
+    pxTopOfStack--;
 
-	/* Next all the registers other than the stack pointer. */
-	*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* R14 */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) 0x12121212;	/* R12 */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) 0x11111111;	/* R11 */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) 0x10101010;	/* R10 */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) 0x09090909;	/* R9 */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) 0x08080808;	/* R8 */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) 0x07070707;	/* R7 */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) 0x06060606;	/* R6 */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) 0x05050505;	/* R5 */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) 0x04040404;	/* R4 */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) 0x03030303;	/* R3 */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) 0x02020202;	/* R2 */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) 0x01010101;	/* R1 */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
-	pxTopOfStack--;
+    /* The task will start with a critical nesting count of 0 as interrupts are
+     * enabled. */
+    *pxTopOfStack = portNO_CRITICAL_NESTING;
+    pxTopOfStack--;
 
-	/* The task will start with a critical nesting count of 0 as interrupts are
-	enabled. */
-	*pxTopOfStack = portNO_CRITICAL_NESTING;
-	pxTopOfStack--;
+    /* The task will start without a floating point context.  A task that uses
+     * the floating point hardware must call vPortTaskUsesFPU() before executing
+     * any floating point instructions. */
+    *pxTopOfStack = portNO_FLOATING_POINT_CONTEXT;
 
-	/* The task will start without a floating point context.  A task that uses
-	the floating point hardware must call vPortTaskUsesFPU() before executing
-	any floating point instructions. */
-	*pxTopOfStack = portNO_FLOATING_POINT_CONTEXT;
-
-	return pxTopOfStack;
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 static void prvTaskExitError( void )
 {
-	/* A function that implements a task must not exit or attempt to return to
-	its caller as there is nothing to return to.  If a task wants to exit it
-	should instead call vTaskDelete( NULL ).
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to.  If a task wants to exit it
+     * should instead call vTaskDelete( NULL ).
+     *
+     * Artificially force an assert() to be triggered if configASSERT() is
+     * defined, then stop here so application writers can catch the error. */
+    configASSERT( ulPortInterruptNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
 
-	Artificially force an assert() to be triggered if configASSERT() is
-	defined, then stop here so application writers can catch the error. */
-	configASSERT( ulPortInterruptNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
-	for( ;; );
+    for( ; ; )
+    {
+    }
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xPortStartScheduler( void )
 {
-uint32_t ulAPSR, ulCycles = 8; /* 8 bits per byte. */
+    uint32_t ulAPSR, ulCycles = 8; /* 8 bits per byte. */
 
-	#if( configASSERT_DEFINED == 1 )
-	{
-		volatile uint32_t ulOriginalPriority;
-		volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + portINTERRUPT_PRIORITY_REGISTER_OFFSET );
-		volatile uint8_t ucMaxPriorityValue;
+    #if ( configASSERT_DEFINED == 1 )
+        {
+            volatile uint32_t ulOriginalPriority;
+            volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + portINTERRUPT_PRIORITY_REGISTER_OFFSET );
+            volatile uint8_t ucMaxPriorityValue;
 
-		/* Determine how many priority bits are implemented in the GIC.
+            /* Determine how many priority bits are implemented in the GIC.
+             *
+             * Save the interrupt priority value that is about to be clobbered. */
+            ulOriginalPriority = *pucFirstUserPriorityRegister;
 
-		Save the interrupt priority value that is about to be clobbered. */
-		ulOriginalPriority = *pucFirstUserPriorityRegister;
+            /* Determine the number of priority bits available.  First write to
+             * all possible bits. */
+            *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
 
-		/* Determine the number of priority bits available.  First write to
-		all possible bits. */
-		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
+            /* Read the value back to see how many bits stuck. */
+            ucMaxPriorityValue = *pucFirstUserPriorityRegister;
 
-		/* Read the value back to see how many bits stuck. */
-		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
+            /* Shift to the least significant bits. */
+            while( ( ucMaxPriorityValue & portBIT_0_SET ) != portBIT_0_SET )
+            {
+                ucMaxPriorityValue >>= ( uint8_t ) 0x01;
 
-		/* Shift to the least significant bits. */
-		while( ( ucMaxPriorityValue & portBIT_0_SET ) != portBIT_0_SET )
-		{
-			ucMaxPriorityValue >>= ( uint8_t ) 0x01;
+                /* If ulCycles reaches 0 then ucMaxPriorityValue must have been
+                 * read as 0, indicating a misconfiguration. */
+                ulCycles--;
 
-			/* If ulCycles reaches 0 then ucMaxPriorityValue must have been
-			read as 0, indicating a misconfiguration. */
-			ulCycles--;
-			if( ulCycles == 0 )
-			{
-				break;
-			}
-		}
+                if( ulCycles == 0 )
+                {
+                    break;
+                }
+            }
 
-		/* Sanity check configUNIQUE_INTERRUPT_PRIORITIES matches the read
-		value. */
-		configASSERT( ucMaxPriorityValue == portLOWEST_INTERRUPT_PRIORITY );
+            /* Sanity check configUNIQUE_INTERRUPT_PRIORITIES matches the read
+             * value. */
+            configASSERT( ucMaxPriorityValue == portLOWEST_INTERRUPT_PRIORITY );
 
-		/* Restore the clobbered interrupt priority register to its original
-		value. */
-		*pucFirstUserPriorityRegister = ulOriginalPriority;
-	}
-	#endif /* conifgASSERT_DEFINED */
+            /* Restore the clobbered interrupt priority register to its original
+             * value. */
+            *pucFirstUserPriorityRegister = ulOriginalPriority;
+        }
+    #endif /* conifgASSERT_DEFINED */
 
-	/* Only continue if the CPU is not in User mode.  The CPU must be in a
-	Privileged mode for the scheduler to start. */
-	__asm volatile ( "MRS %0, APSR" : "=r" ( ulAPSR ) :: "memory" );
-	ulAPSR &= portAPSR_MODE_BITS_MASK;
-	configASSERT( ulAPSR != portAPSR_USER_MODE );
+    /* Only continue if the CPU is not in User mode.  The CPU must be in a
+     * Privileged mode for the scheduler to start. */
+    __asm volatile ( "MRS %0, APSR" : "=r" ( ulAPSR )::"memory" );
+    ulAPSR &= portAPSR_MODE_BITS_MASK;
+    configASSERT( ulAPSR != portAPSR_USER_MODE );
 
-	if( ulAPSR != portAPSR_USER_MODE )
-	{
-		/* Only continue if the binary point value is set to its lowest possible
-		setting.  See the comments in vPortValidateInterruptPriority() below for
-		more information. */
-		configASSERT( ( portICCBPR_BINARY_POINT_REGISTER & portBINARY_POINT_BITS ) <= portMAX_BINARY_POINT_VALUE );
+    if( ulAPSR != portAPSR_USER_MODE )
+    {
+        /* Only continue if the binary point value is set to its lowest possible
+         * setting.  See the comments in vPortValidateInterruptPriority() below for
+         * more information. */
+        configASSERT( ( portICCBPR_BINARY_POINT_REGISTER & portBINARY_POINT_BITS ) <= portMAX_BINARY_POINT_VALUE );
 
-		if( ( portICCBPR_BINARY_POINT_REGISTER & portBINARY_POINT_BITS ) <= portMAX_BINARY_POINT_VALUE )
-		{
-			/* Interrupts are turned off in the CPU itself to ensure tick does
-			not execute	while the scheduler is being started.  Interrupts are
-			automatically turned back on in the CPU when the first task starts
-			executing. */
-			portCPU_IRQ_DISABLE();
+        if( ( portICCBPR_BINARY_POINT_REGISTER & portBINARY_POINT_BITS ) <= portMAX_BINARY_POINT_VALUE )
+        {
+            /* Interrupts are turned off in the CPU itself to ensure tick does
+             * not execute	while the scheduler is being started.  Interrupts are
+             * automatically turned back on in the CPU when the first task starts
+             * executing. */
+            portCPU_IRQ_DISABLE();
 
-			/* Start the timer that generates the tick ISR. */
-			configSETUP_TICK_INTERRUPT();
+            /* Start the timer that generates the tick ISR. */
+            configSETUP_TICK_INTERRUPT();
 
-			/* Start the first task executing. */
-			vPortRestoreTaskContext();
-		}
-	}
+            /* Start the first task executing. */
+            vPortRestoreTaskContext();
+        }
+    }
 
-	/* Will only get here if vTaskStartScheduler() was called with the CPU in
-	a non-privileged mode or the binary point register was not set to its lowest
-	possible value.  prvTaskExitError() is referenced to prevent a compiler
-	warning about it being defined but not referenced in the case that the user
-	defines their own exit address. */
-	( void ) prvTaskExitError;
-	return 0;
+    /* Will only get here if vTaskStartScheduler() was called with the CPU in
+     * a non-privileged mode or the binary point register was not set to its lowest
+     * possible value.  prvTaskExitError() is referenced to prevent a compiler
+     * warning about it being defined but not referenced in the case that the user
+     * defines their own exit address. */
+    ( void ) prvTaskExitError;
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void )
 {
-	/* Not implemented in ports where there is nothing to return to.
-	Artificially force an assert. */
-	configASSERT( ulCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( ulCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void )
 {
-	/* Mask interrupts up to the max syscall interrupt priority. */
-	ulPortSetInterruptMask();
+    /* Mask interrupts up to the max syscall interrupt priority. */
+    ulPortSetInterruptMask();
 
-	/* Now interrupts are disabled ulCriticalNesting can be accessed
-	directly.  Increment ulCriticalNesting to keep a count of how many times
-	portENTER_CRITICAL() has been called. */
-	ulCriticalNesting++;
+    /* Now interrupts are disabled ulCriticalNesting can be accessed
+     * directly.  Increment ulCriticalNesting to keep a count of how many times
+     * portENTER_CRITICAL() has been called. */
+    ulCriticalNesting++;
 
-	/* This is not the interrupt safe version of the enter critical function so
-	assert() if it is being called from an interrupt context.  Only API
-	functions that end in "FromISR" can be used in an interrupt.  Only assert if
-	the critical nesting count is 1 to protect against recursive calls if the
-	assert function also uses a critical section. */
-	if( ulCriticalNesting == 1 )
-	{
-		configASSERT( ulPortInterruptNesting == 0 );
-	}
+    /* This is not the interrupt safe version of the enter critical function so
+     * assert() if it is being called from an interrupt context.  Only API
+     * functions that end in "FromISR" can be used in an interrupt.  Only assert if
+     * the critical nesting count is 1 to protect against recursive calls if the
+     * assert function also uses a critical section. */
+    if( ulCriticalNesting == 1 )
+    {
+        configASSERT( ulPortInterruptNesting == 0 );
+    }
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void )
 {
-	if( ulCriticalNesting > portNO_CRITICAL_NESTING )
-	{
-		/* Decrement the nesting count as the critical section is being
-		exited. */
-		ulCriticalNesting--;
+    if( ulCriticalNesting > portNO_CRITICAL_NESTING )
+    {
+        /* Decrement the nesting count as the critical section is being
+         * exited. */
+        ulCriticalNesting--;
 
-		/* If the nesting level has reached zero then all interrupt
-		priorities must be re-enabled. */
-		if( ulCriticalNesting == portNO_CRITICAL_NESTING )
-		{
-			/* Critical nesting has reached zero so all interrupt priorities
-			should be unmasked. */
-			portCLEAR_INTERRUPT_MASK();
-		}
-	}
+        /* If the nesting level has reached zero then all interrupt
+         * priorities must be re-enabled. */
+        if( ulCriticalNesting == portNO_CRITICAL_NESTING )
+        {
+            /* Critical nesting has reached zero so all interrupt priorities
+             * should be unmasked. */
+            portCLEAR_INTERRUPT_MASK();
+        }
+    }
 }
 /*-----------------------------------------------------------*/
 
 void FreeRTOS_Tick_Handler( void )
 {
-	/* Set interrupt mask before altering scheduler structures.   The tick
-	handler runs at the lowest priority, so interrupts cannot already be masked,
-	so there is no need to save and restore the current mask value.  It is
-	necessary to turn off interrupts in the CPU itself while the ICCPMR is being
-	updated. */
-	portCPU_IRQ_DISABLE();
-	portICCPMR_PRIORITY_MASK_REGISTER = ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );
-	__asm volatile (	"dsb		\n"
-						"isb		\n" ::: "memory" );
-	portCPU_IRQ_ENABLE();
+    /* Set interrupt mask before altering scheduler structures.   The tick
+     * handler runs at the lowest priority, so interrupts cannot already be masked,
+     * so there is no need to save and restore the current mask value.  It is
+     * necessary to turn off interrupts in the CPU itself while the ICCPMR is being
+     * updated. */
+    portCPU_IRQ_DISABLE();
+    portICCPMR_PRIORITY_MASK_REGISTER = ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );
+    __asm volatile ( "dsb		\n"
+                     "isb		\n"::: "memory" );
+    portCPU_IRQ_ENABLE();
 
-	/* Increment the RTOS tick. */
-	if( xTaskIncrementTick() != pdFALSE )
-	{
-		ulPortYieldRequired = pdTRUE;
-	}
+    /* Increment the RTOS tick. */
+    if( xTaskIncrementTick() != pdFALSE )
+    {
+        ulPortYieldRequired = pdTRUE;
+    }
 
-	/* Ensure all interrupt priorities are active again. */
-	portCLEAR_INTERRUPT_MASK();
-	configCLEAR_TICK_INTERRUPT();
+    /* Ensure all interrupt priorities are active again. */
+    portCLEAR_INTERRUPT_MASK();
+    configCLEAR_TICK_INTERRUPT();
 }
 /*-----------------------------------------------------------*/
 
 void vPortTaskUsesFPU( void )
 {
-uint32_t ulInitialFPSCR = 0;
+    uint32_t ulInitialFPSCR = 0;
 
-	/* A task is registering the fact that it needs an FPU context.  Set the
-	FPU flag (which is saved as part of the task context). */
-	ulPortTaskHasFPUContext = pdTRUE;
+    /* A task is registering the fact that it needs an FPU context.  Set the
+     * FPU flag (which is saved as part of the task context). */
+    ulPortTaskHasFPUContext = pdTRUE;
 
-	/* Initialise the floating point status register. */
-	__asm volatile ( "FMXR 	FPSCR, %0" :: "r" (ulInitialFPSCR) : "memory" );
+    /* Initialise the floating point status register. */
+    __asm volatile ( "FMXR 	FPSCR, %0" ::"r" ( ulInitialFPSCR ) : "memory" );
 }
 /*-----------------------------------------------------------*/
 
 void vPortClearInterruptMask( uint32_t ulNewMaskValue )
 {
-	if( ulNewMaskValue == pdFALSE )
-	{
-		portCLEAR_INTERRUPT_MASK();
-	}
+    if( ulNewMaskValue == pdFALSE )
+    {
+        portCLEAR_INTERRUPT_MASK();
+    }
 }
 /*-----------------------------------------------------------*/
 
 uint32_t ulPortSetInterruptMask( void )
 {
-uint32_t ulReturn;
+    uint32_t ulReturn;
 
-	/* Interrupt in the CPU must be turned off while the ICCPMR is being
-	updated. */
-	portCPU_IRQ_DISABLE();
-	if( portICCPMR_PRIORITY_MASK_REGISTER == ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) )
-	{
-		/* Interrupts were already masked. */
-		ulReturn = pdTRUE;
-	}
-	else
-	{
-		ulReturn = pdFALSE;
-		portICCPMR_PRIORITY_MASK_REGISTER = ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );
-		__asm volatile (	"dsb		\n"
-							"isb		\n" ::: "memory" );
-	}
-	portCPU_IRQ_ENABLE();
+    /* Interrupt in the CPU must be turned off while the ICCPMR is being
+     * updated. */
+    portCPU_IRQ_DISABLE();
 
-	return ulReturn;
+    if( portICCPMR_PRIORITY_MASK_REGISTER == ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) )
+    {
+        /* Interrupts were already masked. */
+        ulReturn = pdTRUE;
+    }
+    else
+    {
+        ulReturn = pdFALSE;
+        portICCPMR_PRIORITY_MASK_REGISTER = ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );
+        __asm volatile ( "dsb		\n"
+                         "isb		\n"::: "memory" );
+    }
+
+    portCPU_IRQ_ENABLE();
+
+    return ulReturn;
 }
 /*-----------------------------------------------------------*/
 
-#if( configASSERT_DEFINED == 1 )
+#if ( configASSERT_DEFINED == 1 )
 
-	void vPortValidateInterruptPriority( void )
-	{
-		/* The following assertion will fail if a service routine (ISR) for
-		an interrupt that has been assigned a priority above
-		configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
-		function.  ISR safe FreeRTOS API functions must *only* be called
-		from interrupts that have been assigned a priority at or below
-		configMAX_SYSCALL_INTERRUPT_PRIORITY.
+    void vPortValidateInterruptPriority( void )
+    {
+        /* The following assertion will fail if a service routine (ISR) for
+         * an interrupt that has been assigned a priority above
+         * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
+         * function.  ISR safe FreeRTOS API functions must *only* be called
+         * from interrupts that have been assigned a priority at or below
+         * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+         *
+         * Numerically low interrupt priority numbers represent logically high
+         * interrupt priorities, therefore the priority of the interrupt must
+         * be set to a value equal to or numerically *higher* than
+         * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+         *
+         * FreeRTOS maintains separate thread and ISR API functions to ensure
+         * interrupt entry is as fast and simple as possible. */
 
-		Numerically low interrupt priority numbers represent logically high
-		interrupt priorities, therefore the priority of the interrupt must
-		be set to a value equal to or numerically *higher* than
-		configMAX_SYSCALL_INTERRUPT_PRIORITY.
+        configASSERT( portICCRPR_RUNNING_PRIORITY_REGISTER >= ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) );
 
-		FreeRTOS maintains separate thread and ISR API functions to ensure
-		interrupt entry is as fast and simple as possible. */
-
-		configASSERT( portICCRPR_RUNNING_PRIORITY_REGISTER >= ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) );
-
-		/* Priority grouping:  The interrupt controller (GIC) allows the bits
-		that define each interrupt's priority to be split between bits that
-		define the interrupt's pre-emption priority bits and bits that define
-		the interrupt's sub-priority.  For simplicity all bits must be defined
-		to be pre-emption priority bits.  The following assertion will fail if
-		this is not the case (if some bits represent a sub-priority).
-
-		The priority grouping is configured by the GIC's binary point register
-		(ICCBPR).  Writing 0 to ICCBPR will ensure it is set to its lowest
-		possible value (which may be above 0). */
-		configASSERT( ( portICCBPR_BINARY_POINT_REGISTER & portBINARY_POINT_BITS ) <= portMAX_BINARY_POINT_VALUE );
-	}
+        /* Priority grouping:  The interrupt controller (GIC) allows the bits
+         * that define each interrupt's priority to be split between bits that
+         * define the interrupt's pre-emption priority bits and bits that define
+         * the interrupt's sub-priority.  For simplicity all bits must be defined
+         * to be pre-emption priority bits.  The following assertion will fail if
+         * this is not the case (if some bits represent a sub-priority).
+         *
+         * The priority grouping is configured by the GIC's binary point register
+         * (ICCBPR).  Writing 0 to ICCBPR will ensure it is set to its lowest
+         * possible value (which may be above 0). */
+        configASSERT( ( portICCBPR_BINARY_POINT_REGISTER & portBINARY_POINT_BITS ) <= portMAX_BINARY_POINT_VALUE );
+    }
 
 #endif /* configASSERT_DEFINED */
 /*-----------------------------------------------------------*/
-
-
-
diff --git a/portable/GCC/ARM_CR5/portASM.S b/portable/GCC/ARM_CR5/portASM.S
index 54edeb97f..019736049 100644
--- a/portable/GCC/ARM_CR5/portASM.S
+++ b/portable/GCC/ARM_CR5/portASM.S
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ARM_CR5/portmacro.h b/portable/GCC/ARM_CR5/portmacro.h
index 3f48ff609..e02868779 100644
--- a/portable/GCC/ARM_CR5/portmacro.h
+++ b/portable/GCC/ARM_CR5/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,18 +19,18 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-	extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -43,153 +43,152 @@
  */
 
 /* Type definitions. */
-#define portCHAR		char
-#define portFLOAT		float
-#define portDOUBLE		double
-#define portLONG		long
-#define portSHORT		short
-#define portSTACK_TYPE	uint32_t
-#define portBASE_TYPE	long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE StackType_t;
-typedef long BaseType_t;
-typedef unsigned long UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-typedef uint32_t TickType_t;
-#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+    typedef uint32_t         TickType_t;
+    #define portMAX_DELAY    ( TickType_t ) 0xffffffffUL
 
 /*-----------------------------------------------------------*/
 
 /* Hardware specifics. */
-#define portSTACK_GROWTH			( -1 )
-#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT			8
+    #define portSTACK_GROWTH      ( -1 )
+    #define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT    8
 
 /*-----------------------------------------------------------*/
 
 /* Task utilities. */
 
 /* Called at the end of an ISR that can cause a context switch. */
-#define portEND_SWITCHING_ISR( xSwitchRequired )\
-{												\
-extern uint32_t ulPortYieldRequired;			\
-												\
-	if( xSwitchRequired != pdFALSE )			\
-	{											\
-		ulPortYieldRequired = pdTRUE;			\
-	}											\
-}
+    #define portEND_SWITCHING_ISR( xSwitchRequired ) \
+    {                                                \
+        extern uint32_t ulPortYieldRequired;         \
+                                                     \
+        if( xSwitchRequired != pdFALSE )             \
+        {                                            \
+            ulPortYieldRequired = pdTRUE;            \
+        }                                            \
+    }
 
-#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
-#define portYIELD() __asm volatile ( "SWI 0" ::: "memory" );
+    #define portYIELD_FROM_ISR( x )    portEND_SWITCHING_ISR( x )
+    #define portYIELD()                __asm volatile ( "SWI 0" ::: "memory" );
 
 
 /*-----------------------------------------------------------
- * Critical section control
- *----------------------------------------------------------*/
+* Critical section control
+*----------------------------------------------------------*/
 
-extern void vPortEnterCritical( void );
-extern void vPortExitCritical( void );
-extern uint32_t ulPortSetInterruptMask( void );
-extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );
-extern void vPortInstallFreeRTOSVectorTable( void );
+    extern void vPortEnterCritical( void );
+    extern void vPortExitCritical( void );
+    extern uint32_t ulPortSetInterruptMask( void );
+    extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );
+    extern void vPortInstallFreeRTOSVectorTable( void );
 
 /* These macros do not globally disable/enable interrupts.  They do mask off
-interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */
-#define portENTER_CRITICAL()		vPortEnterCritical();
-#define portEXIT_CRITICAL()			vPortExitCritical();
-#define portDISABLE_INTERRUPTS()	ulPortSetInterruptMask()
-#define portENABLE_INTERRUPTS()		vPortClearInterruptMask( 0 )
-#define portSET_INTERRUPT_MASK_FROM_ISR()		ulPortSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)	vPortClearInterruptMask(x)
+ * interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */
+    #define portENTER_CRITICAL()                      vPortEnterCritical();
+    #define portEXIT_CRITICAL()                       vPortExitCritical();
+    #define portDISABLE_INTERRUPTS()                  ulPortSetInterruptMask()
+    #define portENABLE_INTERRUPTS()                   vPortClearInterruptMask( 0 )
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulPortSetInterruptMask()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vPortClearInterruptMask( x )
 
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site.  These are
-not required for this port but included in case common demo code that uses these
-macros is used. */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters )	void vFunction( void *pvParameters )
+ * not required for this port but included in case common demo code that uses these
+ * macros is used. */
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 
 /* Prototype of the FreeRTOS tick handler.  This must be installed as the
-handler for whichever peripheral is used to generate the RTOS tick. */
-void FreeRTOS_Tick_Handler( void );
+ * handler for whichever peripheral is used to generate the RTOS tick. */
+    void FreeRTOS_Tick_Handler( void );
 
 /* Any task that uses the floating point unit MUST call vPortTaskUsesFPU()
-before any floating point instructions are executed. */
-void vPortTaskUsesFPU( void );
-#define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()
+ * before any floating point instructions are executed. */
+    void vPortTaskUsesFPU( void );
+    #define portTASK_USES_FLOATING_POINT()    vPortTaskUsesFPU()
 
-#define portLOWEST_INTERRUPT_PRIORITY ( ( ( uint32_t ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL )
-#define portLOWEST_USABLE_INTERRUPT_PRIORITY ( portLOWEST_INTERRUPT_PRIORITY - 1UL )
+    #define portLOWEST_INTERRUPT_PRIORITY           ( ( ( uint32_t ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL )
+    #define portLOWEST_USABLE_INTERRUPT_PRIORITY    ( portLOWEST_INTERRUPT_PRIORITY - 1UL )
 
 /* Architecture specific optimisations. */
-#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
-	#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
-#endif
+    #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
+        #define configUSE_PORT_OPTIMISED_TASK_SELECTION    1
+    #endif
 
-#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
+    #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
 
-	/* Store/clear the ready priorities in a bit map. */
-	#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
-	#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
+/* Store/clear the ready priorities in a bit map. */
+        #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities )    ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
+        #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities )     ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
 
-	/*-----------------------------------------------------------*/
+/*-----------------------------------------------------------*/
 
-	#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __builtin_clz( uxReadyPriorities ) )
+        #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities )    uxTopPriority = ( 31 - __builtin_clz( uxReadyPriorities ) )
 
-#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
+    #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
 
-#ifdef configASSERT
-	void vPortValidateInterruptPriority( void );
-	#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() 	vPortValidateInterruptPriority()
-#endif /* configASSERT */
+    #ifdef configASSERT
+        void vPortValidateInterruptPriority( void );
+        #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()    vPortValidateInterruptPriority()
+    #endif /* configASSERT */
 
-#define portNOP() __asm volatile( "NOP" )
+    #define portNOP()                                         __asm volatile ( "NOP" )
 
 
-#ifdef __cplusplus
-	} /* extern C */
-#endif
+    #ifdef __cplusplus
+        } /* extern C */
+    #endif
 
 
 /* The number of bits to shift for an interrupt priority is dependent on the
-number of bits implemented by the interrupt controller. */
-#if configUNIQUE_INTERRUPT_PRIORITIES == 16
-	#define portPRIORITY_SHIFT 4
-	#define portMAX_BINARY_POINT_VALUE	3
-#elif configUNIQUE_INTERRUPT_PRIORITIES == 32
-	#define portPRIORITY_SHIFT 3
-	#define portMAX_BINARY_POINT_VALUE	2
-#elif configUNIQUE_INTERRUPT_PRIORITIES == 64
-	#define portPRIORITY_SHIFT 2
-	#define portMAX_BINARY_POINT_VALUE	1
-#elif configUNIQUE_INTERRUPT_PRIORITIES == 128
-	#define portPRIORITY_SHIFT 1
-	#define portMAX_BINARY_POINT_VALUE	0
-#elif configUNIQUE_INTERRUPT_PRIORITIES == 256
-	#define portPRIORITY_SHIFT 0
-	#define portMAX_BINARY_POINT_VALUE	0
-#else
-	#error Invalid configUNIQUE_INTERRUPT_PRIORITIES setting.  configUNIQUE_INTERRUPT_PRIORITIES must be set to the number of unique priorities implemented by the target hardware
-#endif
+ * number of bits implemented by the interrupt controller. */
+    #if configUNIQUE_INTERRUPT_PRIORITIES == 16
+        #define portPRIORITY_SHIFT            4
+        #define portMAX_BINARY_POINT_VALUE    3
+    #elif configUNIQUE_INTERRUPT_PRIORITIES == 32
+        #define portPRIORITY_SHIFT            3
+        #define portMAX_BINARY_POINT_VALUE    2
+    #elif configUNIQUE_INTERRUPT_PRIORITIES == 64
+        #define portPRIORITY_SHIFT            2
+        #define portMAX_BINARY_POINT_VALUE    1
+    #elif configUNIQUE_INTERRUPT_PRIORITIES == 128
+        #define portPRIORITY_SHIFT            1
+        #define portMAX_BINARY_POINT_VALUE    0
+    #elif configUNIQUE_INTERRUPT_PRIORITIES == 256
+        #define portPRIORITY_SHIFT            0
+        #define portMAX_BINARY_POINT_VALUE    0
+    #else /* if configUNIQUE_INTERRUPT_PRIORITIES == 16 */
+        #error Invalid configUNIQUE_INTERRUPT_PRIORITIES setting.  configUNIQUE_INTERRUPT_PRIORITIES must be set to the number of unique priorities implemented by the target hardware
+    #endif /* if configUNIQUE_INTERRUPT_PRIORITIES == 16 */
 
 /* Interrupt controller access addresses. */
-#define portICCPMR_PRIORITY_MASK_OFFSET  						( 0x04 )
-#define portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET 				( 0x0C )
-#define portICCEOIR_END_OF_INTERRUPT_OFFSET 					( 0x10 )
-#define portICCBPR_BINARY_POINT_OFFSET							( 0x08 )
-#define portICCRPR_RUNNING_PRIORITY_OFFSET						( 0x14 )
+    #define portICCPMR_PRIORITY_MASK_OFFSET                      ( 0x04 )
+    #define portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET              ( 0x0C )
+    #define portICCEOIR_END_OF_INTERRUPT_OFFSET                  ( 0x10 )
+    #define portICCBPR_BINARY_POINT_OFFSET                       ( 0x08 )
+    #define portICCRPR_RUNNING_PRIORITY_OFFSET                   ( 0x14 )
 
-#define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS 		( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET )
-#define portICCPMR_PRIORITY_MASK_REGISTER 					( *( ( volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )
-#define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS 	( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET )
-#define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS 		( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET )
-#define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS 			( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET )
-#define portICCBPR_BINARY_POINT_REGISTER 					( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )
-#define portICCRPR_RUNNING_PRIORITY_REGISTER 				( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )
+    #define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS       ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET )
+    #define portICCPMR_PRIORITY_MASK_REGISTER                    ( *( ( volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )
+    #define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS    ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET )
+    #define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS        ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET )
+    #define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS            ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET )
+    #define portICCBPR_BINARY_POINT_REGISTER                     ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )
+    #define portICCRPR_RUNNING_PRIORITY_REGISTER                 ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )
 
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
+    #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
 
 #endif /* PORTMACRO_H */
-
diff --git a/portable/GCC/ARM_CRx_No_GIC/port.c b/portable/GCC/ARM_CRx_No_GIC/port.c
index 3e791c50f..5da3bab9d 100644
--- a/portable/GCC/ARM_CRx_No_GIC/port.c
+++ b/portable/GCC/ARM_CRx_No_GIC/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ARM_CRx_No_GIC/portASM.S b/portable/GCC/ARM_CRx_No_GIC/portASM.S
index 8ec55772e..bfd0e473a 100644
--- a/portable/GCC/ARM_CRx_No_GIC/portASM.S
+++ b/portable/GCC/ARM_CRx_No_GIC/portASM.S
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ARM_CRx_No_GIC/portmacro.h b/portable/GCC/ARM_CRx_No_GIC/portmacro.h
index e02c74fcb..6d704b5be 100644
--- a/portable/GCC/ARM_CRx_No_GIC/portmacro.h
+++ b/portable/GCC/ARM_CRx_No_GIC/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ATMega323/port.c b/portable/GCC/ATMega323/port.c
index 31e28b611..3aa55c383 100644
--- a/portable/GCC/ATMega323/port.c
+++ b/portable/GCC/ATMega323/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ATMega323/portmacro.h b/portable/GCC/ATMega323/portmacro.h
index f43e78e96..2cbc72bbc 100644
--- a/portable/GCC/ATMega323/portmacro.h
+++ b/portable/GCC/ATMega323/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/AVR32_UC3/exception.S b/portable/GCC/AVR32_UC3/exception.S
index 9a2833f2e..79cca31e4 100644
--- a/portable/GCC/AVR32_UC3/exception.S
+++ b/portable/GCC/AVR32_UC3/exception.S
@@ -9,8 +9,9 @@
  * - Supported devices:  All AVR32UC devices with an INTC module can be used.
  * - AppNote:
  *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
+ * \author               Atmel Corporation (Now Microchip):
+ *                                        https://www.microchip.com \n
+ *                       Support and FAQ: https://www.microchip.com/support/
  *
  ******************************************************************************/
 
diff --git a/portable/GCC/AVR32_UC3/port.c b/portable/GCC/AVR32_UC3/port.c
index 2f5592a02..4e46c499c 100644
--- a/portable/GCC/AVR32_UC3/port.c
+++ b/portable/GCC/AVR32_UC3/port.c
@@ -7,13 +7,14 @@
  * - Supported devices:  All AVR32 devices can be used.
  * - AppNote:
  *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
+ * \author               Atmel Corporation (Now Microchip):
+ *                                        https://www.microchip.com \n
+ *                       Support and FAQ: https://www.microchip.com/support/
  *
  *****************************************************************************/
 
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -33,8 +34,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/AVR32_UC3/portmacro.h b/portable/GCC/AVR32_UC3/portmacro.h
index c4de32bcb..127d157d1 100644
--- a/portable/GCC/AVR32_UC3/portmacro.h
+++ b/portable/GCC/AVR32_UC3/portmacro.h
@@ -7,13 +7,14 @@
  * - Supported devices:  All AVR32 devices can be used.
  * - AppNote:
  *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
+ * \author               Atmel Corporation (Now Microchip):
+ *                                        https://www.microchip.com \n
+ *                       Support and FAQ: https://www.microchip.com/support/
  *
  *****************************************************************************/
 
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -33,8 +34,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/AVR_AVRDx/port.c b/portable/GCC/AVR_AVRDx/port.c
new file mode 100644
index 000000000..2832e0441
--- /dev/null
+++ b/portable/GCC/AVR_AVRDx/port.c
@@ -0,0 +1,345 @@
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#include 
+
+#include 
+#include "porthardware.h"
+#include "FreeRTOS.h"
+#include "task.h"
+
+/*-----------------------------------------------------------
+* Implementation of functions defined in portable.h for the AVR port.
+*----------------------------------------------------------*/
+
+/* Start tasks with interrupts enables. */
+#define portFLAGS_INT_ENABLED    ( ( StackType_t ) 0x80 )
+
+/*-----------------------------------------------------------*/
+
+/* We require the address of the pxCurrentTCB variable, but don't want to know
+ * any details of its type. */
+typedef void RTOS_TCB_t;
+extern volatile RTOS_TCB_t * volatile pxCurrentTCB;
+
+/*-----------------------------------------------------------*/
+
+/*
+ * Macro to save all the general purpose registers, the save the stack pointer
+ * into the TCB.
+ *
+ * The first thing we do is save the flags then disable interrupts.  This is to
+ * guard our stack against having a context switch interrupt after we have already
+ * pushed the registers onto the stack - causing the 32 registers to be on the
+ * stack twice.
+ *
+ * r1 is set to zero as the compiler expects it to be thus, however some
+ * of the math routines make use of R1.
+ *
+ * The interrupts will have been disabled during the call to portSAVE_CONTEXT()
+ * so we need not worry about reading/writing to the stack pointer.
+ */
+
+#define portSAVE_CONTEXT()                              \
+    asm volatile ( "push  r0                      \n\t" \
+                   "in    r0, __SREG__            \n\t" \
+                   "cli                           \n\t" \
+                   "push  r0                      \n\t" \
+                   "in    r0, __RAMPZ__           \n\t" \
+                   "push  r0                      \n\t" \
+                   "push  r1                      \n\t" \
+                   "clr   r1                      \n\t" \
+                   "push  r2                      \n\t" \
+                   "push  r3                      \n\t" \
+                   "push  r4                      \n\t" \
+                   "push  r5                      \n\t" \
+                   "push  r6                      \n\t" \
+                   "push  r7                      \n\t" \
+                   "push  r8                      \n\t" \
+                   "push  r9                      \n\t" \
+                   "push  r10                     \n\t" \
+                   "push  r11                     \n\t" \
+                   "push  r12                     \n\t" \
+                   "push  r13                     \n\t" \
+                   "push  r14                     \n\t" \
+                   "push  r15                     \n\t" \
+                   "push  r16                     \n\t" \
+                   "push  r17                     \n\t" \
+                   "push  r18                     \n\t" \
+                   "push  r19                     \n\t" \
+                   "push  r20                     \n\t" \
+                   "push  r21                     \n\t" \
+                   "push  r22                     \n\t" \
+                   "push  r23                     \n\t" \
+                   "push  r24                     \n\t" \
+                   "push  r25                     \n\t" \
+                   "push  r26                     \n\t" \
+                   "push  r27                     \n\t" \
+                   "push  r28                     \n\t" \
+                   "push  r29                     \n\t" \
+                   "push  r30                     \n\t" \
+                   "push  r31                     \n\t" \
+                   "lds   r26, pxCurrentTCB       \n\t" \
+                   "lds   r27, pxCurrentTCB + 1   \n\t" \
+                   "in    r0, __SP_L__            \n\t" \
+                   "st    x+, r0                  \n\t" \
+                   "in    r0, __SP_H__            \n\t" \
+                   "st    x+, r0                  \n\t" );
+
+/*
+ * Opposite to portSAVE_CONTEXT().  Interrupts will have been disabled during
+ * the context save so we can write to the stack pointer.
+ */
+
+#define portRESTORE_CONTEXT()                           \
+    asm volatile ( "lds   r26, pxCurrentTCB       \n\t" \
+                   "lds   r27, pxCurrentTCB + 1   \n\t" \
+                   "ld    r28, x+                 \n\t" \
+                   "out   __SP_L__, r28           \n\t" \
+                   "ld    r29, x+                 \n\t" \
+                   "out   __SP_H__, r29           \n\t" \
+                   "pop   r31                     \n\t" \
+                   "pop   r30                     \n\t" \
+                   "pop   r29                     \n\t" \
+                   "pop   r28                     \n\t" \
+                   "pop   r27                     \n\t" \
+                   "pop   r26                     \n\t" \
+                   "pop   r25                     \n\t" \
+                   "pop   r24                     \n\t" \
+                   "pop   r23                     \n\t" \
+                   "pop   r22                     \n\t" \
+                   "pop   r21                     \n\t" \
+                   "pop   r20                     \n\t" \
+                   "pop   r19                     \n\t" \
+                   "pop   r18                     \n\t" \
+                   "pop   r17                     \n\t" \
+                   "pop   r16                     \n\t" \
+                   "pop   r15                     \n\t" \
+                   "pop   r14                     \n\t" \
+                   "pop   r13                     \n\t" \
+                   "pop   r12                     \n\t" \
+                   "pop   r11                     \n\t" \
+                   "pop   r10                     \n\t" \
+                   "pop   r9                      \n\t" \
+                   "pop   r8                      \n\t" \
+                   "pop   r7                      \n\t" \
+                   "pop   r6                      \n\t" \
+                   "pop   r5                      \n\t" \
+                   "pop   r4                      \n\t" \
+                   "pop   r3                      \n\t" \
+                   "pop   r2                      \n\t" \
+                   "pop   r1                      \n\t" \
+                   "pop   r0                      \n\t" \
+                   "out   __RAMPZ__, r0           \n\t" \
+                   "pop   r0                      \n\t" \
+                   "out   __SREG__, r0            \n\t" \
+                   "pop   r0                      \n\t" );
+
+/*-----------------------------------------------------------*/
+
+/*
+ * Perform hardware setup to enable ticks from timer.
+ */
+static void prvSetupTimerInterrupt( void );
+/*-----------------------------------------------------------*/
+
+/*
+ * See header file for description.
+ */
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
+{
+    uint16_t usAddress;
+
+    /*lint -e950 -e611 -e923 Lint doesn't like this much - but nothing I can do about it. */
+
+    /* Place a few bytes of known values on the bottom of the stack.
+     * This is just useful for debugging. Uncomment if needed. */
+    /* *pxTopOfStack = 0x11; */
+    /* pxTopOfStack--; */
+    /* *pxTopOfStack = 0x22; */
+    /* pxTopOfStack--; */
+    /* *pxTopOfStack = 0x33; */
+    /* pxTopOfStack--; */
+
+    /* The start of the task code will be popped off the stack last, so place
+     * it on first. */
+    usAddress = ( uint16_t ) pxCode;
+    *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
+    pxTopOfStack--;
+
+    usAddress >>= 8;
+    *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
+    pxTopOfStack--;
+
+    /* Next simulate the stack as if after a call to portSAVE_CONTEXT().
+    *  portSAVE_CONTEXT places the flags on the stack immediately after r0
+    *  to ensure the interrupts get disabled as soon as possible, and so ensuring
+    *  the stack use is minimal should a context switch interrupt occur. */
+    *pxTopOfStack = ( StackType_t ) 0x00; /* R0 */
+    pxTopOfStack--;
+    *pxTopOfStack = portFLAGS_INT_ENABLED;
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x00; /* RAMPZ */
+    pxTopOfStack--;
+
+    /* Now the remaining registers.   The compiler expects R1 to be 0. */
+    *pxTopOfStack = ( StackType_t ) 0x00; /* R1 */
+
+    /* Leave R2 - R23 untouched */
+    pxTopOfStack -= 23;
+
+    /* Place the parameter on the stack in the expected location. */
+    usAddress = ( uint16_t ) pvParameters;
+    *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
+    pxTopOfStack--;
+
+    usAddress >>= 8;
+    *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
+
+    /* Leave register R26 - R31 untouched */
+    pxTopOfStack -= 7;
+
+    /*lint +e950 +e611 +e923 */
+
+    return pxTopOfStack;
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xPortStartScheduler( void )
+{
+    /* Setup the hardware to generate the tick. */
+    prvSetupTimerInterrupt();
+
+    /* Restore the context of the first task that is going to run. */
+    portRESTORE_CONTEXT();
+
+    /* Simulate a function call end as generated by the compiler.  We will now
+     * jump to the start of the task the context of which we have just restored. */
+    asm volatile ( "ret" );
+
+    /* Should not get here. */
+    return pdTRUE;
+}
+/*-----------------------------------------------------------*/
+
+void vPortEndScheduler( void )
+{
+    /* vPortEndScheduler is not implemented in this port. */
+}
+/*-----------------------------------------------------------*/
+
+/*
+ * Manual context switch.  The first thing we do is save the registers so we
+ * can use a naked attribute.
+ */
+void vPortYield( void ) __attribute__( ( naked ) );
+void vPortYield( void )
+{
+    portSAVE_CONTEXT();
+    vTaskSwitchContext();
+    portRESTORE_CONTEXT();
+    asm volatile ( "ret" );
+}
+/*-----------------------------------------------------------*/
+
+/*
+ * Manual context switch callable from ISRs. The first thing
+ * we do is save the registers so we can use a naked attribute.
+ */
+void vPortYieldFromISR( void ) __attribute__( ( naked ) );
+void vPortYieldFromISR( void )
+{
+    portSAVE_CONTEXT();
+    vTaskSwitchContext();
+    portRESTORE_CONTEXT();
+    asm volatile ( "reti" );
+}
+/*-----------------------------------------------------------*/
+
+/*
+ * Context switch function used by the tick.  This must be identical to
+ * vPortYield() from the call to vTaskSwitchContext() onwards.  The only
+ * difference from vPortYield() is the tick count is incremented as the
+ * call comes from the tick ISR.
+ */
+void vPortYieldFromTick( void ) __attribute__( ( naked ) );
+void vPortYieldFromTick( void )
+{
+    portSAVE_CONTEXT();
+
+    if( xTaskIncrementTick() != pdFALSE )
+    {
+        vTaskSwitchContext();
+    }
+
+    portRESTORE_CONTEXT();
+
+    asm volatile ( "reti" );
+}
+/*-----------------------------------------------------------*/
+
+/*
+ * Setup timer to generate a tick interrupt.
+ */
+static void prvSetupTimerInterrupt( void )
+{
+    TICK_init();
+}
+/*-----------------------------------------------------------*/
+
+#if configUSE_PREEMPTION == 1
+
+/*
+ * Tick ISR for preemptive scheduler.  We can use a naked attribute as
+ * the context is saved at the start of vPortYieldFromTick().  The tick
+ * count is incremented after the context is saved.
+ */
+    ISR( TICK_INT_vect, ISR_NAKED )
+    {
+        /* Clear tick interrupt flag. */
+        CLR_INT( INT_FLAGS, INT_MASK );
+
+        vPortYieldFromTick();
+
+        asm volatile ( "reti" );
+    }
+#else  /* if configUSE_PREEMPTION == 1 */
+
+/*
+ * Tick ISR for the cooperative scheduler.  All this does is increment the
+ * tick count.  We don't need to switch context, this can only be done by
+ * manual calls to taskYIELD();
+ */
+    ISR( TICK_INT_vect )
+    {
+        /* Clear tick interrupt flag. */
+        INT_FLAGS = INT_MASK;
+        xTaskIncrementTick();
+    }
+#endif /* if configUSE_PREEMPTION == 1 */
diff --git a/portable/GCC/AVR_AVRDx/porthardware.h b/portable/GCC/AVR_AVRDx/porthardware.h
new file mode 100644
index 000000000..7e670d933
--- /dev/null
+++ b/portable/GCC/AVR_AVRDx/porthardware.h
@@ -0,0 +1,109 @@
+#ifndef PORTHARDWARE_H
+#define PORTHARDWARE_H
+
+#include "FreeRTOSConfig.h"
+
+/*-----------------------------------------------------------*/
+
+#define CLR_INT( FLAG_REG, FLAG_MASK )                                         \
+    asm volatile (                                                             \
+        "push r16\n\t"                                                         \
+        "ldi r16, %1\n\t"                                                      \
+        "sts %0, r16\n\t"                                                      \
+        "pop r16\n\t"                                                          \
+        :                                                                      \
+        : "i" ( _SFR_MEM_ADDR( FLAG_REG ) ), "i" ( ( uint8_t ) ( FLAG_MASK ) ) \
+        );
+
+#if ( configUSE_TIMER_INSTANCE == 0 )
+
+    #define TICK_INT_vect    TCB0_INT_vect
+    #define INT_FLAGS        TCB0_INTFLAGS
+    #define INT_MASK         TCB_CAPT_bm
+
+    #define TICK_init()                                      \
+    {                                                        \
+        TCB0.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
+        TCB0.INTCTRL = TCB_CAPT_bm;                          \
+        TCB0.CTRLA = TCB_ENABLE_bm;                          \
+    }
+
+#elif ( configUSE_TIMER_INSTANCE == 1 )
+
+    #define TICK_INT_vect    TCB1_INT_vect
+    #define INT_FLAGS        TCB1_INTFLAGS
+    #define INT_MASK         TCB_CAPT_bm
+
+    #define TICK_init()                                      \
+    {                                                        \
+        TCB1.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
+        TCB1.INTCTRL = TCB_CAPT_bm;                          \
+        TCB1.CTRLA = TCB_ENABLE_bm;                          \
+    }
+
+#elif ( configUSE_TIMER_INSTANCE == 2 )
+
+    #define TICK_INT_vect    TCB2_INT_vect
+    #define INT_FLAGS        TCB2_INTFLAGS
+    #define INT_MASK         TCB_CAPT_bm
+
+    #define TICK_init()                                      \
+    {                                                        \
+        TCB2.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
+        TCB2.INTCTRL = TCB_CAPT_bm;                          \
+        TCB2.CTRLA = TCB_ENABLE_bm;                          \
+    }
+
+#elif ( configUSE_TIMER_INSTANCE == 3 )
+
+    #define TICK_INT_vect    TCB3_INT_vect
+    #define INT_FLAGS        TCB3_INTFLAGS
+    #define INT_MASK         TCB_CAPT_bm
+
+    #define TICK_init()                                      \
+    {                                                        \
+        TCB3.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
+        TCB3.INTCTRL = TCB_CAPT_bm;                          \
+        TCB3.CTRLA = TCB_ENABLE_bm;                          \
+    }
+
+#elif ( configUSE_TIMER_INSTANCE == 4 )
+
+    #define TICK_INT_vect    TCB4_INT_vect
+    #define INT_FLAGS        TCB4_INTFLAGS
+    #define INT_MASK         TCB_CAPT_bm
+
+    #define TICK_init()                                      \
+    {                                                        \
+        TCB4.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
+        TCB4.INTCTRL = TCB_CAPT_bm;                          \
+        TCB4.CTRLA = TCB_ENABLE_bm;                          \
+    }
+
+#elif ( configUSE_TIMER_INSTANCE == 5 )
+
+    #define TICK_INT_vect    RTC_CNT_vect
+    #define INT_FLAGS        RTC_INTFLAGS
+    #define INT_MASK         RTC_OVF_bm
+
+/* Hertz to period for RTC setup */
+    #define RTC_PERIOD_HZ( x )    ( 32768 * ( ( 1.0 / x ) ) )
+    #define TICK_init()                                        \
+    {                                                          \
+        while( RTC.STATUS > 0 ) {; }                           \
+        RTC.CTRLA = RTC_PRESCALER_DIV1_gc | 1 << RTC_RTCEN_bp; \
+        RTC.PER = RTC_PERIOD_HZ( configTICK_RATE_HZ );         \
+        RTC.INTCTRL |= 1 << RTC_OVF_bp;                        \
+    }
+
+#else /* if ( configUSE_TIMER_INSTANCE == 0 ) */
+    #undef TICK_INT_vect
+    #undef INT_FLAGS
+    #undef INT_MASK
+    #undef TICK_init()
+    #error Invalid timer setting.
+#endif /* if ( configUSE_TIMER_INSTANCE == 0 ) */
+
+/*-----------------------------------------------------------*/
+
+#endif /* PORTHARDWARE_H */
diff --git a/portable/GCC/AVR_AVRDx/portmacro.h b/portable/GCC/AVR_AVRDx/portmacro.h
new file mode 100644
index 000000000..4bad26367
--- /dev/null
+++ b/portable/GCC/AVR_AVRDx/portmacro.h
@@ -0,0 +1,109 @@
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef PORTMACRO_H
+#define PORTMACRO_H
+
+/* *INDENT-OFF* */
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
+/* *INDENT-ON* */
+
+/*-----------------------------------------------------------
+ * Port specific definitions.
+ *
+ * The settings in this file configure FreeRTOS correctly for the
+ * given hardware and compiler.
+ *
+ * These settings should not be altered.
+ *-----------------------------------------------------------
+ */
+
+/* Type definitions. */
+#define portCHAR                 char
+#define portFLOAT                float
+#define portDOUBLE               double
+#define portLONG                 long
+#define portSHORT                int
+#define portSTACK_TYPE           uint8_t
+#define portBASE_TYPE            char
+
+#define portPOINTER_SIZE_TYPE    uint16_t
+
+typedef portSTACK_TYPE   StackType_t;
+typedef signed char      BaseType_t;
+typedef unsigned char    UBaseType_t;
+
+#if ( configUSE_16_BIT_TICKS == 1 )
+    typedef uint16_t     TickType_t;
+    #define portMAX_DELAY    ( TickType_t ) 0xffff
+#else
+    typedef uint32_t     TickType_t;
+    #define portMAX_DELAY    ( TickType_t ) 0xffffffffUL
+#endif
+/*-----------------------------------------------------------*/
+
+/* Critical section management. */
+#define portENTER_CRITICAL()                     \
+    asm volatile ( "in __tmp_reg__, __SREG__" ); \
+    asm volatile ( "cli" );                      \
+    asm volatile ( "push __tmp_reg__" )
+
+#define portEXIT_CRITICAL()             \
+    asm volatile ( "pop __tmp_reg__" ); \
+    asm volatile ( "out __SREG__, __tmp_reg__" )
+
+#define portDISABLE_INTERRUPTS()    asm volatile ( "cli" ::);
+#define portENABLE_INTERRUPTS()     asm volatile ( "sei" ::);
+/*-----------------------------------------------------------*/
+
+/* Architecture specifics. */
+#define portSTACK_GROWTH      ( -1 )
+#define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+#define portBYTE_ALIGNMENT    1
+#define portNOP()    asm volatile ( "nop" );
+/*-----------------------------------------------------------*/
+
+/* Kernel utilities. */
+extern void vPortYield( void ) __attribute__( ( naked ) );
+#define portYIELD()             vPortYield()
+
+extern void vPortYieldFromISR( void ) __attribute__( ( naked ) );
+#define portYIELD_FROM_ISR()    vPortYieldFromISR()
+/*-----------------------------------------------------------*/
+
+/* Task function macros as described on the FreeRTOS.org WEB site. */
+#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+#define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
+
+/* *INDENT-OFF* */
+    #ifdef __cplusplus
+        }
+    #endif
+/* *INDENT-ON* */
+
+#endif /* PORTMACRO_H */
diff --git a/portable/GCC/AVR_Mega0/port.c b/portable/GCC/AVR_Mega0/port.c
new file mode 100644
index 000000000..16d5805c2
--- /dev/null
+++ b/portable/GCC/AVR_Mega0/port.c
@@ -0,0 +1,339 @@
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#include 
+
+#include 
+#include "porthardware.h"
+#include "FreeRTOS.h"
+#include "task.h"
+
+/*-----------------------------------------------------------
+* Implementation of functions defined in portable.h for the AVR port.
+*----------------------------------------------------------*/
+
+/* Start tasks with interrupts enables. */
+#define portFLAGS_INT_ENABLED    ( ( StackType_t ) 0x80 )
+
+/*-----------------------------------------------------------*/
+
+/* We require the address of the pxCurrentTCB variable, but don't want to know
+ * any details of its type. */
+typedef void RTOS_TCB_t;
+extern volatile RTOS_TCB_t * volatile pxCurrentTCB;
+
+/*-----------------------------------------------------------*/
+
+/*
+ * Macro to save all the general purpose registers, the save the stack pointer
+ * into the TCB.
+ *
+ * The first thing we do is save the flags then disable interrupts.  This is to
+ * guard our stack against having a context switch interrupt after we have already
+ * pushed the registers onto the stack - causing the 32 registers to be on the
+ * stack twice.
+ *
+ * r1 is set to zero as the compiler expects it to be thus, however some
+ * of the math routines make use of R1.
+ *
+ * The interrupts will have been disabled during the call to portSAVE_CONTEXT()
+ * so we need not worry about reading/writing to the stack pointer.
+ */
+
+#define portSAVE_CONTEXT()                              \
+    asm volatile ( "push  r0                      \n\t" \
+                   "in    r0, __SREG__            \n\t" \
+                   "cli                           \n\t" \
+                   "push  r0                      \n\t" \
+                   "push  r1                      \n\t" \
+                   "clr   r1                      \n\t" \
+                   "push  r2                      \n\t" \
+                   "push  r3                      \n\t" \
+                   "push  r4                      \n\t" \
+                   "push  r5                      \n\t" \
+                   "push  r6                      \n\t" \
+                   "push  r7                      \n\t" \
+                   "push  r8                      \n\t" \
+                   "push  r9                      \n\t" \
+                   "push  r10                     \n\t" \
+                   "push  r11                     \n\t" \
+                   "push  r12                     \n\t" \
+                   "push  r13                     \n\t" \
+                   "push  r14                     \n\t" \
+                   "push  r15                     \n\t" \
+                   "push  r16                     \n\t" \
+                   "push  r17                     \n\t" \
+                   "push  r18                     \n\t" \
+                   "push  r19                     \n\t" \
+                   "push  r20                     \n\t" \
+                   "push  r21                     \n\t" \
+                   "push  r22                     \n\t" \
+                   "push  r23                     \n\t" \
+                   "push  r24                     \n\t" \
+                   "push  r25                     \n\t" \
+                   "push  r26                     \n\t" \
+                   "push  r27                     \n\t" \
+                   "push  r28                     \n\t" \
+                   "push  r29                     \n\t" \
+                   "push  r30                     \n\t" \
+                   "push  r31                     \n\t" \
+                   "lds   r26, pxCurrentTCB       \n\t" \
+                   "lds   r27, pxCurrentTCB + 1   \n\t" \
+                   "in    r0, __SP_L__            \n\t" \
+                   "st    x+, r0                  \n\t" \
+                   "in    r0, __SP_H__            \n\t" \
+                   "st    x+, r0                  \n\t" );
+
+/*
+ * Opposite to portSAVE_CONTEXT().  Interrupts will have been disabled during
+ * the context save so we can write to the stack pointer.
+ */
+
+#define portRESTORE_CONTEXT()                           \
+    asm volatile ( "lds   r26, pxCurrentTCB       \n\t" \
+                   "lds   r27, pxCurrentTCB + 1   \n\t" \
+                   "ld    r28, x+                 \n\t" \
+                   "out   __SP_L__, r28           \n\t" \
+                   "ld    r29, x+                 \n\t" \
+                   "out   __SP_H__, r29           \n\t" \
+                   "pop   r31                     \n\t" \
+                   "pop   r30                     \n\t" \
+                   "pop   r29                     \n\t" \
+                   "pop   r28                     \n\t" \
+                   "pop   r27                     \n\t" \
+                   "pop   r26                     \n\t" \
+                   "pop   r25                     \n\t" \
+                   "pop   r24                     \n\t" \
+                   "pop   r23                     \n\t" \
+                   "pop   r22                     \n\t" \
+                   "pop   r21                     \n\t" \
+                   "pop   r20                     \n\t" \
+                   "pop   r19                     \n\t" \
+                   "pop   r18                     \n\t" \
+                   "pop   r17                     \n\t" \
+                   "pop   r16                     \n\t" \
+                   "pop   r15                     \n\t" \
+                   "pop   r14                     \n\t" \
+                   "pop   r13                     \n\t" \
+                   "pop   r12                     \n\t" \
+                   "pop   r11                     \n\t" \
+                   "pop   r10                     \n\t" \
+                   "pop   r9                      \n\t" \
+                   "pop   r8                      \n\t" \
+                   "pop   r7                      \n\t" \
+                   "pop   r6                      \n\t" \
+                   "pop   r5                      \n\t" \
+                   "pop   r4                      \n\t" \
+                   "pop   r3                      \n\t" \
+                   "pop   r2                      \n\t" \
+                   "pop   r1                      \n\t" \
+                   "pop   r0                      \n\t" \
+                   "out   __SREG__, r0            \n\t" \
+                   "pop   r0                      \n\t" );
+
+/*-----------------------------------------------------------*/
+
+/*
+ * Perform hardware setup to enable ticks from timer.
+ */
+static void prvSetupTimerInterrupt( void );
+/*-----------------------------------------------------------*/
+
+/*
+ * See header file for description.
+ */
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
+{
+    uint16_t usAddress;
+
+    /*lint -e950 -e611 -e923 Lint doesn't like this much - but nothing I can do about it. */
+
+    /* Place a few bytes of known values on the bottom of the stack.
+     * This is just useful for debugging. Uncomment if needed. */
+    /* *pxTopOfStack = 0x11; */
+    /* pxTopOfStack--; */
+    /* *pxTopOfStack = 0x22; */
+    /* pxTopOfStack--; */
+    /* *pxTopOfStack = 0x33; */
+    /* pxTopOfStack--; */
+
+    /* The start of the task code will be popped off the stack last, so place
+     * it on first. */
+    usAddress = ( uint16_t ) pxCode;
+    *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
+    pxTopOfStack--;
+
+    usAddress >>= 8;
+    *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
+    pxTopOfStack--;
+
+    /* Next simulate the stack as if after a call to portSAVE_CONTEXT().
+    *  portSAVE_CONTEXT places the flags on the stack immediately after r0
+    *  to ensure the interrupts get disabled as soon as possible, and so ensuring
+    *  the stack use is minimal should a context switch interrupt occur. */
+    *pxTopOfStack = ( StackType_t ) 0x00; /* R0 */
+    pxTopOfStack--;
+    *pxTopOfStack = portFLAGS_INT_ENABLED;
+    pxTopOfStack--;
+
+    /* Now the remaining registers.   The compiler expects R1 to be 0. */
+    *pxTopOfStack = ( StackType_t ) 0x00; /* R1 */
+
+    /* Leave R2 - R23 untouched */
+    pxTopOfStack -= 23;
+
+    /* Place the parameter on the stack in the expected location. */
+    usAddress = ( uint16_t ) pvParameters;
+    *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
+    pxTopOfStack--;
+
+    usAddress >>= 8;
+    *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
+
+    /* Leave register R26 - R31 untouched */
+    pxTopOfStack -= 7;
+
+    /*lint +e950 +e611 +e923 */
+
+    return pxTopOfStack;
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xPortStartScheduler( void )
+{
+    /* Setup the hardware to generate the tick. */
+    prvSetupTimerInterrupt();
+
+    /* Restore the context of the first task that is going to run. */
+    portRESTORE_CONTEXT();
+
+    /* Simulate a function call end as generated by the compiler.  We will now
+     * jump to the start of the task the context of which we have just restored. */
+    asm volatile ( "ret" );
+
+    /* Should not get here. */
+    return pdTRUE;
+}
+/*-----------------------------------------------------------*/
+
+void vPortEndScheduler( void )
+{
+    /* vPortEndScheduler is not implemented in this port. */
+}
+/*-----------------------------------------------------------*/
+
+/*
+ * Manual context switch.  The first thing we do is save the registers so we
+ * can use a naked attribute.
+ */
+void vPortYield( void ) __attribute__( ( naked ) );
+void vPortYield( void )
+{
+    portSAVE_CONTEXT();
+    vTaskSwitchContext();
+    portRESTORE_CONTEXT();
+    asm volatile ( "ret" );
+}
+/*-----------------------------------------------------------*/
+
+/*
+ * Manual context switch callable from ISRs. The first thing
+ * we do is save the registers so we can use a naked attribute.
+ */
+void vPortYieldFromISR( void ) __attribute__( ( naked ) );
+void vPortYieldFromISR( void )
+{
+    portSAVE_CONTEXT();
+    vTaskSwitchContext();
+    portRESTORE_CONTEXT();
+    asm volatile ( "reti" );
+}
+/*-----------------------------------------------------------*/
+
+/*
+ * Context switch function used by the tick.  This must be identical to
+ * vPortYield() from the call to vTaskSwitchContext() onwards.  The only
+ * difference from vPortYield() is the tick count is incremented as the
+ * call comes from the tick ISR.
+ */
+void vPortYieldFromTick( void ) __attribute__( ( naked ) );
+void vPortYieldFromTick( void )
+{
+    portSAVE_CONTEXT();
+
+    if( xTaskIncrementTick() != pdFALSE )
+    {
+        vTaskSwitchContext();
+    }
+
+    portRESTORE_CONTEXT();
+
+    asm volatile ( "reti" );
+}
+/*-----------------------------------------------------------*/
+
+/*
+ * Setup timer to generate a tick interrupt.
+ */
+static void prvSetupTimerInterrupt( void )
+{
+    TICK_init();
+}
+/*-----------------------------------------------------------*/
+
+#if configUSE_PREEMPTION == 1
+
+/*
+ * Tick ISR for preemptive scheduler.  We can use a naked attribute as
+ * the context is saved at the start of vPortYieldFromTick().  The tick
+ * count is incremented after the context is saved.
+ */
+    ISR( TICK_INT_vect, ISR_NAKED )
+    {
+        /* Clear tick interrupt flag. */
+        CLR_INT( INT_FLAGS, INT_MASK );
+
+        vPortYieldFromTick();
+
+        asm volatile ( "reti" );
+    }
+#else  /* if configUSE_PREEMPTION == 1 */
+
+/*
+ * Tick ISR for the cooperative scheduler.  All this does is increment the
+ * tick count.  We don't need to switch context, this can only be done by
+ * manual calls to taskYIELD();
+ */
+    ISR( TICK_INT_vect )
+    {
+        /* Clear tick interrupt flag. */
+        INT_FLAGS = INT_MASK;
+        xTaskIncrementTick();
+    }
+#endif /* if configUSE_PREEMPTION == 1 */
diff --git a/portable/GCC/AVR_Mega0/porthardware.h b/portable/GCC/AVR_Mega0/porthardware.h
new file mode 100644
index 000000000..8d4f1bcc3
--- /dev/null
+++ b/portable/GCC/AVR_Mega0/porthardware.h
@@ -0,0 +1,96 @@
+#ifndef PORTHARDWARE_H
+#define PORTHARDWARE_H
+
+#include "FreeRTOSConfig.h"
+
+/*-----------------------------------------------------------*/
+
+#define CLR_INT( FLAG_REG, FLAG_MASK )                                         \
+    asm volatile (                                                             \
+        "push r16\n\t"                                                         \
+        "ldi r16, %1\n\t"                                                      \
+        "sts %0, r16\n\t"                                                      \
+        "pop r16\n\t"                                                          \
+        :                                                                      \
+        : "i" ( _SFR_MEM_ADDR( FLAG_REG ) ), "i" ( ( uint8_t ) ( FLAG_MASK ) ) \
+        );
+
+#if ( configUSE_TIMER_INSTANCE == 0 )
+
+    #define TICK_INT_vect    TCB0_INT_vect
+    #define INT_FLAGS        TCB0_INTFLAGS
+    #define INT_MASK         TCB_CAPT_bm
+
+    #define TICK_init()                                      \
+    {                                                        \
+        TCB0.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
+        TCB0.INTCTRL = TCB_CAPT_bm;                          \
+        TCB0.CTRLA = TCB_ENABLE_bm;                          \
+    }
+
+#elif ( configUSE_TIMER_INSTANCE == 1 )
+
+    #define TICK_INT_vect    TCB1_INT_vect
+    #define INT_FLAGS        TCB1_INTFLAGS
+    #define INT_MASK         TCB_CAPT_bm
+
+    #define TICK_init()                                      \
+    {                                                        \
+        TCB1.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
+        TCB1.INTCTRL = TCB_CAPT_bm;                          \
+        TCB1.CTRLA = TCB_ENABLE_bm;                          \
+    }
+
+#elif ( configUSE_TIMER_INSTANCE == 2 )
+
+    #define TICK_INT_vect    TCB2_INT_vect
+    #define INT_FLAGS        TCB2_INTFLAGS
+    #define INT_MASK         TCB_CAPT_bm
+
+    #define TICK_init()                                      \
+    {                                                        \
+        TCB2.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
+        TCB2.INTCTRL = TCB_CAPT_bm;                          \
+        TCB2.CTRLA = TCB_ENABLE_bm;                          \
+    }
+
+#elif ( configUSE_TIMER_INSTANCE == 3 )
+
+    #define TICK_INT_vect    TCB3_INT_vect
+    #define INT_FLAGS        TCB3_INTFLAGS
+    #define INT_MASK         TCB_CAPT_bm
+
+    #define TICK_init()                                      \
+    {                                                        \
+        TCB3.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
+        TCB3.INTCTRL = TCB_CAPT_bm;                          \
+        TCB3.CTRLA = TCB_ENABLE_bm;                          \
+    }
+
+#elif ( configUSE_TIMER_INSTANCE == 4 )
+
+    #define TICK_INT_vect    RTC_CNT_vect
+    #define INT_FLAGS        RTC_INTFLAGS
+    #define INT_MASK         RTC_OVF_bm
+
+/* Hertz to period for RTC setup */
+    #define RTC_PERIOD_HZ( x )    ( 32768 * ( ( 1.0 / x ) ) )
+    #define TICK_init()                                        \
+    {                                                          \
+        while( RTC.STATUS > 0 ) {; }                           \
+        RTC.CTRLA = RTC_PRESCALER_DIV1_gc | 1 << RTC_RTCEN_bp; \
+        RTC.PER = RTC_PERIOD_HZ( configTICK_RATE_HZ );         \
+        RTC.INTCTRL |= 1 << RTC_OVF_bp;                        \
+    }
+
+#else /* if ( configUSE_TIMER_INSTANCE == 0 ) */
+    #undef TICK_INT_vect
+    #undef INT_FLAGS
+    #undef INT_MASK
+    #undef TICK_init()
+    #error Invalid timer setting.
+#endif /* if ( configUSE_TIMER_INSTANCE == 0 ) */
+
+/*-----------------------------------------------------------*/
+
+#endif /* PORTHARDWARE_H */
diff --git a/portable/GCC/AVR_Mega0/portmacro.h b/portable/GCC/AVR_Mega0/portmacro.h
new file mode 100644
index 000000000..9e653f795
--- /dev/null
+++ b/portable/GCC/AVR_Mega0/portmacro.h
@@ -0,0 +1,109 @@
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef PORTMACRO_H
+#define PORTMACRO_H
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/*-----------------------------------------------------------
+ * Port specific definitions.
+ *
+ * The settings in this file configure FreeRTOS correctly for the
+ * given hardware and compiler.
+ *
+ * These settings should not be altered.
+ *-----------------------------------------------------------
+ */
+
+/* Type definitions. */
+#define portCHAR                 char
+#define portFLOAT                float
+#define portDOUBLE               double
+#define portLONG                 long
+#define portSHORT                int
+#define portSTACK_TYPE           uint8_t
+#define portBASE_TYPE            char
+
+#define portPOINTER_SIZE_TYPE    uint16_t
+
+typedef portSTACK_TYPE   StackType_t;
+typedef signed char      BaseType_t;
+typedef unsigned char    UBaseType_t;
+
+#if ( configUSE_16_BIT_TICKS == 1 )
+    typedef uint16_t     TickType_t;
+    #define portMAX_DELAY    ( TickType_t ) 0xffff
+#else
+    typedef uint32_t     TickType_t;
+    #define portMAX_DELAY    ( TickType_t ) 0xffffffffUL
+#endif
+/*-----------------------------------------------------------*/
+
+/* Critical section management. */
+#define portENTER_CRITICAL()                     \
+    asm volatile ( "in __tmp_reg__, __SREG__" ); \
+    asm volatile ( "cli" );                      \
+    asm volatile ( "push __tmp_reg__" )
+
+#define portEXIT_CRITICAL()             \
+    asm volatile ( "pop __tmp_reg__" ); \
+    asm volatile ( "out __SREG__, __tmp_reg__" )
+
+#define portDISABLE_INTERRUPTS()    asm volatile ( "cli" ::);
+#define portENABLE_INTERRUPTS()     asm volatile ( "sei" ::);
+/*-----------------------------------------------------------*/
+
+/* Architecture specifics. */
+#define portSTACK_GROWTH      ( -1 )
+#define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+#define portBYTE_ALIGNMENT    1
+#define portNOP()    asm volatile ( "nop" );
+/*-----------------------------------------------------------*/
+
+/* Kernel utilities. */
+extern void vPortYield( void ) __attribute__( ( naked ) );
+#define portYIELD()             vPortYield()
+
+extern void vPortYieldFromISR( void ) __attribute__( ( naked ) );
+#define portYIELD_FROM_ISR()    vPortYieldFromISR()
+/*-----------------------------------------------------------*/
+
+/* Task function macros as described on the FreeRTOS.org WEB site. */
+#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+#define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+
+#endif /* PORTMACRO_H */
diff --git a/portable/GCC/CORTUS_APS3/port.c b/portable/GCC/CORTUS_APS3/port.c
index b6c55a372..bdf4c1c15 100644
--- a/portable/GCC/CORTUS_APS3/port.c
+++ b/portable/GCC/CORTUS_APS3/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/CORTUS_APS3/portmacro.h b/portable/GCC/CORTUS_APS3/portmacro.h
index dbbe3a680..1af87f347 100644
--- a/portable/GCC/CORTUS_APS3/portmacro.h
+++ b/portable/GCC/CORTUS_APS3/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ColdFire_V2/port.c b/portable/GCC/ColdFire_V2/port.c
index 3d7e52980..fe914b592 100644
--- a/portable/GCC/ColdFire_V2/port.c
+++ b/portable/GCC/ColdFire_V2/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ColdFire_V2/portasm.S b/portable/GCC/ColdFire_V2/portasm.S
index e6067ca1e..7e6267f13 100644
--- a/portable/GCC/ColdFire_V2/portasm.S
+++ b/portable/GCC/ColdFire_V2/portasm.S
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/ColdFire_V2/portmacro.h b/portable/GCC/ColdFire_V2/portmacro.h
index ad46a61fe..446141ad8 100644
--- a/portable/GCC/ColdFire_V2/portmacro.h
+++ b/portable/GCC/ColdFire_V2/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/H8S2329/port.c b/portable/GCC/H8S2329/port.c
index 6f49b1416..d47185408 100644
--- a/portable/GCC/H8S2329/port.c
+++ b/portable/GCC/H8S2329/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/H8S2329/portmacro.h b/portable/GCC/H8S2329/portmacro.h
index 48fdc2c37..116b04b0d 100644
--- a/portable/GCC/H8S2329/portmacro.h
+++ b/portable/GCC/H8S2329/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/HCS12/port.c b/portable/GCC/HCS12/port.c
index 55d940258..098b18408 100644
--- a/portable/GCC/HCS12/port.c
+++ b/portable/GCC/HCS12/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/HCS12/portmacro.h b/portable/GCC/HCS12/portmacro.h
index d7ccb89d1..452ceb58c 100644
--- a/portable/GCC/HCS12/portmacro.h
+++ b/portable/GCC/HCS12/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/IA32_flat/ISR_Support.h b/portable/GCC/IA32_flat/ISR_Support.h
index 0222f4904..55bc595a9 100644
--- a/portable/GCC/IA32_flat/ISR_Support.h
+++ b/portable/GCC/IA32_flat/ISR_Support.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/IA32_flat/port.c b/portable/GCC/IA32_flat/port.c
index 1a20c8ea9..834ac1a07 100644
--- a/portable/GCC/IA32_flat/port.c
+++ b/portable/GCC/IA32_flat/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/IA32_flat/portASM.S b/portable/GCC/IA32_flat/portASM.S
index 2759d8428..90cf09777 100644
--- a/portable/GCC/IA32_flat/portASM.S
+++ b/portable/GCC/IA32_flat/portASM.S
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/IA32_flat/portmacro.h b/portable/GCC/IA32_flat/portmacro.h
index 012207f90..5b25f8d9d 100644
--- a/portable/GCC/IA32_flat/portmacro.h
+++ b/portable/GCC/IA32_flat/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/MCF5235/port.c b/portable/GCC/MCF5235/port.c
index 092ea51de..9c7e84e1c 100644
--- a/portable/GCC/MCF5235/port.c
+++ b/portable/GCC/MCF5235/port.c
@@ -21,19 +21,19 @@
     A special exception to the GPL can be applied should you wish to distribute
     a combined work that includes FreeRTOS, without being obliged to provide
     the source code for any proprietary components.  See the licensing section
-    of http://www.FreeRTOS.org for full details of how and when the exception
+    of https://www.FreeRTOS.org for full details of how and when the exception
     can be applied.
 
     ***************************************************************************
     ***************************************************************************
     *                                                                         *
-    * Get the FreeRTOS eBook!  See http://www.FreeRTOS.org/Documentation      *
-	*                                                                         *
-	* This is a concise, step by step, 'hands on' guide that describes both   *
-	* general multitasking concepts and FreeRTOS specifics. It presents and   *
-	* explains numerous examples that are written using the FreeRTOS API.     *
-	* Full source code for all the examples is provided in an accompanying    *
-	* .zip file.                                                              *
+    * Get the FreeRTOS eBook!  See https://www.FreeRTOS.org/Documentation     *
+    *                                                                         *
+    * This is a concise, step by step, 'hands on' guide that describes both   *
+    * general multitasking concepts and FreeRTOS specifics. It presents and   *
+    * explains numerous examples that are written using the FreeRTOS API.     *
+    * Full source code for all the examples is provided in an accompanying    *
+    * .zip file.                                                              *
     *                                                                         *
     ***************************************************************************
     ***************************************************************************
@@ -41,14 +41,14 @@
 	Please ensure to read the configuration and relevant port sections of the
 	online documentation.
 
-	http://www.FreeRTOS.org - Documentation, latest information, license and 
+	https://www.FreeRTOS.org - Documentation, latest information, license and 
 	contact details.
 
-	http://www.SafeRTOS.com - A version that is certified for use in safety 
-	critical systems.
+        https://www.highintegritysystems.com/safertos/ - A version that is
+        certified for use in safety critical systems.
 
-	http://www.OpenRTOS.com - Commercial support, development, porting, 
-	licensing and training services.
+        https://www.highintegritysystems.com/openrtos/ - Commercial support,
+        development, porting, licensing and training services.
 */
 
 #include 
diff --git a/portable/GCC/MCF5235/portmacro.h b/portable/GCC/MCF5235/portmacro.h
index ea2598bfe..065667ff2 100644
--- a/portable/GCC/MCF5235/portmacro.h
+++ b/portable/GCC/MCF5235/portmacro.h
@@ -21,13 +21,13 @@
     A special exception to the GPL can be applied should you wish to distribute
     a combined work that includes FreeRTOS, without being obliged to provide
     the source code for any proprietary components.  See the licensing section
-    of http://www.FreeRTOS.org for full details of how and when the exception
+    of https://www.FreeRTOS.org for full details of how and when the exception
     can be applied.
 
     ***************************************************************************
     ***************************************************************************
     *                                                                         *
-    * Get the FreeRTOS eBook!  See http://www.FreeRTOS.org/Documentation      *
+    * Get the FreeRTOS eBook!  See https://www.FreeRTOS.org/Documentation      *
 	*                                                                         *
 	* This is a concise, step by step, 'hands on' guide that describes both   *
 	* general multitasking concepts and FreeRTOS specifics. It presents and   *
@@ -41,13 +41,14 @@
 	Please ensure to read the configuration and relevant port sections of the
 	online documentation.
 
-	http://www.FreeRTOS.org - Documentation, latest information, license and
+	https://www.FreeRTOS.org - Documentation, latest information, license and
 	contact details.
 
-	http://www.SafeRTOS.com - A version that is certified for use in safety
-	critical systems.
+        https://www.highintegritysystems.com/safertos/ - A version that is
+        certified for use in safety critical systems.
 
-	http://www.OpenRTOS.com - Commercial support, development, porting,
+        https://www.highintegritysystems.com/openrtos/ - Commercial support,
+        development, porting,
 	licensing and training services.
 */
 
diff --git a/portable/GCC/MSP430F449/port.c b/portable/GCC/MSP430F449/port.c
index 59b8fb605..6b745eaa9 100644
--- a/portable/GCC/MSP430F449/port.c
+++ b/portable/GCC/MSP430F449/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/MSP430F449/portmacro.h b/portable/GCC/MSP430F449/portmacro.h
index 8dda84415..c4e7f64e4 100644
--- a/portable/GCC/MSP430F449/portmacro.h
+++ b/portable/GCC/MSP430F449/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/MicroBlaze/port.c b/portable/GCC/MicroBlaze/port.c
index a0192b3a2..6876b2874 100644
--- a/portable/GCC/MicroBlaze/port.c
+++ b/portable/GCC/MicroBlaze/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/MicroBlaze/portasm.s b/portable/GCC/MicroBlaze/portasm.s
index 529dbb25b..18529d3a9 100644
--- a/portable/GCC/MicroBlaze/portasm.s
+++ b/portable/GCC/MicroBlaze/portasm.s
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/MicroBlaze/portmacro.h b/portable/GCC/MicroBlaze/portmacro.h
index 948902057..03b25f04d 100644
--- a/portable/GCC/MicroBlaze/portmacro.h
+++ b/portable/GCC/MicroBlaze/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/MicroBlazeV8/port.c b/portable/GCC/MicroBlazeV8/port.c
index bd70f2a80..c5797e63f 100644
--- a/portable/GCC/MicroBlazeV8/port.c
+++ b/portable/GCC/MicroBlazeV8/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/MicroBlazeV8/port_exceptions.c b/portable/GCC/MicroBlazeV8/port_exceptions.c
index ca2a1acf6..41e6fd0db 100644
--- a/portable/GCC/MicroBlazeV8/port_exceptions.c
+++ b/portable/GCC/MicroBlazeV8/port_exceptions.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/MicroBlazeV8/portasm.S b/portable/GCC/MicroBlazeV8/portasm.S
index 50e44e83f..f7455b530 100644
--- a/portable/GCC/MicroBlazeV8/portasm.S
+++ b/portable/GCC/MicroBlazeV8/portasm.S
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/MicroBlazeV8/portmacro.h b/portable/GCC/MicroBlazeV8/portmacro.h
index 19b528868..993a30207 100644
--- a/portable/GCC/MicroBlazeV8/portmacro.h
+++ b/portable/GCC/MicroBlazeV8/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/MicroBlazeV9/port.c b/portable/GCC/MicroBlazeV9/port.c
index 943615d06..8c57c2908 100644
--- a/portable/GCC/MicroBlazeV9/port.c
+++ b/portable/GCC/MicroBlazeV9/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/MicroBlazeV9/port_exceptions.c b/portable/GCC/MicroBlazeV9/port_exceptions.c
index ca2a1acf6..41e6fd0db 100644
--- a/portable/GCC/MicroBlazeV9/port_exceptions.c
+++ b/portable/GCC/MicroBlazeV9/port_exceptions.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/MicroBlazeV9/portasm.S b/portable/GCC/MicroBlazeV9/portasm.S
index 50e44e83f..f7455b530 100644
--- a/portable/GCC/MicroBlazeV9/portasm.S
+++ b/portable/GCC/MicroBlazeV9/portasm.S
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/MicroBlazeV9/portmacro.h b/portable/GCC/MicroBlazeV9/portmacro.h
index 19b528868..993a30207 100644
--- a/portable/GCC/MicroBlazeV9/portmacro.h
+++ b/portable/GCC/MicroBlazeV9/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/NiosII/port.c b/portable/GCC/NiosII/port.c
index 57b53378d..34a1153e4 100644
--- a/portable/GCC/NiosII/port.c
+++ b/portable/GCC/NiosII/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/NiosII/port_asm.S b/portable/GCC/NiosII/port_asm.S
index 265ffc110..a072691fa 100644
--- a/portable/GCC/NiosII/port_asm.S
+++ b/portable/GCC/NiosII/port_asm.S
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/NiosII/portmacro.h b/portable/GCC/NiosII/portmacro.h
index 3695fef19..643733474 100644
--- a/portable/GCC/NiosII/portmacro.h
+++ b/portable/GCC/NiosII/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/PPC405_Xilinx/FPU_Macros.h b/portable/GCC/PPC405_Xilinx/FPU_Macros.h
index dd8ddee42..5e1d91841 100644
--- a/portable/GCC/PPC405_Xilinx/FPU_Macros.h
+++ b/portable/GCC/PPC405_Xilinx/FPU_Macros.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/PPC405_Xilinx/port.c b/portable/GCC/PPC405_Xilinx/port.c
index 286e9377c..86018e4c9 100644
--- a/portable/GCC/PPC405_Xilinx/port.c
+++ b/portable/GCC/PPC405_Xilinx/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/PPC405_Xilinx/portasm.S b/portable/GCC/PPC405_Xilinx/portasm.S
index 7e5e09d28..464359add 100644
--- a/portable/GCC/PPC405_Xilinx/portasm.S
+++ b/portable/GCC/PPC405_Xilinx/portasm.S
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/PPC405_Xilinx/portmacro.h b/portable/GCC/PPC405_Xilinx/portmacro.h
index 0a53e7100..90797b763 100644
--- a/portable/GCC/PPC405_Xilinx/portmacro.h
+++ b/portable/GCC/PPC405_Xilinx/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/PPC440_Xilinx/FPU_Macros.h b/portable/GCC/PPC440_Xilinx/FPU_Macros.h
index dd8ddee42..5e1d91841 100644
--- a/portable/GCC/PPC440_Xilinx/FPU_Macros.h
+++ b/portable/GCC/PPC440_Xilinx/FPU_Macros.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/PPC440_Xilinx/port.c b/portable/GCC/PPC440_Xilinx/port.c
index 2b104a5d4..7429a6082 100644
--- a/portable/GCC/PPC440_Xilinx/port.c
+++ b/portable/GCC/PPC440_Xilinx/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/PPC440_Xilinx/portasm.S b/portable/GCC/PPC440_Xilinx/portasm.S
index 7e5e09d28..464359add 100644
--- a/portable/GCC/PPC440_Xilinx/portasm.S
+++ b/portable/GCC/PPC440_Xilinx/portasm.S
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/PPC440_Xilinx/portmacro.h b/portable/GCC/PPC440_Xilinx/portmacro.h
index 0a53e7100..90797b763 100644
--- a/portable/GCC/PPC440_Xilinx/portmacro.h
+++ b/portable/GCC/PPC440_Xilinx/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/RISC-V/Documentation.url b/portable/GCC/RISC-V/Documentation.url
index 7cb013afb..c7819d55b 100644
--- a/portable/GCC/RISC-V/Documentation.url
+++ b/portable/GCC/RISC-V/Documentation.url
@@ -2,4 +2,4 @@
 Prop3=19,11
 [InternetShortcut]
 IDList=
-URL=https://freertos.org/Using-FreeRTOS-on-RISC-V.html
+URL=https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
diff --git a/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h
index 8cd6cdb21..91c762db7 100644
--- a/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h
+++ b/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -21,8 +21,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h
index be1908a2e..054ba7a27 100644
--- a/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h
+++ b/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/RISC-V/port.c b/portable/GCC/RISC-V/port.c
index 9525ff6d6..8a53c07bb 100644
--- a/portable/GCC/RISC-V/port.c
+++ b/portable/GCC/RISC-V/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -38,15 +38,15 @@
 #include "string.h"
 
 #ifdef configCLINT_BASE_ADDRESS
-	#warning The configCLINT_BASE_ADDRESS constant has been deprecated.  configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS are currently being derived from the (possibly 0) configCLINT_BASE_ADDRESS setting.  Please update to define configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS dirctly in place of configCLINT_BASE_ADDRESS.  See https://www.freertos.org/Using-FreeRTOS-on-RISC-V.html
+	#warning The configCLINT_BASE_ADDRESS constant has been deprecated.  configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS are currently being derived from the (possibly 0) configCLINT_BASE_ADDRESS setting.  Please update to define configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS dirctly in place of configCLINT_BASE_ADDRESS.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
 #endif
 
 #ifndef configMTIME_BASE_ADDRESS
-	#warning configMTIME_BASE_ADDRESS must be defined in FreeRTOSConfig.h.  If the target chip includes a memory-mapped mtime register then set configMTIME_BASE_ADDRESS to the mapped address.  Otherwise set configMTIME_BASE_ADDRESS to 0.  See https://www.freertos.org/Using-FreeRTOS-on-RISC-V.html
+	#warning configMTIME_BASE_ADDRESS must be defined in FreeRTOSConfig.h.  If the target chip includes a memory-mapped mtime register then set configMTIME_BASE_ADDRESS to the mapped address.  Otherwise set configMTIME_BASE_ADDRESS to 0.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
 #endif
 
 #ifndef configMTIMECMP_BASE_ADDRESS
-	#warning configMTIMECMP_BASE_ADDRESS must be defined in FreeRTOSConfig.h.  If the target chip includes a memory-mapped mtimecmp register then set configMTIMECMP_BASE_ADDRESS to the mapped address.  Otherwise set configMTIMECMP_BASE_ADDRESS to 0.  See https://www.freertos.org/Using-FreeRTOS-on-RISC-V.html
+	#warning configMTIMECMP_BASE_ADDRESS must be defined in FreeRTOSConfig.h.  If the target chip includes a memory-mapped mtimecmp register then set configMTIMECMP_BASE_ADDRESS to the mapped address.  Otherwise set configMTIMECMP_BASE_ADDRESS to 0.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
 #endif
 
 /* Let the user override the pre-loading of the initial LR with the address of
diff --git a/portable/GCC/RISC-V/portASM.S b/portable/GCC/RISC-V/portASM.S
index b9c56a693..3aaa89baf 100644
--- a/portable/GCC/RISC-V/portASM.S
+++ b/portable/GCC/RISC-V/portASM.S
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -72,21 +72,21 @@
 /* Check the freertos_risc_v_chip_specific_extensions.h and/or command line
 definitions. */
 #if defined( portasmHAS_CLINT ) && defined( portasmHAS_MTIME )
-	#error The portasmHAS_CLINT constant has been deprecated.  Please replace it with portasmHAS_MTIME.  portasmHAS_CLINT and portasmHAS_MTIME cannot both be defined at once.  See https://www.freertos.org/Using-FreeRTOS-on-RISC-V.html
+	#error The portasmHAS_CLINT constant has been deprecated.  Please replace it with portasmHAS_MTIME.  portasmHAS_CLINT and portasmHAS_MTIME cannot both be defined at once.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
 #endif
 
 #ifdef portasmHAS_CLINT
-	#warning The portasmHAS_CLINT constant has been deprecated.  Please replace it with portasmHAS_MTIME and portasmHAS_SIFIVE_CLINT.  For now portasmHAS_MTIME and portasmHAS_SIFIVE_CLINT are derived from portasmHAS_CLINT.  See https://www.freertos.org/Using-FreeRTOS-on-RISC-V.html
+	#warning The portasmHAS_CLINT constant has been deprecated.  Please replace it with portasmHAS_MTIME and portasmHAS_SIFIVE_CLINT.  For now portasmHAS_MTIME and portasmHAS_SIFIVE_CLINT are derived from portasmHAS_CLINT.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
 	#define portasmHAS_MTIME portasmHAS_CLINT
 	#define portasmHAS_SIFIVE_CLINT portasmHAS_CLINT
 #endif
 
 #ifndef portasmHAS_MTIME
-	#error freertos_risc_v_chip_specific_extensions.h must define portasmHAS_MTIME to either 1 (MTIME clock present) or 0 (MTIME clock not present).  See https://www.freertos.org/Using-FreeRTOS-on-RISC-V.html
+	#error freertos_risc_v_chip_specific_extensions.h must define portasmHAS_MTIME to either 1 (MTIME clock present) or 0 (MTIME clock not present).  See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
 #endif
 
 #ifndef portasmHANDLE_INTERRUPT
-	#error portasmHANDLE_INTERRUPT must be defined to the function to be called to handle external/peripheral interrupts.  portasmHANDLE_INTERRUPT can be defined on the assembler command line or in the appropriate freertos_risc_v_chip_specific_extensions.h header file.  https://www.freertos.org/Using-FreeRTOS-on-RISC-V.html
+	#error portasmHANDLE_INTERRUPT must be defined to the function to be called to handle external/peripheral interrupts.  portasmHANDLE_INTERRUPT can be defined on the assembler command line or in the appropriate freertos_risc_v_chip_specific_extensions.h header file.  https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
 #endif
 
 #ifndef portasmHAS_SIFIVE_CLINT
@@ -313,11 +313,6 @@ xPortStartFirstTask:
 
 	portasmRESTORE_ADDITIONAL_REGISTERS	/* Defined in freertos_risc_v_chip_specific_extensions.h to restore any registers unique to the RISC-V implementation. */
 
-	load_x  t0, 29 * portWORD_SIZE( sp )	/* mstatus */
-	addi t0, t0, 0x08						/* Set MIE bit so the first task starts with interrupts enabled - required as returns with ret not eret. */
-	csrrw  x0, mstatus, t0					/* Interrupts enabled from here! */
-
-	load_x  x5, 2 * portWORD_SIZE( sp )		/* t0 */
 	load_x  x6, 3 * portWORD_SIZE( sp )		/* t1 */
 	load_x  x7, 4 * portWORD_SIZE( sp )		/* t2 */
 	load_x  x8, 5 * portWORD_SIZE( sp )		/* s0/fp */
@@ -344,6 +339,12 @@ xPortStartFirstTask:
 	load_x  x29, 26 * portWORD_SIZE( sp )	/* t4 */
 	load_x  x30, 27 * portWORD_SIZE( sp )	/* t5 */
 	load_x  x31, 28 * portWORD_SIZE( sp )	/* t6 */
+
+	load_x  x5, 29 * portWORD_SIZE( sp )	/* Initial mstatus into x5 (t0) */
+	addi x5, x5, 0x08						/* Set MIE bit so the first task starts with interrupts enabled - required as returns with ret not eret. */
+	csrrw  x0, mstatus, x5					/* Interrupts enabled from here! */
+	load_x  x5, 2 * portWORD_SIZE( sp )		/* Initial x5 (t0) value. */
+
 	addi	sp, sp, portCONTEXT_SIZE
 	ret
 	.endfunc
@@ -416,6 +417,7 @@ xPortStartFirstTask:
 pxPortInitialiseStack:
 
 	csrr t0, mstatus					/* Obtain current mstatus value. */
+	andi t0, t0, ~0x8					/* Ensure interrupts are disabled when the stack is restored within an ISR.  Required when a task is created after the schedulre has been started, otherwise interrupts would be disabled anyway. */
 	addi t1, x0, 0x188					/* Generate the value 0x1880, which are the MPIE and MPP bits to set in mstatus. */
 	slli t1, t1, 4
 	or t0, t0, t1						/* Set MPIE and MPP bits in mstatus value. */
diff --git a/portable/GCC/RISC-V/portmacro.h b/portable/GCC/RISC-V/portmacro.h
index 0ec849618..a8eff23b9 100644
--- a/portable/GCC/RISC-V/portmacro.h
+++ b/portable/GCC/RISC-V/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -173,7 +173,7 @@ definition is found. */
 	#define configMTIME_BASE_ADDRESS 	( ( configCLINT_BASE_ADDRESS ) + 0xBFF8UL )
 	#define configMTIMECMP_BASE_ADDRESS ( ( configCLINT_BASE_ADDRESS ) + 0x4000UL )
 #elif !defined( configMTIME_BASE_ADDRESS ) || !defined( configMTIMECMP_BASE_ADDRESS )
-	#error configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS must be defined in FreeRTOSConfig.h.  Set them to zero if there is no MTIME (machine time) clock.  See https://www.freertos.org/Using-FreeRTOS-on-RISC-V.html
+	#error configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS must be defined in FreeRTOSConfig.h.  Set them to zero if there is no MTIME (machine time) clock.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
 #endif
 
 
diff --git a/portable/GCC/RL78/isr_support.h b/portable/GCC/RL78/isr_support.h
index 3687fdc70..20df3177d 100644
--- a/portable/GCC/RL78/isr_support.h
+++ b/portable/GCC/RL78/isr_support.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/RL78/port.c b/portable/GCC/RL78/port.c
index dc1fc5698..0d1c6b1eb 100644
--- a/portable/GCC/RL78/port.c
+++ b/portable/GCC/RL78/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/RL78/portasm.S b/portable/GCC/RL78/portasm.S
index 75bc5aa62..379f958fc 100644
--- a/portable/GCC/RL78/portasm.S
+++ b/portable/GCC/RL78/portasm.S
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/RL78/portmacro.h b/portable/GCC/RL78/portmacro.h
index da2ce5343..b8cd3e161 100644
--- a/portable/GCC/RL78/portmacro.h
+++ b/portable/GCC/RL78/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/RX100/port.c b/portable/GCC/RX100/port.c
index a77efbccc..88aeddaa4 100644
--- a/portable/GCC/RX100/port.c
+++ b/portable/GCC/RX100/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -40,8 +40,15 @@
 #include "string.h"
 
 /* Hardware specifics. */
-#include "iodefine.h"
+#if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
 
+    #include "platform.h"
+
+#else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
+
+    #include "iodefine.h"
+
+#endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
 /*-----------------------------------------------------------*/
 
 /* Tasks should start with interrupts enabled and in Supervisor mode, therefore
@@ -89,12 +96,31 @@ static void prvStartFirstTask( void ) __attribute__((naked));
  * restoring of registers).  Written in asm code as direct register access is
  * required.
  */
-void vPortSoftwareInterruptISR( void ) __attribute__((naked));
+#if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
+
+    R_BSP_PRAGMA_INTERRUPT( vSoftwareInterruptISR, VECT( ICU, SWINT ) )
+    R_BSP_ATTRIB_INTERRUPT void vSoftwareInterruptISR( void ) __attribute__( ( naked ) );
+
+#else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
+
+    void vSoftwareInterruptISR( void ) __attribute__( ( naked ) );
+
+#endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H  */
 
 /*
- * The tick interrupt handler.
+ * The tick ISR handler.  The peripheral used is configured by the application
+ * via a hook/callback function.
  */
-void vPortTickISR( void ) __attribute__((interrupt));
+#if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
+
+    R_BSP_PRAGMA_INTERRUPT( vTickISR, _VECT( configTICK_VECTOR ) )
+    R_BSP_ATTRIB_INTERRUPT void vTickISR( void ); /* Do not add __attribute__( ( interrupt ) ). */
+
+#else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
+
+    void vTickISR( void ) __attribute__( ( interrupt ) );
+
+#endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
 
 /*
  * Sets up the periodic ISR used for the RTOS tick using the CMT.
diff --git a/portable/GCC/RX100/portmacro.h b/portable/GCC/RX100/portmacro.h
index 77e91a19c..5b7ece1b2 100644
--- a/portable/GCC/RX100/portmacro.h
+++ b/portable/GCC/RX100/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -42,6 +42,11 @@ extern "C" {
  * These settings should not be altered.
  *-----------------------------------------------------------
  */
+/* When the FIT configurator or the Smart Configurator is used, platform.h has to be
+ * used. */
+#ifndef configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H
+    #define configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H 0
+#endif
 
 /* Type definitions - these are a bit legacy and not really used now, other than
 portSTACK_TYPE and portBASE_TYPE. */
diff --git a/portable/GCC/RX200/port.c b/portable/GCC/RX200/port.c
new file mode 100644
index 000000000..2335b7813
--- /dev/null
+++ b/portable/GCC/RX200/port.c
@@ -0,0 +1,435 @@
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ * 1 tab == 4 spaces!
+ */
+
+/*-----------------------------------------------------------
+ * Implementation of functions defined in portable.h for the SH2A port.
+ *----------------------------------------------------------*/
+
+/* Scheduler includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+
+/* Library includes. */
+#include "string.h"
+
+/* Hardware specifics. */
+#if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
+
+    #include "platform.h"
+
+#else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
+
+    #include "iodefine.h"
+
+#endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
+
+/*-----------------------------------------------------------*/
+
+/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
+PSW is set with U and I set, and PM and IPL clear. */
+#define portINITIAL_PSW     ( ( StackType_t ) 0x00030000 )
+#define portINITIAL_FPSW    ( ( StackType_t ) 0x00000100 )
+
+/* These macros allow a critical section to be added around the call to
+xTaskIncrementTick(), which is only ever called from interrupts at the kernel
+priority - ie a known priority.  Therefore these local macros are a slight
+optimisation compared to calling the global SET/CLEAR_INTERRUPT_MASK macros,
+which would require the old IPL to be read first and stored in a local variable. */
+#define portMASK_INTERRUPTS_FROM_KERNEL_ISR() 	__asm volatile ( "MVTIPL	%0" ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY) )
+#define portUNMASK_INTERRUPTS_FROM_KERNEL_ISR() 	__asm volatile ( "MVTIPL	%0" ::"i"(configKERNEL_INTERRUPT_PRIORITY) )
+
+/*-----------------------------------------------------------*/
+
+/*
+ * Function to start the first task executing - written in asm code as direct
+ * access to registers is required.
+ */
+static void prvStartFirstTask( void ) __attribute__((naked));
+
+
+/*
+ * Software interrupt handler.  Performs the actual context switch (saving and
+ * restoring of registers).  Written in asm code as direct register access is
+ * required.
+ */
+#if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
+
+    R_BSP_PRAGMA_INTERRUPT( vSoftwareInterruptISR, VECT( ICU, SWINT ) )
+    R_BSP_ATTRIB_INTERRUPT void vSoftwareInterruptISR( void ) __attribute__( ( naked ) );
+
+#else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
+
+    void vSoftwareInterruptISR( void ) __attribute__( ( naked ) );
+
+#endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H  */
+
+/*
+ * The tick ISR handler.  The peripheral used is configured by the application
+ * via a hook/callback function.
+ */
+#if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
+
+    R_BSP_PRAGMA_INTERRUPT( vTickISR, _VECT( configTICK_VECTOR ) )
+    R_BSP_ATTRIB_INTERRUPT void vTickISR( void ); /* Do not add __attribute__( ( interrupt ) ). */
+
+#else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
+
+    void vTickISR( void ) __attribute__( ( interrupt ) );
+
+#endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
+
+/*-----------------------------------------------------------*/
+
+extern void *pxCurrentTCB;
+
+/*-----------------------------------------------------------*/
+
+/*
+ * See header file for description.
+ */
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
+{
+	/* R0 is not included as it is the stack pointer. */
+
+	*pxTopOfStack = 0x00;
+	pxTopOfStack--;
+ 	*pxTopOfStack = portINITIAL_PSW;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) pxCode;
+
+	/* When debugging it can be useful if every register is set to a known
+	value.  Otherwise code space can be saved by just setting the registers
+	that need to be set. */
+	#ifdef USE_FULL_REGISTER_INITIALISATION
+	{
+		pxTopOfStack--;
+		*pxTopOfStack = 0xffffffff;	/* r15. */
+		pxTopOfStack--;
+		*pxTopOfStack = 0xeeeeeeee;
+		pxTopOfStack--;
+		*pxTopOfStack = 0xdddddddd;
+		pxTopOfStack--;
+		*pxTopOfStack = 0xcccccccc;
+		pxTopOfStack--;
+		*pxTopOfStack = 0xbbbbbbbb;
+		pxTopOfStack--;
+		*pxTopOfStack = 0xaaaaaaaa;
+		pxTopOfStack--;
+		*pxTopOfStack = 0x99999999;
+		pxTopOfStack--;
+		*pxTopOfStack = 0x88888888;
+		pxTopOfStack--;
+		*pxTopOfStack = 0x77777777;
+		pxTopOfStack--;
+		*pxTopOfStack = 0x66666666;
+		pxTopOfStack--;
+		*pxTopOfStack = 0x55555555;
+		pxTopOfStack--;
+		*pxTopOfStack = 0x44444444;
+		pxTopOfStack--;
+		*pxTopOfStack = 0x33333333;
+		pxTopOfStack--;
+		*pxTopOfStack = 0x22222222;
+		pxTopOfStack--;
+	}
+	#else
+	{
+		pxTopOfStack -= 15;
+	}
+	#endif
+
+	*pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
+	pxTopOfStack--;
+	*pxTopOfStack = portINITIAL_FPSW;
+	pxTopOfStack--;
+	*pxTopOfStack = 0x11111111; /* Accumulator 0. */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x22222222; /* Accumulator 0. */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x33333333; /* Accumulator 0. */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x44444444; /* Accumulator 1. */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x55555555; /* Accumulator 1. */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x66666666; /* Accumulator 1. */
+
+	return pxTopOfStack;
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xPortStartScheduler( void )
+{
+extern void vApplicationSetupTimerInterrupt( void );
+
+	/* Use pxCurrentTCB just so it does not get optimised away. */
+	if( pxCurrentTCB != NULL )
+	{
+		/* Call an application function to set up the timer that will generate the
+		tick interrupt.  This way the application can decide which peripheral to
+		use.  A demo application is provided to show a suitable example. */
+		vApplicationSetupTimerInterrupt();
+
+		/* Enable the software interrupt. */
+		_IEN( _ICU_SWINT ) = 1;
+
+		/* Ensure the software interrupt is clear. */
+		_IR( _ICU_SWINT ) = 0;
+
+		/* Ensure the software interrupt is set to the kernel priority. */
+		_IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
+
+		/* Start the first task. */
+		prvStartFirstTask();
+	}
+
+	/* Should not get here. */
+	return pdFAIL;
+}
+/*-----------------------------------------------------------*/
+
+void vPortEndScheduler( void )
+{
+	/* Not implemented in ports where there is nothing to return to.
+	Artificially force an assert. */
+	configASSERT( pxCurrentTCB == NULL );
+}
+/*-----------------------------------------------------------*/
+
+static void prvStartFirstTask( void )
+{
+	__asm volatile
+	(
+		/* When starting the scheduler there is nothing that needs moving to the
+		interrupt stack because the function is not called from an interrupt.
+		Just ensure the current stack is the user stack. */
+		"SETPSW		U						\n" \
+
+		/* Obtain the location of the stack associated with which ever task
+		pxCurrentTCB is currently pointing to. */
+		"MOV.L		#_pxCurrentTCB, R15		\n" \
+		"MOV.L		[R15], R15				\n" \
+		"MOV.L		[R15], R0				\n" \
+
+		/* Restore the registers from the stack of the task pointed to by
+		pxCurrentTCB. */
+	    "POP		R15						\n" \
+
+		/* Accumulator low 32 bits. */
+	    "MVTACLO	R15, A0					\n" \
+	    "POP		R15						\n" \
+
+	    /* Accumulator high 32 bits. */
+	    "MVTACHI	R15, A0					\n" \
+	    "POP		R15						\n" \
+
+	    /* Accumulator guard. */
+	    "MVTACGU	R15, A0					\n" \
+	    "POP		R15						\n" \
+
+	    /* Accumulator low 32 bits. */
+	    "MVTACLO	R15, A1					\n" \
+	    "POP		R15						\n" \
+
+	    /* Accumulator high 32 bits. */
+	    "MVTACHI	R15, A1					\n" \
+	    "POP		R15						\n" \
+
+	    /* Accumulator guard. */
+	    "MVTACGU	R15, A1					\n" \
+	    "POP		R15						\n" \
+
+		/* Floating point status word. */
+	    "MVTC		R15, FPSW 				\n" \
+
+		/* R1 to R15 - R0 is not included as it is the SP. */
+	    "POPM		R1-R15 					\n" \
+
+		/* This pops the remaining registers. */
+	    "RTE								\n" \
+	    "NOP								\n" \
+	    "NOP								\n"
+	);
+}
+/*-----------------------------------------------------------*/
+
+void vSoftwareInterruptISR( void )
+{
+	__asm volatile
+	(
+		/* Re-enable interrupts. */
+		"SETPSW		I							\n" \
+
+		/* Move the data that was automatically pushed onto the interrupt stack when
+		the interrupt occurred from the interrupt stack to the user stack.
+
+		R15 is saved before it is clobbered. */
+		"PUSH.L		R15							\n" \
+
+		/* Read the user stack pointer. */
+		"MVFC		USP, R15					\n" \
+
+		/* Move the address down to the data being moved. */
+		"SUB		#12, R15					\n" \
+		"MVTC		R15, USP					\n" \
+
+		/* Copy the data across, R15, then PC, then PSW. */
+		"MOV.L		[ R0 ], [ R15 ]				\n" \
+		"MOV.L 		4[ R0 ], 4[ R15 ]			\n" \
+		"MOV.L		8[ R0 ], 8[ R15 ]			\n" \
+
+		/* Move the interrupt stack pointer to its new correct position. */
+		"ADD		#12, R0						\n" \
+
+		/* All the rest of the registers are saved directly to the user stack. */
+		"SETPSW		U							\n" \
+
+		/* Save the rest of the general registers (R15 has been saved already). */
+		"PUSHM		R1-R14						\n" \
+
+		/* Save the FPSW and accumulator. */
+		"MVFC		FPSW, R15					\n" \
+		"PUSH.L		R15							\n" \
+		"MVFACGU	#0, A1, R15					\n" \
+		"PUSH.L		R15							\n" \
+		"MVFACHI	#0, A1, R15					\n" \
+		"PUSH.L		R15							\n" \
+		/* Low order word. */
+		"MVFACLO	#0, A1, R15					\n" \
+		"PUSH.L		R15							\n" \
+		"MVFACGU	#0, A0, R15					\n" \
+		"PUSH.L		R15							\n" \
+		"MVFACHI	#0, A0, R15					\n" \
+		"PUSH.L		R15							\n" \
+		/* Low order word. */
+		"MVFACLO	#0, A0, R15					\n" \
+		"PUSH.L		R15							\n" \
+
+		/* Save the stack pointer to the TCB. */
+		"MOV.L		#_pxCurrentTCB, R15			\n" \
+		"MOV.L		[ R15 ], R15				\n" \
+		"MOV.L		R0, [ R15 ]					\n" \
+
+		/* Ensure the interrupt mask is set to the syscall priority while the kernel
+		structures are being accessed. */
+		"MVTIPL		%0 							\n" \
+
+		/* Select the next task to run. */
+		"BSR.A		_vTaskSwitchContext			\n" \
+
+		/* Reset the interrupt mask as no more data structure access is required. */
+		"MVTIPL		%1							\n" \
+
+		/* Load the stack pointer of the task that is now selected as the Running
+		state task from its TCB. */
+		"MOV.L		#_pxCurrentTCB,R15			\n" \
+		"MOV.L		[ R15 ], R15				\n" \
+		"MOV.L		[ R15 ], R0					\n" \
+
+		/* Restore the context of the new task.  The PSW (Program Status Word) and
+		PC will be popped by the RTE instruction. */
+	    "POP		R15							\n" \
+
+	    /* Accumulator low 32 bits. */
+	    "MVTACLO	R15, A0						\n" \
+	    "POP		R15							\n" \
+
+	    /* Accumulator high 32 bits. */
+	    "MVTACHI	R15, A0						\n" \
+	    "POP		R15							\n" \
+
+	    /* Accumulator guard. */
+	    "MVTACGU	R15, A0						\n" \
+	    "POP		R15							\n" \
+
+	    /* Accumulator low 32 bits. */
+	    "MVTACLO	R15, A1						\n" \
+	    "POP		R15							\n" \
+
+	    /* Accumulator high 32 bits. */
+	    "MVTACHI	R15, A1						\n" \
+	    "POP		R15							\n" \
+
+	    /* Accumulator guard. */
+	    "MVTACGU	R15, A1						\n" \
+		"POP		R15							\n" \
+		"MVTC		R15, FPSW					\n" \
+		"POPM		R1-R15						\n" \
+		"RTE									\n" \
+		"NOP									\n" \
+		"NOP									  "
+		:: "i"(configMAX_SYSCALL_INTERRUPT_PRIORITY), "i"(configKERNEL_INTERRUPT_PRIORITY)
+	);
+}
+/*-----------------------------------------------------------*/
+
+void vTickISR( void )
+{
+	/* Re-enabled interrupts. */
+	__asm volatile( "SETPSW	I" );
+
+	/* Increment the tick, and perform any processing the new tick value
+	necessitates.  Ensure IPL is at the max syscall value first. */
+	portMASK_INTERRUPTS_FROM_KERNEL_ISR();
+	{
+		if( xTaskIncrementTick() != pdFALSE )
+		{
+			taskYIELD();
+		}
+	}
+	portUNMASK_INTERRUPTS_FROM_KERNEL_ISR();
+}
+/*-----------------------------------------------------------*/
+
+uint32_t ulPortGetIPL( void )
+{
+	__asm volatile
+	(
+		"MVFC	PSW, R1			\n"	\
+		"SHLR	#24, R1			\n"	\
+		"RTS					  "
+	);
+
+	/* This will never get executed, but keeps the compiler from complaining. */
+	return 0;
+}
+/*-----------------------------------------------------------*/
+
+void vPortSetIPL( uint32_t ulNewIPL )
+{
+	__asm volatile
+	(
+		"PUSH	R5				\n" \
+		"MVFC	PSW, R5			\n"	\
+		"SHLL	#24, R1			\n" \
+		"AND	#-0F000001H, R5 \n" \
+		"OR		R1, R5			\n" \
+		"MVTC	R5, PSW			\n" \
+		"POP	R5				\n" \
+		"RTS					  "
+	 );
+}
diff --git a/portable/GCC/RX200/portmacro.h b/portable/GCC/RX200/portmacro.h
new file mode 100644
index 000000000..e9acae0d5
--- /dev/null
+++ b/portable/GCC/RX200/portmacro.h
@@ -0,0 +1,144 @@
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef PORTMACRO_H
+#define PORTMACRO_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*-----------------------------------------------------------
+ * Port specific definitions.
+ *
+ * The settings in this file configure FreeRTOS correctly for the
+ * given hardware and compiler.
+ *
+ * These settings should not be altered.
+ *-----------------------------------------------------------
+ */
+
+/* When the FIT configurator or the Smart Configurator is used, platform.h has to be
+ * used. */
+#ifndef configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H
+    #define configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H 0
+#endif
+
+/* Type definitions - these are a bit legacy and not really used now, other than
+portSTACK_TYPE and portBASE_TYPE. */
+#define portCHAR		char
+#define portFLOAT		float
+#define portDOUBLE		double
+#define portLONG		long
+#define portSHORT		short
+#define portSTACK_TYPE	uint32_t
+#define portBASE_TYPE	long
+
+typedef portSTACK_TYPE StackType_t;
+typedef long BaseType_t;
+typedef unsigned long UBaseType_t;
+
+#if( configUSE_16_BIT_TICKS == 1 )
+	typedef uint16_t TickType_t;
+	#define portMAX_DELAY ( TickType_t ) 0xffff
+#else
+	typedef uint32_t TickType_t;
+	#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+
+	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+	not need to be guarded with a critical section. */
+	#define portTICK_TYPE_IS_ATOMIC 1
+#endif
+/*-----------------------------------------------------------*/
+
+/* Hardware specifics. */
+#define portBYTE_ALIGNMENT			8	/* Could make four, according to manual. */
+#define portSTACK_GROWTH			-1
+#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+#define portNOP()					__asm volatile( "NOP" )
+
+/* Yield equivalent to "*portITU_SWINTR = 0x01; ( void ) *portITU_SWINTR;"
+where portITU_SWINTR is the location of the software interrupt register
+(0x000872E0).  Don't rely on the assembler to select a register, so instead
+save and restore clobbered registers manually. */
+#define portYIELD()							\
+	__asm volatile 							\
+	(										\
+		"PUSH.L	R10					\n"		\
+		"MOV.L	#0x872E0, R10		\n"		\
+		"MOV.B	#0x1, [R10]			\n"		\
+		"MOV.L	[R10], R10			\n"		\
+		"POP	R10					\n"		\
+	)
+
+#define portYIELD_FROM_ISR( x )	if( x != pdFALSE ) portYIELD()
+
+/* These macros should not be called directly, but through the
+taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros.  An extra check is
+performed if configASSERT() is defined to ensure an assertion handler does not
+inadvertently attempt to lower the IPL when the call to assert was triggered
+because the IPL value was found to be above	configMAX_SYSCALL_INTERRUPT_PRIORITY
+when an ISR safe FreeRTOS API function was executed.  ISR safe FreeRTOS API
+functions are those that end in FromISR.  FreeRTOS maintains a separate
+interrupt API to ensure API function and interrupt entry is as fast and as
+simple as possible. */
+#define portENABLE_INTERRUPTS() 	__asm volatile ( "MVTIPL	#0" )
+#ifdef configASSERT
+	#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( ulPortGetIPL() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
+	#define portDISABLE_INTERRUPTS() 	if( ulPortGetIPL() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) __asm volatile ( "MVTIPL	%0" ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY) )
+#else
+	#define portDISABLE_INTERRUPTS() 	__asm volatile ( "MVTIPL	%0" ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY) )
+#endif
+
+/* Critical nesting counts are stored in the TCB. */
+#define portCRITICAL_NESTING_IN_TCB ( 1 )
+
+/* The critical nesting functions defined within tasks.c. */
+extern void vTaskEnterCritical( void );
+extern void vTaskExitCritical( void );
+#define portENTER_CRITICAL()	vTaskEnterCritical()
+#define portEXIT_CRITICAL()		vTaskExitCritical()
+
+/* As this port allows interrupt nesting... */
+uint32_t ulPortGetIPL( void ) __attribute__((naked));
+void vPortSetIPL( uint32_t ulNewIPL ) __attribute__((naked));
+#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortGetIPL(); portDISABLE_INTERRUPTS()
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) vPortSetIPL( uxSavedInterruptStatus )
+
+/*-----------------------------------------------------------*/
+
+/* Task function macros as described on the FreeRTOS.org WEB site. */
+#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
+#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PORTMACRO_H */
+
diff --git a/portable/GCC/RX600/port.c b/portable/GCC/RX600/port.c
index 422b6c751..ad091f4c9 100644
--- a/portable/GCC/RX600/port.c
+++ b/portable/GCC/RX600/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -37,7 +37,16 @@
 #include "string.h"
 
 /* Hardware specifics. */
-#include "iodefine.h"
+#if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
+
+    #include "platform.h"
+
+#else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
+
+    #include "iodefine.h"
+
+#endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
+
 
 /*-----------------------------------------------------------*/
 
@@ -61,18 +70,36 @@ which would require the old IPL to be read first and stored in a local variable.
  * access to registers is required.
  */
 static void prvStartFirstTask( void ) __attribute__((naked));
-
 /*
  * Software interrupt handler.  Performs the actual context switch (saving and
  * restoring of registers).  Written in asm code as direct register access is
  * required.
  */
-void vSoftwareInterruptISR( void ) __attribute__((naked));
+#if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
+
+    R_BSP_PRAGMA_INTERRUPT( vSoftwareInterruptISR, VECT( ICU, SWINT ) )
+    R_BSP_ATTRIB_INTERRUPT void vSoftwareInterruptISR( void ) __attribute__( ( naked ) );
+
+#else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
+
+    void vSoftwareInterruptISR( void ) __attribute__( ( naked ) );
+
+#endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H  */
 
 /*
- * The tick interrupt handler.
+ * The tick ISR handler.  The peripheral used is configured by the application
+ * via a hook/callback function.
  */
-void vTickISR( void ) __attribute__((interrupt));
+#if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
+
+    R_BSP_PRAGMA_INTERRUPT( vTickISR, _VECT( configTICK_VECTOR ) )
+    R_BSP_ATTRIB_INTERRUPT void vTickISR( void ); /* Do not add __attribute__( ( interrupt ) ). */
+
+#else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
+
+    void vTickISR( void ) __attribute__( ( interrupt ) );
+
+#endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
 
 /*-----------------------------------------------------------*/
 
@@ -344,6 +371,9 @@ uint32_t ulPortGetIPL( void )
 
 void vPortSetIPL( uint32_t ulNewIPL )
 {
+	/* Avoid compiler warning about unreferenced parameter. */
+	( void ) ulNewIPL;
+
 	__asm volatile
 	(
 		"PUSH	R5				\n" \
diff --git a/portable/GCC/RX600/portmacro.h b/portable/GCC/RX600/portmacro.h
index c6cb8417f..472a79b3e 100644
--- a/portable/GCC/RX600/portmacro.h
+++ b/portable/GCC/RX600/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -43,6 +43,12 @@ extern "C" {
  *-----------------------------------------------------------
  */
 
+/* When the FIT configurator or the Smart Configurator is used, platform.h has to be
+ * used. */
+#ifndef configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H
+    #define configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H 0
+#endif
+
 /* Type definitions - these are a bit legacy and not really used now, other than
 portSTACK_TYPE and portBASE_TYPE. */
 #define portCHAR		char
diff --git a/portable/GCC/RX600v2/port.c b/portable/GCC/RX600v2/port.c
index 3480c181b..e003ae048 100644
--- a/portable/GCC/RX600v2/port.c
+++ b/portable/GCC/RX600v2/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -37,7 +37,15 @@
 #include "string.h"
 
 /* Hardware specifics. */
-#include "iodefine.h"
+#if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
+
+    #include "platform.h"
+
+#else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
+
+    #include "iodefine.h"
+
+#endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
 
 /*-----------------------------------------------------------*/
 
@@ -67,13 +75,27 @@ static void prvStartFirstTask( void ) __attribute__((naked));
  * restoring of registers).  Written in asm code as direct register access is
  * required.
  */
+#if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
+R_BSP_PRAGMA_INTERRUPT( vSoftwareInterruptISR, VECT( ICU, SWINT ) )
+R_BSP_ATTRIB_INTERRUPT void vSoftwareInterruptISR( void ) __attribute__( ( naked ) );
+#else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
 void vSoftwareInterruptISR( void ) __attribute__((naked));
+#endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H  */
 
 /*
- * The tick interrupt handler.
+ * The tick ISR handler.  The peripheral used is configured by the application
+ * via a hook/callback function.
  */
-void vTickISR( void ) __attribute__((interrupt));
+#if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
 
+    R_BSP_PRAGMA_INTERRUPT( vTickISR, _VECT( configTICK_VECTOR ) )
+    R_BSP_ATTRIB_INTERRUPT void vTickISR( void ); /* Do not add __attribute__( ( interrupt ) ). */
+
+#else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
+
+    void vTickISR( void ) __attribute__( ( interrupt ) );
+
+#endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
 /*-----------------------------------------------------------*/
 
 extern void *pxCurrentTCB;
@@ -393,6 +415,9 @@ uint32_t ulPortGetIPL( void )
 
 void vPortSetIPL( uint32_t ulNewIPL )
 {
+	/* Avoid compiler warning about unreferenced parameter. */
+	( void ) ulNewIPL;
+
 	__asm volatile
 	(
 		"PUSH	R5				\n" \
diff --git a/portable/GCC/RX600v2/portmacro.h b/portable/GCC/RX600v2/portmacro.h
index c6cb8417f..472a79b3e 100644
--- a/portable/GCC/RX600v2/portmacro.h
+++ b/portable/GCC/RX600v2/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -43,6 +43,12 @@ extern "C" {
  *-----------------------------------------------------------
  */
 
+/* When the FIT configurator or the Smart Configurator is used, platform.h has to be
+ * used. */
+#ifndef configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H
+    #define configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H 0
+#endif
+
 /* Type definitions - these are a bit legacy and not really used now, other than
 portSTACK_TYPE and portBASE_TYPE. */
 #define portCHAR		char
diff --git a/portable/GCC/RX700v3_DPFPU/port.c b/portable/GCC/RX700v3_DPFPU/port.c
new file mode 100644
index 000000000..44d40e980
--- /dev/null
+++ b/portable/GCC/RX700v3_DPFPU/port.c
@@ -0,0 +1,621 @@
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ * 1 tab == 4 spaces!
+ */
+
+/*-----------------------------------------------------------
+* Implementation of functions defined in portable.h for the RXv3 DPFPU port.
+*----------------------------------------------------------*/
+
+#warning Testing for DFPU support in this port is not yet complete
+
+/* Scheduler includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+
+/* Library includes. */
+#include "string.h"
+
+/* Hardware specifics. */
+#if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
+
+    #include "platform.h"
+
+#else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
+
+    #include "iodefine.h"
+
+#endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
+
+/*-----------------------------------------------------------*/
+
+/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
+ * PSW is set with U and I set, and PM and IPL clear. */
+#define portINITIAL_PSW     ( ( StackType_t ) 0x00030000 )
+#define portINITIAL_FPSW    ( ( StackType_t ) 0x00000100 )
+#define portINITIAL_DPSW    ( ( StackType_t ) 0x00000100 )
+#define portINITIAL_DCMR    ( ( StackType_t ) 0x00000000 )
+#define portINITIAL_DECNT   ( ( StackType_t ) 0x00000001 )
+
+/* Tasks are not created with a DPFPU context, but can be given a DPFPU context
+ * after they have been created.  A variable is stored as part of the tasks context
+ * that holds portNO_DPFPU_CONTEXT if the task does not have a DPFPU context, or
+ * any other value if the task does have a DPFPU context. */
+#define portNO_DPFPU_CONTEXT    ( ( StackType_t ) 0 )
+#define portHAS_DPFPU_CONTEXT   ( ( StackType_t ) 1 )
+
+/* The space on the stack required to hold the DPFPU data registers.  This is 16
+ * 64-bit registers. */
+#define portDPFPU_DATA_REGISTER_WORDS   ( 16 * 2 )
+
+/* These macros allow a critical section to be added around the call to
+ * xTaskIncrementTick(), which is only ever called from interrupts at the kernel
+ * priority - ie a known priority.  Therefore these local macros are a slight
+ * optimisation compared to calling the global SET/CLEAR_INTERRUPT_MASK macros,
+ * which would require the old IPL to be read first and stored in a local variable. */
+#define portMASK_INTERRUPTS_FROM_KERNEL_ISR()      __asm volatile ( "MVTIPL	%0" ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
+#define portUNMASK_INTERRUPTS_FROM_KERNEL_ISR()    __asm volatile ( "MVTIPL	%0" ::"i" ( configKERNEL_INTERRUPT_PRIORITY ) )
+
+/*-----------------------------------------------------------*/
+
+/*
+ * Function to start the first task executing - written in asm code as direct
+ * access to registers is required.
+ */
+static void prvStartFirstTask( void ) __attribute__( ( naked ) );
+
+/*
+ * Software interrupt handler.  Performs the actual context switch (saving and
+ * restoring of registers).  Written in asm code as direct register access is
+ * required.
+ */
+#if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
+
+    R_BSP_PRAGMA_INTERRUPT( vSoftwareInterruptISR, VECT( ICU, SWINT ) )
+    R_BSP_ATTRIB_INTERRUPT void vSoftwareInterruptISR( void ) __attribute__( ( naked ) );
+
+#else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
+
+    void vSoftwareInterruptISR( void ) __attribute__( ( naked ) );
+
+#endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H  */
+
+/*
+ * The tick ISR handler.  The peripheral used is configured by the application
+ * via a hook/callback function.
+ */
+#if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
+
+    R_BSP_PRAGMA_INTERRUPT( vTickISR, _VECT( configTICK_VECTOR ) )
+    R_BSP_ATTRIB_INTERRUPT void vTickISR( void ); /* Do not add __attribute__( ( interrupt ) ). */
+
+#else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
+
+    void vTickISR( void ) __attribute__( ( interrupt ) );
+
+#endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
+
+/*-----------------------------------------------------------*/
+
+/* Saved as part of the task context.  If ulPortTaskHasDPFPUContext is non-zero
+ * then a DPFPU context must be saved and restored for the task. */
+#if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
+
+    StackType_t ulPortTaskHasDPFPUContext = portNO_DPFPU_CONTEXT;
+
+#endif /* configUSE_TASK_DPFPU_SUPPORT */
+
+/* This is accessed by the inline assembler functions so is file scope for
+ * convenience. */
+extern void * pxCurrentTCB;
+extern void vTaskSwitchContext( void );
+
+/*-----------------------------------------------------------*/
+
+/*
+ * See header file for description.
+ */
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
+{
+    /* R0 is not included as it is the stack pointer. */
+
+    *pxTopOfStack = 0x00;
+    pxTopOfStack--;
+    *pxTopOfStack = portINITIAL_PSW;
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) pxCode;
+
+    /* When debugging it can be useful if every register is set to a known
+     * value.  Otherwise code space can be saved by just setting the registers
+     * that need to be set. */
+    #ifdef USE_FULL_REGISTER_INITIALISATION
+        {
+            pxTopOfStack--;
+            *pxTopOfStack = 0xffffffff; /* r15. */
+            pxTopOfStack--;
+            *pxTopOfStack = 0xeeeeeeee;
+            pxTopOfStack--;
+            *pxTopOfStack = 0xdddddddd;
+            pxTopOfStack--;
+            *pxTopOfStack = 0xcccccccc;
+            pxTopOfStack--;
+            *pxTopOfStack = 0xbbbbbbbb;
+            pxTopOfStack--;
+            *pxTopOfStack = 0xaaaaaaaa;
+            pxTopOfStack--;
+            *pxTopOfStack = 0x99999999;
+            pxTopOfStack--;
+            *pxTopOfStack = 0x88888888;
+            pxTopOfStack--;
+            *pxTopOfStack = 0x77777777;
+            pxTopOfStack--;
+            *pxTopOfStack = 0x66666666;
+            pxTopOfStack--;
+            *pxTopOfStack = 0x55555555;
+            pxTopOfStack--;
+            *pxTopOfStack = 0x44444444;
+            pxTopOfStack--;
+            *pxTopOfStack = 0x33333333;
+            pxTopOfStack--;
+            *pxTopOfStack = 0x22222222;
+            pxTopOfStack--;
+        }
+    #else /* ifdef USE_FULL_REGISTER_INITIALISATION */
+        {
+            pxTopOfStack -= 15;
+        }
+    #endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
+
+    *pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
+    pxTopOfStack--;
+    *pxTopOfStack = portINITIAL_FPSW;
+    pxTopOfStack--;
+    *pxTopOfStack = 0x11111111; /* Accumulator 1. */
+    pxTopOfStack--;
+    *pxTopOfStack = 0x22222222; /* Accumulator 1. */
+    pxTopOfStack--;
+    *pxTopOfStack = 0x33333333; /* Accumulator 1. */
+    pxTopOfStack--;
+    *pxTopOfStack = 0x44444444; /* Accumulator 0. */
+    pxTopOfStack--;
+    *pxTopOfStack = 0x55555555; /* Accumulator 0. */
+    pxTopOfStack--;
+    *pxTopOfStack = 0x66666666; /* Accumulator 0. */
+
+    #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
+        {
+            /* The task will start without a DPFPU context.  A task that
+             * uses the DPFPU hardware must call vPortTaskUsesDPFPU() before
+             * executing any floating point instructions. */
+            pxTopOfStack--;
+            *pxTopOfStack = portNO_DPFPU_CONTEXT;
+        }
+    #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
+        {
+            /* The task will start with a DPFPU context.  Leave enough
+             * space for the registers - and ensure they are initialised if desired. */
+            #ifdef USE_FULL_REGISTER_INITIALISATION
+                {
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack = 1515.1515; /* DR15. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack = 1414.1414; /* DR14. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack = 1313.1313; /* DR13. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack = 1212.1212; /* DR12. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack = 1111.1111; /* DR11. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack = 1010.1010; /* DR10. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  909.0909; /* DR9. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  808.0808; /* DR8. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  707.0707; /* DR7. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  606.0606; /* DR6. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  505.0505; /* DR5. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  404.0404; /* DR4. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  303.0303; /* DR3. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  202.0202; /* DR2. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  101.0101; /* DR1. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack = 9876.54321;/* DR0. */
+                }
+            #else /* ifdef USE_FULL_REGISTER_INITIALISATION */
+                {
+                    pxTopOfStack -= portDPFPU_DATA_REGISTER_WORDS;
+                    memset( pxTopOfStack, 0x00, portDPFPU_DATA_REGISTER_WORDS * sizeof( StackType_t ) );
+                }
+            #endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
+            pxTopOfStack--;
+            *pxTopOfStack = portINITIAL_DECNT; /* DECNT. */
+            pxTopOfStack--;
+            *pxTopOfStack = portINITIAL_DCMR;  /* DCMR. */
+            pxTopOfStack--;
+            *pxTopOfStack = portINITIAL_DPSW;  /* DPSW. */
+        }
+    #elif ( configUSE_TASK_DPFPU_SUPPORT == 0 )
+        {
+            /* Omit DPFPU support. */
+        }
+    #else /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
+        {
+            #error Invalid configUSE_TASK_DPFPU_SUPPORT setting - configUSE_TASK_DPFPU_SUPPORT must be set to 0, 1, 2, or left undefined.
+        }
+    #endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
+
+    return pxTopOfStack;
+}
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
+
+    void vPortTaskUsesDPFPU( void )
+    {
+        /* A task is registering the fact that it needs a DPFPU context.  Set the
+         * DPFPU flag (which is saved as part of the task context). */
+        ulPortTaskHasDPFPUContext = portHAS_DPFPU_CONTEXT;
+    }
+
+#endif /* configUSE_TASK_DPFPU_SUPPORT */
+/*-----------------------------------------------------------*/
+
+BaseType_t xPortStartScheduler( void )
+{
+    extern void vApplicationSetupTimerInterrupt( void );
+
+    /* Use pxCurrentTCB just so it does not get optimised away. */
+    if( pxCurrentTCB != NULL )
+    {
+        /* Call an application function to set up the timer that will generate the
+         * tick interrupt.  This way the application can decide which peripheral to
+         * use.  A demo application is provided to show a suitable example. */
+        vApplicationSetupTimerInterrupt();
+
+        /* Enable the software interrupt. */
+        _IEN( _ICU_SWINT ) = 1;
+
+        /* Ensure the software interrupt is clear. */
+        _IR( _ICU_SWINT ) = 0;
+
+        /* Ensure the software interrupt is set to the kernel priority. */
+        _IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
+
+        /* Start the first task. */
+        prvStartFirstTask();
+    }
+
+    /* Should not get here. */
+    return pdFAIL;
+}
+/*-----------------------------------------------------------*/
+
+void vPortEndScheduler( void )
+{
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( pxCurrentTCB == NULL );
+}
+/*-----------------------------------------------------------*/
+
+static void prvStartFirstTask( void )
+{
+    __asm volatile
+    (
+
+        /* When starting the scheduler there is nothing that needs moving to the
+         * interrupt stack because the function is not called from an interrupt.
+         * Just ensure the current stack is the user stack. */
+        "SETPSW		U						\n"\
+
+
+        /* Obtain the location of the stack associated with which ever task
+         * pxCurrentTCB is currently pointing to. */
+        "MOV.L		#_pxCurrentTCB, R15		\n"\
+        "MOV.L		[R15], R15				\n"\
+        "MOV.L		[R15], R0				\n"\
+
+
+        /* Restore the registers from the stack of the task pointed to by
+         * pxCurrentTCB. */
+
+        #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
+
+            /* The restored ulPortTaskHasDPFPUContext is to be zero here.
+             * So, it is never necessary to restore the DPFPU context here. */
+            "POP		R15									\n"\
+            "MOV.L		#_ulPortTaskHasDPFPUContext, R14	\n"\
+            "MOV.L		R15, [R14]							\n"\
+
+        #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
+
+            /* Restore the DPFPU context. */
+            "DPOPM.L	DPSW-DECNT				\n"\
+            "DPOPM.D	DR0-DR15				\n"\
+
+        #endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
+
+        "POP		R15						\n"\
+
+        /* Accumulator low 32 bits. */
+        "MVTACLO	R15, A0					\n"\
+        "POP		R15						\n"\
+
+        /* Accumulator high 32 bits. */
+        "MVTACHI	R15, A0					\n"\
+        "POP		R15						\n"\
+
+        /* Accumulator guard. */
+        "MVTACGU	R15, A0					\n"\
+        "POP		R15						\n"\
+
+        /* Accumulator low 32 bits. */
+        "MVTACLO	R15, A1					\n"\
+        "POP		R15						\n"\
+
+        /* Accumulator high 32 bits. */
+        "MVTACHI	R15, A1					\n"\
+        "POP		R15						\n"\
+
+        /* Accumulator guard. */
+        "MVTACGU	R15, A1					\n"\
+        "POP		R15						\n"\
+
+        /* Floating point status word. */
+        "MVTC		R15, FPSW 				\n"\
+
+        /* R1 to R15 - R0 is not included as it is the SP. */
+        "POPM		R1-R15 					\n"\
+
+        /* This pops the remaining registers. */
+        "RTE								\n"\
+        "NOP								\n"\
+        "NOP								\n"
+    );
+}
+/*-----------------------------------------------------------*/
+
+void vSoftwareInterruptISR( void )
+{
+    __asm volatile
+    (
+        /* Re-enable interrupts. */
+        "SETPSW		I							\n"\
+
+
+        /* Move the data that was automatically pushed onto the interrupt stack when
+         * the interrupt occurred from the interrupt stack to the user stack.
+         *
+         * R15 is saved before it is clobbered. */
+        "PUSH.L		R15							\n"\
+
+        /* Read the user stack pointer. */
+        "MVFC		USP, R15					\n"\
+
+        /* Move the address down to the data being moved. */
+        "SUB		#12, R15					\n"\
+        "MVTC		R15, USP					\n"\
+
+        /* Copy the data across, R15, then PC, then PSW. */
+        "MOV.L		[ R0 ], [ R15 ]				\n"\
+        "MOV.L 		4[ R0 ], 4[ R15 ]			\n"\
+        "MOV.L		8[ R0 ], 8[ R15 ]			\n"\
+
+        /* Move the interrupt stack pointer to its new correct position. */
+        "ADD		#12, R0						\n"\
+
+        /* All the rest of the registers are saved directly to the user stack. */
+        "SETPSW		U							\n"\
+
+        /* Save the rest of the general registers (R15 has been saved already). */
+        "PUSHM		R1-R14						\n"\
+
+        /* Save the FPSW and accumulators. */
+        "MVFC		FPSW, R15					\n"\
+        "PUSH.L		R15							\n"\
+        "MVFACGU	#0, A1, R15					\n"\
+        "PUSH.L		R15							\n"\
+        "MVFACHI	#0, A1, R15					\n"\
+        "PUSH.L		R15							\n"\
+        "MVFACLO	#0, A1, R15					\n" /* Low order word. */ \
+        "PUSH.L		R15							\n"\
+        "MVFACGU	#0, A0, R15					\n"\
+        "PUSH.L		R15							\n"\
+        "MVFACHI	#0, A0, R15					\n"\
+        "PUSH.L		R15							\n"\
+        "MVFACLO	#0, A0, R15					\n" /* Low order word. */ \
+        "PUSH.L		R15							\n"\
+
+        #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
+
+            /* Does the task have a DPFPU context that needs saving?  If
+             * ulPortTaskHasDPFPUContext is 0 then no. */
+            "MOV.L		#_ulPortTaskHasDPFPUContext, R15	\n"\
+            "MOV.L		[R15], R15							\n"\
+            "CMP		#0, R15								\n"\
+
+            /* Save the DPFPU context, if any. */
+            "BEQ.B		?+							\n"\
+            "DPUSHM.D	DR0-DR15					\n"\
+            "DPUSHM.L	DPSW-DECNT					\n"\
+            "?:										\n"\
+
+            /* Save ulPortTaskHasDPFPUContext itself. */
+            "PUSH.L		R15							\n"\
+
+        #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
+
+            /* Save the DPFPU context, always. */
+            "DPUSHM.D	DR0-DR15					\n"\
+            "DPUSHM.L	DPSW-DECNT					\n"\
+
+        #endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
+
+
+        /* Save the stack pointer to the TCB. */
+        "MOV.L		#_pxCurrentTCB, R15			\n"\
+        "MOV.L		[ R15 ], R15				\n"\
+        "MOV.L		R0, [ R15 ]					\n"\
+
+
+        /* Ensure the interrupt mask is set to the syscall priority while the kernel
+         * structures are being accessed. */
+        "MVTIPL		%0 							\n"\
+
+        /* Select the next task to run. */
+        "BSR.A		_vTaskSwitchContext			\n"\
+
+        /* Reset the interrupt mask as no more data structure access is required. */
+        "MVTIPL		%1							\n"\
+
+
+        /* Load the stack pointer of the task that is now selected as the Running
+         * state task from its TCB. */
+        "MOV.L		#_pxCurrentTCB,R15			\n"\
+        "MOV.L		[ R15 ], R15				\n"\
+        "MOV.L		[ R15 ], R0					\n"\
+
+
+        /* Restore the context of the new task.  The PSW (Program Status Word) and
+         * PC will be popped by the RTE instruction. */
+
+        #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
+
+            /* Is there a DPFPU context to restore?  If the restored
+             * ulPortTaskHasDPFPUContext is zero then no. */
+            "POP		R15									\n"\
+            "MOV.L		#_ulPortTaskHasDPFPUContext, R14	\n"\
+            "MOV.L		R15, [R14]							\n"\
+            "CMP		#0, R15								\n"\
+
+            /* Restore the DPFPU context, if any. */
+            "BEQ.B		?+							\n"\
+            "DPOPM.L	DPSW-DECNT					\n"\
+            "DPOPM.D	DR0-DR15					\n"\
+            "?:										\n"\
+
+        #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
+
+            /* Restore the DPFPU context, always. */
+            "DPOPM.L	DPSW-DECNT					\n"\
+            "DPOPM.D	DR0-DR15					\n"\
+
+        #endif /* if( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
+
+        "POP		R15							\n"\
+
+        /* Accumulator low 32 bits. */
+        "MVTACLO	R15, A0						\n"\
+        "POP		R15							\n"\
+
+        /* Accumulator high 32 bits. */
+        "MVTACHI	R15, A0						\n"\
+        "POP		R15							\n"\
+
+        /* Accumulator guard. */
+        "MVTACGU	R15, A0						\n"\
+        "POP		R15							\n"\
+
+        /* Accumulator low 32 bits. */
+        "MVTACLO	R15, A1						\n"\
+        "POP		R15							\n"\
+
+        /* Accumulator high 32 bits. */
+        "MVTACHI	R15, A1						\n"\
+        "POP		R15							\n"\
+
+        /* Accumulator guard. */
+        "MVTACGU	R15, A1						\n"\
+        "POP		R15							\n"\
+        "MVTC		R15, FPSW					\n"\
+        "POPM		R1-R15						\n"\
+        "RTE									\n"\
+        "NOP									\n"\
+        "NOP									  "
+        ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ), "i" ( configKERNEL_INTERRUPT_PRIORITY )
+    );
+}
+/*-----------------------------------------------------------*/
+
+void vTickISR( void )
+{
+    /* Re-enabled interrupts. */
+    __asm volatile ( "SETPSW	I");
+
+    /* Increment the tick, and perform any processing the new tick value
+     * necessitates.  Ensure IPL is at the max syscall value first. */
+    portMASK_INTERRUPTS_FROM_KERNEL_ISR();
+    {
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            taskYIELD();
+        }
+    }
+    portUNMASK_INTERRUPTS_FROM_KERNEL_ISR();
+}
+/*-----------------------------------------------------------*/
+
+uint32_t ulPortGetIPL( void )
+{
+    __asm volatile
+    (
+        "MVFC	PSW, R1			\n"\
+        "SHLR	#24, R1			\n"\
+        "RTS					  "
+    );
+
+    /* This will never get executed, but keeps the compiler from complaining. */
+    return 0;
+}
+/*-----------------------------------------------------------*/
+
+void vPortSetIPL( uint32_t ulNewIPL )
+{
+    /* Avoid compiler warning about unreferenced parameter. */
+    ( void ) ulNewIPL;
+
+    __asm volatile
+    (
+        "PUSH	R5				\n"\
+        "MVFC	PSW, R5			\n"\
+        "SHLL	#24, R1			\n"\
+        "AND	#-0F000001H, R5 \n"\
+        "OR		R1, R5			\n"\
+        "MVTC	R5, PSW			\n"\
+        "POP	R5				\n"\
+        "RTS					  "
+    );
+}
+/*-----------------------------------------------------------*/
diff --git a/portable/GCC/RX700v3_DPFPU/portmacro.h b/portable/GCC/RX700v3_DPFPU/portmacro.h
new file mode 100644
index 000000000..28a308770
--- /dev/null
+++ b/portable/GCC/RX700v3_DPFPU/portmacro.h
@@ -0,0 +1,186 @@
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef PORTMACRO_H
+    #define PORTMACRO_H
+
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
+
+/*-----------------------------------------------------------
+ * Port specific definitions.
+ *
+ * The settings in this file configure FreeRTOS correctly for the
+ * given hardware and compiler.
+ *
+ * These settings should not be altered.
+ *-----------------------------------------------------------
+ */
+
+/* When the FIT configurator or the Smart Configurator is used, platform.h has to be 
+ * used. */
+    #ifndef configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H
+        #define configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H 0
+    #endif
+
+/* If configUSE_TASK_DPFPU_SUPPORT is set to 1 (or undefined) then each task will
+ * be created without a DPFPU context, and a task must call vTaskUsesDPFPU() before
+ * making use of any DPFPU registers.  If configUSE_TASK_DPFPU_SUPPORT is set to 2 then
+ * tasks are created with a DPFPU context by default, and calling vTaskUsesDPFPU() has
+ * no effect.  If configUSE_TASK_DPFPU_SUPPORT is set to 0 then tasks never take care
+ * of any DPFPU context (even if DPFPU registers are used). */
+    #ifndef configUSE_TASK_DPFPU_SUPPORT
+        #define configUSE_TASK_DPFPU_SUPPORT 1
+    #endif
+
+/*-----------------------------------------------------------*/
+
+/* Type definitions - these are a bit legacy and not really used now, other than
+ * portSTACK_TYPE and portBASE_TYPE. */
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
+
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
+
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
+
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
+
+/*-----------------------------------------------------------*/
+
+/* Hardware specifics. */
+    #define portBYTE_ALIGNMENT    8     /* Could make four, according to manual. */
+    #define portSTACK_GROWTH      -1
+    #define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portNOP()    __asm volatile ( "NOP" )
+
+/* Yield equivalent to "*portITU_SWINTR = 0x01; ( void ) *portITU_SWINTR;"
+ * where portITU_SWINTR is the location of the software interrupt register
+ * (0x000872E0).  Don't rely on the assembler to select a register, so instead
+ * save and restore clobbered registers manually. */
+    #define portYIELD()           \
+    __asm volatile                \
+    (                             \
+        "PUSH.L	R10					\n"\
+        "MOV.L	#0x872E0, R10		\n"\
+        "MOV.B	#0x1, [R10]			\n"\
+        "CMP	[R10].UB, R10		\n"\
+        "POP    R10					\n"\
+        :::"cc"						\
+    )
+
+    #define portYIELD_FROM_ISR( x )                           if( ( x ) != pdFALSE ) portYIELD()
+
+/* Workaround to reduce errors/warnings caused by e2 studio CDT's INDEXER and CODAN. */
+    #ifdef __CDT_PARSER__
+    #ifndef __asm
+    #define __asm asm
+    #endif
+    #ifndef __attribute__
+    #define __attribute__( ... )
+    #endif
+    #endif
+
+/* These macros should not be called directly, but through the
+ * taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros.  An extra check is
+ * performed if configASSERT() is defined to ensure an assertion handler does not
+ * inadvertently attempt to lower the IPL when the call to assert was triggered
+ * because the IPL value was found to be above	configMAX_SYSCALL_INTERRUPT_PRIORITY
+ * when an ISR safe FreeRTOS API function was executed.  ISR safe FreeRTOS API
+ * functions are those that end in FromISR.  FreeRTOS maintains a separate
+ * interrupt API to ensure API function and interrupt entry is as fast and as
+ * simple as possible. */
+    #define portENABLE_INTERRUPTS()                           __asm volatile ( "MVTIPL	#0")
+    #ifdef configASSERT
+        #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()    configASSERT( ( ulPortGetIPL() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
+        #define portDISABLE_INTERRUPTS()                      if( ulPortGetIPL() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) __asm volatile ( "MVTIPL	%0"::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
+    #else
+        #define portDISABLE_INTERRUPTS()                      __asm volatile ( "MVTIPL	%0"::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
+    #endif
+
+/* Critical nesting counts are stored in the TCB. */
+    #define portCRITICAL_NESTING_IN_TCB    ( 1 )
+
+/* The critical nesting functions defined within tasks.c. */
+    extern void vTaskEnterCritical( void );
+    extern void vTaskExitCritical( void );
+    #define portENTER_CRITICAL()    vTaskEnterCritical()
+    #define portEXIT_CRITICAL()     vTaskExitCritical()
+
+/* As this port allows interrupt nesting... */
+    uint32_t ulPortGetIPL( void ) __attribute__( ( naked ) );
+    void vPortSetIPL( uint32_t ulNewIPL ) __attribute__( ( naked ) );
+    #define portSET_INTERRUPT_MASK_FROM_ISR()                              ulPortGetIPL(); portDISABLE_INTERRUPTS()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus )    vPortSetIPL( uxSavedInterruptStatus )
+
+/*-----------------------------------------------------------*/
+
+/* Task function macros as described on the FreeRTOS.org WEB site. */
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
+
+/*-----------------------------------------------------------*/
+
+/* If configUSE_TASK_DPFPU_SUPPORT is set to 1 (or left undefined) then tasks are
+ * created without a DPFPU context and must call vPortTaskUsesDPFPU() to give
+ * themselves a DPFPU context before using any DPFPU instructions.  If
+ * configUSE_TASK_DPFPU_SUPPORT is set to 2 then all tasks will have a DPFPU context
+ * by default. */
+    #if( configUSE_TASK_DPFPU_SUPPORT == 1 )
+        void vPortTaskUsesDPFPU( void );
+    #else
+/* Each task has a DPFPU context already, so define this function away to
+ * nothing to prevent it being called accidentally. */
+        #define vPortTaskUsesDPFPU()
+    #endif
+    #define portTASK_USES_DPFPU() vPortTaskUsesDPFPU()
+
+/* Definition to allow compatibility with existing FreeRTOS Demo using flop.c. */
+    #define portTASK_USES_FLOATING_POINT() vPortTaskUsesDPFPU()
+
+    #ifdef __cplusplus
+        }
+    #endif
+
+#endif /* PORTMACRO_H */
diff --git a/portable/GCC/STR75x/port.c b/portable/GCC/STR75x/port.c
index dc27a140f..32b3f808b 100644
--- a/portable/GCC/STR75x/port.c
+++ b/portable/GCC/STR75x/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/STR75x/portISR.c b/portable/GCC/STR75x/portISR.c
index 5d29df885..3a2c1f235 100644
--- a/portable/GCC/STR75x/portISR.c
+++ b/portable/GCC/STR75x/portISR.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/STR75x/portmacro.h b/portable/GCC/STR75x/portmacro.h
index 2bd6d4315..45b20daf3 100644
--- a/portable/GCC/STR75x/portmacro.h
+++ b/portable/GCC/STR75x/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/TriCore_1782/port.c b/portable/GCC/TriCore_1782/port.c
index c43cfa4ad..0f78d40c7 100644
--- a/portable/GCC/TriCore_1782/port.c
+++ b/portable/GCC/TriCore_1782/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/TriCore_1782/portmacro.h b/portable/GCC/TriCore_1782/portmacro.h
index 2e2a483e5..f00f7108c 100644
--- a/portable/GCC/TriCore_1782/portmacro.h
+++ b/portable/GCC/TriCore_1782/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/GCC/TriCore_1782/porttrap.c b/portable/GCC/TriCore_1782/porttrap.c
index 039321b18..550115b4c 100644
--- a/portable/GCC/TriCore_1782/porttrap.c
+++ b/portable/GCC/TriCore_1782/porttrap.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/78K0R/ISR_Support.h b/portable/IAR/78K0R/ISR_Support.h
index 4e39841d2..9987bb605 100644
--- a/portable/IAR/78K0R/ISR_Support.h
+++ b/portable/IAR/78K0R/ISR_Support.h
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/IAR/78K0R/port.c b/portable/IAR/78K0R/port.c
index 4fb2047e6..cb91efcf7 100644
--- a/portable/IAR/78K0R/port.c
+++ b/portable/IAR/78K0R/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/78K0R/portasm.s26 b/portable/IAR/78K0R/portasm.s26
index 305ef8914..17f274b2c 100644
--- a/portable/IAR/78K0R/portasm.s26
+++ b/portable/IAR/78K0R/portasm.s26
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/IAR/78K0R/portmacro.h b/portable/IAR/78K0R/portmacro.h
index 79efeed05..31e0f5663 100644
--- a/portable/IAR/78K0R/portmacro.h
+++ b/portable/IAR/78K0R/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/ARM_CA5_No_GIC/port.c b/portable/IAR/ARM_CA5_No_GIC/port.c
index 25b5fb518..4ffe80186 100644
--- a/portable/IAR/ARM_CA5_No_GIC/port.c
+++ b/portable/IAR/ARM_CA5_No_GIC/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/ARM_CA5_No_GIC/portASM.h b/portable/IAR/ARM_CA5_No_GIC/portASM.h
index c05026817..91fc2859e 100644
--- a/portable/IAR/ARM_CA5_No_GIC/portASM.h
+++ b/portable/IAR/ARM_CA5_No_GIC/portASM.h
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/IAR/ARM_CA5_No_GIC/portASM.s b/portable/IAR/ARM_CA5_No_GIC/portASM.s
index 6a3e8ebc9..a2554d49e 100644
--- a/portable/IAR/ARM_CA5_No_GIC/portASM.s
+++ b/portable/IAR/ARM_CA5_No_GIC/portASM.s
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/IAR/ARM_CA5_No_GIC/portmacro.h b/portable/IAR/ARM_CA5_No_GIC/portmacro.h
index da2f30b80..45b6de91e 100644
--- a/portable/IAR/ARM_CA5_No_GIC/portmacro.h
+++ b/portable/IAR/ARM_CA5_No_GIC/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/ARM_CA9/port.c b/portable/IAR/ARM_CA9/port.c
index a1d9c290e..ca0335d12 100644
--- a/portable/IAR/ARM_CA9/port.c
+++ b/portable/IAR/ARM_CA9/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -36,23 +36,23 @@
 #include "task.h"
 
 #ifndef configINTERRUPT_CONTROLLER_BASE_ADDRESS
-	#error configINTERRUPT_CONTROLLER_BASE_ADDRESS must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+	#error configINTERRUPT_CONTROLLER_BASE_ADDRESS must be defined.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif
 
 #ifndef configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET
-	#error configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+	#error configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET must be defined.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif
 
 #ifndef configUNIQUE_INTERRUPT_PRIORITIES
-	#error configUNIQUE_INTERRUPT_PRIORITIES must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+	#error configUNIQUE_INTERRUPT_PRIORITIES must be defined.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif
 
 #ifndef configSETUP_TICK_INTERRUPT
-	#error configSETUP_TICK_INTERRUPT() must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+	#error configSETUP_TICK_INTERRUPT() must be defined.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif /* configSETUP_TICK_INTERRUPT */
 
 #ifndef configMAX_API_CALL_INTERRUPT_PRIORITY
-	#error configMAX_API_CALL_INTERRUPT_PRIORITY must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+	#error configMAX_API_CALL_INTERRUPT_PRIORITY must be defined.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif
 
 #if configMAX_API_CALL_INTERRUPT_PRIORITY == 0
@@ -417,8 +417,8 @@ uint32_t ulReturn;
 		interrupt entry is as fast and simple as possible.
 
 		The following links provide detailed information:
-		http://www.freertos.org/RTOS-Cortex-M3-M4.html
-		http://www.freertos.org/FAQHelp.html */
+		https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+		https://www.FreeRTOS.org/FAQHelp.html */
 		configASSERT( portICCRPR_RUNNING_PRIORITY_REGISTER >= ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) );
 
 		/* Priority grouping:  The interrupt controller (GIC) allows the bits
diff --git a/portable/IAR/ARM_CA9/portASM.h b/portable/IAR/ARM_CA9/portASM.h
index 4ecbc9ffc..20343d919 100644
--- a/portable/IAR/ARM_CA9/portASM.h
+++ b/portable/IAR/ARM_CA9/portASM.h
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/IAR/ARM_CA9/portASM.s b/portable/IAR/ARM_CA9/portASM.s
index cfebd3219..2ed41d2e8 100644
--- a/portable/IAR/ARM_CA9/portASM.s
+++ b/portable/IAR/ARM_CA9/portASM.s
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/IAR/ARM_CA9/portmacro.h b/portable/IAR/ARM_CA9/portmacro.h
index 2b1baa590..cb8e418d9 100644
--- a/portable/IAR/ARM_CA9/portmacro.h
+++ b/portable/IAR/ARM_CA9/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/ARM_CM0/port.c b/portable/IAR/ARM_CM0/port.c
index a7833d4ea..0007da123 100644
--- a/portable/IAR/ARM_CM0/port.c
+++ b/portable/IAR/ARM_CM0/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,15 +19,14 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------
- * Implementation of functions defined in portable.h for the ARM CM0 port.
- *----------------------------------------------------------*/
+* Implementation of functions defined in portable.h for the ARM CM0 port.
+*----------------------------------------------------------*/
 
 /* IAR includes. */
 #include "intrinsics.h"
@@ -37,58 +36,58 @@
 #include "task.h"
 
 /* Constants required to manipulate the NVIC. */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_INT_CTRL_REG				( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t *) 0xe000ed20 ) )
-#define portNVIC_SYSTICK_CLK_BIT			( 1UL << 2UL )
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portMIN_INTERRUPT_PRIORITY	( 255UL )
-#define portNVIC_PENDSV_PRI			( portMIN_INTERRUPT_PRIORITY << 16UL )
-#define portNVIC_SYSTICK_PRI		( portMIN_INTERRUPT_PRIORITY << 24UL )
+#define portNVIC_SYSTICK_CTRL_REG             ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG             ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG    ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_INT_CTRL_REG                 ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+#define portNVIC_SHPR3_REG                    ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_CLK_BIT              ( 1UL << 2UL )
+#define portNVIC_SYSTICK_INT_BIT              ( 1UL << 1UL )
+#define portNVIC_SYSTICK_ENABLE_BIT           ( 1UL << 0UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT       ( 1UL << 16UL )
+#define portMIN_INTERRUPT_PRIORITY            ( 255UL )
+#define portNVIC_PENDSV_PRI                   ( portMIN_INTERRUPT_PRIORITY << 16UL )
+#define portNVIC_SYSTICK_PRI                  ( portMIN_INTERRUPT_PRIORITY << 24UL )
 
 /* Constants required to set up the initial stack. */
-#define portINITIAL_XPSR			( 0x01000000 )
+#define portINITIAL_XPSR                      ( 0x01000000 )
 
 /* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is
-defined.  The value 255 should also ensure backward compatibility.
-FreeRTOS.org versions prior to V4.3.0 did not include this definition. */
+ * defined.  The value 255 should also ensure backward compatibility.
+ * FreeRTOS.org versions prior to V4.3.0 did not include this definition. */
 #ifndef configKERNEL_INTERRUPT_PRIORITY
-	#define configKERNEL_INTERRUPT_PRIORITY 0
+    #define configKERNEL_INTERRUPT_PRIORITY    0
 #endif
 
 /* Each task maintains its own interrupt status in the critical nesting
-variable. */
+ * variable. */
 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 
 /* The systick is a 24-bit counter. */
-#define portMAX_24_BIT_NUMBER				( 0xffffffUL )
+#define portMAX_24_BIT_NUMBER    ( 0xffffffUL )
 
 /* A fiddle factor to estimate the number of SysTick counts that would have
-occurred while the SysTick counter is stopped during tickless idle
-calculations. */
+ * occurred while the SysTick counter is stopped during tickless idle
+ * calculations. */
 #ifndef portMISSED_COUNTS_FACTOR
-	#define portMISSED_COUNTS_FACTOR			( 45UL )
+    #define portMISSED_COUNTS_FACTOR    ( 45UL )
 #endif
 
 /* The number of SysTick increments that make up one tick period. */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulTimerCountsForOneTick = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulTimerCountsForOneTick = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /* The maximum number of tick periods that can be suppressed is limited by the
-24 bit resolution of the SysTick timer. */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
+ * 24 bit resolution of the SysTick timer. */
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t xMaximumPossibleSuppressedTicks = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /* Compensate for the CPU cycles that pass while the SysTick is stopped (low
-power functionality only. */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulStoppedTimerCompensation = 0;
+ * power functionality only. */
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulStoppedTimerCompensation = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
@@ -96,7 +95,6 @@ power functionality only. */
  * file is weak to allow application writers to change the timer used to
  * generate the tick interrupt.
  */
-#pragma weak vPortSetupTimerInterrupt
 void vPortSetupTimerInterrupt( void );
 
 /*
@@ -119,35 +117,40 @@ static void prvTaskExitError( void );
 /*
  * See header file for description.
  */
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	interrupt. */
-	pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) pxCode;	/* PC */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) prvTaskExitError;	/* LR */
-	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
-	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
-	pxTopOfStack -= 8; /* R11..R4. */
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
+    pxTopOfStack--;                                   /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+    *pxTopOfStack = portINITIAL_XPSR;                 /* xPSR */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) pxCode;           /* PC */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) prvTaskExitError; /* LR */
+    pxTopOfStack -= 5;                                /* R12, R3, R2 and R1. */
+    *pxTopOfStack = ( StackType_t ) pvParameters;     /* R0 */
+    pxTopOfStack -= 8;                                /* R11..R4. */
 
-	return pxTopOfStack;
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 static void prvTaskExitError( void )
 {
-	/* A function that implements a task must not exit or attempt to return to
-	its caller as there is nothing to return to.  If a task wants to exit it
-	should instead call vTaskDelete( NULL ).
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to.  If a task wants to exit it
+     * should instead call vTaskDelete( NULL ).
+     *
+     * Artificially force an assert() to be triggered if configASSERT() is
+     * defined, then stop here so application writers can catch the error. */
+    configASSERT( uxCriticalNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
 
-	Artificially force an assert() to be triggered if configASSERT() is
-	defined, then stop here so application writers can catch the error. */
-	configASSERT( uxCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
-	for( ;; );
+    for( ; ; )
+    {
+    }
 }
 /*-----------------------------------------------------------*/
 
@@ -156,79 +159,80 @@ static void prvTaskExitError( void )
  */
 BaseType_t xPortStartScheduler( void )
 {
-	/* Make PendSV and SysTick the lowest priority interrupts. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+    /* Make PendSV and SysTick the lowest priority interrupts. */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
-	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-	here already. */
-	vPortSetupTimerInterrupt();
+    /* Start the timer that generates the tick ISR.  Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
 
-	/* Initialise the critical nesting count ready for the first task. */
-	uxCriticalNesting = 0;
+    /* Initialise the critical nesting count ready for the first task. */
+    uxCriticalNesting = 0;
 
-	/* Start the first task. */
-	vPortStartFirstTask();
+    /* Start the first task. */
+    vPortStartFirstTask();
 
-	/* Should not get here! */
-	return 0;
+    /* Should not get here! */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void )
 {
-	/* Not implemented in ports where there is nothing to return to.
-	Artificially force an assert. */
-	configASSERT( uxCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( uxCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
 void vPortYield( void )
 {
-	/* Set a PendSV to request a context switch. */
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET;
+    /* Set a PendSV to request a context switch. */
+    portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET;
 
-	/* Barriers are normally not required but do ensure the code is completely
-	within the specified behaviour for the architecture. */
-	__DSB();
-	__ISB();
+    /* Barriers are normally not required but do ensure the code is completely
+     * within the specified behaviour for the architecture. */
+    __DSB();
+    __ISB();
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void )
 {
-	portDISABLE_INTERRUPTS();
-	uxCriticalNesting++;
-	__DSB();
-	__ISB();
+    portDISABLE_INTERRUPTS();
+    uxCriticalNesting++;
+    __DSB();
+    __ISB();
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void )
 {
-	configASSERT( uxCriticalNesting );
-	uxCriticalNesting--;
-	if( uxCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
+    configASSERT( uxCriticalNesting );
+    uxCriticalNesting--;
+
+    if( uxCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
 }
 /*-----------------------------------------------------------*/
 
 void xPortSysTickHandler( void )
 {
-uint32_t ulPreviousMask;
+    uint32_t ulPreviousMask;
 
-	ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* Pend a context switch. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
+    ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* Pend a context switch. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET;
+        }
+    }
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
 }
 /*-----------------------------------------------------------*/
 
@@ -236,189 +240,192 @@ uint32_t ulPreviousMask;
  * Setup the systick timer to generate the tick interrupts at the required
  * frequency.
  */
-void vPortSetupTimerInterrupt( void )
+__weak void vPortSetupTimerInterrupt( void )
 {
-	/* Calculate the constants required to configure the tick interrupt. */
-	#if( configUSE_TICKLESS_IDLE == 1 )
-	{
-		ulTimerCountsForOneTick = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );
-		xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR;
-	}
-	#endif /* configUSE_TICKLESS_IDLE */
+    /* Calculate the constants required to configure the tick interrupt. */
+    #if ( configUSE_TICKLESS_IDLE == 1 )
+        {
+            ulTimerCountsForOneTick = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );
+            xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+            ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR;
+        }
+    #endif /* configUSE_TICKLESS_IDLE */
 
-	/* Stop and reset the SysTick. */
-	portNVIC_SYSTICK_CTRL_REG = 0UL;
-	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+    /* Stop and reset the SysTick. */
+    portNVIC_SYSTICK_CTRL_REG = 0UL;
+    portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-	/* Configure SysTick to interrupt at the requested rate. */
-	portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
+    /* Configure SysTick to interrupt at the requested rate. */
+    portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+    portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
 }
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TICKLESS_IDLE == 1 )
+#if ( configUSE_TICKLESS_IDLE == 1 )
 
-__weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-{
-uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
-TickType_t xModifiableIdleTime;
+    __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+    {
+        uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+        TickType_t xModifiableIdleTime;
 
-	/* Make sure the SysTick reload value does not overflow the counter. */
-	if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-	{
-		xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-	}
+        /* Make sure the SysTick reload value does not overflow the counter. */
+        if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+        {
+            xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+        }
 
-	/* Stop the SysTick momentarily.  The time the SysTick is stopped for
-	is accounted for as best it can be, but using the tickless mode will
-	inevitably result in some tiny drift of the time maintained by the
-	kernel with respect to calendar time. */
-	portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+        /* Stop the SysTick momentarily.  The time the SysTick is stopped for
+         * is accounted for as best it can be, but using the tickless mode will
+         * inevitably result in some tiny drift of the time maintained by the
+         * kernel with respect to calendar time. */
+        portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
 
-	/* Calculate the reload value required to wait xExpectedIdleTime
-	tick periods.  -1 is used because this code will execute part way
-	through one of the tick periods. */
-	ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-	if( ulReloadValue > ulStoppedTimerCompensation )
-	{
-		ulReloadValue -= ulStoppedTimerCompensation;
-	}
+        /* Calculate the reload value required to wait xExpectedIdleTime
+         * tick periods.  -1 is used because this code will execute part way
+         * through one of the tick periods. */
+        ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
 
-	/* Enter a critical section but don't use the taskENTER_CRITICAL()
-	method as that will mask interrupts that should exit sleep mode. */
-	__disable_interrupt();
-	__DSB();
-	__ISB();
+        if( ulReloadValue > ulStoppedTimerCompensation )
+        {
+            ulReloadValue -= ulStoppedTimerCompensation;
+        }
 
-	/* If a context switch is pending or a task is waiting for the scheduler
-	to be unsuspended then abandon the low power entry. */
-	if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-	{
-		/* Restart from whatever is left in the count register to complete
-		this tick period. */
-		portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+        /* Enter a critical section but don't use the taskENTER_CRITICAL()
+         * method as that will mask interrupts that should exit sleep mode. */
+        __disable_interrupt();
+        __DSB();
+        __ISB();
 
-		/* Restart SysTick. */
-		portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+        /* If a context switch is pending or a task is waiting for the scheduler
+         * to be unsuspended then abandon the low power entry. */
+        if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+        {
+            /* Restart from whatever is left in the count register to complete
+             * this tick period. */
+            portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-		/* Reset the reload register to the value required for normal tick
-		periods. */
-		portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-		/* Re-enable interrupts - see comments above __disable_interrupt()
-		call above. */
-		__enable_interrupt();
-	}
-	else
-	{
-		/* Set the new reload value. */
-		portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+            /* Reset the reload register to the value required for normal tick
+             * periods. */
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
 
-		/* Clear the SysTick count flag and set the count value back to
-		zero. */
-		portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            /* Re-enable interrupts - see comments above __disable_interrupt()
+             * call above. */
+            __enable_interrupt();
+        }
+        else
+        {
+            /* Set the new reload value. */
+            portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
 
-		/* Restart SysTick. */
-		portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            /* Clear the SysTick count flag and set the count value back to
+             * zero. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-		/* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
-		set its parameter to 0 to indicate that its implementation contains
-		its own wait for interrupt or wait for event instruction, and so wfi
-		should not be executed again.  However, the original expected idle
-		time variable must remain unmodified, so a copy is taken. */
-		xModifiableIdleTime = xExpectedIdleTime;
-		configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-		if( xModifiableIdleTime > 0 )
-		{
-			__DSB();
-			__WFI();
-			__ISB();
-		}
-		configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-		/* Re-enable interrupts to allow the interrupt that brought the MCU
-		out of sleep mode to execute immediately.  see comments above
-		__disable_interrupt() call above. */
-		__enable_interrupt();
-		__DSB();
-		__ISB();
+            /* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
+             * set its parameter to 0 to indicate that its implementation contains
+             * its own wait for interrupt or wait for event instruction, and so wfi
+             * should not be executed again.  However, the original expected idle
+             * time variable must remain unmodified, so a copy is taken. */
+            xModifiableIdleTime = xExpectedIdleTime;
+            configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
 
-		/* Disable interrupts again because the clock is about to be stopped
-		and interrupts that execute while the clock is stopped will increase
-		any slippage between the time maintained by the RTOS and calendar
-		time. */
-		__disable_interrupt();
-		__DSB();
-		__ISB();
+            if( xModifiableIdleTime > 0 )
+            {
+                __DSB();
+                __WFI();
+                __ISB();
+            }
 
-		/* Disable the SysTick clock without reading the
-		portNVIC_SYSTICK_CTRL_REG register to ensure the
-		portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
-		the time the SysTick is stopped for is accounted for as best it can
-		be, but using the tickless mode will inevitably result in some tiny
-		drift of the time maintained by the kernel with respect to calendar
-		time*/
-		portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+            configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
 
-		/* Determine if the SysTick clock has already counted to zero and
-		been set back to the current reload value (the reload back being
-		correct for the entire expected idle time) or if the SysTick is yet
-		to count to zero (in which case an interrupt other than the SysTick
-		must have brought the system out of sleep mode). */
-		if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-		{
-			uint32_t ulCalculatedLoadValue;
+            /* Re-enable interrupts to allow the interrupt that brought the MCU
+             * out of sleep mode to execute immediately.  see comments above
+             * __disable_interrupt() call above. */
+            __enable_interrupt();
+            __DSB();
+            __ISB();
 
-			/* The tick interrupt is already pending, and the SysTick count
-			reloaded with ulReloadValue.  Reset the
-			portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
-			period. */
-			ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+            /* Disable interrupts again because the clock is about to be stopped
+             * and interrupts that execute while the clock is stopped will increase
+             * any slippage between the time maintained by the RTOS and calendar
+             * time. */
+            __disable_interrupt();
+            __DSB();
+            __ISB();
 
-			/* Don't allow a tiny value, or values that have somehow
-			underflowed because the post sleep hook did something
-			that took too long. */
-			if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-			{
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-			}
+            /* Disable the SysTick clock without reading the
+             * portNVIC_SYSTICK_CTRL_REG register to ensure the
+             * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
+             * the time the SysTick is stopped for is accounted for as best it can
+             * be, but using the tickless mode will inevitably result in some tiny
+             * drift of the time maintained by the kernel with respect to calendar
+             * time*/
+            portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
 
-			portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+            /* Determine if the SysTick clock has already counted to zero and
+             * been set back to the current reload value (the reload back being
+             * correct for the entire expected idle time) or if the SysTick is yet
+             * to count to zero (in which case an interrupt other than the SysTick
+             * must have brought the system out of sleep mode). */
+            if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+            {
+                uint32_t ulCalculatedLoadValue;
 
-			/* As the pending tick will be processed as soon as this
-			function exits, the tick value maintained by the tick is stepped
-			forward by one less than the time spent waiting. */
-			ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-		}
-		else
-		{
-			/* Something other than the tick interrupt ended the sleep.
-			Work out how long the sleep lasted rounded to complete tick
-			periods (not the ulReload value which accounted for part
-			ticks). */
-			ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG ;
+                /* The tick interrupt is already pending, and the SysTick count
+                 * reloaded with ulReloadValue.  Reset the
+                 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+                 * period. */
+                ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
 
-			/* How many complete tick periods passed while the processor
-			was waiting? */
-			ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+                /* Don't allow a tiny value, or values that have somehow
+                 * underflowed because the post sleep hook did something
+                 * that took too long. */
+                if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+                {
+                    ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+                }
 
-			/* The reload value is set to whatever fraction of a single tick
-			period remains. */
-			portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-		}
+                portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
 
-		/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
-		again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
-		value. */
-		portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-		portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-		vTaskStepTick( ulCompleteTickPeriods );
-		portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+                /* As the pending tick will be processed as soon as this
+                 * function exits, the tick value maintained by the tick is stepped
+                 * forward by one less than the time spent waiting. */
+                ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+            }
+            else
+            {
+                /* Something other than the tick interrupt ended the sleep.
+                 * Work out how long the sleep lasted rounded to complete tick
+                 * periods (not the ulReload value which accounted for part
+                 * ticks). */
+                ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-		/* Exit with interrpts enabled. */
-		__enable_interrupt();
-	}
-}
+                /* How many complete tick periods passed while the processor
+                 * was waiting? */
+                ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+                /* The reload value is set to whatever fraction of a single tick
+                 * period remains. */
+                portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+            }
+
+            /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+             * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+             * value. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            vTaskStepTick( ulCompleteTickPeriods );
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Exit with interrpts enabled. */
+            __enable_interrupt();
+        }
+    }
 
 #endif /* configUSE_TICKLESS_IDLE */
diff --git a/portable/IAR/ARM_CM0/portasm.s b/portable/IAR/ARM_CM0/portasm.s
index 8e2d0a28a..2a5aaf901 100644
--- a/portable/IAR/ARM_CM0/portasm.s
+++ b/portable/IAR/ARM_CM0/portasm.s
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/ARM_CM0/portmacro.h b/portable/IAR/ARM_CM0/portmacro.h
index 84a5de59d..72cae5789 100644
--- a/portable/IAR/ARM_CM0/portmacro.h
+++ b/portable/IAR/ARM_CM0/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,19 +19,19 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -44,86 +44,85 @@ extern "C" {
  */
 
 /* Type definitions. */
-#define portCHAR		char
-#define portFLOAT		float
-#define portDOUBLE		double
-#define portLONG		long
-#define portSHORT		short
-#define portSTACK_TYPE	uint32_t
-#define portBASE_TYPE	long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE StackType_t;
-typedef long BaseType_t;
-typedef unsigned long UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC 1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Architecture specifics. */
-#define portSTACK_GROWTH			( -1 )
-#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT			8
+    #define portSTACK_GROWTH      ( -1 )
+    #define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT    8
 /*-----------------------------------------------------------*/
 
 
 /* Scheduler utilities. */
-extern void vPortYield( void );
-#define portNVIC_INT_CTRL			( ( volatile uint32_t *) 0xe000ed04 )
-#define portNVIC_PENDSVSET			0x10000000
-#define portYIELD()					vPortYield()
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) 	*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET
-#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
+    extern void vPortYield( void );
+    #define portNVIC_INT_CTRL     ( ( volatile uint32_t * ) 0xe000ed04 )
+    #define portNVIC_PENDSVSET    0x10000000
+    #define portYIELD()                                 vPortYield()
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 
 /* Critical section management. */
 
-extern void vPortEnterCritical( void );
-extern void vPortExitCritical( void );
-extern uint32_t ulSetInterruptMaskFromISR( void );
-extern void vClearInterruptMaskFromISR( uint32_t ulMask );
+    extern void vPortEnterCritical( void );
+    extern void vPortExitCritical( void );
+    extern uint32_t ulSetInterruptMaskFromISR( void );
+    extern void vClearInterruptMaskFromISR( uint32_t ulMask );
 
-#define portDISABLE_INTERRUPTS()				__asm volatile( "cpsid i" )
-#define portENABLE_INTERRUPTS()					__asm volatile( "cpsie i" )
-#define portENTER_CRITICAL()					vPortEnterCritical()
-#define portEXIT_CRITICAL()						vPortExitCritical()
-#define portSET_INTERRUPT_MASK_FROM_ISR()		ulSetInterruptMaskFromISR()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)	vClearInterruptMaskFromISR( x )
+    #define portDISABLE_INTERRUPTS()                  __asm volatile ( "cpsid i" )
+    #define portENABLE_INTERRUPTS()                   __asm volatile ( "cpsie i" )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulSetInterruptMaskFromISR()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vClearInterruptMaskFromISR( x )
 
 /*-----------------------------------------------------------*/
 
 /* Tickless idle/low power functionality. */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site. */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 
-#define portNOP()
+    #define portNOP()
 
 /* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
-the source code because to do so would cause other compilers to generate
-warnings. */
-#pragma diag_suppress=Pa082
+ * the source code because to do so would cause other compilers to generate
+ * warnings. */
+    #pragma diag_suppress=Pa082
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
-
diff --git a/portable/IAR/ARM_CM23/non_secure/port.c b/portable/IAR/ARM_CM23/non_secure/port.c
index ba6bd2602..eef952d55 100644
--- a/portable/IAR/ARM_CM23/non_secure/port.c
+++ b/portable/IAR/ARM_CM23/non_secure/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,10 +19,9 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
@@ -40,10 +39,10 @@
 /* Portasm includes. */
 #include "portasm.h"
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/* Secure components includes. */
-	#include "secure_context.h"
-	#include "secure_init.h"
+#if ( configENABLE_TRUSTZONE == 1 )
+    /* Secure components includes. */
+    #include "secure_context.h"
+    #include "secure_init.h"
 #endif /* configENABLE_TRUSTZONE */
 
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
@@ -63,126 +62,127 @@
  * 3. Run FreeRTOS on the Non-Secure Side only i.e. no Secure Side function call support:
  *		configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 0
  */
-#if( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) )
-	#error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side.
+#if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) )
+    #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side.
 #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to manipulate the NVIC.
  */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portMIN_INTERRUPT_PRIORITY			( 255UL )
-#define portNVIC_PENDSV_PRI					( portMIN_INTERRUPT_PRIORITY << 16UL )
-#define portNVIC_SYSTICK_PRI				( portMIN_INTERRUPT_PRIORITY << 24UL )
+#define portNVIC_SYSTICK_CTRL_REG             ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG             ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG    ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SHPR3_REG                    ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_ENABLE_BIT           ( 1UL << 0UL )
+#define portNVIC_SYSTICK_INT_BIT              ( 1UL << 1UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT       ( 1UL << 16UL )
+#define portMIN_INTERRUPT_PRIORITY            ( 255UL )
+#define portNVIC_PENDSV_PRI                   ( portMIN_INTERRUPT_PRIORITY << 16UL )
+#define portNVIC_SYSTICK_PRI                  ( portMIN_INTERRUPT_PRIORITY << 24UL )
 #ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ			configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT		( 1UL << 2UL )
+    #define configSYSTICK_CLOCK_HZ            configCPU_CLOCK_HZ
+    /* Ensure the SysTick is clocked at the same frequency as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT          ( 1UL << 2UL )
 #else
-	/* The way the SysTick is clocked is not modified in case it is not the
-	 * same a the core. */
-	#define portNVIC_SYSTICK_CLK_BIT		( 0 )
+
+/* The way the SysTick is clocked is not modified in case it is not the
+ * same a the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 0 )
 #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to manipulate the SCB.
  */
-#define portSCB_SYS_HANDLER_CTRL_STATE_REG	( * ( volatile uint32_t * ) 0xe000ed24 )
-#define portSCB_MEM_FAULT_ENABLE_BIT		( 1UL << 16UL )
+#define portSCB_SYS_HANDLER_CTRL_STATE_REG    ( *( volatile uint32_t * ) 0xe000ed24 )
+#define portSCB_MEM_FAULT_ENABLE_BIT          ( 1UL << 16UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to manipulate the FPU.
  */
-#define portCPACR							( ( volatile uint32_t * ) 0xe000ed88 )	/* Coprocessor Access Control Register. */
-#define portCPACR_CP10_VALUE				( 3UL )
-#define portCPACR_CP11_VALUE				portCPACR_CP10_VALUE
-#define portCPACR_CP10_POS					( 20UL )
-#define portCPACR_CP11_POS					( 22UL )
+#define portCPACR               ( ( volatile uint32_t * ) 0xe000ed88 )              /* Coprocessor Access Control Register. */
+#define portCPACR_CP10_VALUE    ( 3UL )
+#define portCPACR_CP11_VALUE    portCPACR_CP10_VALUE
+#define portCPACR_CP10_POS      ( 20UL )
+#define portCPACR_CP11_POS      ( 22UL )
 
-#define portFPCCR							( ( volatile uint32_t * ) 0xe000ef34 )	/* Floating Point Context Control Register. */
-#define portFPCCR_ASPEN_POS					( 31UL )
-#define portFPCCR_ASPEN_MASK				( 1UL << portFPCCR_ASPEN_POS )
-#define portFPCCR_LSPEN_POS					( 30UL )
-#define portFPCCR_LSPEN_MASK				( 1UL << portFPCCR_LSPEN_POS )
+#define portFPCCR               ( ( volatile uint32_t * ) 0xe000ef34 )              /* Floating Point Context Control Register. */
+#define portFPCCR_ASPEN_POS     ( 31UL )
+#define portFPCCR_ASPEN_MASK    ( 1UL << portFPCCR_ASPEN_POS )
+#define portFPCCR_LSPEN_POS     ( 30UL )
+#define portFPCCR_LSPEN_MASK    ( 1UL << portFPCCR_LSPEN_POS )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to manipulate the MPU.
  */
-#define portMPU_TYPE_REG					( * ( ( volatile uint32_t * ) 0xe000ed90 ) )
-#define portMPU_CTRL_REG					( * ( ( volatile uint32_t * ) 0xe000ed94 ) )
-#define portMPU_RNR_REG						( * ( ( volatile uint32_t * ) 0xe000ed98 ) )
+#define portMPU_TYPE_REG                      ( *( ( volatile uint32_t * ) 0xe000ed90 ) )
+#define portMPU_CTRL_REG                      ( *( ( volatile uint32_t * ) 0xe000ed94 ) )
+#define portMPU_RNR_REG                       ( *( ( volatile uint32_t * ) 0xe000ed98 ) )
 
-#define portMPU_RBAR_REG					( * ( ( volatile uint32_t * ) 0xe000ed9c ) )
-#define portMPU_RLAR_REG					( * ( ( volatile uint32_t * ) 0xe000eda0 ) )
+#define portMPU_RBAR_REG                      ( *( ( volatile uint32_t * ) 0xe000ed9c ) )
+#define portMPU_RLAR_REG                      ( *( ( volatile uint32_t * ) 0xe000eda0 ) )
 
-#define portMPU_RBAR_A1_REG					( * ( ( volatile uint32_t * ) 0xe000eda4 ) )
-#define portMPU_RLAR_A1_REG					( * ( ( volatile uint32_t * ) 0xe000eda8 ) )
+#define portMPU_RBAR_A1_REG                   ( *( ( volatile uint32_t * ) 0xe000eda4 ) )
+#define portMPU_RLAR_A1_REG                   ( *( ( volatile uint32_t * ) 0xe000eda8 ) )
 
-#define portMPU_RBAR_A2_REG					( * ( ( volatile uint32_t * ) 0xe000edac ) )
-#define portMPU_RLAR_A2_REG					( * ( ( volatile uint32_t * ) 0xe000edb0 ) )
+#define portMPU_RBAR_A2_REG                   ( *( ( volatile uint32_t * ) 0xe000edac ) )
+#define portMPU_RLAR_A2_REG                   ( *( ( volatile uint32_t * ) 0xe000edb0 ) )
 
-#define portMPU_RBAR_A3_REG					( * ( ( volatile uint32_t * ) 0xe000edb4 ) )
-#define portMPU_RLAR_A3_REG					( * ( ( volatile uint32_t * ) 0xe000edb8 ) )
+#define portMPU_RBAR_A3_REG                   ( *( ( volatile uint32_t * ) 0xe000edb4 ) )
+#define portMPU_RLAR_A3_REG                   ( *( ( volatile uint32_t * ) 0xe000edb8 ) )
 
-#define portMPU_MAIR0_REG					( * ( ( volatile uint32_t * ) 0xe000edc0 ) )
-#define portMPU_MAIR1_REG					( * ( ( volatile uint32_t * ) 0xe000edc4 ) )
+#define portMPU_MAIR0_REG                     ( *( ( volatile uint32_t * ) 0xe000edc0 ) )
+#define portMPU_MAIR1_REG                     ( *( ( volatile uint32_t * ) 0xe000edc4 ) )
 
-#define portMPU_RBAR_ADDRESS_MASK			( 0xffffffe0 ) /* Must be 32-byte aligned. */
-#define portMPU_RLAR_ADDRESS_MASK			( 0xffffffe0 ) /* Must be 32-byte aligned. */
+#define portMPU_RBAR_ADDRESS_MASK             ( 0xffffffe0 ) /* Must be 32-byte aligned. */
+#define portMPU_RLAR_ADDRESS_MASK             ( 0xffffffe0 ) /* Must be 32-byte aligned. */
 
-#define portMPU_MAIR_ATTR0_POS				( 0UL )
-#define portMPU_MAIR_ATTR0_MASK				( 0x000000ff )
+#define portMPU_MAIR_ATTR0_POS                ( 0UL )
+#define portMPU_MAIR_ATTR0_MASK               ( 0x000000ff )
 
-#define portMPU_MAIR_ATTR1_POS				( 8UL )
-#define portMPU_MAIR_ATTR1_MASK				( 0x0000ff00 )
+#define portMPU_MAIR_ATTR1_POS                ( 8UL )
+#define portMPU_MAIR_ATTR1_MASK               ( 0x0000ff00 )
 
-#define portMPU_MAIR_ATTR2_POS				( 16UL )
-#define portMPU_MAIR_ATTR2_MASK				( 0x00ff0000 )
+#define portMPU_MAIR_ATTR2_POS                ( 16UL )
+#define portMPU_MAIR_ATTR2_MASK               ( 0x00ff0000 )
 
-#define portMPU_MAIR_ATTR3_POS				( 24UL )
-#define portMPU_MAIR_ATTR3_MASK				( 0xff000000 )
+#define portMPU_MAIR_ATTR3_POS                ( 24UL )
+#define portMPU_MAIR_ATTR3_MASK               ( 0xff000000 )
 
-#define portMPU_MAIR_ATTR4_POS				( 0UL )
-#define portMPU_MAIR_ATTR4_MASK				( 0x000000ff )
+#define portMPU_MAIR_ATTR4_POS                ( 0UL )
+#define portMPU_MAIR_ATTR4_MASK               ( 0x000000ff )
 
-#define portMPU_MAIR_ATTR5_POS				( 8UL )
-#define portMPU_MAIR_ATTR5_MASK				( 0x0000ff00 )
+#define portMPU_MAIR_ATTR5_POS                ( 8UL )
+#define portMPU_MAIR_ATTR5_MASK               ( 0x0000ff00 )
 
-#define portMPU_MAIR_ATTR6_POS				( 16UL )
-#define portMPU_MAIR_ATTR6_MASK				( 0x00ff0000 )
+#define portMPU_MAIR_ATTR6_POS                ( 16UL )
+#define portMPU_MAIR_ATTR6_MASK               ( 0x00ff0000 )
 
-#define portMPU_MAIR_ATTR7_POS				( 24UL )
-#define portMPU_MAIR_ATTR7_MASK				( 0xff000000 )
+#define portMPU_MAIR_ATTR7_POS                ( 24UL )
+#define portMPU_MAIR_ATTR7_MASK               ( 0xff000000 )
 
-#define portMPU_RLAR_ATTR_INDEX0			( 0UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX1			( 1UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX2			( 2UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX3			( 3UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX4			( 4UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX5			( 5UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX6			( 6UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX7			( 7UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX0              ( 0UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX1              ( 1UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX2              ( 2UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX3              ( 3UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX4              ( 4UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX5              ( 5UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX6              ( 6UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX7              ( 7UL << 1UL )
 
-#define portMPU_RLAR_REGION_ENABLE			( 1UL )
+#define portMPU_RLAR_REGION_ENABLE            ( 1UL )
 
 /* Enable privileged access to unmapped region. */
-#define portMPU_PRIV_BACKGROUND_ENABLE_BIT	( 1UL << 2UL )
+#define portMPU_PRIV_BACKGROUND_ENABLE_BIT    ( 1UL << 2UL )
 
 /* Enable MPU. */
-#define portMPU_ENABLE_BIT					( 1UL << 0UL )
+#define portMPU_ENABLE_BIT                    ( 1UL << 0UL )
 
 /* Expected value of the portMPU_TYPE register. */
-#define portEXPECTED_MPU_TYPE_VALUE			( 8UL << 8UL ) /* 8 regions, unified. */
+#define portEXPECTED_MPU_TYPE_VALUE           ( 8UL << 8UL ) /* 8 regions, unified. */
 /*-----------------------------------------------------------*/
 
 /**
@@ -190,53 +190,55 @@
  *
  * It is needed because the systick is a 24-bit counter.
  */
-#define portMAX_24_BIT_NUMBER				( 0xffffffUL )
+#define portMAX_24_BIT_NUMBER       ( 0xffffffUL )
 
 /**
  * @brief A fiddle factor to estimate the number of SysTick counts that would
  * have occurred while the SysTick counter is stopped during tickless idle
  * calculations.
  */
-#define portMISSED_COUNTS_FACTOR			( 45UL )
+#define portMISSED_COUNTS_FACTOR    ( 45UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to set up the initial stack.
  */
-#define portINITIAL_XPSR					( 0x01000000 )
+#define portINITIAL_XPSR    ( 0x01000000 )
 
-#if( configRUN_FREERTOS_SECURE_ONLY == 1 )
-	/**
-	 * @brief Initial EXC_RETURN value.
-	 *
-	 *     FF         FF         FF         FD
-	 * 1111 1111  1111 1111  1111 1111  1111 1101
-	 *
-	 * Bit[6] - 1 --> The exception was taken from the Secure state.
-	 * Bit[5] - 1 --> Do not skip stacking of additional state context.
-	 * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
-	 * Bit[3] - 1 --> Return to the Thread mode.
-	 * Bit[2] - 1 --> Restore registers from the process stack.
-	 * Bit[1] - 0 --> Reserved, 0.
-	 * Bit[0] - 1 --> The exception was taken to the Secure state.
-	 */
-	#define portINITIAL_EXC_RETURN			( 0xfffffffd )
+#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
+
+/**
+ * @brief Initial EXC_RETURN value.
+ *
+ *     FF         FF         FF         FD
+ * 1111 1111  1111 1111  1111 1111  1111 1101
+ *
+ * Bit[6] - 1 --> The exception was taken from the Secure state.
+ * Bit[5] - 1 --> Do not skip stacking of additional state context.
+ * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
+ * Bit[3] - 1 --> Return to the Thread mode.
+ * Bit[2] - 1 --> Restore registers from the process stack.
+ * Bit[1] - 0 --> Reserved, 0.
+ * Bit[0] - 1 --> The exception was taken to the Secure state.
+ */
+    #define portINITIAL_EXC_RETURN    ( 0xfffffffd )
 #else
-	/**
-	 * @brief Initial EXC_RETURN value.
-	 *
-	 *     FF         FF         FF         BC
-	 * 1111 1111  1111 1111  1111 1111  1011 1100
-	 *
-	 * Bit[6] - 0 --> The exception was taken from the Non-Secure state.
-	 * Bit[5] - 1 --> Do not skip stacking of additional state context.
-	 * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
-	 * Bit[3] - 1 --> Return to the Thread mode.
-	 * Bit[2] - 1 --> Restore registers from the process stack.
-	 * Bit[1] - 0 --> Reserved, 0.
-	 * Bit[0] - 0 --> The exception was taken to the Non-Secure state.
-	 */
-	#define portINITIAL_EXC_RETURN			( 0xffffffbc )
+
+/**
+ * @brief Initial EXC_RETURN value.
+ *
+ *     FF         FF         FF         BC
+ * 1111 1111  1111 1111  1111 1111  1011 1100
+ *
+ * Bit[6] - 0 --> The exception was taken from the Non-Secure state.
+ * Bit[5] - 1 --> Do not skip stacking of additional state context.
+ * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
+ * Bit[3] - 1 --> Return to the Thread mode.
+ * Bit[2] - 1 --> Restore registers from the process stack.
+ * Bit[1] - 0 --> Reserved, 0.
+ * Bit[0] - 0 --> The exception was taken to the Non-Secure state.
+ */
+    #define portINITIAL_EXC_RETURN    ( 0xffffffbc )
 #endif /* configRUN_FREERTOS_SECURE_ONLY */
 
 /**
@@ -246,13 +248,13 @@
  *  Bit[0] = 0 ==> The task is privileged.
  *  Bit[0] = 1 ==> The task is not privileged.
  */
-#define portCONTROL_PRIVILEGED_MASK			( 1UL << 0UL )
+#define portCONTROL_PRIVILEGED_MASK         ( 1UL << 0UL )
 
 /**
  * @brief Initial CONTROL register values.
  */
-#define portINITIAL_CONTROL_UNPRIVILEGED	( 0x3 )
-#define portINITIAL_CONTROL_PRIVILEGED		( 0x2 )
+#define portINITIAL_CONTROL_UNPRIVILEGED    ( 0x3 )
+#define portINITIAL_CONTROL_PRIVILEGED      ( 0x2 )
 
 /**
  * @brief Let the user override the pre-loading of the initial LR with the
@@ -260,23 +262,23 @@
  * in the debugger.
  */
 #ifdef configTASK_RETURN_ADDRESS
-	#define portTASK_RETURN_ADDRESS			configTASK_RETURN_ADDRESS
+    #define portTASK_RETURN_ADDRESS    configTASK_RETURN_ADDRESS
 #else
-	#define portTASK_RETURN_ADDRESS			prvTaskExitError
+    #define portTASK_RETURN_ADDRESS    prvTaskExitError
 #endif
 
 /**
  * @brief If portPRELOAD_REGISTERS then registers will be given an initial value
  * when a task is created. This helps in debugging at the cost of code size.
  */
-#define portPRELOAD_REGISTERS				1
+#define portPRELOAD_REGISTERS    1
 
 /**
  * @brief A task is created without a secure context, and must call
  * portALLOCATE_SECURE_CONTEXT() to give itself a secure context before it makes
  * any secure calls.
  */
-#define portNO_SECURE_CONTEXT				0
+#define portNO_SECURE_CONTEXT    0
 /*-----------------------------------------------------------*/
 
 /**
@@ -285,18 +287,20 @@
  */
 static void prvTaskExitError( void );
 
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Setup the Memory Protection Unit (MPU).
-	 */
-	static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
+#if ( configENABLE_MPU == 1 )
+
+/**
+ * @brief Setup the Memory Protection Unit (MPU).
+ */
+    static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
 #endif /* configENABLE_MPU */
 
-#if( configENABLE_FPU == 1 )
-	/**
-	 * @brief Setup the Floating Point Unit (FPU).
-	 */
-	static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;
+#if ( configENABLE_FPU == 1 )
+
+/**
+ * @brief Setup the Floating Point Unit (FPU).
+ */
+    static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;
 #endif /* configENABLE_FPU */
 
 /**
@@ -338,812 +342,852 @@ void SysTick_Handler( void ) PRIVILEGED_FUNCTION;
 /**
  * @brief C part of SVC handler.
  */
-portDONT_DISCARD void vPortSVCHandler_C( uint32_t *pulCallerStackAddress ) PRIVILEGED_FUNCTION;
+portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIVILEGED_FUNCTION;
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Each task maintains its own interrupt status in the critical nesting
  * variable.
  */
-static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
+PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Saved as part of the task context to indicate which context the
-	 * task is using on the secure side.
-	 */
-	portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
+#if ( configENABLE_TRUSTZONE == 1 )
+
+/**
+ * @brief Saved as part of the task context to indicate which context the
+ * task is using on the secure side.
+ */
+    PRIVILEGED_DATA portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
 #endif /* configENABLE_TRUSTZONE */
 
-#if( configUSE_TICKLESS_IDLE == 1 )
-	/**
-	 * @brief The number of SysTick increments that make up one tick period.
-	 */
-	static uint32_t ulTimerCountsForOneTick = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
 
-	/**
-	 * @brief The maximum number of tick periods that can be suppressed is
-	 * limited by the 24 bit resolution of the SysTick timer.
-	 */
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
+/**
+ * @brief The number of SysTick increments that make up one tick period.
+ */
+    PRIVILEGED_DATA static uint32_t ulTimerCountsForOneTick = 0;
 
-	/**
-	 * @brief Compensate for the CPU cycles that pass while the SysTick is
-	 * stopped (low power functionality only).
-	 */
-	static uint32_t ulStoppedTimerCompensation = 0;
+/**
+ * @brief The maximum number of tick periods that can be suppressed is
+ * limited by the 24 bit resolution of the SysTick timer.
+ */
+    PRIVILEGED_DATA static uint32_t xMaximumPossibleSuppressedTicks = 0;
+
+/**
+ * @brief Compensate for the CPU cycles that pass while the SysTick is
+ * stopped (low power functionality only).
+ */
+    PRIVILEGED_DATA static uint32_t ulStoppedTimerCompensation = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TICKLESS_IDLE == 1 )
-	__attribute__(( weak )) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-	{
-	uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
-	TickType_t xModifiableIdleTime;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+    {
+        uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+        TickType_t xModifiableIdleTime;
 
-		/* Make sure the SysTick reload value does not overflow the counter. */
-		if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-		{
-			xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-		}
+        /* Make sure the SysTick reload value does not overflow the counter. */
+        if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+        {
+            xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+        }
 
-		/* Stop the SysTick momentarily. The time the SysTick is stopped for is
-		 * accounted for as best it can be, but using the tickless mode will
-		 * inevitably result in some tiny drift of the time maintained by the
-		 * kernel with respect to calendar time. */
-		portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+        /* Stop the SysTick momentarily. The time the SysTick is stopped for is
+         * accounted for as best it can be, but using the tickless mode will
+         * inevitably result in some tiny drift of the time maintained by the
+         * kernel with respect to calendar time. */
+        portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
 
-		/* Calculate the reload value required to wait xExpectedIdleTime
-		 * tick periods. -1 is used because this code will execute part way
-		 * through one of the tick periods. */
-		ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-		if( ulReloadValue > ulStoppedTimerCompensation )
-		{
-			ulReloadValue -= ulStoppedTimerCompensation;
-		}
+        /* Calculate the reload value required to wait xExpectedIdleTime
+         * tick periods. -1 is used because this code will execute part way
+         * through one of the tick periods. */
+        ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
 
-		/* Enter a critical section but don't use the taskENTER_CRITICAL()
-		 * method as that will mask interrupts that should exit sleep mode. */
-		__asm volatile( "cpsid i" ::: "memory" );
-		__asm volatile( "dsb" );
-		__asm volatile( "isb" );
+        if( ulReloadValue > ulStoppedTimerCompensation )
+        {
+            ulReloadValue -= ulStoppedTimerCompensation;
+        }
 
-		/* If a context switch is pending or a task is waiting for the scheduler
-		 * to be un-suspended then abandon the low power entry. */
-		if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-		{
-			/* Restart from whatever is left in the count register to complete
-			 * this tick period. */
-			portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+        /* Enter a critical section but don't use the taskENTER_CRITICAL()
+         * method as that will mask interrupts that should exit sleep mode. */
+        __asm volatile ( "cpsid i" ::: "memory" );
+        __asm volatile ( "dsb" );
+        __asm volatile ( "isb" );
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+        /* If a context switch is pending or a task is waiting for the scheduler
+         * to be un-suspended then abandon the low power entry. */
+        if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+        {
+            /* Restart from whatever is left in the count register to complete
+             * this tick period. */
+            portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Reset the reload register to the value required for normal tick
-			 * periods. */
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts - see comments above the cpsid instruction()
-			 * above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-		else
-		{
-			/* Set the new reload value. */
-			portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+            /* Reset the reload register to the value required for normal tick
+             * periods. */
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
 
-			/* Clear the SysTick count flag and set the count value back to
-			 * zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            /* Re-enable interrupts - see comments above the cpsid instruction()
+             * above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+        else
+        {
+            /* Set the new reload value. */
+            portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            /* Clear the SysTick count flag and set the count value back to
+             * zero. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-			/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
-			 * set its parameter to 0 to indicate that its implementation
-			 * contains its own wait for interrupt or wait for event
-			 * instruction, and so wfi should not be executed again. However,
-			 * the original expected idle time variable must remain unmodified,
-			 * so a copy is taken. */
-			xModifiableIdleTime = xExpectedIdleTime;
-			configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-			if( xModifiableIdleTime > 0 )
-			{
-				__asm volatile( "dsb" ::: "memory" );
-				__asm volatile( "wfi" );
-				__asm volatile( "isb" );
-			}
-			configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts to allow the interrupt that brought the MCU
-			 * out of sleep mode to execute immediately. See comments above
-			 * the cpsid instruction above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
+            /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
+             * set its parameter to 0 to indicate that its implementation
+             * contains its own wait for interrupt or wait for event
+             * instruction, and so wfi should not be executed again. However,
+             * the original expected idle time variable must remain unmodified,
+             * so a copy is taken. */
+            xModifiableIdleTime = xExpectedIdleTime;
+            configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
 
-			/* Disable interrupts again because the clock is about to be stopped
-			 * and interrupts that execute while the clock is stopped will
-			 * increase any slippage between the time maintained by the RTOS and
-			 * calendar time. */
-			__asm volatile( "cpsid i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
+            if( xModifiableIdleTime > 0 )
+            {
+                __asm volatile ( "dsb" ::: "memory" );
+                __asm volatile ( "wfi" );
+                __asm volatile ( "isb" );
+            }
 
-			/* Disable the SysTick clock without reading the
-			 * portNVIC_SYSTICK_CTRL_REG register to ensure the
-			 * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
-			 * Again, the time the SysTick is stopped for is accounted for as
-			 * best it can be, but using the tickless mode will inevitably
-			 * result in some tiny drift of the time maintained by the kernel
-			 * with respect to calendar time*/
-			portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+            configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
 
-			/* Determine if the SysTick clock has already counted to zero and
-			 * been set back to the current reload value (the reload back being
-			 * correct for the entire expected idle time) or if the SysTick is
-			 * yet to count to zero (in which case an interrupt other than the
-			 * SysTick must have brought the system out of sleep mode). */
-			if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-			{
-				uint32_t ulCalculatedLoadValue;
+            /* Re-enable interrupts to allow the interrupt that brought the MCU
+             * out of sleep mode to execute immediately. See comments above
+             * the cpsid instruction above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
 
-				/* The tick interrupt is already pending, and the SysTick count
-				 * reloaded with ulReloadValue.  Reset the
-				 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
-				 * period. */
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+            /* Disable interrupts again because the clock is about to be stopped
+             * and interrupts that execute while the clock is stopped will
+             * increase any slippage between the time maintained by the RTOS and
+             * calendar time. */
+            __asm volatile ( "cpsid i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
 
-				/* Don't allow a tiny value, or values that have somehow
-				 * underflowed because the post sleep hook did something
-				 * that took too long. */
-				if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-				{
-					ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-				}
+            /* Disable the SysTick clock without reading the
+             * portNVIC_SYSTICK_CTRL_REG register to ensure the
+             * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
+             * Again, the time the SysTick is stopped for is accounted for as
+             * best it can be, but using the tickless mode will inevitably
+             * result in some tiny drift of the time maintained by the kernel
+             * with respect to calendar time*/
+            portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
 
-				portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+            /* Determine if the SysTick clock has already counted to zero and
+             * been set back to the current reload value (the reload back being
+             * correct for the entire expected idle time) or if the SysTick is
+             * yet to count to zero (in which case an interrupt other than the
+             * SysTick must have brought the system out of sleep mode). */
+            if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+            {
+                uint32_t ulCalculatedLoadValue;
 
-				/* As the pending tick will be processed as soon as this
-				 * function exits, the tick value maintained by the tick is
-				 * stepped forward by one less than the time spent waiting. */
-				ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-			}
-			else
-			{
-				/* Something other than the tick interrupt ended the sleep.
-				 * Work out how long the sleep lasted rounded to complete tick
-				 * periods (not the ulReload value which accounted for part
-				 * ticks). */
-				ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+                /* The tick interrupt is already pending, and the SysTick count
+                 * reloaded with ulReloadValue.  Reset the
+                 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+                 * period. */
+                ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
 
-				/* How many complete tick periods passed while the processor
-				 * was waiting? */
-				ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+                /* Don't allow a tiny value, or values that have somehow
+                 * underflowed because the post sleep hook did something
+                 * that took too long. */
+                if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+                {
+                    ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+                }
 
-				/* The reload value is set to whatever fraction of a single tick
-				 * period remains. */
-				portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-			}
+                portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
 
-			/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
-			 * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
-			 * value. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-			vTaskStepTick( ulCompleteTickPeriods );
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+                /* As the pending tick will be processed as soon as this
+                 * function exits, the tick value maintained by the tick is
+                 * stepped forward by one less than the time spent waiting. */
+                ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+            }
+            else
+            {
+                /* Something other than the tick interrupt ended the sleep.
+                 * Work out how long the sleep lasted rounded to complete tick
+                 * periods (not the ulReload value which accounted for part
+                 * ticks). */
+                ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Exit with interrupts enabled. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-	}
+                /* How many complete tick periods passed while the processor
+                 * was waiting? */
+                ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+                /* The reload value is set to whatever fraction of a single tick
+                 * period remains. */
+                portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+            }
+
+            /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+             * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+             * value. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            vTaskStepTick( ulCompleteTickPeriods );
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Exit with interrupts enabled. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+    }
 #endif /* configUSE_TICKLESS_IDLE */
 /*-----------------------------------------------------------*/
 
-__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
+__attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
 {
-	/* Calculate the constants required to configure the tick interrupt. */
-	#if( configUSE_TICKLESS_IDLE == 1 )
-	{
-		ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
-		xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
-	}
-	#endif /* configUSE_TICKLESS_IDLE */
+    /* Calculate the constants required to configure the tick interrupt. */
+    #if ( configUSE_TICKLESS_IDLE == 1 )
+        {
+            ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+            xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+            ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+        }
+    #endif /* configUSE_TICKLESS_IDLE */
 
-	/* Stop and reset the SysTick. */
-	portNVIC_SYSTICK_CTRL_REG = 0UL;
-	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+    /* Stop and reset the SysTick. */
+    portNVIC_SYSTICK_CTRL_REG = 0UL;
+    portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-	/* Configure SysTick to interrupt at the requested rate. */
-	portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
+    /* Configure SysTick to interrupt at the requested rate. */
+    portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+    portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
 }
 /*-----------------------------------------------------------*/
 
 static void prvTaskExitError( void )
 {
-volatile uint32_t ulDummy = 0UL;
+    volatile uint32_t ulDummy = 0UL;
 
-	/* A function that implements a task must not exit or attempt to return to
-	 * its caller as there is nothing to return to. If a task wants to exit it
-	 * should instead call vTaskDelete( NULL ). Artificially force an assert()
-	 * to be triggered if configASSERT() is defined, then stop here so
-	 * application writers can catch the error. */
-	configASSERT( ulCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to. If a task wants to exit it
+     * should instead call vTaskDelete( NULL ). Artificially force an assert()
+     * to be triggered if configASSERT() is defined, then stop here so
+     * application writers can catch the error. */
+    configASSERT( ulCriticalNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
 
-	while( ulDummy == 0 )
-	{
-		/* This file calls prvTaskExitError() after the scheduler has been
-		 * started to remove a compiler warning about the function being
-		 * defined but never called.  ulDummy is used purely to quieten other
-		 * warnings about code appearing after this function is called - making
-		 * ulDummy volatile makes the compiler think the function could return
-		 * and therefore not output an 'unreachable code' warning for code that
-		 * appears after it. */
-	}
+    while( ulDummy == 0 )
+    {
+        /* This file calls prvTaskExitError() after the scheduler has been
+         * started to remove a compiler warning about the function being
+         * defined but never called.  ulDummy is used purely to quieten other
+         * warnings about code appearing after this function is called - making
+         * ulDummy volatile makes the compiler think the function could return
+         * and therefore not output an 'unreachable code' warning for code that
+         * appears after it. */
+    }
 }
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
-	{
-	#if defined( __ARMCC_VERSION )
-		/* Declaration when these variable are defined in code instead of being
-		 * exported from linker scripts. */
-		extern uint32_t * __privileged_functions_start__;
-		extern uint32_t * __privileged_functions_end__;
-		extern uint32_t * __syscalls_flash_start__;
-		extern uint32_t * __syscalls_flash_end__;
-		extern uint32_t * __unprivileged_flash_start__;
-		extern uint32_t * __unprivileged_flash_end__;
-		extern uint32_t * __privileged_sram_start__;
-		extern uint32_t * __privileged_sram_end__;
-	#else
-		/* Declaration when these variable are exported from linker scripts. */
-		extern uint32_t __privileged_functions_start__[];
-		extern uint32_t __privileged_functions_end__[];
-		extern uint32_t __syscalls_flash_start__[];
-		extern uint32_t __syscalls_flash_end__[];
-		extern uint32_t __unprivileged_flash_start__[];
-		extern uint32_t __unprivileged_flash_end__[];
-		extern uint32_t __privileged_sram_start__[];
-		extern uint32_t __privileged_sram_end__[];
-	#endif /* defined( __ARMCC_VERSION ) */
+#if ( configENABLE_MPU == 1 )
+    static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
+    {
+        #if defined( __ARMCC_VERSION )
 
-		/* Check that the MPU is present. */
-		if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
-		{
-			/* MAIR0 - Index 0. */
-			portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
-			/* MAIR0 - Index 1. */
-			portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __privileged_functions_start__;
+            extern uint32_t * __privileged_functions_end__;
+            extern uint32_t * __syscalls_flash_start__;
+            extern uint32_t * __syscalls_flash_end__;
+            extern uint32_t * __unprivileged_flash_start__;
+            extern uint32_t * __unprivileged_flash_end__;
+            extern uint32_t * __privileged_sram_start__;
+            extern uint32_t * __privileged_sram_end__;
+        #else /* if defined( __ARMCC_VERSION ) */
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __privileged_functions_start__[];
+            extern uint32_t __privileged_functions_end__[];
+            extern uint32_t __syscalls_flash_start__[];
+            extern uint32_t __syscalls_flash_end__[];
+            extern uint32_t __unprivileged_flash_start__[];
+            extern uint32_t __unprivileged_flash_end__[];
+            extern uint32_t __privileged_sram_start__[];
+            extern uint32_t __privileged_sram_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
 
-			/* Setup privileged flash as Read Only so that privileged tasks can
-			 * read it but not modify. */
-			portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_PRIVILEGED_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
+        /* Check that the MPU is present. */
+        if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
+        {
+            /* MAIR0 - Index 0. */
+            portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
+            /* MAIR0 - Index 1. */
+            portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
 
-			/* Setup unprivileged flash as Read Only by both privileged and
-			 * unprivileged tasks. All tasks can read it but no-one can modify. */
-			portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
+            /* Setup privileged flash as Read Only so that privileged tasks can
+             * read it but not modify. */
+            portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_PRIVILEGED_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
 
-			/* Setup unprivileged syscalls flash as Read Only by both privileged
-			 * and unprivileged tasks. All tasks can read it but no-one can modify. */
-			portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
+            /* Setup unprivileged flash as Read Only by both privileged and
+             * unprivileged tasks. All tasks can read it but no-one can modify. */
+            portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
 
-			/* Setup RAM containing kernel data for privileged access only. */
-			portMPU_RNR_REG = portPRIVILEGED_RAM_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
-								( portMPU_REGION_EXECUTE_NEVER );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
+            /* Setup unprivileged syscalls flash as Read Only by both privileged
+             * and unprivileged tasks. All tasks can read it but no-one can modify. */
+            portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
 
-			/* Enable mem fault. */
-			portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
+            /* Setup RAM containing kernel data for privileged access only. */
+            portMPU_RNR_REG = portPRIVILEGED_RAM_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
+                               ( portMPU_REGION_EXECUTE_NEVER );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
 
-			/* Enable MPU with privileged background access i.e. unmapped
-			 * regions have privileged access. */
-			portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
-		}
-	}
+            /* Enable mem fault. */
+            portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
+
+            /* Enable MPU with privileged background access i.e. unmapped
+             * regions have privileged access. */
+            portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
+        }
+    }
 #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_FPU == 1 )
-	static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
-	{
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			/* Enable non-secure access to the FPU. */
-			SecureInit_EnableNSFPUAccess();
-		}
-		#endif /* configENABLE_TRUSTZONE */
+#if ( configENABLE_FPU == 1 )
+    static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
+    {
+        #if ( configENABLE_TRUSTZONE == 1 )
+            {
+                /* Enable non-secure access to the FPU. */
+                SecureInit_EnableNSFPUAccess();
+            }
+        #endif /* configENABLE_TRUSTZONE */
 
-		/* CP10 = 11 ==> Full access to FPU i.e. both privileged and
-		 * unprivileged code should be able to access FPU. CP11 should be
-		 * programmed to the same value as CP10. */
-		*( portCPACR ) |=	(	( portCPACR_CP10_VALUE << portCPACR_CP10_POS ) |
-								( portCPACR_CP11_VALUE << portCPACR_CP11_POS )
-							);
+        /* CP10 = 11 ==> Full access to FPU i.e. both privileged and
+         * unprivileged code should be able to access FPU. CP11 should be
+         * programmed to the same value as CP10. */
+        *( portCPACR ) |= ( ( portCPACR_CP10_VALUE << portCPACR_CP10_POS ) |
+                            ( portCPACR_CP11_VALUE << portCPACR_CP11_POS )
+                            );
 
-		/* ASPEN = 1 ==> Hardware should automatically preserve floating point
-		 * context on exception entry and restore on exception return.
-		 * LSPEN = 1 ==> Enable lazy context save of FP state. */
-		*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
-	}
+        /* ASPEN = 1 ==> Hardware should automatically preserve floating point
+         * context on exception entry and restore on exception return.
+         * LSPEN = 1 ==> Enable lazy context save of FP state. */
+        *( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
+    }
 #endif /* configENABLE_FPU */
 /*-----------------------------------------------------------*/
 
 void vPortYield( void ) /* PRIVILEGED_FUNCTION */
 {
-	/* Set a PendSV to request a context switch. */
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+    /* Set a PendSV to request a context switch. */
+    portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
 
-	/* Barriers are normally not required but do ensure the code is
-	 * completely within the specified behaviour for the architecture. */
-	__asm volatile( "dsb" ::: "memory" );
-	__asm volatile( "isb" );
+    /* Barriers are normally not required but do ensure the code is
+     * completely within the specified behaviour for the architecture. */
+    __asm volatile ( "dsb" ::: "memory" );
+    __asm volatile ( "isb" );
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */
 {
-	portDISABLE_INTERRUPTS();
-	ulCriticalNesting++;
+    portDISABLE_INTERRUPTS();
+    ulCriticalNesting++;
 
-	/* Barriers are normally not required but do ensure the code is
-	 * completely within the specified behaviour for the architecture. */
-	__asm volatile( "dsb" ::: "memory" );
-	__asm volatile( "isb" );
+    /* Barriers are normally not required but do ensure the code is
+     * completely within the specified behaviour for the architecture. */
+    __asm volatile ( "dsb" ::: "memory" );
+    __asm volatile ( "isb" );
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */
 {
-	configASSERT( ulCriticalNesting );
-	ulCriticalNesting--;
+    configASSERT( ulCriticalNesting );
+    ulCriticalNesting--;
 
-	if( ulCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
+    if( ulCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
 }
 /*-----------------------------------------------------------*/
 
 void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
 {
-uint32_t ulPreviousMask;
+    uint32_t ulPreviousMask;
 
-	ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* Pend a context switch. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
+    ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* Pend a context switch. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
 }
 /*-----------------------------------------------------------*/
 
-void vPortSVCHandler_C( uint32_t *pulCallerStackAddress ) /* PRIVILEGED_FUNCTION portDONT_DISCARD */
+void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTION portDONT_DISCARD */
 {
-#if( configENABLE_MPU == 1 )
-	#if defined( __ARMCC_VERSION )
-		/* Declaration when these variable are defined in code instead of being
-		 * exported from linker scripts. */
-		extern uint32_t * __syscalls_flash_start__;
-		extern uint32_t * __syscalls_flash_end__;
-	#else
-		/* Declaration when these variable are exported from linker scripts. */
-		extern uint32_t __syscalls_flash_start__[];
-		extern uint32_t __syscalls_flash_end__[];
-	#endif /* defined( __ARMCC_VERSION ) */
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        #if defined( __ARMCC_VERSION )
 
-uint32_t ulPC;
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __syscalls_flash_start__;
+            extern uint32_t * __syscalls_flash_end__;
+        #else
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __syscalls_flash_start__[];
+            extern uint32_t __syscalls_flash_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
+    #endif /* configENABLE_MPU */
 
-#if( configENABLE_TRUSTZONE == 1 )
-	uint32_t ulR0;
-	#if( configENABLE_MPU == 1 )
-		uint32_t ulControl, ulIsTaskPrivileged;
-	#endif /* configENABLE_MPU */
-#endif /* configENABLE_TRUSTZONE */
-uint8_t ucSVCNumber;
+    uint32_t ulPC;
 
-	/* Register are stored on the stack in the following order - R0, R1, R2, R3,
-	 * R12, LR, PC, xPSR. */
-	ulPC = pulCallerStackAddress[ 6 ];
-	ucSVCNumber = ( ( uint8_t *) ulPC )[ -2 ];
+    #if ( configENABLE_TRUSTZONE == 1 )
+        uint32_t ulR0;
+        #if ( configENABLE_MPU == 1 )
+            uint32_t ulControl, ulIsTaskPrivileged;
+        #endif /* configENABLE_MPU */
+    #endif /* configENABLE_TRUSTZONE */
+    uint8_t ucSVCNumber;
 
-	switch( ucSVCNumber )
-	{
-		#if( configENABLE_TRUSTZONE == 1 )
-			case portSVC_ALLOCATE_SECURE_CONTEXT:
-			{
-				/* R0 contains the stack size passed as parameter to the
-				 * vPortAllocateSecureContext function. */
-				ulR0 = pulCallerStackAddress[ 0 ];
+    /* Register are stored on the stack in the following order - R0, R1, R2, R3,
+     * R12, LR, PC, xPSR. */
+    ulPC = pulCallerStackAddress[ 6 ];
+    ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ];
 
-				#if( configENABLE_MPU == 1 )
-				{
-					/* Read the CONTROL register value. */
-					__asm volatile ( "mrs %0, control"  : "=r" ( ulControl ) );
+    switch( ucSVCNumber )
+    {
+        #if ( configENABLE_TRUSTZONE == 1 )
+            case portSVC_ALLOCATE_SECURE_CONTEXT:
 
-					/* The task that raised the SVC is privileged if Bit[0]
-					 * in the CONTROL register is 0. */
-					ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 );
+                /* R0 contains the stack size passed as parameter to the
+                 * vPortAllocateSecureContext function. */
+                ulR0 = pulCallerStackAddress[ 0 ];
 
-					/* Allocate and load a context for the secure task. */
-					xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged );
-				}
-				#else
-				{
-					/* Allocate and load a context for the secure task. */
-					xSecureContext = SecureContext_AllocateContext( ulR0 );
-				}
-				#endif /* configENABLE_MPU */
+                #if ( configENABLE_MPU == 1 )
+                    {
+                        /* Read the CONTROL register value. */
+                        __asm volatile ( "mrs %0, control"  : "=r" ( ulControl ) );
 
-				configASSERT( xSecureContext != NULL );
-				SecureContext_LoadContext( xSecureContext );
-			}
-			break;
+                        /* The task that raised the SVC is privileged if Bit[0]
+                         * in the CONTROL register is 0. */
+                        ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 );
 
-			case portSVC_FREE_SECURE_CONTEXT:
-			{
-				/* R0 contains the secure context handle to be freed. */
-				ulR0 = pulCallerStackAddress[ 0 ];
+                        /* Allocate and load a context for the secure task. */
+                        xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged );
+                    }
+                #else /* if ( configENABLE_MPU == 1 ) */
+                    {
+                        /* Allocate and load a context for the secure task. */
+                        xSecureContext = SecureContext_AllocateContext( ulR0 );
+                    }
+                #endif /* configENABLE_MPU */
 
-				/* Free the secure context. */
-				SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 );
-			}
-			break;
-		#endif /* configENABLE_TRUSTZONE */
+                configASSERT( xSecureContext != NULL );
+                SecureContext_LoadContext( xSecureContext );
+                break;
 
-		case portSVC_START_SCHEDULER:
-		{
-			#if( configENABLE_TRUSTZONE == 1 )
-			{
-				/* De-prioritize the non-secure exceptions so that the
-				 * non-secure pendSV runs at the lowest priority. */
-				SecureInit_DePrioritizeNSExceptions();
+            case portSVC_FREE_SECURE_CONTEXT:
+                /* R0 contains the secure context handle to be freed. */
+                ulR0 = pulCallerStackAddress[ 0 ];
 
-				/* Initialize the secure context management system. */
-				SecureContext_Init();
-			}
-			#endif /* configENABLE_TRUSTZONE */
+                /* Free the secure context. */
+                SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 );
+                break;
+        #endif /* configENABLE_TRUSTZONE */
 
-			#if( configENABLE_FPU == 1 )
-			{
-				/* Setup the Floating Point Unit (FPU). */
-				prvSetupFPU();
-			}
-			#endif /* configENABLE_FPU */
+        case portSVC_START_SCHEDULER:
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    /* De-prioritize the non-secure exceptions so that the
+                     * non-secure pendSV runs at the lowest priority. */
+                    SecureInit_DePrioritizeNSExceptions();
 
-			/* Setup the context of the first task so that the first task starts
-			 * executing. */
-			vRestoreContextOfFirstTask();
-		}
-		break;
+                    /* Initialize the secure context management system. */
+                    SecureContext_Init();
+                }
+            #endif /* configENABLE_TRUSTZONE */
 
-		#if( configENABLE_MPU == 1 )
-			case portSVC_RAISE_PRIVILEGE:
-			{
-				/* Only raise the privilege, if the svc was raised from any of
-				 * the system calls. */
-				if( ulPC >= ( uint32_t ) __syscalls_flash_start__ &&
-					ulPC <= ( uint32_t ) __syscalls_flash_end__ )
-				{
-					vRaisePrivilege();
-				}
-			}
-			break;
-		#endif /* configENABLE_MPU */
+            #if ( configENABLE_FPU == 1 )
+                {
+                    /* Setup the Floating Point Unit (FPU). */
+                    prvSetupFPU();
+                }
+            #endif /* configENABLE_FPU */
 
-		default:
-		{
-			/* Incorrect SVC call. */
-			configASSERT( pdFALSE );
-		}
-	}
+            /* Setup the context of the first task so that the first task starts
+             * executing. */
+            vRestoreContextOfFirstTask();
+            break;
+
+            #if ( configENABLE_MPU == 1 )
+                case portSVC_RAISE_PRIVILEGE:
+
+                    /* Only raise the privilege, if the svc was raised from any of
+                     * the system calls. */
+                    if( ( ulPC >= ( uint32_t ) __syscalls_flash_start__ ) &&
+                        ( ulPC <= ( uint32_t ) __syscalls_flash_end__ ) )
+                    {
+                        vRaisePrivilege();
+                    }
+                    break;
+            #endif /* configENABLE_MPU */
+
+        default:
+            /* Incorrect SVC call. */
+            configASSERT( pdFALSE );
+    }
 }
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */
+/* *INDENT-OFF* */
+#if ( configENABLE_MPU == 1 )
+    StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                         StackType_t * pxEndOfStack,
+                                         TaskFunction_t pxCode,
+                                         void * pvParameters,
+                                         BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */
 #else
-	StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters ) /* PRIVILEGED_FUNCTION */
+    StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                         StackType_t * pxEndOfStack,
+                                         TaskFunction_t pxCode,
+                                         void * pvParameters ) /* PRIVILEGED_FUNCTION */
 #endif /* configENABLE_MPU */
+/* *INDENT-ON* */
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	 * interrupt. */
-	#if( portPRELOAD_REGISTERS == 0 )
-	{
-		pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-		*pxTopOfStack = portINITIAL_XPSR;							/* xPSR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxCode;						/* PC */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
-		pxTopOfStack -= 5;											/* R12, R3, R2 and R1. */
-		*pxTopOfStack = ( StackType_t ) pvParameters;				/* R0 */
-		pxTopOfStack -= 9;											/* R11..R4, EXC_RETURN. */
-		*pxTopOfStack = portINITIAL_EXC_RETURN;
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
+    #if ( portPRELOAD_REGISTERS == 0 )
+        {
+            pxTopOfStack--;                                          /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+            *pxTopOfStack = portINITIAL_XPSR;                        /* xPSR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxCode;                  /* PC */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
+            pxTopOfStack -= 5;                                       /* R12, R3, R2 and R1. */
+            *pxTopOfStack = ( StackType_t ) pvParameters;            /* R0 */
+            pxTopOfStack -= 9;                                       /* R11..R4, EXC_RETURN. */
+            *pxTopOfStack = portINITIAL_EXC_RETURN;
 
-		#if( configENABLE_MPU == 1 )
-		{
-			pxTopOfStack--;
-			if( xRunPrivileged == pdTRUE )
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED;		/* Slot used to hold this task's CONTROL value. */
-			}
-			else
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED;	/* Slot used to hold this task's CONTROL value. */
-			}
-		}
-		#endif /* configENABLE_MPU */
+            #if ( configENABLE_MPU == 1 )
+                {
+                    pxTopOfStack--;
 
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxEndOfStack;	/* Slot used to hold this task's PSPLIM value. */
+                    if( xRunPrivileged == pdTRUE )
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                    else
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                }
+            #endif /* configENABLE_MPU */
 
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			pxTopOfStack--;
-			*pxTopOfStack = portNO_SECURE_CONTEXT;		/* Slot used to hold this task's xSecureContext value. */
-		}
-		#endif /* configENABLE_TRUSTZONE */
-	}
-	#else /* portPRELOAD_REGISTERS */
-	{
-		pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-		*pxTopOfStack = portINITIAL_XPSR;							/* xPSR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxCode;						/* PC */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x12121212UL;				/* R12 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x03030303UL;				/* R3 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x02020202UL;				/* R2 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x01010101UL;				/* R1 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pvParameters;				/* R0 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x11111111UL;				/* R11 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x10101010UL;				/* R10 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x09090909UL;				/* R09 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x08080808UL;				/* R08 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x07070707UL;				/* R07 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x06060606UL;				/* R06 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x05050505UL;				/* R05 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x04040404UL;				/* R04 */
-		pxTopOfStack--;
-		*pxTopOfStack = portINITIAL_EXC_RETURN;						/* EXC_RETURN */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */
 
-		#if( configENABLE_MPU == 1 )
-		{
-			pxTopOfStack--;
-			if( xRunPrivileged == pdTRUE )
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED;		/* Slot used to hold this task's CONTROL value. */
-			}
-			else
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED;	/* Slot used to hold this task's CONTROL value. */
-			}
-		}
-		#endif /* configENABLE_MPU */
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    pxTopOfStack--;
+                    *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */
+                }
+            #endif /* configENABLE_TRUSTZONE */
+        }
+    #else /* portPRELOAD_REGISTERS */
+        {
+            pxTopOfStack--;                                          /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+            *pxTopOfStack = portINITIAL_XPSR;                        /* xPSR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxCode;                  /* PC */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x12121212UL;            /* R12 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x03030303UL;            /* R3 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x02020202UL;            /* R2 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x01010101UL;            /* R1 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pvParameters;            /* R0 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x11111111UL;            /* R11 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x10101010UL;            /* R10 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x09090909UL;            /* R09 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x08080808UL;            /* R08 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x07070707UL;            /* R07 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x06060606UL;            /* R06 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x05050505UL;            /* R05 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x04040404UL;            /* R04 */
+            pxTopOfStack--;
+            *pxTopOfStack = portINITIAL_EXC_RETURN;                  /* EXC_RETURN */
 
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxEndOfStack;	/* Slot used to hold this task's PSPLIM value. */
+            #if ( configENABLE_MPU == 1 )
+                {
+                    pxTopOfStack--;
 
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			pxTopOfStack--;
-			*pxTopOfStack = portNO_SECURE_CONTEXT;		/* Slot used to hold this task's xSecureContext value. */
-		}
-		#endif /* configENABLE_TRUSTZONE */
-	}
-	#endif /* portPRELOAD_REGISTERS */
+                    if( xRunPrivileged == pdTRUE )
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                    else
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                }
+            #endif /* configENABLE_MPU */
 
-	return pxTopOfStack;
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */
+
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    pxTopOfStack--;
+                    *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */
+                }
+            #endif /* configENABLE_TRUSTZONE */
+        }
+    #endif /* portPRELOAD_REGISTERS */
+
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
 {
-	/* Make PendSV, CallSV and SysTick the same priority as the kernel. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+    /* Make PendSV, CallSV and SysTick the same priority as the kernel. */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
-	#if( configENABLE_MPU == 1 )
-	{
-		/* Setup the Memory Protection Unit (MPU). */
-		prvSetupMPU();
-	}
-	#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        {
+            /* Setup the Memory Protection Unit (MPU). */
+            prvSetupMPU();
+        }
+    #endif /* configENABLE_MPU */
 
-	/* Start the timer that generates the tick ISR. Interrupts are disabled
-	 * here already. */
-	vPortSetupTimerInterrupt();
+    /* Start the timer that generates the tick ISR. Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
 
-	/* Initialize the critical nesting count ready for the first task. */
-	ulCriticalNesting = 0;
+    /* Initialize the critical nesting count ready for the first task. */
+    ulCriticalNesting = 0;
 
-	/* Start the first task. */
-	vStartFirstTask();
+    /* Start the first task. */
+    vStartFirstTask();
 
-	/* Should never get here as the tasks will now be executing. Call the task
-	 * exit error function to prevent compiler warnings about a static function
-	 * not being called in the case that the application writer overrides this
-	 * functionality by defining configTASK_RETURN_ADDRESS. Call
-	 * vTaskSwitchContext() so link time optimization does not remove the
-	 * symbol. */
-	vTaskSwitchContext();
-	prvTaskExitError();
+    /* Should never get here as the tasks will now be executing. Call the task
+     * exit error function to prevent compiler warnings about a static function
+     * not being called in the case that the application writer overrides this
+     * functionality by defining configTASK_RETURN_ADDRESS. Call
+     * vTaskSwitchContext() so link time optimization does not remove the
+     * symbol. */
+    vTaskSwitchContext();
+    prvTaskExitError();
 
-	/* Should not get here. */
-	return 0;
+    /* Should not get here. */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
 {
-	/* Not implemented in ports where there is nothing to return to.
-	 * Artificially force an assert. */
-	configASSERT( ulCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( ulCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t ulStackDepth )
-	{
-	uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
-	int32_t lIndex = 0;
+#if ( configENABLE_MPU == 1 )
+    void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
+                                    const struct xMEMORY_REGION * const xRegions,
+                                    StackType_t * pxBottomOfStack,
+                                    uint32_t ulStackDepth )
+    {
+        uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
+        int32_t lIndex = 0;
 
-		/* Setup MAIR0. */
-		xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
-		xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
+        #if defined( __ARMCC_VERSION )
 
-		/* This function is called automatically when the task is created - in
-		 * which case the stack region parameters will be valid.  At all other
-		 * times the stack parameters will not be valid and it is assumed that
-		 * the stack region has already been configured. */
-		if( ulStackDepth > 0 )
-		{
-			/* Define the region that allows access to the stack. */
-			ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK;
-			ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1;
-			ulRegionEndAddress  &= portMPU_RLAR_ADDRESS_MASK;
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __privileged_sram_start__;
+            extern uint32_t * __privileged_sram_end__;
+        #else
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __privileged_sram_start__[];
+            extern uint32_t __privileged_sram_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
 
-			xMPUSettings->xRegionsSettings[ 0 ].ulRBAR =	( ulRegionStartAddress ) |
-															( portMPU_REGION_NON_SHAREABLE ) |
-															( portMPU_REGION_READ_WRITE ) |
-															( portMPU_REGION_EXECUTE_NEVER );
+        /* Setup MAIR0. */
+        xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
+        xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
 
-			xMPUSettings->xRegionsSettings[ 0 ].ulRLAR =	( ulRegionEndAddress ) |
-															( portMPU_RLAR_ATTR_INDEX0 ) |
-															( portMPU_RLAR_REGION_ENABLE );
-		}
+        /* This function is called automatically when the task is created - in
+         * which case the stack region parameters will be valid.  At all other
+         * times the stack parameters will not be valid and it is assumed that
+         * the stack region has already been configured. */
+        if( ulStackDepth > 0 )
+        {
+            ulRegionStartAddress = ( uint32_t ) pxBottomOfStack;
+            ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1;
 
-		/* User supplied configurable regions. */
-		for( ulRegionNumber = 1; ulRegionNumber <= portNUM_CONFIGURABLE_REGIONS; ulRegionNumber++ )
-		{
-			/* If xRegions is NULL i.e. the task has not specified any MPU
-			 * region, the else part ensures that all the configurable MPU
-			 * regions are invalidated. */
-			if( ( xRegions != NULL ) && ( xRegions[ lIndex ].ulLengthInBytes > 0UL ) )
-			{
-				/* Translate the generic region definition contained in xRegions
-				 * into the ARMv8 specific MPU settings that are then stored in
-				 * xMPUSettings. */
-				ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK;
-				ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1;
-				ulRegionEndAddress  &= portMPU_RLAR_ADDRESS_MASK;
+            /* If the stack is within the privileged SRAM, do not protect it
+             * using a separate MPU region. This is needed because privileged
+             * SRAM is already protected using an MPU region and ARMv8-M does
+             * not allow overlapping MPU regions. */
+            if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
+                ( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
+            {
+                xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
+                xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;
+            }
+            else
+            {
+                /* Define the region that allows access to the stack. */
+                ulRegionStartAddress &= portMPU_RBAR_ADDRESS_MASK;
+                ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK;
 
-				/* Start address. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR =	( ulRegionStartAddress ) |
-																			( portMPU_REGION_NON_SHAREABLE );
+                xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) |
+                                                             ( portMPU_REGION_NON_SHAREABLE ) |
+                                                             ( portMPU_REGION_READ_WRITE ) |
+                                                             ( portMPU_REGION_EXECUTE_NEVER );
 
-				/* RO/RW. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_READ_ONLY ) != 0 )
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_ONLY );
-				}
-				else
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_WRITE );
-				}
+                xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = ( ulRegionEndAddress ) |
+                                                             ( portMPU_RLAR_ATTR_INDEX0 ) |
+                                                             ( portMPU_RLAR_REGION_ENABLE );
+            }
+        }
 
-				/* XN. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_EXECUTE_NEVER ) != 0 )
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_EXECUTE_NEVER );
-				}
+        /* User supplied configurable regions. */
+        for( ulRegionNumber = 1; ulRegionNumber <= portNUM_CONFIGURABLE_REGIONS; ulRegionNumber++ )
+        {
+            /* If xRegions is NULL i.e. the task has not specified any MPU
+             * region, the else part ensures that all the configurable MPU
+             * regions are invalidated. */
+            if( ( xRegions != NULL ) && ( xRegions[ lIndex ].ulLengthInBytes > 0UL ) )
+            {
+                /* Translate the generic region definition contained in xRegions
+                 * into the ARMv8 specific MPU settings that are then stored in
+                 * xMPUSettings. */
+                ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK;
+                ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1;
+                ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK;
 
-				/* End Address. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR =	( ulRegionEndAddress ) |
-																			( portMPU_RLAR_REGION_ENABLE );
+                /* Start address. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = ( ulRegionStartAddress ) |
+                                                                          ( portMPU_REGION_NON_SHAREABLE );
 
-				/* Normal memory/ Device memory. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
-				{
-					/* Attr1 in MAIR0 is configured as device memory. */
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX1;
-				}
-				else
-				{
-					/* Attr1 in MAIR0 is configured as normal memory. */
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
-				}
-			}
-			else
-			{
-				/* Invalidate the region. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = 0UL;
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = 0UL;
-			}
+                /* RO/RW. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_READ_ONLY ) != 0 )
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_ONLY );
+                }
+                else
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_WRITE );
+                }
 
-			lIndex++;
-		}
-	}
+                /* XN. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_EXECUTE_NEVER ) != 0 )
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_EXECUTE_NEVER );
+                }
+
+                /* End Address. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
+                                                                          ( portMPU_RLAR_REGION_ENABLE );
+
+                /* Normal memory/ Device memory. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
+                {
+                    /* Attr1 in MAIR0 is configured as device memory. */
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX1;
+                }
+                else
+                {
+                    /* Attr1 in MAIR0 is configured as normal memory. */
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
+                }
+            }
+            else
+            {
+                /* Invalidate the region. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = 0UL;
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = 0UL;
+            }
+
+            lIndex++;
+        }
+    }
 #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 BaseType_t xPortIsInsideInterrupt( void )
 {
-uint32_t ulCurrentInterrupt;
-BaseType_t xReturn;
+    uint32_t ulCurrentInterrupt;
+    BaseType_t xReturn;
 
-	/* Obtain the number of the currently executing interrupt. Interrupt Program
-	 * Status Register (IPSR) holds the exception number of the currently-executing
-	 * exception or zero for Thread mode.*/
-	__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+    /* Obtain the number of the currently executing interrupt. Interrupt Program
+     * Status Register (IPSR) holds the exception number of the currently-executing
+     * exception or zero for Thread mode.*/
+    __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
-	if( ulCurrentInterrupt == 0 )
-	{
-		xReturn = pdFALSE;
-	}
-	else
-	{
-		xReturn = pdTRUE;
-	}
+    if( ulCurrentInterrupt == 0 )
+    {
+        xReturn = pdFALSE;
+    }
+    else
+    {
+        xReturn = pdTRUE;
+    }
 
-	return xReturn;
+    return xReturn;
 }
-/*-----------------------------------------------------------*/
\ No newline at end of file
+/*-----------------------------------------------------------*/
diff --git a/portable/IAR/ARM_CM23/non_secure/portasm.h b/portable/IAR/ARM_CM23/non_secure/portasm.h
index 71d711c69..6aaee8fc8 100644
--- a/portable/IAR/ARM_CM23/non_secure/portasm.h
+++ b/portable/IAR/ARM_CM23/non_secure/portasm.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -38,14 +38,14 @@
  * @brief Restore the context of the first task so that the first task starts
  * executing.
  */
-void vRestoreContextOfFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vRestoreContextOfFirstTask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Checks whether or not the processor is privileged.
  *
  * @return 1 if the processor is already privileged, 0 otherwise.
  */
-BaseType_t xIsPrivileged( void ) __attribute__ (( naked ));
+BaseType_t xIsPrivileged( void ) __attribute__( ( naked ) );
 
 /**
  * @brief Raises the privilege level by clearing the bit 0 of the CONTROL
@@ -58,7 +58,7 @@ BaseType_t xIsPrivileged( void ) __attribute__ (( naked ));
  *  Bit[0] = 0 --> The processor is running privileged
  *  Bit[0] = 1 --> The processor is running unprivileged.
  */
-void vRaisePrivilege( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vRaisePrivilege( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
@@ -68,32 +68,32 @@ void vRaisePrivilege( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
  *  Bit[0] = 0 --> The processor is running privileged
  *  Bit[0] = 1 --> The processor is running unprivileged.
  */
-void vResetPrivilege( void ) __attribute__ (( naked ));
+void vResetPrivilege( void ) __attribute__( ( naked ) );
 
 /**
  * @brief Starts the first task.
  */
-void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vStartFirstTask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Disables interrupts.
  */
-uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
+uint32_t ulSetInterruptMask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Enables interrupts.
  */
-void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
+void vClearInterruptMask( uint32_t ulMask ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief PendSV Exception handler.
  */
-void PendSV_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void PendSV_Handler( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief SVC Handler.
  */
-void SVC_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void SVC_Handler( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Allocate a Secure context for the calling task.
@@ -101,13 +101,13 @@ void SVC_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
  * @param[in] ulSecureStackSize The size of the stack to be allocated on the
  * secure side for the calling task.
  */
-void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) __attribute__ (( naked ));
+void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) __attribute__( ( naked ) );
 
 /**
  * @brief Free the task's secure context.
  *
  * @param[in] pulTCB Pointer to the Task Control Block (TCB) of the task.
  */
-void vPortFreeSecureContext( uint32_t *pulTCB ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vPortFreeSecureContext( uint32_t * pulTCB ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 #endif /* __PORT_ASM_H__ */
diff --git a/portable/IAR/ARM_CM23/non_secure/portasm.s b/portable/IAR/ARM_CM23/non_secure/portasm.s
index 65360e90e..1703d85df 100644
--- a/portable/IAR/ARM_CM23/non_secure/portasm.s
+++ b/portable/IAR/ARM_CM23/non_secure/portasm.s
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/ARM_CM23/non_secure/portmacro.h b/portable/IAR/ARM_CM23/non_secure/portmacro.h
index badf77062..e0346c4d3 100644
--- a/portable/IAR/ARM_CM23/non_secure/portmacro.h
+++ b/portable/IAR/ARM_CM23/non_secure/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,18 +19,18 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*------------------------------------------------------------------------------
  * Port specific definitions.
@@ -42,109 +42,109 @@ extern "C" {
  *------------------------------------------------------------------------------
  */
 
-#ifndef configENABLE_FPU
-	#error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
-#endif /* configENABLE_FPU */
+    #ifndef configENABLE_FPU
+        #error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
+    #endif /* configENABLE_FPU */
 
-#ifndef configENABLE_MPU
-	#error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
-#endif /* configENABLE_MPU */
+    #ifndef configENABLE_MPU
+        #error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
+    #endif /* configENABLE_MPU */
 
-#ifndef configENABLE_TRUSTZONE
-	#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
-#endif /* configENABLE_TRUSTZONE */
+    #ifndef configENABLE_TRUSTZONE
+        #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
+    #endif /* configENABLE_TRUSTZONE */
 
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Type definitions.
  */
-#define portCHAR											char
-#define portFLOAT											float
-#define portDOUBLE											double
-#define portLONG											long
-#define portSHORT											short
-#define portSTACK_TYPE										uint32_t
-#define portBASE_TYPE										long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE										StackType_t;
-typedef long												BaseType_t;
-typedef unsigned long										UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	 * not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC							1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * Architecture specifics.
  */
-#define portARCH_NAME										"Cortex-M23"
-#define portSTACK_GROWTH									( -1 )
-#define portTICK_PERIOD_MS									( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT									8
-#define portNOP()
-#define portINLINE											__inline
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE								inline __attribute__(( always_inline ))
-#endif
-#define portHAS_STACK_OVERFLOW_CHECKING						1
-#define portDONT_DISCARD									__root
+    #define portARCH_NAME                      "Cortex-M23"
+    #define portSTACK_GROWTH                   ( -1 )
+    #define portTICK_PERIOD_MS                 ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT                 8
+    #define portNOP()
+    #define portINLINE                         __inline
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE               inline __attribute__( ( always_inline ) )
+    #endif
+    #define portHAS_STACK_OVERFLOW_CHECKING    1
+    #define portDONT_DISCARD                   __root
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Extern declarations.
  */
-extern BaseType_t xPortIsInsideInterrupt( void );
+    extern BaseType_t xPortIsInsideInterrupt( void );
 
-extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
 
-extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
-extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
 
-extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
 
-#if( configENABLE_TRUSTZONE == 1 )
-	extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
-	extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
-#endif /* configENABLE_TRUSTZONE */
+    #if ( configENABLE_TRUSTZONE == 1 )
+        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
+        extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
+    #endif /* configENABLE_TRUSTZONE */
 
-#if( configENABLE_MPU == 1 )
-	extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
-	extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
+        extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief MPU specific constants.
  */
-#if( configENABLE_MPU == 1 )
-	#define portUSING_MPU_WRAPPERS							1
-	#define portPRIVILEGE_BIT								( 0x80000000UL )
-#else
-	#define portPRIVILEGE_BIT								( 0x0UL )
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        #define portUSING_MPU_WRAPPERS    1
+        #define portPRIVILEGE_BIT         ( 0x80000000UL )
+    #else
+        #define portPRIVILEGE_BIT         ( 0x0UL )
+    #endif /* configENABLE_MPU */
 
 
 /* MPU regions. */
-#define portPRIVILEGED_FLASH_REGION							( 0UL )
-#define portUNPRIVILEGED_FLASH_REGION						( 1UL )
-#define portUNPRIVILEGED_SYSCALLS_REGION					( 2UL )
-#define portPRIVILEGED_RAM_REGION							( 3UL )
-#define portSTACK_REGION									( 4UL )
-#define portFIRST_CONFIGURABLE_REGION						( 5UL )
-#define portLAST_CONFIGURABLE_REGION						( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS						( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS								( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
+    #define portPRIVILEGED_FLASH_REGION                   ( 0UL )
+    #define portUNPRIVILEGED_FLASH_REGION                 ( 1UL )
+    #define portUNPRIVILEGED_SYSCALLS_REGION              ( 2UL )
+    #define portPRIVILEGED_RAM_REGION                     ( 3UL )
+    #define portSTACK_REGION                              ( 4UL )
+    #define portFIRST_CONFIGURABLE_REGION                 ( 5UL )
+    #define portLAST_CONFIGURABLE_REGION                  ( 7UL )
+    #define portNUM_CONFIGURABLE_REGIONS                  ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
+    #define portTOTAL_NUM_REGIONS                         ( portNUM_CONFIGURABLE_REGIONS + 1 )   /* Plus one to make space for the stack region. */
 
 /* Device memory attributes used in MPU_MAIR registers.
  *
@@ -156,162 +156,164 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
  *				11 --> Device-GRE
  *  Bit[1:0] - 00, Reserved.
  */
-#define portMPU_DEVICE_MEMORY_nGnRnE						( 0x00 ) /* 0000 0000 */
-#define portMPU_DEVICE_MEMORY_nGnRE							( 0x04 ) /* 0000 0100 */
-#define portMPU_DEVICE_MEMORY_nGRE							( 0x08 ) /* 0000 1000 */
-#define portMPU_DEVICE_MEMORY_GRE							( 0x0C ) /* 0000 1100 */
+    #define portMPU_DEVICE_MEMORY_nGnRnE                  ( 0x00 )   /* 0000 0000 */
+    #define portMPU_DEVICE_MEMORY_nGnRE                   ( 0x04 )   /* 0000 0100 */
+    #define portMPU_DEVICE_MEMORY_nGRE                    ( 0x08 )   /* 0000 1000 */
+    #define portMPU_DEVICE_MEMORY_GRE                     ( 0x0C )   /* 0000 1100 */
 
 /* Normal memory attributes used in MPU_MAIR registers. */
-#define portMPU_NORMAL_MEMORY_NON_CACHEABLE					( 0x44 ) /* Non-cacheable. */
-#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE			( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
+    #define portMPU_NORMAL_MEMORY_NON_CACHEABLE           ( 0x44 )   /* Non-cacheable. */
+    #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE    ( 0xFF )   /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
 
 /* Attributes used in MPU_RBAR registers. */
-#define portMPU_REGION_NON_SHAREABLE						( 0UL << 3UL )
-#define portMPU_REGION_INNER_SHAREABLE						( 1UL << 3UL )
-#define portMPU_REGION_OUTER_SHAREABLE						( 2UL << 3UL )
+    #define portMPU_REGION_NON_SHAREABLE                  ( 0UL << 3UL )
+    #define portMPU_REGION_INNER_SHAREABLE                ( 1UL << 3UL )
+    #define portMPU_REGION_OUTER_SHAREABLE                ( 2UL << 3UL )
 
-#define portMPU_REGION_PRIVILEGED_READ_WRITE				( 0UL << 1UL )
-#define portMPU_REGION_READ_WRITE							( 1UL << 1UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY					( 2UL << 1UL )
-#define portMPU_REGION_READ_ONLY							( 3UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_WRITE          ( 0UL << 1UL )
+    #define portMPU_REGION_READ_WRITE                     ( 1UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_ONLY           ( 2UL << 1UL )
+    #define portMPU_REGION_READ_ONLY                      ( 3UL << 1UL )
 
-#define portMPU_REGION_EXECUTE_NEVER						( 1UL )
+    #define portMPU_REGION_EXECUTE_NEVER                  ( 1UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Settings to define an MPU region.
  */
-typedef struct MPURegionSettings
-{
-	uint32_t ulRBAR;	/**< RBAR for the region. */
-	uint32_t ulRLAR;	/**< RLAR for the region. */
-} MPURegionSettings_t;
+    typedef struct MPURegionSettings
+    {
+        uint32_t ulRBAR; /**< RBAR for the region. */
+        uint32_t ulRLAR; /**< RLAR for the region. */
+    } MPURegionSettings_t;
 
 /**
  * @brief MPU settings as stored in the TCB.
  */
-typedef struct MPU_SETTINGS
-{
-	uint32_t ulMAIR0;	/**< MAIR0 for the task containing attributes for all the 4 per task regions. */
-	MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
-} xMPU_SETTINGS;
+    typedef struct MPU_SETTINGS
+    {
+        uint32_t ulMAIR0;                                              /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
+        MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
+    } xMPU_SETTINGS;
 /*-----------------------------------------------------------*/
 
 /**
  * @brief SVC numbers.
  */
-#define portSVC_ALLOCATE_SECURE_CONTEXT						0
-#define portSVC_FREE_SECURE_CONTEXT							1
-#define portSVC_START_SCHEDULER								2
-#define portSVC_RAISE_PRIVILEGE								3
+    #define portSVC_ALLOCATE_SECURE_CONTEXT    0
+    #define portSVC_FREE_SECURE_CONTEXT        1
+    #define portSVC_START_SCHEDULER            2
+    #define portSVC_RAISE_PRIVILEGE            3
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Scheduler utilities.
  */
-#define portYIELD()											vPortYield()
-#define portNVIC_INT_CTRL_REG								( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT								( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired )			if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x )								portEND_SWITCHING_ISR( x )
+    #define portYIELD()                                 vPortYield()
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Tickless idle/low power functionality.
  */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Critical section management.
  */
-#define portSET_INTERRUPT_MASK_FROM_ISR()					ulSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)				vClearInterruptMask( x )
-#define portDISABLE_INTERRUPTS()							__asm volatile ( " cpsid i " ::: "memory" )
-#define portENABLE_INTERRUPTS()								__asm volatile ( " cpsie i " ::: "memory" )
-#define portENTER_CRITICAL()								vPortEnterCritical()
-#define portEXIT_CRITICAL()									vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulSetInterruptMask()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vClearInterruptMask( x )
+    #define portDISABLE_INTERRUPTS()                  __asm volatile ( " cpsid i " ::: "memory" )
+    #define portENABLE_INTERRUPTS()                   __asm volatile ( " cpsie i " ::: "memory" )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Task function macros as described on the FreeRTOS.org WEB site.
  */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters )		void vFunction( void *pvParameters )
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Allocate a secure context for the task.
-	 *
-	 * Tasks are not created with a secure context. Any task that is going to call
-	 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
-	 * secure context before it calls any secure function.
-	 *
-	 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
-	 */
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )	vPortAllocateSecureContext( ulSecureStackSize )
+    #if ( configENABLE_TRUSTZONE == 1 )
 
-	/**
-	 * @brief Called when a task is deleted to delete the task's secure context,
-	 * if it has one.
-	 *
-	 * @param[in] pxTCB The TCB of the task being deleted.
-	 */
-	#define portCLEAN_UP_TCB( pxTCB )							vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-#else
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-	#define portCLEAN_UP_TCB( pxTCB )
-#endif /* configENABLE_TRUSTZONE */
+/**
+ * @brief Allocate a secure context for the task.
+ *
+ * Tasks are not created with a secure context. Any task that is going to call
+ * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
+ * secure context before it calls any secure function.
+ *
+ * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
+ */
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )    vPortAllocateSecureContext( ulSecureStackSize )
+
+/**
+ * @brief Called when a task is deleted to delete the task's secure context,
+ * if it has one.
+ *
+ * @param[in] pxTCB The TCB of the task being deleted.
+ */
+        #define portCLEAN_UP_TCB( pxTCB )                           vPortFreeSecureContext( ( uint32_t * ) pxTCB )
+    #else
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
+        #define portCLEAN_UP_TCB( pxTCB )
+    #endif /* configENABLE_TRUSTZONE */
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Checks whether or not the processor is privileged.
-	 *
-	 * @return 1 if the processor is already privileged, 0 otherwise.
-	 */
-	#define portIS_PRIVILEGED()									xIsPrivileged()
+    #if ( configENABLE_MPU == 1 )
 
-	/**
-	 * @brief Raise an SVC request to raise privilege.
-	 *
-	 * The SVC handler checks that the SVC was raised from a system call and only
-	 * then it raises the privilege. If this is called from any other place,
-	 * the privilege is not raised.
-	 */
-	#define portRAISE_PRIVILEGE()								__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+/**
+ * @brief Checks whether or not the processor is privileged.
+ *
+ * @return 1 if the processor is already privileged, 0 otherwise.
+ */
+        #define portIS_PRIVILEGED()      xIsPrivileged()
 
-	/**
-	 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
-	 * register.
-	 */
-	#define portRESET_PRIVILEGE()								vResetPrivilege()
-#else
-	#define portIS_PRIVILEGED()
-	#define portRAISE_PRIVILEGE()
-	#define portRESET_PRIVILEGE()
-#endif /* configENABLE_MPU */
+/**
+ * @brief Raise an SVC request to raise privilege.
+ *
+ * The SVC handler checks that the SVC was raised from a system call and only
+ * then it raises the privilege. If this is called from any other place,
+ * the privilege is not raised.
+ */
+        #define portRAISE_PRIVILEGE()    __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+
+/**
+ * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
+ * register.
+ */
+        #define portRESET_PRIVILEGE()    vResetPrivilege()
+    #else
+        #define portIS_PRIVILEGED()
+        #define portRAISE_PRIVILEGE()
+        #define portRESET_PRIVILEGE()
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Barriers.
  */
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
+    #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
 /*-----------------------------------------------------------*/
 
 /* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
  * the source code because to do so would cause other compilers to generate
  * warnings. */
-#pragma diag_suppress=Be006
-#pragma diag_suppress=Pa082
+    #pragma diag_suppress=Be006
+    #pragma diag_suppress=Pa082
 /*-----------------------------------------------------------*/
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
diff --git a/portable/IAR/ARM_CM23/secure/secure_context.c b/portable/IAR/ARM_CM23/secure/secure_context.c
index 39fabbf60..59c09ed58 100644
--- a/portable/IAR/ARM_CM23/secure/secure_context.c
+++ b/portable/IAR/ARM_CM23/secure/secure_context.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -40,7 +40,7 @@
  * Bit[0] - 0 --> Thread mode is privileged.
  * Bit[1] - 1 --> Thread mode uses PSP.
  */
-#define securecontextCONTROL_VALUE_PRIVILEGED		0x02
+#define securecontextCONTROL_VALUE_PRIVILEGED      0x02
 
 /**
  * @brief CONTROL value for un-privileged tasks.
@@ -48,7 +48,7 @@
  * Bit[0] - 1 --> Thread mode is un-privileged.
  * Bit[1] - 1 --> Thread mode uses PSP.
  */
-#define securecontextCONTROL_VALUE_UNPRIVILEGED		0x03
+#define securecontextCONTROL_VALUE_UNPRIVILEGED    0x03
 /*-----------------------------------------------------------*/
 
 /**
@@ -59,146 +59,148 @@
  */
 typedef struct SecureContext
 {
-	uint8_t *pucCurrentStackPointer;	/**< Current value of stack pointer (PSP). */
-	uint8_t *pucStackLimit;				/**< Last location of the stack memory (PSPLIM). */
-	uint8_t *pucStackStart;				/**< First location of the stack memory. */
+    uint8_t * pucCurrentStackPointer; /**< Current value of stack pointer (PSP). */
+    uint8_t * pucStackLimit;          /**< Last location of the stack memory (PSPLIM). */
+    uint8_t * pucStackStart;          /**< First location of the stack memory. */
 } SecureContext_t;
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureContext_Init( void )
 {
-	uint32_t ulIPSR;
+    uint32_t ulIPSR;
 
-	/* Read the Interrupt Program Status Register (IPSR) value. */
-	secureportREAD_IPSR( ulIPSR );
+    /* Read the Interrupt Program Status Register (IPSR) value. */
+    secureportREAD_IPSR( ulIPSR );
 
-	/* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-	 * when the processor is running in the Thread Mode. */
-	if( ulIPSR != 0 )
-	{
-		/* No stack for thread mode until a task's context is loaded. */
-		secureportSET_PSPLIM( securecontextNO_STACK );
-		secureportSET_PSP( securecontextNO_STACK );
+    /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
+     * when the processor is running in the Thread Mode. */
+    if( ulIPSR != 0 )
+    {
+        /* No stack for thread mode until a task's context is loaded. */
+        secureportSET_PSPLIM( securecontextNO_STACK );
+        secureportSET_PSP( securecontextNO_STACK );
 
-		#if( configENABLE_MPU == 1 )
-		{
-			/* Configure thread mode to use PSP and to be unprivileged. */
-			secureportSET_CONTROL( securecontextCONTROL_VALUE_UNPRIVILEGED );
-		}
-		#else /* configENABLE_MPU */
-		{
-			/* Configure thread mode to use PSP and to be privileged.. */
-			secureportSET_CONTROL( securecontextCONTROL_VALUE_PRIVILEGED );
-		}
-		#endif /* configENABLE_MPU */
-	}
+        #if ( configENABLE_MPU == 1 )
+            {
+                /* Configure thread mode to use PSP and to be unprivileged. */
+                secureportSET_CONTROL( securecontextCONTROL_VALUE_UNPRIVILEGED );
+            }
+        #else /* configENABLE_MPU */
+            {
+                /* Configure thread mode to use PSP and to be privileged.. */
+                secureportSET_CONTROL( securecontextCONTROL_VALUE_PRIVILEGED );
+            }
+        #endif /* configENABLE_MPU */
+    }
 }
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, uint32_t ulIsTaskPrivileged )
+#if ( configENABLE_MPU == 1 )
+    secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize,
+                                                                                       uint32_t ulIsTaskPrivileged )
 #else /* configENABLE_MPU */
-	secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize )
+    secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize )
 #endif /* configENABLE_MPU */
 {
-	uint8_t *pucStackMemory = NULL;
-	uint32_t ulIPSR;
-	SecureContextHandle_t xSecureContextHandle = NULL;
-	#if( configENABLE_MPU == 1 )
-		uint32_t *pulCurrentStackPointer = NULL;
-	#endif /* configENABLE_MPU */
+    uint8_t * pucStackMemory = NULL;
+    uint32_t ulIPSR;
+    SecureContextHandle_t xSecureContextHandle = NULL;
 
-	/* Read the Interrupt Program Status Register (IPSR) value. */
-	secureportREAD_IPSR( ulIPSR );
+    #if ( configENABLE_MPU == 1 )
+        uint32_t * pulCurrentStackPointer = NULL;
+    #endif /* configENABLE_MPU */
 
-	/* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-	 * when the processor is running in the Thread Mode. */
-	if( ulIPSR != 0 )
-	{
-		/* Allocate the context structure. */
-		xSecureContextHandle = ( SecureContextHandle_t ) pvPortMalloc( sizeof( SecureContext_t ) );
+    /* Read the Interrupt Program Status Register (IPSR) value. */
+    secureportREAD_IPSR( ulIPSR );
 
-		if( xSecureContextHandle != NULL )
-		{
-			/* Allocate the stack space. */
-			pucStackMemory = pvPortMalloc( ulSecureStackSize );
+    /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
+     * when the processor is running in the Thread Mode. */
+    if( ulIPSR != 0 )
+    {
+        /* Allocate the context structure. */
+        xSecureContextHandle = ( SecureContextHandle_t ) pvPortMalloc( sizeof( SecureContext_t ) );
 
-			if( pucStackMemory != NULL )
-			{
-				/* Since stack grows down, the starting point will be the last
-				 * location. Note that this location is next to the last
-				 * allocated byte because the hardware decrements the stack
-				 * pointer before writing i.e. if stack pointer is 0x2, a push
-				 * operation will decrement the stack pointer to 0x1 and then
-				 * write at 0x1. */
-				xSecureContextHandle->pucStackStart = pucStackMemory + ulSecureStackSize;
+        if( xSecureContextHandle != NULL )
+        {
+            /* Allocate the stack space. */
+            pucStackMemory = pvPortMalloc( ulSecureStackSize );
 
-				/* The stack cannot go beyond this location. This value is
-				 * programmed in the PSPLIM register on context switch.*/
-				xSecureContextHandle->pucStackLimit = pucStackMemory;
+            if( pucStackMemory != NULL )
+            {
+                /* Since stack grows down, the starting point will be the last
+                 * location. Note that this location is next to the last
+                 * allocated byte because the hardware decrements the stack
+                 * pointer before writing i.e. if stack pointer is 0x2, a push
+                 * operation will decrement the stack pointer to 0x1 and then
+                 * write at 0x1. */
+                xSecureContextHandle->pucStackStart = pucStackMemory + ulSecureStackSize;
 
-				#if( configENABLE_MPU == 1 )
-				{
-					/* Store the correct CONTROL value for the task on the stack.
-					 * This value is programmed in the CONTROL register on
-					 * context switch. */
-					pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart;
-					pulCurrentStackPointer--;
-					if( ulIsTaskPrivileged )
-					{
-						*( pulCurrentStackPointer ) = securecontextCONTROL_VALUE_PRIVILEGED;
-					}
-					else
-					{
-						*( pulCurrentStackPointer ) = securecontextCONTROL_VALUE_UNPRIVILEGED;
-					}
+                /* The stack cannot go beyond this location. This value is
+                 * programmed in the PSPLIM register on context switch.*/
+                xSecureContextHandle->pucStackLimit = pucStackMemory;
 
-					/* Store the current stack pointer. This value is programmed in
-					 * the PSP register on context switch. */
-					xSecureContextHandle->pucCurrentStackPointer = ( uint8_t * ) pulCurrentStackPointer;
-				}
-				#else /* configENABLE_MPU */
-				{
-					/* Current SP is set to the starting of the stack. This
-					 * value programmed in the PSP register on context switch. */
-					xSecureContextHandle->pucCurrentStackPointer = xSecureContextHandle->pucStackStart;
+                #if ( configENABLE_MPU == 1 )
+                    {
+                        /* Store the correct CONTROL value for the task on the stack.
+                         * This value is programmed in the CONTROL register on
+                         * context switch. */
+                        pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart;
+                        pulCurrentStackPointer--;
 
-				}
-				#endif /* configENABLE_MPU */
-			}
-			else
-			{
-				/* Free the context to avoid memory leak and make sure to return
-				 * NULL to indicate failure. */
-				vPortFree( xSecureContextHandle );
-				xSecureContextHandle = NULL;
-			}
-		}
-	}
+                        if( ulIsTaskPrivileged )
+                        {
+                            *( pulCurrentStackPointer ) = securecontextCONTROL_VALUE_PRIVILEGED;
+                        }
+                        else
+                        {
+                            *( pulCurrentStackPointer ) = securecontextCONTROL_VALUE_UNPRIVILEGED;
+                        }
 
-	return xSecureContextHandle;
+                        /* Store the current stack pointer. This value is programmed in
+                         * the PSP register on context switch. */
+                        xSecureContextHandle->pucCurrentStackPointer = ( uint8_t * ) pulCurrentStackPointer;
+                    }
+                #else /* configENABLE_MPU */
+                    {
+                        /* Current SP is set to the starting of the stack. This
+                         * value programmed in the PSP register on context switch. */
+                        xSecureContextHandle->pucCurrentStackPointer = xSecureContextHandle->pucStackStart;
+                    }
+                #endif /* configENABLE_MPU */
+            }
+            else
+            {
+                /* Free the context to avoid memory leak and make sure to return
+                 * NULL to indicate failure. */
+                vPortFree( xSecureContextHandle );
+                xSecureContextHandle = NULL;
+            }
+        }
+    }
+
+    return xSecureContextHandle;
 }
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle )
 {
-	uint32_t ulIPSR;
+    uint32_t ulIPSR;
 
-	/* Read the Interrupt Program Status Register (IPSR) value. */
-	secureportREAD_IPSR( ulIPSR );
+    /* Read the Interrupt Program Status Register (IPSR) value. */
+    secureportREAD_IPSR( ulIPSR );
 
-	/* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-	 * when the processor is running in the Thread Mode. */
-	if( ulIPSR != 0 )
-	{
-		/* Ensure that valid parameters are passed. */
-		secureportASSERT( xSecureContextHandle != NULL );
+    /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
+     * when the processor is running in the Thread Mode. */
+    if( ulIPSR != 0 )
+    {
+        /* Ensure that valid parameters are passed. */
+        secureportASSERT( xSecureContextHandle != NULL );
 
-		/* Free the stack space. */
-		vPortFree( xSecureContextHandle->pucStackLimit );
+        /* Free the stack space. */
+        vPortFree( xSecureContextHandle->pucStackLimit );
 
-		/* Free the context itself. */
-		vPortFree( xSecureContextHandle );
-	}
+        /* Free the context itself. */
+        vPortFree( xSecureContextHandle );
+    }
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/IAR/ARM_CM23/secure/secure_context.h b/portable/IAR/ARM_CM23/secure/secure_context.h
index 747c2c6fd..681ac6916 100644
--- a/portable/IAR/ARM_CM23/secure/secure_context.h
+++ b/portable/IAR/ARM_CM23/secure/secure_context.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -37,13 +37,13 @@
 /**
  * @brief PSP value when no task's context is loaded.
  */
-#define securecontextNO_STACK	0x0
+#define securecontextNO_STACK    0x0
 
 /**
  * @brief Opaque handle.
  */
 struct SecureContext;
-typedef struct SecureContext*	SecureContextHandle_t;
+typedef struct SecureContext * SecureContextHandle_t;
 /*-----------------------------------------------------------*/
 
 /**
@@ -69,10 +69,11 @@ void SecureContext_Init( void );
  * @return Opaque context handle if context is successfully allocated, NULL
  * otherwise.
  */
-#if( configENABLE_MPU == 1 )
-	SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, uint32_t ulIsTaskPrivileged );
+#if ( configENABLE_MPU == 1 )
+    SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize,
+                                                         uint32_t ulIsTaskPrivileged );
 #else /* configENABLE_MPU */
-	SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize );
+    SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize );
 #endif /* configENABLE_MPU */
 
 /**
diff --git a/portable/IAR/ARM_CM23/secure/secure_context_port.c b/portable/IAR/ARM_CM23/secure/secure_context_port.c
index 5dc8e4847..5f11f45d0 100644
--- a/portable/IAR/ARM_CM23/secure/secure_context_port.c
+++ b/portable/IAR/ARM_CM23/secure/secure_context_port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -37,12 +37,12 @@ extern void SecureContext_SaveContextAsm( SecureContextHandle_t xSecureContextHa
 
 secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle )
 {
-	SecureContext_LoadContextAsm( xSecureContextHandle );
+    SecureContext_LoadContextAsm( xSecureContextHandle );
 }
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle )
 {
-	SecureContext_SaveContextAsm( xSecureContextHandle );
+    SecureContext_SaveContextAsm( xSecureContextHandle );
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s
index 02df8925c..eaf48b755 100644
--- a/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s
+++ b/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/ARM_CM23/secure/secure_heap.c b/portable/IAR/ARM_CM23/secure/secure_heap.c
index 7995a7f12..7c3227b18 100644
--- a/portable/IAR/ARM_CM23/secure/secure_heap.c
+++ b/portable/IAR/ARM_CM23/secure/secure_heap.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -37,37 +37,38 @@
 /**
  * @brief Total heap size.
  */
-#define secureconfigTOTAL_HEAP_SIZE		( ( ( size_t ) ( 10 * 1024 ) ) )
+#define secureconfigTOTAL_HEAP_SIZE    ( ( ( size_t ) ( 10 * 1024 ) ) )
 
 /* No test marker by default. */
 #ifndef mtCOVERAGE_TEST_MARKER
-	#define mtCOVERAGE_TEST_MARKER()
+    #define mtCOVERAGE_TEST_MARKER()
 #endif
 
 /* No tracing by default. */
 #ifndef traceMALLOC
-	#define traceMALLOC( pvReturn, xWantedSize )
+    #define traceMALLOC( pvReturn, xWantedSize )
 #endif
 
 /* No tracing by default. */
 #ifndef traceFREE
-	#define traceFREE( pv, xBlockSize )
+    #define traceFREE( pv, xBlockSize )
 #endif
 
 /* Block sizes must not get too small. */
-#define secureheapMINIMUM_BLOCK_SIZE	( ( size_t ) ( xHeapStructSize << 1 ) )
+#define secureheapMINIMUM_BLOCK_SIZE    ( ( size_t ) ( xHeapStructSize << 1 ) )
 
 /* Assumes 8bit bytes! */
-#define secureheapBITS_PER_BYTE			( ( size_t ) 8 )
+#define secureheapBITS_PER_BYTE         ( ( size_t ) 8 )
 /*-----------------------------------------------------------*/
 
 /* Allocate the memory for the heap. */
-#if( configAPPLICATION_ALLOCATED_HEAP == 1 )
-	/* The application writer has already defined the array used for the RTOS
-	 * heap - probably so it can be placed in a special segment or address. */
-	extern uint8_t ucHeap[ secureconfigTOTAL_HEAP_SIZE ];
+#if ( configAPPLICATION_ALLOCATED_HEAP == 1 )
+
+/* The application writer has already defined the array used for the RTOS
+* heap - probably so it can be placed in a special segment or address. */
+    extern uint8_t ucHeap[ secureconfigTOTAL_HEAP_SIZE ];
 #else /* configAPPLICATION_ALLOCATED_HEAP */
-	static uint8_t ucHeap[ secureconfigTOTAL_HEAP_SIZE ];
+    static uint8_t ucHeap[ secureconfigTOTAL_HEAP_SIZE ];
 #endif /* configAPPLICATION_ALLOCATED_HEAP */
 
 /**
@@ -77,8 +78,8 @@
  */
 typedef struct A_BLOCK_LINK
 {
-	struct A_BLOCK_LINK *pxNextFreeBlock;	/**< The next free block in the list. */
-	size_t xBlockSize;						/**< The size of the free block. */
+    struct A_BLOCK_LINK * pxNextFreeBlock; /**< The next free block in the list. */
+    size_t xBlockSize;                     /**< The size of the free block. */
 } BlockLink_t;
 /*-----------------------------------------------------------*/
 
@@ -97,7 +98,7 @@ static void prvHeapInit( void );
  *
  * @param[in] pxBlockToInsert The block being freed.
  */
-static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert );
+static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert );
 /*-----------------------------------------------------------*/
 
 /**
@@ -109,7 +110,7 @@ static const size_t xHeapStructSize = ( sizeof( BlockLink_t ) + ( ( size_t ) ( s
 /**
  * @brief Create a couple of list links to mark the start and end of the list.
  */
-static BlockLink_t xStart, *pxEnd = NULL;
+static BlockLink_t xStart, * pxEnd = NULL;
 
 /**
  * @brief Keeps track of the number of free bytes remaining, but says nothing
@@ -130,321 +131,324 @@ static size_t xBlockAllocatedBit = 0;
 
 static void prvHeapInit( void )
 {
-BlockLink_t *pxFirstFreeBlock;
-uint8_t *pucAlignedHeap;
-size_t uxAddress;
-size_t xTotalHeapSize = secureconfigTOTAL_HEAP_SIZE;
+    BlockLink_t * pxFirstFreeBlock;
+    uint8_t * pucAlignedHeap;
+    size_t uxAddress;
+    size_t xTotalHeapSize = secureconfigTOTAL_HEAP_SIZE;
 
-	/* Ensure the heap starts on a correctly aligned boundary. */
-	uxAddress = ( size_t ) ucHeap;
+    /* Ensure the heap starts on a correctly aligned boundary. */
+    uxAddress = ( size_t ) ucHeap;
 
-	if( ( uxAddress & secureportBYTE_ALIGNMENT_MASK ) != 0 )
-	{
-		uxAddress += ( secureportBYTE_ALIGNMENT - 1 );
-		uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK );
-		xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
-	}
+    if( ( uxAddress & secureportBYTE_ALIGNMENT_MASK ) != 0 )
+    {
+        uxAddress += ( secureportBYTE_ALIGNMENT - 1 );
+        uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK );
+        xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
+    }
 
-	pucAlignedHeap = ( uint8_t * ) uxAddress;
+    pucAlignedHeap = ( uint8_t * ) uxAddress;
 
-	/* xStart is used to hold a pointer to the first item in the list of free
-	 * blocks.  The void cast is used to prevent compiler warnings. */
-	xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
-	xStart.xBlockSize = ( size_t ) 0;
+    /* xStart is used to hold a pointer to the first item in the list of free
+     * blocks.  The void cast is used to prevent compiler warnings. */
+    xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
+    xStart.xBlockSize = ( size_t ) 0;
 
-	/* pxEnd is used to mark the end of the list of free blocks and is inserted
-	 * at the end of the heap space. */
-	uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
-	uxAddress -= xHeapStructSize;
-	uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK );
-	pxEnd = ( void * ) uxAddress;
-	pxEnd->xBlockSize = 0;
-	pxEnd->pxNextFreeBlock = NULL;
+    /* pxEnd is used to mark the end of the list of free blocks and is inserted
+     * at the end of the heap space. */
+    uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
+    uxAddress -= xHeapStructSize;
+    uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK );
+    pxEnd = ( void * ) uxAddress;
+    pxEnd->xBlockSize = 0;
+    pxEnd->pxNextFreeBlock = NULL;
 
-	/* To start with there is a single free block that is sized to take up the
-	 * entire heap space, minus the space taken by pxEnd. */
-	pxFirstFreeBlock = ( void * ) pucAlignedHeap;
-	pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
-	pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
+    /* To start with there is a single free block that is sized to take up the
+     * entire heap space, minus the space taken by pxEnd. */
+    pxFirstFreeBlock = ( void * ) pucAlignedHeap;
+    pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
+    pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
 
-	/* Only one block exists - and it covers the entire usable heap space. */
-	xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
-	xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
+    /* Only one block exists - and it covers the entire usable heap space. */
+    xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
+    xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
 
-	/* Work out the position of the top bit in a size_t variable. */
-	xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * secureheapBITS_PER_BYTE ) - 1 );
+    /* Work out the position of the top bit in a size_t variable. */
+    xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * secureheapBITS_PER_BYTE ) - 1 );
 }
 /*-----------------------------------------------------------*/
 
-static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert )
+static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert )
 {
-BlockLink_t *pxIterator;
-uint8_t *puc;
+    BlockLink_t * pxIterator;
+    uint8_t * puc;
 
-	/* Iterate through the list until a block is found that has a higher address
-	 * than the block being inserted. */
-	for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
-	{
-		/* Nothing to do here, just iterate to the right position. */
-	}
+    /* Iterate through the list until a block is found that has a higher address
+     * than the block being inserted. */
+    for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
+    {
+        /* Nothing to do here, just iterate to the right position. */
+    }
 
-	/* Do the block being inserted, and the block it is being inserted after
-	 * make a contiguous block of memory? */
-	puc = ( uint8_t * ) pxIterator;
-	if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
-	{
-		pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
-		pxBlockToInsert = pxIterator;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    /* Do the block being inserted, and the block it is being inserted after
+     * make a contiguous block of memory? */
+    puc = ( uint8_t * ) pxIterator;
 
-	/* Do the block being inserted, and the block it is being inserted before
-	 * make a contiguous block of memory? */
-	puc = ( uint8_t * ) pxBlockToInsert;
-	if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
-	{
-		if( pxIterator->pxNextFreeBlock != pxEnd )
-		{
-			/* Form one big block from the two blocks. */
-			pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
-			pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
-		}
-		else
-		{
-			pxBlockToInsert->pxNextFreeBlock = pxEnd;
-		}
-	}
-	else
-	{
-		pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
-	}
+    if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
+    {
+        pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
+        pxBlockToInsert = pxIterator;
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	/* If the block being inserted plugged a gab, so was merged with the block
-	 * before and the block after, then it's pxNextFreeBlock pointer will have
-	 * already been set, and should not be set here as that would make it point
-	 * to itself. */
-	if( pxIterator != pxBlockToInsert )
-	{
-		pxIterator->pxNextFreeBlock = pxBlockToInsert;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    /* Do the block being inserted, and the block it is being inserted before
+     * make a contiguous block of memory? */
+    puc = ( uint8_t * ) pxBlockToInsert;
+
+    if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
+    {
+        if( pxIterator->pxNextFreeBlock != pxEnd )
+        {
+            /* Form one big block from the two blocks. */
+            pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
+            pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
+        }
+        else
+        {
+            pxBlockToInsert->pxNextFreeBlock = pxEnd;
+        }
+    }
+    else
+    {
+        pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
+    }
+
+    /* If the block being inserted plugged a gab, so was merged with the block
+     * before and the block after, then it's pxNextFreeBlock pointer will have
+     * already been set, and should not be set here as that would make it point
+     * to itself. */
+    if( pxIterator != pxBlockToInsert )
+    {
+        pxIterator->pxNextFreeBlock = pxBlockToInsert;
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 }
 /*-----------------------------------------------------------*/
 
-void *pvPortMalloc( size_t xWantedSize )
+void * pvPortMalloc( size_t xWantedSize )
 {
-BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
-void *pvReturn = NULL;
+    BlockLink_t * pxBlock, * pxPreviousBlock, * pxNewBlockLink;
+    void * pvReturn = NULL;
 
-	/* If this is the first call to malloc then the heap will require
-	 * initialisation to setup the list of free blocks. */
-	if( pxEnd == NULL )
-	{
-		prvHeapInit();
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    /* If this is the first call to malloc then the heap will require
+     * initialisation to setup the list of free blocks. */
+    if( pxEnd == NULL )
+    {
+        prvHeapInit();
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	/* Check the requested block size is not so large that the top bit is set.
-	 * The top bit of the block size member of the BlockLink_t structure is used
-	 * to determine who owns the block - the application or the kernel, so it
-	 * must be free. */
-	if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
-	{
-		/* The wanted size is increased so it can contain a BlockLink_t
-		 * structure in addition to the requested amount of bytes. */
-		if( xWantedSize > 0 )
-		{
-			xWantedSize += xHeapStructSize;
+    /* Check the requested block size is not so large that the top bit is set.
+     * The top bit of the block size member of the BlockLink_t structure is used
+     * to determine who owns the block - the application or the kernel, so it
+     * must be free. */
+    if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
+    {
+        /* The wanted size is increased so it can contain a BlockLink_t
+         * structure in addition to the requested amount of bytes. */
+        if( xWantedSize > 0 )
+        {
+            xWantedSize += xHeapStructSize;
 
-			/* Ensure that blocks are always aligned to the required number of
-			 * bytes. */
-			if( ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) != 0x00 )
-			{
-				/* Byte alignment required. */
-				xWantedSize += ( secureportBYTE_ALIGNMENT - ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) );
-				secureportASSERT( ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) == 0 );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
+            /* Ensure that blocks are always aligned to the required number of
+             * bytes. */
+            if( ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) != 0x00 )
+            {
+                /* Byte alignment required. */
+                xWantedSize += ( secureportBYTE_ALIGNMENT - ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) );
+                secureportASSERT( ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) == 0 );
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
 
-		if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
-		{
-			/* Traverse the list from the start (lowest address) block until
-			 * one of adequate size is found. */
-			pxPreviousBlock = &xStart;
-			pxBlock = xStart.pxNextFreeBlock;
-			while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
-			{
-				pxPreviousBlock = pxBlock;
-				pxBlock = pxBlock->pxNextFreeBlock;
-			}
+        if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
+        {
+            /* Traverse the list from the start (lowest address) block until
+             * one of adequate size is found. */
+            pxPreviousBlock = &xStart;
+            pxBlock = xStart.pxNextFreeBlock;
 
-			/* If the end marker was reached then a block of adequate size was
-			 * not found. */
-			if( pxBlock != pxEnd )
-			{
-				/* Return the memory space pointed to - jumping over the
-				 * BlockLink_t structure at its start. */
-				pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
+            while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
+            {
+                pxPreviousBlock = pxBlock;
+                pxBlock = pxBlock->pxNextFreeBlock;
+            }
 
-				/* This block is being returned for use so must be taken out
-				 * of the list of free blocks. */
-				pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
+            /* If the end marker was reached then a block of adequate size was
+             * not found. */
+            if( pxBlock != pxEnd )
+            {
+                /* Return the memory space pointed to - jumping over the
+                 * BlockLink_t structure at its start. */
+                pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
 
-				/* If the block is larger than required it can be split into
-				 * two. */
-				if( ( pxBlock->xBlockSize - xWantedSize ) > secureheapMINIMUM_BLOCK_SIZE )
-				{
-					/* This block is to be split into two.  Create a new
-					 * block following the number of bytes requested. The void
-					 * cast is used to prevent byte alignment warnings from the
-					 * compiler. */
-					pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
-					secureportASSERT( ( ( ( size_t ) pxNewBlockLink ) & secureportBYTE_ALIGNMENT_MASK ) == 0 );
+                /* This block is being returned for use so must be taken out
+                 * of the list of free blocks. */
+                pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
 
-					/* Calculate the sizes of two blocks split from the single
-					 * block. */
-					pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
-					pxBlock->xBlockSize = xWantedSize;
+                /* If the block is larger than required it can be split into
+                 * two. */
+                if( ( pxBlock->xBlockSize - xWantedSize ) > secureheapMINIMUM_BLOCK_SIZE )
+                {
+                    /* This block is to be split into two.  Create a new
+                     * block following the number of bytes requested. The void
+                     * cast is used to prevent byte alignment warnings from the
+                     * compiler. */
+                    pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
+                    secureportASSERT( ( ( ( size_t ) pxNewBlockLink ) & secureportBYTE_ALIGNMENT_MASK ) == 0 );
 
-					/* Insert the new block into the list of free blocks. */
-					prvInsertBlockIntoFreeList( pxNewBlockLink );
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
+                    /* Calculate the sizes of two blocks split from the single
+                     * block. */
+                    pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
+                    pxBlock->xBlockSize = xWantedSize;
 
-				xFreeBytesRemaining -= pxBlock->xBlockSize;
+                    /* Insert the new block into the list of free blocks. */
+                    prvInsertBlockIntoFreeList( pxNewBlockLink );
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
 
-				if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
-				{
-					xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
+                xFreeBytesRemaining -= pxBlock->xBlockSize;
 
-				/* The block is being returned - it is allocated and owned by
-				 * the application and has no "next" block. */
-				pxBlock->xBlockSize |= xBlockAllocatedBit;
-				pxBlock->pxNextFreeBlock = NULL;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+                if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
+                {
+                    xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
 
-	traceMALLOC( pvReturn, xWantedSize );
+                /* The block is being returned - it is allocated and owned by
+                 * the application and has no "next" block. */
+                pxBlock->xBlockSize |= xBlockAllocatedBit;
+                pxBlock->pxNextFreeBlock = NULL;
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	#if( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
-	{
-		if( pvReturn == NULL )
-		{
-			extern void vApplicationMallocFailedHook( void );
-			vApplicationMallocFailedHook();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	#endif
+    traceMALLOC( pvReturn, xWantedSize );
 
-	secureportASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) secureportBYTE_ALIGNMENT_MASK ) == 0 );
-	return pvReturn;
+    #if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
+        {
+            if( pvReturn == NULL )
+            {
+                extern void vApplicationMallocFailedHook( void );
+                vApplicationMallocFailedHook();
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+    #endif /* if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 ) */
+
+    secureportASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) secureportBYTE_ALIGNMENT_MASK ) == 0 );
+    return pvReturn;
 }
 /*-----------------------------------------------------------*/
 
-void vPortFree( void *pv )
+void vPortFree( void * pv )
 {
-uint8_t *puc = ( uint8_t * ) pv;
-BlockLink_t *pxLink;
+    uint8_t * puc = ( uint8_t * ) pv;
+    BlockLink_t * pxLink;
 
-	if( pv != NULL )
-	{
-		/* The memory being freed will have an BlockLink_t structure immediately
-		 * before it. */
-		puc -= xHeapStructSize;
+    if( pv != NULL )
+    {
+        /* The memory being freed will have an BlockLink_t structure immediately
+         * before it. */
+        puc -= xHeapStructSize;
 
-		/* This casting is to keep the compiler from issuing warnings. */
-		pxLink = ( void * ) puc;
+        /* This casting is to keep the compiler from issuing warnings. */
+        pxLink = ( void * ) puc;
 
-		/* Check the block is actually allocated. */
-		secureportASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
-		secureportASSERT( pxLink->pxNextFreeBlock == NULL );
+        /* Check the block is actually allocated. */
+        secureportASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
+        secureportASSERT( pxLink->pxNextFreeBlock == NULL );
 
-		if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
-		{
-			if( pxLink->pxNextFreeBlock == NULL )
-			{
-				/* The block is being returned to the heap - it is no longer
-				 * allocated. */
-				pxLink->xBlockSize &= ~xBlockAllocatedBit;
+        if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
+        {
+            if( pxLink->pxNextFreeBlock == NULL )
+            {
+                /* The block is being returned to the heap - it is no longer
+                 * allocated. */
+                pxLink->xBlockSize &= ~xBlockAllocatedBit;
 
-				secureportDISABLE_NON_SECURE_INTERRUPTS();
-				{
-					/* Add this block to the list of free blocks. */
-					xFreeBytesRemaining += pxLink->xBlockSize;
-					traceFREE( pv, pxLink->xBlockSize );
-					prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
-				}
-				secureportENABLE_NON_SECURE_INTERRUPTS();
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
+                secureportDISABLE_NON_SECURE_INTERRUPTS();
+                {
+                    /* Add this block to the list of free blocks. */
+                    xFreeBytesRemaining += pxLink->xBlockSize;
+                    traceFREE( pv, pxLink->xBlockSize );
+                    prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
+                }
+                secureportENABLE_NON_SECURE_INTERRUPTS();
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
 }
 /*-----------------------------------------------------------*/
 
 size_t xPortGetFreeHeapSize( void )
 {
-	return xFreeBytesRemaining;
+    return xFreeBytesRemaining;
 }
 /*-----------------------------------------------------------*/
 
 size_t xPortGetMinimumEverFreeHeapSize( void )
 {
-	return xMinimumEverFreeBytesRemaining;
+    return xMinimumEverFreeBytesRemaining;
 }
 /*-----------------------------------------------------------*/
 
 void vPortInitialiseBlocks( void )
 {
-	/* This just exists to keep the linker quiet. */
+    /* This just exists to keep the linker quiet. */
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/IAR/ARM_CM23/secure/secure_heap.h b/portable/IAR/ARM_CM23/secure/secure_heap.h
index aa67e39d8..d507107cd 100644
--- a/portable/IAR/ARM_CM23/secure/secure_heap.h
+++ b/portable/IAR/ARM_CM23/secure/secure_heap.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -39,13 +39,13 @@
  * @return Pointer to the memory region if the allocation is successful, NULL
  * otherwise.
  */
-void *pvPortMalloc( size_t xWantedSize );
+void * pvPortMalloc( size_t xWantedSize );
 
 /**
  * @brief Frees the previously allocated memory.
  *
  * @param[in] pv Pointer to the memory to be freed.
  */
-void vPortFree( void *pv );
+void vPortFree( void * pv );
 
 #endif /* __SECURE_HEAP_H__ */
diff --git a/portable/IAR/ARM_CM23/secure/secure_init.c b/portable/IAR/ARM_CM23/secure/secure_init.c
index 629186130..40b115f53 100644
--- a/portable/IAR/ARM_CM23/secure/secure_init.c
+++ b/portable/IAR/ARM_CM23/secure/secure_init.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -37,69 +37,69 @@
 /**
  * @brief Constants required to manipulate the SCB.
  */
-#define secureinitSCB_AIRCR					( ( volatile uint32_t * ) 0xe000ed0c )  /* Application Interrupt and Reset Control Register. */
-#define secureinitSCB_AIRCR_VECTKEY_POS		( 16UL )
-#define secureinitSCB_AIRCR_VECTKEY_MASK	( 0xFFFFUL << secureinitSCB_AIRCR_VECTKEY_POS )
-#define secureinitSCB_AIRCR_PRIS_POS		( 14UL )
-#define secureinitSCB_AIRCR_PRIS_MASK		( 1UL << secureinitSCB_AIRCR_PRIS_POS )
+#define secureinitSCB_AIRCR                 ( ( volatile uint32_t * ) 0xe000ed0c )  /* Application Interrupt and Reset Control Register. */
+#define secureinitSCB_AIRCR_VECTKEY_POS     ( 16UL )
+#define secureinitSCB_AIRCR_VECTKEY_MASK    ( 0xFFFFUL << secureinitSCB_AIRCR_VECTKEY_POS )
+#define secureinitSCB_AIRCR_PRIS_POS        ( 14UL )
+#define secureinitSCB_AIRCR_PRIS_MASK       ( 1UL << secureinitSCB_AIRCR_PRIS_POS )
 
 /**
  * @brief Constants required to manipulate the FPU.
  */
-#define secureinitFPCCR						( ( volatile uint32_t * ) 0xe000ef34 )  /* Floating Point Context Control Register. */
-#define secureinitFPCCR_LSPENS_POS			( 29UL )
-#define secureinitFPCCR_LSPENS_MASK			( 1UL << secureinitFPCCR_LSPENS_POS )
-#define secureinitFPCCR_TS_POS				( 26UL )
-#define secureinitFPCCR_TS_MASK				( 1UL << secureinitFPCCR_TS_POS )
+#define secureinitFPCCR                     ( ( volatile uint32_t * ) 0xe000ef34 )  /* Floating Point Context Control Register. */
+#define secureinitFPCCR_LSPENS_POS          ( 29UL )
+#define secureinitFPCCR_LSPENS_MASK         ( 1UL << secureinitFPCCR_LSPENS_POS )
+#define secureinitFPCCR_TS_POS              ( 26UL )
+#define secureinitFPCCR_TS_MASK             ( 1UL << secureinitFPCCR_TS_POS )
 
-#define secureinitNSACR						( ( volatile uint32_t * ) 0xe000ed8c )  /* Non-secure Access Control Register. */
-#define secureinitNSACR_CP10_POS			( 10UL )
-#define secureinitNSACR_CP10_MASK			( 1UL << secureinitNSACR_CP10_POS )
-#define secureinitNSACR_CP11_POS			( 11UL )
-#define secureinitNSACR_CP11_MASK			( 1UL << secureinitNSACR_CP11_POS )
+#define secureinitNSACR                     ( ( volatile uint32_t * ) 0xe000ed8c )  /* Non-secure Access Control Register. */
+#define secureinitNSACR_CP10_POS            ( 10UL )
+#define secureinitNSACR_CP10_MASK           ( 1UL << secureinitNSACR_CP10_POS )
+#define secureinitNSACR_CP11_POS            ( 11UL )
+#define secureinitNSACR_CP11_MASK           ( 1UL << secureinitNSACR_CP11_POS )
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureInit_DePrioritizeNSExceptions( void )
 {
-	uint32_t ulIPSR;
+    uint32_t ulIPSR;
 
-	 /* Read the Interrupt Program Status Register (IPSR) value. */
-	secureportREAD_IPSR( ulIPSR );
+    /* Read the Interrupt Program Status Register (IPSR) value. */
+    secureportREAD_IPSR( ulIPSR );
 
-	/* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-	 * when the processor is running in the Thread Mode. */
-	if( ulIPSR != 0 )
-	{
-		*( secureinitSCB_AIRCR ) =	( *( secureinitSCB_AIRCR ) & ~( secureinitSCB_AIRCR_VECTKEY_MASK | secureinitSCB_AIRCR_PRIS_MASK ) ) |
-									( ( 0x05FAUL << secureinitSCB_AIRCR_VECTKEY_POS ) & secureinitSCB_AIRCR_VECTKEY_MASK ) |
-									( ( 0x1UL	<< secureinitSCB_AIRCR_PRIS_POS )	& secureinitSCB_AIRCR_PRIS_MASK );
-	}
+    /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
+     * when the processor is running in the Thread Mode. */
+    if( ulIPSR != 0 )
+    {
+        *( secureinitSCB_AIRCR ) = ( *( secureinitSCB_AIRCR ) & ~( secureinitSCB_AIRCR_VECTKEY_MASK | secureinitSCB_AIRCR_PRIS_MASK ) ) |
+                                   ( ( 0x05FAUL << secureinitSCB_AIRCR_VECTKEY_POS ) & secureinitSCB_AIRCR_VECTKEY_MASK ) |
+                                   ( ( 0x1UL << secureinitSCB_AIRCR_PRIS_POS ) & secureinitSCB_AIRCR_PRIS_MASK );
+    }
 }
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureInit_EnableNSFPUAccess( void )
 {
-	uint32_t ulIPSR;
+    uint32_t ulIPSR;
 
-	 /* Read the Interrupt Program Status Register (IPSR) value. */
-	secureportREAD_IPSR( ulIPSR );
+    /* Read the Interrupt Program Status Register (IPSR) value. */
+    secureportREAD_IPSR( ulIPSR );
 
-	/* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-	 * when the processor is running in the Thread Mode. */
-	if( ulIPSR != 0 )
-	{
-		/* CP10 = 1 ==> Non-secure access to the Floating Point Unit is
-		 * permitted. CP11 should be programmed to the same value as CP10. */
-		*( secureinitNSACR ) |= ( secureinitNSACR_CP10_MASK | secureinitNSACR_CP11_MASK );
+    /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
+     * when the processor is running in the Thread Mode. */
+    if( ulIPSR != 0 )
+    {
+        /* CP10 = 1 ==> Non-secure access to the Floating Point Unit is
+         * permitted. CP11 should be programmed to the same value as CP10. */
+        *( secureinitNSACR ) |= ( secureinitNSACR_CP10_MASK | secureinitNSACR_CP11_MASK );
 
-		/* LSPENS = 0 ==> LSPEN is writable fron non-secure state. This ensures
-		 * that we can enable/disable lazy stacking in port.c file. */
-		*( secureinitFPCCR ) &= ~ ( secureinitFPCCR_LSPENS_MASK );
+        /* LSPENS = 0 ==> LSPEN is writable fron non-secure state. This ensures
+         * that we can enable/disable lazy stacking in port.c file. */
+        *( secureinitFPCCR ) &= ~( secureinitFPCCR_LSPENS_MASK );
 
-		/* TS = 1 ==> Treat FP registers as secure i.e. callee saved FP
-		 * registers (S16-S31) are also pushed to stack on exception entry and
-		 * restored on exception return. */
-		*( secureinitFPCCR ) |= ( secureinitFPCCR_TS_MASK );
-	}
+        /* TS = 1 ==> Treat FP registers as secure i.e. callee saved FP
+         * registers (S16-S31) are also pushed to stack on exception entry and
+         * restored on exception return. */
+        *( secureinitFPCCR ) |= ( secureinitFPCCR_TS_MASK );
+    }
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/IAR/ARM_CM23/secure/secure_init.h b/portable/IAR/ARM_CM23/secure/secure_init.h
index 643873468..c40ef3d8d 100644
--- a/portable/IAR/ARM_CM23/secure/secure_init.h
+++ b/portable/IAR/ARM_CM23/secure/secure_init.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/ARM_CM23/secure/secure_port_macros.h b/portable/IAR/ARM_CM23/secure/secure_port_macros.h
index 14ed3f022..d495a0e02 100644
--- a/portable/IAR/ARM_CM23/secure/secure_port_macros.h
+++ b/portable/IAR/ARM_CM23/secure/secure_port_macros.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -31,103 +31,103 @@
 /**
  * @brief Byte alignment requirements.
  */
-#define secureportBYTE_ALIGNMENT					8
-#define secureportBYTE_ALIGNMENT_MASK				( 0x0007 )
+#define secureportBYTE_ALIGNMENT         8
+#define secureportBYTE_ALIGNMENT_MASK    ( 0x0007 )
 
 /**
  * @brief Macro to declare a function as non-secure callable.
  */
 #if defined( __IAR_SYSTEMS_ICC__ )
-	#define secureportNON_SECURE_CALLABLE			__cmse_nonsecure_entry __root
+    #define secureportNON_SECURE_CALLABLE    __cmse_nonsecure_entry __root
 #else
-	#define secureportNON_SECURE_CALLABLE			__attribute__((cmse_nonsecure_entry)) __attribute__((used))
+    #define secureportNON_SECURE_CALLABLE    __attribute__( ( cmse_nonsecure_entry ) ) __attribute__( ( used ) )
 #endif
 
 /**
  * @brief Set the secure PRIMASK value.
  */
 #define secureportSET_SECURE_PRIMASK( ulPrimaskValue ) \
-	__asm volatile ( "msr primask, %0" : : "r" ( ulPrimaskValue ) : "memory" )
+    __asm volatile ( "msr primask, %0" : : "r" ( ulPrimaskValue ) : "memory" )
 
 /**
  * @brief Set the non-secure PRIMASK value.
  */
 #define secureportSET_NON_SECURE_PRIMASK( ulPrimaskValue ) \
-	__asm volatile ( "msr primask_ns, %0" : : "r" ( ulPrimaskValue ) : "memory" )
+    __asm volatile ( "msr primask_ns, %0" : : "r" ( ulPrimaskValue ) : "memory" )
 
 /**
  * @brief Read the PSP value in the given variable.
  */
 #define secureportREAD_PSP( pucOutCurrentStackPointer ) \
-	__asm volatile ( "mrs %0, psp"  : "=r" ( pucOutCurrentStackPointer ) )
+    __asm volatile ( "mrs %0, psp"  : "=r" ( pucOutCurrentStackPointer ) )
 
 /**
  * @brief Set the PSP to the given value.
  */
 #define secureportSET_PSP( pucCurrentStackPointer ) \
-	__asm volatile ( "msr psp, %0" : : "r" ( pucCurrentStackPointer ) )
+    __asm volatile ( "msr psp, %0" : : "r" ( pucCurrentStackPointer ) )
 
 /**
  * @brief Set the PSPLIM to the given value.
  */
 #define secureportSET_PSPLIM( pucStackLimit ) \
-	__asm volatile ( "msr psplim, %0" : : "r" ( pucStackLimit ) )
+    __asm volatile ( "msr psplim, %0" : : "r" ( pucStackLimit ) )
 
 /**
  * @brief Set the NonSecure MSP to the given value.
  */
 #define secureportSET_MSP_NS( pucMainStackPointer ) \
-	__asm volatile ( "msr msp_ns, %0" : : "r" ( pucMainStackPointer ) )
+    __asm volatile ( "msr msp_ns, %0" : : "r" ( pucMainStackPointer ) )
 
 /**
  * @brief Set the CONTROL register to the given value.
  */
 #define secureportSET_CONTROL( ulControl ) \
-	__asm volatile ( "msr control, %0" : : "r" ( ulControl ) : "memory" )
+    __asm volatile ( "msr control, %0" : : "r" ( ulControl ) : "memory" )
 
 /**
  * @brief Read the Interrupt Program Status Register (IPSR) value in the given
  * variable.
  */
 #define secureportREAD_IPSR( ulIPSR ) \
-	__asm volatile ( "mrs %0, ipsr"  : "=r" ( ulIPSR ) )
+    __asm volatile ( "mrs %0, ipsr"  : "=r" ( ulIPSR ) )
 
 /**
  * @brief PRIMASK value to enable interrupts.
  */
-#define secureportPRIMASK_ENABLE_INTERRUPTS_VAL		0
+#define secureportPRIMASK_ENABLE_INTERRUPTS_VAL     0
 
 /**
  * @brief PRIMASK value to disable interrupts.
  */
-#define secureportPRIMASK_DISABLE_INTERRUPTS_VAL	1
+#define secureportPRIMASK_DISABLE_INTERRUPTS_VAL    1
 
 /**
  * @brief Disable secure interrupts.
  */
-#define secureportDISABLE_SECURE_INTERRUPTS()		secureportSET_SECURE_PRIMASK( secureportPRIMASK_DISABLE_INTERRUPTS_VAL )
+#define secureportDISABLE_SECURE_INTERRUPTS()        secureportSET_SECURE_PRIMASK( secureportPRIMASK_DISABLE_INTERRUPTS_VAL )
 
 /**
  * @brief Disable non-secure interrupts.
  *
  * This effectively disables context switches.
  */
-#define secureportDISABLE_NON_SECURE_INTERRUPTS()	secureportSET_NON_SECURE_PRIMASK( secureportPRIMASK_DISABLE_INTERRUPTS_VAL )
+#define secureportDISABLE_NON_SECURE_INTERRUPTS()    secureportSET_NON_SECURE_PRIMASK( secureportPRIMASK_DISABLE_INTERRUPTS_VAL )
 
 /**
  * @brief Enable non-secure interrupts.
  */
-#define secureportENABLE_NON_SECURE_INTERRUPTS()	secureportSET_NON_SECURE_PRIMASK( secureportPRIMASK_ENABLE_INTERRUPTS_VAL )
+#define secureportENABLE_NON_SECURE_INTERRUPTS()     secureportSET_NON_SECURE_PRIMASK( secureportPRIMASK_ENABLE_INTERRUPTS_VAL )
 
 /**
  * @brief Assert definition.
  */
-#define secureportASSERT( x )						\
-	if( ( x ) == 0 )								\
-	{												\
-		secureportDISABLE_SECURE_INTERRUPTS();		\
-		secureportDISABLE_NON_SECURE_INTERRUPTS();	\
-		for( ;; );									\
-	}
+#define secureportASSERT( x )                      \
+    if( ( x ) == 0 )                               \
+    {                                              \
+        secureportDISABLE_SECURE_INTERRUPTS();     \
+        secureportDISABLE_NON_SECURE_INTERRUPTS(); \
+        for( ; ; ) {; }                            \
+    }
 
 #endif /* __SECURE_PORT_MACROS_H__ */
diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c
index ba6bd2602..eef952d55 100644
--- a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c
+++ b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,10 +19,9 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
@@ -40,10 +39,10 @@
 /* Portasm includes. */
 #include "portasm.h"
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/* Secure components includes. */
-	#include "secure_context.h"
-	#include "secure_init.h"
+#if ( configENABLE_TRUSTZONE == 1 )
+    /* Secure components includes. */
+    #include "secure_context.h"
+    #include "secure_init.h"
 #endif /* configENABLE_TRUSTZONE */
 
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
@@ -63,126 +62,127 @@
  * 3. Run FreeRTOS on the Non-Secure Side only i.e. no Secure Side function call support:
  *		configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 0
  */
-#if( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) )
-	#error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side.
+#if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) )
+    #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side.
 #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to manipulate the NVIC.
  */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portMIN_INTERRUPT_PRIORITY			( 255UL )
-#define portNVIC_PENDSV_PRI					( portMIN_INTERRUPT_PRIORITY << 16UL )
-#define portNVIC_SYSTICK_PRI				( portMIN_INTERRUPT_PRIORITY << 24UL )
+#define portNVIC_SYSTICK_CTRL_REG             ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG             ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG    ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SHPR3_REG                    ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_ENABLE_BIT           ( 1UL << 0UL )
+#define portNVIC_SYSTICK_INT_BIT              ( 1UL << 1UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT       ( 1UL << 16UL )
+#define portMIN_INTERRUPT_PRIORITY            ( 255UL )
+#define portNVIC_PENDSV_PRI                   ( portMIN_INTERRUPT_PRIORITY << 16UL )
+#define portNVIC_SYSTICK_PRI                  ( portMIN_INTERRUPT_PRIORITY << 24UL )
 #ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ			configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT		( 1UL << 2UL )
+    #define configSYSTICK_CLOCK_HZ            configCPU_CLOCK_HZ
+    /* Ensure the SysTick is clocked at the same frequency as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT          ( 1UL << 2UL )
 #else
-	/* The way the SysTick is clocked is not modified in case it is not the
-	 * same a the core. */
-	#define portNVIC_SYSTICK_CLK_BIT		( 0 )
+
+/* The way the SysTick is clocked is not modified in case it is not the
+ * same a the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 0 )
 #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to manipulate the SCB.
  */
-#define portSCB_SYS_HANDLER_CTRL_STATE_REG	( * ( volatile uint32_t * ) 0xe000ed24 )
-#define portSCB_MEM_FAULT_ENABLE_BIT		( 1UL << 16UL )
+#define portSCB_SYS_HANDLER_CTRL_STATE_REG    ( *( volatile uint32_t * ) 0xe000ed24 )
+#define portSCB_MEM_FAULT_ENABLE_BIT          ( 1UL << 16UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to manipulate the FPU.
  */
-#define portCPACR							( ( volatile uint32_t * ) 0xe000ed88 )	/* Coprocessor Access Control Register. */
-#define portCPACR_CP10_VALUE				( 3UL )
-#define portCPACR_CP11_VALUE				portCPACR_CP10_VALUE
-#define portCPACR_CP10_POS					( 20UL )
-#define portCPACR_CP11_POS					( 22UL )
+#define portCPACR               ( ( volatile uint32_t * ) 0xe000ed88 )              /* Coprocessor Access Control Register. */
+#define portCPACR_CP10_VALUE    ( 3UL )
+#define portCPACR_CP11_VALUE    portCPACR_CP10_VALUE
+#define portCPACR_CP10_POS      ( 20UL )
+#define portCPACR_CP11_POS      ( 22UL )
 
-#define portFPCCR							( ( volatile uint32_t * ) 0xe000ef34 )	/* Floating Point Context Control Register. */
-#define portFPCCR_ASPEN_POS					( 31UL )
-#define portFPCCR_ASPEN_MASK				( 1UL << portFPCCR_ASPEN_POS )
-#define portFPCCR_LSPEN_POS					( 30UL )
-#define portFPCCR_LSPEN_MASK				( 1UL << portFPCCR_LSPEN_POS )
+#define portFPCCR               ( ( volatile uint32_t * ) 0xe000ef34 )              /* Floating Point Context Control Register. */
+#define portFPCCR_ASPEN_POS     ( 31UL )
+#define portFPCCR_ASPEN_MASK    ( 1UL << portFPCCR_ASPEN_POS )
+#define portFPCCR_LSPEN_POS     ( 30UL )
+#define portFPCCR_LSPEN_MASK    ( 1UL << portFPCCR_LSPEN_POS )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to manipulate the MPU.
  */
-#define portMPU_TYPE_REG					( * ( ( volatile uint32_t * ) 0xe000ed90 ) )
-#define portMPU_CTRL_REG					( * ( ( volatile uint32_t * ) 0xe000ed94 ) )
-#define portMPU_RNR_REG						( * ( ( volatile uint32_t * ) 0xe000ed98 ) )
+#define portMPU_TYPE_REG                      ( *( ( volatile uint32_t * ) 0xe000ed90 ) )
+#define portMPU_CTRL_REG                      ( *( ( volatile uint32_t * ) 0xe000ed94 ) )
+#define portMPU_RNR_REG                       ( *( ( volatile uint32_t * ) 0xe000ed98 ) )
 
-#define portMPU_RBAR_REG					( * ( ( volatile uint32_t * ) 0xe000ed9c ) )
-#define portMPU_RLAR_REG					( * ( ( volatile uint32_t * ) 0xe000eda0 ) )
+#define portMPU_RBAR_REG                      ( *( ( volatile uint32_t * ) 0xe000ed9c ) )
+#define portMPU_RLAR_REG                      ( *( ( volatile uint32_t * ) 0xe000eda0 ) )
 
-#define portMPU_RBAR_A1_REG					( * ( ( volatile uint32_t * ) 0xe000eda4 ) )
-#define portMPU_RLAR_A1_REG					( * ( ( volatile uint32_t * ) 0xe000eda8 ) )
+#define portMPU_RBAR_A1_REG                   ( *( ( volatile uint32_t * ) 0xe000eda4 ) )
+#define portMPU_RLAR_A1_REG                   ( *( ( volatile uint32_t * ) 0xe000eda8 ) )
 
-#define portMPU_RBAR_A2_REG					( * ( ( volatile uint32_t * ) 0xe000edac ) )
-#define portMPU_RLAR_A2_REG					( * ( ( volatile uint32_t * ) 0xe000edb0 ) )
+#define portMPU_RBAR_A2_REG                   ( *( ( volatile uint32_t * ) 0xe000edac ) )
+#define portMPU_RLAR_A2_REG                   ( *( ( volatile uint32_t * ) 0xe000edb0 ) )
 
-#define portMPU_RBAR_A3_REG					( * ( ( volatile uint32_t * ) 0xe000edb4 ) )
-#define portMPU_RLAR_A3_REG					( * ( ( volatile uint32_t * ) 0xe000edb8 ) )
+#define portMPU_RBAR_A3_REG                   ( *( ( volatile uint32_t * ) 0xe000edb4 ) )
+#define portMPU_RLAR_A3_REG                   ( *( ( volatile uint32_t * ) 0xe000edb8 ) )
 
-#define portMPU_MAIR0_REG					( * ( ( volatile uint32_t * ) 0xe000edc0 ) )
-#define portMPU_MAIR1_REG					( * ( ( volatile uint32_t * ) 0xe000edc4 ) )
+#define portMPU_MAIR0_REG                     ( *( ( volatile uint32_t * ) 0xe000edc0 ) )
+#define portMPU_MAIR1_REG                     ( *( ( volatile uint32_t * ) 0xe000edc4 ) )
 
-#define portMPU_RBAR_ADDRESS_MASK			( 0xffffffe0 ) /* Must be 32-byte aligned. */
-#define portMPU_RLAR_ADDRESS_MASK			( 0xffffffe0 ) /* Must be 32-byte aligned. */
+#define portMPU_RBAR_ADDRESS_MASK             ( 0xffffffe0 ) /* Must be 32-byte aligned. */
+#define portMPU_RLAR_ADDRESS_MASK             ( 0xffffffe0 ) /* Must be 32-byte aligned. */
 
-#define portMPU_MAIR_ATTR0_POS				( 0UL )
-#define portMPU_MAIR_ATTR0_MASK				( 0x000000ff )
+#define portMPU_MAIR_ATTR0_POS                ( 0UL )
+#define portMPU_MAIR_ATTR0_MASK               ( 0x000000ff )
 
-#define portMPU_MAIR_ATTR1_POS				( 8UL )
-#define portMPU_MAIR_ATTR1_MASK				( 0x0000ff00 )
+#define portMPU_MAIR_ATTR1_POS                ( 8UL )
+#define portMPU_MAIR_ATTR1_MASK               ( 0x0000ff00 )
 
-#define portMPU_MAIR_ATTR2_POS				( 16UL )
-#define portMPU_MAIR_ATTR2_MASK				( 0x00ff0000 )
+#define portMPU_MAIR_ATTR2_POS                ( 16UL )
+#define portMPU_MAIR_ATTR2_MASK               ( 0x00ff0000 )
 
-#define portMPU_MAIR_ATTR3_POS				( 24UL )
-#define portMPU_MAIR_ATTR3_MASK				( 0xff000000 )
+#define portMPU_MAIR_ATTR3_POS                ( 24UL )
+#define portMPU_MAIR_ATTR3_MASK               ( 0xff000000 )
 
-#define portMPU_MAIR_ATTR4_POS				( 0UL )
-#define portMPU_MAIR_ATTR4_MASK				( 0x000000ff )
+#define portMPU_MAIR_ATTR4_POS                ( 0UL )
+#define portMPU_MAIR_ATTR4_MASK               ( 0x000000ff )
 
-#define portMPU_MAIR_ATTR5_POS				( 8UL )
-#define portMPU_MAIR_ATTR5_MASK				( 0x0000ff00 )
+#define portMPU_MAIR_ATTR5_POS                ( 8UL )
+#define portMPU_MAIR_ATTR5_MASK               ( 0x0000ff00 )
 
-#define portMPU_MAIR_ATTR6_POS				( 16UL )
-#define portMPU_MAIR_ATTR6_MASK				( 0x00ff0000 )
+#define portMPU_MAIR_ATTR6_POS                ( 16UL )
+#define portMPU_MAIR_ATTR6_MASK               ( 0x00ff0000 )
 
-#define portMPU_MAIR_ATTR7_POS				( 24UL )
-#define portMPU_MAIR_ATTR7_MASK				( 0xff000000 )
+#define portMPU_MAIR_ATTR7_POS                ( 24UL )
+#define portMPU_MAIR_ATTR7_MASK               ( 0xff000000 )
 
-#define portMPU_RLAR_ATTR_INDEX0			( 0UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX1			( 1UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX2			( 2UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX3			( 3UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX4			( 4UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX5			( 5UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX6			( 6UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX7			( 7UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX0              ( 0UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX1              ( 1UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX2              ( 2UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX3              ( 3UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX4              ( 4UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX5              ( 5UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX6              ( 6UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX7              ( 7UL << 1UL )
 
-#define portMPU_RLAR_REGION_ENABLE			( 1UL )
+#define portMPU_RLAR_REGION_ENABLE            ( 1UL )
 
 /* Enable privileged access to unmapped region. */
-#define portMPU_PRIV_BACKGROUND_ENABLE_BIT	( 1UL << 2UL )
+#define portMPU_PRIV_BACKGROUND_ENABLE_BIT    ( 1UL << 2UL )
 
 /* Enable MPU. */
-#define portMPU_ENABLE_BIT					( 1UL << 0UL )
+#define portMPU_ENABLE_BIT                    ( 1UL << 0UL )
 
 /* Expected value of the portMPU_TYPE register. */
-#define portEXPECTED_MPU_TYPE_VALUE			( 8UL << 8UL ) /* 8 regions, unified. */
+#define portEXPECTED_MPU_TYPE_VALUE           ( 8UL << 8UL ) /* 8 regions, unified. */
 /*-----------------------------------------------------------*/
 
 /**
@@ -190,53 +190,55 @@
  *
  * It is needed because the systick is a 24-bit counter.
  */
-#define portMAX_24_BIT_NUMBER				( 0xffffffUL )
+#define portMAX_24_BIT_NUMBER       ( 0xffffffUL )
 
 /**
  * @brief A fiddle factor to estimate the number of SysTick counts that would
  * have occurred while the SysTick counter is stopped during tickless idle
  * calculations.
  */
-#define portMISSED_COUNTS_FACTOR			( 45UL )
+#define portMISSED_COUNTS_FACTOR    ( 45UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to set up the initial stack.
  */
-#define portINITIAL_XPSR					( 0x01000000 )
+#define portINITIAL_XPSR    ( 0x01000000 )
 
-#if( configRUN_FREERTOS_SECURE_ONLY == 1 )
-	/**
-	 * @brief Initial EXC_RETURN value.
-	 *
-	 *     FF         FF         FF         FD
-	 * 1111 1111  1111 1111  1111 1111  1111 1101
-	 *
-	 * Bit[6] - 1 --> The exception was taken from the Secure state.
-	 * Bit[5] - 1 --> Do not skip stacking of additional state context.
-	 * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
-	 * Bit[3] - 1 --> Return to the Thread mode.
-	 * Bit[2] - 1 --> Restore registers from the process stack.
-	 * Bit[1] - 0 --> Reserved, 0.
-	 * Bit[0] - 1 --> The exception was taken to the Secure state.
-	 */
-	#define portINITIAL_EXC_RETURN			( 0xfffffffd )
+#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
+
+/**
+ * @brief Initial EXC_RETURN value.
+ *
+ *     FF         FF         FF         FD
+ * 1111 1111  1111 1111  1111 1111  1111 1101
+ *
+ * Bit[6] - 1 --> The exception was taken from the Secure state.
+ * Bit[5] - 1 --> Do not skip stacking of additional state context.
+ * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
+ * Bit[3] - 1 --> Return to the Thread mode.
+ * Bit[2] - 1 --> Restore registers from the process stack.
+ * Bit[1] - 0 --> Reserved, 0.
+ * Bit[0] - 1 --> The exception was taken to the Secure state.
+ */
+    #define portINITIAL_EXC_RETURN    ( 0xfffffffd )
 #else
-	/**
-	 * @brief Initial EXC_RETURN value.
-	 *
-	 *     FF         FF         FF         BC
-	 * 1111 1111  1111 1111  1111 1111  1011 1100
-	 *
-	 * Bit[6] - 0 --> The exception was taken from the Non-Secure state.
-	 * Bit[5] - 1 --> Do not skip stacking of additional state context.
-	 * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
-	 * Bit[3] - 1 --> Return to the Thread mode.
-	 * Bit[2] - 1 --> Restore registers from the process stack.
-	 * Bit[1] - 0 --> Reserved, 0.
-	 * Bit[0] - 0 --> The exception was taken to the Non-Secure state.
-	 */
-	#define portINITIAL_EXC_RETURN			( 0xffffffbc )
+
+/**
+ * @brief Initial EXC_RETURN value.
+ *
+ *     FF         FF         FF         BC
+ * 1111 1111  1111 1111  1111 1111  1011 1100
+ *
+ * Bit[6] - 0 --> The exception was taken from the Non-Secure state.
+ * Bit[5] - 1 --> Do not skip stacking of additional state context.
+ * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
+ * Bit[3] - 1 --> Return to the Thread mode.
+ * Bit[2] - 1 --> Restore registers from the process stack.
+ * Bit[1] - 0 --> Reserved, 0.
+ * Bit[0] - 0 --> The exception was taken to the Non-Secure state.
+ */
+    #define portINITIAL_EXC_RETURN    ( 0xffffffbc )
 #endif /* configRUN_FREERTOS_SECURE_ONLY */
 
 /**
@@ -246,13 +248,13 @@
  *  Bit[0] = 0 ==> The task is privileged.
  *  Bit[0] = 1 ==> The task is not privileged.
  */
-#define portCONTROL_PRIVILEGED_MASK			( 1UL << 0UL )
+#define portCONTROL_PRIVILEGED_MASK         ( 1UL << 0UL )
 
 /**
  * @brief Initial CONTROL register values.
  */
-#define portINITIAL_CONTROL_UNPRIVILEGED	( 0x3 )
-#define portINITIAL_CONTROL_PRIVILEGED		( 0x2 )
+#define portINITIAL_CONTROL_UNPRIVILEGED    ( 0x3 )
+#define portINITIAL_CONTROL_PRIVILEGED      ( 0x2 )
 
 /**
  * @brief Let the user override the pre-loading of the initial LR with the
@@ -260,23 +262,23 @@
  * in the debugger.
  */
 #ifdef configTASK_RETURN_ADDRESS
-	#define portTASK_RETURN_ADDRESS			configTASK_RETURN_ADDRESS
+    #define portTASK_RETURN_ADDRESS    configTASK_RETURN_ADDRESS
 #else
-	#define portTASK_RETURN_ADDRESS			prvTaskExitError
+    #define portTASK_RETURN_ADDRESS    prvTaskExitError
 #endif
 
 /**
  * @brief If portPRELOAD_REGISTERS then registers will be given an initial value
  * when a task is created. This helps in debugging at the cost of code size.
  */
-#define portPRELOAD_REGISTERS				1
+#define portPRELOAD_REGISTERS    1
 
 /**
  * @brief A task is created without a secure context, and must call
  * portALLOCATE_SECURE_CONTEXT() to give itself a secure context before it makes
  * any secure calls.
  */
-#define portNO_SECURE_CONTEXT				0
+#define portNO_SECURE_CONTEXT    0
 /*-----------------------------------------------------------*/
 
 /**
@@ -285,18 +287,20 @@
  */
 static void prvTaskExitError( void );
 
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Setup the Memory Protection Unit (MPU).
-	 */
-	static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
+#if ( configENABLE_MPU == 1 )
+
+/**
+ * @brief Setup the Memory Protection Unit (MPU).
+ */
+    static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
 #endif /* configENABLE_MPU */
 
-#if( configENABLE_FPU == 1 )
-	/**
-	 * @brief Setup the Floating Point Unit (FPU).
-	 */
-	static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;
+#if ( configENABLE_FPU == 1 )
+
+/**
+ * @brief Setup the Floating Point Unit (FPU).
+ */
+    static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;
 #endif /* configENABLE_FPU */
 
 /**
@@ -338,812 +342,852 @@ void SysTick_Handler( void ) PRIVILEGED_FUNCTION;
 /**
  * @brief C part of SVC handler.
  */
-portDONT_DISCARD void vPortSVCHandler_C( uint32_t *pulCallerStackAddress ) PRIVILEGED_FUNCTION;
+portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIVILEGED_FUNCTION;
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Each task maintains its own interrupt status in the critical nesting
  * variable.
  */
-static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
+PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Saved as part of the task context to indicate which context the
-	 * task is using on the secure side.
-	 */
-	portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
+#if ( configENABLE_TRUSTZONE == 1 )
+
+/**
+ * @brief Saved as part of the task context to indicate which context the
+ * task is using on the secure side.
+ */
+    PRIVILEGED_DATA portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
 #endif /* configENABLE_TRUSTZONE */
 
-#if( configUSE_TICKLESS_IDLE == 1 )
-	/**
-	 * @brief The number of SysTick increments that make up one tick period.
-	 */
-	static uint32_t ulTimerCountsForOneTick = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
 
-	/**
-	 * @brief The maximum number of tick periods that can be suppressed is
-	 * limited by the 24 bit resolution of the SysTick timer.
-	 */
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
+/**
+ * @brief The number of SysTick increments that make up one tick period.
+ */
+    PRIVILEGED_DATA static uint32_t ulTimerCountsForOneTick = 0;
 
-	/**
-	 * @brief Compensate for the CPU cycles that pass while the SysTick is
-	 * stopped (low power functionality only).
-	 */
-	static uint32_t ulStoppedTimerCompensation = 0;
+/**
+ * @brief The maximum number of tick periods that can be suppressed is
+ * limited by the 24 bit resolution of the SysTick timer.
+ */
+    PRIVILEGED_DATA static uint32_t xMaximumPossibleSuppressedTicks = 0;
+
+/**
+ * @brief Compensate for the CPU cycles that pass while the SysTick is
+ * stopped (low power functionality only).
+ */
+    PRIVILEGED_DATA static uint32_t ulStoppedTimerCompensation = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TICKLESS_IDLE == 1 )
-	__attribute__(( weak )) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-	{
-	uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
-	TickType_t xModifiableIdleTime;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+    {
+        uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+        TickType_t xModifiableIdleTime;
 
-		/* Make sure the SysTick reload value does not overflow the counter. */
-		if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-		{
-			xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-		}
+        /* Make sure the SysTick reload value does not overflow the counter. */
+        if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+        {
+            xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+        }
 
-		/* Stop the SysTick momentarily. The time the SysTick is stopped for is
-		 * accounted for as best it can be, but using the tickless mode will
-		 * inevitably result in some tiny drift of the time maintained by the
-		 * kernel with respect to calendar time. */
-		portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+        /* Stop the SysTick momentarily. The time the SysTick is stopped for is
+         * accounted for as best it can be, but using the tickless mode will
+         * inevitably result in some tiny drift of the time maintained by the
+         * kernel with respect to calendar time. */
+        portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
 
-		/* Calculate the reload value required to wait xExpectedIdleTime
-		 * tick periods. -1 is used because this code will execute part way
-		 * through one of the tick periods. */
-		ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-		if( ulReloadValue > ulStoppedTimerCompensation )
-		{
-			ulReloadValue -= ulStoppedTimerCompensation;
-		}
+        /* Calculate the reload value required to wait xExpectedIdleTime
+         * tick periods. -1 is used because this code will execute part way
+         * through one of the tick periods. */
+        ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
 
-		/* Enter a critical section but don't use the taskENTER_CRITICAL()
-		 * method as that will mask interrupts that should exit sleep mode. */
-		__asm volatile( "cpsid i" ::: "memory" );
-		__asm volatile( "dsb" );
-		__asm volatile( "isb" );
+        if( ulReloadValue > ulStoppedTimerCompensation )
+        {
+            ulReloadValue -= ulStoppedTimerCompensation;
+        }
 
-		/* If a context switch is pending or a task is waiting for the scheduler
-		 * to be un-suspended then abandon the low power entry. */
-		if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-		{
-			/* Restart from whatever is left in the count register to complete
-			 * this tick period. */
-			portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+        /* Enter a critical section but don't use the taskENTER_CRITICAL()
+         * method as that will mask interrupts that should exit sleep mode. */
+        __asm volatile ( "cpsid i" ::: "memory" );
+        __asm volatile ( "dsb" );
+        __asm volatile ( "isb" );
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+        /* If a context switch is pending or a task is waiting for the scheduler
+         * to be un-suspended then abandon the low power entry. */
+        if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+        {
+            /* Restart from whatever is left in the count register to complete
+             * this tick period. */
+            portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Reset the reload register to the value required for normal tick
-			 * periods. */
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts - see comments above the cpsid instruction()
-			 * above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-		else
-		{
-			/* Set the new reload value. */
-			portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+            /* Reset the reload register to the value required for normal tick
+             * periods. */
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
 
-			/* Clear the SysTick count flag and set the count value back to
-			 * zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            /* Re-enable interrupts - see comments above the cpsid instruction()
+             * above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+        else
+        {
+            /* Set the new reload value. */
+            portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            /* Clear the SysTick count flag and set the count value back to
+             * zero. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-			/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
-			 * set its parameter to 0 to indicate that its implementation
-			 * contains its own wait for interrupt or wait for event
-			 * instruction, and so wfi should not be executed again. However,
-			 * the original expected idle time variable must remain unmodified,
-			 * so a copy is taken. */
-			xModifiableIdleTime = xExpectedIdleTime;
-			configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-			if( xModifiableIdleTime > 0 )
-			{
-				__asm volatile( "dsb" ::: "memory" );
-				__asm volatile( "wfi" );
-				__asm volatile( "isb" );
-			}
-			configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts to allow the interrupt that brought the MCU
-			 * out of sleep mode to execute immediately. See comments above
-			 * the cpsid instruction above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
+            /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
+             * set its parameter to 0 to indicate that its implementation
+             * contains its own wait for interrupt or wait for event
+             * instruction, and so wfi should not be executed again. However,
+             * the original expected idle time variable must remain unmodified,
+             * so a copy is taken. */
+            xModifiableIdleTime = xExpectedIdleTime;
+            configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
 
-			/* Disable interrupts again because the clock is about to be stopped
-			 * and interrupts that execute while the clock is stopped will
-			 * increase any slippage between the time maintained by the RTOS and
-			 * calendar time. */
-			__asm volatile( "cpsid i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
+            if( xModifiableIdleTime > 0 )
+            {
+                __asm volatile ( "dsb" ::: "memory" );
+                __asm volatile ( "wfi" );
+                __asm volatile ( "isb" );
+            }
 
-			/* Disable the SysTick clock without reading the
-			 * portNVIC_SYSTICK_CTRL_REG register to ensure the
-			 * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
-			 * Again, the time the SysTick is stopped for is accounted for as
-			 * best it can be, but using the tickless mode will inevitably
-			 * result in some tiny drift of the time maintained by the kernel
-			 * with respect to calendar time*/
-			portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+            configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
 
-			/* Determine if the SysTick clock has already counted to zero and
-			 * been set back to the current reload value (the reload back being
-			 * correct for the entire expected idle time) or if the SysTick is
-			 * yet to count to zero (in which case an interrupt other than the
-			 * SysTick must have brought the system out of sleep mode). */
-			if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-			{
-				uint32_t ulCalculatedLoadValue;
+            /* Re-enable interrupts to allow the interrupt that brought the MCU
+             * out of sleep mode to execute immediately. See comments above
+             * the cpsid instruction above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
 
-				/* The tick interrupt is already pending, and the SysTick count
-				 * reloaded with ulReloadValue.  Reset the
-				 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
-				 * period. */
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+            /* Disable interrupts again because the clock is about to be stopped
+             * and interrupts that execute while the clock is stopped will
+             * increase any slippage between the time maintained by the RTOS and
+             * calendar time. */
+            __asm volatile ( "cpsid i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
 
-				/* Don't allow a tiny value, or values that have somehow
-				 * underflowed because the post sleep hook did something
-				 * that took too long. */
-				if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-				{
-					ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-				}
+            /* Disable the SysTick clock without reading the
+             * portNVIC_SYSTICK_CTRL_REG register to ensure the
+             * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
+             * Again, the time the SysTick is stopped for is accounted for as
+             * best it can be, but using the tickless mode will inevitably
+             * result in some tiny drift of the time maintained by the kernel
+             * with respect to calendar time*/
+            portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
 
-				portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+            /* Determine if the SysTick clock has already counted to zero and
+             * been set back to the current reload value (the reload back being
+             * correct for the entire expected idle time) or if the SysTick is
+             * yet to count to zero (in which case an interrupt other than the
+             * SysTick must have brought the system out of sleep mode). */
+            if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+            {
+                uint32_t ulCalculatedLoadValue;
 
-				/* As the pending tick will be processed as soon as this
-				 * function exits, the tick value maintained by the tick is
-				 * stepped forward by one less than the time spent waiting. */
-				ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-			}
-			else
-			{
-				/* Something other than the tick interrupt ended the sleep.
-				 * Work out how long the sleep lasted rounded to complete tick
-				 * periods (not the ulReload value which accounted for part
-				 * ticks). */
-				ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+                /* The tick interrupt is already pending, and the SysTick count
+                 * reloaded with ulReloadValue.  Reset the
+                 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+                 * period. */
+                ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
 
-				/* How many complete tick periods passed while the processor
-				 * was waiting? */
-				ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+                /* Don't allow a tiny value, or values that have somehow
+                 * underflowed because the post sleep hook did something
+                 * that took too long. */
+                if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+                {
+                    ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+                }
 
-				/* The reload value is set to whatever fraction of a single tick
-				 * period remains. */
-				portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-			}
+                portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
 
-			/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
-			 * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
-			 * value. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-			vTaskStepTick( ulCompleteTickPeriods );
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+                /* As the pending tick will be processed as soon as this
+                 * function exits, the tick value maintained by the tick is
+                 * stepped forward by one less than the time spent waiting. */
+                ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+            }
+            else
+            {
+                /* Something other than the tick interrupt ended the sleep.
+                 * Work out how long the sleep lasted rounded to complete tick
+                 * periods (not the ulReload value which accounted for part
+                 * ticks). */
+                ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Exit with interrupts enabled. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-	}
+                /* How many complete tick periods passed while the processor
+                 * was waiting? */
+                ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+                /* The reload value is set to whatever fraction of a single tick
+                 * period remains. */
+                portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+            }
+
+            /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+             * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+             * value. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            vTaskStepTick( ulCompleteTickPeriods );
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Exit with interrupts enabled. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+    }
 #endif /* configUSE_TICKLESS_IDLE */
 /*-----------------------------------------------------------*/
 
-__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
+__attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
 {
-	/* Calculate the constants required to configure the tick interrupt. */
-	#if( configUSE_TICKLESS_IDLE == 1 )
-	{
-		ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
-		xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
-	}
-	#endif /* configUSE_TICKLESS_IDLE */
+    /* Calculate the constants required to configure the tick interrupt. */
+    #if ( configUSE_TICKLESS_IDLE == 1 )
+        {
+            ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+            xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+            ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+        }
+    #endif /* configUSE_TICKLESS_IDLE */
 
-	/* Stop and reset the SysTick. */
-	portNVIC_SYSTICK_CTRL_REG = 0UL;
-	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+    /* Stop and reset the SysTick. */
+    portNVIC_SYSTICK_CTRL_REG = 0UL;
+    portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-	/* Configure SysTick to interrupt at the requested rate. */
-	portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
+    /* Configure SysTick to interrupt at the requested rate. */
+    portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+    portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
 }
 /*-----------------------------------------------------------*/
 
 static void prvTaskExitError( void )
 {
-volatile uint32_t ulDummy = 0UL;
+    volatile uint32_t ulDummy = 0UL;
 
-	/* A function that implements a task must not exit or attempt to return to
-	 * its caller as there is nothing to return to. If a task wants to exit it
-	 * should instead call vTaskDelete( NULL ). Artificially force an assert()
-	 * to be triggered if configASSERT() is defined, then stop here so
-	 * application writers can catch the error. */
-	configASSERT( ulCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to. If a task wants to exit it
+     * should instead call vTaskDelete( NULL ). Artificially force an assert()
+     * to be triggered if configASSERT() is defined, then stop here so
+     * application writers can catch the error. */
+    configASSERT( ulCriticalNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
 
-	while( ulDummy == 0 )
-	{
-		/* This file calls prvTaskExitError() after the scheduler has been
-		 * started to remove a compiler warning about the function being
-		 * defined but never called.  ulDummy is used purely to quieten other
-		 * warnings about code appearing after this function is called - making
-		 * ulDummy volatile makes the compiler think the function could return
-		 * and therefore not output an 'unreachable code' warning for code that
-		 * appears after it. */
-	}
+    while( ulDummy == 0 )
+    {
+        /* This file calls prvTaskExitError() after the scheduler has been
+         * started to remove a compiler warning about the function being
+         * defined but never called.  ulDummy is used purely to quieten other
+         * warnings about code appearing after this function is called - making
+         * ulDummy volatile makes the compiler think the function could return
+         * and therefore not output an 'unreachable code' warning for code that
+         * appears after it. */
+    }
 }
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
-	{
-	#if defined( __ARMCC_VERSION )
-		/* Declaration when these variable are defined in code instead of being
-		 * exported from linker scripts. */
-		extern uint32_t * __privileged_functions_start__;
-		extern uint32_t * __privileged_functions_end__;
-		extern uint32_t * __syscalls_flash_start__;
-		extern uint32_t * __syscalls_flash_end__;
-		extern uint32_t * __unprivileged_flash_start__;
-		extern uint32_t * __unprivileged_flash_end__;
-		extern uint32_t * __privileged_sram_start__;
-		extern uint32_t * __privileged_sram_end__;
-	#else
-		/* Declaration when these variable are exported from linker scripts. */
-		extern uint32_t __privileged_functions_start__[];
-		extern uint32_t __privileged_functions_end__[];
-		extern uint32_t __syscalls_flash_start__[];
-		extern uint32_t __syscalls_flash_end__[];
-		extern uint32_t __unprivileged_flash_start__[];
-		extern uint32_t __unprivileged_flash_end__[];
-		extern uint32_t __privileged_sram_start__[];
-		extern uint32_t __privileged_sram_end__[];
-	#endif /* defined( __ARMCC_VERSION ) */
+#if ( configENABLE_MPU == 1 )
+    static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
+    {
+        #if defined( __ARMCC_VERSION )
 
-		/* Check that the MPU is present. */
-		if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
-		{
-			/* MAIR0 - Index 0. */
-			portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
-			/* MAIR0 - Index 1. */
-			portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __privileged_functions_start__;
+            extern uint32_t * __privileged_functions_end__;
+            extern uint32_t * __syscalls_flash_start__;
+            extern uint32_t * __syscalls_flash_end__;
+            extern uint32_t * __unprivileged_flash_start__;
+            extern uint32_t * __unprivileged_flash_end__;
+            extern uint32_t * __privileged_sram_start__;
+            extern uint32_t * __privileged_sram_end__;
+        #else /* if defined( __ARMCC_VERSION ) */
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __privileged_functions_start__[];
+            extern uint32_t __privileged_functions_end__[];
+            extern uint32_t __syscalls_flash_start__[];
+            extern uint32_t __syscalls_flash_end__[];
+            extern uint32_t __unprivileged_flash_start__[];
+            extern uint32_t __unprivileged_flash_end__[];
+            extern uint32_t __privileged_sram_start__[];
+            extern uint32_t __privileged_sram_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
 
-			/* Setup privileged flash as Read Only so that privileged tasks can
-			 * read it but not modify. */
-			portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_PRIVILEGED_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
+        /* Check that the MPU is present. */
+        if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
+        {
+            /* MAIR0 - Index 0. */
+            portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
+            /* MAIR0 - Index 1. */
+            portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
 
-			/* Setup unprivileged flash as Read Only by both privileged and
-			 * unprivileged tasks. All tasks can read it but no-one can modify. */
-			portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
+            /* Setup privileged flash as Read Only so that privileged tasks can
+             * read it but not modify. */
+            portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_PRIVILEGED_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
 
-			/* Setup unprivileged syscalls flash as Read Only by both privileged
-			 * and unprivileged tasks. All tasks can read it but no-one can modify. */
-			portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
+            /* Setup unprivileged flash as Read Only by both privileged and
+             * unprivileged tasks. All tasks can read it but no-one can modify. */
+            portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
 
-			/* Setup RAM containing kernel data for privileged access only. */
-			portMPU_RNR_REG = portPRIVILEGED_RAM_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
-								( portMPU_REGION_EXECUTE_NEVER );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
+            /* Setup unprivileged syscalls flash as Read Only by both privileged
+             * and unprivileged tasks. All tasks can read it but no-one can modify. */
+            portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
 
-			/* Enable mem fault. */
-			portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
+            /* Setup RAM containing kernel data for privileged access only. */
+            portMPU_RNR_REG = portPRIVILEGED_RAM_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
+                               ( portMPU_REGION_EXECUTE_NEVER );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
 
-			/* Enable MPU with privileged background access i.e. unmapped
-			 * regions have privileged access. */
-			portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
-		}
-	}
+            /* Enable mem fault. */
+            portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
+
+            /* Enable MPU with privileged background access i.e. unmapped
+             * regions have privileged access. */
+            portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
+        }
+    }
 #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_FPU == 1 )
-	static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
-	{
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			/* Enable non-secure access to the FPU. */
-			SecureInit_EnableNSFPUAccess();
-		}
-		#endif /* configENABLE_TRUSTZONE */
+#if ( configENABLE_FPU == 1 )
+    static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
+    {
+        #if ( configENABLE_TRUSTZONE == 1 )
+            {
+                /* Enable non-secure access to the FPU. */
+                SecureInit_EnableNSFPUAccess();
+            }
+        #endif /* configENABLE_TRUSTZONE */
 
-		/* CP10 = 11 ==> Full access to FPU i.e. both privileged and
-		 * unprivileged code should be able to access FPU. CP11 should be
-		 * programmed to the same value as CP10. */
-		*( portCPACR ) |=	(	( portCPACR_CP10_VALUE << portCPACR_CP10_POS ) |
-								( portCPACR_CP11_VALUE << portCPACR_CP11_POS )
-							);
+        /* CP10 = 11 ==> Full access to FPU i.e. both privileged and
+         * unprivileged code should be able to access FPU. CP11 should be
+         * programmed to the same value as CP10. */
+        *( portCPACR ) |= ( ( portCPACR_CP10_VALUE << portCPACR_CP10_POS ) |
+                            ( portCPACR_CP11_VALUE << portCPACR_CP11_POS )
+                            );
 
-		/* ASPEN = 1 ==> Hardware should automatically preserve floating point
-		 * context on exception entry and restore on exception return.
-		 * LSPEN = 1 ==> Enable lazy context save of FP state. */
-		*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
-	}
+        /* ASPEN = 1 ==> Hardware should automatically preserve floating point
+         * context on exception entry and restore on exception return.
+         * LSPEN = 1 ==> Enable lazy context save of FP state. */
+        *( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
+    }
 #endif /* configENABLE_FPU */
 /*-----------------------------------------------------------*/
 
 void vPortYield( void ) /* PRIVILEGED_FUNCTION */
 {
-	/* Set a PendSV to request a context switch. */
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+    /* Set a PendSV to request a context switch. */
+    portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
 
-	/* Barriers are normally not required but do ensure the code is
-	 * completely within the specified behaviour for the architecture. */
-	__asm volatile( "dsb" ::: "memory" );
-	__asm volatile( "isb" );
+    /* Barriers are normally not required but do ensure the code is
+     * completely within the specified behaviour for the architecture. */
+    __asm volatile ( "dsb" ::: "memory" );
+    __asm volatile ( "isb" );
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */
 {
-	portDISABLE_INTERRUPTS();
-	ulCriticalNesting++;
+    portDISABLE_INTERRUPTS();
+    ulCriticalNesting++;
 
-	/* Barriers are normally not required but do ensure the code is
-	 * completely within the specified behaviour for the architecture. */
-	__asm volatile( "dsb" ::: "memory" );
-	__asm volatile( "isb" );
+    /* Barriers are normally not required but do ensure the code is
+     * completely within the specified behaviour for the architecture. */
+    __asm volatile ( "dsb" ::: "memory" );
+    __asm volatile ( "isb" );
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */
 {
-	configASSERT( ulCriticalNesting );
-	ulCriticalNesting--;
+    configASSERT( ulCriticalNesting );
+    ulCriticalNesting--;
 
-	if( ulCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
+    if( ulCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
 }
 /*-----------------------------------------------------------*/
 
 void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
 {
-uint32_t ulPreviousMask;
+    uint32_t ulPreviousMask;
 
-	ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* Pend a context switch. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
+    ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* Pend a context switch. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
 }
 /*-----------------------------------------------------------*/
 
-void vPortSVCHandler_C( uint32_t *pulCallerStackAddress ) /* PRIVILEGED_FUNCTION portDONT_DISCARD */
+void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTION portDONT_DISCARD */
 {
-#if( configENABLE_MPU == 1 )
-	#if defined( __ARMCC_VERSION )
-		/* Declaration when these variable are defined in code instead of being
-		 * exported from linker scripts. */
-		extern uint32_t * __syscalls_flash_start__;
-		extern uint32_t * __syscalls_flash_end__;
-	#else
-		/* Declaration when these variable are exported from linker scripts. */
-		extern uint32_t __syscalls_flash_start__[];
-		extern uint32_t __syscalls_flash_end__[];
-	#endif /* defined( __ARMCC_VERSION ) */
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        #if defined( __ARMCC_VERSION )
 
-uint32_t ulPC;
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __syscalls_flash_start__;
+            extern uint32_t * __syscalls_flash_end__;
+        #else
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __syscalls_flash_start__[];
+            extern uint32_t __syscalls_flash_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
+    #endif /* configENABLE_MPU */
 
-#if( configENABLE_TRUSTZONE == 1 )
-	uint32_t ulR0;
-	#if( configENABLE_MPU == 1 )
-		uint32_t ulControl, ulIsTaskPrivileged;
-	#endif /* configENABLE_MPU */
-#endif /* configENABLE_TRUSTZONE */
-uint8_t ucSVCNumber;
+    uint32_t ulPC;
 
-	/* Register are stored on the stack in the following order - R0, R1, R2, R3,
-	 * R12, LR, PC, xPSR. */
-	ulPC = pulCallerStackAddress[ 6 ];
-	ucSVCNumber = ( ( uint8_t *) ulPC )[ -2 ];
+    #if ( configENABLE_TRUSTZONE == 1 )
+        uint32_t ulR0;
+        #if ( configENABLE_MPU == 1 )
+            uint32_t ulControl, ulIsTaskPrivileged;
+        #endif /* configENABLE_MPU */
+    #endif /* configENABLE_TRUSTZONE */
+    uint8_t ucSVCNumber;
 
-	switch( ucSVCNumber )
-	{
-		#if( configENABLE_TRUSTZONE == 1 )
-			case portSVC_ALLOCATE_SECURE_CONTEXT:
-			{
-				/* R0 contains the stack size passed as parameter to the
-				 * vPortAllocateSecureContext function. */
-				ulR0 = pulCallerStackAddress[ 0 ];
+    /* Register are stored on the stack in the following order - R0, R1, R2, R3,
+     * R12, LR, PC, xPSR. */
+    ulPC = pulCallerStackAddress[ 6 ];
+    ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ];
 
-				#if( configENABLE_MPU == 1 )
-				{
-					/* Read the CONTROL register value. */
-					__asm volatile ( "mrs %0, control"  : "=r" ( ulControl ) );
+    switch( ucSVCNumber )
+    {
+        #if ( configENABLE_TRUSTZONE == 1 )
+            case portSVC_ALLOCATE_SECURE_CONTEXT:
 
-					/* The task that raised the SVC is privileged if Bit[0]
-					 * in the CONTROL register is 0. */
-					ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 );
+                /* R0 contains the stack size passed as parameter to the
+                 * vPortAllocateSecureContext function. */
+                ulR0 = pulCallerStackAddress[ 0 ];
 
-					/* Allocate and load a context for the secure task. */
-					xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged );
-				}
-				#else
-				{
-					/* Allocate and load a context for the secure task. */
-					xSecureContext = SecureContext_AllocateContext( ulR0 );
-				}
-				#endif /* configENABLE_MPU */
+                #if ( configENABLE_MPU == 1 )
+                    {
+                        /* Read the CONTROL register value. */
+                        __asm volatile ( "mrs %0, control"  : "=r" ( ulControl ) );
 
-				configASSERT( xSecureContext != NULL );
-				SecureContext_LoadContext( xSecureContext );
-			}
-			break;
+                        /* The task that raised the SVC is privileged if Bit[0]
+                         * in the CONTROL register is 0. */
+                        ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 );
 
-			case portSVC_FREE_SECURE_CONTEXT:
-			{
-				/* R0 contains the secure context handle to be freed. */
-				ulR0 = pulCallerStackAddress[ 0 ];
+                        /* Allocate and load a context for the secure task. */
+                        xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged );
+                    }
+                #else /* if ( configENABLE_MPU == 1 ) */
+                    {
+                        /* Allocate and load a context for the secure task. */
+                        xSecureContext = SecureContext_AllocateContext( ulR0 );
+                    }
+                #endif /* configENABLE_MPU */
 
-				/* Free the secure context. */
-				SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 );
-			}
-			break;
-		#endif /* configENABLE_TRUSTZONE */
+                configASSERT( xSecureContext != NULL );
+                SecureContext_LoadContext( xSecureContext );
+                break;
 
-		case portSVC_START_SCHEDULER:
-		{
-			#if( configENABLE_TRUSTZONE == 1 )
-			{
-				/* De-prioritize the non-secure exceptions so that the
-				 * non-secure pendSV runs at the lowest priority. */
-				SecureInit_DePrioritizeNSExceptions();
+            case portSVC_FREE_SECURE_CONTEXT:
+                /* R0 contains the secure context handle to be freed. */
+                ulR0 = pulCallerStackAddress[ 0 ];
 
-				/* Initialize the secure context management system. */
-				SecureContext_Init();
-			}
-			#endif /* configENABLE_TRUSTZONE */
+                /* Free the secure context. */
+                SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 );
+                break;
+        #endif /* configENABLE_TRUSTZONE */
 
-			#if( configENABLE_FPU == 1 )
-			{
-				/* Setup the Floating Point Unit (FPU). */
-				prvSetupFPU();
-			}
-			#endif /* configENABLE_FPU */
+        case portSVC_START_SCHEDULER:
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    /* De-prioritize the non-secure exceptions so that the
+                     * non-secure pendSV runs at the lowest priority. */
+                    SecureInit_DePrioritizeNSExceptions();
 
-			/* Setup the context of the first task so that the first task starts
-			 * executing. */
-			vRestoreContextOfFirstTask();
-		}
-		break;
+                    /* Initialize the secure context management system. */
+                    SecureContext_Init();
+                }
+            #endif /* configENABLE_TRUSTZONE */
 
-		#if( configENABLE_MPU == 1 )
-			case portSVC_RAISE_PRIVILEGE:
-			{
-				/* Only raise the privilege, if the svc was raised from any of
-				 * the system calls. */
-				if( ulPC >= ( uint32_t ) __syscalls_flash_start__ &&
-					ulPC <= ( uint32_t ) __syscalls_flash_end__ )
-				{
-					vRaisePrivilege();
-				}
-			}
-			break;
-		#endif /* configENABLE_MPU */
+            #if ( configENABLE_FPU == 1 )
+                {
+                    /* Setup the Floating Point Unit (FPU). */
+                    prvSetupFPU();
+                }
+            #endif /* configENABLE_FPU */
 
-		default:
-		{
-			/* Incorrect SVC call. */
-			configASSERT( pdFALSE );
-		}
-	}
+            /* Setup the context of the first task so that the first task starts
+             * executing. */
+            vRestoreContextOfFirstTask();
+            break;
+
+            #if ( configENABLE_MPU == 1 )
+                case portSVC_RAISE_PRIVILEGE:
+
+                    /* Only raise the privilege, if the svc was raised from any of
+                     * the system calls. */
+                    if( ( ulPC >= ( uint32_t ) __syscalls_flash_start__ ) &&
+                        ( ulPC <= ( uint32_t ) __syscalls_flash_end__ ) )
+                    {
+                        vRaisePrivilege();
+                    }
+                    break;
+            #endif /* configENABLE_MPU */
+
+        default:
+            /* Incorrect SVC call. */
+            configASSERT( pdFALSE );
+    }
 }
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */
+/* *INDENT-OFF* */
+#if ( configENABLE_MPU == 1 )
+    StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                         StackType_t * pxEndOfStack,
+                                         TaskFunction_t pxCode,
+                                         void * pvParameters,
+                                         BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */
 #else
-	StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters ) /* PRIVILEGED_FUNCTION */
+    StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                         StackType_t * pxEndOfStack,
+                                         TaskFunction_t pxCode,
+                                         void * pvParameters ) /* PRIVILEGED_FUNCTION */
 #endif /* configENABLE_MPU */
+/* *INDENT-ON* */
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	 * interrupt. */
-	#if( portPRELOAD_REGISTERS == 0 )
-	{
-		pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-		*pxTopOfStack = portINITIAL_XPSR;							/* xPSR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxCode;						/* PC */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
-		pxTopOfStack -= 5;											/* R12, R3, R2 and R1. */
-		*pxTopOfStack = ( StackType_t ) pvParameters;				/* R0 */
-		pxTopOfStack -= 9;											/* R11..R4, EXC_RETURN. */
-		*pxTopOfStack = portINITIAL_EXC_RETURN;
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
+    #if ( portPRELOAD_REGISTERS == 0 )
+        {
+            pxTopOfStack--;                                          /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+            *pxTopOfStack = portINITIAL_XPSR;                        /* xPSR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxCode;                  /* PC */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
+            pxTopOfStack -= 5;                                       /* R12, R3, R2 and R1. */
+            *pxTopOfStack = ( StackType_t ) pvParameters;            /* R0 */
+            pxTopOfStack -= 9;                                       /* R11..R4, EXC_RETURN. */
+            *pxTopOfStack = portINITIAL_EXC_RETURN;
 
-		#if( configENABLE_MPU == 1 )
-		{
-			pxTopOfStack--;
-			if( xRunPrivileged == pdTRUE )
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED;		/* Slot used to hold this task's CONTROL value. */
-			}
-			else
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED;	/* Slot used to hold this task's CONTROL value. */
-			}
-		}
-		#endif /* configENABLE_MPU */
+            #if ( configENABLE_MPU == 1 )
+                {
+                    pxTopOfStack--;
 
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxEndOfStack;	/* Slot used to hold this task's PSPLIM value. */
+                    if( xRunPrivileged == pdTRUE )
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                    else
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                }
+            #endif /* configENABLE_MPU */
 
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			pxTopOfStack--;
-			*pxTopOfStack = portNO_SECURE_CONTEXT;		/* Slot used to hold this task's xSecureContext value. */
-		}
-		#endif /* configENABLE_TRUSTZONE */
-	}
-	#else /* portPRELOAD_REGISTERS */
-	{
-		pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-		*pxTopOfStack = portINITIAL_XPSR;							/* xPSR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxCode;						/* PC */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x12121212UL;				/* R12 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x03030303UL;				/* R3 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x02020202UL;				/* R2 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x01010101UL;				/* R1 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pvParameters;				/* R0 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x11111111UL;				/* R11 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x10101010UL;				/* R10 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x09090909UL;				/* R09 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x08080808UL;				/* R08 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x07070707UL;				/* R07 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x06060606UL;				/* R06 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x05050505UL;				/* R05 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x04040404UL;				/* R04 */
-		pxTopOfStack--;
-		*pxTopOfStack = portINITIAL_EXC_RETURN;						/* EXC_RETURN */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */
 
-		#if( configENABLE_MPU == 1 )
-		{
-			pxTopOfStack--;
-			if( xRunPrivileged == pdTRUE )
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED;		/* Slot used to hold this task's CONTROL value. */
-			}
-			else
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED;	/* Slot used to hold this task's CONTROL value. */
-			}
-		}
-		#endif /* configENABLE_MPU */
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    pxTopOfStack--;
+                    *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */
+                }
+            #endif /* configENABLE_TRUSTZONE */
+        }
+    #else /* portPRELOAD_REGISTERS */
+        {
+            pxTopOfStack--;                                          /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+            *pxTopOfStack = portINITIAL_XPSR;                        /* xPSR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxCode;                  /* PC */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x12121212UL;            /* R12 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x03030303UL;            /* R3 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x02020202UL;            /* R2 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x01010101UL;            /* R1 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pvParameters;            /* R0 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x11111111UL;            /* R11 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x10101010UL;            /* R10 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x09090909UL;            /* R09 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x08080808UL;            /* R08 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x07070707UL;            /* R07 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x06060606UL;            /* R06 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x05050505UL;            /* R05 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x04040404UL;            /* R04 */
+            pxTopOfStack--;
+            *pxTopOfStack = portINITIAL_EXC_RETURN;                  /* EXC_RETURN */
 
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxEndOfStack;	/* Slot used to hold this task's PSPLIM value. */
+            #if ( configENABLE_MPU == 1 )
+                {
+                    pxTopOfStack--;
 
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			pxTopOfStack--;
-			*pxTopOfStack = portNO_SECURE_CONTEXT;		/* Slot used to hold this task's xSecureContext value. */
-		}
-		#endif /* configENABLE_TRUSTZONE */
-	}
-	#endif /* portPRELOAD_REGISTERS */
+                    if( xRunPrivileged == pdTRUE )
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                    else
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                }
+            #endif /* configENABLE_MPU */
 
-	return pxTopOfStack;
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */
+
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    pxTopOfStack--;
+                    *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */
+                }
+            #endif /* configENABLE_TRUSTZONE */
+        }
+    #endif /* portPRELOAD_REGISTERS */
+
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
 {
-	/* Make PendSV, CallSV and SysTick the same priority as the kernel. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+    /* Make PendSV, CallSV and SysTick the same priority as the kernel. */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
-	#if( configENABLE_MPU == 1 )
-	{
-		/* Setup the Memory Protection Unit (MPU). */
-		prvSetupMPU();
-	}
-	#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        {
+            /* Setup the Memory Protection Unit (MPU). */
+            prvSetupMPU();
+        }
+    #endif /* configENABLE_MPU */
 
-	/* Start the timer that generates the tick ISR. Interrupts are disabled
-	 * here already. */
-	vPortSetupTimerInterrupt();
+    /* Start the timer that generates the tick ISR. Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
 
-	/* Initialize the critical nesting count ready for the first task. */
-	ulCriticalNesting = 0;
+    /* Initialize the critical nesting count ready for the first task. */
+    ulCriticalNesting = 0;
 
-	/* Start the first task. */
-	vStartFirstTask();
+    /* Start the first task. */
+    vStartFirstTask();
 
-	/* Should never get here as the tasks will now be executing. Call the task
-	 * exit error function to prevent compiler warnings about a static function
-	 * not being called in the case that the application writer overrides this
-	 * functionality by defining configTASK_RETURN_ADDRESS. Call
-	 * vTaskSwitchContext() so link time optimization does not remove the
-	 * symbol. */
-	vTaskSwitchContext();
-	prvTaskExitError();
+    /* Should never get here as the tasks will now be executing. Call the task
+     * exit error function to prevent compiler warnings about a static function
+     * not being called in the case that the application writer overrides this
+     * functionality by defining configTASK_RETURN_ADDRESS. Call
+     * vTaskSwitchContext() so link time optimization does not remove the
+     * symbol. */
+    vTaskSwitchContext();
+    prvTaskExitError();
 
-	/* Should not get here. */
-	return 0;
+    /* Should not get here. */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
 {
-	/* Not implemented in ports where there is nothing to return to.
-	 * Artificially force an assert. */
-	configASSERT( ulCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( ulCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t ulStackDepth )
-	{
-	uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
-	int32_t lIndex = 0;
+#if ( configENABLE_MPU == 1 )
+    void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
+                                    const struct xMEMORY_REGION * const xRegions,
+                                    StackType_t * pxBottomOfStack,
+                                    uint32_t ulStackDepth )
+    {
+        uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
+        int32_t lIndex = 0;
 
-		/* Setup MAIR0. */
-		xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
-		xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
+        #if defined( __ARMCC_VERSION )
 
-		/* This function is called automatically when the task is created - in
-		 * which case the stack region parameters will be valid.  At all other
-		 * times the stack parameters will not be valid and it is assumed that
-		 * the stack region has already been configured. */
-		if( ulStackDepth > 0 )
-		{
-			/* Define the region that allows access to the stack. */
-			ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK;
-			ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1;
-			ulRegionEndAddress  &= portMPU_RLAR_ADDRESS_MASK;
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __privileged_sram_start__;
+            extern uint32_t * __privileged_sram_end__;
+        #else
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __privileged_sram_start__[];
+            extern uint32_t __privileged_sram_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
 
-			xMPUSettings->xRegionsSettings[ 0 ].ulRBAR =	( ulRegionStartAddress ) |
-															( portMPU_REGION_NON_SHAREABLE ) |
-															( portMPU_REGION_READ_WRITE ) |
-															( portMPU_REGION_EXECUTE_NEVER );
+        /* Setup MAIR0. */
+        xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
+        xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
 
-			xMPUSettings->xRegionsSettings[ 0 ].ulRLAR =	( ulRegionEndAddress ) |
-															( portMPU_RLAR_ATTR_INDEX0 ) |
-															( portMPU_RLAR_REGION_ENABLE );
-		}
+        /* This function is called automatically when the task is created - in
+         * which case the stack region parameters will be valid.  At all other
+         * times the stack parameters will not be valid and it is assumed that
+         * the stack region has already been configured. */
+        if( ulStackDepth > 0 )
+        {
+            ulRegionStartAddress = ( uint32_t ) pxBottomOfStack;
+            ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1;
 
-		/* User supplied configurable regions. */
-		for( ulRegionNumber = 1; ulRegionNumber <= portNUM_CONFIGURABLE_REGIONS; ulRegionNumber++ )
-		{
-			/* If xRegions is NULL i.e. the task has not specified any MPU
-			 * region, the else part ensures that all the configurable MPU
-			 * regions are invalidated. */
-			if( ( xRegions != NULL ) && ( xRegions[ lIndex ].ulLengthInBytes > 0UL ) )
-			{
-				/* Translate the generic region definition contained in xRegions
-				 * into the ARMv8 specific MPU settings that are then stored in
-				 * xMPUSettings. */
-				ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK;
-				ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1;
-				ulRegionEndAddress  &= portMPU_RLAR_ADDRESS_MASK;
+            /* If the stack is within the privileged SRAM, do not protect it
+             * using a separate MPU region. This is needed because privileged
+             * SRAM is already protected using an MPU region and ARMv8-M does
+             * not allow overlapping MPU regions. */
+            if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
+                ( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
+            {
+                xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
+                xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;
+            }
+            else
+            {
+                /* Define the region that allows access to the stack. */
+                ulRegionStartAddress &= portMPU_RBAR_ADDRESS_MASK;
+                ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK;
 
-				/* Start address. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR =	( ulRegionStartAddress ) |
-																			( portMPU_REGION_NON_SHAREABLE );
+                xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) |
+                                                             ( portMPU_REGION_NON_SHAREABLE ) |
+                                                             ( portMPU_REGION_READ_WRITE ) |
+                                                             ( portMPU_REGION_EXECUTE_NEVER );
 
-				/* RO/RW. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_READ_ONLY ) != 0 )
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_ONLY );
-				}
-				else
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_WRITE );
-				}
+                xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = ( ulRegionEndAddress ) |
+                                                             ( portMPU_RLAR_ATTR_INDEX0 ) |
+                                                             ( portMPU_RLAR_REGION_ENABLE );
+            }
+        }
 
-				/* XN. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_EXECUTE_NEVER ) != 0 )
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_EXECUTE_NEVER );
-				}
+        /* User supplied configurable regions. */
+        for( ulRegionNumber = 1; ulRegionNumber <= portNUM_CONFIGURABLE_REGIONS; ulRegionNumber++ )
+        {
+            /* If xRegions is NULL i.e. the task has not specified any MPU
+             * region, the else part ensures that all the configurable MPU
+             * regions are invalidated. */
+            if( ( xRegions != NULL ) && ( xRegions[ lIndex ].ulLengthInBytes > 0UL ) )
+            {
+                /* Translate the generic region definition contained in xRegions
+                 * into the ARMv8 specific MPU settings that are then stored in
+                 * xMPUSettings. */
+                ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK;
+                ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1;
+                ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK;
 
-				/* End Address. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR =	( ulRegionEndAddress ) |
-																			( portMPU_RLAR_REGION_ENABLE );
+                /* Start address. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = ( ulRegionStartAddress ) |
+                                                                          ( portMPU_REGION_NON_SHAREABLE );
 
-				/* Normal memory/ Device memory. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
-				{
-					/* Attr1 in MAIR0 is configured as device memory. */
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX1;
-				}
-				else
-				{
-					/* Attr1 in MAIR0 is configured as normal memory. */
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
-				}
-			}
-			else
-			{
-				/* Invalidate the region. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = 0UL;
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = 0UL;
-			}
+                /* RO/RW. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_READ_ONLY ) != 0 )
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_ONLY );
+                }
+                else
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_WRITE );
+                }
 
-			lIndex++;
-		}
-	}
+                /* XN. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_EXECUTE_NEVER ) != 0 )
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_EXECUTE_NEVER );
+                }
+
+                /* End Address. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
+                                                                          ( portMPU_RLAR_REGION_ENABLE );
+
+                /* Normal memory/ Device memory. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
+                {
+                    /* Attr1 in MAIR0 is configured as device memory. */
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX1;
+                }
+                else
+                {
+                    /* Attr1 in MAIR0 is configured as normal memory. */
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
+                }
+            }
+            else
+            {
+                /* Invalidate the region. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = 0UL;
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = 0UL;
+            }
+
+            lIndex++;
+        }
+    }
 #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 BaseType_t xPortIsInsideInterrupt( void )
 {
-uint32_t ulCurrentInterrupt;
-BaseType_t xReturn;
+    uint32_t ulCurrentInterrupt;
+    BaseType_t xReturn;
 
-	/* Obtain the number of the currently executing interrupt. Interrupt Program
-	 * Status Register (IPSR) holds the exception number of the currently-executing
-	 * exception or zero for Thread mode.*/
-	__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+    /* Obtain the number of the currently executing interrupt. Interrupt Program
+     * Status Register (IPSR) holds the exception number of the currently-executing
+     * exception or zero for Thread mode.*/
+    __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
-	if( ulCurrentInterrupt == 0 )
-	{
-		xReturn = pdFALSE;
-	}
-	else
-	{
-		xReturn = pdTRUE;
-	}
+    if( ulCurrentInterrupt == 0 )
+    {
+        xReturn = pdFALSE;
+    }
+    else
+    {
+        xReturn = pdTRUE;
+    }
 
-	return xReturn;
+    return xReturn;
 }
-/*-----------------------------------------------------------*/
\ No newline at end of file
+/*-----------------------------------------------------------*/
diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h
index 71d711c69..6aaee8fc8 100644
--- a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h
+++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -38,14 +38,14 @@
  * @brief Restore the context of the first task so that the first task starts
  * executing.
  */
-void vRestoreContextOfFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vRestoreContextOfFirstTask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Checks whether or not the processor is privileged.
  *
  * @return 1 if the processor is already privileged, 0 otherwise.
  */
-BaseType_t xIsPrivileged( void ) __attribute__ (( naked ));
+BaseType_t xIsPrivileged( void ) __attribute__( ( naked ) );
 
 /**
  * @brief Raises the privilege level by clearing the bit 0 of the CONTROL
@@ -58,7 +58,7 @@ BaseType_t xIsPrivileged( void ) __attribute__ (( naked ));
  *  Bit[0] = 0 --> The processor is running privileged
  *  Bit[0] = 1 --> The processor is running unprivileged.
  */
-void vRaisePrivilege( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vRaisePrivilege( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
@@ -68,32 +68,32 @@ void vRaisePrivilege( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
  *  Bit[0] = 0 --> The processor is running privileged
  *  Bit[0] = 1 --> The processor is running unprivileged.
  */
-void vResetPrivilege( void ) __attribute__ (( naked ));
+void vResetPrivilege( void ) __attribute__( ( naked ) );
 
 /**
  * @brief Starts the first task.
  */
-void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vStartFirstTask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Disables interrupts.
  */
-uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
+uint32_t ulSetInterruptMask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Enables interrupts.
  */
-void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
+void vClearInterruptMask( uint32_t ulMask ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief PendSV Exception handler.
  */
-void PendSV_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void PendSV_Handler( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief SVC Handler.
  */
-void SVC_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void SVC_Handler( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Allocate a Secure context for the calling task.
@@ -101,13 +101,13 @@ void SVC_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
  * @param[in] ulSecureStackSize The size of the stack to be allocated on the
  * secure side for the calling task.
  */
-void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) __attribute__ (( naked ));
+void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) __attribute__( ( naked ) );
 
 /**
  * @brief Free the task's secure context.
  *
  * @param[in] pulTCB Pointer to the Task Control Block (TCB) of the task.
  */
-void vPortFreeSecureContext( uint32_t *pulTCB ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vPortFreeSecureContext( uint32_t * pulTCB ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 #endif /* __PORT_ASM_H__ */
diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s
index 61eb269c0..6068e3d05 100644
--- a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s
+++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h
index b4598d526..7c6955817 100644
--- a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h
+++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,18 +19,18 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*------------------------------------------------------------------------------
  * Port specific definitions.
@@ -42,109 +42,109 @@ extern "C" {
  *------------------------------------------------------------------------------
  */
 
-#ifndef configENABLE_FPU
-	#error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
-#endif /* configENABLE_FPU */
+    #ifndef configENABLE_FPU
+        #error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
+    #endif /* configENABLE_FPU */
 
-#ifndef configENABLE_MPU
-	#error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
-#endif /* configENABLE_MPU */
+    #ifndef configENABLE_MPU
+        #error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
+    #endif /* configENABLE_MPU */
 
-#ifndef configENABLE_TRUSTZONE
-	#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
-#endif /* configENABLE_TRUSTZONE */
+    #ifndef configENABLE_TRUSTZONE
+        #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
+    #endif /* configENABLE_TRUSTZONE */
 
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Type definitions.
  */
-#define portCHAR											char
-#define portFLOAT											float
-#define portDOUBLE											double
-#define portLONG											long
-#define portSHORT											short
-#define portSTACK_TYPE										uint32_t
-#define portBASE_TYPE										long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE										StackType_t;
-typedef long												BaseType_t;
-typedef unsigned long										UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	 * not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC							1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * Architecture specifics.
  */
-#define portARCH_NAME										"Cortex-M23"
-#define portSTACK_GROWTH									( -1 )
-#define portTICK_PERIOD_MS									( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT									8
-#define portNOP()
-#define portINLINE											__inline
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE								inline __attribute__(( always_inline ))
-#endif
-#define portHAS_STACK_OVERFLOW_CHECKING						1
-#define portDONT_DISCARD									__root
+    #define portARCH_NAME                      "Cortex-M23"
+    #define portSTACK_GROWTH                   ( -1 )
+    #define portTICK_PERIOD_MS                 ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT                 8
+    #define portNOP()
+    #define portINLINE                         __inline
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE               inline __attribute__( ( always_inline ) )
+    #endif
+    #define portHAS_STACK_OVERFLOW_CHECKING    1
+    #define portDONT_DISCARD                   __root
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Extern declarations.
  */
-extern BaseType_t xPortIsInsideInterrupt( void );
+    extern BaseType_t xPortIsInsideInterrupt( void );
 
-extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
 
-extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
-extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
 
-extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
 
-#if( configENABLE_TRUSTZONE == 1 )
-	extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
-	extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
-#endif /* configENABLE_TRUSTZONE */
+    #if ( configENABLE_TRUSTZONE == 1 )
+        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
+        extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
+    #endif /* configENABLE_TRUSTZONE */
 
-#if( configENABLE_MPU == 1 )
-	extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
-	extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
+        extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief MPU specific constants.
  */
-#if( configENABLE_MPU == 1 )
-	#define portUSING_MPU_WRAPPERS							1
-	#define portPRIVILEGE_BIT								( 0x80000000UL )
-#else
-	#define portPRIVILEGE_BIT								( 0x0UL )
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        #define portUSING_MPU_WRAPPERS    1
+        #define portPRIVILEGE_BIT         ( 0x80000000UL )
+    #else
+        #define portPRIVILEGE_BIT         ( 0x0UL )
+    #endif /* configENABLE_MPU */
 
 
 /* MPU regions. */
-#define portPRIVILEGED_FLASH_REGION							( 0UL )
-#define portUNPRIVILEGED_FLASH_REGION						( 1UL )
-#define portUNPRIVILEGED_SYSCALLS_REGION					( 2UL )
-#define portPRIVILEGED_RAM_REGION							( 3UL )
-#define portSTACK_REGION									( 4UL )
-#define portFIRST_CONFIGURABLE_REGION						( 5UL )
-#define portLAST_CONFIGURABLE_REGION						( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS						( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS								( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
+    #define portPRIVILEGED_FLASH_REGION                   ( 0UL )
+    #define portUNPRIVILEGED_FLASH_REGION                 ( 1UL )
+    #define portUNPRIVILEGED_SYSCALLS_REGION              ( 2UL )
+    #define portPRIVILEGED_RAM_REGION                     ( 3UL )
+    #define portSTACK_REGION                              ( 4UL )
+    #define portFIRST_CONFIGURABLE_REGION                 ( 5UL )
+    #define portLAST_CONFIGURABLE_REGION                  ( 7UL )
+    #define portNUM_CONFIGURABLE_REGIONS                  ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
+    #define portTOTAL_NUM_REGIONS                         ( portNUM_CONFIGURABLE_REGIONS + 1 )   /* Plus one to make space for the stack region. */
 
 /* Device memory attributes used in MPU_MAIR registers.
  *
@@ -156,162 +156,164 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
  *				11 --> Device-GRE
  *  Bit[1:0] - 00, Reserved.
  */
-#define portMPU_DEVICE_MEMORY_nGnRnE						( 0x00 ) /* 0000 0000 */
-#define portMPU_DEVICE_MEMORY_nGnRE							( 0x04 ) /* 0000 0100 */
-#define portMPU_DEVICE_MEMORY_nGRE							( 0x08 ) /* 0000 1000 */
-#define portMPU_DEVICE_MEMORY_GRE							( 0x0C ) /* 0000 1100 */
+    #define portMPU_DEVICE_MEMORY_nGnRnE                  ( 0x00 )   /* 0000 0000 */
+    #define portMPU_DEVICE_MEMORY_nGnRE                   ( 0x04 )   /* 0000 0100 */
+    #define portMPU_DEVICE_MEMORY_nGRE                    ( 0x08 )   /* 0000 1000 */
+    #define portMPU_DEVICE_MEMORY_GRE                     ( 0x0C )   /* 0000 1100 */
 
 /* Normal memory attributes used in MPU_MAIR registers. */
-#define portMPU_NORMAL_MEMORY_NON_CACHEABLE					( 0x44 ) /* Non-cacheable. */
-#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE			( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
+    #define portMPU_NORMAL_MEMORY_NON_CACHEABLE           ( 0x44 )   /* Non-cacheable. */
+    #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE    ( 0xFF )   /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
 
 /* Attributes used in MPU_RBAR registers. */
-#define portMPU_REGION_NON_SHAREABLE						( 0UL << 3UL )
-#define portMPU_REGION_INNER_SHAREABLE						( 1UL << 3UL )
-#define portMPU_REGION_OUTER_SHAREABLE						( 2UL << 3UL )
+    #define portMPU_REGION_NON_SHAREABLE                  ( 0UL << 3UL )
+    #define portMPU_REGION_INNER_SHAREABLE                ( 1UL << 3UL )
+    #define portMPU_REGION_OUTER_SHAREABLE                ( 2UL << 3UL )
 
-#define portMPU_REGION_PRIVILEGED_READ_WRITE				( 0UL << 1UL )
-#define portMPU_REGION_READ_WRITE							( 1UL << 1UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY					( 2UL << 1UL )
-#define portMPU_REGION_READ_ONLY							( 3UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_WRITE          ( 0UL << 1UL )
+    #define portMPU_REGION_READ_WRITE                     ( 1UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_ONLY           ( 2UL << 1UL )
+    #define portMPU_REGION_READ_ONLY                      ( 3UL << 1UL )
 
-#define portMPU_REGION_EXECUTE_NEVER						( 1UL )
+    #define portMPU_REGION_EXECUTE_NEVER                  ( 1UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Settings to define an MPU region.
  */
-typedef struct MPURegionSettings
-{
-	uint32_t ulRBAR;	/**< RBAR for the region. */
-	uint32_t ulRLAR;	/**< RLAR for the region. */
-} MPURegionSettings_t;
+    typedef struct MPURegionSettings
+    {
+        uint32_t ulRBAR; /**< RBAR for the region. */
+        uint32_t ulRLAR; /**< RLAR for the region. */
+    } MPURegionSettings_t;
 
 /**
  * @brief MPU settings as stored in the TCB.
  */
-typedef struct MPU_SETTINGS
-{
-	uint32_t ulMAIR0;	/**< MAIR0 for the task containing attributes for all the 4 per task regions. */
-	MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
-} xMPU_SETTINGS;
+    typedef struct MPU_SETTINGS
+    {
+        uint32_t ulMAIR0;                                              /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
+        MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
+    } xMPU_SETTINGS;
 /*-----------------------------------------------------------*/
 
 /**
  * @brief SVC numbers.
  */
-#define portSVC_ALLOCATE_SECURE_CONTEXT						0
-#define portSVC_FREE_SECURE_CONTEXT							1
-#define portSVC_START_SCHEDULER								2
-#define portSVC_RAISE_PRIVILEGE								3
+    #define portSVC_ALLOCATE_SECURE_CONTEXT    0
+    #define portSVC_FREE_SECURE_CONTEXT        1
+    #define portSVC_START_SCHEDULER            2
+    #define portSVC_RAISE_PRIVILEGE            3
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Scheduler utilities.
  */
-#define portYIELD()											vPortYield()
-#define portNVIC_INT_CTRL_REG								( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT								( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired )			if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x )								portEND_SWITCHING_ISR( x )
+    #define portYIELD()                                 vPortYield()
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Critical section management.
  */
-#define portSET_INTERRUPT_MASK_FROM_ISR()					ulSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)				vClearInterruptMask( x )
-#define portDISABLE_INTERRUPTS()							__asm volatile ( " cpsid i " ::: "memory" )
-#define portENABLE_INTERRUPTS()								__asm volatile ( " cpsie i " ::: "memory" )
-#define portENTER_CRITICAL()								vPortEnterCritical()
-#define portEXIT_CRITICAL()									vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulSetInterruptMask()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vClearInterruptMask( x )
+    #define portDISABLE_INTERRUPTS()                  __asm volatile ( " cpsid i " ::: "memory" )
+    #define portENABLE_INTERRUPTS()                   __asm volatile ( " cpsie i " ::: "memory" )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Tickless idle/low power functionality.
  */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Task function macros as described on the FreeRTOS.org WEB site.
  */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters )		void vFunction( void *pvParameters )
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Allocate a secure context for the task.
-	 *
-	 * Tasks are not created with a secure context. Any task that is going to call
-	 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
-	 * secure context before it calls any secure function.
-	 *
-	 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
-	 */
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )	vPortAllocateSecureContext( ulSecureStackSize )
+    #if ( configENABLE_TRUSTZONE == 1 )
 
-	/**
-	 * @brief Called when a task is deleted to delete the task's secure context,
-	 * if it has one.
-	 *
-	 * @param[in] pxTCB The TCB of the task being deleted.
-	 */
-	#define portCLEAN_UP_TCB( pxTCB )							vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-#else
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-	#define portCLEAN_UP_TCB( pxTCB )
-#endif /* configENABLE_TRUSTZONE */
+/**
+ * @brief Allocate a secure context for the task.
+ *
+ * Tasks are not created with a secure context. Any task that is going to call
+ * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
+ * secure context before it calls any secure function.
+ *
+ * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
+ */
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )    vPortAllocateSecureContext( ulSecureStackSize )
+
+/**
+ * @brief Called when a task is deleted to delete the task's secure context,
+ * if it has one.
+ *
+ * @param[in] pxTCB The TCB of the task being deleted.
+ */
+        #define portCLEAN_UP_TCB( pxTCB )                           vPortFreeSecureContext( ( uint32_t * ) pxTCB )
+    #else
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
+        #define portCLEAN_UP_TCB( pxTCB )
+    #endif /* configENABLE_TRUSTZONE */
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Checks whether or not the processor is privileged.
-	 *
-	 * @return 1 if the processor is already privileged, 0 otherwise.
-	 */
-	#define portIS_PRIVILEGED()									xIsPrivileged()
+    #if ( configENABLE_MPU == 1 )
 
-	/**
-	 * @brief Raise an SVC request to raise privilege.
-	 *
-	 * The SVC handler checks that the SVC was raised from a system call and only
-	 * then it raises the privilege. If this is called from any other place,
-	 * the privilege is not raised.
-	 */
-	#define portRAISE_PRIVILEGE()								__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+/**
+ * @brief Checks whether or not the processor is privileged.
+ *
+ * @return 1 if the processor is already privileged, 0 otherwise.
+ */
+        #define portIS_PRIVILEGED()      xIsPrivileged()
 
-	/**
-	 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
-	 * register.
-	 */
-	#define portRESET_PRIVILEGE()								vResetPrivilege()
-#else
-	#define portIS_PRIVILEGED()
-	#define portRAISE_PRIVILEGE()
-	#define portRESET_PRIVILEGE()
-#endif /* configENABLE_MPU */
+/**
+ * @brief Raise an SVC request to raise privilege.
+ *
+ * The SVC handler checks that the SVC was raised from a system call and only
+ * then it raises the privilege. If this is called from any other place,
+ * the privilege is not raised.
+ */
+        #define portRAISE_PRIVILEGE()    __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+
+/**
+ * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
+ * register.
+ */
+        #define portRESET_PRIVILEGE()    vResetPrivilege()
+    #else
+        #define portIS_PRIVILEGED()
+        #define portRAISE_PRIVILEGE()
+        #define portRESET_PRIVILEGE()
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Barriers.
  */
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
+    #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
 /*-----------------------------------------------------------*/
 
 /* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
  * the source code because to do so would cause other compilers to generate
  * warnings. */
-#pragma diag_suppress=Be006
-#pragma diag_suppress=Pa082
+    #pragma diag_suppress=Be006
+    #pragma diag_suppress=Pa082
 /*-----------------------------------------------------------*/
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
diff --git a/portable/IAR/ARM_CM3/port.c b/portable/IAR/ARM_CM3/port.c
index 3b84a2128..e2d3662de 100644
--- a/portable/IAR/ARM_CM3/port.c
+++ b/portable/IAR/ARM_CM3/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,15 +19,14 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------
- * Implementation of functions defined in portable.h for the ARM CM3 port.
- *----------------------------------------------------------*/
+* Implementation of functions defined in portable.h for the ARM CM3 port.
+*----------------------------------------------------------*/
 
 /* IAR includes. */
 #include 
@@ -36,68 +35,69 @@
 #include "FreeRTOS.h"
 #include "task.h"
 
-#if( configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 )
-	#error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+#if ( configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 )
+    #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See http: /*www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
 #endif
 
 #ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 1UL << 2UL )
+    #define configSYSTICK_CLOCK_HZ      configCPU_CLOCK_HZ
+    /* Ensure the SysTick is clocked at the same frequency as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 1UL << 2UL )
 #else
-	/* The way the SysTick is clocked is not modified in case it is not the same
-	as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 0 )
+
+/* The way the SysTick is clocked is not modified in case it is not the same
+ * as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 0 )
 #endif
 
 /* Constants required to manipulate the core.  Registers first... */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_CTRL_REG             ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG             ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG    ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SHPR3_REG                    ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
 /* ...then bits in the registers. */
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portNVIC_PENDSVCLEAR_BIT 			( 1UL << 27UL )
-#define portNVIC_PEND_SYSTICK_CLEAR_BIT		( 1UL << 25UL )
+#define portNVIC_SYSTICK_INT_BIT              ( 1UL << 1UL )
+#define portNVIC_SYSTICK_ENABLE_BIT           ( 1UL << 0UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT       ( 1UL << 16UL )
+#define portNVIC_PENDSVCLEAR_BIT              ( 1UL << 27UL )
+#define portNVIC_PEND_SYSTICK_CLEAR_BIT       ( 1UL << 25UL )
 
-#define portNVIC_PENDSV_PRI					( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
-#define portNVIC_SYSTICK_PRI				( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
+#define portNVIC_PENDSV_PRI                   ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
+#define portNVIC_SYSTICK_PRI                  ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
 
 /* Constants required to check the validity of an interrupt priority. */
-#define portFIRST_USER_INTERRUPT_NUMBER		( 16 )
-#define portNVIC_IP_REGISTERS_OFFSET_16 	( 0xE000E3F0 )
-#define portAIRCR_REG						( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
-#define portMAX_8_BIT_VALUE					( ( uint8_t ) 0xff )
-#define portTOP_BIT_OF_BYTE					( ( uint8_t ) 0x80 )
-#define portMAX_PRIGROUP_BITS				( ( uint8_t ) 7 )
-#define portPRIORITY_GROUP_MASK				( 0x07UL << 8UL )
-#define portPRIGROUP_SHIFT					( 8UL )
+#define portFIRST_USER_INTERRUPT_NUMBER       ( 16 )
+#define portNVIC_IP_REGISTERS_OFFSET_16       ( 0xE000E3F0 )
+#define portAIRCR_REG                         ( *( ( volatile uint32_t * ) 0xE000ED0C ) )
+#define portMAX_8_BIT_VALUE                   ( ( uint8_t ) 0xff )
+#define portTOP_BIT_OF_BYTE                   ( ( uint8_t ) 0x80 )
+#define portMAX_PRIGROUP_BITS                 ( ( uint8_t ) 7 )
+#define portPRIORITY_GROUP_MASK               ( 0x07UL << 8UL )
+#define portPRIGROUP_SHIFT                    ( 8UL )
 
 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
-#define portVECTACTIVE_MASK					( 0xFFUL )
+#define portVECTACTIVE_MASK                   ( 0xFFUL )
 
 /* Constants required to set up the initial stack. */
-#define portINITIAL_XPSR					( 0x01000000 )
+#define portINITIAL_XPSR                      ( 0x01000000 )
 
 /* The systick is a 24-bit counter. */
-#define portMAX_24_BIT_NUMBER				( 0xffffffUL )
+#define portMAX_24_BIT_NUMBER                 ( 0xffffffUL )
 
 /* A fiddle factor to estimate the number of SysTick counts that would have
-occurred while the SysTick counter is stopped during tickless idle
-calculations. */
-#define portMISSED_COUNTS_FACTOR			( 45UL )
+ * occurred while the SysTick counter is stopped during tickless idle
+ * calculations. */
+#define portMISSED_COUNTS_FACTOR              ( 45UL )
 
 /* For strict compliance with the Cortex-M spec the task start address should
-have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
-#define portSTART_ADDRESS_MASK				( ( StackType_t ) 0xfffffffeUL )
+ * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
+#define portSTART_ADDRESS_MASK                ( ( StackType_t ) 0xfffffffeUL )
 
 /* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is
-defined.  The value 255 should also ensure backward compatibility.
-FreeRTOS.org versions prior to V4.3.0 did not include this definition. */
+ * defined.  The value 255 should also ensure backward compatibility.
+ * FreeRTOS.org versions prior to V4.3.0 did not include this definition. */
 #ifndef configKERNEL_INTERRUPT_PRIORITY
-	#define configKERNEL_INTERRUPT_PRIORITY 255
+    #define configKERNEL_INTERRUPT_PRIORITY    255
 #endif
 
 /*
@@ -125,30 +125,30 @@ static void prvTaskExitError( void );
 /*-----------------------------------------------------------*/
 
 /* Each task maintains its own interrupt status in the critical nesting
-variable. */
+ * variable. */
 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 
 /*
  * The number of SysTick increments that make up one tick period.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulTimerCountsForOneTick = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulTimerCountsForOneTick = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * The maximum number of tick periods that can be suppressed is limited by the
  * 24 bit resolution of the SysTick timer.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t xMaximumPossibleSuppressedTicks = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * Compensate for the CPU cycles that pass while the SysTick is stopped (low
  * power functionality only.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulStoppedTimerCompensation = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulStoppedTimerCompensation = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
@@ -156,10 +156,10 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
  * FreeRTOS API functions are not called from interrupts that have been assigned
  * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
  */
-#if( configASSERT_DEFINED == 1 )
-	 static uint8_t ucMaxSysCallPriority = 0;
-	 static uint32_t ulMaxPRIGROUPValue = 0;
-	 static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
+#if ( configASSERT_DEFINED == 1 )
+    static uint8_t ucMaxSysCallPriority = 0;
+    static uint32_t ulMaxPRIGROUPValue = 0;
+    static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
 #endif /* configASSERT_DEFINED */
 
 /*-----------------------------------------------------------*/
@@ -167,35 +167,40 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 /*
  * See header file for description.
  */
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	interrupt. */
-	pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
-	pxTopOfStack--;
-	*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;	/* PC */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) prvTaskExitError;	/* LR */
-	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
-	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
-	pxTopOfStack -= 8;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
+    pxTopOfStack--;                                                      /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+    *pxTopOfStack = portINITIAL_XPSR;                                    /* xPSR */
+    pxTopOfStack--;
+    *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) prvTaskExitError;                    /* LR */
+    pxTopOfStack -= 5;                                                   /* R12, R3, R2 and R1. */
+    *pxTopOfStack = ( StackType_t ) pvParameters;                        /* R0 */
+    pxTopOfStack -= 8;                                                   /* R11, R10, R9, R8, R7, R6, R5 and R4. */
 
-	return pxTopOfStack;
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 static void prvTaskExitError( void )
 {
-	/* A function that implements a task must not exit or attempt to return to
-	its caller as there is nothing to return to.  If a task wants to exit it
-	should instead call vTaskDelete( NULL ).
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to.  If a task wants to exit it
+     * should instead call vTaskDelete( NULL ).
+     *
+     * Artificially force an assert() to be triggered if configASSERT() is
+     * defined, then stop here so application writers can catch the error. */
+    configASSERT( uxCriticalNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
 
-	Artificially force an assert() to be triggered if configASSERT() is
-	defined, then stop here so application writers can catch the error. */
-	configASSERT( uxCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
-	for( ;; );
+    for( ; ; )
+    {
+    }
 }
 /*-----------------------------------------------------------*/
 
@@ -204,310 +209,315 @@ static void prvTaskExitError( void )
  */
 BaseType_t xPortStartScheduler( void )
 {
-	/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
-	See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
-	configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
+    /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
+     * See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
+    configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
 
-	#if( configASSERT_DEFINED == 1 )
-	{
-		volatile uint32_t ulOriginalPriority;
-		volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
-		volatile uint8_t ucMaxPriorityValue;
+    #if ( configASSERT_DEFINED == 1 )
+        {
+            volatile uint32_t ulOriginalPriority;
+            volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
+            volatile uint8_t ucMaxPriorityValue;
 
-		/* Determine the maximum priority from which ISR safe FreeRTOS API
-		functions can be called.  ISR safe functions are those that end in
-		"FromISR".  FreeRTOS maintains separate thread and ISR API functions to
-		ensure interrupt entry is as fast and simple as possible.
+            /* Determine the maximum priority from which ISR safe FreeRTOS API
+             * functions can be called.  ISR safe functions are those that end in
+             * "FromISR".  FreeRTOS maintains separate thread and ISR API functions to
+             * ensure interrupt entry is as fast and simple as possible.
+             *
+             * Save the interrupt priority value that is about to be clobbered. */
+            ulOriginalPriority = *pucFirstUserPriorityRegister;
 
-		Save the interrupt priority value that is about to be clobbered. */
-		ulOriginalPriority = *pucFirstUserPriorityRegister;
+            /* Determine the number of priority bits available.  First write to all
+             * possible bits. */
+            *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
 
-		/* Determine the number of priority bits available.  First write to all
-		possible bits. */
-		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
+            /* Read the value back to see how many bits stuck. */
+            ucMaxPriorityValue = *pucFirstUserPriorityRegister;
 
-		/* Read the value back to see how many bits stuck. */
-		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
+            /* Use the same mask on the maximum system call priority. */
+            ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
 
-		/* Use the same mask on the maximum system call priority. */
-		ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
+            /* Calculate the maximum acceptable priority group value for the number
+             * of bits read back. */
+            ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
 
-		/* Calculate the maximum acceptable priority group value for the number
-		of bits read back. */
-		ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
-		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
-		{
-			ulMaxPRIGROUPValue--;
-			ucMaxPriorityValue <<= ( uint8_t ) 0x01;
-		}
+            while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
+            {
+                ulMaxPRIGROUPValue--;
+                ucMaxPriorityValue <<= ( uint8_t ) 0x01;
+            }
 
-		#ifdef __NVIC_PRIO_BITS
-		{
-			/* Check the CMSIS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
-		}
-		#endif
+            #ifdef __NVIC_PRIO_BITS
+                {
+                    /* Check the CMSIS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
+                }
+            #endif
 
-		#ifdef configPRIO_BITS
-		{
-			/* Check the FreeRTOS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
-		}
-		#endif
+            #ifdef configPRIO_BITS
+                {
+                    /* Check the FreeRTOS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
+                }
+            #endif
 
-		/* Shift the priority group value back to its position within the AIRCR
-		register. */
-		ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
-		ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
+            /* Shift the priority group value back to its position within the AIRCR
+             * register. */
+            ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
+            ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
 
-		/* Restore the clobbered interrupt priority register to its original
-		value. */
-		*pucFirstUserPriorityRegister = ulOriginalPriority;
-	}
-	#endif /* conifgASSERT_DEFINED */
+            /* Restore the clobbered interrupt priority register to its original
+             * value. */
+            *pucFirstUserPriorityRegister = ulOriginalPriority;
+        }
+    #endif /* conifgASSERT_DEFINED */
 
-	/* Make PendSV and SysTick the lowest priority interrupts. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+    /* Make PendSV and SysTick the lowest priority interrupts. */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
-	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-	here already. */
-	vPortSetupTimerInterrupt();
+    /* Start the timer that generates the tick ISR.  Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
 
-	/* Initialise the critical nesting count ready for the first task. */
-	uxCriticalNesting = 0;
+    /* Initialise the critical nesting count ready for the first task. */
+    uxCriticalNesting = 0;
 
-	/* Start the first task. */
-	vPortStartFirstTask();
+    /* Start the first task. */
+    vPortStartFirstTask();
 
-	/* Should not get here! */
-	return 0;
+    /* Should not get here! */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void )
 {
-	/* Not implemented in ports where there is nothing to return to.
-	Artificially force an assert. */
-	configASSERT( uxCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( uxCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void )
 {
-	portDISABLE_INTERRUPTS();
-	uxCriticalNesting++;
+    portDISABLE_INTERRUPTS();
+    uxCriticalNesting++;
 
-	/* This is not the interrupt safe version of the enter critical function so
-	assert() if it is being called from an interrupt context.  Only API
-	functions that end in "FromISR" can be used in an interrupt.  Only assert if
-	the critical nesting count is 1 to protect against recursive calls if the
-	assert function also uses a critical section. */
-	if( uxCriticalNesting == 1 )
-	{
-		configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
-	}
+    /* This is not the interrupt safe version of the enter critical function so
+     * assert() if it is being called from an interrupt context.  Only API
+     * functions that end in "FromISR" can be used in an interrupt.  Only assert if
+     * the critical nesting count is 1 to protect against recursive calls if the
+     * assert function also uses a critical section. */
+    if( uxCriticalNesting == 1 )
+    {
+        configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
+    }
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void )
 {
-	configASSERT( uxCriticalNesting );
-	uxCriticalNesting--;
-	if( uxCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
+    configASSERT( uxCriticalNesting );
+    uxCriticalNesting--;
+
+    if( uxCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
 }
 /*-----------------------------------------------------------*/
 
 void xPortSysTickHandler( void )
 {
-	/* The SysTick runs at the lowest interrupt priority, so when this interrupt
-	executes all interrupts must be unmasked.  There is therefore no need to
-	save and then restore the interrupt mask value as its value is already
-	known. */
-	portDISABLE_INTERRUPTS();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* A context switch is required.  Context switching is performed in
-			the PendSV interrupt.  Pend the PendSV interrupt. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portENABLE_INTERRUPTS();
+    /* The SysTick runs at the lowest interrupt priority, so when this interrupt
+     * executes all interrupts must be unmasked.  There is therefore no need to
+     * save and then restore the interrupt mask value as its value is already
+     * known. */
+    portDISABLE_INTERRUPTS();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* A context switch is required.  Context switching is performed in
+             * the PendSV interrupt.  Pend the PendSV interrupt. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+    portENABLE_INTERRUPTS();
 }
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TICKLESS_IDLE == 1 )
+#if ( configUSE_TICKLESS_IDLE == 1 )
 
-	__weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-	{
-	uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
-	TickType_t xModifiableIdleTime;
+    __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+    {
+        uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+        TickType_t xModifiableIdleTime;
 
-		/* Make sure the SysTick reload value does not overflow the counter. */
-		if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-		{
-			xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-		}
+        /* Make sure the SysTick reload value does not overflow the counter. */
+        if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+        {
+            xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+        }
 
-		/* Stop the SysTick momentarily.  The time the SysTick is stopped for
-		is accounted for as best it can be, but using the tickless mode will
-		inevitably result in some tiny drift of the time maintained by the
-		kernel with respect to calendar time. */
-		portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+        /* Stop the SysTick momentarily.  The time the SysTick is stopped for
+         * is accounted for as best it can be, but using the tickless mode will
+         * inevitably result in some tiny drift of the time maintained by the
+         * kernel with respect to calendar time. */
+        portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
 
-		/* Calculate the reload value required to wait xExpectedIdleTime
-		tick periods.  -1 is used because this code will execute part way
-		through one of the tick periods. */
-		ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-		if( ulReloadValue > ulStoppedTimerCompensation )
-		{
-			ulReloadValue -= ulStoppedTimerCompensation;
-		}
+        /* Calculate the reload value required to wait xExpectedIdleTime
+         * tick periods.  -1 is used because this code will execute part way
+         * through one of the tick periods. */
+        ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
 
-		/* Enter a critical section but don't use the taskENTER_CRITICAL()
-		method as that will mask interrupts that should exit sleep mode. */
-		__disable_interrupt();
-		__DSB();
-		__ISB();
+        if( ulReloadValue > ulStoppedTimerCompensation )
+        {
+            ulReloadValue -= ulStoppedTimerCompensation;
+        }
 
-		/* If a context switch is pending or a task is waiting for the scheduler
-		to be unsuspended then abandon the low power entry. */
-		if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-		{
-			/* Restart from whatever is left in the count register to complete
-			this tick period. */
-			portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+        /* Enter a critical section but don't use the taskENTER_CRITICAL()
+         * method as that will mask interrupts that should exit sleep mode. */
+        __disable_interrupt();
+        __DSB();
+        __ISB();
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+        /* If a context switch is pending or a task is waiting for the scheduler
+         * to be unsuspended then abandon the low power entry. */
+        if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+        {
+            /* Restart from whatever is left in the count register to complete
+             * this tick period. */
+            portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Reset the reload register to the value required for normal tick
-			periods. */
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts - see comments above __disable_interrupt()
-			call above. */
-			__enable_interrupt();
-		}
-		else
-		{
-			/* Set the new reload value. */
-			portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+            /* Reset the reload register to the value required for normal tick
+             * periods. */
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
 
-			/* Clear the SysTick count flag and set the count value back to
-			zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            /* Re-enable interrupts - see comments above __disable_interrupt()
+             * call above. */
+            __enable_interrupt();
+        }
+        else
+        {
+            /* Set the new reload value. */
+            portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            /* Clear the SysTick count flag and set the count value back to
+             * zero. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-			/* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
-			set its parameter to 0 to indicate that its implementation contains
-			its own wait for interrupt or wait for event instruction, and so wfi
-			should not be executed again.  However, the original expected idle
-			time variable must remain unmodified, so a copy is taken. */
-			xModifiableIdleTime = xExpectedIdleTime;
-			configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-			if( xModifiableIdleTime > 0 )
-			{
-				__DSB();
-				__WFI();
-				__ISB();
-			}
-			configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts to allow the interrupt that brought the MCU
-			out of sleep mode to execute immediately.  see comments above
-			__disable_interrupt() call above. */
-			__enable_interrupt();
-			__DSB();
-			__ISB();
+            /* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
+             * set its parameter to 0 to indicate that its implementation contains
+             * its own wait for interrupt or wait for event instruction, and so wfi
+             * should not be executed again.  However, the original expected idle
+             * time variable must remain unmodified, so a copy is taken. */
+            xModifiableIdleTime = xExpectedIdleTime;
+            configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
 
-			/* Disable interrupts again because the clock is about to be stopped
-			and interrupts that execute while the clock is stopped will increase
-			any slippage between the time maintained by the RTOS and calendar
-			time. */
-			__disable_interrupt();
-			__DSB();
-			__ISB();
+            if( xModifiableIdleTime > 0 )
+            {
+                __DSB();
+                __WFI();
+                __ISB();
+            }
 
-			/* Disable the SysTick clock without reading the
-			portNVIC_SYSTICK_CTRL_REG register to ensure the
-			portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
-			the time the SysTick is stopped for is accounted for as best it can
-			be, but using the tickless mode will inevitably result in some tiny
-			drift of the time maintained by the kernel with respect to calendar
-			time*/
-			portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+            configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
 
-			/* Determine if the SysTick clock has already counted to zero and
-			been set back to the current reload value (the reload back being
-			correct for the entire expected idle time) or if the SysTick is yet
-			to count to zero (in which case an interrupt other than the SysTick
-			must have brought the system out of sleep mode). */
-			if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-			{
-				uint32_t ulCalculatedLoadValue;
+            /* Re-enable interrupts to allow the interrupt that brought the MCU
+             * out of sleep mode to execute immediately.  see comments above
+             * __disable_interrupt() call above. */
+            __enable_interrupt();
+            __DSB();
+            __ISB();
 
-				/* The tick interrupt is already pending, and the SysTick count
-				reloaded with ulReloadValue.  Reset the
-				portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
-				period. */
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+            /* Disable interrupts again because the clock is about to be stopped
+             * and interrupts that execute while the clock is stopped will increase
+             * any slippage between the time maintained by the RTOS and calendar
+             * time. */
+            __disable_interrupt();
+            __DSB();
+            __ISB();
 
-				/* Don't allow a tiny value, or values that have somehow
-				underflowed because the post sleep hook did something
-				that took too long. */
-				if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-				{
-					ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-				}
+            /* Disable the SysTick clock without reading the
+             * portNVIC_SYSTICK_CTRL_REG register to ensure the
+             * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
+             * the time the SysTick is stopped for is accounted for as best it can
+             * be, but using the tickless mode will inevitably result in some tiny
+             * drift of the time maintained by the kernel with respect to calendar
+             * time*/
+            portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
 
-				portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+            /* Determine if the SysTick clock has already counted to zero and
+             * been set back to the current reload value (the reload back being
+             * correct for the entire expected idle time) or if the SysTick is yet
+             * to count to zero (in which case an interrupt other than the SysTick
+             * must have brought the system out of sleep mode). */
+            if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+            {
+                uint32_t ulCalculatedLoadValue;
 
-				/* As the pending tick will be processed as soon as this
-				function exits, the tick value maintained by the tick is stepped
-				forward by one less than the time spent waiting. */
-				ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-			}
-			else
-			{
-				/* Something other than the tick interrupt ended the sleep.
-				Work out how long the sleep lasted rounded to complete tick
-				periods (not the ulReload value which accounted for part
-				ticks). */
-				ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+                /* The tick interrupt is already pending, and the SysTick count
+                 * reloaded with ulReloadValue.  Reset the
+                 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+                 * period. */
+                ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
 
-				/* How many complete tick periods passed while the processor
-				was waiting? */
-				ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+                /* Don't allow a tiny value, or values that have somehow
+                 * underflowed because the post sleep hook did something
+                 * that took too long. */
+                if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+                {
+                    ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+                }
 
-				/* The reload value is set to whatever fraction of a single tick
-				period remains. */
-				portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-			}
+                portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
 
-			/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
-			again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
-			value. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-			vTaskStepTick( ulCompleteTickPeriods );
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+                /* As the pending tick will be processed as soon as this
+                 * function exits, the tick value maintained by the tick is stepped
+                 * forward by one less than the time spent waiting. */
+                ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+            }
+            else
+            {
+                /* Something other than the tick interrupt ended the sleep.
+                 * Work out how long the sleep lasted rounded to complete tick
+                 * periods (not the ulReload value which accounted for part
+                 * ticks). */
+                ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Exit with interrupts enabled. */
-			__enable_interrupt();
-		}
-	}
+                /* How many complete tick periods passed while the processor
+                 * was waiting? */
+                ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+                /* The reload value is set to whatever fraction of a single tick
+                 * period remains. */
+                portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+            }
+
+            /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+             * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+             * value. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            vTaskStepTick( ulCompleteTickPeriods );
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Exit with interrupts enabled. */
+            __enable_interrupt();
+        }
+    }
 
 #endif /* configUSE_TICKLESS_IDLE */
 /*-----------------------------------------------------------*/
@@ -518,102 +528,81 @@ void xPortSysTickHandler( void )
  */
 __weak void vPortSetupTimerInterrupt( void )
 {
-	/* Calculate the constants required to configure the tick interrupt. */
-	#if( configUSE_TICKLESS_IDLE == 1 )
-	{
-		ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
-		xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
-	}
-	#endif /* configUSE_TICKLESS_IDLE */
+    /* Calculate the constants required to configure the tick interrupt. */
+    #if ( configUSE_TICKLESS_IDLE == 1 )
+        {
+            ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+            xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+            ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+        }
+    #endif /* configUSE_TICKLESS_IDLE */
 
-	/* Stop and clear the SysTick. */
-	portNVIC_SYSTICK_CTRL_REG = 0UL;
-	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+    /* Stop and clear the SysTick. */
+    portNVIC_SYSTICK_CTRL_REG = 0UL;
+    portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-	/* Configure SysTick to interrupt at the requested rate. */
-	portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
+    /* Configure SysTick to interrupt at the requested rate. */
+    portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+    portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
 }
 /*-----------------------------------------------------------*/
 
-#if( configASSERT_DEFINED == 1 )
+#if ( configASSERT_DEFINED == 1 )
 
-	void vPortValidateInterruptPriority( void )
-	{
-	uint32_t ulCurrentInterrupt;
-	uint8_t ucCurrentPriority;
+    void vPortValidateInterruptPriority( void )
+    {
+        uint32_t ulCurrentInterrupt;
+        uint8_t ucCurrentPriority;
 
-		/* Obtain the number of the currently executing interrupt. */
-		__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+        /* Obtain the number of the currently executing interrupt. */
+        __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
-		/* Is the interrupt number a user defined interrupt? */
-		if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
-		{
-			/* Look up the interrupt's priority. */
-			ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
+        /* Is the interrupt number a user defined interrupt? */
+        if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
+        {
+            /* Look up the interrupt's priority. */
+            ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
 
-			/* The following assertion will fail if a service routine (ISR) for
-			an interrupt that has been assigned a priority above
-			configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
-			function.  ISR safe FreeRTOS API functions must *only* be called
-			from interrupts that have been assigned a priority at or below
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
+            /* The following assertion will fail if a service routine (ISR) for
+             * an interrupt that has been assigned a priority above
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
+             * function.  ISR safe FreeRTOS API functions must *only* be called
+             * from interrupts that have been assigned a priority at or below
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Numerically low interrupt priority numbers represent logically high
+             * interrupt priorities, therefore the priority of the interrupt must
+             * be set to a value equal to or numerically *higher* than
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Interrupts that	use the FreeRTOS API must not be left at their
+             * default priority of	zero as that is the highest possible priority,
+             * which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
+             * and	therefore also guaranteed to be invalid.
+             *
+             * FreeRTOS maintains separate thread and ISR API functions to ensure
+             * interrupt entry is as fast and simple as possible.
+             *
+             * The following links provide detailed information:
+             * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+             * https://www.FreeRTOS.org/FAQHelp.html */
+            configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
+        }
 
-			Numerically low interrupt priority numbers represent logically high
-			interrupt priorities, therefore the priority of the interrupt must
-			be set to a value equal to or numerically *higher* than
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
-
-			Interrupts that	use the FreeRTOS API must not be left at their
-			default priority of	zero as that is the highest possible priority,
-			which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
-			and	therefore also guaranteed to be invalid.
-
-			FreeRTOS maintains separate thread and ISR API functions to ensure
-			interrupt entry is as fast and simple as possible.
-
-			The following links provide detailed information:
-			http://www.freertos.org/RTOS-Cortex-M3-M4.html
-			http://www.freertos.org/FAQHelp.html */
-			configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
-		}
-
-		/* Priority grouping:  The interrupt controller (NVIC) allows the bits
-		that define each interrupt's priority to be split between bits that
-		define the interrupt's pre-emption priority bits and bits that define
-		the interrupt's sub-priority.  For simplicity all bits must be defined
-		to be pre-emption priority bits.  The following assertion will fail if
-		this is not the case (if some bits represent a sub-priority).
-
-		If the application only uses CMSIS libraries for interrupt
-		configuration then the correct setting can be achieved on all Cortex-M
-		devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
-		scheduler.  Note however that some vendor specific peripheral libraries
-		assume a non-zero priority group setting, in which cases using a value
-		of zero will result in unpredictable behaviour. */
-		configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
-	}
+        /* Priority grouping:  The interrupt controller (NVIC) allows the bits
+         * that define each interrupt's priority to be split between bits that
+         * define the interrupt's pre-emption priority bits and bits that define
+         * the interrupt's sub-priority.  For simplicity all bits must be defined
+         * to be pre-emption priority bits.  The following assertion will fail if
+         * this is not the case (if some bits represent a sub-priority).
+         *
+         * If the application only uses CMSIS libraries for interrupt
+         * configuration then the correct setting can be achieved on all Cortex-M
+         * devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
+         * scheduler.  Note however that some vendor specific peripheral libraries
+         * assume a non-zero priority group setting, in which cases using a value
+         * of zero will result in unpredictable behaviour. */
+        configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
+    }
 
 #endif /* configASSERT_DEFINED */
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
diff --git a/portable/IAR/ARM_CM3/portasm.s b/portable/IAR/ARM_CM3/portasm.s
index 2a8aaa094..248afcf59 100644
--- a/portable/IAR/ARM_CM3/portasm.s
+++ b/portable/IAR/ARM_CM3/portasm.s
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/ARM_CM3/portmacro.h b/portable/IAR/ARM_CM3/portmacro.h
index 2aa2e59ad..daae530c8 100644
--- a/portable/IAR/ARM_CM3/portmacro.h
+++ b/portable/IAR/ARM_CM3/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,19 +19,19 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -44,165 +44,164 @@ extern "C" {
  */
 
 /* IAR includes. */
-#include 
+    #include 
 
 /* Type definitions. */
-#define portCHAR		char
-#define portFLOAT		float
-#define portDOUBLE		double
-#define portLONG		long
-#define portSHORT		short
-#define portSTACK_TYPE	uint32_t
-#define portBASE_TYPE	long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE StackType_t;
-typedef long BaseType_t;
-typedef unsigned long UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC 1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Architecture specifics. */
-#define portSTACK_GROWTH			( -1 )
-#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT			8
+    #define portSTACK_GROWTH      ( -1 )
+    #define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT    8
 /*-----------------------------------------------------------*/
 
 /* Compiler directives. */
-#define portWEAK_SYMBOL				__attribute__( ( weak ) )
+    #define portWEAK_SYMBOL    __attribute__( ( weak ) )
 
 /*-----------------------------------------------------------*/
 
 
 /* Scheduler utilities. */
-#define portYIELD()											\
-{															\
-	/* Set a PendSV to request a context switch. */			\
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;			\
-	__DSB();												\
-	__ISB();												\
-}
+    #define portYIELD()                                 \
+    {                                                   \
+        /* Set a PendSV to request a context switch. */ \
+        portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
+        __DSB();                                        \
+        __ISB();                                        \
+    }
 
-#define portNVIC_INT_CTRL_REG		( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT		( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()
-#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired != pdFALSE ) portYIELD()
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 
 /*-----------------------------------------------------------*/
 
 /* Architecture specific optimisations. */
-#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
-	#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
-#endif
+    #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
+        #define configUSE_PORT_OPTIMISED_TASK_SELECTION    1
+    #endif
 
-#if( configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 )
+    #if ( configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 )
 
-	/* Check the configuration. */
-	#if( configMAX_PRIORITIES > 32 )
-		#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
-	#endif
+/* Check the configuration. */
+        #if ( configMAX_PRIORITIES > 32 )
+            #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
+        #endif
 
-	/* Store/clear the ready priorities in a bit map. */
-	#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
-	#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
+/* Store/clear the ready priorities in a bit map. */
+        #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities )    ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
+        #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities )     ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
 
-	/*-----------------------------------------------------------*/
+/*-----------------------------------------------------------*/
 
-	#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( ( uint32_t ) __CLZ( ( uxReadyPriorities ) ) ) )
+        #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities )    uxTopPriority = ( 31UL - ( ( uint32_t ) __CLZ( ( uxReadyPriorities ) ) ) )
 
-#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
+    #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
 /*-----------------------------------------------------------*/
 
 /* Critical section management. */
-extern void vPortEnterCritical( void );
-extern void vPortExitCritical( void );
+    extern void vPortEnterCritical( void );
+    extern void vPortExitCritical( void );
 
-#define portDISABLE_INTERRUPTS()							\
-{															\
-	__set_BASEPRI( configMAX_SYSCALL_INTERRUPT_PRIORITY );	\
-	__DSB();												\
-	__ISB();												\
-}
+    #define portDISABLE_INTERRUPTS()                           \
+    {                                                          \
+        __set_BASEPRI( configMAX_SYSCALL_INTERRUPT_PRIORITY ); \
+        __DSB();                                               \
+        __ISB();                                               \
+    }
 
-#define portENABLE_INTERRUPTS()					__set_BASEPRI( 0 )
-#define portENTER_CRITICAL()					vPortEnterCritical()
-#define portEXIT_CRITICAL()						vPortExitCritical()
-#define portSET_INTERRUPT_MASK_FROM_ISR()		__get_BASEPRI(); portDISABLE_INTERRUPTS()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)	__set_BASEPRI( x )
+    #define portENABLE_INTERRUPTS()                   __set_BASEPRI( 0 )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         __get_BASEPRI(); portDISABLE_INTERRUPTS()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    __set_BASEPRI( x )
 /*-----------------------------------------------------------*/
 
 /* Tickless idle/low power functionality. */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site.  These are
-not necessary for to use this port.  They are defined so the common demo files
-(which build with all the ports) will build. */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+ * not necessary for to use this port.  They are defined so the common demo files
+ * (which build with all the ports) will build. */
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
-#ifdef configASSERT
-	void vPortValidateInterruptPriority( void );
-	#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() 	vPortValidateInterruptPriority()
-#endif
+    #ifdef configASSERT
+        void vPortValidateInterruptPriority( void );
+        #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()    vPortValidateInterruptPriority()
+    #endif
 
 /* portNOP() is not required by this port. */
-#define portNOP()
+    #define portNOP()
 
-#define portINLINE	__inline
+    #define portINLINE              __inline
 
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE inline __attribute__(( always_inline))
-#endif
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE    inline __attribute__( ( always_inline ) )
+    #endif
 
 /*-----------------------------------------------------------*/
 
-portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
-{
-uint32_t ulCurrentInterrupt;
-BaseType_t xReturn;
+    portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
+    {
+        uint32_t ulCurrentInterrupt;
+        BaseType_t xReturn;
 
-	/* Obtain the number of the currently executing interrupt. */
-	__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+        /* Obtain the number of the currently executing interrupt. */
+        __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
-	if( ulCurrentInterrupt == 0 )
-	{
-		xReturn = pdFALSE;
-	}
-	else
-	{
-		xReturn = pdTRUE;
-	}
+        if( ulCurrentInterrupt == 0 )
+        {
+            xReturn = pdFALSE;
+        }
+        else
+        {
+            xReturn = pdTRUE;
+        }
 
-	return xReturn;
-}
+        return xReturn;
+    }
 
 /*-----------------------------------------------------------*/
 
 /* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
-the source code because to do so would cause other compilers to generate
-warnings. */
-#pragma diag_suppress=Pe191
-#pragma diag_suppress=Pa082
+ * the source code because to do so would cause other compilers to generate
+ * warnings. */
+    #pragma diag_suppress=Pe191
+    #pragma diag_suppress=Pa082
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
-
diff --git a/portable/IAR/ARM_CM33/non_secure/port.c b/portable/IAR/ARM_CM33/non_secure/port.c
index ba6bd2602..eef952d55 100644
--- a/portable/IAR/ARM_CM33/non_secure/port.c
+++ b/portable/IAR/ARM_CM33/non_secure/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,10 +19,9 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
@@ -40,10 +39,10 @@
 /* Portasm includes. */
 #include "portasm.h"
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/* Secure components includes. */
-	#include "secure_context.h"
-	#include "secure_init.h"
+#if ( configENABLE_TRUSTZONE == 1 )
+    /* Secure components includes. */
+    #include "secure_context.h"
+    #include "secure_init.h"
 #endif /* configENABLE_TRUSTZONE */
 
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
@@ -63,126 +62,127 @@
  * 3. Run FreeRTOS on the Non-Secure Side only i.e. no Secure Side function call support:
  *		configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 0
  */
-#if( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) )
-	#error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side.
+#if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) )
+    #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side.
 #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to manipulate the NVIC.
  */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portMIN_INTERRUPT_PRIORITY			( 255UL )
-#define portNVIC_PENDSV_PRI					( portMIN_INTERRUPT_PRIORITY << 16UL )
-#define portNVIC_SYSTICK_PRI				( portMIN_INTERRUPT_PRIORITY << 24UL )
+#define portNVIC_SYSTICK_CTRL_REG             ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG             ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG    ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SHPR3_REG                    ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_ENABLE_BIT           ( 1UL << 0UL )
+#define portNVIC_SYSTICK_INT_BIT              ( 1UL << 1UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT       ( 1UL << 16UL )
+#define portMIN_INTERRUPT_PRIORITY            ( 255UL )
+#define portNVIC_PENDSV_PRI                   ( portMIN_INTERRUPT_PRIORITY << 16UL )
+#define portNVIC_SYSTICK_PRI                  ( portMIN_INTERRUPT_PRIORITY << 24UL )
 #ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ			configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT		( 1UL << 2UL )
+    #define configSYSTICK_CLOCK_HZ            configCPU_CLOCK_HZ
+    /* Ensure the SysTick is clocked at the same frequency as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT          ( 1UL << 2UL )
 #else
-	/* The way the SysTick is clocked is not modified in case it is not the
-	 * same a the core. */
-	#define portNVIC_SYSTICK_CLK_BIT		( 0 )
+
+/* The way the SysTick is clocked is not modified in case it is not the
+ * same a the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 0 )
 #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to manipulate the SCB.
  */
-#define portSCB_SYS_HANDLER_CTRL_STATE_REG	( * ( volatile uint32_t * ) 0xe000ed24 )
-#define portSCB_MEM_FAULT_ENABLE_BIT		( 1UL << 16UL )
+#define portSCB_SYS_HANDLER_CTRL_STATE_REG    ( *( volatile uint32_t * ) 0xe000ed24 )
+#define portSCB_MEM_FAULT_ENABLE_BIT          ( 1UL << 16UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to manipulate the FPU.
  */
-#define portCPACR							( ( volatile uint32_t * ) 0xe000ed88 )	/* Coprocessor Access Control Register. */
-#define portCPACR_CP10_VALUE				( 3UL )
-#define portCPACR_CP11_VALUE				portCPACR_CP10_VALUE
-#define portCPACR_CP10_POS					( 20UL )
-#define portCPACR_CP11_POS					( 22UL )
+#define portCPACR               ( ( volatile uint32_t * ) 0xe000ed88 )              /* Coprocessor Access Control Register. */
+#define portCPACR_CP10_VALUE    ( 3UL )
+#define portCPACR_CP11_VALUE    portCPACR_CP10_VALUE
+#define portCPACR_CP10_POS      ( 20UL )
+#define portCPACR_CP11_POS      ( 22UL )
 
-#define portFPCCR							( ( volatile uint32_t * ) 0xe000ef34 )	/* Floating Point Context Control Register. */
-#define portFPCCR_ASPEN_POS					( 31UL )
-#define portFPCCR_ASPEN_MASK				( 1UL << portFPCCR_ASPEN_POS )
-#define portFPCCR_LSPEN_POS					( 30UL )
-#define portFPCCR_LSPEN_MASK				( 1UL << portFPCCR_LSPEN_POS )
+#define portFPCCR               ( ( volatile uint32_t * ) 0xe000ef34 )              /* Floating Point Context Control Register. */
+#define portFPCCR_ASPEN_POS     ( 31UL )
+#define portFPCCR_ASPEN_MASK    ( 1UL << portFPCCR_ASPEN_POS )
+#define portFPCCR_LSPEN_POS     ( 30UL )
+#define portFPCCR_LSPEN_MASK    ( 1UL << portFPCCR_LSPEN_POS )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to manipulate the MPU.
  */
-#define portMPU_TYPE_REG					( * ( ( volatile uint32_t * ) 0xe000ed90 ) )
-#define portMPU_CTRL_REG					( * ( ( volatile uint32_t * ) 0xe000ed94 ) )
-#define portMPU_RNR_REG						( * ( ( volatile uint32_t * ) 0xe000ed98 ) )
+#define portMPU_TYPE_REG                      ( *( ( volatile uint32_t * ) 0xe000ed90 ) )
+#define portMPU_CTRL_REG                      ( *( ( volatile uint32_t * ) 0xe000ed94 ) )
+#define portMPU_RNR_REG                       ( *( ( volatile uint32_t * ) 0xe000ed98 ) )
 
-#define portMPU_RBAR_REG					( * ( ( volatile uint32_t * ) 0xe000ed9c ) )
-#define portMPU_RLAR_REG					( * ( ( volatile uint32_t * ) 0xe000eda0 ) )
+#define portMPU_RBAR_REG                      ( *( ( volatile uint32_t * ) 0xe000ed9c ) )
+#define portMPU_RLAR_REG                      ( *( ( volatile uint32_t * ) 0xe000eda0 ) )
 
-#define portMPU_RBAR_A1_REG					( * ( ( volatile uint32_t * ) 0xe000eda4 ) )
-#define portMPU_RLAR_A1_REG					( * ( ( volatile uint32_t * ) 0xe000eda8 ) )
+#define portMPU_RBAR_A1_REG                   ( *( ( volatile uint32_t * ) 0xe000eda4 ) )
+#define portMPU_RLAR_A1_REG                   ( *( ( volatile uint32_t * ) 0xe000eda8 ) )
 
-#define portMPU_RBAR_A2_REG					( * ( ( volatile uint32_t * ) 0xe000edac ) )
-#define portMPU_RLAR_A2_REG					( * ( ( volatile uint32_t * ) 0xe000edb0 ) )
+#define portMPU_RBAR_A2_REG                   ( *( ( volatile uint32_t * ) 0xe000edac ) )
+#define portMPU_RLAR_A2_REG                   ( *( ( volatile uint32_t * ) 0xe000edb0 ) )
 
-#define portMPU_RBAR_A3_REG					( * ( ( volatile uint32_t * ) 0xe000edb4 ) )
-#define portMPU_RLAR_A3_REG					( * ( ( volatile uint32_t * ) 0xe000edb8 ) )
+#define portMPU_RBAR_A3_REG                   ( *( ( volatile uint32_t * ) 0xe000edb4 ) )
+#define portMPU_RLAR_A3_REG                   ( *( ( volatile uint32_t * ) 0xe000edb8 ) )
 
-#define portMPU_MAIR0_REG					( * ( ( volatile uint32_t * ) 0xe000edc0 ) )
-#define portMPU_MAIR1_REG					( * ( ( volatile uint32_t * ) 0xe000edc4 ) )
+#define portMPU_MAIR0_REG                     ( *( ( volatile uint32_t * ) 0xe000edc0 ) )
+#define portMPU_MAIR1_REG                     ( *( ( volatile uint32_t * ) 0xe000edc4 ) )
 
-#define portMPU_RBAR_ADDRESS_MASK			( 0xffffffe0 ) /* Must be 32-byte aligned. */
-#define portMPU_RLAR_ADDRESS_MASK			( 0xffffffe0 ) /* Must be 32-byte aligned. */
+#define portMPU_RBAR_ADDRESS_MASK             ( 0xffffffe0 ) /* Must be 32-byte aligned. */
+#define portMPU_RLAR_ADDRESS_MASK             ( 0xffffffe0 ) /* Must be 32-byte aligned. */
 
-#define portMPU_MAIR_ATTR0_POS				( 0UL )
-#define portMPU_MAIR_ATTR0_MASK				( 0x000000ff )
+#define portMPU_MAIR_ATTR0_POS                ( 0UL )
+#define portMPU_MAIR_ATTR0_MASK               ( 0x000000ff )
 
-#define portMPU_MAIR_ATTR1_POS				( 8UL )
-#define portMPU_MAIR_ATTR1_MASK				( 0x0000ff00 )
+#define portMPU_MAIR_ATTR1_POS                ( 8UL )
+#define portMPU_MAIR_ATTR1_MASK               ( 0x0000ff00 )
 
-#define portMPU_MAIR_ATTR2_POS				( 16UL )
-#define portMPU_MAIR_ATTR2_MASK				( 0x00ff0000 )
+#define portMPU_MAIR_ATTR2_POS                ( 16UL )
+#define portMPU_MAIR_ATTR2_MASK               ( 0x00ff0000 )
 
-#define portMPU_MAIR_ATTR3_POS				( 24UL )
-#define portMPU_MAIR_ATTR3_MASK				( 0xff000000 )
+#define portMPU_MAIR_ATTR3_POS                ( 24UL )
+#define portMPU_MAIR_ATTR3_MASK               ( 0xff000000 )
 
-#define portMPU_MAIR_ATTR4_POS				( 0UL )
-#define portMPU_MAIR_ATTR4_MASK				( 0x000000ff )
+#define portMPU_MAIR_ATTR4_POS                ( 0UL )
+#define portMPU_MAIR_ATTR4_MASK               ( 0x000000ff )
 
-#define portMPU_MAIR_ATTR5_POS				( 8UL )
-#define portMPU_MAIR_ATTR5_MASK				( 0x0000ff00 )
+#define portMPU_MAIR_ATTR5_POS                ( 8UL )
+#define portMPU_MAIR_ATTR5_MASK               ( 0x0000ff00 )
 
-#define portMPU_MAIR_ATTR6_POS				( 16UL )
-#define portMPU_MAIR_ATTR6_MASK				( 0x00ff0000 )
+#define portMPU_MAIR_ATTR6_POS                ( 16UL )
+#define portMPU_MAIR_ATTR6_MASK               ( 0x00ff0000 )
 
-#define portMPU_MAIR_ATTR7_POS				( 24UL )
-#define portMPU_MAIR_ATTR7_MASK				( 0xff000000 )
+#define portMPU_MAIR_ATTR7_POS                ( 24UL )
+#define portMPU_MAIR_ATTR7_MASK               ( 0xff000000 )
 
-#define portMPU_RLAR_ATTR_INDEX0			( 0UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX1			( 1UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX2			( 2UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX3			( 3UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX4			( 4UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX5			( 5UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX6			( 6UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX7			( 7UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX0              ( 0UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX1              ( 1UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX2              ( 2UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX3              ( 3UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX4              ( 4UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX5              ( 5UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX6              ( 6UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX7              ( 7UL << 1UL )
 
-#define portMPU_RLAR_REGION_ENABLE			( 1UL )
+#define portMPU_RLAR_REGION_ENABLE            ( 1UL )
 
 /* Enable privileged access to unmapped region. */
-#define portMPU_PRIV_BACKGROUND_ENABLE_BIT	( 1UL << 2UL )
+#define portMPU_PRIV_BACKGROUND_ENABLE_BIT    ( 1UL << 2UL )
 
 /* Enable MPU. */
-#define portMPU_ENABLE_BIT					( 1UL << 0UL )
+#define portMPU_ENABLE_BIT                    ( 1UL << 0UL )
 
 /* Expected value of the portMPU_TYPE register. */
-#define portEXPECTED_MPU_TYPE_VALUE			( 8UL << 8UL ) /* 8 regions, unified. */
+#define portEXPECTED_MPU_TYPE_VALUE           ( 8UL << 8UL ) /* 8 regions, unified. */
 /*-----------------------------------------------------------*/
 
 /**
@@ -190,53 +190,55 @@
  *
  * It is needed because the systick is a 24-bit counter.
  */
-#define portMAX_24_BIT_NUMBER				( 0xffffffUL )
+#define portMAX_24_BIT_NUMBER       ( 0xffffffUL )
 
 /**
  * @brief A fiddle factor to estimate the number of SysTick counts that would
  * have occurred while the SysTick counter is stopped during tickless idle
  * calculations.
  */
-#define portMISSED_COUNTS_FACTOR			( 45UL )
+#define portMISSED_COUNTS_FACTOR    ( 45UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to set up the initial stack.
  */
-#define portINITIAL_XPSR					( 0x01000000 )
+#define portINITIAL_XPSR    ( 0x01000000 )
 
-#if( configRUN_FREERTOS_SECURE_ONLY == 1 )
-	/**
-	 * @brief Initial EXC_RETURN value.
-	 *
-	 *     FF         FF         FF         FD
-	 * 1111 1111  1111 1111  1111 1111  1111 1101
-	 *
-	 * Bit[6] - 1 --> The exception was taken from the Secure state.
-	 * Bit[5] - 1 --> Do not skip stacking of additional state context.
-	 * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
-	 * Bit[3] - 1 --> Return to the Thread mode.
-	 * Bit[2] - 1 --> Restore registers from the process stack.
-	 * Bit[1] - 0 --> Reserved, 0.
-	 * Bit[0] - 1 --> The exception was taken to the Secure state.
-	 */
-	#define portINITIAL_EXC_RETURN			( 0xfffffffd )
+#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
+
+/**
+ * @brief Initial EXC_RETURN value.
+ *
+ *     FF         FF         FF         FD
+ * 1111 1111  1111 1111  1111 1111  1111 1101
+ *
+ * Bit[6] - 1 --> The exception was taken from the Secure state.
+ * Bit[5] - 1 --> Do not skip stacking of additional state context.
+ * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
+ * Bit[3] - 1 --> Return to the Thread mode.
+ * Bit[2] - 1 --> Restore registers from the process stack.
+ * Bit[1] - 0 --> Reserved, 0.
+ * Bit[0] - 1 --> The exception was taken to the Secure state.
+ */
+    #define portINITIAL_EXC_RETURN    ( 0xfffffffd )
 #else
-	/**
-	 * @brief Initial EXC_RETURN value.
-	 *
-	 *     FF         FF         FF         BC
-	 * 1111 1111  1111 1111  1111 1111  1011 1100
-	 *
-	 * Bit[6] - 0 --> The exception was taken from the Non-Secure state.
-	 * Bit[5] - 1 --> Do not skip stacking of additional state context.
-	 * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
-	 * Bit[3] - 1 --> Return to the Thread mode.
-	 * Bit[2] - 1 --> Restore registers from the process stack.
-	 * Bit[1] - 0 --> Reserved, 0.
-	 * Bit[0] - 0 --> The exception was taken to the Non-Secure state.
-	 */
-	#define portINITIAL_EXC_RETURN			( 0xffffffbc )
+
+/**
+ * @brief Initial EXC_RETURN value.
+ *
+ *     FF         FF         FF         BC
+ * 1111 1111  1111 1111  1111 1111  1011 1100
+ *
+ * Bit[6] - 0 --> The exception was taken from the Non-Secure state.
+ * Bit[5] - 1 --> Do not skip stacking of additional state context.
+ * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
+ * Bit[3] - 1 --> Return to the Thread mode.
+ * Bit[2] - 1 --> Restore registers from the process stack.
+ * Bit[1] - 0 --> Reserved, 0.
+ * Bit[0] - 0 --> The exception was taken to the Non-Secure state.
+ */
+    #define portINITIAL_EXC_RETURN    ( 0xffffffbc )
 #endif /* configRUN_FREERTOS_SECURE_ONLY */
 
 /**
@@ -246,13 +248,13 @@
  *  Bit[0] = 0 ==> The task is privileged.
  *  Bit[0] = 1 ==> The task is not privileged.
  */
-#define portCONTROL_PRIVILEGED_MASK			( 1UL << 0UL )
+#define portCONTROL_PRIVILEGED_MASK         ( 1UL << 0UL )
 
 /**
  * @brief Initial CONTROL register values.
  */
-#define portINITIAL_CONTROL_UNPRIVILEGED	( 0x3 )
-#define portINITIAL_CONTROL_PRIVILEGED		( 0x2 )
+#define portINITIAL_CONTROL_UNPRIVILEGED    ( 0x3 )
+#define portINITIAL_CONTROL_PRIVILEGED      ( 0x2 )
 
 /**
  * @brief Let the user override the pre-loading of the initial LR with the
@@ -260,23 +262,23 @@
  * in the debugger.
  */
 #ifdef configTASK_RETURN_ADDRESS
-	#define portTASK_RETURN_ADDRESS			configTASK_RETURN_ADDRESS
+    #define portTASK_RETURN_ADDRESS    configTASK_RETURN_ADDRESS
 #else
-	#define portTASK_RETURN_ADDRESS			prvTaskExitError
+    #define portTASK_RETURN_ADDRESS    prvTaskExitError
 #endif
 
 /**
  * @brief If portPRELOAD_REGISTERS then registers will be given an initial value
  * when a task is created. This helps in debugging at the cost of code size.
  */
-#define portPRELOAD_REGISTERS				1
+#define portPRELOAD_REGISTERS    1
 
 /**
  * @brief A task is created without a secure context, and must call
  * portALLOCATE_SECURE_CONTEXT() to give itself a secure context before it makes
  * any secure calls.
  */
-#define portNO_SECURE_CONTEXT				0
+#define portNO_SECURE_CONTEXT    0
 /*-----------------------------------------------------------*/
 
 /**
@@ -285,18 +287,20 @@
  */
 static void prvTaskExitError( void );
 
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Setup the Memory Protection Unit (MPU).
-	 */
-	static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
+#if ( configENABLE_MPU == 1 )
+
+/**
+ * @brief Setup the Memory Protection Unit (MPU).
+ */
+    static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
 #endif /* configENABLE_MPU */
 
-#if( configENABLE_FPU == 1 )
-	/**
-	 * @brief Setup the Floating Point Unit (FPU).
-	 */
-	static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;
+#if ( configENABLE_FPU == 1 )
+
+/**
+ * @brief Setup the Floating Point Unit (FPU).
+ */
+    static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;
 #endif /* configENABLE_FPU */
 
 /**
@@ -338,812 +342,852 @@ void SysTick_Handler( void ) PRIVILEGED_FUNCTION;
 /**
  * @brief C part of SVC handler.
  */
-portDONT_DISCARD void vPortSVCHandler_C( uint32_t *pulCallerStackAddress ) PRIVILEGED_FUNCTION;
+portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIVILEGED_FUNCTION;
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Each task maintains its own interrupt status in the critical nesting
  * variable.
  */
-static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
+PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Saved as part of the task context to indicate which context the
-	 * task is using on the secure side.
-	 */
-	portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
+#if ( configENABLE_TRUSTZONE == 1 )
+
+/**
+ * @brief Saved as part of the task context to indicate which context the
+ * task is using on the secure side.
+ */
+    PRIVILEGED_DATA portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
 #endif /* configENABLE_TRUSTZONE */
 
-#if( configUSE_TICKLESS_IDLE == 1 )
-	/**
-	 * @brief The number of SysTick increments that make up one tick period.
-	 */
-	static uint32_t ulTimerCountsForOneTick = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
 
-	/**
-	 * @brief The maximum number of tick periods that can be suppressed is
-	 * limited by the 24 bit resolution of the SysTick timer.
-	 */
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
+/**
+ * @brief The number of SysTick increments that make up one tick period.
+ */
+    PRIVILEGED_DATA static uint32_t ulTimerCountsForOneTick = 0;
 
-	/**
-	 * @brief Compensate for the CPU cycles that pass while the SysTick is
-	 * stopped (low power functionality only).
-	 */
-	static uint32_t ulStoppedTimerCompensation = 0;
+/**
+ * @brief The maximum number of tick periods that can be suppressed is
+ * limited by the 24 bit resolution of the SysTick timer.
+ */
+    PRIVILEGED_DATA static uint32_t xMaximumPossibleSuppressedTicks = 0;
+
+/**
+ * @brief Compensate for the CPU cycles that pass while the SysTick is
+ * stopped (low power functionality only).
+ */
+    PRIVILEGED_DATA static uint32_t ulStoppedTimerCompensation = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TICKLESS_IDLE == 1 )
-	__attribute__(( weak )) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-	{
-	uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
-	TickType_t xModifiableIdleTime;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+    {
+        uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+        TickType_t xModifiableIdleTime;
 
-		/* Make sure the SysTick reload value does not overflow the counter. */
-		if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-		{
-			xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-		}
+        /* Make sure the SysTick reload value does not overflow the counter. */
+        if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+        {
+            xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+        }
 
-		/* Stop the SysTick momentarily. The time the SysTick is stopped for is
-		 * accounted for as best it can be, but using the tickless mode will
-		 * inevitably result in some tiny drift of the time maintained by the
-		 * kernel with respect to calendar time. */
-		portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+        /* Stop the SysTick momentarily. The time the SysTick is stopped for is
+         * accounted for as best it can be, but using the tickless mode will
+         * inevitably result in some tiny drift of the time maintained by the
+         * kernel with respect to calendar time. */
+        portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
 
-		/* Calculate the reload value required to wait xExpectedIdleTime
-		 * tick periods. -1 is used because this code will execute part way
-		 * through one of the tick periods. */
-		ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-		if( ulReloadValue > ulStoppedTimerCompensation )
-		{
-			ulReloadValue -= ulStoppedTimerCompensation;
-		}
+        /* Calculate the reload value required to wait xExpectedIdleTime
+         * tick periods. -1 is used because this code will execute part way
+         * through one of the tick periods. */
+        ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
 
-		/* Enter a critical section but don't use the taskENTER_CRITICAL()
-		 * method as that will mask interrupts that should exit sleep mode. */
-		__asm volatile( "cpsid i" ::: "memory" );
-		__asm volatile( "dsb" );
-		__asm volatile( "isb" );
+        if( ulReloadValue > ulStoppedTimerCompensation )
+        {
+            ulReloadValue -= ulStoppedTimerCompensation;
+        }
 
-		/* If a context switch is pending or a task is waiting for the scheduler
-		 * to be un-suspended then abandon the low power entry. */
-		if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-		{
-			/* Restart from whatever is left in the count register to complete
-			 * this tick period. */
-			portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+        /* Enter a critical section but don't use the taskENTER_CRITICAL()
+         * method as that will mask interrupts that should exit sleep mode. */
+        __asm volatile ( "cpsid i" ::: "memory" );
+        __asm volatile ( "dsb" );
+        __asm volatile ( "isb" );
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+        /* If a context switch is pending or a task is waiting for the scheduler
+         * to be un-suspended then abandon the low power entry. */
+        if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+        {
+            /* Restart from whatever is left in the count register to complete
+             * this tick period. */
+            portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Reset the reload register to the value required for normal tick
-			 * periods. */
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts - see comments above the cpsid instruction()
-			 * above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-		else
-		{
-			/* Set the new reload value. */
-			portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+            /* Reset the reload register to the value required for normal tick
+             * periods. */
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
 
-			/* Clear the SysTick count flag and set the count value back to
-			 * zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            /* Re-enable interrupts - see comments above the cpsid instruction()
+             * above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+        else
+        {
+            /* Set the new reload value. */
+            portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            /* Clear the SysTick count flag and set the count value back to
+             * zero. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-			/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
-			 * set its parameter to 0 to indicate that its implementation
-			 * contains its own wait for interrupt or wait for event
-			 * instruction, and so wfi should not be executed again. However,
-			 * the original expected idle time variable must remain unmodified,
-			 * so a copy is taken. */
-			xModifiableIdleTime = xExpectedIdleTime;
-			configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-			if( xModifiableIdleTime > 0 )
-			{
-				__asm volatile( "dsb" ::: "memory" );
-				__asm volatile( "wfi" );
-				__asm volatile( "isb" );
-			}
-			configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts to allow the interrupt that brought the MCU
-			 * out of sleep mode to execute immediately. See comments above
-			 * the cpsid instruction above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
+            /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
+             * set its parameter to 0 to indicate that its implementation
+             * contains its own wait for interrupt or wait for event
+             * instruction, and so wfi should not be executed again. However,
+             * the original expected idle time variable must remain unmodified,
+             * so a copy is taken. */
+            xModifiableIdleTime = xExpectedIdleTime;
+            configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
 
-			/* Disable interrupts again because the clock is about to be stopped
-			 * and interrupts that execute while the clock is stopped will
-			 * increase any slippage between the time maintained by the RTOS and
-			 * calendar time. */
-			__asm volatile( "cpsid i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
+            if( xModifiableIdleTime > 0 )
+            {
+                __asm volatile ( "dsb" ::: "memory" );
+                __asm volatile ( "wfi" );
+                __asm volatile ( "isb" );
+            }
 
-			/* Disable the SysTick clock without reading the
-			 * portNVIC_SYSTICK_CTRL_REG register to ensure the
-			 * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
-			 * Again, the time the SysTick is stopped for is accounted for as
-			 * best it can be, but using the tickless mode will inevitably
-			 * result in some tiny drift of the time maintained by the kernel
-			 * with respect to calendar time*/
-			portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+            configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
 
-			/* Determine if the SysTick clock has already counted to zero and
-			 * been set back to the current reload value (the reload back being
-			 * correct for the entire expected idle time) or if the SysTick is
-			 * yet to count to zero (in which case an interrupt other than the
-			 * SysTick must have brought the system out of sleep mode). */
-			if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-			{
-				uint32_t ulCalculatedLoadValue;
+            /* Re-enable interrupts to allow the interrupt that brought the MCU
+             * out of sleep mode to execute immediately. See comments above
+             * the cpsid instruction above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
 
-				/* The tick interrupt is already pending, and the SysTick count
-				 * reloaded with ulReloadValue.  Reset the
-				 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
-				 * period. */
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+            /* Disable interrupts again because the clock is about to be stopped
+             * and interrupts that execute while the clock is stopped will
+             * increase any slippage between the time maintained by the RTOS and
+             * calendar time. */
+            __asm volatile ( "cpsid i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
 
-				/* Don't allow a tiny value, or values that have somehow
-				 * underflowed because the post sleep hook did something
-				 * that took too long. */
-				if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-				{
-					ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-				}
+            /* Disable the SysTick clock without reading the
+             * portNVIC_SYSTICK_CTRL_REG register to ensure the
+             * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
+             * Again, the time the SysTick is stopped for is accounted for as
+             * best it can be, but using the tickless mode will inevitably
+             * result in some tiny drift of the time maintained by the kernel
+             * with respect to calendar time*/
+            portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
 
-				portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+            /* Determine if the SysTick clock has already counted to zero and
+             * been set back to the current reload value (the reload back being
+             * correct for the entire expected idle time) or if the SysTick is
+             * yet to count to zero (in which case an interrupt other than the
+             * SysTick must have brought the system out of sleep mode). */
+            if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+            {
+                uint32_t ulCalculatedLoadValue;
 
-				/* As the pending tick will be processed as soon as this
-				 * function exits, the tick value maintained by the tick is
-				 * stepped forward by one less than the time spent waiting. */
-				ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-			}
-			else
-			{
-				/* Something other than the tick interrupt ended the sleep.
-				 * Work out how long the sleep lasted rounded to complete tick
-				 * periods (not the ulReload value which accounted for part
-				 * ticks). */
-				ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+                /* The tick interrupt is already pending, and the SysTick count
+                 * reloaded with ulReloadValue.  Reset the
+                 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+                 * period. */
+                ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
 
-				/* How many complete tick periods passed while the processor
-				 * was waiting? */
-				ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+                /* Don't allow a tiny value, or values that have somehow
+                 * underflowed because the post sleep hook did something
+                 * that took too long. */
+                if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+                {
+                    ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+                }
 
-				/* The reload value is set to whatever fraction of a single tick
-				 * period remains. */
-				portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-			}
+                portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
 
-			/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
-			 * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
-			 * value. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-			vTaskStepTick( ulCompleteTickPeriods );
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+                /* As the pending tick will be processed as soon as this
+                 * function exits, the tick value maintained by the tick is
+                 * stepped forward by one less than the time spent waiting. */
+                ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+            }
+            else
+            {
+                /* Something other than the tick interrupt ended the sleep.
+                 * Work out how long the sleep lasted rounded to complete tick
+                 * periods (not the ulReload value which accounted for part
+                 * ticks). */
+                ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Exit with interrupts enabled. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-	}
+                /* How many complete tick periods passed while the processor
+                 * was waiting? */
+                ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+                /* The reload value is set to whatever fraction of a single tick
+                 * period remains. */
+                portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+            }
+
+            /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+             * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+             * value. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            vTaskStepTick( ulCompleteTickPeriods );
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Exit with interrupts enabled. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+    }
 #endif /* configUSE_TICKLESS_IDLE */
 /*-----------------------------------------------------------*/
 
-__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
+__attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
 {
-	/* Calculate the constants required to configure the tick interrupt. */
-	#if( configUSE_TICKLESS_IDLE == 1 )
-	{
-		ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
-		xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
-	}
-	#endif /* configUSE_TICKLESS_IDLE */
+    /* Calculate the constants required to configure the tick interrupt. */
+    #if ( configUSE_TICKLESS_IDLE == 1 )
+        {
+            ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+            xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+            ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+        }
+    #endif /* configUSE_TICKLESS_IDLE */
 
-	/* Stop and reset the SysTick. */
-	portNVIC_SYSTICK_CTRL_REG = 0UL;
-	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+    /* Stop and reset the SysTick. */
+    portNVIC_SYSTICK_CTRL_REG = 0UL;
+    portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-	/* Configure SysTick to interrupt at the requested rate. */
-	portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
+    /* Configure SysTick to interrupt at the requested rate. */
+    portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+    portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
 }
 /*-----------------------------------------------------------*/
 
 static void prvTaskExitError( void )
 {
-volatile uint32_t ulDummy = 0UL;
+    volatile uint32_t ulDummy = 0UL;
 
-	/* A function that implements a task must not exit or attempt to return to
-	 * its caller as there is nothing to return to. If a task wants to exit it
-	 * should instead call vTaskDelete( NULL ). Artificially force an assert()
-	 * to be triggered if configASSERT() is defined, then stop here so
-	 * application writers can catch the error. */
-	configASSERT( ulCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to. If a task wants to exit it
+     * should instead call vTaskDelete( NULL ). Artificially force an assert()
+     * to be triggered if configASSERT() is defined, then stop here so
+     * application writers can catch the error. */
+    configASSERT( ulCriticalNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
 
-	while( ulDummy == 0 )
-	{
-		/* This file calls prvTaskExitError() after the scheduler has been
-		 * started to remove a compiler warning about the function being
-		 * defined but never called.  ulDummy is used purely to quieten other
-		 * warnings about code appearing after this function is called - making
-		 * ulDummy volatile makes the compiler think the function could return
-		 * and therefore not output an 'unreachable code' warning for code that
-		 * appears after it. */
-	}
+    while( ulDummy == 0 )
+    {
+        /* This file calls prvTaskExitError() after the scheduler has been
+         * started to remove a compiler warning about the function being
+         * defined but never called.  ulDummy is used purely to quieten other
+         * warnings about code appearing after this function is called - making
+         * ulDummy volatile makes the compiler think the function could return
+         * and therefore not output an 'unreachable code' warning for code that
+         * appears after it. */
+    }
 }
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
-	{
-	#if defined( __ARMCC_VERSION )
-		/* Declaration when these variable are defined in code instead of being
-		 * exported from linker scripts. */
-		extern uint32_t * __privileged_functions_start__;
-		extern uint32_t * __privileged_functions_end__;
-		extern uint32_t * __syscalls_flash_start__;
-		extern uint32_t * __syscalls_flash_end__;
-		extern uint32_t * __unprivileged_flash_start__;
-		extern uint32_t * __unprivileged_flash_end__;
-		extern uint32_t * __privileged_sram_start__;
-		extern uint32_t * __privileged_sram_end__;
-	#else
-		/* Declaration when these variable are exported from linker scripts. */
-		extern uint32_t __privileged_functions_start__[];
-		extern uint32_t __privileged_functions_end__[];
-		extern uint32_t __syscalls_flash_start__[];
-		extern uint32_t __syscalls_flash_end__[];
-		extern uint32_t __unprivileged_flash_start__[];
-		extern uint32_t __unprivileged_flash_end__[];
-		extern uint32_t __privileged_sram_start__[];
-		extern uint32_t __privileged_sram_end__[];
-	#endif /* defined( __ARMCC_VERSION ) */
+#if ( configENABLE_MPU == 1 )
+    static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
+    {
+        #if defined( __ARMCC_VERSION )
 
-		/* Check that the MPU is present. */
-		if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
-		{
-			/* MAIR0 - Index 0. */
-			portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
-			/* MAIR0 - Index 1. */
-			portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __privileged_functions_start__;
+            extern uint32_t * __privileged_functions_end__;
+            extern uint32_t * __syscalls_flash_start__;
+            extern uint32_t * __syscalls_flash_end__;
+            extern uint32_t * __unprivileged_flash_start__;
+            extern uint32_t * __unprivileged_flash_end__;
+            extern uint32_t * __privileged_sram_start__;
+            extern uint32_t * __privileged_sram_end__;
+        #else /* if defined( __ARMCC_VERSION ) */
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __privileged_functions_start__[];
+            extern uint32_t __privileged_functions_end__[];
+            extern uint32_t __syscalls_flash_start__[];
+            extern uint32_t __syscalls_flash_end__[];
+            extern uint32_t __unprivileged_flash_start__[];
+            extern uint32_t __unprivileged_flash_end__[];
+            extern uint32_t __privileged_sram_start__[];
+            extern uint32_t __privileged_sram_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
 
-			/* Setup privileged flash as Read Only so that privileged tasks can
-			 * read it but not modify. */
-			portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_PRIVILEGED_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
+        /* Check that the MPU is present. */
+        if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
+        {
+            /* MAIR0 - Index 0. */
+            portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
+            /* MAIR0 - Index 1. */
+            portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
 
-			/* Setup unprivileged flash as Read Only by both privileged and
-			 * unprivileged tasks. All tasks can read it but no-one can modify. */
-			portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
+            /* Setup privileged flash as Read Only so that privileged tasks can
+             * read it but not modify. */
+            portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_PRIVILEGED_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
 
-			/* Setup unprivileged syscalls flash as Read Only by both privileged
-			 * and unprivileged tasks. All tasks can read it but no-one can modify. */
-			portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
+            /* Setup unprivileged flash as Read Only by both privileged and
+             * unprivileged tasks. All tasks can read it but no-one can modify. */
+            portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
 
-			/* Setup RAM containing kernel data for privileged access only. */
-			portMPU_RNR_REG = portPRIVILEGED_RAM_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
-								( portMPU_REGION_EXECUTE_NEVER );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
+            /* Setup unprivileged syscalls flash as Read Only by both privileged
+             * and unprivileged tasks. All tasks can read it but no-one can modify. */
+            portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
 
-			/* Enable mem fault. */
-			portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
+            /* Setup RAM containing kernel data for privileged access only. */
+            portMPU_RNR_REG = portPRIVILEGED_RAM_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
+                               ( portMPU_REGION_EXECUTE_NEVER );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
 
-			/* Enable MPU with privileged background access i.e. unmapped
-			 * regions have privileged access. */
-			portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
-		}
-	}
+            /* Enable mem fault. */
+            portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
+
+            /* Enable MPU with privileged background access i.e. unmapped
+             * regions have privileged access. */
+            portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
+        }
+    }
 #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_FPU == 1 )
-	static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
-	{
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			/* Enable non-secure access to the FPU. */
-			SecureInit_EnableNSFPUAccess();
-		}
-		#endif /* configENABLE_TRUSTZONE */
+#if ( configENABLE_FPU == 1 )
+    static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
+    {
+        #if ( configENABLE_TRUSTZONE == 1 )
+            {
+                /* Enable non-secure access to the FPU. */
+                SecureInit_EnableNSFPUAccess();
+            }
+        #endif /* configENABLE_TRUSTZONE */
 
-		/* CP10 = 11 ==> Full access to FPU i.e. both privileged and
-		 * unprivileged code should be able to access FPU. CP11 should be
-		 * programmed to the same value as CP10. */
-		*( portCPACR ) |=	(	( portCPACR_CP10_VALUE << portCPACR_CP10_POS ) |
-								( portCPACR_CP11_VALUE << portCPACR_CP11_POS )
-							);
+        /* CP10 = 11 ==> Full access to FPU i.e. both privileged and
+         * unprivileged code should be able to access FPU. CP11 should be
+         * programmed to the same value as CP10. */
+        *( portCPACR ) |= ( ( portCPACR_CP10_VALUE << portCPACR_CP10_POS ) |
+                            ( portCPACR_CP11_VALUE << portCPACR_CP11_POS )
+                            );
 
-		/* ASPEN = 1 ==> Hardware should automatically preserve floating point
-		 * context on exception entry and restore on exception return.
-		 * LSPEN = 1 ==> Enable lazy context save of FP state. */
-		*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
-	}
+        /* ASPEN = 1 ==> Hardware should automatically preserve floating point
+         * context on exception entry and restore on exception return.
+         * LSPEN = 1 ==> Enable lazy context save of FP state. */
+        *( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
+    }
 #endif /* configENABLE_FPU */
 /*-----------------------------------------------------------*/
 
 void vPortYield( void ) /* PRIVILEGED_FUNCTION */
 {
-	/* Set a PendSV to request a context switch. */
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+    /* Set a PendSV to request a context switch. */
+    portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
 
-	/* Barriers are normally not required but do ensure the code is
-	 * completely within the specified behaviour for the architecture. */
-	__asm volatile( "dsb" ::: "memory" );
-	__asm volatile( "isb" );
+    /* Barriers are normally not required but do ensure the code is
+     * completely within the specified behaviour for the architecture. */
+    __asm volatile ( "dsb" ::: "memory" );
+    __asm volatile ( "isb" );
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */
 {
-	portDISABLE_INTERRUPTS();
-	ulCriticalNesting++;
+    portDISABLE_INTERRUPTS();
+    ulCriticalNesting++;
 
-	/* Barriers are normally not required but do ensure the code is
-	 * completely within the specified behaviour for the architecture. */
-	__asm volatile( "dsb" ::: "memory" );
-	__asm volatile( "isb" );
+    /* Barriers are normally not required but do ensure the code is
+     * completely within the specified behaviour for the architecture. */
+    __asm volatile ( "dsb" ::: "memory" );
+    __asm volatile ( "isb" );
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */
 {
-	configASSERT( ulCriticalNesting );
-	ulCriticalNesting--;
+    configASSERT( ulCriticalNesting );
+    ulCriticalNesting--;
 
-	if( ulCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
+    if( ulCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
 }
 /*-----------------------------------------------------------*/
 
 void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
 {
-uint32_t ulPreviousMask;
+    uint32_t ulPreviousMask;
 
-	ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* Pend a context switch. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
+    ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* Pend a context switch. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
 }
 /*-----------------------------------------------------------*/
 
-void vPortSVCHandler_C( uint32_t *pulCallerStackAddress ) /* PRIVILEGED_FUNCTION portDONT_DISCARD */
+void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTION portDONT_DISCARD */
 {
-#if( configENABLE_MPU == 1 )
-	#if defined( __ARMCC_VERSION )
-		/* Declaration when these variable are defined in code instead of being
-		 * exported from linker scripts. */
-		extern uint32_t * __syscalls_flash_start__;
-		extern uint32_t * __syscalls_flash_end__;
-	#else
-		/* Declaration when these variable are exported from linker scripts. */
-		extern uint32_t __syscalls_flash_start__[];
-		extern uint32_t __syscalls_flash_end__[];
-	#endif /* defined( __ARMCC_VERSION ) */
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        #if defined( __ARMCC_VERSION )
 
-uint32_t ulPC;
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __syscalls_flash_start__;
+            extern uint32_t * __syscalls_flash_end__;
+        #else
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __syscalls_flash_start__[];
+            extern uint32_t __syscalls_flash_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
+    #endif /* configENABLE_MPU */
 
-#if( configENABLE_TRUSTZONE == 1 )
-	uint32_t ulR0;
-	#if( configENABLE_MPU == 1 )
-		uint32_t ulControl, ulIsTaskPrivileged;
-	#endif /* configENABLE_MPU */
-#endif /* configENABLE_TRUSTZONE */
-uint8_t ucSVCNumber;
+    uint32_t ulPC;
 
-	/* Register are stored on the stack in the following order - R0, R1, R2, R3,
-	 * R12, LR, PC, xPSR. */
-	ulPC = pulCallerStackAddress[ 6 ];
-	ucSVCNumber = ( ( uint8_t *) ulPC )[ -2 ];
+    #if ( configENABLE_TRUSTZONE == 1 )
+        uint32_t ulR0;
+        #if ( configENABLE_MPU == 1 )
+            uint32_t ulControl, ulIsTaskPrivileged;
+        #endif /* configENABLE_MPU */
+    #endif /* configENABLE_TRUSTZONE */
+    uint8_t ucSVCNumber;
 
-	switch( ucSVCNumber )
-	{
-		#if( configENABLE_TRUSTZONE == 1 )
-			case portSVC_ALLOCATE_SECURE_CONTEXT:
-			{
-				/* R0 contains the stack size passed as parameter to the
-				 * vPortAllocateSecureContext function. */
-				ulR0 = pulCallerStackAddress[ 0 ];
+    /* Register are stored on the stack in the following order - R0, R1, R2, R3,
+     * R12, LR, PC, xPSR. */
+    ulPC = pulCallerStackAddress[ 6 ];
+    ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ];
 
-				#if( configENABLE_MPU == 1 )
-				{
-					/* Read the CONTROL register value. */
-					__asm volatile ( "mrs %0, control"  : "=r" ( ulControl ) );
+    switch( ucSVCNumber )
+    {
+        #if ( configENABLE_TRUSTZONE == 1 )
+            case portSVC_ALLOCATE_SECURE_CONTEXT:
 
-					/* The task that raised the SVC is privileged if Bit[0]
-					 * in the CONTROL register is 0. */
-					ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 );
+                /* R0 contains the stack size passed as parameter to the
+                 * vPortAllocateSecureContext function. */
+                ulR0 = pulCallerStackAddress[ 0 ];
 
-					/* Allocate and load a context for the secure task. */
-					xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged );
-				}
-				#else
-				{
-					/* Allocate and load a context for the secure task. */
-					xSecureContext = SecureContext_AllocateContext( ulR0 );
-				}
-				#endif /* configENABLE_MPU */
+                #if ( configENABLE_MPU == 1 )
+                    {
+                        /* Read the CONTROL register value. */
+                        __asm volatile ( "mrs %0, control"  : "=r" ( ulControl ) );
 
-				configASSERT( xSecureContext != NULL );
-				SecureContext_LoadContext( xSecureContext );
-			}
-			break;
+                        /* The task that raised the SVC is privileged if Bit[0]
+                         * in the CONTROL register is 0. */
+                        ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 );
 
-			case portSVC_FREE_SECURE_CONTEXT:
-			{
-				/* R0 contains the secure context handle to be freed. */
-				ulR0 = pulCallerStackAddress[ 0 ];
+                        /* Allocate and load a context for the secure task. */
+                        xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged );
+                    }
+                #else /* if ( configENABLE_MPU == 1 ) */
+                    {
+                        /* Allocate and load a context for the secure task. */
+                        xSecureContext = SecureContext_AllocateContext( ulR0 );
+                    }
+                #endif /* configENABLE_MPU */
 
-				/* Free the secure context. */
-				SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 );
-			}
-			break;
-		#endif /* configENABLE_TRUSTZONE */
+                configASSERT( xSecureContext != NULL );
+                SecureContext_LoadContext( xSecureContext );
+                break;
 
-		case portSVC_START_SCHEDULER:
-		{
-			#if( configENABLE_TRUSTZONE == 1 )
-			{
-				/* De-prioritize the non-secure exceptions so that the
-				 * non-secure pendSV runs at the lowest priority. */
-				SecureInit_DePrioritizeNSExceptions();
+            case portSVC_FREE_SECURE_CONTEXT:
+                /* R0 contains the secure context handle to be freed. */
+                ulR0 = pulCallerStackAddress[ 0 ];
 
-				/* Initialize the secure context management system. */
-				SecureContext_Init();
-			}
-			#endif /* configENABLE_TRUSTZONE */
+                /* Free the secure context. */
+                SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 );
+                break;
+        #endif /* configENABLE_TRUSTZONE */
 
-			#if( configENABLE_FPU == 1 )
-			{
-				/* Setup the Floating Point Unit (FPU). */
-				prvSetupFPU();
-			}
-			#endif /* configENABLE_FPU */
+        case portSVC_START_SCHEDULER:
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    /* De-prioritize the non-secure exceptions so that the
+                     * non-secure pendSV runs at the lowest priority. */
+                    SecureInit_DePrioritizeNSExceptions();
 
-			/* Setup the context of the first task so that the first task starts
-			 * executing. */
-			vRestoreContextOfFirstTask();
-		}
-		break;
+                    /* Initialize the secure context management system. */
+                    SecureContext_Init();
+                }
+            #endif /* configENABLE_TRUSTZONE */
 
-		#if( configENABLE_MPU == 1 )
-			case portSVC_RAISE_PRIVILEGE:
-			{
-				/* Only raise the privilege, if the svc was raised from any of
-				 * the system calls. */
-				if( ulPC >= ( uint32_t ) __syscalls_flash_start__ &&
-					ulPC <= ( uint32_t ) __syscalls_flash_end__ )
-				{
-					vRaisePrivilege();
-				}
-			}
-			break;
-		#endif /* configENABLE_MPU */
+            #if ( configENABLE_FPU == 1 )
+                {
+                    /* Setup the Floating Point Unit (FPU). */
+                    prvSetupFPU();
+                }
+            #endif /* configENABLE_FPU */
 
-		default:
-		{
-			/* Incorrect SVC call. */
-			configASSERT( pdFALSE );
-		}
-	}
+            /* Setup the context of the first task so that the first task starts
+             * executing. */
+            vRestoreContextOfFirstTask();
+            break;
+
+            #if ( configENABLE_MPU == 1 )
+                case portSVC_RAISE_PRIVILEGE:
+
+                    /* Only raise the privilege, if the svc was raised from any of
+                     * the system calls. */
+                    if( ( ulPC >= ( uint32_t ) __syscalls_flash_start__ ) &&
+                        ( ulPC <= ( uint32_t ) __syscalls_flash_end__ ) )
+                    {
+                        vRaisePrivilege();
+                    }
+                    break;
+            #endif /* configENABLE_MPU */
+
+        default:
+            /* Incorrect SVC call. */
+            configASSERT( pdFALSE );
+    }
 }
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */
+/* *INDENT-OFF* */
+#if ( configENABLE_MPU == 1 )
+    StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                         StackType_t * pxEndOfStack,
+                                         TaskFunction_t pxCode,
+                                         void * pvParameters,
+                                         BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */
 #else
-	StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters ) /* PRIVILEGED_FUNCTION */
+    StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                         StackType_t * pxEndOfStack,
+                                         TaskFunction_t pxCode,
+                                         void * pvParameters ) /* PRIVILEGED_FUNCTION */
 #endif /* configENABLE_MPU */
+/* *INDENT-ON* */
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	 * interrupt. */
-	#if( portPRELOAD_REGISTERS == 0 )
-	{
-		pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-		*pxTopOfStack = portINITIAL_XPSR;							/* xPSR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxCode;						/* PC */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
-		pxTopOfStack -= 5;											/* R12, R3, R2 and R1. */
-		*pxTopOfStack = ( StackType_t ) pvParameters;				/* R0 */
-		pxTopOfStack -= 9;											/* R11..R4, EXC_RETURN. */
-		*pxTopOfStack = portINITIAL_EXC_RETURN;
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
+    #if ( portPRELOAD_REGISTERS == 0 )
+        {
+            pxTopOfStack--;                                          /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+            *pxTopOfStack = portINITIAL_XPSR;                        /* xPSR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxCode;                  /* PC */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
+            pxTopOfStack -= 5;                                       /* R12, R3, R2 and R1. */
+            *pxTopOfStack = ( StackType_t ) pvParameters;            /* R0 */
+            pxTopOfStack -= 9;                                       /* R11..R4, EXC_RETURN. */
+            *pxTopOfStack = portINITIAL_EXC_RETURN;
 
-		#if( configENABLE_MPU == 1 )
-		{
-			pxTopOfStack--;
-			if( xRunPrivileged == pdTRUE )
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED;		/* Slot used to hold this task's CONTROL value. */
-			}
-			else
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED;	/* Slot used to hold this task's CONTROL value. */
-			}
-		}
-		#endif /* configENABLE_MPU */
+            #if ( configENABLE_MPU == 1 )
+                {
+                    pxTopOfStack--;
 
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxEndOfStack;	/* Slot used to hold this task's PSPLIM value. */
+                    if( xRunPrivileged == pdTRUE )
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                    else
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                }
+            #endif /* configENABLE_MPU */
 
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			pxTopOfStack--;
-			*pxTopOfStack = portNO_SECURE_CONTEXT;		/* Slot used to hold this task's xSecureContext value. */
-		}
-		#endif /* configENABLE_TRUSTZONE */
-	}
-	#else /* portPRELOAD_REGISTERS */
-	{
-		pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-		*pxTopOfStack = portINITIAL_XPSR;							/* xPSR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxCode;						/* PC */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x12121212UL;				/* R12 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x03030303UL;				/* R3 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x02020202UL;				/* R2 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x01010101UL;				/* R1 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pvParameters;				/* R0 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x11111111UL;				/* R11 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x10101010UL;				/* R10 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x09090909UL;				/* R09 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x08080808UL;				/* R08 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x07070707UL;				/* R07 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x06060606UL;				/* R06 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x05050505UL;				/* R05 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x04040404UL;				/* R04 */
-		pxTopOfStack--;
-		*pxTopOfStack = portINITIAL_EXC_RETURN;						/* EXC_RETURN */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */
 
-		#if( configENABLE_MPU == 1 )
-		{
-			pxTopOfStack--;
-			if( xRunPrivileged == pdTRUE )
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED;		/* Slot used to hold this task's CONTROL value. */
-			}
-			else
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED;	/* Slot used to hold this task's CONTROL value. */
-			}
-		}
-		#endif /* configENABLE_MPU */
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    pxTopOfStack--;
+                    *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */
+                }
+            #endif /* configENABLE_TRUSTZONE */
+        }
+    #else /* portPRELOAD_REGISTERS */
+        {
+            pxTopOfStack--;                                          /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+            *pxTopOfStack = portINITIAL_XPSR;                        /* xPSR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxCode;                  /* PC */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x12121212UL;            /* R12 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x03030303UL;            /* R3 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x02020202UL;            /* R2 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x01010101UL;            /* R1 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pvParameters;            /* R0 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x11111111UL;            /* R11 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x10101010UL;            /* R10 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x09090909UL;            /* R09 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x08080808UL;            /* R08 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x07070707UL;            /* R07 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x06060606UL;            /* R06 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x05050505UL;            /* R05 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x04040404UL;            /* R04 */
+            pxTopOfStack--;
+            *pxTopOfStack = portINITIAL_EXC_RETURN;                  /* EXC_RETURN */
 
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxEndOfStack;	/* Slot used to hold this task's PSPLIM value. */
+            #if ( configENABLE_MPU == 1 )
+                {
+                    pxTopOfStack--;
 
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			pxTopOfStack--;
-			*pxTopOfStack = portNO_SECURE_CONTEXT;		/* Slot used to hold this task's xSecureContext value. */
-		}
-		#endif /* configENABLE_TRUSTZONE */
-	}
-	#endif /* portPRELOAD_REGISTERS */
+                    if( xRunPrivileged == pdTRUE )
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                    else
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                }
+            #endif /* configENABLE_MPU */
 
-	return pxTopOfStack;
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */
+
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    pxTopOfStack--;
+                    *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */
+                }
+            #endif /* configENABLE_TRUSTZONE */
+        }
+    #endif /* portPRELOAD_REGISTERS */
+
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
 {
-	/* Make PendSV, CallSV and SysTick the same priority as the kernel. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+    /* Make PendSV, CallSV and SysTick the same priority as the kernel. */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
-	#if( configENABLE_MPU == 1 )
-	{
-		/* Setup the Memory Protection Unit (MPU). */
-		prvSetupMPU();
-	}
-	#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        {
+            /* Setup the Memory Protection Unit (MPU). */
+            prvSetupMPU();
+        }
+    #endif /* configENABLE_MPU */
 
-	/* Start the timer that generates the tick ISR. Interrupts are disabled
-	 * here already. */
-	vPortSetupTimerInterrupt();
+    /* Start the timer that generates the tick ISR. Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
 
-	/* Initialize the critical nesting count ready for the first task. */
-	ulCriticalNesting = 0;
+    /* Initialize the critical nesting count ready for the first task. */
+    ulCriticalNesting = 0;
 
-	/* Start the first task. */
-	vStartFirstTask();
+    /* Start the first task. */
+    vStartFirstTask();
 
-	/* Should never get here as the tasks will now be executing. Call the task
-	 * exit error function to prevent compiler warnings about a static function
-	 * not being called in the case that the application writer overrides this
-	 * functionality by defining configTASK_RETURN_ADDRESS. Call
-	 * vTaskSwitchContext() so link time optimization does not remove the
-	 * symbol. */
-	vTaskSwitchContext();
-	prvTaskExitError();
+    /* Should never get here as the tasks will now be executing. Call the task
+     * exit error function to prevent compiler warnings about a static function
+     * not being called in the case that the application writer overrides this
+     * functionality by defining configTASK_RETURN_ADDRESS. Call
+     * vTaskSwitchContext() so link time optimization does not remove the
+     * symbol. */
+    vTaskSwitchContext();
+    prvTaskExitError();
 
-	/* Should not get here. */
-	return 0;
+    /* Should not get here. */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
 {
-	/* Not implemented in ports where there is nothing to return to.
-	 * Artificially force an assert. */
-	configASSERT( ulCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( ulCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t ulStackDepth )
-	{
-	uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
-	int32_t lIndex = 0;
+#if ( configENABLE_MPU == 1 )
+    void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
+                                    const struct xMEMORY_REGION * const xRegions,
+                                    StackType_t * pxBottomOfStack,
+                                    uint32_t ulStackDepth )
+    {
+        uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
+        int32_t lIndex = 0;
 
-		/* Setup MAIR0. */
-		xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
-		xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
+        #if defined( __ARMCC_VERSION )
 
-		/* This function is called automatically when the task is created - in
-		 * which case the stack region parameters will be valid.  At all other
-		 * times the stack parameters will not be valid and it is assumed that
-		 * the stack region has already been configured. */
-		if( ulStackDepth > 0 )
-		{
-			/* Define the region that allows access to the stack. */
-			ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK;
-			ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1;
-			ulRegionEndAddress  &= portMPU_RLAR_ADDRESS_MASK;
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __privileged_sram_start__;
+            extern uint32_t * __privileged_sram_end__;
+        #else
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __privileged_sram_start__[];
+            extern uint32_t __privileged_sram_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
 
-			xMPUSettings->xRegionsSettings[ 0 ].ulRBAR =	( ulRegionStartAddress ) |
-															( portMPU_REGION_NON_SHAREABLE ) |
-															( portMPU_REGION_READ_WRITE ) |
-															( portMPU_REGION_EXECUTE_NEVER );
+        /* Setup MAIR0. */
+        xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
+        xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
 
-			xMPUSettings->xRegionsSettings[ 0 ].ulRLAR =	( ulRegionEndAddress ) |
-															( portMPU_RLAR_ATTR_INDEX0 ) |
-															( portMPU_RLAR_REGION_ENABLE );
-		}
+        /* This function is called automatically when the task is created - in
+         * which case the stack region parameters will be valid.  At all other
+         * times the stack parameters will not be valid and it is assumed that
+         * the stack region has already been configured. */
+        if( ulStackDepth > 0 )
+        {
+            ulRegionStartAddress = ( uint32_t ) pxBottomOfStack;
+            ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1;
 
-		/* User supplied configurable regions. */
-		for( ulRegionNumber = 1; ulRegionNumber <= portNUM_CONFIGURABLE_REGIONS; ulRegionNumber++ )
-		{
-			/* If xRegions is NULL i.e. the task has not specified any MPU
-			 * region, the else part ensures that all the configurable MPU
-			 * regions are invalidated. */
-			if( ( xRegions != NULL ) && ( xRegions[ lIndex ].ulLengthInBytes > 0UL ) )
-			{
-				/* Translate the generic region definition contained in xRegions
-				 * into the ARMv8 specific MPU settings that are then stored in
-				 * xMPUSettings. */
-				ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK;
-				ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1;
-				ulRegionEndAddress  &= portMPU_RLAR_ADDRESS_MASK;
+            /* If the stack is within the privileged SRAM, do not protect it
+             * using a separate MPU region. This is needed because privileged
+             * SRAM is already protected using an MPU region and ARMv8-M does
+             * not allow overlapping MPU regions. */
+            if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
+                ( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
+            {
+                xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
+                xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;
+            }
+            else
+            {
+                /* Define the region that allows access to the stack. */
+                ulRegionStartAddress &= portMPU_RBAR_ADDRESS_MASK;
+                ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK;
 
-				/* Start address. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR =	( ulRegionStartAddress ) |
-																			( portMPU_REGION_NON_SHAREABLE );
+                xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) |
+                                                             ( portMPU_REGION_NON_SHAREABLE ) |
+                                                             ( portMPU_REGION_READ_WRITE ) |
+                                                             ( portMPU_REGION_EXECUTE_NEVER );
 
-				/* RO/RW. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_READ_ONLY ) != 0 )
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_ONLY );
-				}
-				else
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_WRITE );
-				}
+                xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = ( ulRegionEndAddress ) |
+                                                             ( portMPU_RLAR_ATTR_INDEX0 ) |
+                                                             ( portMPU_RLAR_REGION_ENABLE );
+            }
+        }
 
-				/* XN. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_EXECUTE_NEVER ) != 0 )
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_EXECUTE_NEVER );
-				}
+        /* User supplied configurable regions. */
+        for( ulRegionNumber = 1; ulRegionNumber <= portNUM_CONFIGURABLE_REGIONS; ulRegionNumber++ )
+        {
+            /* If xRegions is NULL i.e. the task has not specified any MPU
+             * region, the else part ensures that all the configurable MPU
+             * regions are invalidated. */
+            if( ( xRegions != NULL ) && ( xRegions[ lIndex ].ulLengthInBytes > 0UL ) )
+            {
+                /* Translate the generic region definition contained in xRegions
+                 * into the ARMv8 specific MPU settings that are then stored in
+                 * xMPUSettings. */
+                ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK;
+                ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1;
+                ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK;
 
-				/* End Address. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR =	( ulRegionEndAddress ) |
-																			( portMPU_RLAR_REGION_ENABLE );
+                /* Start address. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = ( ulRegionStartAddress ) |
+                                                                          ( portMPU_REGION_NON_SHAREABLE );
 
-				/* Normal memory/ Device memory. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
-				{
-					/* Attr1 in MAIR0 is configured as device memory. */
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX1;
-				}
-				else
-				{
-					/* Attr1 in MAIR0 is configured as normal memory. */
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
-				}
-			}
-			else
-			{
-				/* Invalidate the region. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = 0UL;
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = 0UL;
-			}
+                /* RO/RW. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_READ_ONLY ) != 0 )
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_ONLY );
+                }
+                else
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_WRITE );
+                }
 
-			lIndex++;
-		}
-	}
+                /* XN. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_EXECUTE_NEVER ) != 0 )
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_EXECUTE_NEVER );
+                }
+
+                /* End Address. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
+                                                                          ( portMPU_RLAR_REGION_ENABLE );
+
+                /* Normal memory/ Device memory. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
+                {
+                    /* Attr1 in MAIR0 is configured as device memory. */
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX1;
+                }
+                else
+                {
+                    /* Attr1 in MAIR0 is configured as normal memory. */
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
+                }
+            }
+            else
+            {
+                /* Invalidate the region. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = 0UL;
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = 0UL;
+            }
+
+            lIndex++;
+        }
+    }
 #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 BaseType_t xPortIsInsideInterrupt( void )
 {
-uint32_t ulCurrentInterrupt;
-BaseType_t xReturn;
+    uint32_t ulCurrentInterrupt;
+    BaseType_t xReturn;
 
-	/* Obtain the number of the currently executing interrupt. Interrupt Program
-	 * Status Register (IPSR) holds the exception number of the currently-executing
-	 * exception or zero for Thread mode.*/
-	__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+    /* Obtain the number of the currently executing interrupt. Interrupt Program
+     * Status Register (IPSR) holds the exception number of the currently-executing
+     * exception or zero for Thread mode.*/
+    __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
-	if( ulCurrentInterrupt == 0 )
-	{
-		xReturn = pdFALSE;
-	}
-	else
-	{
-		xReturn = pdTRUE;
-	}
+    if( ulCurrentInterrupt == 0 )
+    {
+        xReturn = pdFALSE;
+    }
+    else
+    {
+        xReturn = pdTRUE;
+    }
 
-	return xReturn;
+    return xReturn;
 }
-/*-----------------------------------------------------------*/
\ No newline at end of file
+/*-----------------------------------------------------------*/
diff --git a/portable/IAR/ARM_CM33/non_secure/portasm.h b/portable/IAR/ARM_CM33/non_secure/portasm.h
index 71d711c69..6aaee8fc8 100644
--- a/portable/IAR/ARM_CM33/non_secure/portasm.h
+++ b/portable/IAR/ARM_CM33/non_secure/portasm.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -38,14 +38,14 @@
  * @brief Restore the context of the first task so that the first task starts
  * executing.
  */
-void vRestoreContextOfFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vRestoreContextOfFirstTask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Checks whether or not the processor is privileged.
  *
  * @return 1 if the processor is already privileged, 0 otherwise.
  */
-BaseType_t xIsPrivileged( void ) __attribute__ (( naked ));
+BaseType_t xIsPrivileged( void ) __attribute__( ( naked ) );
 
 /**
  * @brief Raises the privilege level by clearing the bit 0 of the CONTROL
@@ -58,7 +58,7 @@ BaseType_t xIsPrivileged( void ) __attribute__ (( naked ));
  *  Bit[0] = 0 --> The processor is running privileged
  *  Bit[0] = 1 --> The processor is running unprivileged.
  */
-void vRaisePrivilege( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vRaisePrivilege( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
@@ -68,32 +68,32 @@ void vRaisePrivilege( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
  *  Bit[0] = 0 --> The processor is running privileged
  *  Bit[0] = 1 --> The processor is running unprivileged.
  */
-void vResetPrivilege( void ) __attribute__ (( naked ));
+void vResetPrivilege( void ) __attribute__( ( naked ) );
 
 /**
  * @brief Starts the first task.
  */
-void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vStartFirstTask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Disables interrupts.
  */
-uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
+uint32_t ulSetInterruptMask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Enables interrupts.
  */
-void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
+void vClearInterruptMask( uint32_t ulMask ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief PendSV Exception handler.
  */
-void PendSV_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void PendSV_Handler( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief SVC Handler.
  */
-void SVC_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void SVC_Handler( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Allocate a Secure context for the calling task.
@@ -101,13 +101,13 @@ void SVC_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
  * @param[in] ulSecureStackSize The size of the stack to be allocated on the
  * secure side for the calling task.
  */
-void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) __attribute__ (( naked ));
+void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) __attribute__( ( naked ) );
 
 /**
  * @brief Free the task's secure context.
  *
  * @param[in] pulTCB Pointer to the Task Control Block (TCB) of the task.
  */
-void vPortFreeSecureContext( uint32_t *pulTCB ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vPortFreeSecureContext( uint32_t * pulTCB ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 #endif /* __PORT_ASM_H__ */
diff --git a/portable/IAR/ARM_CM33/non_secure/portasm.s b/portable/IAR/ARM_CM33/non_secure/portasm.s
index 639e2a8e1..35d644fc5 100644
--- a/portable/IAR/ARM_CM33/non_secure/portasm.s
+++ b/portable/IAR/ARM_CM33/non_secure/portasm.s
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/ARM_CM33/non_secure/portmacro.h b/portable/IAR/ARM_CM33/non_secure/portmacro.h
index 316213bfc..0a98de418 100644
--- a/portable/IAR/ARM_CM33/non_secure/portmacro.h
+++ b/portable/IAR/ARM_CM33/non_secure/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,18 +19,18 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*------------------------------------------------------------------------------
  * Port specific definitions.
@@ -42,109 +42,109 @@ extern "C" {
  *------------------------------------------------------------------------------
  */
 
-#ifndef configENABLE_FPU
-	#error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
-#endif /* configENABLE_FPU */
+    #ifndef configENABLE_FPU
+        #error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
+    #endif /* configENABLE_FPU */
 
-#ifndef configENABLE_MPU
-	#error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
-#endif /* configENABLE_MPU */
+    #ifndef configENABLE_MPU
+        #error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
+    #endif /* configENABLE_MPU */
 
-#ifndef configENABLE_TRUSTZONE
-	#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
-#endif /* configENABLE_TRUSTZONE */
+    #ifndef configENABLE_TRUSTZONE
+        #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
+    #endif /* configENABLE_TRUSTZONE */
 
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Type definitions.
  */
-#define portCHAR											char
-#define portFLOAT											float
-#define portDOUBLE											double
-#define portLONG											long
-#define portSHORT											short
-#define portSTACK_TYPE										uint32_t
-#define portBASE_TYPE										long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE										StackType_t;
-typedef long												BaseType_t;
-typedef unsigned long										UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	 * not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC							1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * Architecture specifics.
  */
-#define portARCH_NAME										"Cortex-M33"
-#define portSTACK_GROWTH									( -1 )
-#define portTICK_PERIOD_MS									( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT									8
-#define portNOP()
-#define portINLINE											__inline
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE								inline __attribute__(( always_inline ))
-#endif
-#define portHAS_STACK_OVERFLOW_CHECKING						1
-#define portDONT_DISCARD									__root
+    #define portARCH_NAME                      "Cortex-M33"
+    #define portSTACK_GROWTH                   ( -1 )
+    #define portTICK_PERIOD_MS                 ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT                 8
+    #define portNOP()
+    #define portINLINE                         __inline
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE               inline __attribute__( ( always_inline ) )
+    #endif
+    #define portHAS_STACK_OVERFLOW_CHECKING    1
+    #define portDONT_DISCARD                   __root
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Extern declarations.
  */
-extern BaseType_t xPortIsInsideInterrupt( void );
+    extern BaseType_t xPortIsInsideInterrupt( void );
 
-extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
 
-extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
-extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
 
-extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
 
-#if( configENABLE_TRUSTZONE == 1 )
-	extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
-	extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
-#endif /* configENABLE_TRUSTZONE */
+    #if ( configENABLE_TRUSTZONE == 1 )
+        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
+        extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
+    #endif /* configENABLE_TRUSTZONE */
 
-#if( configENABLE_MPU == 1 )
-	extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
-	extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
+        extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief MPU specific constants.
  */
-#if( configENABLE_MPU == 1 )
-	#define portUSING_MPU_WRAPPERS							1
-	#define portPRIVILEGE_BIT								( 0x80000000UL )
-#else
-	#define portPRIVILEGE_BIT								( 0x0UL )
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        #define portUSING_MPU_WRAPPERS    1
+        #define portPRIVILEGE_BIT         ( 0x80000000UL )
+    #else
+        #define portPRIVILEGE_BIT         ( 0x0UL )
+    #endif /* configENABLE_MPU */
 
 
 /* MPU regions. */
-#define portPRIVILEGED_FLASH_REGION							( 0UL )
-#define portUNPRIVILEGED_FLASH_REGION						( 1UL )
-#define portUNPRIVILEGED_SYSCALLS_REGION					( 2UL )
-#define portPRIVILEGED_RAM_REGION							( 3UL )
-#define portSTACK_REGION									( 4UL )
-#define portFIRST_CONFIGURABLE_REGION						( 5UL )
-#define portLAST_CONFIGURABLE_REGION						( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS						( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS								( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
+    #define portPRIVILEGED_FLASH_REGION                   ( 0UL )
+    #define portUNPRIVILEGED_FLASH_REGION                 ( 1UL )
+    #define portUNPRIVILEGED_SYSCALLS_REGION              ( 2UL )
+    #define portPRIVILEGED_RAM_REGION                     ( 3UL )
+    #define portSTACK_REGION                              ( 4UL )
+    #define portFIRST_CONFIGURABLE_REGION                 ( 5UL )
+    #define portLAST_CONFIGURABLE_REGION                  ( 7UL )
+    #define portNUM_CONFIGURABLE_REGIONS                  ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
+    #define portTOTAL_NUM_REGIONS                         ( portNUM_CONFIGURABLE_REGIONS + 1 )   /* Plus one to make space for the stack region. */
 
 /* Device memory attributes used in MPU_MAIR registers.
  *
@@ -156,162 +156,164 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
  *				11 --> Device-GRE
  *  Bit[1:0] - 00, Reserved.
  */
-#define portMPU_DEVICE_MEMORY_nGnRnE						( 0x00 ) /* 0000 0000 */
-#define portMPU_DEVICE_MEMORY_nGnRE							( 0x04 ) /* 0000 0100 */
-#define portMPU_DEVICE_MEMORY_nGRE							( 0x08 ) /* 0000 1000 */
-#define portMPU_DEVICE_MEMORY_GRE							( 0x0C ) /* 0000 1100 */
+    #define portMPU_DEVICE_MEMORY_nGnRnE                  ( 0x00 )   /* 0000 0000 */
+    #define portMPU_DEVICE_MEMORY_nGnRE                   ( 0x04 )   /* 0000 0100 */
+    #define portMPU_DEVICE_MEMORY_nGRE                    ( 0x08 )   /* 0000 1000 */
+    #define portMPU_DEVICE_MEMORY_GRE                     ( 0x0C )   /* 0000 1100 */
 
 /* Normal memory attributes used in MPU_MAIR registers. */
-#define portMPU_NORMAL_MEMORY_NON_CACHEABLE					( 0x44 ) /* Non-cacheable. */
-#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE			( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
+    #define portMPU_NORMAL_MEMORY_NON_CACHEABLE           ( 0x44 )   /* Non-cacheable. */
+    #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE    ( 0xFF )   /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
 
 /* Attributes used in MPU_RBAR registers. */
-#define portMPU_REGION_NON_SHAREABLE						( 0UL << 3UL )
-#define portMPU_REGION_INNER_SHAREABLE						( 1UL << 3UL )
-#define portMPU_REGION_OUTER_SHAREABLE						( 2UL << 3UL )
+    #define portMPU_REGION_NON_SHAREABLE                  ( 0UL << 3UL )
+    #define portMPU_REGION_INNER_SHAREABLE                ( 1UL << 3UL )
+    #define portMPU_REGION_OUTER_SHAREABLE                ( 2UL << 3UL )
 
-#define portMPU_REGION_PRIVILEGED_READ_WRITE				( 0UL << 1UL )
-#define portMPU_REGION_READ_WRITE							( 1UL << 1UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY					( 2UL << 1UL )
-#define portMPU_REGION_READ_ONLY							( 3UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_WRITE          ( 0UL << 1UL )
+    #define portMPU_REGION_READ_WRITE                     ( 1UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_ONLY           ( 2UL << 1UL )
+    #define portMPU_REGION_READ_ONLY                      ( 3UL << 1UL )
 
-#define portMPU_REGION_EXECUTE_NEVER						( 1UL )
+    #define portMPU_REGION_EXECUTE_NEVER                  ( 1UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Settings to define an MPU region.
  */
-typedef struct MPURegionSettings
-{
-	uint32_t ulRBAR;	/**< RBAR for the region. */
-	uint32_t ulRLAR;	/**< RLAR for the region. */
-} MPURegionSettings_t;
+    typedef struct MPURegionSettings
+    {
+        uint32_t ulRBAR; /**< RBAR for the region. */
+        uint32_t ulRLAR; /**< RLAR for the region. */
+    } MPURegionSettings_t;
 
 /**
  * @brief MPU settings as stored in the TCB.
  */
-typedef struct MPU_SETTINGS
-{
-	uint32_t ulMAIR0;	/**< MAIR0 for the task containing attributes for all the 4 per task regions. */
-	MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
-} xMPU_SETTINGS;
+    typedef struct MPU_SETTINGS
+    {
+        uint32_t ulMAIR0;                                              /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
+        MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
+    } xMPU_SETTINGS;
 /*-----------------------------------------------------------*/
 
 /**
  * @brief SVC numbers.
  */
-#define portSVC_ALLOCATE_SECURE_CONTEXT						0
-#define portSVC_FREE_SECURE_CONTEXT							1
-#define portSVC_START_SCHEDULER								2
-#define portSVC_RAISE_PRIVILEGE								3
+    #define portSVC_ALLOCATE_SECURE_CONTEXT    0
+    #define portSVC_FREE_SECURE_CONTEXT        1
+    #define portSVC_START_SCHEDULER            2
+    #define portSVC_RAISE_PRIVILEGE            3
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Scheduler utilities.
  */
-#define portYIELD()											vPortYield()
-#define portNVIC_INT_CTRL_REG								( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT								( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired )			if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x )								portEND_SWITCHING_ISR( x )
+    #define portYIELD()                                 vPortYield()
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Critical section management.
  */
-#define portSET_INTERRUPT_MASK_FROM_ISR()					ulSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)				vClearInterruptMask( x )
-#define portDISABLE_INTERRUPTS()							ulSetInterruptMask()
-#define portENABLE_INTERRUPTS()								vClearInterruptMask( 0 )
-#define portENTER_CRITICAL()								vPortEnterCritical()
-#define portEXIT_CRITICAL()									vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulSetInterruptMask()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vClearInterruptMask( x )
+    #define portDISABLE_INTERRUPTS()                  ulSetInterruptMask()
+    #define portENABLE_INTERRUPTS()                   vClearInterruptMask( 0 )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Tickless idle/low power functionality.
  */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Task function macros as described on the FreeRTOS.org WEB site.
  */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters )		void vFunction( void *pvParameters )
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Allocate a secure context for the task.
-	 *
-	 * Tasks are not created with a secure context. Any task that is going to call
-	 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
-	 * secure context before it calls any secure function.
-	 *
-	 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
-	 */
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )	vPortAllocateSecureContext( ulSecureStackSize )
+    #if ( configENABLE_TRUSTZONE == 1 )
 
-	/**
-	 * @brief Called when a task is deleted to delete the task's secure context,
-	 * if it has one.
-	 *
-	 * @param[in] pxTCB The TCB of the task being deleted.
-	 */
-	#define portCLEAN_UP_TCB( pxTCB )							vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-#else
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-	#define portCLEAN_UP_TCB( pxTCB )
-#endif /* configENABLE_TRUSTZONE */
+/**
+ * @brief Allocate a secure context for the task.
+ *
+ * Tasks are not created with a secure context. Any task that is going to call
+ * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
+ * secure context before it calls any secure function.
+ *
+ * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
+ */
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )    vPortAllocateSecureContext( ulSecureStackSize )
+
+/**
+ * @brief Called when a task is deleted to delete the task's secure context,
+ * if it has one.
+ *
+ * @param[in] pxTCB The TCB of the task being deleted.
+ */
+        #define portCLEAN_UP_TCB( pxTCB )                           vPortFreeSecureContext( ( uint32_t * ) pxTCB )
+    #else
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
+        #define portCLEAN_UP_TCB( pxTCB )
+    #endif /* configENABLE_TRUSTZONE */
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Checks whether or not the processor is privileged.
-	 *
-	 * @return 1 if the processor is already privileged, 0 otherwise.
-	 */
-	#define portIS_PRIVILEGED()									xIsPrivileged()
+    #if ( configENABLE_MPU == 1 )
 
-	/**
-	 * @brief Raise an SVC request to raise privilege.
-	 *
-	 * The SVC handler checks that the SVC was raised from a system call and only
-	 * then it raises the privilege. If this is called from any other place,
-	 * the privilege is not raised.
-	 */
-	#define portRAISE_PRIVILEGE()								__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+/**
+ * @brief Checks whether or not the processor is privileged.
+ *
+ * @return 1 if the processor is already privileged, 0 otherwise.
+ */
+        #define portIS_PRIVILEGED()      xIsPrivileged()
 
-	/**
-	 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
-	 * register.
-	 */
-	#define portRESET_PRIVILEGE()								vResetPrivilege()
-#else
-	#define portIS_PRIVILEGED()
-	#define portRAISE_PRIVILEGE()
-	#define portRESET_PRIVILEGE()
-#endif /* configENABLE_MPU */
+/**
+ * @brief Raise an SVC request to raise privilege.
+ *
+ * The SVC handler checks that the SVC was raised from a system call and only
+ * then it raises the privilege. If this is called from any other place,
+ * the privilege is not raised.
+ */
+        #define portRAISE_PRIVILEGE()    __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+
+/**
+ * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
+ * register.
+ */
+        #define portRESET_PRIVILEGE()    vResetPrivilege()
+    #else
+        #define portIS_PRIVILEGED()
+        #define portRAISE_PRIVILEGE()
+        #define portRESET_PRIVILEGE()
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Barriers.
  */
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
+    #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
 /*-----------------------------------------------------------*/
 
 /* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
  * the source code because to do so would cause other compilers to generate
  * warnings. */
-#pragma diag_suppress=Be006
-#pragma diag_suppress=Pa082
+    #pragma diag_suppress=Be006
+    #pragma diag_suppress=Pa082
 /*-----------------------------------------------------------*/
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
diff --git a/portable/IAR/ARM_CM33/secure/secure_context.c b/portable/IAR/ARM_CM33/secure/secure_context.c
index 39fabbf60..59c09ed58 100644
--- a/portable/IAR/ARM_CM33/secure/secure_context.c
+++ b/portable/IAR/ARM_CM33/secure/secure_context.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -40,7 +40,7 @@
  * Bit[0] - 0 --> Thread mode is privileged.
  * Bit[1] - 1 --> Thread mode uses PSP.
  */
-#define securecontextCONTROL_VALUE_PRIVILEGED		0x02
+#define securecontextCONTROL_VALUE_PRIVILEGED      0x02
 
 /**
  * @brief CONTROL value for un-privileged tasks.
@@ -48,7 +48,7 @@
  * Bit[0] - 1 --> Thread mode is un-privileged.
  * Bit[1] - 1 --> Thread mode uses PSP.
  */
-#define securecontextCONTROL_VALUE_UNPRIVILEGED		0x03
+#define securecontextCONTROL_VALUE_UNPRIVILEGED    0x03
 /*-----------------------------------------------------------*/
 
 /**
@@ -59,146 +59,148 @@
  */
 typedef struct SecureContext
 {
-	uint8_t *pucCurrentStackPointer;	/**< Current value of stack pointer (PSP). */
-	uint8_t *pucStackLimit;				/**< Last location of the stack memory (PSPLIM). */
-	uint8_t *pucStackStart;				/**< First location of the stack memory. */
+    uint8_t * pucCurrentStackPointer; /**< Current value of stack pointer (PSP). */
+    uint8_t * pucStackLimit;          /**< Last location of the stack memory (PSPLIM). */
+    uint8_t * pucStackStart;          /**< First location of the stack memory. */
 } SecureContext_t;
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureContext_Init( void )
 {
-	uint32_t ulIPSR;
+    uint32_t ulIPSR;
 
-	/* Read the Interrupt Program Status Register (IPSR) value. */
-	secureportREAD_IPSR( ulIPSR );
+    /* Read the Interrupt Program Status Register (IPSR) value. */
+    secureportREAD_IPSR( ulIPSR );
 
-	/* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-	 * when the processor is running in the Thread Mode. */
-	if( ulIPSR != 0 )
-	{
-		/* No stack for thread mode until a task's context is loaded. */
-		secureportSET_PSPLIM( securecontextNO_STACK );
-		secureportSET_PSP( securecontextNO_STACK );
+    /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
+     * when the processor is running in the Thread Mode. */
+    if( ulIPSR != 0 )
+    {
+        /* No stack for thread mode until a task's context is loaded. */
+        secureportSET_PSPLIM( securecontextNO_STACK );
+        secureportSET_PSP( securecontextNO_STACK );
 
-		#if( configENABLE_MPU == 1 )
-		{
-			/* Configure thread mode to use PSP and to be unprivileged. */
-			secureportSET_CONTROL( securecontextCONTROL_VALUE_UNPRIVILEGED );
-		}
-		#else /* configENABLE_MPU */
-		{
-			/* Configure thread mode to use PSP and to be privileged.. */
-			secureportSET_CONTROL( securecontextCONTROL_VALUE_PRIVILEGED );
-		}
-		#endif /* configENABLE_MPU */
-	}
+        #if ( configENABLE_MPU == 1 )
+            {
+                /* Configure thread mode to use PSP and to be unprivileged. */
+                secureportSET_CONTROL( securecontextCONTROL_VALUE_UNPRIVILEGED );
+            }
+        #else /* configENABLE_MPU */
+            {
+                /* Configure thread mode to use PSP and to be privileged.. */
+                secureportSET_CONTROL( securecontextCONTROL_VALUE_PRIVILEGED );
+            }
+        #endif /* configENABLE_MPU */
+    }
 }
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, uint32_t ulIsTaskPrivileged )
+#if ( configENABLE_MPU == 1 )
+    secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize,
+                                                                                       uint32_t ulIsTaskPrivileged )
 #else /* configENABLE_MPU */
-	secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize )
+    secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize )
 #endif /* configENABLE_MPU */
 {
-	uint8_t *pucStackMemory = NULL;
-	uint32_t ulIPSR;
-	SecureContextHandle_t xSecureContextHandle = NULL;
-	#if( configENABLE_MPU == 1 )
-		uint32_t *pulCurrentStackPointer = NULL;
-	#endif /* configENABLE_MPU */
+    uint8_t * pucStackMemory = NULL;
+    uint32_t ulIPSR;
+    SecureContextHandle_t xSecureContextHandle = NULL;
 
-	/* Read the Interrupt Program Status Register (IPSR) value. */
-	secureportREAD_IPSR( ulIPSR );
+    #if ( configENABLE_MPU == 1 )
+        uint32_t * pulCurrentStackPointer = NULL;
+    #endif /* configENABLE_MPU */
 
-	/* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-	 * when the processor is running in the Thread Mode. */
-	if( ulIPSR != 0 )
-	{
-		/* Allocate the context structure. */
-		xSecureContextHandle = ( SecureContextHandle_t ) pvPortMalloc( sizeof( SecureContext_t ) );
+    /* Read the Interrupt Program Status Register (IPSR) value. */
+    secureportREAD_IPSR( ulIPSR );
 
-		if( xSecureContextHandle != NULL )
-		{
-			/* Allocate the stack space. */
-			pucStackMemory = pvPortMalloc( ulSecureStackSize );
+    /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
+     * when the processor is running in the Thread Mode. */
+    if( ulIPSR != 0 )
+    {
+        /* Allocate the context structure. */
+        xSecureContextHandle = ( SecureContextHandle_t ) pvPortMalloc( sizeof( SecureContext_t ) );
 
-			if( pucStackMemory != NULL )
-			{
-				/* Since stack grows down, the starting point will be the last
-				 * location. Note that this location is next to the last
-				 * allocated byte because the hardware decrements the stack
-				 * pointer before writing i.e. if stack pointer is 0x2, a push
-				 * operation will decrement the stack pointer to 0x1 and then
-				 * write at 0x1. */
-				xSecureContextHandle->pucStackStart = pucStackMemory + ulSecureStackSize;
+        if( xSecureContextHandle != NULL )
+        {
+            /* Allocate the stack space. */
+            pucStackMemory = pvPortMalloc( ulSecureStackSize );
 
-				/* The stack cannot go beyond this location. This value is
-				 * programmed in the PSPLIM register on context switch.*/
-				xSecureContextHandle->pucStackLimit = pucStackMemory;
+            if( pucStackMemory != NULL )
+            {
+                /* Since stack grows down, the starting point will be the last
+                 * location. Note that this location is next to the last
+                 * allocated byte because the hardware decrements the stack
+                 * pointer before writing i.e. if stack pointer is 0x2, a push
+                 * operation will decrement the stack pointer to 0x1 and then
+                 * write at 0x1. */
+                xSecureContextHandle->pucStackStart = pucStackMemory + ulSecureStackSize;
 
-				#if( configENABLE_MPU == 1 )
-				{
-					/* Store the correct CONTROL value for the task on the stack.
-					 * This value is programmed in the CONTROL register on
-					 * context switch. */
-					pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart;
-					pulCurrentStackPointer--;
-					if( ulIsTaskPrivileged )
-					{
-						*( pulCurrentStackPointer ) = securecontextCONTROL_VALUE_PRIVILEGED;
-					}
-					else
-					{
-						*( pulCurrentStackPointer ) = securecontextCONTROL_VALUE_UNPRIVILEGED;
-					}
+                /* The stack cannot go beyond this location. This value is
+                 * programmed in the PSPLIM register on context switch.*/
+                xSecureContextHandle->pucStackLimit = pucStackMemory;
 
-					/* Store the current stack pointer. This value is programmed in
-					 * the PSP register on context switch. */
-					xSecureContextHandle->pucCurrentStackPointer = ( uint8_t * ) pulCurrentStackPointer;
-				}
-				#else /* configENABLE_MPU */
-				{
-					/* Current SP is set to the starting of the stack. This
-					 * value programmed in the PSP register on context switch. */
-					xSecureContextHandle->pucCurrentStackPointer = xSecureContextHandle->pucStackStart;
+                #if ( configENABLE_MPU == 1 )
+                    {
+                        /* Store the correct CONTROL value for the task on the stack.
+                         * This value is programmed in the CONTROL register on
+                         * context switch. */
+                        pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart;
+                        pulCurrentStackPointer--;
 
-				}
-				#endif /* configENABLE_MPU */
-			}
-			else
-			{
-				/* Free the context to avoid memory leak and make sure to return
-				 * NULL to indicate failure. */
-				vPortFree( xSecureContextHandle );
-				xSecureContextHandle = NULL;
-			}
-		}
-	}
+                        if( ulIsTaskPrivileged )
+                        {
+                            *( pulCurrentStackPointer ) = securecontextCONTROL_VALUE_PRIVILEGED;
+                        }
+                        else
+                        {
+                            *( pulCurrentStackPointer ) = securecontextCONTROL_VALUE_UNPRIVILEGED;
+                        }
 
-	return xSecureContextHandle;
+                        /* Store the current stack pointer. This value is programmed in
+                         * the PSP register on context switch. */
+                        xSecureContextHandle->pucCurrentStackPointer = ( uint8_t * ) pulCurrentStackPointer;
+                    }
+                #else /* configENABLE_MPU */
+                    {
+                        /* Current SP is set to the starting of the stack. This
+                         * value programmed in the PSP register on context switch. */
+                        xSecureContextHandle->pucCurrentStackPointer = xSecureContextHandle->pucStackStart;
+                    }
+                #endif /* configENABLE_MPU */
+            }
+            else
+            {
+                /* Free the context to avoid memory leak and make sure to return
+                 * NULL to indicate failure. */
+                vPortFree( xSecureContextHandle );
+                xSecureContextHandle = NULL;
+            }
+        }
+    }
+
+    return xSecureContextHandle;
 }
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle )
 {
-	uint32_t ulIPSR;
+    uint32_t ulIPSR;
 
-	/* Read the Interrupt Program Status Register (IPSR) value. */
-	secureportREAD_IPSR( ulIPSR );
+    /* Read the Interrupt Program Status Register (IPSR) value. */
+    secureportREAD_IPSR( ulIPSR );
 
-	/* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-	 * when the processor is running in the Thread Mode. */
-	if( ulIPSR != 0 )
-	{
-		/* Ensure that valid parameters are passed. */
-		secureportASSERT( xSecureContextHandle != NULL );
+    /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
+     * when the processor is running in the Thread Mode. */
+    if( ulIPSR != 0 )
+    {
+        /* Ensure that valid parameters are passed. */
+        secureportASSERT( xSecureContextHandle != NULL );
 
-		/* Free the stack space. */
-		vPortFree( xSecureContextHandle->pucStackLimit );
+        /* Free the stack space. */
+        vPortFree( xSecureContextHandle->pucStackLimit );
 
-		/* Free the context itself. */
-		vPortFree( xSecureContextHandle );
-	}
+        /* Free the context itself. */
+        vPortFree( xSecureContextHandle );
+    }
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/IAR/ARM_CM33/secure/secure_context.h b/portable/IAR/ARM_CM33/secure/secure_context.h
index 747c2c6fd..681ac6916 100644
--- a/portable/IAR/ARM_CM33/secure/secure_context.h
+++ b/portable/IAR/ARM_CM33/secure/secure_context.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -37,13 +37,13 @@
 /**
  * @brief PSP value when no task's context is loaded.
  */
-#define securecontextNO_STACK	0x0
+#define securecontextNO_STACK    0x0
 
 /**
  * @brief Opaque handle.
  */
 struct SecureContext;
-typedef struct SecureContext*	SecureContextHandle_t;
+typedef struct SecureContext * SecureContextHandle_t;
 /*-----------------------------------------------------------*/
 
 /**
@@ -69,10 +69,11 @@ void SecureContext_Init( void );
  * @return Opaque context handle if context is successfully allocated, NULL
  * otherwise.
  */
-#if( configENABLE_MPU == 1 )
-	SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, uint32_t ulIsTaskPrivileged );
+#if ( configENABLE_MPU == 1 )
+    SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize,
+                                                         uint32_t ulIsTaskPrivileged );
 #else /* configENABLE_MPU */
-	SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize );
+    SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize );
 #endif /* configENABLE_MPU */
 
 /**
diff --git a/portable/IAR/ARM_CM33/secure/secure_context_port.c b/portable/IAR/ARM_CM33/secure/secure_context_port.c
index 5dc8e4847..5f11f45d0 100644
--- a/portable/IAR/ARM_CM33/secure/secure_context_port.c
+++ b/portable/IAR/ARM_CM33/secure/secure_context_port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -37,12 +37,12 @@ extern void SecureContext_SaveContextAsm( SecureContextHandle_t xSecureContextHa
 
 secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle )
 {
-	SecureContext_LoadContextAsm( xSecureContextHandle );
+    SecureContext_LoadContextAsm( xSecureContextHandle );
 }
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle )
 {
-	SecureContext_SaveContextAsm( xSecureContextHandle );
+    SecureContext_SaveContextAsm( xSecureContextHandle );
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s
index af49db1c4..899f7998c 100644
--- a/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s
+++ b/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/ARM_CM33/secure/secure_heap.c b/portable/IAR/ARM_CM33/secure/secure_heap.c
index 7995a7f12..7c3227b18 100644
--- a/portable/IAR/ARM_CM33/secure/secure_heap.c
+++ b/portable/IAR/ARM_CM33/secure/secure_heap.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -37,37 +37,38 @@
 /**
  * @brief Total heap size.
  */
-#define secureconfigTOTAL_HEAP_SIZE		( ( ( size_t ) ( 10 * 1024 ) ) )
+#define secureconfigTOTAL_HEAP_SIZE    ( ( ( size_t ) ( 10 * 1024 ) ) )
 
 /* No test marker by default. */
 #ifndef mtCOVERAGE_TEST_MARKER
-	#define mtCOVERAGE_TEST_MARKER()
+    #define mtCOVERAGE_TEST_MARKER()
 #endif
 
 /* No tracing by default. */
 #ifndef traceMALLOC
-	#define traceMALLOC( pvReturn, xWantedSize )
+    #define traceMALLOC( pvReturn, xWantedSize )
 #endif
 
 /* No tracing by default. */
 #ifndef traceFREE
-	#define traceFREE( pv, xBlockSize )
+    #define traceFREE( pv, xBlockSize )
 #endif
 
 /* Block sizes must not get too small. */
-#define secureheapMINIMUM_BLOCK_SIZE	( ( size_t ) ( xHeapStructSize << 1 ) )
+#define secureheapMINIMUM_BLOCK_SIZE    ( ( size_t ) ( xHeapStructSize << 1 ) )
 
 /* Assumes 8bit bytes! */
-#define secureheapBITS_PER_BYTE			( ( size_t ) 8 )
+#define secureheapBITS_PER_BYTE         ( ( size_t ) 8 )
 /*-----------------------------------------------------------*/
 
 /* Allocate the memory for the heap. */
-#if( configAPPLICATION_ALLOCATED_HEAP == 1 )
-	/* The application writer has already defined the array used for the RTOS
-	 * heap - probably so it can be placed in a special segment or address. */
-	extern uint8_t ucHeap[ secureconfigTOTAL_HEAP_SIZE ];
+#if ( configAPPLICATION_ALLOCATED_HEAP == 1 )
+
+/* The application writer has already defined the array used for the RTOS
+* heap - probably so it can be placed in a special segment or address. */
+    extern uint8_t ucHeap[ secureconfigTOTAL_HEAP_SIZE ];
 #else /* configAPPLICATION_ALLOCATED_HEAP */
-	static uint8_t ucHeap[ secureconfigTOTAL_HEAP_SIZE ];
+    static uint8_t ucHeap[ secureconfigTOTAL_HEAP_SIZE ];
 #endif /* configAPPLICATION_ALLOCATED_HEAP */
 
 /**
@@ -77,8 +78,8 @@
  */
 typedef struct A_BLOCK_LINK
 {
-	struct A_BLOCK_LINK *pxNextFreeBlock;	/**< The next free block in the list. */
-	size_t xBlockSize;						/**< The size of the free block. */
+    struct A_BLOCK_LINK * pxNextFreeBlock; /**< The next free block in the list. */
+    size_t xBlockSize;                     /**< The size of the free block. */
 } BlockLink_t;
 /*-----------------------------------------------------------*/
 
@@ -97,7 +98,7 @@ static void prvHeapInit( void );
  *
  * @param[in] pxBlockToInsert The block being freed.
  */
-static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert );
+static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert );
 /*-----------------------------------------------------------*/
 
 /**
@@ -109,7 +110,7 @@ static const size_t xHeapStructSize = ( sizeof( BlockLink_t ) + ( ( size_t ) ( s
 /**
  * @brief Create a couple of list links to mark the start and end of the list.
  */
-static BlockLink_t xStart, *pxEnd = NULL;
+static BlockLink_t xStart, * pxEnd = NULL;
 
 /**
  * @brief Keeps track of the number of free bytes remaining, but says nothing
@@ -130,321 +131,324 @@ static size_t xBlockAllocatedBit = 0;
 
 static void prvHeapInit( void )
 {
-BlockLink_t *pxFirstFreeBlock;
-uint8_t *pucAlignedHeap;
-size_t uxAddress;
-size_t xTotalHeapSize = secureconfigTOTAL_HEAP_SIZE;
+    BlockLink_t * pxFirstFreeBlock;
+    uint8_t * pucAlignedHeap;
+    size_t uxAddress;
+    size_t xTotalHeapSize = secureconfigTOTAL_HEAP_SIZE;
 
-	/* Ensure the heap starts on a correctly aligned boundary. */
-	uxAddress = ( size_t ) ucHeap;
+    /* Ensure the heap starts on a correctly aligned boundary. */
+    uxAddress = ( size_t ) ucHeap;
 
-	if( ( uxAddress & secureportBYTE_ALIGNMENT_MASK ) != 0 )
-	{
-		uxAddress += ( secureportBYTE_ALIGNMENT - 1 );
-		uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK );
-		xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
-	}
+    if( ( uxAddress & secureportBYTE_ALIGNMENT_MASK ) != 0 )
+    {
+        uxAddress += ( secureportBYTE_ALIGNMENT - 1 );
+        uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK );
+        xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
+    }
 
-	pucAlignedHeap = ( uint8_t * ) uxAddress;
+    pucAlignedHeap = ( uint8_t * ) uxAddress;
 
-	/* xStart is used to hold a pointer to the first item in the list of free
-	 * blocks.  The void cast is used to prevent compiler warnings. */
-	xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
-	xStart.xBlockSize = ( size_t ) 0;
+    /* xStart is used to hold a pointer to the first item in the list of free
+     * blocks.  The void cast is used to prevent compiler warnings. */
+    xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
+    xStart.xBlockSize = ( size_t ) 0;
 
-	/* pxEnd is used to mark the end of the list of free blocks and is inserted
-	 * at the end of the heap space. */
-	uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
-	uxAddress -= xHeapStructSize;
-	uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK );
-	pxEnd = ( void * ) uxAddress;
-	pxEnd->xBlockSize = 0;
-	pxEnd->pxNextFreeBlock = NULL;
+    /* pxEnd is used to mark the end of the list of free blocks and is inserted
+     * at the end of the heap space. */
+    uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
+    uxAddress -= xHeapStructSize;
+    uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK );
+    pxEnd = ( void * ) uxAddress;
+    pxEnd->xBlockSize = 0;
+    pxEnd->pxNextFreeBlock = NULL;
 
-	/* To start with there is a single free block that is sized to take up the
-	 * entire heap space, minus the space taken by pxEnd. */
-	pxFirstFreeBlock = ( void * ) pucAlignedHeap;
-	pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
-	pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
+    /* To start with there is a single free block that is sized to take up the
+     * entire heap space, minus the space taken by pxEnd. */
+    pxFirstFreeBlock = ( void * ) pucAlignedHeap;
+    pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
+    pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
 
-	/* Only one block exists - and it covers the entire usable heap space. */
-	xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
-	xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
+    /* Only one block exists - and it covers the entire usable heap space. */
+    xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
+    xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
 
-	/* Work out the position of the top bit in a size_t variable. */
-	xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * secureheapBITS_PER_BYTE ) - 1 );
+    /* Work out the position of the top bit in a size_t variable. */
+    xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * secureheapBITS_PER_BYTE ) - 1 );
 }
 /*-----------------------------------------------------------*/
 
-static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert )
+static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert )
 {
-BlockLink_t *pxIterator;
-uint8_t *puc;
+    BlockLink_t * pxIterator;
+    uint8_t * puc;
 
-	/* Iterate through the list until a block is found that has a higher address
-	 * than the block being inserted. */
-	for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
-	{
-		/* Nothing to do here, just iterate to the right position. */
-	}
+    /* Iterate through the list until a block is found that has a higher address
+     * than the block being inserted. */
+    for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
+    {
+        /* Nothing to do here, just iterate to the right position. */
+    }
 
-	/* Do the block being inserted, and the block it is being inserted after
-	 * make a contiguous block of memory? */
-	puc = ( uint8_t * ) pxIterator;
-	if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
-	{
-		pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
-		pxBlockToInsert = pxIterator;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    /* Do the block being inserted, and the block it is being inserted after
+     * make a contiguous block of memory? */
+    puc = ( uint8_t * ) pxIterator;
 
-	/* Do the block being inserted, and the block it is being inserted before
-	 * make a contiguous block of memory? */
-	puc = ( uint8_t * ) pxBlockToInsert;
-	if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
-	{
-		if( pxIterator->pxNextFreeBlock != pxEnd )
-		{
-			/* Form one big block from the two blocks. */
-			pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
-			pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
-		}
-		else
-		{
-			pxBlockToInsert->pxNextFreeBlock = pxEnd;
-		}
-	}
-	else
-	{
-		pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
-	}
+    if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
+    {
+        pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
+        pxBlockToInsert = pxIterator;
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	/* If the block being inserted plugged a gab, so was merged with the block
-	 * before and the block after, then it's pxNextFreeBlock pointer will have
-	 * already been set, and should not be set here as that would make it point
-	 * to itself. */
-	if( pxIterator != pxBlockToInsert )
-	{
-		pxIterator->pxNextFreeBlock = pxBlockToInsert;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    /* Do the block being inserted, and the block it is being inserted before
+     * make a contiguous block of memory? */
+    puc = ( uint8_t * ) pxBlockToInsert;
+
+    if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
+    {
+        if( pxIterator->pxNextFreeBlock != pxEnd )
+        {
+            /* Form one big block from the two blocks. */
+            pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
+            pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
+        }
+        else
+        {
+            pxBlockToInsert->pxNextFreeBlock = pxEnd;
+        }
+    }
+    else
+    {
+        pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
+    }
+
+    /* If the block being inserted plugged a gab, so was merged with the block
+     * before and the block after, then it's pxNextFreeBlock pointer will have
+     * already been set, and should not be set here as that would make it point
+     * to itself. */
+    if( pxIterator != pxBlockToInsert )
+    {
+        pxIterator->pxNextFreeBlock = pxBlockToInsert;
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 }
 /*-----------------------------------------------------------*/
 
-void *pvPortMalloc( size_t xWantedSize )
+void * pvPortMalloc( size_t xWantedSize )
 {
-BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
-void *pvReturn = NULL;
+    BlockLink_t * pxBlock, * pxPreviousBlock, * pxNewBlockLink;
+    void * pvReturn = NULL;
 
-	/* If this is the first call to malloc then the heap will require
-	 * initialisation to setup the list of free blocks. */
-	if( pxEnd == NULL )
-	{
-		prvHeapInit();
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    /* If this is the first call to malloc then the heap will require
+     * initialisation to setup the list of free blocks. */
+    if( pxEnd == NULL )
+    {
+        prvHeapInit();
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	/* Check the requested block size is not so large that the top bit is set.
-	 * The top bit of the block size member of the BlockLink_t structure is used
-	 * to determine who owns the block - the application or the kernel, so it
-	 * must be free. */
-	if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
-	{
-		/* The wanted size is increased so it can contain a BlockLink_t
-		 * structure in addition to the requested amount of bytes. */
-		if( xWantedSize > 0 )
-		{
-			xWantedSize += xHeapStructSize;
+    /* Check the requested block size is not so large that the top bit is set.
+     * The top bit of the block size member of the BlockLink_t structure is used
+     * to determine who owns the block - the application or the kernel, so it
+     * must be free. */
+    if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
+    {
+        /* The wanted size is increased so it can contain a BlockLink_t
+         * structure in addition to the requested amount of bytes. */
+        if( xWantedSize > 0 )
+        {
+            xWantedSize += xHeapStructSize;
 
-			/* Ensure that blocks are always aligned to the required number of
-			 * bytes. */
-			if( ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) != 0x00 )
-			{
-				/* Byte alignment required. */
-				xWantedSize += ( secureportBYTE_ALIGNMENT - ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) );
-				secureportASSERT( ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) == 0 );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
+            /* Ensure that blocks are always aligned to the required number of
+             * bytes. */
+            if( ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) != 0x00 )
+            {
+                /* Byte alignment required. */
+                xWantedSize += ( secureportBYTE_ALIGNMENT - ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) );
+                secureportASSERT( ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) == 0 );
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
 
-		if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
-		{
-			/* Traverse the list from the start (lowest address) block until
-			 * one of adequate size is found. */
-			pxPreviousBlock = &xStart;
-			pxBlock = xStart.pxNextFreeBlock;
-			while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
-			{
-				pxPreviousBlock = pxBlock;
-				pxBlock = pxBlock->pxNextFreeBlock;
-			}
+        if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
+        {
+            /* Traverse the list from the start (lowest address) block until
+             * one of adequate size is found. */
+            pxPreviousBlock = &xStart;
+            pxBlock = xStart.pxNextFreeBlock;
 
-			/* If the end marker was reached then a block of adequate size was
-			 * not found. */
-			if( pxBlock != pxEnd )
-			{
-				/* Return the memory space pointed to - jumping over the
-				 * BlockLink_t structure at its start. */
-				pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
+            while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
+            {
+                pxPreviousBlock = pxBlock;
+                pxBlock = pxBlock->pxNextFreeBlock;
+            }
 
-				/* This block is being returned for use so must be taken out
-				 * of the list of free blocks. */
-				pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
+            /* If the end marker was reached then a block of adequate size was
+             * not found. */
+            if( pxBlock != pxEnd )
+            {
+                /* Return the memory space pointed to - jumping over the
+                 * BlockLink_t structure at its start. */
+                pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
 
-				/* If the block is larger than required it can be split into
-				 * two. */
-				if( ( pxBlock->xBlockSize - xWantedSize ) > secureheapMINIMUM_BLOCK_SIZE )
-				{
-					/* This block is to be split into two.  Create a new
-					 * block following the number of bytes requested. The void
-					 * cast is used to prevent byte alignment warnings from the
-					 * compiler. */
-					pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
-					secureportASSERT( ( ( ( size_t ) pxNewBlockLink ) & secureportBYTE_ALIGNMENT_MASK ) == 0 );
+                /* This block is being returned for use so must be taken out
+                 * of the list of free blocks. */
+                pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
 
-					/* Calculate the sizes of two blocks split from the single
-					 * block. */
-					pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
-					pxBlock->xBlockSize = xWantedSize;
+                /* If the block is larger than required it can be split into
+                 * two. */
+                if( ( pxBlock->xBlockSize - xWantedSize ) > secureheapMINIMUM_BLOCK_SIZE )
+                {
+                    /* This block is to be split into two.  Create a new
+                     * block following the number of bytes requested. The void
+                     * cast is used to prevent byte alignment warnings from the
+                     * compiler. */
+                    pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
+                    secureportASSERT( ( ( ( size_t ) pxNewBlockLink ) & secureportBYTE_ALIGNMENT_MASK ) == 0 );
 
-					/* Insert the new block into the list of free blocks. */
-					prvInsertBlockIntoFreeList( pxNewBlockLink );
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
+                    /* Calculate the sizes of two blocks split from the single
+                     * block. */
+                    pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
+                    pxBlock->xBlockSize = xWantedSize;
 
-				xFreeBytesRemaining -= pxBlock->xBlockSize;
+                    /* Insert the new block into the list of free blocks. */
+                    prvInsertBlockIntoFreeList( pxNewBlockLink );
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
 
-				if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
-				{
-					xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
+                xFreeBytesRemaining -= pxBlock->xBlockSize;
 
-				/* The block is being returned - it is allocated and owned by
-				 * the application and has no "next" block. */
-				pxBlock->xBlockSize |= xBlockAllocatedBit;
-				pxBlock->pxNextFreeBlock = NULL;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+                if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
+                {
+                    xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
 
-	traceMALLOC( pvReturn, xWantedSize );
+                /* The block is being returned - it is allocated and owned by
+                 * the application and has no "next" block. */
+                pxBlock->xBlockSize |= xBlockAllocatedBit;
+                pxBlock->pxNextFreeBlock = NULL;
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	#if( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
-	{
-		if( pvReturn == NULL )
-		{
-			extern void vApplicationMallocFailedHook( void );
-			vApplicationMallocFailedHook();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	#endif
+    traceMALLOC( pvReturn, xWantedSize );
 
-	secureportASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) secureportBYTE_ALIGNMENT_MASK ) == 0 );
-	return pvReturn;
+    #if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
+        {
+            if( pvReturn == NULL )
+            {
+                extern void vApplicationMallocFailedHook( void );
+                vApplicationMallocFailedHook();
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+    #endif /* if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 ) */
+
+    secureportASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) secureportBYTE_ALIGNMENT_MASK ) == 0 );
+    return pvReturn;
 }
 /*-----------------------------------------------------------*/
 
-void vPortFree( void *pv )
+void vPortFree( void * pv )
 {
-uint8_t *puc = ( uint8_t * ) pv;
-BlockLink_t *pxLink;
+    uint8_t * puc = ( uint8_t * ) pv;
+    BlockLink_t * pxLink;
 
-	if( pv != NULL )
-	{
-		/* The memory being freed will have an BlockLink_t structure immediately
-		 * before it. */
-		puc -= xHeapStructSize;
+    if( pv != NULL )
+    {
+        /* The memory being freed will have an BlockLink_t structure immediately
+         * before it. */
+        puc -= xHeapStructSize;
 
-		/* This casting is to keep the compiler from issuing warnings. */
-		pxLink = ( void * ) puc;
+        /* This casting is to keep the compiler from issuing warnings. */
+        pxLink = ( void * ) puc;
 
-		/* Check the block is actually allocated. */
-		secureportASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
-		secureportASSERT( pxLink->pxNextFreeBlock == NULL );
+        /* Check the block is actually allocated. */
+        secureportASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
+        secureportASSERT( pxLink->pxNextFreeBlock == NULL );
 
-		if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
-		{
-			if( pxLink->pxNextFreeBlock == NULL )
-			{
-				/* The block is being returned to the heap - it is no longer
-				 * allocated. */
-				pxLink->xBlockSize &= ~xBlockAllocatedBit;
+        if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
+        {
+            if( pxLink->pxNextFreeBlock == NULL )
+            {
+                /* The block is being returned to the heap - it is no longer
+                 * allocated. */
+                pxLink->xBlockSize &= ~xBlockAllocatedBit;
 
-				secureportDISABLE_NON_SECURE_INTERRUPTS();
-				{
-					/* Add this block to the list of free blocks. */
-					xFreeBytesRemaining += pxLink->xBlockSize;
-					traceFREE( pv, pxLink->xBlockSize );
-					prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
-				}
-				secureportENABLE_NON_SECURE_INTERRUPTS();
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
+                secureportDISABLE_NON_SECURE_INTERRUPTS();
+                {
+                    /* Add this block to the list of free blocks. */
+                    xFreeBytesRemaining += pxLink->xBlockSize;
+                    traceFREE( pv, pxLink->xBlockSize );
+                    prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
+                }
+                secureportENABLE_NON_SECURE_INTERRUPTS();
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
 }
 /*-----------------------------------------------------------*/
 
 size_t xPortGetFreeHeapSize( void )
 {
-	return xFreeBytesRemaining;
+    return xFreeBytesRemaining;
 }
 /*-----------------------------------------------------------*/
 
 size_t xPortGetMinimumEverFreeHeapSize( void )
 {
-	return xMinimumEverFreeBytesRemaining;
+    return xMinimumEverFreeBytesRemaining;
 }
 /*-----------------------------------------------------------*/
 
 void vPortInitialiseBlocks( void )
 {
-	/* This just exists to keep the linker quiet. */
+    /* This just exists to keep the linker quiet. */
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/IAR/ARM_CM33/secure/secure_heap.h b/portable/IAR/ARM_CM33/secure/secure_heap.h
index aa67e39d8..d507107cd 100644
--- a/portable/IAR/ARM_CM33/secure/secure_heap.h
+++ b/portable/IAR/ARM_CM33/secure/secure_heap.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -39,13 +39,13 @@
  * @return Pointer to the memory region if the allocation is successful, NULL
  * otherwise.
  */
-void *pvPortMalloc( size_t xWantedSize );
+void * pvPortMalloc( size_t xWantedSize );
 
 /**
  * @brief Frees the previously allocated memory.
  *
  * @param[in] pv Pointer to the memory to be freed.
  */
-void vPortFree( void *pv );
+void vPortFree( void * pv );
 
 #endif /* __SECURE_HEAP_H__ */
diff --git a/portable/IAR/ARM_CM33/secure/secure_init.c b/portable/IAR/ARM_CM33/secure/secure_init.c
index 629186130..40b115f53 100644
--- a/portable/IAR/ARM_CM33/secure/secure_init.c
+++ b/portable/IAR/ARM_CM33/secure/secure_init.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -37,69 +37,69 @@
 /**
  * @brief Constants required to manipulate the SCB.
  */
-#define secureinitSCB_AIRCR					( ( volatile uint32_t * ) 0xe000ed0c )  /* Application Interrupt and Reset Control Register. */
-#define secureinitSCB_AIRCR_VECTKEY_POS		( 16UL )
-#define secureinitSCB_AIRCR_VECTKEY_MASK	( 0xFFFFUL << secureinitSCB_AIRCR_VECTKEY_POS )
-#define secureinitSCB_AIRCR_PRIS_POS		( 14UL )
-#define secureinitSCB_AIRCR_PRIS_MASK		( 1UL << secureinitSCB_AIRCR_PRIS_POS )
+#define secureinitSCB_AIRCR                 ( ( volatile uint32_t * ) 0xe000ed0c )  /* Application Interrupt and Reset Control Register. */
+#define secureinitSCB_AIRCR_VECTKEY_POS     ( 16UL )
+#define secureinitSCB_AIRCR_VECTKEY_MASK    ( 0xFFFFUL << secureinitSCB_AIRCR_VECTKEY_POS )
+#define secureinitSCB_AIRCR_PRIS_POS        ( 14UL )
+#define secureinitSCB_AIRCR_PRIS_MASK       ( 1UL << secureinitSCB_AIRCR_PRIS_POS )
 
 /**
  * @brief Constants required to manipulate the FPU.
  */
-#define secureinitFPCCR						( ( volatile uint32_t * ) 0xe000ef34 )  /* Floating Point Context Control Register. */
-#define secureinitFPCCR_LSPENS_POS			( 29UL )
-#define secureinitFPCCR_LSPENS_MASK			( 1UL << secureinitFPCCR_LSPENS_POS )
-#define secureinitFPCCR_TS_POS				( 26UL )
-#define secureinitFPCCR_TS_MASK				( 1UL << secureinitFPCCR_TS_POS )
+#define secureinitFPCCR                     ( ( volatile uint32_t * ) 0xe000ef34 )  /* Floating Point Context Control Register. */
+#define secureinitFPCCR_LSPENS_POS          ( 29UL )
+#define secureinitFPCCR_LSPENS_MASK         ( 1UL << secureinitFPCCR_LSPENS_POS )
+#define secureinitFPCCR_TS_POS              ( 26UL )
+#define secureinitFPCCR_TS_MASK             ( 1UL << secureinitFPCCR_TS_POS )
 
-#define secureinitNSACR						( ( volatile uint32_t * ) 0xe000ed8c )  /* Non-secure Access Control Register. */
-#define secureinitNSACR_CP10_POS			( 10UL )
-#define secureinitNSACR_CP10_MASK			( 1UL << secureinitNSACR_CP10_POS )
-#define secureinitNSACR_CP11_POS			( 11UL )
-#define secureinitNSACR_CP11_MASK			( 1UL << secureinitNSACR_CP11_POS )
+#define secureinitNSACR                     ( ( volatile uint32_t * ) 0xe000ed8c )  /* Non-secure Access Control Register. */
+#define secureinitNSACR_CP10_POS            ( 10UL )
+#define secureinitNSACR_CP10_MASK           ( 1UL << secureinitNSACR_CP10_POS )
+#define secureinitNSACR_CP11_POS            ( 11UL )
+#define secureinitNSACR_CP11_MASK           ( 1UL << secureinitNSACR_CP11_POS )
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureInit_DePrioritizeNSExceptions( void )
 {
-	uint32_t ulIPSR;
+    uint32_t ulIPSR;
 
-	 /* Read the Interrupt Program Status Register (IPSR) value. */
-	secureportREAD_IPSR( ulIPSR );
+    /* Read the Interrupt Program Status Register (IPSR) value. */
+    secureportREAD_IPSR( ulIPSR );
 
-	/* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-	 * when the processor is running in the Thread Mode. */
-	if( ulIPSR != 0 )
-	{
-		*( secureinitSCB_AIRCR ) =	( *( secureinitSCB_AIRCR ) & ~( secureinitSCB_AIRCR_VECTKEY_MASK | secureinitSCB_AIRCR_PRIS_MASK ) ) |
-									( ( 0x05FAUL << secureinitSCB_AIRCR_VECTKEY_POS ) & secureinitSCB_AIRCR_VECTKEY_MASK ) |
-									( ( 0x1UL	<< secureinitSCB_AIRCR_PRIS_POS )	& secureinitSCB_AIRCR_PRIS_MASK );
-	}
+    /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
+     * when the processor is running in the Thread Mode. */
+    if( ulIPSR != 0 )
+    {
+        *( secureinitSCB_AIRCR ) = ( *( secureinitSCB_AIRCR ) & ~( secureinitSCB_AIRCR_VECTKEY_MASK | secureinitSCB_AIRCR_PRIS_MASK ) ) |
+                                   ( ( 0x05FAUL << secureinitSCB_AIRCR_VECTKEY_POS ) & secureinitSCB_AIRCR_VECTKEY_MASK ) |
+                                   ( ( 0x1UL << secureinitSCB_AIRCR_PRIS_POS ) & secureinitSCB_AIRCR_PRIS_MASK );
+    }
 }
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureInit_EnableNSFPUAccess( void )
 {
-	uint32_t ulIPSR;
+    uint32_t ulIPSR;
 
-	 /* Read the Interrupt Program Status Register (IPSR) value. */
-	secureportREAD_IPSR( ulIPSR );
+    /* Read the Interrupt Program Status Register (IPSR) value. */
+    secureportREAD_IPSR( ulIPSR );
 
-	/* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-	 * when the processor is running in the Thread Mode. */
-	if( ulIPSR != 0 )
-	{
-		/* CP10 = 1 ==> Non-secure access to the Floating Point Unit is
-		 * permitted. CP11 should be programmed to the same value as CP10. */
-		*( secureinitNSACR ) |= ( secureinitNSACR_CP10_MASK | secureinitNSACR_CP11_MASK );
+    /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
+     * when the processor is running in the Thread Mode. */
+    if( ulIPSR != 0 )
+    {
+        /* CP10 = 1 ==> Non-secure access to the Floating Point Unit is
+         * permitted. CP11 should be programmed to the same value as CP10. */
+        *( secureinitNSACR ) |= ( secureinitNSACR_CP10_MASK | secureinitNSACR_CP11_MASK );
 
-		/* LSPENS = 0 ==> LSPEN is writable fron non-secure state. This ensures
-		 * that we can enable/disable lazy stacking in port.c file. */
-		*( secureinitFPCCR ) &= ~ ( secureinitFPCCR_LSPENS_MASK );
+        /* LSPENS = 0 ==> LSPEN is writable fron non-secure state. This ensures
+         * that we can enable/disable lazy stacking in port.c file. */
+        *( secureinitFPCCR ) &= ~( secureinitFPCCR_LSPENS_MASK );
 
-		/* TS = 1 ==> Treat FP registers as secure i.e. callee saved FP
-		 * registers (S16-S31) are also pushed to stack on exception entry and
-		 * restored on exception return. */
-		*( secureinitFPCCR ) |= ( secureinitFPCCR_TS_MASK );
-	}
+        /* TS = 1 ==> Treat FP registers as secure i.e. callee saved FP
+         * registers (S16-S31) are also pushed to stack on exception entry and
+         * restored on exception return. */
+        *( secureinitFPCCR ) |= ( secureinitFPCCR_TS_MASK );
+    }
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/IAR/ARM_CM33/secure/secure_init.h b/portable/IAR/ARM_CM33/secure/secure_init.h
index 643873468..c40ef3d8d 100644
--- a/portable/IAR/ARM_CM33/secure/secure_init.h
+++ b/portable/IAR/ARM_CM33/secure/secure_init.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/ARM_CM33/secure/secure_port_macros.h b/portable/IAR/ARM_CM33/secure/secure_port_macros.h
index 14ed3f022..d495a0e02 100644
--- a/portable/IAR/ARM_CM33/secure/secure_port_macros.h
+++ b/portable/IAR/ARM_CM33/secure/secure_port_macros.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -31,103 +31,103 @@
 /**
  * @brief Byte alignment requirements.
  */
-#define secureportBYTE_ALIGNMENT					8
-#define secureportBYTE_ALIGNMENT_MASK				( 0x0007 )
+#define secureportBYTE_ALIGNMENT         8
+#define secureportBYTE_ALIGNMENT_MASK    ( 0x0007 )
 
 /**
  * @brief Macro to declare a function as non-secure callable.
  */
 #if defined( __IAR_SYSTEMS_ICC__ )
-	#define secureportNON_SECURE_CALLABLE			__cmse_nonsecure_entry __root
+    #define secureportNON_SECURE_CALLABLE    __cmse_nonsecure_entry __root
 #else
-	#define secureportNON_SECURE_CALLABLE			__attribute__((cmse_nonsecure_entry)) __attribute__((used))
+    #define secureportNON_SECURE_CALLABLE    __attribute__( ( cmse_nonsecure_entry ) ) __attribute__( ( used ) )
 #endif
 
 /**
  * @brief Set the secure PRIMASK value.
  */
 #define secureportSET_SECURE_PRIMASK( ulPrimaskValue ) \
-	__asm volatile ( "msr primask, %0" : : "r" ( ulPrimaskValue ) : "memory" )
+    __asm volatile ( "msr primask, %0" : : "r" ( ulPrimaskValue ) : "memory" )
 
 /**
  * @brief Set the non-secure PRIMASK value.
  */
 #define secureportSET_NON_SECURE_PRIMASK( ulPrimaskValue ) \
-	__asm volatile ( "msr primask_ns, %0" : : "r" ( ulPrimaskValue ) : "memory" )
+    __asm volatile ( "msr primask_ns, %0" : : "r" ( ulPrimaskValue ) : "memory" )
 
 /**
  * @brief Read the PSP value in the given variable.
  */
 #define secureportREAD_PSP( pucOutCurrentStackPointer ) \
-	__asm volatile ( "mrs %0, psp"  : "=r" ( pucOutCurrentStackPointer ) )
+    __asm volatile ( "mrs %0, psp"  : "=r" ( pucOutCurrentStackPointer ) )
 
 /**
  * @brief Set the PSP to the given value.
  */
 #define secureportSET_PSP( pucCurrentStackPointer ) \
-	__asm volatile ( "msr psp, %0" : : "r" ( pucCurrentStackPointer ) )
+    __asm volatile ( "msr psp, %0" : : "r" ( pucCurrentStackPointer ) )
 
 /**
  * @brief Set the PSPLIM to the given value.
  */
 #define secureportSET_PSPLIM( pucStackLimit ) \
-	__asm volatile ( "msr psplim, %0" : : "r" ( pucStackLimit ) )
+    __asm volatile ( "msr psplim, %0" : : "r" ( pucStackLimit ) )
 
 /**
  * @brief Set the NonSecure MSP to the given value.
  */
 #define secureportSET_MSP_NS( pucMainStackPointer ) \
-	__asm volatile ( "msr msp_ns, %0" : : "r" ( pucMainStackPointer ) )
+    __asm volatile ( "msr msp_ns, %0" : : "r" ( pucMainStackPointer ) )
 
 /**
  * @brief Set the CONTROL register to the given value.
  */
 #define secureportSET_CONTROL( ulControl ) \
-	__asm volatile ( "msr control, %0" : : "r" ( ulControl ) : "memory" )
+    __asm volatile ( "msr control, %0" : : "r" ( ulControl ) : "memory" )
 
 /**
  * @brief Read the Interrupt Program Status Register (IPSR) value in the given
  * variable.
  */
 #define secureportREAD_IPSR( ulIPSR ) \
-	__asm volatile ( "mrs %0, ipsr"  : "=r" ( ulIPSR ) )
+    __asm volatile ( "mrs %0, ipsr"  : "=r" ( ulIPSR ) )
 
 /**
  * @brief PRIMASK value to enable interrupts.
  */
-#define secureportPRIMASK_ENABLE_INTERRUPTS_VAL		0
+#define secureportPRIMASK_ENABLE_INTERRUPTS_VAL     0
 
 /**
  * @brief PRIMASK value to disable interrupts.
  */
-#define secureportPRIMASK_DISABLE_INTERRUPTS_VAL	1
+#define secureportPRIMASK_DISABLE_INTERRUPTS_VAL    1
 
 /**
  * @brief Disable secure interrupts.
  */
-#define secureportDISABLE_SECURE_INTERRUPTS()		secureportSET_SECURE_PRIMASK( secureportPRIMASK_DISABLE_INTERRUPTS_VAL )
+#define secureportDISABLE_SECURE_INTERRUPTS()        secureportSET_SECURE_PRIMASK( secureportPRIMASK_DISABLE_INTERRUPTS_VAL )
 
 /**
  * @brief Disable non-secure interrupts.
  *
  * This effectively disables context switches.
  */
-#define secureportDISABLE_NON_SECURE_INTERRUPTS()	secureportSET_NON_SECURE_PRIMASK( secureportPRIMASK_DISABLE_INTERRUPTS_VAL )
+#define secureportDISABLE_NON_SECURE_INTERRUPTS()    secureportSET_NON_SECURE_PRIMASK( secureportPRIMASK_DISABLE_INTERRUPTS_VAL )
 
 /**
  * @brief Enable non-secure interrupts.
  */
-#define secureportENABLE_NON_SECURE_INTERRUPTS()	secureportSET_NON_SECURE_PRIMASK( secureportPRIMASK_ENABLE_INTERRUPTS_VAL )
+#define secureportENABLE_NON_SECURE_INTERRUPTS()     secureportSET_NON_SECURE_PRIMASK( secureportPRIMASK_ENABLE_INTERRUPTS_VAL )
 
 /**
  * @brief Assert definition.
  */
-#define secureportASSERT( x )						\
-	if( ( x ) == 0 )								\
-	{												\
-		secureportDISABLE_SECURE_INTERRUPTS();		\
-		secureportDISABLE_NON_SECURE_INTERRUPTS();	\
-		for( ;; );									\
-	}
+#define secureportASSERT( x )                      \
+    if( ( x ) == 0 )                               \
+    {                                              \
+        secureportDISABLE_SECURE_INTERRUPTS();     \
+        secureportDISABLE_NON_SECURE_INTERRUPTS(); \
+        for( ; ; ) {; }                            \
+    }
 
 #endif /* __SECURE_PORT_MACROS_H__ */
diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c
index ba6bd2602..eef952d55 100644
--- a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c
+++ b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,10 +19,9 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
@@ -40,10 +39,10 @@
 /* Portasm includes. */
 #include "portasm.h"
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/* Secure components includes. */
-	#include "secure_context.h"
-	#include "secure_init.h"
+#if ( configENABLE_TRUSTZONE == 1 )
+    /* Secure components includes. */
+    #include "secure_context.h"
+    #include "secure_init.h"
 #endif /* configENABLE_TRUSTZONE */
 
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
@@ -63,126 +62,127 @@
  * 3. Run FreeRTOS on the Non-Secure Side only i.e. no Secure Side function call support:
  *		configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 0
  */
-#if( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) )
-	#error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side.
+#if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) )
+    #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side.
 #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to manipulate the NVIC.
  */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portMIN_INTERRUPT_PRIORITY			( 255UL )
-#define portNVIC_PENDSV_PRI					( portMIN_INTERRUPT_PRIORITY << 16UL )
-#define portNVIC_SYSTICK_PRI				( portMIN_INTERRUPT_PRIORITY << 24UL )
+#define portNVIC_SYSTICK_CTRL_REG             ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG             ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG    ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SHPR3_REG                    ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_ENABLE_BIT           ( 1UL << 0UL )
+#define portNVIC_SYSTICK_INT_BIT              ( 1UL << 1UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT       ( 1UL << 16UL )
+#define portMIN_INTERRUPT_PRIORITY            ( 255UL )
+#define portNVIC_PENDSV_PRI                   ( portMIN_INTERRUPT_PRIORITY << 16UL )
+#define portNVIC_SYSTICK_PRI                  ( portMIN_INTERRUPT_PRIORITY << 24UL )
 #ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ			configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT		( 1UL << 2UL )
+    #define configSYSTICK_CLOCK_HZ            configCPU_CLOCK_HZ
+    /* Ensure the SysTick is clocked at the same frequency as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT          ( 1UL << 2UL )
 #else
-	/* The way the SysTick is clocked is not modified in case it is not the
-	 * same a the core. */
-	#define portNVIC_SYSTICK_CLK_BIT		( 0 )
+
+/* The way the SysTick is clocked is not modified in case it is not the
+ * same a the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 0 )
 #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to manipulate the SCB.
  */
-#define portSCB_SYS_HANDLER_CTRL_STATE_REG	( * ( volatile uint32_t * ) 0xe000ed24 )
-#define portSCB_MEM_FAULT_ENABLE_BIT		( 1UL << 16UL )
+#define portSCB_SYS_HANDLER_CTRL_STATE_REG    ( *( volatile uint32_t * ) 0xe000ed24 )
+#define portSCB_MEM_FAULT_ENABLE_BIT          ( 1UL << 16UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to manipulate the FPU.
  */
-#define portCPACR							( ( volatile uint32_t * ) 0xe000ed88 )	/* Coprocessor Access Control Register. */
-#define portCPACR_CP10_VALUE				( 3UL )
-#define portCPACR_CP11_VALUE				portCPACR_CP10_VALUE
-#define portCPACR_CP10_POS					( 20UL )
-#define portCPACR_CP11_POS					( 22UL )
+#define portCPACR               ( ( volatile uint32_t * ) 0xe000ed88 )              /* Coprocessor Access Control Register. */
+#define portCPACR_CP10_VALUE    ( 3UL )
+#define portCPACR_CP11_VALUE    portCPACR_CP10_VALUE
+#define portCPACR_CP10_POS      ( 20UL )
+#define portCPACR_CP11_POS      ( 22UL )
 
-#define portFPCCR							( ( volatile uint32_t * ) 0xe000ef34 )	/* Floating Point Context Control Register. */
-#define portFPCCR_ASPEN_POS					( 31UL )
-#define portFPCCR_ASPEN_MASK				( 1UL << portFPCCR_ASPEN_POS )
-#define portFPCCR_LSPEN_POS					( 30UL )
-#define portFPCCR_LSPEN_MASK				( 1UL << portFPCCR_LSPEN_POS )
+#define portFPCCR               ( ( volatile uint32_t * ) 0xe000ef34 )              /* Floating Point Context Control Register. */
+#define portFPCCR_ASPEN_POS     ( 31UL )
+#define portFPCCR_ASPEN_MASK    ( 1UL << portFPCCR_ASPEN_POS )
+#define portFPCCR_LSPEN_POS     ( 30UL )
+#define portFPCCR_LSPEN_MASK    ( 1UL << portFPCCR_LSPEN_POS )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to manipulate the MPU.
  */
-#define portMPU_TYPE_REG					( * ( ( volatile uint32_t * ) 0xe000ed90 ) )
-#define portMPU_CTRL_REG					( * ( ( volatile uint32_t * ) 0xe000ed94 ) )
-#define portMPU_RNR_REG						( * ( ( volatile uint32_t * ) 0xe000ed98 ) )
+#define portMPU_TYPE_REG                      ( *( ( volatile uint32_t * ) 0xe000ed90 ) )
+#define portMPU_CTRL_REG                      ( *( ( volatile uint32_t * ) 0xe000ed94 ) )
+#define portMPU_RNR_REG                       ( *( ( volatile uint32_t * ) 0xe000ed98 ) )
 
-#define portMPU_RBAR_REG					( * ( ( volatile uint32_t * ) 0xe000ed9c ) )
-#define portMPU_RLAR_REG					( * ( ( volatile uint32_t * ) 0xe000eda0 ) )
+#define portMPU_RBAR_REG                      ( *( ( volatile uint32_t * ) 0xe000ed9c ) )
+#define portMPU_RLAR_REG                      ( *( ( volatile uint32_t * ) 0xe000eda0 ) )
 
-#define portMPU_RBAR_A1_REG					( * ( ( volatile uint32_t * ) 0xe000eda4 ) )
-#define portMPU_RLAR_A1_REG					( * ( ( volatile uint32_t * ) 0xe000eda8 ) )
+#define portMPU_RBAR_A1_REG                   ( *( ( volatile uint32_t * ) 0xe000eda4 ) )
+#define portMPU_RLAR_A1_REG                   ( *( ( volatile uint32_t * ) 0xe000eda8 ) )
 
-#define portMPU_RBAR_A2_REG					( * ( ( volatile uint32_t * ) 0xe000edac ) )
-#define portMPU_RLAR_A2_REG					( * ( ( volatile uint32_t * ) 0xe000edb0 ) )
+#define portMPU_RBAR_A2_REG                   ( *( ( volatile uint32_t * ) 0xe000edac ) )
+#define portMPU_RLAR_A2_REG                   ( *( ( volatile uint32_t * ) 0xe000edb0 ) )
 
-#define portMPU_RBAR_A3_REG					( * ( ( volatile uint32_t * ) 0xe000edb4 ) )
-#define portMPU_RLAR_A3_REG					( * ( ( volatile uint32_t * ) 0xe000edb8 ) )
+#define portMPU_RBAR_A3_REG                   ( *( ( volatile uint32_t * ) 0xe000edb4 ) )
+#define portMPU_RLAR_A3_REG                   ( *( ( volatile uint32_t * ) 0xe000edb8 ) )
 
-#define portMPU_MAIR0_REG					( * ( ( volatile uint32_t * ) 0xe000edc0 ) )
-#define portMPU_MAIR1_REG					( * ( ( volatile uint32_t * ) 0xe000edc4 ) )
+#define portMPU_MAIR0_REG                     ( *( ( volatile uint32_t * ) 0xe000edc0 ) )
+#define portMPU_MAIR1_REG                     ( *( ( volatile uint32_t * ) 0xe000edc4 ) )
 
-#define portMPU_RBAR_ADDRESS_MASK			( 0xffffffe0 ) /* Must be 32-byte aligned. */
-#define portMPU_RLAR_ADDRESS_MASK			( 0xffffffe0 ) /* Must be 32-byte aligned. */
+#define portMPU_RBAR_ADDRESS_MASK             ( 0xffffffe0 ) /* Must be 32-byte aligned. */
+#define portMPU_RLAR_ADDRESS_MASK             ( 0xffffffe0 ) /* Must be 32-byte aligned. */
 
-#define portMPU_MAIR_ATTR0_POS				( 0UL )
-#define portMPU_MAIR_ATTR0_MASK				( 0x000000ff )
+#define portMPU_MAIR_ATTR0_POS                ( 0UL )
+#define portMPU_MAIR_ATTR0_MASK               ( 0x000000ff )
 
-#define portMPU_MAIR_ATTR1_POS				( 8UL )
-#define portMPU_MAIR_ATTR1_MASK				( 0x0000ff00 )
+#define portMPU_MAIR_ATTR1_POS                ( 8UL )
+#define portMPU_MAIR_ATTR1_MASK               ( 0x0000ff00 )
 
-#define portMPU_MAIR_ATTR2_POS				( 16UL )
-#define portMPU_MAIR_ATTR2_MASK				( 0x00ff0000 )
+#define portMPU_MAIR_ATTR2_POS                ( 16UL )
+#define portMPU_MAIR_ATTR2_MASK               ( 0x00ff0000 )
 
-#define portMPU_MAIR_ATTR3_POS				( 24UL )
-#define portMPU_MAIR_ATTR3_MASK				( 0xff000000 )
+#define portMPU_MAIR_ATTR3_POS                ( 24UL )
+#define portMPU_MAIR_ATTR3_MASK               ( 0xff000000 )
 
-#define portMPU_MAIR_ATTR4_POS				( 0UL )
-#define portMPU_MAIR_ATTR4_MASK				( 0x000000ff )
+#define portMPU_MAIR_ATTR4_POS                ( 0UL )
+#define portMPU_MAIR_ATTR4_MASK               ( 0x000000ff )
 
-#define portMPU_MAIR_ATTR5_POS				( 8UL )
-#define portMPU_MAIR_ATTR5_MASK				( 0x0000ff00 )
+#define portMPU_MAIR_ATTR5_POS                ( 8UL )
+#define portMPU_MAIR_ATTR5_MASK               ( 0x0000ff00 )
 
-#define portMPU_MAIR_ATTR6_POS				( 16UL )
-#define portMPU_MAIR_ATTR6_MASK				( 0x00ff0000 )
+#define portMPU_MAIR_ATTR6_POS                ( 16UL )
+#define portMPU_MAIR_ATTR6_MASK               ( 0x00ff0000 )
 
-#define portMPU_MAIR_ATTR7_POS				( 24UL )
-#define portMPU_MAIR_ATTR7_MASK				( 0xff000000 )
+#define portMPU_MAIR_ATTR7_POS                ( 24UL )
+#define portMPU_MAIR_ATTR7_MASK               ( 0xff000000 )
 
-#define portMPU_RLAR_ATTR_INDEX0			( 0UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX1			( 1UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX2			( 2UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX3			( 3UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX4			( 4UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX5			( 5UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX6			( 6UL << 1UL )
-#define portMPU_RLAR_ATTR_INDEX7			( 7UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX0              ( 0UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX1              ( 1UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX2              ( 2UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX3              ( 3UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX4              ( 4UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX5              ( 5UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX6              ( 6UL << 1UL )
+#define portMPU_RLAR_ATTR_INDEX7              ( 7UL << 1UL )
 
-#define portMPU_RLAR_REGION_ENABLE			( 1UL )
+#define portMPU_RLAR_REGION_ENABLE            ( 1UL )
 
 /* Enable privileged access to unmapped region. */
-#define portMPU_PRIV_BACKGROUND_ENABLE_BIT	( 1UL << 2UL )
+#define portMPU_PRIV_BACKGROUND_ENABLE_BIT    ( 1UL << 2UL )
 
 /* Enable MPU. */
-#define portMPU_ENABLE_BIT					( 1UL << 0UL )
+#define portMPU_ENABLE_BIT                    ( 1UL << 0UL )
 
 /* Expected value of the portMPU_TYPE register. */
-#define portEXPECTED_MPU_TYPE_VALUE			( 8UL << 8UL ) /* 8 regions, unified. */
+#define portEXPECTED_MPU_TYPE_VALUE           ( 8UL << 8UL ) /* 8 regions, unified. */
 /*-----------------------------------------------------------*/
 
 /**
@@ -190,53 +190,55 @@
  *
  * It is needed because the systick is a 24-bit counter.
  */
-#define portMAX_24_BIT_NUMBER				( 0xffffffUL )
+#define portMAX_24_BIT_NUMBER       ( 0xffffffUL )
 
 /**
  * @brief A fiddle factor to estimate the number of SysTick counts that would
  * have occurred while the SysTick counter is stopped during tickless idle
  * calculations.
  */
-#define portMISSED_COUNTS_FACTOR			( 45UL )
+#define portMISSED_COUNTS_FACTOR    ( 45UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Constants required to set up the initial stack.
  */
-#define portINITIAL_XPSR					( 0x01000000 )
+#define portINITIAL_XPSR    ( 0x01000000 )
 
-#if( configRUN_FREERTOS_SECURE_ONLY == 1 )
-	/**
-	 * @brief Initial EXC_RETURN value.
-	 *
-	 *     FF         FF         FF         FD
-	 * 1111 1111  1111 1111  1111 1111  1111 1101
-	 *
-	 * Bit[6] - 1 --> The exception was taken from the Secure state.
-	 * Bit[5] - 1 --> Do not skip stacking of additional state context.
-	 * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
-	 * Bit[3] - 1 --> Return to the Thread mode.
-	 * Bit[2] - 1 --> Restore registers from the process stack.
-	 * Bit[1] - 0 --> Reserved, 0.
-	 * Bit[0] - 1 --> The exception was taken to the Secure state.
-	 */
-	#define portINITIAL_EXC_RETURN			( 0xfffffffd )
+#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
+
+/**
+ * @brief Initial EXC_RETURN value.
+ *
+ *     FF         FF         FF         FD
+ * 1111 1111  1111 1111  1111 1111  1111 1101
+ *
+ * Bit[6] - 1 --> The exception was taken from the Secure state.
+ * Bit[5] - 1 --> Do not skip stacking of additional state context.
+ * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
+ * Bit[3] - 1 --> Return to the Thread mode.
+ * Bit[2] - 1 --> Restore registers from the process stack.
+ * Bit[1] - 0 --> Reserved, 0.
+ * Bit[0] - 1 --> The exception was taken to the Secure state.
+ */
+    #define portINITIAL_EXC_RETURN    ( 0xfffffffd )
 #else
-	/**
-	 * @brief Initial EXC_RETURN value.
-	 *
-	 *     FF         FF         FF         BC
-	 * 1111 1111  1111 1111  1111 1111  1011 1100
-	 *
-	 * Bit[6] - 0 --> The exception was taken from the Non-Secure state.
-	 * Bit[5] - 1 --> Do not skip stacking of additional state context.
-	 * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
-	 * Bit[3] - 1 --> Return to the Thread mode.
-	 * Bit[2] - 1 --> Restore registers from the process stack.
-	 * Bit[1] - 0 --> Reserved, 0.
-	 * Bit[0] - 0 --> The exception was taken to the Non-Secure state.
-	 */
-	#define portINITIAL_EXC_RETURN			( 0xffffffbc )
+
+/**
+ * @brief Initial EXC_RETURN value.
+ *
+ *     FF         FF         FF         BC
+ * 1111 1111  1111 1111  1111 1111  1011 1100
+ *
+ * Bit[6] - 0 --> The exception was taken from the Non-Secure state.
+ * Bit[5] - 1 --> Do not skip stacking of additional state context.
+ * Bit[4] - 1 --> The PE did not allocate space on the stack for FP context.
+ * Bit[3] - 1 --> Return to the Thread mode.
+ * Bit[2] - 1 --> Restore registers from the process stack.
+ * Bit[1] - 0 --> Reserved, 0.
+ * Bit[0] - 0 --> The exception was taken to the Non-Secure state.
+ */
+    #define portINITIAL_EXC_RETURN    ( 0xffffffbc )
 #endif /* configRUN_FREERTOS_SECURE_ONLY */
 
 /**
@@ -246,13 +248,13 @@
  *  Bit[0] = 0 ==> The task is privileged.
  *  Bit[0] = 1 ==> The task is not privileged.
  */
-#define portCONTROL_PRIVILEGED_MASK			( 1UL << 0UL )
+#define portCONTROL_PRIVILEGED_MASK         ( 1UL << 0UL )
 
 /**
  * @brief Initial CONTROL register values.
  */
-#define portINITIAL_CONTROL_UNPRIVILEGED	( 0x3 )
-#define portINITIAL_CONTROL_PRIVILEGED		( 0x2 )
+#define portINITIAL_CONTROL_UNPRIVILEGED    ( 0x3 )
+#define portINITIAL_CONTROL_PRIVILEGED      ( 0x2 )
 
 /**
  * @brief Let the user override the pre-loading of the initial LR with the
@@ -260,23 +262,23 @@
  * in the debugger.
  */
 #ifdef configTASK_RETURN_ADDRESS
-	#define portTASK_RETURN_ADDRESS			configTASK_RETURN_ADDRESS
+    #define portTASK_RETURN_ADDRESS    configTASK_RETURN_ADDRESS
 #else
-	#define portTASK_RETURN_ADDRESS			prvTaskExitError
+    #define portTASK_RETURN_ADDRESS    prvTaskExitError
 #endif
 
 /**
  * @brief If portPRELOAD_REGISTERS then registers will be given an initial value
  * when a task is created. This helps in debugging at the cost of code size.
  */
-#define portPRELOAD_REGISTERS				1
+#define portPRELOAD_REGISTERS    1
 
 /**
  * @brief A task is created without a secure context, and must call
  * portALLOCATE_SECURE_CONTEXT() to give itself a secure context before it makes
  * any secure calls.
  */
-#define portNO_SECURE_CONTEXT				0
+#define portNO_SECURE_CONTEXT    0
 /*-----------------------------------------------------------*/
 
 /**
@@ -285,18 +287,20 @@
  */
 static void prvTaskExitError( void );
 
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Setup the Memory Protection Unit (MPU).
-	 */
-	static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
+#if ( configENABLE_MPU == 1 )
+
+/**
+ * @brief Setup the Memory Protection Unit (MPU).
+ */
+    static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
 #endif /* configENABLE_MPU */
 
-#if( configENABLE_FPU == 1 )
-	/**
-	 * @brief Setup the Floating Point Unit (FPU).
-	 */
-	static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;
+#if ( configENABLE_FPU == 1 )
+
+/**
+ * @brief Setup the Floating Point Unit (FPU).
+ */
+    static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;
 #endif /* configENABLE_FPU */
 
 /**
@@ -338,812 +342,852 @@ void SysTick_Handler( void ) PRIVILEGED_FUNCTION;
 /**
  * @brief C part of SVC handler.
  */
-portDONT_DISCARD void vPortSVCHandler_C( uint32_t *pulCallerStackAddress ) PRIVILEGED_FUNCTION;
+portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIVILEGED_FUNCTION;
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Each task maintains its own interrupt status in the critical nesting
  * variable.
  */
-static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
+PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Saved as part of the task context to indicate which context the
-	 * task is using on the secure side.
-	 */
-	portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
+#if ( configENABLE_TRUSTZONE == 1 )
+
+/**
+ * @brief Saved as part of the task context to indicate which context the
+ * task is using on the secure side.
+ */
+    PRIVILEGED_DATA portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
 #endif /* configENABLE_TRUSTZONE */
 
-#if( configUSE_TICKLESS_IDLE == 1 )
-	/**
-	 * @brief The number of SysTick increments that make up one tick period.
-	 */
-	static uint32_t ulTimerCountsForOneTick = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
 
-	/**
-	 * @brief The maximum number of tick periods that can be suppressed is
-	 * limited by the 24 bit resolution of the SysTick timer.
-	 */
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
+/**
+ * @brief The number of SysTick increments that make up one tick period.
+ */
+    PRIVILEGED_DATA static uint32_t ulTimerCountsForOneTick = 0;
 
-	/**
-	 * @brief Compensate for the CPU cycles that pass while the SysTick is
-	 * stopped (low power functionality only).
-	 */
-	static uint32_t ulStoppedTimerCompensation = 0;
+/**
+ * @brief The maximum number of tick periods that can be suppressed is
+ * limited by the 24 bit resolution of the SysTick timer.
+ */
+    PRIVILEGED_DATA static uint32_t xMaximumPossibleSuppressedTicks = 0;
+
+/**
+ * @brief Compensate for the CPU cycles that pass while the SysTick is
+ * stopped (low power functionality only).
+ */
+    PRIVILEGED_DATA static uint32_t ulStoppedTimerCompensation = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TICKLESS_IDLE == 1 )
-	__attribute__(( weak )) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-	{
-	uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
-	TickType_t xModifiableIdleTime;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+    {
+        uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+        TickType_t xModifiableIdleTime;
 
-		/* Make sure the SysTick reload value does not overflow the counter. */
-		if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-		{
-			xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-		}
+        /* Make sure the SysTick reload value does not overflow the counter. */
+        if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+        {
+            xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+        }
 
-		/* Stop the SysTick momentarily. The time the SysTick is stopped for is
-		 * accounted for as best it can be, but using the tickless mode will
-		 * inevitably result in some tiny drift of the time maintained by the
-		 * kernel with respect to calendar time. */
-		portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+        /* Stop the SysTick momentarily. The time the SysTick is stopped for is
+         * accounted for as best it can be, but using the tickless mode will
+         * inevitably result in some tiny drift of the time maintained by the
+         * kernel with respect to calendar time. */
+        portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
 
-		/* Calculate the reload value required to wait xExpectedIdleTime
-		 * tick periods. -1 is used because this code will execute part way
-		 * through one of the tick periods. */
-		ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-		if( ulReloadValue > ulStoppedTimerCompensation )
-		{
-			ulReloadValue -= ulStoppedTimerCompensation;
-		}
+        /* Calculate the reload value required to wait xExpectedIdleTime
+         * tick periods. -1 is used because this code will execute part way
+         * through one of the tick periods. */
+        ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
 
-		/* Enter a critical section but don't use the taskENTER_CRITICAL()
-		 * method as that will mask interrupts that should exit sleep mode. */
-		__asm volatile( "cpsid i" ::: "memory" );
-		__asm volatile( "dsb" );
-		__asm volatile( "isb" );
+        if( ulReloadValue > ulStoppedTimerCompensation )
+        {
+            ulReloadValue -= ulStoppedTimerCompensation;
+        }
 
-		/* If a context switch is pending or a task is waiting for the scheduler
-		 * to be un-suspended then abandon the low power entry. */
-		if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-		{
-			/* Restart from whatever is left in the count register to complete
-			 * this tick period. */
-			portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+        /* Enter a critical section but don't use the taskENTER_CRITICAL()
+         * method as that will mask interrupts that should exit sleep mode. */
+        __asm volatile ( "cpsid i" ::: "memory" );
+        __asm volatile ( "dsb" );
+        __asm volatile ( "isb" );
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+        /* If a context switch is pending or a task is waiting for the scheduler
+         * to be un-suspended then abandon the low power entry. */
+        if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+        {
+            /* Restart from whatever is left in the count register to complete
+             * this tick period. */
+            portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Reset the reload register to the value required for normal tick
-			 * periods. */
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts - see comments above the cpsid instruction()
-			 * above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-		else
-		{
-			/* Set the new reload value. */
-			portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+            /* Reset the reload register to the value required for normal tick
+             * periods. */
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
 
-			/* Clear the SysTick count flag and set the count value back to
-			 * zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            /* Re-enable interrupts - see comments above the cpsid instruction()
+             * above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+        else
+        {
+            /* Set the new reload value. */
+            portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            /* Clear the SysTick count flag and set the count value back to
+             * zero. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-			/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
-			 * set its parameter to 0 to indicate that its implementation
-			 * contains its own wait for interrupt or wait for event
-			 * instruction, and so wfi should not be executed again. However,
-			 * the original expected idle time variable must remain unmodified,
-			 * so a copy is taken. */
-			xModifiableIdleTime = xExpectedIdleTime;
-			configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-			if( xModifiableIdleTime > 0 )
-			{
-				__asm volatile( "dsb" ::: "memory" );
-				__asm volatile( "wfi" );
-				__asm volatile( "isb" );
-			}
-			configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts to allow the interrupt that brought the MCU
-			 * out of sleep mode to execute immediately. See comments above
-			 * the cpsid instruction above. */
-			__asm volatile( "cpsie i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
+            /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
+             * set its parameter to 0 to indicate that its implementation
+             * contains its own wait for interrupt or wait for event
+             * instruction, and so wfi should not be executed again. However,
+             * the original expected idle time variable must remain unmodified,
+             * so a copy is taken. */
+            xModifiableIdleTime = xExpectedIdleTime;
+            configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
 
-			/* Disable interrupts again because the clock is about to be stopped
-			 * and interrupts that execute while the clock is stopped will
-			 * increase any slippage between the time maintained by the RTOS and
-			 * calendar time. */
-			__asm volatile( "cpsid i" ::: "memory" );
-			__asm volatile( "dsb" );
-			__asm volatile( "isb" );
+            if( xModifiableIdleTime > 0 )
+            {
+                __asm volatile ( "dsb" ::: "memory" );
+                __asm volatile ( "wfi" );
+                __asm volatile ( "isb" );
+            }
 
-			/* Disable the SysTick clock without reading the
-			 * portNVIC_SYSTICK_CTRL_REG register to ensure the
-			 * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
-			 * Again, the time the SysTick is stopped for is accounted for as
-			 * best it can be, but using the tickless mode will inevitably
-			 * result in some tiny drift of the time maintained by the kernel
-			 * with respect to calendar time*/
-			portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+            configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
 
-			/* Determine if the SysTick clock has already counted to zero and
-			 * been set back to the current reload value (the reload back being
-			 * correct for the entire expected idle time) or if the SysTick is
-			 * yet to count to zero (in which case an interrupt other than the
-			 * SysTick must have brought the system out of sleep mode). */
-			if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-			{
-				uint32_t ulCalculatedLoadValue;
+            /* Re-enable interrupts to allow the interrupt that brought the MCU
+             * out of sleep mode to execute immediately. See comments above
+             * the cpsid instruction above. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
 
-				/* The tick interrupt is already pending, and the SysTick count
-				 * reloaded with ulReloadValue.  Reset the
-				 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
-				 * period. */
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+            /* Disable interrupts again because the clock is about to be stopped
+             * and interrupts that execute while the clock is stopped will
+             * increase any slippage between the time maintained by the RTOS and
+             * calendar time. */
+            __asm volatile ( "cpsid i" ::: "memory" );
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
 
-				/* Don't allow a tiny value, or values that have somehow
-				 * underflowed because the post sleep hook did something
-				 * that took too long. */
-				if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-				{
-					ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-				}
+            /* Disable the SysTick clock without reading the
+             * portNVIC_SYSTICK_CTRL_REG register to ensure the
+             * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
+             * Again, the time the SysTick is stopped for is accounted for as
+             * best it can be, but using the tickless mode will inevitably
+             * result in some tiny drift of the time maintained by the kernel
+             * with respect to calendar time*/
+            portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
 
-				portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+            /* Determine if the SysTick clock has already counted to zero and
+             * been set back to the current reload value (the reload back being
+             * correct for the entire expected idle time) or if the SysTick is
+             * yet to count to zero (in which case an interrupt other than the
+             * SysTick must have brought the system out of sleep mode). */
+            if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+            {
+                uint32_t ulCalculatedLoadValue;
 
-				/* As the pending tick will be processed as soon as this
-				 * function exits, the tick value maintained by the tick is
-				 * stepped forward by one less than the time spent waiting. */
-				ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-			}
-			else
-			{
-				/* Something other than the tick interrupt ended the sleep.
-				 * Work out how long the sleep lasted rounded to complete tick
-				 * periods (not the ulReload value which accounted for part
-				 * ticks). */
-				ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+                /* The tick interrupt is already pending, and the SysTick count
+                 * reloaded with ulReloadValue.  Reset the
+                 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+                 * period. */
+                ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
 
-				/* How many complete tick periods passed while the processor
-				 * was waiting? */
-				ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+                /* Don't allow a tiny value, or values that have somehow
+                 * underflowed because the post sleep hook did something
+                 * that took too long. */
+                if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+                {
+                    ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+                }
 
-				/* The reload value is set to whatever fraction of a single tick
-				 * period remains. */
-				portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-			}
+                portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
 
-			/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
-			 * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
-			 * value. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-			vTaskStepTick( ulCompleteTickPeriods );
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+                /* As the pending tick will be processed as soon as this
+                 * function exits, the tick value maintained by the tick is
+                 * stepped forward by one less than the time spent waiting. */
+                ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+            }
+            else
+            {
+                /* Something other than the tick interrupt ended the sleep.
+                 * Work out how long the sleep lasted rounded to complete tick
+                 * periods (not the ulReload value which accounted for part
+                 * ticks). */
+                ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Exit with interrupts enabled. */
-			__asm volatile( "cpsie i" ::: "memory" );
-		}
-	}
+                /* How many complete tick periods passed while the processor
+                 * was waiting? */
+                ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+                /* The reload value is set to whatever fraction of a single tick
+                 * period remains. */
+                portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+            }
+
+            /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+             * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+             * value. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            vTaskStepTick( ulCompleteTickPeriods );
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Exit with interrupts enabled. */
+            __asm volatile ( "cpsie i" ::: "memory" );
+        }
+    }
 #endif /* configUSE_TICKLESS_IDLE */
 /*-----------------------------------------------------------*/
 
-__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
+__attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
 {
-	/* Calculate the constants required to configure the tick interrupt. */
-	#if( configUSE_TICKLESS_IDLE == 1 )
-	{
-		ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
-		xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
-	}
-	#endif /* configUSE_TICKLESS_IDLE */
+    /* Calculate the constants required to configure the tick interrupt. */
+    #if ( configUSE_TICKLESS_IDLE == 1 )
+        {
+            ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+            xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+            ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+        }
+    #endif /* configUSE_TICKLESS_IDLE */
 
-	/* Stop and reset the SysTick. */
-	portNVIC_SYSTICK_CTRL_REG = 0UL;
-	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+    /* Stop and reset the SysTick. */
+    portNVIC_SYSTICK_CTRL_REG = 0UL;
+    portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-	/* Configure SysTick to interrupt at the requested rate. */
-	portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
+    /* Configure SysTick to interrupt at the requested rate. */
+    portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+    portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
 }
 /*-----------------------------------------------------------*/
 
 static void prvTaskExitError( void )
 {
-volatile uint32_t ulDummy = 0UL;
+    volatile uint32_t ulDummy = 0UL;
 
-	/* A function that implements a task must not exit or attempt to return to
-	 * its caller as there is nothing to return to. If a task wants to exit it
-	 * should instead call vTaskDelete( NULL ). Artificially force an assert()
-	 * to be triggered if configASSERT() is defined, then stop here so
-	 * application writers can catch the error. */
-	configASSERT( ulCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to. If a task wants to exit it
+     * should instead call vTaskDelete( NULL ). Artificially force an assert()
+     * to be triggered if configASSERT() is defined, then stop here so
+     * application writers can catch the error. */
+    configASSERT( ulCriticalNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
 
-	while( ulDummy == 0 )
-	{
-		/* This file calls prvTaskExitError() after the scheduler has been
-		 * started to remove a compiler warning about the function being
-		 * defined but never called.  ulDummy is used purely to quieten other
-		 * warnings about code appearing after this function is called - making
-		 * ulDummy volatile makes the compiler think the function could return
-		 * and therefore not output an 'unreachable code' warning for code that
-		 * appears after it. */
-	}
+    while( ulDummy == 0 )
+    {
+        /* This file calls prvTaskExitError() after the scheduler has been
+         * started to remove a compiler warning about the function being
+         * defined but never called.  ulDummy is used purely to quieten other
+         * warnings about code appearing after this function is called - making
+         * ulDummy volatile makes the compiler think the function could return
+         * and therefore not output an 'unreachable code' warning for code that
+         * appears after it. */
+    }
 }
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
-	{
-	#if defined( __ARMCC_VERSION )
-		/* Declaration when these variable are defined in code instead of being
-		 * exported from linker scripts. */
-		extern uint32_t * __privileged_functions_start__;
-		extern uint32_t * __privileged_functions_end__;
-		extern uint32_t * __syscalls_flash_start__;
-		extern uint32_t * __syscalls_flash_end__;
-		extern uint32_t * __unprivileged_flash_start__;
-		extern uint32_t * __unprivileged_flash_end__;
-		extern uint32_t * __privileged_sram_start__;
-		extern uint32_t * __privileged_sram_end__;
-	#else
-		/* Declaration when these variable are exported from linker scripts. */
-		extern uint32_t __privileged_functions_start__[];
-		extern uint32_t __privileged_functions_end__[];
-		extern uint32_t __syscalls_flash_start__[];
-		extern uint32_t __syscalls_flash_end__[];
-		extern uint32_t __unprivileged_flash_start__[];
-		extern uint32_t __unprivileged_flash_end__[];
-		extern uint32_t __privileged_sram_start__[];
-		extern uint32_t __privileged_sram_end__[];
-	#endif /* defined( __ARMCC_VERSION ) */
+#if ( configENABLE_MPU == 1 )
+    static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
+    {
+        #if defined( __ARMCC_VERSION )
 
-		/* Check that the MPU is present. */
-		if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
-		{
-			/* MAIR0 - Index 0. */
-			portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
-			/* MAIR0 - Index 1. */
-			portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __privileged_functions_start__;
+            extern uint32_t * __privileged_functions_end__;
+            extern uint32_t * __syscalls_flash_start__;
+            extern uint32_t * __syscalls_flash_end__;
+            extern uint32_t * __unprivileged_flash_start__;
+            extern uint32_t * __unprivileged_flash_end__;
+            extern uint32_t * __privileged_sram_start__;
+            extern uint32_t * __privileged_sram_end__;
+        #else /* if defined( __ARMCC_VERSION ) */
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __privileged_functions_start__[];
+            extern uint32_t __privileged_functions_end__[];
+            extern uint32_t __syscalls_flash_start__[];
+            extern uint32_t __syscalls_flash_end__[];
+            extern uint32_t __unprivileged_flash_start__[];
+            extern uint32_t __unprivileged_flash_end__[];
+            extern uint32_t __privileged_sram_start__[];
+            extern uint32_t __privileged_sram_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
 
-			/* Setup privileged flash as Read Only so that privileged tasks can
-			 * read it but not modify. */
-			portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_PRIVILEGED_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
+        /* Check that the MPU is present. */
+        if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
+        {
+            /* MAIR0 - Index 0. */
+            portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
+            /* MAIR0 - Index 1. */
+            portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
 
-			/* Setup unprivileged flash as Read Only by both privileged and
-			 * unprivileged tasks. All tasks can read it but no-one can modify. */
-			portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
+            /* Setup privileged flash as Read Only so that privileged tasks can
+             * read it but not modify. */
+            portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_PRIVILEGED_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
 
-			/* Setup unprivileged syscalls flash as Read Only by both privileged
-			 * and unprivileged tasks. All tasks can read it but no-one can modify. */
-			portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_READ_ONLY );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
+            /* Setup unprivileged flash as Read Only by both privileged and
+             * unprivileged tasks. All tasks can read it but no-one can modify. */
+            portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
 
-			/* Setup RAM containing kernel data for privileged access only. */
-			portMPU_RNR_REG = portPRIVILEGED_RAM_REGION;
-			portMPU_RBAR_REG =	( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
-								( portMPU_REGION_NON_SHAREABLE ) |
-								( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
-								( portMPU_REGION_EXECUTE_NEVER );
-			portMPU_RLAR_REG =	( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
-								( portMPU_RLAR_ATTR_INDEX0 ) |
-								( portMPU_RLAR_REGION_ENABLE );
+            /* Setup unprivileged syscalls flash as Read Only by both privileged
+             * and unprivileged tasks. All tasks can read it but no-one can modify. */
+            portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_READ_ONLY );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
 
-			/* Enable mem fault. */
-			portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
+            /* Setup RAM containing kernel data for privileged access only. */
+            portMPU_RNR_REG = portPRIVILEGED_RAM_REGION;
+            portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
+                               ( portMPU_REGION_NON_SHAREABLE ) |
+                               ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
+                               ( portMPU_REGION_EXECUTE_NEVER );
+            portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |
+                               ( portMPU_RLAR_ATTR_INDEX0 ) |
+                               ( portMPU_RLAR_REGION_ENABLE );
 
-			/* Enable MPU with privileged background access i.e. unmapped
-			 * regions have privileged access. */
-			portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
-		}
-	}
+            /* Enable mem fault. */
+            portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
+
+            /* Enable MPU with privileged background access i.e. unmapped
+             * regions have privileged access. */
+            portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
+        }
+    }
 #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_FPU == 1 )
-	static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
-	{
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			/* Enable non-secure access to the FPU. */
-			SecureInit_EnableNSFPUAccess();
-		}
-		#endif /* configENABLE_TRUSTZONE */
+#if ( configENABLE_FPU == 1 )
+    static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
+    {
+        #if ( configENABLE_TRUSTZONE == 1 )
+            {
+                /* Enable non-secure access to the FPU. */
+                SecureInit_EnableNSFPUAccess();
+            }
+        #endif /* configENABLE_TRUSTZONE */
 
-		/* CP10 = 11 ==> Full access to FPU i.e. both privileged and
-		 * unprivileged code should be able to access FPU. CP11 should be
-		 * programmed to the same value as CP10. */
-		*( portCPACR ) |=	(	( portCPACR_CP10_VALUE << portCPACR_CP10_POS ) |
-								( portCPACR_CP11_VALUE << portCPACR_CP11_POS )
-							);
+        /* CP10 = 11 ==> Full access to FPU i.e. both privileged and
+         * unprivileged code should be able to access FPU. CP11 should be
+         * programmed to the same value as CP10. */
+        *( portCPACR ) |= ( ( portCPACR_CP10_VALUE << portCPACR_CP10_POS ) |
+                            ( portCPACR_CP11_VALUE << portCPACR_CP11_POS )
+                            );
 
-		/* ASPEN = 1 ==> Hardware should automatically preserve floating point
-		 * context on exception entry and restore on exception return.
-		 * LSPEN = 1 ==> Enable lazy context save of FP state. */
-		*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
-	}
+        /* ASPEN = 1 ==> Hardware should automatically preserve floating point
+         * context on exception entry and restore on exception return.
+         * LSPEN = 1 ==> Enable lazy context save of FP state. */
+        *( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
+    }
 #endif /* configENABLE_FPU */
 /*-----------------------------------------------------------*/
 
 void vPortYield( void ) /* PRIVILEGED_FUNCTION */
 {
-	/* Set a PendSV to request a context switch. */
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+    /* Set a PendSV to request a context switch. */
+    portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
 
-	/* Barriers are normally not required but do ensure the code is
-	 * completely within the specified behaviour for the architecture. */
-	__asm volatile( "dsb" ::: "memory" );
-	__asm volatile( "isb" );
+    /* Barriers are normally not required but do ensure the code is
+     * completely within the specified behaviour for the architecture. */
+    __asm volatile ( "dsb" ::: "memory" );
+    __asm volatile ( "isb" );
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */
 {
-	portDISABLE_INTERRUPTS();
-	ulCriticalNesting++;
+    portDISABLE_INTERRUPTS();
+    ulCriticalNesting++;
 
-	/* Barriers are normally not required but do ensure the code is
-	 * completely within the specified behaviour for the architecture. */
-	__asm volatile( "dsb" ::: "memory" );
-	__asm volatile( "isb" );
+    /* Barriers are normally not required but do ensure the code is
+     * completely within the specified behaviour for the architecture. */
+    __asm volatile ( "dsb" ::: "memory" );
+    __asm volatile ( "isb" );
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */
 {
-	configASSERT( ulCriticalNesting );
-	ulCriticalNesting--;
+    configASSERT( ulCriticalNesting );
+    ulCriticalNesting--;
 
-	if( ulCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
+    if( ulCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
 }
 /*-----------------------------------------------------------*/
 
 void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
 {
-uint32_t ulPreviousMask;
+    uint32_t ulPreviousMask;
 
-	ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* Pend a context switch. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
+    ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* Pend a context switch. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
 }
 /*-----------------------------------------------------------*/
 
-void vPortSVCHandler_C( uint32_t *pulCallerStackAddress ) /* PRIVILEGED_FUNCTION portDONT_DISCARD */
+void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTION portDONT_DISCARD */
 {
-#if( configENABLE_MPU == 1 )
-	#if defined( __ARMCC_VERSION )
-		/* Declaration when these variable are defined in code instead of being
-		 * exported from linker scripts. */
-		extern uint32_t * __syscalls_flash_start__;
-		extern uint32_t * __syscalls_flash_end__;
-	#else
-		/* Declaration when these variable are exported from linker scripts. */
-		extern uint32_t __syscalls_flash_start__[];
-		extern uint32_t __syscalls_flash_end__[];
-	#endif /* defined( __ARMCC_VERSION ) */
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        #if defined( __ARMCC_VERSION )
 
-uint32_t ulPC;
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __syscalls_flash_start__;
+            extern uint32_t * __syscalls_flash_end__;
+        #else
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __syscalls_flash_start__[];
+            extern uint32_t __syscalls_flash_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
+    #endif /* configENABLE_MPU */
 
-#if( configENABLE_TRUSTZONE == 1 )
-	uint32_t ulR0;
-	#if( configENABLE_MPU == 1 )
-		uint32_t ulControl, ulIsTaskPrivileged;
-	#endif /* configENABLE_MPU */
-#endif /* configENABLE_TRUSTZONE */
-uint8_t ucSVCNumber;
+    uint32_t ulPC;
 
-	/* Register are stored on the stack in the following order - R0, R1, R2, R3,
-	 * R12, LR, PC, xPSR. */
-	ulPC = pulCallerStackAddress[ 6 ];
-	ucSVCNumber = ( ( uint8_t *) ulPC )[ -2 ];
+    #if ( configENABLE_TRUSTZONE == 1 )
+        uint32_t ulR0;
+        #if ( configENABLE_MPU == 1 )
+            uint32_t ulControl, ulIsTaskPrivileged;
+        #endif /* configENABLE_MPU */
+    #endif /* configENABLE_TRUSTZONE */
+    uint8_t ucSVCNumber;
 
-	switch( ucSVCNumber )
-	{
-		#if( configENABLE_TRUSTZONE == 1 )
-			case portSVC_ALLOCATE_SECURE_CONTEXT:
-			{
-				/* R0 contains the stack size passed as parameter to the
-				 * vPortAllocateSecureContext function. */
-				ulR0 = pulCallerStackAddress[ 0 ];
+    /* Register are stored on the stack in the following order - R0, R1, R2, R3,
+     * R12, LR, PC, xPSR. */
+    ulPC = pulCallerStackAddress[ 6 ];
+    ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ];
 
-				#if( configENABLE_MPU == 1 )
-				{
-					/* Read the CONTROL register value. */
-					__asm volatile ( "mrs %0, control"  : "=r" ( ulControl ) );
+    switch( ucSVCNumber )
+    {
+        #if ( configENABLE_TRUSTZONE == 1 )
+            case portSVC_ALLOCATE_SECURE_CONTEXT:
 
-					/* The task that raised the SVC is privileged if Bit[0]
-					 * in the CONTROL register is 0. */
-					ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 );
+                /* R0 contains the stack size passed as parameter to the
+                 * vPortAllocateSecureContext function. */
+                ulR0 = pulCallerStackAddress[ 0 ];
 
-					/* Allocate and load a context for the secure task. */
-					xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged );
-				}
-				#else
-				{
-					/* Allocate and load a context for the secure task. */
-					xSecureContext = SecureContext_AllocateContext( ulR0 );
-				}
-				#endif /* configENABLE_MPU */
+                #if ( configENABLE_MPU == 1 )
+                    {
+                        /* Read the CONTROL register value. */
+                        __asm volatile ( "mrs %0, control"  : "=r" ( ulControl ) );
 
-				configASSERT( xSecureContext != NULL );
-				SecureContext_LoadContext( xSecureContext );
-			}
-			break;
+                        /* The task that raised the SVC is privileged if Bit[0]
+                         * in the CONTROL register is 0. */
+                        ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 );
 
-			case portSVC_FREE_SECURE_CONTEXT:
-			{
-				/* R0 contains the secure context handle to be freed. */
-				ulR0 = pulCallerStackAddress[ 0 ];
+                        /* Allocate and load a context for the secure task. */
+                        xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged );
+                    }
+                #else /* if ( configENABLE_MPU == 1 ) */
+                    {
+                        /* Allocate and load a context for the secure task. */
+                        xSecureContext = SecureContext_AllocateContext( ulR0 );
+                    }
+                #endif /* configENABLE_MPU */
 
-				/* Free the secure context. */
-				SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 );
-			}
-			break;
-		#endif /* configENABLE_TRUSTZONE */
+                configASSERT( xSecureContext != NULL );
+                SecureContext_LoadContext( xSecureContext );
+                break;
 
-		case portSVC_START_SCHEDULER:
-		{
-			#if( configENABLE_TRUSTZONE == 1 )
-			{
-				/* De-prioritize the non-secure exceptions so that the
-				 * non-secure pendSV runs at the lowest priority. */
-				SecureInit_DePrioritizeNSExceptions();
+            case portSVC_FREE_SECURE_CONTEXT:
+                /* R0 contains the secure context handle to be freed. */
+                ulR0 = pulCallerStackAddress[ 0 ];
 
-				/* Initialize the secure context management system. */
-				SecureContext_Init();
-			}
-			#endif /* configENABLE_TRUSTZONE */
+                /* Free the secure context. */
+                SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 );
+                break;
+        #endif /* configENABLE_TRUSTZONE */
 
-			#if( configENABLE_FPU == 1 )
-			{
-				/* Setup the Floating Point Unit (FPU). */
-				prvSetupFPU();
-			}
-			#endif /* configENABLE_FPU */
+        case portSVC_START_SCHEDULER:
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    /* De-prioritize the non-secure exceptions so that the
+                     * non-secure pendSV runs at the lowest priority. */
+                    SecureInit_DePrioritizeNSExceptions();
 
-			/* Setup the context of the first task so that the first task starts
-			 * executing. */
-			vRestoreContextOfFirstTask();
-		}
-		break;
+                    /* Initialize the secure context management system. */
+                    SecureContext_Init();
+                }
+            #endif /* configENABLE_TRUSTZONE */
 
-		#if( configENABLE_MPU == 1 )
-			case portSVC_RAISE_PRIVILEGE:
-			{
-				/* Only raise the privilege, if the svc was raised from any of
-				 * the system calls. */
-				if( ulPC >= ( uint32_t ) __syscalls_flash_start__ &&
-					ulPC <= ( uint32_t ) __syscalls_flash_end__ )
-				{
-					vRaisePrivilege();
-				}
-			}
-			break;
-		#endif /* configENABLE_MPU */
+            #if ( configENABLE_FPU == 1 )
+                {
+                    /* Setup the Floating Point Unit (FPU). */
+                    prvSetupFPU();
+                }
+            #endif /* configENABLE_FPU */
 
-		default:
-		{
-			/* Incorrect SVC call. */
-			configASSERT( pdFALSE );
-		}
-	}
+            /* Setup the context of the first task so that the first task starts
+             * executing. */
+            vRestoreContextOfFirstTask();
+            break;
+
+            #if ( configENABLE_MPU == 1 )
+                case portSVC_RAISE_PRIVILEGE:
+
+                    /* Only raise the privilege, if the svc was raised from any of
+                     * the system calls. */
+                    if( ( ulPC >= ( uint32_t ) __syscalls_flash_start__ ) &&
+                        ( ulPC <= ( uint32_t ) __syscalls_flash_end__ ) )
+                    {
+                        vRaisePrivilege();
+                    }
+                    break;
+            #endif /* configENABLE_MPU */
+
+        default:
+            /* Incorrect SVC call. */
+            configASSERT( pdFALSE );
+    }
 }
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */
+/* *INDENT-OFF* */
+#if ( configENABLE_MPU == 1 )
+    StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                         StackType_t * pxEndOfStack,
+                                         TaskFunction_t pxCode,
+                                         void * pvParameters,
+                                         BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */
 #else
-	StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters ) /* PRIVILEGED_FUNCTION */
+    StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                         StackType_t * pxEndOfStack,
+                                         TaskFunction_t pxCode,
+                                         void * pvParameters ) /* PRIVILEGED_FUNCTION */
 #endif /* configENABLE_MPU */
+/* *INDENT-ON* */
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	 * interrupt. */
-	#if( portPRELOAD_REGISTERS == 0 )
-	{
-		pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-		*pxTopOfStack = portINITIAL_XPSR;							/* xPSR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxCode;						/* PC */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
-		pxTopOfStack -= 5;											/* R12, R3, R2 and R1. */
-		*pxTopOfStack = ( StackType_t ) pvParameters;				/* R0 */
-		pxTopOfStack -= 9;											/* R11..R4, EXC_RETURN. */
-		*pxTopOfStack = portINITIAL_EXC_RETURN;
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
+    #if ( portPRELOAD_REGISTERS == 0 )
+        {
+            pxTopOfStack--;                                          /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+            *pxTopOfStack = portINITIAL_XPSR;                        /* xPSR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxCode;                  /* PC */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
+            pxTopOfStack -= 5;                                       /* R12, R3, R2 and R1. */
+            *pxTopOfStack = ( StackType_t ) pvParameters;            /* R0 */
+            pxTopOfStack -= 9;                                       /* R11..R4, EXC_RETURN. */
+            *pxTopOfStack = portINITIAL_EXC_RETURN;
 
-		#if( configENABLE_MPU == 1 )
-		{
-			pxTopOfStack--;
-			if( xRunPrivileged == pdTRUE )
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED;		/* Slot used to hold this task's CONTROL value. */
-			}
-			else
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED;	/* Slot used to hold this task's CONTROL value. */
-			}
-		}
-		#endif /* configENABLE_MPU */
+            #if ( configENABLE_MPU == 1 )
+                {
+                    pxTopOfStack--;
 
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxEndOfStack;	/* Slot used to hold this task's PSPLIM value. */
+                    if( xRunPrivileged == pdTRUE )
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                    else
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                }
+            #endif /* configENABLE_MPU */
 
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			pxTopOfStack--;
-			*pxTopOfStack = portNO_SECURE_CONTEXT;		/* Slot used to hold this task's xSecureContext value. */
-		}
-		#endif /* configENABLE_TRUSTZONE */
-	}
-	#else /* portPRELOAD_REGISTERS */
-	{
-		pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-		*pxTopOfStack = portINITIAL_XPSR;							/* xPSR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxCode;						/* PC */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x12121212UL;				/* R12 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x03030303UL;				/* R3 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x02020202UL;				/* R2 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x01010101UL;				/* R1 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pvParameters;				/* R0 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x11111111UL;				/* R11 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x10101010UL;				/* R10 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x09090909UL;				/* R09 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x08080808UL;				/* R08 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x07070707UL;				/* R07 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x06060606UL;				/* R06 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x05050505UL;				/* R05 */
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) 0x04040404UL;				/* R04 */
-		pxTopOfStack--;
-		*pxTopOfStack = portINITIAL_EXC_RETURN;						/* EXC_RETURN */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */
 
-		#if( configENABLE_MPU == 1 )
-		{
-			pxTopOfStack--;
-			if( xRunPrivileged == pdTRUE )
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED;		/* Slot used to hold this task's CONTROL value. */
-			}
-			else
-			{
-				*pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED;	/* Slot used to hold this task's CONTROL value. */
-			}
-		}
-		#endif /* configENABLE_MPU */
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    pxTopOfStack--;
+                    *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */
+                }
+            #endif /* configENABLE_TRUSTZONE */
+        }
+    #else /* portPRELOAD_REGISTERS */
+        {
+            pxTopOfStack--;                                          /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+            *pxTopOfStack = portINITIAL_XPSR;                        /* xPSR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxCode;                  /* PC */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x12121212UL;            /* R12 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x03030303UL;            /* R3 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x02020202UL;            /* R2 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x01010101UL;            /* R1 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pvParameters;            /* R0 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x11111111UL;            /* R11 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x10101010UL;            /* R10 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x09090909UL;            /* R09 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x08080808UL;            /* R08 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x07070707UL;            /* R07 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x06060606UL;            /* R06 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x05050505UL;            /* R05 */
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) 0x04040404UL;            /* R04 */
+            pxTopOfStack--;
+            *pxTopOfStack = portINITIAL_EXC_RETURN;                  /* EXC_RETURN */
 
-		pxTopOfStack--;
-		*pxTopOfStack = ( StackType_t ) pxEndOfStack;	/* Slot used to hold this task's PSPLIM value. */
+            #if ( configENABLE_MPU == 1 )
+                {
+                    pxTopOfStack--;
 
-		#if( configENABLE_TRUSTZONE == 1 )
-		{
-			pxTopOfStack--;
-			*pxTopOfStack = portNO_SECURE_CONTEXT;		/* Slot used to hold this task's xSecureContext value. */
-		}
-		#endif /* configENABLE_TRUSTZONE */
-	}
-	#endif /* portPRELOAD_REGISTERS */
+                    if( xRunPrivileged == pdTRUE )
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_PRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                    else
+                    {
+                        *pxTopOfStack = portINITIAL_CONTROL_UNPRIVILEGED; /* Slot used to hold this task's CONTROL value. */
+                    }
+                }
+            #endif /* configENABLE_MPU */
 
-	return pxTopOfStack;
+            pxTopOfStack--;
+            *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */
+
+            #if ( configENABLE_TRUSTZONE == 1 )
+                {
+                    pxTopOfStack--;
+                    *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */
+                }
+            #endif /* configENABLE_TRUSTZONE */
+        }
+    #endif /* portPRELOAD_REGISTERS */
+
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
 {
-	/* Make PendSV, CallSV and SysTick the same priority as the kernel. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+    /* Make PendSV, CallSV and SysTick the same priority as the kernel. */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
-	#if( configENABLE_MPU == 1 )
-	{
-		/* Setup the Memory Protection Unit (MPU). */
-		prvSetupMPU();
-	}
-	#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        {
+            /* Setup the Memory Protection Unit (MPU). */
+            prvSetupMPU();
+        }
+    #endif /* configENABLE_MPU */
 
-	/* Start the timer that generates the tick ISR. Interrupts are disabled
-	 * here already. */
-	vPortSetupTimerInterrupt();
+    /* Start the timer that generates the tick ISR. Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
 
-	/* Initialize the critical nesting count ready for the first task. */
-	ulCriticalNesting = 0;
+    /* Initialize the critical nesting count ready for the first task. */
+    ulCriticalNesting = 0;
 
-	/* Start the first task. */
-	vStartFirstTask();
+    /* Start the first task. */
+    vStartFirstTask();
 
-	/* Should never get here as the tasks will now be executing. Call the task
-	 * exit error function to prevent compiler warnings about a static function
-	 * not being called in the case that the application writer overrides this
-	 * functionality by defining configTASK_RETURN_ADDRESS. Call
-	 * vTaskSwitchContext() so link time optimization does not remove the
-	 * symbol. */
-	vTaskSwitchContext();
-	prvTaskExitError();
+    /* Should never get here as the tasks will now be executing. Call the task
+     * exit error function to prevent compiler warnings about a static function
+     * not being called in the case that the application writer overrides this
+     * functionality by defining configTASK_RETURN_ADDRESS. Call
+     * vTaskSwitchContext() so link time optimization does not remove the
+     * symbol. */
+    vTaskSwitchContext();
+    prvTaskExitError();
 
-	/* Should not get here. */
-	return 0;
+    /* Should not get here. */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
 {
-	/* Not implemented in ports where there is nothing to return to.
-	 * Artificially force an assert. */
-	configASSERT( ulCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( ulCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t ulStackDepth )
-	{
-	uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
-	int32_t lIndex = 0;
+#if ( configENABLE_MPU == 1 )
+    void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
+                                    const struct xMEMORY_REGION * const xRegions,
+                                    StackType_t * pxBottomOfStack,
+                                    uint32_t ulStackDepth )
+    {
+        uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
+        int32_t lIndex = 0;
 
-		/* Setup MAIR0. */
-		xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
-		xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
+        #if defined( __ARMCC_VERSION )
 
-		/* This function is called automatically when the task is created - in
-		 * which case the stack region parameters will be valid.  At all other
-		 * times the stack parameters will not be valid and it is assumed that
-		 * the stack region has already been configured. */
-		if( ulStackDepth > 0 )
-		{
-			/* Define the region that allows access to the stack. */
-			ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK;
-			ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1;
-			ulRegionEndAddress  &= portMPU_RLAR_ADDRESS_MASK;
+            /* Declaration when these variable are defined in code instead of being
+             * exported from linker scripts. */
+            extern uint32_t * __privileged_sram_start__;
+            extern uint32_t * __privileged_sram_end__;
+        #else
+            /* Declaration when these variable are exported from linker scripts. */
+            extern uint32_t __privileged_sram_start__[];
+            extern uint32_t __privileged_sram_end__[];
+        #endif /* defined( __ARMCC_VERSION ) */
 
-			xMPUSettings->xRegionsSettings[ 0 ].ulRBAR =	( ulRegionStartAddress ) |
-															( portMPU_REGION_NON_SHAREABLE ) |
-															( portMPU_REGION_READ_WRITE ) |
-															( portMPU_REGION_EXECUTE_NEVER );
+        /* Setup MAIR0. */
+        xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
+        xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK );
 
-			xMPUSettings->xRegionsSettings[ 0 ].ulRLAR =	( ulRegionEndAddress ) |
-															( portMPU_RLAR_ATTR_INDEX0 ) |
-															( portMPU_RLAR_REGION_ENABLE );
-		}
+        /* This function is called automatically when the task is created - in
+         * which case the stack region parameters will be valid.  At all other
+         * times the stack parameters will not be valid and it is assumed that
+         * the stack region has already been configured. */
+        if( ulStackDepth > 0 )
+        {
+            ulRegionStartAddress = ( uint32_t ) pxBottomOfStack;
+            ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1;
 
-		/* User supplied configurable regions. */
-		for( ulRegionNumber = 1; ulRegionNumber <= portNUM_CONFIGURABLE_REGIONS; ulRegionNumber++ )
-		{
-			/* If xRegions is NULL i.e. the task has not specified any MPU
-			 * region, the else part ensures that all the configurable MPU
-			 * regions are invalidated. */
-			if( ( xRegions != NULL ) && ( xRegions[ lIndex ].ulLengthInBytes > 0UL ) )
-			{
-				/* Translate the generic region definition contained in xRegions
-				 * into the ARMv8 specific MPU settings that are then stored in
-				 * xMPUSettings. */
-				ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK;
-				ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1;
-				ulRegionEndAddress  &= portMPU_RLAR_ADDRESS_MASK;
+            /* If the stack is within the privileged SRAM, do not protect it
+             * using a separate MPU region. This is needed because privileged
+             * SRAM is already protected using an MPU region and ARMv8-M does
+             * not allow overlapping MPU regions. */
+            if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
+                ( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
+            {
+                xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
+                xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;
+            }
+            else
+            {
+                /* Define the region that allows access to the stack. */
+                ulRegionStartAddress &= portMPU_RBAR_ADDRESS_MASK;
+                ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK;
 
-				/* Start address. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR =	( ulRegionStartAddress ) |
-																			( portMPU_REGION_NON_SHAREABLE );
+                xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) |
+                                                             ( portMPU_REGION_NON_SHAREABLE ) |
+                                                             ( portMPU_REGION_READ_WRITE ) |
+                                                             ( portMPU_REGION_EXECUTE_NEVER );
 
-				/* RO/RW. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_READ_ONLY ) != 0 )
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_ONLY );
-				}
-				else
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_WRITE );
-				}
+                xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = ( ulRegionEndAddress ) |
+                                                             ( portMPU_RLAR_ATTR_INDEX0 ) |
+                                                             ( portMPU_RLAR_REGION_ENABLE );
+            }
+        }
 
-				/* XN. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_EXECUTE_NEVER ) != 0 )
-				{
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_EXECUTE_NEVER );
-				}
+        /* User supplied configurable regions. */
+        for( ulRegionNumber = 1; ulRegionNumber <= portNUM_CONFIGURABLE_REGIONS; ulRegionNumber++ )
+        {
+            /* If xRegions is NULL i.e. the task has not specified any MPU
+             * region, the else part ensures that all the configurable MPU
+             * regions are invalidated. */
+            if( ( xRegions != NULL ) && ( xRegions[ lIndex ].ulLengthInBytes > 0UL ) )
+            {
+                /* Translate the generic region definition contained in xRegions
+                 * into the ARMv8 specific MPU settings that are then stored in
+                 * xMPUSettings. */
+                ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK;
+                ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1;
+                ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK;
 
-				/* End Address. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR =	( ulRegionEndAddress ) |
-																			( portMPU_RLAR_REGION_ENABLE );
+                /* Start address. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = ( ulRegionStartAddress ) |
+                                                                          ( portMPU_REGION_NON_SHAREABLE );
 
-				/* Normal memory/ Device memory. */
-				if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
-				{
-					/* Attr1 in MAIR0 is configured as device memory. */
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX1;
-				}
-				else
-				{
-					/* Attr1 in MAIR0 is configured as normal memory. */
-					xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
-				}
-			}
-			else
-			{
-				/* Invalidate the region. */
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = 0UL;
-				xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = 0UL;
-			}
+                /* RO/RW. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_READ_ONLY ) != 0 )
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_ONLY );
+                }
+                else
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_READ_WRITE );
+                }
 
-			lIndex++;
-		}
-	}
+                /* XN. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_EXECUTE_NEVER ) != 0 )
+                {
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR |= ( portMPU_REGION_EXECUTE_NEVER );
+                }
+
+                /* End Address. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
+                                                                          ( portMPU_RLAR_REGION_ENABLE );
+
+                /* Normal memory/ Device memory. */
+                if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
+                {
+                    /* Attr1 in MAIR0 is configured as device memory. */
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX1;
+                }
+                else
+                {
+                    /* Attr1 in MAIR0 is configured as normal memory. */
+                    xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
+                }
+            }
+            else
+            {
+                /* Invalidate the region. */
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = 0UL;
+                xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = 0UL;
+            }
+
+            lIndex++;
+        }
+    }
 #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 BaseType_t xPortIsInsideInterrupt( void )
 {
-uint32_t ulCurrentInterrupt;
-BaseType_t xReturn;
+    uint32_t ulCurrentInterrupt;
+    BaseType_t xReturn;
 
-	/* Obtain the number of the currently executing interrupt. Interrupt Program
-	 * Status Register (IPSR) holds the exception number of the currently-executing
-	 * exception or zero for Thread mode.*/
-	__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+    /* Obtain the number of the currently executing interrupt. Interrupt Program
+     * Status Register (IPSR) holds the exception number of the currently-executing
+     * exception or zero for Thread mode.*/
+    __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
-	if( ulCurrentInterrupt == 0 )
-	{
-		xReturn = pdFALSE;
-	}
-	else
-	{
-		xReturn = pdTRUE;
-	}
+    if( ulCurrentInterrupt == 0 )
+    {
+        xReturn = pdFALSE;
+    }
+    else
+    {
+        xReturn = pdTRUE;
+    }
 
-	return xReturn;
+    return xReturn;
 }
-/*-----------------------------------------------------------*/
\ No newline at end of file
+/*-----------------------------------------------------------*/
diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h
index 71d711c69..6aaee8fc8 100644
--- a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h
+++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -38,14 +38,14 @@
  * @brief Restore the context of the first task so that the first task starts
  * executing.
  */
-void vRestoreContextOfFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vRestoreContextOfFirstTask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Checks whether or not the processor is privileged.
  *
  * @return 1 if the processor is already privileged, 0 otherwise.
  */
-BaseType_t xIsPrivileged( void ) __attribute__ (( naked ));
+BaseType_t xIsPrivileged( void ) __attribute__( ( naked ) );
 
 /**
  * @brief Raises the privilege level by clearing the bit 0 of the CONTROL
@@ -58,7 +58,7 @@ BaseType_t xIsPrivileged( void ) __attribute__ (( naked ));
  *  Bit[0] = 0 --> The processor is running privileged
  *  Bit[0] = 1 --> The processor is running unprivileged.
  */
-void vRaisePrivilege( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vRaisePrivilege( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
@@ -68,32 +68,32 @@ void vRaisePrivilege( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
  *  Bit[0] = 0 --> The processor is running privileged
  *  Bit[0] = 1 --> The processor is running unprivileged.
  */
-void vResetPrivilege( void ) __attribute__ (( naked ));
+void vResetPrivilege( void ) __attribute__( ( naked ) );
 
 /**
  * @brief Starts the first task.
  */
-void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vStartFirstTask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Disables interrupts.
  */
-uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
+uint32_t ulSetInterruptMask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Enables interrupts.
  */
-void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
+void vClearInterruptMask( uint32_t ulMask ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief PendSV Exception handler.
  */
-void PendSV_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void PendSV_Handler( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief SVC Handler.
  */
-void SVC_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void SVC_Handler( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 /**
  * @brief Allocate a Secure context for the calling task.
@@ -101,13 +101,13 @@ void SVC_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
  * @param[in] ulSecureStackSize The size of the stack to be allocated on the
  * secure side for the calling task.
  */
-void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) __attribute__ (( naked ));
+void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) __attribute__( ( naked ) );
 
 /**
  * @brief Free the task's secure context.
  *
  * @param[in] pulTCB Pointer to the Task Control Block (TCB) of the task.
  */
-void vPortFreeSecureContext( uint32_t *pulTCB ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
+void vPortFreeSecureContext( uint32_t * pulTCB ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
 
 #endif /* __PORT_ASM_H__ */
diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s
index 89ecbb7b0..3215f82e5 100644
--- a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s
+++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h
index 316213bfc..0a98de418 100644
--- a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h
+++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,18 +19,18 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*------------------------------------------------------------------------------
  * Port specific definitions.
@@ -42,109 +42,109 @@ extern "C" {
  *------------------------------------------------------------------------------
  */
 
-#ifndef configENABLE_FPU
-	#error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
-#endif /* configENABLE_FPU */
+    #ifndef configENABLE_FPU
+        #error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
+    #endif /* configENABLE_FPU */
 
-#ifndef configENABLE_MPU
-	#error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
-#endif /* configENABLE_MPU */
+    #ifndef configENABLE_MPU
+        #error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
+    #endif /* configENABLE_MPU */
 
-#ifndef configENABLE_TRUSTZONE
-	#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
-#endif /* configENABLE_TRUSTZONE */
+    #ifndef configENABLE_TRUSTZONE
+        #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
+    #endif /* configENABLE_TRUSTZONE */
 
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Type definitions.
  */
-#define portCHAR											char
-#define portFLOAT											float
-#define portDOUBLE											double
-#define portLONG											long
-#define portSHORT											short
-#define portSTACK_TYPE										uint32_t
-#define portBASE_TYPE										long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE										StackType_t;
-typedef long												BaseType_t;
-typedef unsigned long										UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	 * not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC							1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * Architecture specifics.
  */
-#define portARCH_NAME										"Cortex-M33"
-#define portSTACK_GROWTH									( -1 )
-#define portTICK_PERIOD_MS									( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT									8
-#define portNOP()
-#define portINLINE											__inline
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE								inline __attribute__(( always_inline ))
-#endif
-#define portHAS_STACK_OVERFLOW_CHECKING						1
-#define portDONT_DISCARD									__root
+    #define portARCH_NAME                      "Cortex-M33"
+    #define portSTACK_GROWTH                   ( -1 )
+    #define portTICK_PERIOD_MS                 ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT                 8
+    #define portNOP()
+    #define portINLINE                         __inline
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE               inline __attribute__( ( always_inline ) )
+    #endif
+    #define portHAS_STACK_OVERFLOW_CHECKING    1
+    #define portDONT_DISCARD                   __root
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Extern declarations.
  */
-extern BaseType_t xPortIsInsideInterrupt( void );
+    extern BaseType_t xPortIsInsideInterrupt( void );
 
-extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
 
-extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
-extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
+    extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
 
-extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
+    extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
 
-#if( configENABLE_TRUSTZONE == 1 )
-	extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
-	extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
-#endif /* configENABLE_TRUSTZONE */
+    #if ( configENABLE_TRUSTZONE == 1 )
+        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
+        extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
+    #endif /* configENABLE_TRUSTZONE */
 
-#if( configENABLE_MPU == 1 )
-	extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
-	extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
+        extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief MPU specific constants.
  */
-#if( configENABLE_MPU == 1 )
-	#define portUSING_MPU_WRAPPERS							1
-	#define portPRIVILEGE_BIT								( 0x80000000UL )
-#else
-	#define portPRIVILEGE_BIT								( 0x0UL )
-#endif /* configENABLE_MPU */
+    #if ( configENABLE_MPU == 1 )
+        #define portUSING_MPU_WRAPPERS    1
+        #define portPRIVILEGE_BIT         ( 0x80000000UL )
+    #else
+        #define portPRIVILEGE_BIT         ( 0x0UL )
+    #endif /* configENABLE_MPU */
 
 
 /* MPU regions. */
-#define portPRIVILEGED_FLASH_REGION							( 0UL )
-#define portUNPRIVILEGED_FLASH_REGION						( 1UL )
-#define portUNPRIVILEGED_SYSCALLS_REGION					( 2UL )
-#define portPRIVILEGED_RAM_REGION							( 3UL )
-#define portSTACK_REGION									( 4UL )
-#define portFIRST_CONFIGURABLE_REGION						( 5UL )
-#define portLAST_CONFIGURABLE_REGION						( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS						( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS								( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
+    #define portPRIVILEGED_FLASH_REGION                   ( 0UL )
+    #define portUNPRIVILEGED_FLASH_REGION                 ( 1UL )
+    #define portUNPRIVILEGED_SYSCALLS_REGION              ( 2UL )
+    #define portPRIVILEGED_RAM_REGION                     ( 3UL )
+    #define portSTACK_REGION                              ( 4UL )
+    #define portFIRST_CONFIGURABLE_REGION                 ( 5UL )
+    #define portLAST_CONFIGURABLE_REGION                  ( 7UL )
+    #define portNUM_CONFIGURABLE_REGIONS                  ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
+    #define portTOTAL_NUM_REGIONS                         ( portNUM_CONFIGURABLE_REGIONS + 1 )   /* Plus one to make space for the stack region. */
 
 /* Device memory attributes used in MPU_MAIR registers.
  *
@@ -156,162 +156,164 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
  *				11 --> Device-GRE
  *  Bit[1:0] - 00, Reserved.
  */
-#define portMPU_DEVICE_MEMORY_nGnRnE						( 0x00 ) /* 0000 0000 */
-#define portMPU_DEVICE_MEMORY_nGnRE							( 0x04 ) /* 0000 0100 */
-#define portMPU_DEVICE_MEMORY_nGRE							( 0x08 ) /* 0000 1000 */
-#define portMPU_DEVICE_MEMORY_GRE							( 0x0C ) /* 0000 1100 */
+    #define portMPU_DEVICE_MEMORY_nGnRnE                  ( 0x00 )   /* 0000 0000 */
+    #define portMPU_DEVICE_MEMORY_nGnRE                   ( 0x04 )   /* 0000 0100 */
+    #define portMPU_DEVICE_MEMORY_nGRE                    ( 0x08 )   /* 0000 1000 */
+    #define portMPU_DEVICE_MEMORY_GRE                     ( 0x0C )   /* 0000 1100 */
 
 /* Normal memory attributes used in MPU_MAIR registers. */
-#define portMPU_NORMAL_MEMORY_NON_CACHEABLE					( 0x44 ) /* Non-cacheable. */
-#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE			( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
+    #define portMPU_NORMAL_MEMORY_NON_CACHEABLE           ( 0x44 )   /* Non-cacheable. */
+    #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE    ( 0xFF )   /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
 
 /* Attributes used in MPU_RBAR registers. */
-#define portMPU_REGION_NON_SHAREABLE						( 0UL << 3UL )
-#define portMPU_REGION_INNER_SHAREABLE						( 1UL << 3UL )
-#define portMPU_REGION_OUTER_SHAREABLE						( 2UL << 3UL )
+    #define portMPU_REGION_NON_SHAREABLE                  ( 0UL << 3UL )
+    #define portMPU_REGION_INNER_SHAREABLE                ( 1UL << 3UL )
+    #define portMPU_REGION_OUTER_SHAREABLE                ( 2UL << 3UL )
 
-#define portMPU_REGION_PRIVILEGED_READ_WRITE				( 0UL << 1UL )
-#define portMPU_REGION_READ_WRITE							( 1UL << 1UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY					( 2UL << 1UL )
-#define portMPU_REGION_READ_ONLY							( 3UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_WRITE          ( 0UL << 1UL )
+    #define portMPU_REGION_READ_WRITE                     ( 1UL << 1UL )
+    #define portMPU_REGION_PRIVILEGED_READ_ONLY           ( 2UL << 1UL )
+    #define portMPU_REGION_READ_ONLY                      ( 3UL << 1UL )
 
-#define portMPU_REGION_EXECUTE_NEVER						( 1UL )
+    #define portMPU_REGION_EXECUTE_NEVER                  ( 1UL )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Settings to define an MPU region.
  */
-typedef struct MPURegionSettings
-{
-	uint32_t ulRBAR;	/**< RBAR for the region. */
-	uint32_t ulRLAR;	/**< RLAR for the region. */
-} MPURegionSettings_t;
+    typedef struct MPURegionSettings
+    {
+        uint32_t ulRBAR; /**< RBAR for the region. */
+        uint32_t ulRLAR; /**< RLAR for the region. */
+    } MPURegionSettings_t;
 
 /**
  * @brief MPU settings as stored in the TCB.
  */
-typedef struct MPU_SETTINGS
-{
-	uint32_t ulMAIR0;	/**< MAIR0 for the task containing attributes for all the 4 per task regions. */
-	MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
-} xMPU_SETTINGS;
+    typedef struct MPU_SETTINGS
+    {
+        uint32_t ulMAIR0;                                              /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
+        MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
+    } xMPU_SETTINGS;
 /*-----------------------------------------------------------*/
 
 /**
  * @brief SVC numbers.
  */
-#define portSVC_ALLOCATE_SECURE_CONTEXT						0
-#define portSVC_FREE_SECURE_CONTEXT							1
-#define portSVC_START_SCHEDULER								2
-#define portSVC_RAISE_PRIVILEGE								3
+    #define portSVC_ALLOCATE_SECURE_CONTEXT    0
+    #define portSVC_FREE_SECURE_CONTEXT        1
+    #define portSVC_START_SCHEDULER            2
+    #define portSVC_RAISE_PRIVILEGE            3
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Scheduler utilities.
  */
-#define portYIELD()											vPortYield()
-#define portNVIC_INT_CTRL_REG								( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT								( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired )			if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x )								portEND_SWITCHING_ISR( x )
+    #define portYIELD()                                 vPortYield()
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Critical section management.
  */
-#define portSET_INTERRUPT_MASK_FROM_ISR()					ulSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)				vClearInterruptMask( x )
-#define portDISABLE_INTERRUPTS()							ulSetInterruptMask()
-#define portENABLE_INTERRUPTS()								vClearInterruptMask( 0 )
-#define portENTER_CRITICAL()								vPortEnterCritical()
-#define portEXIT_CRITICAL()									vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulSetInterruptMask()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vClearInterruptMask( x )
+    #define portDISABLE_INTERRUPTS()                  ulSetInterruptMask()
+    #define portENABLE_INTERRUPTS()                   vClearInterruptMask( 0 )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Tickless idle/low power functionality.
  */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Task function macros as described on the FreeRTOS.org WEB site.
  */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters )		void vFunction( void *pvParameters )
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Allocate a secure context for the task.
-	 *
-	 * Tasks are not created with a secure context. Any task that is going to call
-	 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
-	 * secure context before it calls any secure function.
-	 *
-	 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
-	 */
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )	vPortAllocateSecureContext( ulSecureStackSize )
+    #if ( configENABLE_TRUSTZONE == 1 )
 
-	/**
-	 * @brief Called when a task is deleted to delete the task's secure context,
-	 * if it has one.
-	 *
-	 * @param[in] pxTCB The TCB of the task being deleted.
-	 */
-	#define portCLEAN_UP_TCB( pxTCB )							vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-#else
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-	#define portCLEAN_UP_TCB( pxTCB )
-#endif /* configENABLE_TRUSTZONE */
+/**
+ * @brief Allocate a secure context for the task.
+ *
+ * Tasks are not created with a secure context. Any task that is going to call
+ * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
+ * secure context before it calls any secure function.
+ *
+ * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
+ */
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )    vPortAllocateSecureContext( ulSecureStackSize )
+
+/**
+ * @brief Called when a task is deleted to delete the task's secure context,
+ * if it has one.
+ *
+ * @param[in] pxTCB The TCB of the task being deleted.
+ */
+        #define portCLEAN_UP_TCB( pxTCB )                           vPortFreeSecureContext( ( uint32_t * ) pxTCB )
+    #else
+        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
+        #define portCLEAN_UP_TCB( pxTCB )
+    #endif /* configENABLE_TRUSTZONE */
 /*-----------------------------------------------------------*/
 
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Checks whether or not the processor is privileged.
-	 *
-	 * @return 1 if the processor is already privileged, 0 otherwise.
-	 */
-	#define portIS_PRIVILEGED()									xIsPrivileged()
+    #if ( configENABLE_MPU == 1 )
 
-	/**
-	 * @brief Raise an SVC request to raise privilege.
-	 *
-	 * The SVC handler checks that the SVC was raised from a system call and only
-	 * then it raises the privilege. If this is called from any other place,
-	 * the privilege is not raised.
-	 */
-	#define portRAISE_PRIVILEGE()								__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+/**
+ * @brief Checks whether or not the processor is privileged.
+ *
+ * @return 1 if the processor is already privileged, 0 otherwise.
+ */
+        #define portIS_PRIVILEGED()      xIsPrivileged()
 
-	/**
-	 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
-	 * register.
-	 */
-	#define portRESET_PRIVILEGE()								vResetPrivilege()
-#else
-	#define portIS_PRIVILEGED()
-	#define portRAISE_PRIVILEGE()
-	#define portRESET_PRIVILEGE()
-#endif /* configENABLE_MPU */
+/**
+ * @brief Raise an SVC request to raise privilege.
+ *
+ * The SVC handler checks that the SVC was raised from a system call and only
+ * then it raises the privilege. If this is called from any other place,
+ * the privilege is not raised.
+ */
+        #define portRAISE_PRIVILEGE()    __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+
+/**
+ * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
+ * register.
+ */
+        #define portRESET_PRIVILEGE()    vResetPrivilege()
+    #else
+        #define portIS_PRIVILEGED()
+        #define portRAISE_PRIVILEGE()
+        #define portRESET_PRIVILEGE()
+    #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 /**
  * @brief Barriers.
  */
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
+    #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
 /*-----------------------------------------------------------*/
 
 /* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
  * the source code because to do so would cause other compilers to generate
  * warnings. */
-#pragma diag_suppress=Be006
-#pragma diag_suppress=Pa082
+    #pragma diag_suppress=Be006
+    #pragma diag_suppress=Pa082
 /*-----------------------------------------------------------*/
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
diff --git a/portable/IAR/ARM_CM4F/port.c b/portable/IAR/ARM_CM4F/port.c
index f7aa99fc9..e180aede0 100644
--- a/portable/IAR/ARM_CM4F/port.c
+++ b/portable/IAR/ARM_CM4F/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,15 +19,14 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------
- * Implementation of functions defined in portable.h for the ARM CM4F port.
- *----------------------------------------------------------*/
+* Implementation of functions defined in portable.h for the ARM CM4F port.
+*----------------------------------------------------------*/
 
 /* IAR includes. */
 #include 
@@ -37,76 +36,77 @@
 #include "task.h"
 
 #ifndef __ARMVFP__
-	#error This port can only be used when the project options are configured to enable hardware floating point support.
+    #error This port can only be used when the project options are configured to enable hardware floating point support.
 #endif
 
-#if( configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 )
-	#error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+#if ( configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 )
+    #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See http: /*www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
 #endif
 
 #ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 1UL << 2UL )
+    #define configSYSTICK_CLOCK_HZ      configCPU_CLOCK_HZ
+    /* Ensure the SysTick is clocked at the same frequency as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 1UL << 2UL )
 #else
-	/* The way the SysTick is clocked is not modified in case it is not the same
-	as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 0 )
+
+/* The way the SysTick is clocked is not modified in case it is not the same
+ * as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 0 )
 #endif
 
 /* Constants required to manipulate the core.  Registers first... */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_CTRL_REG             ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG             ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG    ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SHPR3_REG                    ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
 /* ...then bits in the registers. */
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portNVIC_PENDSVCLEAR_BIT 			( 1UL << 27UL )
-#define portNVIC_PEND_SYSTICK_CLEAR_BIT		( 1UL << 25UL )
+#define portNVIC_SYSTICK_INT_BIT              ( 1UL << 1UL )
+#define portNVIC_SYSTICK_ENABLE_BIT           ( 1UL << 0UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT       ( 1UL << 16UL )
+#define portNVIC_PENDSVCLEAR_BIT              ( 1UL << 27UL )
+#define portNVIC_PEND_SYSTICK_CLEAR_BIT       ( 1UL << 25UL )
 
 /* Constants used to detect a Cortex-M7 r0p1 core, which should use the ARM_CM7
-r0p1 port. */
-#define portCPUID							( * ( ( volatile uint32_t * ) 0xE000ed00 ) )
-#define portCORTEX_M7_r0p1_ID				( 0x410FC271UL )
-#define portCORTEX_M7_r0p0_ID				( 0x410FC270UL )
+ * r0p1 port. */
+#define portCPUID                             ( *( ( volatile uint32_t * ) 0xE000ed00 ) )
+#define portCORTEX_M7_r0p1_ID                 ( 0x410FC271UL )
+#define portCORTEX_M7_r0p0_ID                 ( 0x410FC270UL )
 
-#define portNVIC_PENDSV_PRI					( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
-#define portNVIC_SYSTICK_PRI				( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
+#define portNVIC_PENDSV_PRI                   ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
+#define portNVIC_SYSTICK_PRI                  ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
 
 /* Constants required to check the validity of an interrupt priority. */
-#define portFIRST_USER_INTERRUPT_NUMBER		( 16 )
-#define portNVIC_IP_REGISTERS_OFFSET_16 	( 0xE000E3F0 )
-#define portAIRCR_REG						( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
-#define portMAX_8_BIT_VALUE					( ( uint8_t ) 0xff )
-#define portTOP_BIT_OF_BYTE					( ( uint8_t ) 0x80 )
-#define portMAX_PRIGROUP_BITS				( ( uint8_t ) 7 )
-#define portPRIORITY_GROUP_MASK				( 0x07UL << 8UL )
-#define portPRIGROUP_SHIFT					( 8UL )
+#define portFIRST_USER_INTERRUPT_NUMBER       ( 16 )
+#define portNVIC_IP_REGISTERS_OFFSET_16       ( 0xE000E3F0 )
+#define portAIRCR_REG                         ( *( ( volatile uint32_t * ) 0xE000ED0C ) )
+#define portMAX_8_BIT_VALUE                   ( ( uint8_t ) 0xff )
+#define portTOP_BIT_OF_BYTE                   ( ( uint8_t ) 0x80 )
+#define portMAX_PRIGROUP_BITS                 ( ( uint8_t ) 7 )
+#define portPRIORITY_GROUP_MASK               ( 0x07UL << 8UL )
+#define portPRIGROUP_SHIFT                    ( 8UL )
 
 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
-#define portVECTACTIVE_MASK					( 0xFFUL )
+#define portVECTACTIVE_MASK                   ( 0xFFUL )
 
 /* Constants required to manipulate the VFP. */
-#define portFPCCR							( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
-#define portASPEN_AND_LSPEN_BITS			( 0x3UL << 30UL )
+#define portFPCCR                             ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
+#define portASPEN_AND_LSPEN_BITS              ( 0x3UL << 30UL )
 
 /* Constants required to set up the initial stack. */
-#define portINITIAL_XPSR					( 0x01000000 )
-#define portINITIAL_EXC_RETURN				( 0xfffffffd )
+#define portINITIAL_XPSR                      ( 0x01000000 )
+#define portINITIAL_EXC_RETURN                ( 0xfffffffd )
 
 /* The systick is a 24-bit counter. */
-#define portMAX_24_BIT_NUMBER				( 0xffffffUL )
+#define portMAX_24_BIT_NUMBER                 ( 0xffffffUL )
 
 /* A fiddle factor to estimate the number of SysTick counts that would have
-occurred while the SysTick counter is stopped during tickless idle
-calculations. */
-#define portMISSED_COUNTS_FACTOR			( 45UL )
+ * occurred while the SysTick counter is stopped during tickless idle
+ * calculations. */
+#define portMISSED_COUNTS_FACTOR              ( 45UL )
 
 /* For strict compliance with the Cortex-M spec the task start address should
-have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
-#define portSTART_ADDRESS_MASK				( ( StackType_t ) 0xfffffffeUL )
+ * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
+#define portSTART_ADDRESS_MASK                ( ( StackType_t ) 0xfffffffeUL )
 
 /*
  * Setup the timer to generate the tick interrupts.  The implementation in this
@@ -138,30 +138,30 @@ static void prvTaskExitError( void );
 /*-----------------------------------------------------------*/
 
 /* Each task maintains its own interrupt status in the critical nesting
-variable. */
+ * variable. */
 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 
 /*
  * The number of SysTick increments that make up one tick period.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulTimerCountsForOneTick = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulTimerCountsForOneTick = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * The maximum number of tick periods that can be suppressed is limited by the
  * 24 bit resolution of the SysTick timer.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t xMaximumPossibleSuppressedTicks = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * Compensate for the CPU cycles that pass while the SysTick is stopped (low
  * power functionality only.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulStoppedTimerCompensation = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulStoppedTimerCompensation = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
@@ -169,10 +169,10 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
  * FreeRTOS API functions are not called from interrupts that have been assigned
  * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
  */
-#if( configASSERT_DEFINED == 1 )
-	 static uint8_t ucMaxSysCallPriority = 0;
-	 static uint32_t ulMaxPRIGROUPValue = 0;
-	 static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
+#if ( configASSERT_DEFINED == 1 )
+    static uint8_t ucMaxSysCallPriority = 0;
+    static uint32_t ulMaxPRIGROUPValue = 0;
+    static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
 #endif /* configASSERT_DEFINED */
 
 /*-----------------------------------------------------------*/
@@ -180,47 +180,52 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 /*
  * See header file for description.
  */
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	interrupt. */
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
 
-	/* Offset added to account for the way the MCU uses the stack on entry/exit
-	of interrupts, and to ensure alignment. */
-	pxTopOfStack--;
+    /* Offset added to account for the way the MCU uses the stack on entry/exit
+     * of interrupts, and to ensure alignment. */
+    pxTopOfStack--;
 
-	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
-	pxTopOfStack--;
-	*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;	/* PC */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) prvTaskExitError;	/* LR */
+    *pxTopOfStack = portINITIAL_XPSR;                                    /* xPSR */
+    pxTopOfStack--;
+    *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) prvTaskExitError;                    /* LR */
 
-	/* Save code space by skipping register initialisation. */
-	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
-	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
+    /* Save code space by skipping register initialisation. */
+    pxTopOfStack -= 5;                            /* R12, R3, R2 and R1. */
+    *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
 
-	/* A save method is being used that requires each task to maintain its
-	own exec return value. */
-	pxTopOfStack--;
-	*pxTopOfStack = portINITIAL_EXC_RETURN;
+    /* A save method is being used that requires each task to maintain its
+     * own exec return value. */
+    pxTopOfStack--;
+    *pxTopOfStack = portINITIAL_EXC_RETURN;
 
-	pxTopOfStack -= 8;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
+    pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
 
-	return pxTopOfStack;
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 static void prvTaskExitError( void )
 {
-	/* A function that implements a task must not exit or attempt to return to
-	its caller as there is nothing to return to.  If a task wants to exit it
-	should instead call vTaskDelete( NULL ).
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to.  If a task wants to exit it
+     * should instead call vTaskDelete( NULL ).
+     *
+     * Artificially force an assert() to be triggered if configASSERT() is
+     * defined, then stop here so application writers can catch the error. */
+    configASSERT( uxCriticalNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
 
-	Artificially force an assert() to be triggered if configASSERT() is
-	defined, then stop here so application writers can catch the error. */
-	configASSERT( uxCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
-	for( ;; );
+    for( ; ; )
+    {
+    }
 }
 /*-----------------------------------------------------------*/
 
@@ -229,322 +234,327 @@ static void prvTaskExitError( void )
  */
 BaseType_t xPortStartScheduler( void )
 {
-	/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
-	See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
-	configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
+    /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
+     * See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
+    configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
 
-	/* This port can be used on all revisions of the Cortex-M7 core other than
-	the r0p1 parts.  r0p1 parts should use the port from the
-	/source/portable/GCC/ARM_CM7/r0p1 directory. */
-	configASSERT( portCPUID != portCORTEX_M7_r0p1_ID );
-	configASSERT( portCPUID != portCORTEX_M7_r0p0_ID );
+    /* This port can be used on all revisions of the Cortex-M7 core other than
+     * the r0p1 parts.  r0p1 parts should use the port from the
+     * /source/portable/GCC/ARM_CM7/r0p1 directory. */
+    configASSERT( portCPUID != portCORTEX_M7_r0p1_ID );
+    configASSERT( portCPUID != portCORTEX_M7_r0p0_ID );
 
-	#if( configASSERT_DEFINED == 1 )
-	{
-		volatile uint32_t ulOriginalPriority;
-		volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
-		volatile uint8_t ucMaxPriorityValue;
+    #if ( configASSERT_DEFINED == 1 )
+        {
+            volatile uint32_t ulOriginalPriority;
+            volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
+            volatile uint8_t ucMaxPriorityValue;
 
-		/* Determine the maximum priority from which ISR safe FreeRTOS API
-		functions can be called.  ISR safe functions are those that end in
-		"FromISR".  FreeRTOS maintains separate thread and ISR API functions to
-		ensure interrupt entry is as fast and simple as possible.
+            /* Determine the maximum priority from which ISR safe FreeRTOS API
+             * functions can be called.  ISR safe functions are those that end in
+             * "FromISR".  FreeRTOS maintains separate thread and ISR API functions to
+             * ensure interrupt entry is as fast and simple as possible.
+             *
+             * Save the interrupt priority value that is about to be clobbered. */
+            ulOriginalPriority = *pucFirstUserPriorityRegister;
 
-		Save the interrupt priority value that is about to be clobbered. */
-		ulOriginalPriority = *pucFirstUserPriorityRegister;
+            /* Determine the number of priority bits available.  First write to all
+             * possible bits. */
+            *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
 
-		/* Determine the number of priority bits available.  First write to all
-		possible bits. */
-		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
+            /* Read the value back to see how many bits stuck. */
+            ucMaxPriorityValue = *pucFirstUserPriorityRegister;
 
-		/* Read the value back to see how many bits stuck. */
-		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
+            /* Use the same mask on the maximum system call priority. */
+            ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
 
-		/* Use the same mask on the maximum system call priority. */
-		ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
+            /* Calculate the maximum acceptable priority group value for the number
+             * of bits read back. */
+            ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
 
-		/* Calculate the maximum acceptable priority group value for the number
-		of bits read back. */
-		ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
-		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
-		{
-			ulMaxPRIGROUPValue--;
-			ucMaxPriorityValue <<= ( uint8_t ) 0x01;
-		}
+            while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
+            {
+                ulMaxPRIGROUPValue--;
+                ucMaxPriorityValue <<= ( uint8_t ) 0x01;
+            }
 
-		#ifdef __NVIC_PRIO_BITS
-		{
-			/* Check the CMSIS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
-		}
-		#endif
+            #ifdef __NVIC_PRIO_BITS
+                {
+                    /* Check the CMSIS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
+                }
+            #endif
 
-		#ifdef configPRIO_BITS
-		{
-			/* Check the FreeRTOS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
-		}
-		#endif
+            #ifdef configPRIO_BITS
+                {
+                    /* Check the FreeRTOS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
+                }
+            #endif
 
-		/* Shift the priority group value back to its position within the AIRCR
-		register. */
-		ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
-		ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
+            /* Shift the priority group value back to its position within the AIRCR
+             * register. */
+            ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
+            ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
 
-		/* Restore the clobbered interrupt priority register to its original
-		value. */
-		*pucFirstUserPriorityRegister = ulOriginalPriority;
-	}
-	#endif /* conifgASSERT_DEFINED */
+            /* Restore the clobbered interrupt priority register to its original
+             * value. */
+            *pucFirstUserPriorityRegister = ulOriginalPriority;
+        }
+    #endif /* conifgASSERT_DEFINED */
 
-	/* Make PendSV and SysTick the lowest priority interrupts. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+    /* Make PendSV and SysTick the lowest priority interrupts. */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
-	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-	here already. */
-	vPortSetupTimerInterrupt();
+    /* Start the timer that generates the tick ISR.  Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
 
-	/* Initialise the critical nesting count ready for the first task. */
-	uxCriticalNesting = 0;
+    /* Initialise the critical nesting count ready for the first task. */
+    uxCriticalNesting = 0;
 
-	/* Ensure the VFP is enabled - it should be anyway. */
-	vPortEnableVFP();
+    /* Ensure the VFP is enabled - it should be anyway. */
+    vPortEnableVFP();
 
-	/* Lazy save always. */
-	*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
+    /* Lazy save always. */
+    *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
 
-	/* Start the first task. */
-	vPortStartFirstTask();
+    /* Start the first task. */
+    vPortStartFirstTask();
 
-	/* Should not get here! */
-	return 0;
+    /* Should not get here! */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void )
 {
-	/* Not implemented in ports where there is nothing to return to.
-	Artificially force an assert. */
-	configASSERT( uxCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( uxCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void )
 {
-	portDISABLE_INTERRUPTS();
-	uxCriticalNesting++;
+    portDISABLE_INTERRUPTS();
+    uxCriticalNesting++;
 
-	/* This is not the interrupt safe version of the enter critical function so
-	assert() if it is being called from an interrupt context.  Only API
-	functions that end in "FromISR" can be used in an interrupt.  Only assert if
-	the critical nesting count is 1 to protect against recursive calls if the
-	assert function also uses a critical section. */
-	if( uxCriticalNesting == 1 )
-	{
-		configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
-	}
+    /* This is not the interrupt safe version of the enter critical function so
+     * assert() if it is being called from an interrupt context.  Only API
+     * functions that end in "FromISR" can be used in an interrupt.  Only assert if
+     * the critical nesting count is 1 to protect against recursive calls if the
+     * assert function also uses a critical section. */
+    if( uxCriticalNesting == 1 )
+    {
+        configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
+    }
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void )
 {
-	configASSERT( uxCriticalNesting );
-	uxCriticalNesting--;
-	if( uxCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
+    configASSERT( uxCriticalNesting );
+    uxCriticalNesting--;
+
+    if( uxCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
 }
 /*-----------------------------------------------------------*/
 
 void xPortSysTickHandler( void )
 {
-	/* The SysTick runs at the lowest interrupt priority, so when this interrupt
-	executes all interrupts must be unmasked.  There is therefore no need to
-	save and then restore the interrupt mask value as its value is already
-	known. */
-	portDISABLE_INTERRUPTS();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* A context switch is required.  Context switching is performed in
-			the PendSV interrupt.  Pend the PendSV interrupt. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portENABLE_INTERRUPTS();
+    /* The SysTick runs at the lowest interrupt priority, so when this interrupt
+     * executes all interrupts must be unmasked.  There is therefore no need to
+     * save and then restore the interrupt mask value as its value is already
+     * known. */
+    portDISABLE_INTERRUPTS();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* A context switch is required.  Context switching is performed in
+             * the PendSV interrupt.  Pend the PendSV interrupt. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+    portENABLE_INTERRUPTS();
 }
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TICKLESS_IDLE == 1 )
+#if ( configUSE_TICKLESS_IDLE == 1 )
 
-	__weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-	{
-	uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
-	TickType_t xModifiableIdleTime;
+    __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+    {
+        uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+        TickType_t xModifiableIdleTime;
 
-		/* Make sure the SysTick reload value does not overflow the counter. */
-		if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-		{
-			xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-		}
+        /* Make sure the SysTick reload value does not overflow the counter. */
+        if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+        {
+            xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+        }
 
-		/* Stop the SysTick momentarily.  The time the SysTick is stopped for
-		is accounted for as best it can be, but using the tickless mode will
-		inevitably result in some tiny drift of the time maintained by the
-		kernel with respect to calendar time. */
-		portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+        /* Stop the SysTick momentarily.  The time the SysTick is stopped for
+         * is accounted for as best it can be, but using the tickless mode will
+         * inevitably result in some tiny drift of the time maintained by the
+         * kernel with respect to calendar time. */
+        portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
 
-		/* Calculate the reload value required to wait xExpectedIdleTime
-		tick periods.  -1 is used because this code will execute part way
-		through one of the tick periods. */
-		ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-		if( ulReloadValue > ulStoppedTimerCompensation )
-		{
-			ulReloadValue -= ulStoppedTimerCompensation;
-		}
+        /* Calculate the reload value required to wait xExpectedIdleTime
+         * tick periods.  -1 is used because this code will execute part way
+         * through one of the tick periods. */
+        ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
 
-		/* Enter a critical section but don't use the taskENTER_CRITICAL()
-		method as that will mask interrupts that should exit sleep mode. */
-		__disable_interrupt();
-		__DSB();
-		__ISB();
+        if( ulReloadValue > ulStoppedTimerCompensation )
+        {
+            ulReloadValue -= ulStoppedTimerCompensation;
+        }
 
-		/* If a context switch is pending or a task is waiting for the scheduler
-		to be unsuspended then abandon the low power entry. */
-		if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-		{
-			/* Restart from whatever is left in the count register to complete
-			this tick period. */
-			portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+        /* Enter a critical section but don't use the taskENTER_CRITICAL()
+         * method as that will mask interrupts that should exit sleep mode. */
+        __disable_interrupt();
+        __DSB();
+        __ISB();
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+        /* If a context switch is pending or a task is waiting for the scheduler
+         * to be unsuspended then abandon the low power entry. */
+        if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+        {
+            /* Restart from whatever is left in the count register to complete
+             * this tick period. */
+            portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Reset the reload register to the value required for normal tick
-			periods. */
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts - see comments above __disable_interrupt()
-			call above. */
-			__enable_interrupt();
-		}
-		else
-		{
-			/* Set the new reload value. */
-			portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+            /* Reset the reload register to the value required for normal tick
+             * periods. */
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
 
-			/* Clear the SysTick count flag and set the count value back to
-			zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            /* Re-enable interrupts - see comments above __disable_interrupt()
+             * call above. */
+            __enable_interrupt();
+        }
+        else
+        {
+            /* Set the new reload value. */
+            portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            /* Clear the SysTick count flag and set the count value back to
+             * zero. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-			/* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
-			set its parameter to 0 to indicate that its implementation contains
-			its own wait for interrupt or wait for event instruction, and so wfi
-			should not be executed again.  However, the original expected idle
-			time variable must remain unmodified, so a copy is taken. */
-			xModifiableIdleTime = xExpectedIdleTime;
-			configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-			if( xModifiableIdleTime > 0 )
-			{
-				__DSB();
-				__WFI();
-				__ISB();
-			}
-			configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts to allow the interrupt that brought the MCU
-			out of sleep mode to execute immediately.  see comments above
-			__disable_interrupt() call above. */
-			__enable_interrupt();
-			__DSB();
-			__ISB();
+            /* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
+             * set its parameter to 0 to indicate that its implementation contains
+             * its own wait for interrupt or wait for event instruction, and so wfi
+             * should not be executed again.  However, the original expected idle
+             * time variable must remain unmodified, so a copy is taken. */
+            xModifiableIdleTime = xExpectedIdleTime;
+            configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
 
-			/* Disable interrupts again because the clock is about to be stopped
-			and interrupts that execute while the clock is stopped will increase
-			any slippage between the time maintained by the RTOS and calendar
-			time. */
-			__disable_interrupt();
-			__DSB();
-			__ISB();
-			
-			/* Disable the SysTick clock without reading the 
-			portNVIC_SYSTICK_CTRL_REG register to ensure the
-			portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again, 
-			the time the SysTick is stopped for is accounted for as best it can 
-			be, but using the tickless mode will inevitably result in some tiny 
-			drift of the time maintained by the kernel with respect to calendar 
-			time*/
-			portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+            if( xModifiableIdleTime > 0 )
+            {
+                __DSB();
+                __WFI();
+                __ISB();
+            }
 
-			/* Determine if the SysTick clock has already counted to zero and
-			been set back to the current reload value (the reload back being
-			correct for the entire expected idle time) or if the SysTick is yet
-			to count to zero (in which case an interrupt other than the SysTick
-			must have brought the system out of sleep mode). */
-			if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-			{
-				uint32_t ulCalculatedLoadValue;
+            configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
 
-				/* The tick interrupt is already pending, and the SysTick count
-				reloaded with ulReloadValue.  Reset the
-				portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
-				period. */
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+            /* Re-enable interrupts to allow the interrupt that brought the MCU
+             * out of sleep mode to execute immediately.  see comments above
+             * __disable_interrupt() call above. */
+            __enable_interrupt();
+            __DSB();
+            __ISB();
 
-				/* Don't allow a tiny value, or values that have somehow
-				underflowed because the post sleep hook did something
-				that took too long. */
-				if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-				{
-					ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-				}
+            /* Disable interrupts again because the clock is about to be stopped
+             * and interrupts that execute while the clock is stopped will increase
+             * any slippage between the time maintained by the RTOS and calendar
+             * time. */
+            __disable_interrupt();
+            __DSB();
+            __ISB();
 
-				portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+            /* Disable the SysTick clock without reading the
+             * portNVIC_SYSTICK_CTRL_REG register to ensure the
+             * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
+             * the time the SysTick is stopped for is accounted for as best it can
+             * be, but using the tickless mode will inevitably result in some tiny
+             * drift of the time maintained by the kernel with respect to calendar
+             * time*/
+            portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
 
-				/* As the pending tick will be processed as soon as this
-				function exits, the tick value maintained by the tick is stepped
-				forward by one less than the time spent waiting. */
-				ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-			}
-			else
-			{
-				/* Something other than the tick interrupt ended the sleep.
-				Work out how long the sleep lasted rounded to complete tick
-				periods (not the ulReload value which accounted for part
-				ticks). */
-				ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+            /* Determine if the SysTick clock has already counted to zero and
+             * been set back to the current reload value (the reload back being
+             * correct for the entire expected idle time) or if the SysTick is yet
+             * to count to zero (in which case an interrupt other than the SysTick
+             * must have brought the system out of sleep mode). */
+            if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+            {
+                uint32_t ulCalculatedLoadValue;
 
-				/* How many complete tick periods passed while the processor
-				was waiting? */
-				ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+                /* The tick interrupt is already pending, and the SysTick count
+                 * reloaded with ulReloadValue.  Reset the
+                 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+                 * period. */
+                ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
 
-				/* The reload value is set to whatever fraction of a single tick
-				period remains. */
-				portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-			}
+                /* Don't allow a tiny value, or values that have somehow
+                 * underflowed because the post sleep hook did something
+                 * that took too long. */
+                if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+                {
+                    ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+                }
 
-			/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
-			again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
-			value. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-			vTaskStepTick( ulCompleteTickPeriods );
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+                portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
 
-			/* Exit with interrupts enabled. */
-			__enable_interrupt();
-		}
-	}
+                /* As the pending tick will be processed as soon as this
+                 * function exits, the tick value maintained by the tick is stepped
+                 * forward by one less than the time spent waiting. */
+                ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+            }
+            else
+            {
+                /* Something other than the tick interrupt ended the sleep.
+                 * Work out how long the sleep lasted rounded to complete tick
+                 * periods (not the ulReload value which accounted for part
+                 * ticks). */
+                ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+                /* How many complete tick periods passed while the processor
+                 * was waiting? */
+                ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+                /* The reload value is set to whatever fraction of a single tick
+                 * period remains. */
+                portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+            }
+
+            /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+             * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+             * value. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            vTaskStepTick( ulCompleteTickPeriods );
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Exit with interrupts enabled. */
+            __enable_interrupt();
+        }
+    }
 
 #endif /* configUSE_TICKLESS_IDLE */
 /*-----------------------------------------------------------*/
@@ -555,102 +565,81 @@ void xPortSysTickHandler( void )
  */
 __weak void vPortSetupTimerInterrupt( void )
 {
-	/* Calculate the constants required to configure the tick interrupt. */
-	#if( configUSE_TICKLESS_IDLE == 1 )
-	{
-		ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
-		xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
-	}
-	#endif /* configUSE_TICKLESS_IDLE */
+    /* Calculate the constants required to configure the tick interrupt. */
+    #if ( configUSE_TICKLESS_IDLE == 1 )
+        {
+            ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+            xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+            ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+        }
+    #endif /* configUSE_TICKLESS_IDLE */
 
-	/* Stop and clear the SysTick. */
-	portNVIC_SYSTICK_CTRL_REG = 0UL;
-	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+    /* Stop and clear the SysTick. */
+    portNVIC_SYSTICK_CTRL_REG = 0UL;
+    portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-	/* Configure SysTick to interrupt at the requested rate. */
-	portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
+    /* Configure SysTick to interrupt at the requested rate. */
+    portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+    portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
 }
 /*-----------------------------------------------------------*/
 
-#if( configASSERT_DEFINED == 1 )
+#if ( configASSERT_DEFINED == 1 )
 
-	void vPortValidateInterruptPriority( void )
-	{
-	uint32_t ulCurrentInterrupt;
-	uint8_t ucCurrentPriority;
+    void vPortValidateInterruptPriority( void )
+    {
+        uint32_t ulCurrentInterrupt;
+        uint8_t ucCurrentPriority;
 
-		/* Obtain the number of the currently executing interrupt. */
-		__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+        /* Obtain the number of the currently executing interrupt. */
+        __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
-		/* Is the interrupt number a user defined interrupt? */
-		if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
-		{
-			/* Look up the interrupt's priority. */
-			ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
+        /* Is the interrupt number a user defined interrupt? */
+        if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
+        {
+            /* Look up the interrupt's priority. */
+            ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
 
-			/* The following assertion will fail if a service routine (ISR) for
-			an interrupt that has been assigned a priority above
-			configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
-			function.  ISR safe FreeRTOS API functions must *only* be called
-			from interrupts that have been assigned a priority at or below
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
+            /* The following assertion will fail if a service routine (ISR) for
+             * an interrupt that has been assigned a priority above
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
+             * function.  ISR safe FreeRTOS API functions must *only* be called
+             * from interrupts that have been assigned a priority at or below
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Numerically low interrupt priority numbers represent logically high
+             * interrupt priorities, therefore the priority of the interrupt must
+             * be set to a value equal to or numerically *higher* than
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Interrupts that	use the FreeRTOS API must not be left at their
+             * default priority of	zero as that is the highest possible priority,
+             * which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
+             * and	therefore also guaranteed to be invalid.
+             *
+             * FreeRTOS maintains separate thread and ISR API functions to ensure
+             * interrupt entry is as fast and simple as possible.
+             *
+             * The following links provide detailed information:
+             * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+             * https://www.FreeRTOS.org/FAQHelp.html */
+            configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
+        }
 
-			Numerically low interrupt priority numbers represent logically high
-			interrupt priorities, therefore the priority of the interrupt must
-			be set to a value equal to or numerically *higher* than
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
-
-			Interrupts that	use the FreeRTOS API must not be left at their
-			default priority of	zero as that is the highest possible priority,
-			which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
-			and	therefore also guaranteed to be invalid.
-
-			FreeRTOS maintains separate thread and ISR API functions to ensure
-			interrupt entry is as fast and simple as possible.
-
-			The following links provide detailed information:
-			http://www.freertos.org/RTOS-Cortex-M3-M4.html
-			http://www.freertos.org/FAQHelp.html */
-			configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
-		}
-
-		/* Priority grouping:  The interrupt controller (NVIC) allows the bits
-		that define each interrupt's priority to be split between bits that
-		define the interrupt's pre-emption priority bits and bits that define
-		the interrupt's sub-priority.  For simplicity all bits must be defined
-		to be pre-emption priority bits.  The following assertion will fail if
-		this is not the case (if some bits represent a sub-priority).
-
-		If the application only uses CMSIS libraries for interrupt
-		configuration then the correct setting can be achieved on all Cortex-M
-		devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
-		scheduler.  Note however that some vendor specific peripheral libraries
-		assume a non-zero priority group setting, in which cases using a value
-		of zero will result in unpredictable behaviour. */
-		configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
-	}
+        /* Priority grouping:  The interrupt controller (NVIC) allows the bits
+         * that define each interrupt's priority to be split between bits that
+         * define the interrupt's pre-emption priority bits and bits that define
+         * the interrupt's sub-priority.  For simplicity all bits must be defined
+         * to be pre-emption priority bits.  The following assertion will fail if
+         * this is not the case (if some bits represent a sub-priority).
+         *
+         * If the application only uses CMSIS libraries for interrupt
+         * configuration then the correct setting can be achieved on all Cortex-M
+         * devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
+         * scheduler.  Note however that some vendor specific peripheral libraries
+         * assume a non-zero priority group setting, in which cases using a value
+         * of zero will result in unpredictable behaviour. */
+        configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
+    }
 
 #endif /* configASSERT_DEFINED */
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
diff --git a/portable/IAR/ARM_CM4F/portasm.s b/portable/IAR/ARM_CM4F/portasm.s
index d01793ece..0ffd846b9 100644
--- a/portable/IAR/ARM_CM4F/portasm.s
+++ b/portable/IAR/ARM_CM4F/portasm.s
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/ARM_CM4F/portmacro.h b/portable/IAR/ARM_CM4F/portmacro.h
index 43c1aab12..b4967b6b3 100644
--- a/portable/IAR/ARM_CM4F/portmacro.h
+++ b/portable/IAR/ARM_CM4F/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,18 +19,18 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -43,165 +43,164 @@ extern "C" {
  */
 
 /* IAR includes. */
-#include 
+    #include 
 
 /* Type definitions. */
-#define portCHAR		char
-#define portFLOAT		float
-#define portDOUBLE		double
-#define portLONG		long
-#define portSHORT		short
-#define portSTACK_TYPE	uint32_t
-#define portBASE_TYPE	long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE StackType_t;
-typedef long BaseType_t;
-typedef unsigned long UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC 1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Architecture specifics. */
-#define portSTACK_GROWTH			( -1 )
-#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT			8
+    #define portSTACK_GROWTH      ( -1 )
+    #define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT    8
 /*-----------------------------------------------------------*/
 
 /* Compiler directives. */
-#define portWEAK_SYMBOL				__attribute__( ( weak ) )
+    #define portWEAK_SYMBOL    __attribute__( ( weak ) )
 
 /*-----------------------------------------------------------*/
 
 
 /* Scheduler utilities. */
-#define portYIELD()											\
-{															\
-	/* Set a PendSV to request a context switch. */			\
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;			\
-	__DSB();												\
-	__ISB();												\
-}
+    #define portYIELD()                                 \
+    {                                                   \
+        /* Set a PendSV to request a context switch. */ \
+        portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
+        __DSB();                                        \
+        __ISB();                                        \
+    }
 
-#define portNVIC_INT_CTRL_REG		( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT		( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()
-#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired != pdFALSE ) portYIELD()
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 
 /*-----------------------------------------------------------*/
 
 /* Architecture specific optimisations. */
-#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
-	#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
-#endif
+    #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
+        #define configUSE_PORT_OPTIMISED_TASK_SELECTION    1
+    #endif
 
-#if( configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 )
+    #if ( configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 )
 
-	/* Check the configuration. */
-	#if( configMAX_PRIORITIES > 32 )
-		#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
-	#endif
+/* Check the configuration. */
+        #if ( configMAX_PRIORITIES > 32 )
+            #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
+        #endif
 
-	/* Store/clear the ready priorities in a bit map. */
-	#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
-	#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
+/* Store/clear the ready priorities in a bit map. */
+        #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities )    ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
+        #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities )     ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
 
-	/*-----------------------------------------------------------*/
+/*-----------------------------------------------------------*/
 
-	#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( ( uint32_t ) __CLZ( ( uxReadyPriorities ) ) ) )
+        #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities )    uxTopPriority = ( 31UL - ( ( uint32_t ) __CLZ( ( uxReadyPriorities ) ) ) )
 
-#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
+    #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
 /*-----------------------------------------------------------*/
 
 /* Critical section management. */
-extern void vPortEnterCritical( void );
-extern void vPortExitCritical( void );
+    extern void vPortEnterCritical( void );
+    extern void vPortExitCritical( void );
 
-#define portDISABLE_INTERRUPTS()							\
-{															\
-	__set_BASEPRI( configMAX_SYSCALL_INTERRUPT_PRIORITY );	\
-	__DSB();												\
-	__ISB();												\
-}
+    #define portDISABLE_INTERRUPTS()                           \
+    {                                                          \
+        __set_BASEPRI( configMAX_SYSCALL_INTERRUPT_PRIORITY ); \
+        __DSB();                                               \
+        __ISB();                                               \
+    }
 
-#define portENABLE_INTERRUPTS()					__set_BASEPRI( 0 )
-#define portENTER_CRITICAL()					vPortEnterCritical()
-#define portEXIT_CRITICAL()						vPortExitCritical()
-#define portSET_INTERRUPT_MASK_FROM_ISR()		__get_BASEPRI(); portDISABLE_INTERRUPTS()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)	__set_BASEPRI( x )
+    #define portENABLE_INTERRUPTS()                   __set_BASEPRI( 0 )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         __get_BASEPRI(); portDISABLE_INTERRUPTS()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    __set_BASEPRI( x )
 /*-----------------------------------------------------------*/
 
 /* Tickless idle/low power functionality. */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site.  These are
-not necessary for to use this port.  They are defined so the common demo files
-(which build with all the ports) will build. */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+ * not necessary for to use this port.  They are defined so the common demo files
+ * (which build with all the ports) will build. */
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
-#ifdef configASSERT
-	void vPortValidateInterruptPriority( void );
-	#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() 	vPortValidateInterruptPriority()
-#endif
+    #ifdef configASSERT
+        void vPortValidateInterruptPriority( void );
+        #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()    vPortValidateInterruptPriority()
+    #endif
 
 /* portNOP() is not required by this port. */
-#define portNOP()
+    #define portNOP()
 
-#define portINLINE	__inline
+    #define portINLINE              __inline
 
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE inline __attribute__(( always_inline))
-#endif
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE    inline __attribute__( ( always_inline ) )
+    #endif
 
 /*-----------------------------------------------------------*/
 
-portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
-{
-uint32_t ulCurrentInterrupt;
-BaseType_t xReturn;
+    portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
+    {
+        uint32_t ulCurrentInterrupt;
+        BaseType_t xReturn;
 
-	/* Obtain the number of the currently executing interrupt. */
-	__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+        /* Obtain the number of the currently executing interrupt. */
+        __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
-	if( ulCurrentInterrupt == 0 )
-	{
-		xReturn = pdFALSE;
-	}
-	else
-	{
-		xReturn = pdTRUE;
-	}
+        if( ulCurrentInterrupt == 0 )
+        {
+            xReturn = pdFALSE;
+        }
+        else
+        {
+            xReturn = pdTRUE;
+        }
 
-	return xReturn;
-}
+        return xReturn;
+    }
 
 /*-----------------------------------------------------------*/
 
 /* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
-the source code because to do so would cause other compilers to generate
-warnings. */
-#pragma diag_suppress=Pe191
-#pragma diag_suppress=Pa082
+ * the source code because to do so would cause other compilers to generate
+ * warnings. */
+    #pragma diag_suppress=Pe191
+    #pragma diag_suppress=Pa082
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
-
diff --git a/portable/IAR/ARM_CM4F_MPU/port.c b/portable/IAR/ARM_CM4F_MPU/port.c
index 6b4dd0a78..6fd318fc3 100644
--- a/portable/IAR/ARM_CM4F_MPU/port.c
+++ b/portable/IAR/ARM_CM4F_MPU/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,15 +19,14 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------
- * Implementation of functions defined in portable.h for the ARM CM4F port.
- *----------------------------------------------------------*/
+* Implementation of functions defined in portable.h for the ARM CM4F MPU port.
+*----------------------------------------------------------*/
 
 /* IAR includes. */
 #include 
@@ -44,100 +43,101 @@
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
 #ifndef __ARMVFP__
-	#error This port can only be used when the project options are configured to enable hardware floating point support.
+    #error This port can only be used when the project options are configured to enable hardware floating point support.
 #endif
 
-#if( configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 )
-	#error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+#if ( configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 )
+    #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See http: /*www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
 #endif
 
 #ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 1UL << 2UL )
+    #define configSYSTICK_CLOCK_HZ      configCPU_CLOCK_HZ
+    /* Ensure the SysTick is clocked at the same frequency as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 1UL << 2UL )
 #else
-	/* The way the SysTick is clocked is not modified in case it is not the same
-	as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 0 )
+
+/* The way the SysTick is clocked is not modified in case it is not the same
+ * as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 0 )
 #endif
 
 /* Constants required to manipulate the core.  Registers first... */
-#define portNVIC_SYSTICK_CTRL_REG				( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG				( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG		( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG					( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
-#define portNVIC_SYSPRI1_REG					( * ( ( volatile uint32_t * ) 0xe000ed1c ) )
-#define portNVIC_SYS_CTRL_STATE_REG				( * ( ( volatile uint32_t * ) 0xe000ed24 ) )
-#define portNVIC_MEM_FAULT_ENABLE				( 1UL << 16UL )
+#define portNVIC_SYSTICK_CTRL_REG                 ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG                 ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG        ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SHPR3_REG                        ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SHPR2_REG                        ( *( ( volatile uint32_t * ) 0xe000ed1c ) )
+#define portNVIC_SYS_CTRL_STATE_REG               ( *( ( volatile uint32_t * ) 0xe000ed24 ) )
+#define portNVIC_MEM_FAULT_ENABLE                 ( 1UL << 16UL )
 
 /* Constants required to access and manipulate the MPU. */
-#define portMPU_TYPE_REG						( * ( ( volatile uint32_t * ) 0xe000ed90 ) )
-#define portMPU_REGION_BASE_ADDRESS_REG			( * ( ( volatile uint32_t * ) 0xe000ed9C ) )
-#define portMPU_REGION_ATTRIBUTE_REG			( * ( ( volatile uint32_t * ) 0xe000edA0 ) )
-#define portMPU_CTRL_REG						( * ( ( volatile uint32_t * ) 0xe000ed94 ) )
-#define portEXPECTED_MPU_TYPE_VALUE				( 8UL << 8UL ) /* 8 regions, unified. */
-#define portMPU_ENABLE							( 0x01UL )
-#define portMPU_BACKGROUND_ENABLE				( 1UL << 2UL )
-#define portPRIVILEGED_EXECUTION_START_ADDRESS	( 0UL )
-#define portMPU_REGION_VALID					( 0x10UL )
-#define portMPU_REGION_ENABLE					( 0x01UL )
-#define portPERIPHERALS_START_ADDRESS			0x40000000UL
-#define portPERIPHERALS_END_ADDRESS				0x5FFFFFFFUL
+#define portMPU_TYPE_REG                          ( *( ( volatile uint32_t * ) 0xe000ed90 ) )
+#define portMPU_REGION_BASE_ADDRESS_REG           ( *( ( volatile uint32_t * ) 0xe000ed9C ) )
+#define portMPU_REGION_ATTRIBUTE_REG              ( *( ( volatile uint32_t * ) 0xe000edA0 ) )
+#define portMPU_CTRL_REG                          ( *( ( volatile uint32_t * ) 0xe000ed94 ) )
+#define portEXPECTED_MPU_TYPE_VALUE               ( portTOTAL_NUM_REGIONS << 8UL )
+#define portMPU_ENABLE                            ( 0x01UL )
+#define portMPU_BACKGROUND_ENABLE                 ( 1UL << 2UL )
+#define portPRIVILEGED_EXECUTION_START_ADDRESS    ( 0UL )
+#define portMPU_REGION_VALID                      ( 0x10UL )
+#define portMPU_REGION_ENABLE                     ( 0x01UL )
+#define portPERIPHERALS_START_ADDRESS             0x40000000UL
+#define portPERIPHERALS_END_ADDRESS               0x5FFFFFFFUL
 
 /* ...then bits in the registers. */
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portNVIC_PENDSVCLEAR_BIT 			( 1UL << 27UL )
-#define portNVIC_PEND_SYSTICK_CLEAR_BIT		( 1UL << 25UL )
+#define portNVIC_SYSTICK_INT_BIT                  ( 1UL << 1UL )
+#define portNVIC_SYSTICK_ENABLE_BIT               ( 1UL << 0UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT           ( 1UL << 16UL )
+#define portNVIC_PENDSVCLEAR_BIT                  ( 1UL << 27UL )
+#define portNVIC_PEND_SYSTICK_CLEAR_BIT           ( 1UL << 25UL )
 
 /* Constants used to detect a Cortex-M7 r0p1 core, which should use the ARM_CM7
  * r0p1 port. */
-#define portCPUID							( * ( ( volatile uint32_t * ) 0xE000ed00 ) )
-#define portCORTEX_M7_r0p1_ID				( 0x410FC271UL )
-#define portCORTEX_M7_r0p0_ID				( 0x410FC270UL )
+#define portCPUID                                 ( *( ( volatile uint32_t * ) 0xE000ed00 ) )
+#define portCORTEX_M7_r0p1_ID                     ( 0x410FC271UL )
+#define portCORTEX_M7_r0p0_ID                     ( 0x410FC270UL )
 
-#define portNVIC_PENDSV_PRI					( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
-#define portNVIC_SYSTICK_PRI				( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
-#define portNVIC_SVC_PRI					( ( ( uint32_t ) configMAX_SYSCALL_INTERRUPT_PRIORITY - 1UL ) << 24UL )
+#define portNVIC_PENDSV_PRI                       ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
+#define portNVIC_SYSTICK_PRI                      ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
+#define portNVIC_SVC_PRI                          ( ( ( uint32_t ) configMAX_SYSCALL_INTERRUPT_PRIORITY - 1UL ) << 24UL )
 
 /* Constants required to check the validity of an interrupt priority. */
-#define portFIRST_USER_INTERRUPT_NUMBER		( 16 )
-#define portNVIC_IP_REGISTERS_OFFSET_16 	( 0xE000E3F0 )
-#define portAIRCR_REG						( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
-#define portMAX_8_BIT_VALUE					( ( uint8_t ) 0xff )
-#define portTOP_BIT_OF_BYTE					( ( uint8_t ) 0x80 )
-#define portMAX_PRIGROUP_BITS				( ( uint8_t ) 7 )
-#define portPRIORITY_GROUP_MASK				( 0x07UL << 8UL )
-#define portPRIGROUP_SHIFT					( 8UL )
+#define portFIRST_USER_INTERRUPT_NUMBER           ( 16 )
+#define portNVIC_IP_REGISTERS_OFFSET_16           ( 0xE000E3F0 )
+#define portAIRCR_REG                             ( *( ( volatile uint32_t * ) 0xE000ED0C ) )
+#define portMAX_8_BIT_VALUE                       ( ( uint8_t ) 0xff )
+#define portTOP_BIT_OF_BYTE                       ( ( uint8_t ) 0x80 )
+#define portMAX_PRIGROUP_BITS                     ( ( uint8_t ) 7 )
+#define portPRIORITY_GROUP_MASK                   ( 0x07UL << 8UL )
+#define portPRIGROUP_SHIFT                        ( 8UL )
 
 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
-#define portVECTACTIVE_MASK					( 0xFFUL )
+#define portVECTACTIVE_MASK                       ( 0xFFUL )
 
 /* Constants required to manipulate the VFP. */
-#define portFPCCR							( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
-#define portASPEN_AND_LSPEN_BITS			( 0x3UL << 30UL )
+#define portFPCCR                                 ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
+#define portASPEN_AND_LSPEN_BITS                  ( 0x3UL << 30UL )
 
 /* Constants required to set up the initial stack. */
-#define portINITIAL_XPSR					( 0x01000000 )
-#define portINITIAL_EXC_RETURN				( 0xfffffffd )
-#define portINITIAL_CONTROL_IF_UNPRIVILEGED	( 0x03 )
-#define portINITIAL_CONTROL_IF_PRIVILEGED	( 0x02 )
+#define portINITIAL_XPSR                          ( 0x01000000 )
+#define portINITIAL_EXC_RETURN                    ( 0xfffffffd )
+#define portINITIAL_CONTROL_IF_UNPRIVILEGED       ( 0x03 )
+#define portINITIAL_CONTROL_IF_PRIVILEGED         ( 0x02 )
 
 /* Offsets in the stack to the parameters when inside the SVC handler. */
-#define portOFFSET_TO_PC						( 6 )
+#define portOFFSET_TO_PC                          ( 6 )
 
 /* The systick is a 24-bit counter. */
-#define portMAX_24_BIT_NUMBER				( 0xffffffUL )
+#define portMAX_24_BIT_NUMBER                     ( 0xffffffUL )
 
 /* A fiddle factor to estimate the number of SysTick counts that would have
-occurred while the SysTick counter is stopped during tickless idle
-calculations. */
-#define portMISSED_COUNTS_FACTOR			( 45UL )
+ * occurred while the SysTick counter is stopped during tickless idle
+ * calculations. */
+#define portMISSED_COUNTS_FACTOR                  ( 45UL )
 
 /* For strict compliance with the Cortex-M spec the task start address should
-have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
-#define portSTART_ADDRESS_MASK				( ( StackType_t ) 0xfffffffeUL )
+ * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
+#define portSTART_ADDRESS_MASK                    ( ( StackType_t ) 0xfffffffeUL )
 
 /*
  * Configure a number of standard MPU regions that are used by all tasks.
@@ -176,7 +176,7 @@ extern void vPortEnableVFP( void );
 /*
  * The C portion of the SVC handler.
  */
-void vPortSVCHandler_C( uint32_t *pulParam );
+void vPortSVCHandler_C( uint32_t * pulParam );
 
 /*
  * Called from the SVC handler used to start the scheduler.
@@ -198,7 +198,7 @@ extern void vPortResetPrivilege( BaseType_t xRunningPrivileged );
 /*-----------------------------------------------------------*/
 
 /* Each task maintains its own interrupt status in the critical nesting
-variable. */
+ * variable. */
 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 
 /*
@@ -206,10 +206,10 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
  * FreeRTOS API functions are not called from interrupts that have been assigned
  * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
  */
-#if( configASSERT_DEFINED == 1 )
-	 static uint8_t ucMaxSysCallPriority = 0;
-	 static uint32_t ulMaxPRIGROUPValue = 0;
-	 static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
+#if ( configASSERT_DEFINED == 1 )
+    static uint8_t ucMaxSysCallPriority = 0;
+    static uint32_t ulMaxPRIGROUPValue = 0;
+    static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
 #endif /* configASSERT_DEFINED */
 
 /*-----------------------------------------------------------*/
@@ -217,104 +217,115 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 /*
  * See header file for description.
  */
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged )
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters,
+                                     BaseType_t xRunPrivileged )
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	 * interrupt. */
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
 
-	/* Offset added to account for the way the MCU uses the stack on entry/exit
-	 * of interrupts, and to ensure alignment. */
-	pxTopOfStack--;
+    /* Offset added to account for the way the MCU uses the stack on entry/exit
+     * of interrupts, and to ensure alignment. */
+    pxTopOfStack--;
 
-	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
-	pxTopOfStack--;
-	*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;	/* PC */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) 0;	/* LR */
+    *pxTopOfStack = portINITIAL_XPSR;                                    /* xPSR */
+    pxTopOfStack--;
+    *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0;                                   /* LR */
 
-	/* Save code space by skipping register initialisation. */
-	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
-	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
+    /* Save code space by skipping register initialisation. */
+    pxTopOfStack -= 5;                            /* R12, R3, R2 and R1. */
+    *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
 
-	/* A save method is being used that requires each task to maintain its
-	 * own exec return value. */
-	pxTopOfStack--;
-	*pxTopOfStack = portINITIAL_EXC_RETURN;
+    /* A save method is being used that requires each task to maintain its
+     * own exec return value. */
+    pxTopOfStack--;
+    *pxTopOfStack = portINITIAL_EXC_RETURN;
 
-	pxTopOfStack -= 9;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
+    pxTopOfStack -= 9; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
 
-	if( xRunPrivileged == pdTRUE )
-	{
-		*pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;
-	}
-	else
-	{
-		*pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;
-	}
+    if( xRunPrivileged == pdTRUE )
+    {
+        *pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;
+    }
+    else
+    {
+        *pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;
+    }
 
-	return pxTopOfStack;
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
-void vPortSVCHandler_C( uint32_t *pulParam )
+void vPortSVCHandler_C( uint32_t * pulParam )
 {
-uint8_t ucSVCNumber;
-uint32_t ulPC;
-#if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 )
-	extern uint32_t __syscalls_flash_start__[];
-	extern uint32_t __syscalls_flash_end__[];
-#endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */
+    uint8_t ucSVCNumber;
+    uint32_t ulPC;
 
-	/* The stack contains: r0, r1, r2, r3, r12, LR, PC and xPSR. The first
-	 * argument (r0) is pulParam[ 0 ]. */
-	ulPC = pulParam[ portOFFSET_TO_PC ];
-	ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ];
-	switch( ucSVCNumber )
-	{
-		case portSVC_START_SCHEDULER	:	portNVIC_SYSPRI1_REG |= portNVIC_SVC_PRI;
-											vPortRestoreContextOfFirstTask();
-											break;
+    #if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 )
+        extern uint32_t __syscalls_flash_start__[];
+        extern uint32_t __syscalls_flash_end__[];
+    #endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */
 
-		case portSVC_YIELD				:	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-											/* Barriers are normally not required
-											 * but do ensure the code is completely
-											 * within the specified behaviour for the
-											 * architecture. */
-											__asm volatile( "dsb" ::: "memory" );
-											__asm volatile( "isb" );
+    /* The stack contains: r0, r1, r2, r3, r12, LR, PC and xPSR. The first
+     * argument (r0) is pulParam[ 0 ]. */
+    ulPC = pulParam[ portOFFSET_TO_PC ];
+    ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ];
 
-											break;
+    switch( ucSVCNumber )
+    {
+        case portSVC_START_SCHEDULER:
+            portNVIC_SHPR2_REG |= portNVIC_SVC_PRI;
+            vPortRestoreContextOfFirstTask();
+            break;
 
-	#if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 )
-		case portSVC_RAISE_PRIVILEGE	:	/* Only raise the privilege, if the
-											 * svc was raised from any of the
-											 * system calls. */
-											if( ulPC >= ( uint32_t ) __syscalls_flash_start__ &&
-												ulPC <= ( uint32_t ) __syscalls_flash_end__ )
-											{
-												__asm volatile
-												(
-													"	mrs r1, control		\n" /* Obtain current control value. */
-													"	bic r1, r1, #1		\n" /* Set privilege bit. */
-													"	msr control, r1		\n" /* Write back new control value. */
-													::: "r1", "memory"
-												);
-											}
-											break;
-	#else
-		case portSVC_RAISE_PRIVILEGE	:	__asm volatile
-											(
-												"	mrs r1, control		\n" /* Obtain current control value. */
-												"	bic r1, r1, #1		\n" /* Set privilege bit. */
-												"	msr control, r1		\n" /* Write back new control value. */
-												::: "r1", "memory"
-											);
-											break;
-	#endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */
+        case portSVC_YIELD:
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
 
-		default							:	/* Unknown SVC call. */
-											break;
-	}
+            /* Barriers are normally not required
+             * but do ensure the code is completely
+             * within the specified behaviour for the
+             * architecture. */
+            __asm volatile ( "dsb" ::: "memory" );
+            __asm volatile ( "isb" );
+
+            break;
+
+            #if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 )
+                case portSVC_RAISE_PRIVILEGE: /* Only raise the privilege, if the
+                                               * svc was raised from any of the
+                                               * system calls. */
+
+                    if( ( ulPC >= ( uint32_t ) __syscalls_flash_start__ ) &&
+                        ( ulPC <= ( uint32_t ) __syscalls_flash_end__ ) )
+                    {
+                        __asm volatile
+                        (
+                            "	mrs r1, control		\n"/* Obtain current control value. */
+                            "	bic r1, r1, #1		\n"/* Set privilege bit. */
+                            "	msr control, r1		\n"/* Write back new control value. */
+                            ::: "r1", "memory"
+                        );
+                    }
+
+                    break;
+            #else /* if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */
+                case portSVC_RAISE_PRIVILEGE:
+                    __asm volatile
+                    (
+                        "	mrs r1, control		\n"/* Obtain current control value. */
+                        "	bic r1, r1, #1		\n"/* Set privilege bit. */
+                        "	msr control, r1		\n"/* Write back new control value. */
+                        ::: "r1", "memory"
+                    );
+                    break;
+                    #endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */
+
+                default: /* Unknown SVC call. */
+                    break;
+    }
 }
 /*-----------------------------------------------------------*/
 
@@ -323,168 +334,170 @@ uint32_t ulPC;
  */
 BaseType_t xPortStartScheduler( void )
 {
-	/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
-	 * See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
-	configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
+    /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
+     * See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
+    configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
 
-	/* This port can be used on all revisions of the Cortex-M7 core other than
-	 * the r0p1 parts.  r0p1 parts should use the port from the
-	 * /source/portable/GCC/ARM_CM7/r0p1 directory. */
-	configASSERT( portCPUID != portCORTEX_M7_r0p1_ID );
-	configASSERT( portCPUID != portCORTEX_M7_r0p0_ID );
+    /* This port can be used on all revisions of the Cortex-M7 core other than
+     * the r0p1 parts.  r0p1 parts should use the port from the
+     * /source/portable/GCC/ARM_CM7/r0p1 directory. */
+    configASSERT( portCPUID != portCORTEX_M7_r0p1_ID );
+    configASSERT( portCPUID != portCORTEX_M7_r0p0_ID );
 
-	#if( configASSERT_DEFINED == 1 )
-	{
-		volatile uint32_t ulOriginalPriority;
-		volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
-		volatile uint8_t ucMaxPriorityValue;
+    #if ( configASSERT_DEFINED == 1 )
+        {
+            volatile uint32_t ulOriginalPriority;
+            volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
+            volatile uint8_t ucMaxPriorityValue;
 
-		/* Determine the maximum priority from which ISR safe FreeRTOS API
-		 * functions can be called.  ISR safe functions are those that end in
-		 * "FromISR".  FreeRTOS maintains separate thread and ISR API functions to
-		 * ensure interrupt entry is as fast and simple as possible.
+            /* Determine the maximum priority from which ISR safe FreeRTOS API
+             * functions can be called.  ISR safe functions are those that end in
+             * "FromISR".  FreeRTOS maintains separate thread and ISR API functions to
+             * ensure interrupt entry is as fast and simple as possible.
+             *
+             * Save the interrupt priority value that is about to be clobbered. */
+            ulOriginalPriority = *pucFirstUserPriorityRegister;
 
-		Save the interrupt priority value that is about to be clobbered. */
-		ulOriginalPriority = *pucFirstUserPriorityRegister;
+            /* Determine the number of priority bits available.  First write to all
+             * possible bits. */
+            *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
 
-		/* Determine the number of priority bits available.  First write to all
-		 * possible bits. */
-		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
+            /* Read the value back to see how many bits stuck. */
+            ucMaxPriorityValue = *pucFirstUserPriorityRegister;
 
-		/* Read the value back to see how many bits stuck. */
-		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
+            /* Use the same mask on the maximum system call priority. */
+            ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
 
-		/* Use the same mask on the maximum system call priority. */
-		ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
+            /* Calculate the maximum acceptable priority group value for the number
+             * of bits read back. */
+            ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
 
-		/* Calculate the maximum acceptable priority group value for the number
-		 * of bits read back. */
-		ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
-		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
-		{
-			ulMaxPRIGROUPValue--;
-			ucMaxPriorityValue <<= ( uint8_t ) 0x01;
-		}
+            while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
+            {
+                ulMaxPRIGROUPValue--;
+                ucMaxPriorityValue <<= ( uint8_t ) 0x01;
+            }
 
-		#ifdef __NVIC_PRIO_BITS
-		{
-			/* Check the CMSIS configuration that defines the number of
-			 * priority bits matches the number of priority bits actually queried
-			 * from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
-		}
-		#endif
+            #ifdef __NVIC_PRIO_BITS
+                {
+                    /* Check the CMSIS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
+                }
+            #endif
 
-		#ifdef configPRIO_BITS
-		{
-			/* Check the FreeRTOS configuration that defines the number of
-			 * priority bits matches the number of priority bits actually queried
-			 * from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
-		}
-		#endif
+            #ifdef configPRIO_BITS
+                {
+                    /* Check the FreeRTOS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
+                }
+            #endif
 
-		/* Shift the priority group value back to its position within the AIRCR
-		 * register. */
-		ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
-		ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
+            /* Shift the priority group value back to its position within the AIRCR
+             * register. */
+            ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
+            ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
 
-		/* Restore the clobbered interrupt priority register to its original
-		 * value. */
-		*pucFirstUserPriorityRegister = ulOriginalPriority;
-	}
-	#endif /* conifgASSERT_DEFINED */
+            /* Restore the clobbered interrupt priority register to its original
+             * value. */
+            *pucFirstUserPriorityRegister = ulOriginalPriority;
+        }
+    #endif /* conifgASSERT_DEFINED */
 
-	/* Make PendSV and SysTick the lowest priority interrupts. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+    /* Make PendSV and SysTick the lowest priority interrupts. */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
-	/* Configure the regions in the MPU that are common to all tasks. */
-	prvSetupMPU();
+    /* Configure the regions in the MPU that are common to all tasks. */
+    prvSetupMPU();
 
-	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-	 * here already. */
-	vPortSetupTimerInterrupt();
+    /* Start the timer that generates the tick ISR.  Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
 
-	/* Initialise the critical nesting count ready for the first task. */
-	uxCriticalNesting = 0;
+    /* Initialise the critical nesting count ready for the first task. */
+    uxCriticalNesting = 0;
 
-	/* Ensure the VFP is enabled - it should be anyway. */
-	vPortEnableVFP();
+    /* Ensure the VFP is enabled - it should be anyway. */
+    vPortEnableVFP();
 
-	/* Lazy save always. */
-	*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
+    /* Lazy save always. */
+    *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
 
-	/* Start the first task. */
-	vPortStartFirstTask();
+    /* Start the first task. */
+    vPortStartFirstTask();
 
-	/* Should not get here! */
-	return 0;
+    /* Should not get here! */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void )
 {
-	/* Not implemented in ports where there is nothing to return to.
-	 * Artificially force an assert. */
-	configASSERT( uxCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( uxCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void )
 {
- BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	portDISABLE_INTERRUPTS();
-	uxCriticalNesting++;
+    portDISABLE_INTERRUPTS();
+    uxCriticalNesting++;
 
-	vPortResetPrivilege( xRunningPrivileged );
+    vPortResetPrivilege( xRunningPrivileged );
 
-	/* This is not the interrupt safe version of the enter critical function so
-	 * assert() if it is being called from an interrupt context.  Only API
-	 * functions that end in "FromISR" can be used in an interrupt.  Only assert if
-	 * the critical nesting count is 1 to protect against recursive calls if the
-	 * assert function also uses a critical section. */
-	if( uxCriticalNesting == 1 )
-	{
-		configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
-	}
+    /* This is not the interrupt safe version of the enter critical function so
+     * assert() if it is being called from an interrupt context.  Only API
+     * functions that end in "FromISR" can be used in an interrupt.  Only assert if
+     * the critical nesting count is 1 to protect against recursive calls if the
+     * assert function also uses a critical section. */
+    if( uxCriticalNesting == 1 )
+    {
+        configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
+    }
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void )
 {
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	configASSERT( uxCriticalNesting );
+    configASSERT( uxCriticalNesting );
 
-	uxCriticalNesting--;
-	if( uxCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
+    uxCriticalNesting--;
 
-	vPortResetPrivilege( xRunningPrivileged );
+    if( uxCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
+
+    vPortResetPrivilege( xRunningPrivileged );
 }
 /*-----------------------------------------------------------*/
 
 void xPortSysTickHandler( void )
 {
-	/* The SysTick runs at the lowest interrupt priority, so when this interrupt
-	 * executes all interrupts must be unmasked.  There is therefore no need to
-	 * save and then restore the interrupt mask value as its value is already
-	 * known. */
-	portDISABLE_INTERRUPTS();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* A context switch is required.  Context switching is performed in
-			 * the PendSV interrupt.  Pend the PendSV interrupt. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portENABLE_INTERRUPTS();
+    /* The SysTick runs at the lowest interrupt priority, so when this interrupt
+     * executes all interrupts must be unmasked.  There is therefore no need to
+     * save and then restore the interrupt mask value as its value is already
+     * known. */
+    portDISABLE_INTERRUPTS();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* A context switch is required.  Context switching is performed in
+             * the PendSV interrupt.  Pend the PendSV interrupt. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+    portENABLE_INTERRUPTS();
 }
 /*-----------------------------------------------------------*/
 
@@ -494,256 +507,265 @@ void xPortSysTickHandler( void )
  */
 __weak void vPortSetupTimerInterrupt( void )
 {
-	/* Stop and clear the SysTick. */
-	portNVIC_SYSTICK_CTRL_REG = 0UL;
-	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+    /* Stop and clear the SysTick. */
+    portNVIC_SYSTICK_CTRL_REG = 0UL;
+    portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-	/* Configure SysTick to interrupt at the requested rate. */
-	portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
+    /* Configure SysTick to interrupt at the requested rate. */
+    portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+    portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
 }
 /*-----------------------------------------------------------*/
 
 static void prvSetupMPU( void )
 {
-extern uint32_t __privileged_functions_start__[];
-extern uint32_t __privileged_functions_end__[];
-extern uint32_t __FLASH_segment_start__[];
-extern uint32_t __FLASH_segment_end__[];
-extern uint32_t __privileged_data_start__[];
-extern uint32_t __privileged_data_end__[];
+    extern uint32_t __privileged_functions_start__[];
+    extern uint32_t __privileged_functions_end__[];
+    extern uint32_t __FLASH_segment_start__[];
+    extern uint32_t __FLASH_segment_end__[];
+    extern uint32_t __privileged_data_start__[];
+    extern uint32_t __privileged_data_end__[];
 
-	/* Check the expected MPU is present. */
-	if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
-	{
-		/* First setup the unprivileged flash for unprivileged read only access. */
-		portMPU_REGION_BASE_ADDRESS_REG =	( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */
-											( portMPU_REGION_VALID ) |
-											( portUNPRIVILEGED_FLASH_REGION );
+    /* The only permitted number of regions are 8 or 16. */
+    configASSERT( ( portTOTAL_NUM_REGIONS == 8 ) || ( portTOTAL_NUM_REGIONS == 16 ) );
 
-		portMPU_REGION_ATTRIBUTE_REG =	( portMPU_REGION_READ_ONLY ) |
-										( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
-										( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |
-										( portMPU_REGION_ENABLE );
+    /* Ensure that the configTOTAL_MPU_REGIONS is configured correctly. */
+    configASSERT( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE );
 
-		/* Setup the privileged flash for privileged only access.  This is where
-		 * the kernel code is placed. */
-		portMPU_REGION_BASE_ADDRESS_REG =	( ( uint32_t ) __privileged_functions_start__ ) | /* Base address. */
-											( portMPU_REGION_VALID ) |
-											( portPRIVILEGED_FLASH_REGION );
+    /* Check the expected MPU is present. */
+    if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
+    {
+        /* First setup the unprivileged flash for unprivileged read only access. */
+        portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */
+                                          ( portMPU_REGION_VALID ) |
+                                          ( portUNPRIVILEGED_FLASH_REGION );
 
-		portMPU_REGION_ATTRIBUTE_REG =	( portMPU_REGION_PRIVILEGED_READ_ONLY ) |
-										( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
-										( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __privileged_functions_start__ ) ) |
-										( portMPU_REGION_ENABLE );
+        portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_ONLY ) |
+                                       ( ( configTEX_S_C_B_FLASH & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) |
+                                       ( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |
+                                       ( portMPU_REGION_ENABLE );
 
-		/* Setup the privileged data RAM region.  This is where the kernel data
-		 * is placed. */
-		portMPU_REGION_BASE_ADDRESS_REG =	( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
-											( portMPU_REGION_VALID ) |
-											( portPRIVILEGED_RAM_REGION );
+        /* Setup the privileged flash for privileged only access.  This is where
+         * the kernel code is placed. */
+        portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __privileged_functions_start__ ) | /* Base address. */
+                                          ( portMPU_REGION_VALID ) |
+                                          ( portPRIVILEGED_FLASH_REGION );
 
-		portMPU_REGION_ATTRIBUTE_REG =	( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
-										( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
-										prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |
-										( portMPU_REGION_ENABLE );
+        portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |
+                                       ( ( configTEX_S_C_B_FLASH & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) |
+                                       ( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __privileged_functions_start__ ) ) |
+                                       ( portMPU_REGION_ENABLE );
 
-		/* By default allow everything to access the general peripherals.  The
-		 * system peripherals and registers are protected. */
-		portMPU_REGION_BASE_ADDRESS_REG =	( portPERIPHERALS_START_ADDRESS ) |
-											( portMPU_REGION_VALID ) |
-											( portGENERAL_PERIPHERALS_REGION );
+        /* Setup the privileged data RAM region.  This is where the kernel data
+         * is placed. */
+        portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
+                                          ( portMPU_REGION_VALID ) |
+                                          ( portPRIVILEGED_RAM_REGION );
 
-		portMPU_REGION_ATTRIBUTE_REG =	( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |
-										( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |
-										( portMPU_REGION_ENABLE );
+        portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
+                                       ( ( configTEX_S_C_B_SRAM & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) |
+                                       prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |
+                                       ( portMPU_REGION_ENABLE );
 
-		/* Enable the memory fault exception. */
-		portNVIC_SYS_CTRL_STATE_REG |= portNVIC_MEM_FAULT_ENABLE;
+        /* By default allow everything to access the general peripherals.  The
+         * system peripherals and registers are protected. */
+        portMPU_REGION_BASE_ADDRESS_REG = ( portPERIPHERALS_START_ADDRESS ) |
+                                          ( portMPU_REGION_VALID ) |
+                                          ( portGENERAL_PERIPHERALS_REGION );
 
-		/* Enable the MPU with the background region configured. */
-		portMPU_CTRL_REG |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );
-	}
+        portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |
+                                       ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |
+                                       ( portMPU_REGION_ENABLE );
+
+        /* Enable the memory fault exception. */
+        portNVIC_SYS_CTRL_STATE_REG |= portNVIC_MEM_FAULT_ENABLE;
+
+        /* Enable the MPU with the background region configured. */
+        portMPU_CTRL_REG |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );
+    }
 }
 /*-----------------------------------------------------------*/
 
 static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes )
 {
-uint32_t ulRegionSize, ulReturnValue = 4;
+    uint32_t ulRegionSize, ulReturnValue = 4;
 
-	/* 32 is the smallest region size, 31 is the largest valid value for
-	 * ulReturnValue. */
-	for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )
-	{
-		if( ulActualSizeInBytes <= ulRegionSize )
-		{
-			break;
-		}
-		else
-		{
-			ulReturnValue++;
-		}
-	}
+    /* 32 is the smallest region size, 31 is the largest valid value for
+     * ulReturnValue. */
+    for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )
+    {
+        if( ulActualSizeInBytes <= ulRegionSize )
+        {
+            break;
+        }
+        else
+        {
+            ulReturnValue++;
+        }
+    }
 
-	/* Shift the code by one before returning so it can be written directly
-	 * into the the correct bit position of the attribute register. */
-	return ( ulReturnValue << 1UL );
+    /* Shift the code by one before returning so it can be written directly
+     * into the the correct bit position of the attribute register. */
+    return( ulReturnValue << 1UL );
 }
 /*-----------------------------------------------------------*/
 
-void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t ulStackDepth )
+void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
+                                const struct xMEMORY_REGION * const xRegions,
+                                StackType_t * pxBottomOfStack,
+                                uint32_t ulStackDepth )
 {
-extern uint32_t __SRAM_segment_start__[];
-extern uint32_t __SRAM_segment_end__[];
-extern uint32_t __privileged_data_start__[];
-extern uint32_t __privileged_data_end__[];
-int32_t lIndex;
-uint32_t ul;
+    extern uint32_t __SRAM_segment_start__[];
+    extern uint32_t __SRAM_segment_end__[];
+    extern uint32_t __privileged_data_start__[];
+    extern uint32_t __privileged_data_end__[];
+    int32_t lIndex;
+    uint32_t ul;
 
-	if( xRegions == NULL )
-	{
-		/* No MPU regions are specified so allow access to all RAM. */
-		xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
-				( ( uint32_t ) __SRAM_segment_start__ ) | /* Base address. */
-				( portMPU_REGION_VALID ) |
-				( portSTACK_REGION );
+    if( xRegions == NULL )
+    {
+        /* No MPU regions are specified so allow access to all RAM. */
+        xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
+            ( ( uint32_t ) __SRAM_segment_start__ ) | /* Base address. */
+            ( portMPU_REGION_VALID ) |
+            ( portSTACK_REGION );
 
-		xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
-				( portMPU_REGION_READ_WRITE ) |
-				( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
-				( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) |
-				( portMPU_REGION_ENABLE );
+        xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
+            ( portMPU_REGION_READ_WRITE ) |
+            ( ( configTEX_S_C_B_SRAM & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) |
+            ( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) |
+            ( portMPU_REGION_ENABLE );
 
-		/* Re-instate the privileged only RAM region as xRegion[ 0 ] will have
-		 * just removed the privileged only parameters. */
-		xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =
-				( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
-				( portMPU_REGION_VALID ) |
-				( portSTACK_REGION + 1 );
+        /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have
+         * just removed the privileged only parameters. */
+        xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =
+            ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
+            ( portMPU_REGION_VALID ) |
+            ( portSTACK_REGION + 1 );
 
-		xMPUSettings->xRegion[ 1 ].ulRegionAttribute =
-				( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
-				( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
-				prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |
-				( portMPU_REGION_ENABLE );
+        xMPUSettings->xRegion[ 1 ].ulRegionAttribute =
+            ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
+            ( ( configTEX_S_C_B_SRAM & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) |
+            prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |
+            ( portMPU_REGION_ENABLE );
 
-		/* Invalidate all other regions. */
-		for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
-		{
-			xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
-			xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
-		}
-	}
-	else
-	{
-		/* This function is called automatically when the task is created - in
-		 * which case the stack region parameters will be valid.  At all other
-		 * times the stack parameters will not be valid and it is assumed that the
-		 * stack region has already been configured. */
-		if( ulStackDepth > 0 )
-		{
-			/* Define the region that allows access to the stack. */
-			xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
-					( ( uint32_t ) pxBottomOfStack ) |
-					( portMPU_REGION_VALID ) |
-					( portSTACK_REGION ); /* Region number. */
+        /* Invalidate all other regions. */
+        for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
+        {
+            xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
+            xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
+        }
+    }
+    else
+    {
+        /* This function is called automatically when the task is created - in
+         * which case the stack region parameters will be valid.  At all other
+         * times the stack parameters will not be valid and it is assumed that the
+         * stack region has already been configured. */
+        if( ulStackDepth > 0 )
+        {
+            /* Define the region that allows access to the stack. */
+            xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
+                ( ( uint32_t ) pxBottomOfStack ) |
+                ( portMPU_REGION_VALID ) |
+                ( portSTACK_REGION ); /* Region number. */
 
-			xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
-					( portMPU_REGION_READ_WRITE ) | /* Read and write. */
-					( prvGetMPURegionSizeSetting( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) ) |
-					( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
-					( portMPU_REGION_ENABLE );
-		}
+            xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
+                ( portMPU_REGION_READ_WRITE ) | /* Read and write. */
+                ( prvGetMPURegionSizeSetting( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) ) |
+                ( ( configTEX_S_C_B_SRAM & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) |
+                ( portMPU_REGION_ENABLE );
+        }
 
-		lIndex = 0;
+        lIndex = 0;
 
-		for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
-		{
-			if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )
-			{
-				/* Translate the generic region definition contained in
-				 * xRegions into the CM3 specific MPU settings that are then
-				 * stored in xMPUSettings. */
-				xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =
-						( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) |
-						( portMPU_REGION_VALID ) |
-						( portSTACK_REGION + ul ); /* Region number. */
+        for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
+        {
+            if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )
+            {
+                /* Translate the generic region definition contained in
+                 * xRegions into the CM4 specific MPU settings that are then
+                 * stored in xMPUSettings. */
+                xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =
+                    ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) |
+                    ( portMPU_REGION_VALID ) |
+                    ( portSTACK_REGION + ul ); /* Region number. */
 
-				xMPUSettings->xRegion[ ul ].ulRegionAttribute =
-						( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |
-						( xRegions[ lIndex ].ulParameters ) |
-						( portMPU_REGION_ENABLE );
-			}
-			else
-			{
-				/* Invalidate the region. */
-				xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
-				xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
-			}
+                xMPUSettings->xRegion[ ul ].ulRegionAttribute =
+                    ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |
+                    ( xRegions[ lIndex ].ulParameters ) |
+                    ( portMPU_REGION_ENABLE );
+            }
+            else
+            {
+                /* Invalidate the region. */
+                xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
+                xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
+            }
 
-			lIndex++;
-		}
-	}
+            lIndex++;
+        }
+    }
 }
 /*-----------------------------------------------------------*/
 
-#if( configASSERT_DEFINED == 1 )
+#if ( configASSERT_DEFINED == 1 )
 
-	void vPortValidateInterruptPriority( void )
-	{
-	uint32_t ulCurrentInterrupt;
-	uint8_t ucCurrentPriority;
+    void vPortValidateInterruptPriority( void )
+    {
+        uint32_t ulCurrentInterrupt;
+        uint8_t ucCurrentPriority;
 
-		/* Obtain the number of the currently executing interrupt. */
-		__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+        /* Obtain the number of the currently executing interrupt. */
+        __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
-		/* Is the interrupt number a user defined interrupt? */
-		if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
-		{
-			/* Look up the interrupt's priority. */
-			ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
+        /* Is the interrupt number a user defined interrupt? */
+        if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
+        {
+            /* Look up the interrupt's priority. */
+            ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
 
-			/* The following assertion will fail if a service routine (ISR) for
-			 * an interrupt that has been assigned a priority above
-			 * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
-			 * function.  ISR safe FreeRTOS API functions must *only* be called
-			 * from interrupts that have been assigned a priority at or below
-			 * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+            /* The following assertion will fail if a service routine (ISR) for
+             * an interrupt that has been assigned a priority above
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
+             * function.  ISR safe FreeRTOS API functions must *only* be called
+             * from interrupts that have been assigned a priority at or below
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Numerically low interrupt priority numbers represent logically high
+             * interrupt priorities, therefore the priority of the interrupt must
+             * be set to a value equal to or numerically *higher* than
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Interrupts that	use the FreeRTOS API must not be left at their
+             * default priority of	zero as that is the highest possible priority,
+             * which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
+             * and	therefore also guaranteed to be invalid.
+             *
+             * FreeRTOS maintains separate thread and ISR API functions to ensure
+             * interrupt entry is as fast and simple as possible.
+             *
+             * The following links provide detailed information:
+             * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+             * https://www.FreeRTOS.org/FAQHelp.html */
+            configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
+        }
 
-			 * Numerically low interrupt priority numbers represent logically high
-			 * interrupt priorities, therefore the priority of the interrupt must
-			 * be set to a value equal to or numerically *higher* than
-			 * configMAX_SYSCALL_INTERRUPT_PRIORITY.
-
-			 * Interrupts that	use the FreeRTOS API must not be left at their
-			 * default priority of	zero as that is the highest possible priority,
-			 * which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
-			 * and	therefore also guaranteed to be invalid.
-
-			 * FreeRTOS maintains separate thread and ISR API functions to ensure
-			 * interrupt entry is as fast and simple as possible.
-
-			 * The following links provide detailed information:
-			 * http://www.freertos.org/RTOS-Cortex-M3-M4.html
-			 * http://www.freertos.org/FAQHelp.html */
-			configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
-		}
-
-		/* Priority grouping:  The interrupt controller (NVIC) allows the bits
-		 * that define each interrupt's priority to be split between bits that
-		 * define the interrupt's pre-emption priority bits and bits that define
-		 * the interrupt's sub-priority.  For simplicity all bits must be defined
-		 * to be pre-emption priority bits.  The following assertion will fail if
-		 * this is not the case (if some bits represent a sub-priority).
-
-		 * If the application only uses CMSIS libraries for interrupt
-		 * configuration then the correct setting can be achieved on all Cortex-M
-		 * devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
-		 * scheduler.  Note however that some vendor specific peripheral libraries
-		 * assume a non-zero priority group setting, in which cases using a value
-		 * of zero will result in unpredictable behaviour. */
-		configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
-	}
+        /* Priority grouping:  The interrupt controller (NVIC) allows the bits
+         * that define each interrupt's priority to be split between bits that
+         * define the interrupt's pre-emption priority bits and bits that define
+         * the interrupt's sub-priority.  For simplicity all bits must be defined
+         * to be pre-emption priority bits.  The following assertion will fail if
+         * this is not the case (if some bits represent a sub-priority).
+         *
+         * If the application only uses CMSIS libraries for interrupt
+         * configuration then the correct setting can be achieved on all Cortex-M
+         * devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
+         * scheduler.  Note however that some vendor specific peripheral libraries
+         * assume a non-zero priority group setting, in which cases using a value
+         * of zero will result in unpredictable behaviour. */
+        configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
+    }
 
 #endif /* configASSERT_DEFINED */
 /*-----------------------------------------------------------*/
diff --git a/portable/IAR/ARM_CM4F_MPU/portasm.s b/portable/IAR/ARM_CM4F_MPU/portasm.s
index c8bca8891..fb3b1047c 100644
--- a/portable/IAR/ARM_CM4F_MPU/portasm.s
+++ b/portable/IAR/ARM_CM4F_MPU/portasm.s
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -91,10 +91,23 @@ xPortPendSVHandler:
 
 	/* Region Base Address register. */
 	ldr r2, =0xe000ed9c
-	/* Read 4 sets of MPU registers. */
+	/* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
 	ldmia r1!, {r4-r11}
-	/* Write 4 sets of MPU registers. */
-	stmia r2!, {r4-r11}
+	/* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
+	stmia r2, {r4-r11}
+
+	#ifdef configTOTAL_MPU_REGIONS
+		#if ( configTOTAL_MPU_REGIONS == 16 )
+			/* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
+			ldmia r1!, {r4-r11}
+			/* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
+			stmia r2, {r4-r11}
+			/* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
+			ldmia r1!, {r4-r11}
+			/* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
+			stmia r2, {r4-r11}
+		#endif /* configTOTAL_MPU_REGIONS == 16. */
+	#endif /* configTOTAL_MPU_REGIONS */
 
 	ldr r2, =0xe000ed94	/* MPU_CTRL register. */
 	ldr r3, [r2]		/* Read the value of MPU_CTRL. */
@@ -178,10 +191,23 @@ vPortRestoreContextOfFirstTask:
 
 	/* Region Base Address register. */
 	ldr r2, =0xe000ed9c
-	/* Read 4 sets of MPU registers. */
+	/* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
 	ldmia r1!, {r4-r11}
-	/* Write 4 sets of MPU registers. */
-	stmia r2!, {r4-r11}
+	/* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
+	stmia r2, {r4-r11}
+
+	#ifdef configTOTAL_MPU_REGIONS
+		#if ( configTOTAL_MPU_REGIONS == 16 )
+			/* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
+			ldmia r1!, {r4-r11}
+			/* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
+			stmia r2, {r4-r11}
+			/* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
+			ldmia r1!, {r4-r11}
+			/* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
+			stmia r2, {r4-r11}
+		#endif /* configTOTAL_MPU_REGIONS == 16. */
+	#endif /* configTOTAL_MPU_REGIONS */
 
 	ldr r2, =0xe000ed94	/* MPU_CTRL register. */
 	ldr r3, [r2]		/* Read the value of MPU_CTRL. */
diff --git a/portable/IAR/ARM_CM4F_MPU/portmacro.h b/portable/IAR/ARM_CM4F_MPU/portmacro.h
index db6d48e0c..0f3c23fd8 100644
--- a/portable/IAR/ARM_CM4F_MPU/portmacro.h
+++ b/portable/IAR/ARM_CM4F_MPU/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,19 +19,20 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 
 #ifndef PORTMACRO_H
 #define PORTMACRO_H
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
-extern "C" {
+    extern "C" {
 #endif
+/* *INDENT-ON* */
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -47,114 +48,201 @@ extern "C" {
 #include 
 
 /* Type definitions. */
-#define portCHAR		char
-#define portFLOAT		float
-#define portDOUBLE		double
-#define portLONG		long
-#define portSHORT		short
-#define portSTACK_TYPE	uint32_t
-#define portBASE_TYPE	long
+#define portCHAR          char
+#define portFLOAT         float
+#define portDOUBLE        double
+#define portLONG          long
+#define portSHORT         short
+#define portSTACK_TYPE    uint32_t
+#define portBASE_TYPE     long
 
-typedef portSTACK_TYPE StackType_t;
-typedef long BaseType_t;
-typedef unsigned long UBaseType_t;
+typedef portSTACK_TYPE   StackType_t;
+typedef long             BaseType_t;
+typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffff
+#if ( configUSE_16_BIT_TICKS == 1 )
+    typedef uint16_t     TickType_t;
+    #define portMAX_DELAY              ( TickType_t ) 0xffff
 #else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+    typedef uint32_t     TickType_t;
+    #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC 1
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+    #define portTICK_TYPE_IS_ATOMIC    1
 #endif
 /*-----------------------------------------------------------*/
 
 /* MPU specific constants. */
-#define portUSING_MPU_WRAPPERS		1
-#define portPRIVILEGE_BIT			( 0x80000000UL )
+#define portUSING_MPU_WRAPPERS                                   1
+#define portPRIVILEGE_BIT                                        ( 0x80000000UL )
 
-#define portMPU_REGION_READ_WRITE								( 0x03UL << 24UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY						( 0x05UL << 24UL )
-#define portMPU_REGION_READ_ONLY								( 0x06UL << 24UL )
-#define portMPU_REGION_PRIVILEGED_READ_WRITE					( 0x01UL << 24UL )
-#define portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY	( 0x02UL << 24UL )
-#define portMPU_REGION_CACHEABLE_BUFFERABLE						( 0x07UL << 16UL )
-#define portMPU_REGION_EXECUTE_NEVER							( 0x01UL << 28UL )
+#define portMPU_REGION_READ_WRITE                                ( 0x03UL << 24UL )
+#define portMPU_REGION_PRIVILEGED_READ_ONLY                      ( 0x05UL << 24UL )
+#define portMPU_REGION_READ_ONLY                                 ( 0x06UL << 24UL )
+#define portMPU_REGION_PRIVILEGED_READ_WRITE                     ( 0x01UL << 24UL )
+#define portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY    ( 0x02UL << 24UL )
+#define portMPU_REGION_CACHEABLE_BUFFERABLE                      ( 0x07UL << 16UL )
+#define portMPU_REGION_EXECUTE_NEVER                             ( 0x01UL << 28UL )
 
-#define portUNPRIVILEGED_FLASH_REGION			( 0UL )
-#define portPRIVILEGED_FLASH_REGION				( 1UL )
-#define portPRIVILEGED_RAM_REGION				( 2UL )
-#define portGENERAL_PERIPHERALS_REGION			( 3UL )
-#define portSTACK_REGION						( 4UL )
-#define portFIRST_CONFIGURABLE_REGION			( 5UL )
-#define portLAST_CONFIGURABLE_REGION			( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS			( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS					( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
+/* Location of the TEX,S,C,B bits in the MPU Region Attribute and Size
+ * Register (RASR). */
+#define portMPU_RASR_TEX_S_C_B_LOCATION                          ( 16UL )
+#define portMPU_RASR_TEX_S_C_B_MASK                              ( 0x3FUL )
 
-#define portSWITCH_TO_USER_MODE() __asm volatile ( " mrs r0, control \n orr r0, r0, #1 \n msr control, r0 " ::: "r0", "memory" )
+/* MPU settings that can be overriden in FreeRTOSConfig.h. */
+#ifndef configTOTAL_MPU_REGIONS
+    /* Define to 8 for backward compatibility. */
+    #define configTOTAL_MPU_REGIONS    ( 8UL )
+#endif
+
+/*
+ * The TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits define the
+ * memory type, and where necessary the cacheable and shareable properties
+ * of the memory region.
+ *
+ * The TEX, C, and B bits together indicate the memory type of the region,
+ * and:
+ * - For Normal memory, the cacheable properties of the region.
+ * - For Device memory, whether the region is shareable.
+ *
+ * For Normal memory regions, the S bit indicates whether the region is
+ * shareable. For Strongly-ordered and Device memory, the S bit is ignored.
+ *
+ * See the following two tables for setting TEX, S, C and B bits for
+ * unprivileged flash, privileged flash and privileged RAM regions.
+ *
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | TEX | C | B | Memory type            |  Description or Normal region cacheability             |  Shareable?             |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 000 | 0 | 0 | Strongly-ordered       |  Strongly ordered                                      |  Shareable              |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 000 | 0 | 1 | Device                 |  Shared device                                         |  Shareable              |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 000 | 1 | 0 | Normal                 |  Outer and inner   write-through; no write allocate    |  S bit                  |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 000 | 1 | 1 | Normal                 |  Outer and inner   write-back; no write allocate       |  S bit                  |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 001 | 0 | 0 | Normal                 |  Outer and inner   Non-cacheable                       |  S bit                  |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 001 | 0 | 1 | Reserved               |  Reserved                                              |  Reserved               |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 001 | 1 | 0 | IMPLEMENTATION DEFINED |  IMPLEMENTATION DEFINED                                |  IMPLEMENTATION DEFINED |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 001 | 1 | 1 | Normal                 |  Outer and inner   write-back; write and read allocate |  S bit                  |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 010 | 0 | 0 | Device                 |  Non-shared device                                     |  Not shareable          |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 010 | 0 | 1 | Reserved               |  Reserved                                              |  Reserved               |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 010 | 1 | X | Reserved               |  Reserved                                              |  Reserved               |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 011 | X | X | Reserved               |  Reserved                                              |  Reserved               |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 1BB | A | A | Normal                 | Cached memory, with AA and BB indicating the inner and |  Reserved               |
+ |     |   |   |                        | outer cacheability rules that must be exported on the  |                         |
+ |     |   |   |                        | bus. See the table below for the cacheability policy   |                         |
+ |     |   |   |                        | encoding. memory, BB=Outer policy, AA=Inner policy.    |                         |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ |
+ +-----------------------------------------+----------------------------------------+
+ | AA or BB subfield of {TEX,C,B} encoding |  Cacheability policy                   |
+ +-----------------------------------------+----------------------------------------+
+ | 00                                      |  Non-cacheable                         |
+ +-----------------------------------------+----------------------------------------+
+ | 01                                      |  Write-back, write and   read allocate |
+ +-----------------------------------------+----------------------------------------+
+ | 10                                      |  Write-through, no write   allocate    |
+ +-----------------------------------------+----------------------------------------+
+ | 11                                      |  Write-back, no write   allocate       |
+ +-----------------------------------------+----------------------------------------+
+ */
+
+/* TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits for flash
+ * region. */
+#ifndef configTEX_S_C_B_FLASH
+    /* Default to TEX=000, S=1, C=1, B=1 for backward compatibility. */
+    #define configTEX_S_C_B_FLASH    ( 0x07UL )
+#endif
+
+/* TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits for RAM
+ * region. */
+#ifndef configTEX_S_C_B_SRAM
+    /* Default to TEX=000, S=1, C=1, B=1 for backward compatibility. */
+    #define configTEX_S_C_B_SRAM          ( 0x07UL )
+#endif
+
+#define portUNPRIVILEGED_FLASH_REGION     ( 0UL )
+#define portPRIVILEGED_FLASH_REGION       ( 1UL )
+#define portPRIVILEGED_RAM_REGION         ( 2UL )
+#define portGENERAL_PERIPHERALS_REGION    ( 3UL )
+#define portSTACK_REGION                  ( 4UL )
+#define portFIRST_CONFIGURABLE_REGION     ( 5UL )
+#define portTOTAL_NUM_REGIONS             ( configTOTAL_MPU_REGIONS )
+#define portNUM_CONFIGURABLE_REGIONS      ( portTOTAL_NUM_REGIONS - portFIRST_CONFIGURABLE_REGION )
+#define portLAST_CONFIGURABLE_REGION      ( portTOTAL_NUM_REGIONS - 1UL )
+
+#define portSWITCH_TO_USER_MODE()    __asm volatile ( " mrs r0, control \n orr r0, r0, #1 \n msr control, r0 " ::: "r0", "memory" )
 
 typedef struct MPU_REGION_REGISTERS
 {
-	uint32_t ulRegionBaseAddress;
-	uint32_t ulRegionAttribute;
+    uint32_t ulRegionBaseAddress;
+    uint32_t ulRegionAttribute;
 } xMPU_REGION_REGISTERS;
 
 /* Plus 1 to create space for the stack region. */
 typedef struct MPU_SETTINGS
 {
-	xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS ];
+    xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS ];
 } xMPU_SETTINGS;
 
 /* Architecture specifics. */
-#define portSTACK_GROWTH			( -1 )
-#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT			8
+#define portSTACK_GROWTH      ( -1 )
+#define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+#define portBYTE_ALIGNMENT    8
 /*-----------------------------------------------------------*/
 
 /* SVC numbers for various services. */
-#define portSVC_START_SCHEDULER				0
-#define portSVC_YIELD						1
-#define portSVC_RAISE_PRIVILEGE				2
+#define portSVC_START_SCHEDULER    0
+#define portSVC_YIELD              1
+#define portSVC_RAISE_PRIVILEGE    2
 
 /* Scheduler utilities. */
 
-#define portYIELD()				__asm volatile ( "	SVC	%0	\n" :: "i" (portSVC_YIELD) : "memory" )
-#define portYIELD_WITHIN_API()								\
-{															\
-	/* Set a PendSV to request a context switch. */			\
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;			\
-	__DSB();												\
-	__ISB();												\
-}
+#define portYIELD()    __asm volatile ( "	SVC	%0	\n"::"i" ( portSVC_YIELD ) : "memory" )
+#define portYIELD_WITHIN_API()                          \
+    {                                                   \
+        /* Set a PendSV to request a context switch. */ \
+        portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
+        __DSB();                                        \
+        __ISB();                                        \
+    }
 
-#define portNVIC_INT_CTRL_REG		( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT		( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD_WITHIN_API()
-#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
+#define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+#define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+#define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired != pdFALSE ) portYIELD_WITHIN_API()
+#define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /* Architecture specific optimisations. */
 #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
-	#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
+    #define configUSE_PORT_OPTIMISED_TASK_SELECTION    1
 #endif
 
-#if( configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 )
+#if ( configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 )
 
-	/* Check the configuration. */
-	#if( configMAX_PRIORITIES > 32 )
-		#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
-	#endif
+/* Check the configuration. */
+    #if ( configMAX_PRIORITIES > 32 )
+        #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
+    #endif
 
-	/* Store/clear the ready priorities in a bit map. */
-	#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
-	#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
+/* Store/clear the ready priorities in a bit map. */
+    #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities )    ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
+    #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities )     ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
 
-	/*-----------------------------------------------------------*/
+/*-----------------------------------------------------------*/
 
-	#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( ( uint32_t ) __CLZ( ( uxReadyPriorities ) ) ) )
+    #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities )    uxTopPriority = ( 31UL - ( ( uint32_t ) __CLZ( ( uxReadyPriorities ) ) ) )
 
 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
 /*-----------------------------------------------------------*/
@@ -163,61 +251,61 @@ typedef struct MPU_SETTINGS
 extern void vPortEnterCritical( void );
 extern void vPortExitCritical( void );
 
-#define portDISABLE_INTERRUPTS()							\
-{															\
-	__set_BASEPRI( configMAX_SYSCALL_INTERRUPT_PRIORITY );	\
-	__DSB();												\
-	__ISB();												\
-}
+#define portDISABLE_INTERRUPTS()                               \
+    {                                                          \
+        __set_BASEPRI( configMAX_SYSCALL_INTERRUPT_PRIORITY ); \
+        __DSB();                                               \
+        __ISB();                                               \
+    }
 
-#define portENABLE_INTERRUPTS()					__set_BASEPRI( 0 )
-#define portENTER_CRITICAL()					vPortEnterCritical()
-#define portEXIT_CRITICAL()						vPortExitCritical()
-#define portSET_INTERRUPT_MASK_FROM_ISR()		__get_BASEPRI(); portDISABLE_INTERRUPTS()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)	__set_BASEPRI( x )
+#define portENABLE_INTERRUPTS()                   __set_BASEPRI( 0 )
+#define portENTER_CRITICAL()                      vPortEnterCritical()
+#define portEXIT_CRITICAL()                       vPortExitCritical()
+#define portSET_INTERRUPT_MASK_FROM_ISR()         __get_BASEPRI(); portDISABLE_INTERRUPTS()
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    __set_BASEPRI( x )
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site.  These are
-not necessary for to use this port.  They are defined so the common demo files
-(which build with all the ports) will build. */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+ * not necessary for to use this port.  They are defined so the common demo files
+ * (which build with all the ports) will build. */
+#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+#define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
 #ifdef configASSERT
-	void vPortValidateInterruptPriority( void );
-	#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() 	vPortValidateInterruptPriority()
+    void vPortValidateInterruptPriority( void );
+    #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()    vPortValidateInterruptPriority()
 #endif
 
 /* portNOP() is not required by this port. */
 #define portNOP()
 
-#define portINLINE	__inline
+#define portINLINE              __inline
 
 #ifndef portFORCE_INLINE
-	#define portFORCE_INLINE inline __attribute__(( always_inline))
+    #define portFORCE_INLINE    inline __attribute__( ( always_inline ) )
 #endif
 
 /*-----------------------------------------------------------*/
 
 portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
 {
-uint32_t ulCurrentInterrupt;
-BaseType_t xReturn;
+    uint32_t ulCurrentInterrupt;
+    BaseType_t xReturn;
 
-	/* Obtain the number of the currently executing interrupt. */
-	__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+    /* Obtain the number of the currently executing interrupt. */
+    __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
-	if( ulCurrentInterrupt == 0 )
-	{
-		xReturn = pdFALSE;
-	}
-	else
-	{
-		xReturn = pdTRUE;
-	}
+    if( ulCurrentInterrupt == 0 )
+    {
+        xReturn = pdFALSE;
+    }
+    else
+    {
+        xReturn = pdTRUE;
+    }
 
-	return xReturn;
+    return xReturn;
 }
 
 
@@ -231,37 +319,38 @@ extern void vResetPrivilege( void );
  *
  * @return 1 if the processor is already privileged, 0 otherwise.
  */
-#define portIS_PRIVILEGED()			xIsPrivileged()
+#define portIS_PRIVILEGED()      xIsPrivileged()
 
 /**
  * @brief Raise an SVC request to raise privilege.
-*/
-#define portRAISE_PRIVILEGE()		__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
+ */
+#define portRAISE_PRIVILEGE()    __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
 
 /**
  * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
  * register.
  */
-#define portRESET_PRIVILEGE()		vResetPrivilege()
+#define portRESET_PRIVILEGE()    vResetPrivilege()
 /*-----------------------------------------------------------*/
 
 #ifndef configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY
-	#warning "configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY is not defined. We recommend defining it to 1 in FreeRTOSConfig.h for better security. https://www.freertos.org/FreeRTOS-V10.3.x.html"
-	#define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY 0
+    #warning "configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY is not defined. We recommend defining it to 1 in FreeRTOSConfig.h for better security. https://www.FreeRTOS.org/FreeRTOS-V10.3.x.html"
+    #define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY    0
 #endif
 /*-----------------------------------------------------------*/
 
 /* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
-the source code because to do so would cause other compilers to generate
-warnings. */
+ * the source code because to do so would cause other compilers to generate
+ * warnings. */
 #pragma diag_suppress=Pe191
 #pragma diag_suppress=Pa082
 #pragma diag_suppress=Be006
 /*-----------------------------------------------------------*/
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
-}
+    }
 #endif
+/* *INDENT-ON* */
 
 #endif /* PORTMACRO_H */
-
diff --git a/portable/IAR/ARM_CM7/r0p1/port.c b/portable/IAR/ARM_CM7/r0p1/port.c
index 82a294c79..71caa71e1 100644
--- a/portable/IAR/ARM_CM7/r0p1/port.c
+++ b/portable/IAR/ARM_CM7/r0p1/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,15 +19,14 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------
- * Implementation of functions defined in portable.h for the ARM CM4F port.
- *----------------------------------------------------------*/
+* Implementation of functions defined in portable.h for the ARM CM7 port.
+*----------------------------------------------------------*/
 
 /* IAR includes. */
 #include 
@@ -37,70 +36,71 @@
 #include "task.h"
 
 #ifndef __ARMVFP__
-	#error This port can only be used when the project options are configured to enable hardware floating point support.
+    #error This port can only be used when the project options are configured to enable hardware floating point support.
 #endif
 
-#if( configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 )
-	#error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+#if ( configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 )
+    #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See http: /*www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
 #endif
 
 #ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 1UL << 2UL )
+    #define configSYSTICK_CLOCK_HZ      configCPU_CLOCK_HZ
+    /* Ensure the SysTick is clocked at the same frequency as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 1UL << 2UL )
 #else
-	/* The way the SysTick is clocked is not modified in case it is not the same
-	as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 0 )
+
+/* The way the SysTick is clocked is not modified in case it is not the same
+ * as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 0 )
 #endif
 
 /* Constants required to manipulate the core.  Registers first... */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_CTRL_REG             ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG             ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG    ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SHPR3_REG                    ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
 /* ...then bits in the registers. */
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portNVIC_PENDSVCLEAR_BIT 			( 1UL << 27UL )
-#define portNVIC_PEND_SYSTICK_CLEAR_BIT		( 1UL << 25UL )
+#define portNVIC_SYSTICK_INT_BIT              ( 1UL << 1UL )
+#define portNVIC_SYSTICK_ENABLE_BIT           ( 1UL << 0UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT       ( 1UL << 16UL )
+#define portNVIC_PENDSVCLEAR_BIT              ( 1UL << 27UL )
+#define portNVIC_PEND_SYSTICK_CLEAR_BIT       ( 1UL << 25UL )
 
-#define portNVIC_PENDSV_PRI					( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
-#define portNVIC_SYSTICK_PRI				( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
+#define portNVIC_PENDSV_PRI                   ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
+#define portNVIC_SYSTICK_PRI                  ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
 
 /* Constants required to check the validity of an interrupt priority. */
-#define portFIRST_USER_INTERRUPT_NUMBER		( 16 )
-#define portNVIC_IP_REGISTERS_OFFSET_16 	( 0xE000E3F0 )
-#define portAIRCR_REG						( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
-#define portMAX_8_BIT_VALUE					( ( uint8_t ) 0xff )
-#define portTOP_BIT_OF_BYTE					( ( uint8_t ) 0x80 )
-#define portMAX_PRIGROUP_BITS				( ( uint8_t ) 7 )
-#define portPRIORITY_GROUP_MASK				( 0x07UL << 8UL )
-#define portPRIGROUP_SHIFT					( 8UL )
+#define portFIRST_USER_INTERRUPT_NUMBER       ( 16 )
+#define portNVIC_IP_REGISTERS_OFFSET_16       ( 0xE000E3F0 )
+#define portAIRCR_REG                         ( *( ( volatile uint32_t * ) 0xE000ED0C ) )
+#define portMAX_8_BIT_VALUE                   ( ( uint8_t ) 0xff )
+#define portTOP_BIT_OF_BYTE                   ( ( uint8_t ) 0x80 )
+#define portMAX_PRIGROUP_BITS                 ( ( uint8_t ) 7 )
+#define portPRIORITY_GROUP_MASK               ( 0x07UL << 8UL )
+#define portPRIGROUP_SHIFT                    ( 8UL )
 
 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
-#define portVECTACTIVE_MASK					( 0xFFUL )
+#define portVECTACTIVE_MASK                   ( 0xFFUL )
 
 /* Constants required to manipulate the VFP. */
-#define portFPCCR							( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
-#define portASPEN_AND_LSPEN_BITS			( 0x3UL << 30UL )
+#define portFPCCR                             ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
+#define portASPEN_AND_LSPEN_BITS              ( 0x3UL << 30UL )
 
 /* Constants required to set up the initial stack. */
-#define portINITIAL_XPSR					( 0x01000000 )
-#define portINITIAL_EXC_RETURN				( 0xfffffffd )
+#define portINITIAL_XPSR                      ( 0x01000000 )
+#define portINITIAL_EXC_RETURN                ( 0xfffffffd )
 
 /* The systick is a 24-bit counter. */
-#define portMAX_24_BIT_NUMBER				( 0xffffffUL )
+#define portMAX_24_BIT_NUMBER                 ( 0xffffffUL )
 
 /* A fiddle factor to estimate the number of SysTick counts that would have
-occurred while the SysTick counter is stopped during tickless idle
-calculations. */
-#define portMISSED_COUNTS_FACTOR			( 45UL )
+ * occurred while the SysTick counter is stopped during tickless idle
+ * calculations. */
+#define portMISSED_COUNTS_FACTOR              ( 45UL )
 
 /* For strict compliance with the Cortex-M spec the task start address should
-have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
-#define portSTART_ADDRESS_MASK				( ( StackType_t ) 0xfffffffeUL )
+ * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
+#define portSTART_ADDRESS_MASK                ( ( StackType_t ) 0xfffffffeUL )
 
 /*
  * Setup the timer to generate the tick interrupts.  The implementation in this
@@ -132,30 +132,30 @@ static void prvTaskExitError( void );
 /*-----------------------------------------------------------*/
 
 /* Each task maintains its own interrupt status in the critical nesting
-variable. */
+ * variable. */
 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 
 /*
  * The number of SysTick increments that make up one tick period.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulTimerCountsForOneTick = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulTimerCountsForOneTick = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * The maximum number of tick periods that can be suppressed is limited by the
  * 24 bit resolution of the SysTick timer.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t xMaximumPossibleSuppressedTicks = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * Compensate for the CPU cycles that pass while the SysTick is stopped (low
  * power functionality only.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulStoppedTimerCompensation = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulStoppedTimerCompensation = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
@@ -163,10 +163,10 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
  * FreeRTOS API functions are not called from interrupts that have been assigned
  * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
  */
-#if( configASSERT_DEFINED == 1 )
-	 static uint8_t ucMaxSysCallPriority = 0;
-	 static uint32_t ulMaxPRIGROUPValue = 0;
-	 static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
+#if ( configASSERT_DEFINED == 1 )
+    static uint8_t ucMaxSysCallPriority = 0;
+    static uint32_t ulMaxPRIGROUPValue = 0;
+    static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
 #endif /* configASSERT_DEFINED */
 
 /*-----------------------------------------------------------*/
@@ -174,47 +174,52 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 /*
  * See header file for description.
  */
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	interrupt. */
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
 
-	/* Offset added to account for the way the MCU uses the stack on entry/exit
-	of interrupts, and to ensure alignment. */
-	pxTopOfStack--;
+    /* Offset added to account for the way the MCU uses the stack on entry/exit
+     * of interrupts, and to ensure alignment. */
+    pxTopOfStack--;
 
-	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
-	pxTopOfStack--;
-	*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;	/* PC */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) prvTaskExitError;	/* LR */
+    *pxTopOfStack = portINITIAL_XPSR;                                    /* xPSR */
+    pxTopOfStack--;
+    *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) prvTaskExitError;                    /* LR */
 
-	/* Save code space by skipping register initialisation. */
-	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
-	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
+    /* Save code space by skipping register initialisation. */
+    pxTopOfStack -= 5;                            /* R12, R3, R2 and R1. */
+    *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
 
-	/* A save method is being used that requires each task to maintain its
-	own exec return value. */
-	pxTopOfStack--;
-	*pxTopOfStack = portINITIAL_EXC_RETURN;
+    /* A save method is being used that requires each task to maintain its
+     * own exec return value. */
+    pxTopOfStack--;
+    *pxTopOfStack = portINITIAL_EXC_RETURN;
 
-	pxTopOfStack -= 8;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
+    pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
 
-	return pxTopOfStack;
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 static void prvTaskExitError( void )
 {
-	/* A function that implements a task must not exit or attempt to return to
-	its caller as there is nothing to return to.  If a task wants to exit it
-	should instead call vTaskDelete( NULL ).
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to.  If a task wants to exit it
+     * should instead call vTaskDelete( NULL ).
+     *
+     * Artificially force an assert() to be triggered if configASSERT() is
+     * defined, then stop here so application writers can catch the error. */
+    configASSERT( uxCriticalNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
 
-	Artificially force an assert() to be triggered if configASSERT() is
-	defined, then stop here so application writers can catch the error. */
-	configASSERT( uxCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
-	for( ;; );
+    for( ; ; )
+    {
+    }
 }
 /*-----------------------------------------------------------*/
 
@@ -223,316 +228,321 @@ static void prvTaskExitError( void )
  */
 BaseType_t xPortStartScheduler( void )
 {
-	/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
-	See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
-	configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
+    /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
+     * See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
+    configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
 
-	#if( configASSERT_DEFINED == 1 )
-	{
-		volatile uint32_t ulOriginalPriority;
-		volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
-		volatile uint8_t ucMaxPriorityValue;
+    #if ( configASSERT_DEFINED == 1 )
+        {
+            volatile uint32_t ulOriginalPriority;
+            volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
+            volatile uint8_t ucMaxPriorityValue;
 
-		/* Determine the maximum priority from which ISR safe FreeRTOS API
-		functions can be called.  ISR safe functions are those that end in
-		"FromISR".  FreeRTOS maintains separate thread and ISR API functions to
-		ensure interrupt entry is as fast and simple as possible.
+            /* Determine the maximum priority from which ISR safe FreeRTOS API
+             * functions can be called.  ISR safe functions are those that end in
+             * "FromISR".  FreeRTOS maintains separate thread and ISR API functions to
+             * ensure interrupt entry is as fast and simple as possible.
+             *
+             * Save the interrupt priority value that is about to be clobbered. */
+            ulOriginalPriority = *pucFirstUserPriorityRegister;
 
-		Save the interrupt priority value that is about to be clobbered. */
-		ulOriginalPriority = *pucFirstUserPriorityRegister;
+            /* Determine the number of priority bits available.  First write to all
+             * possible bits. */
+            *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
 
-		/* Determine the number of priority bits available.  First write to all
-		possible bits. */
-		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
+            /* Read the value back to see how many bits stuck. */
+            ucMaxPriorityValue = *pucFirstUserPriorityRegister;
 
-		/* Read the value back to see how many bits stuck. */
-		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
+            /* Use the same mask on the maximum system call priority. */
+            ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
 
-		/* Use the same mask on the maximum system call priority. */
-		ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
+            /* Calculate the maximum acceptable priority group value for the number
+             * of bits read back. */
+            ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
 
-		/* Calculate the maximum acceptable priority group value for the number
-		of bits read back. */
-		ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
-		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
-		{
-			ulMaxPRIGROUPValue--;
-			ucMaxPriorityValue <<= ( uint8_t ) 0x01;
-		}
+            while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
+            {
+                ulMaxPRIGROUPValue--;
+                ucMaxPriorityValue <<= ( uint8_t ) 0x01;
+            }
 
-		#ifdef __NVIC_PRIO_BITS
-		{
-			/* Check the CMSIS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
-		}
-		#endif
+            #ifdef __NVIC_PRIO_BITS
+                {
+                    /* Check the CMSIS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
+                }
+            #endif
 
-		#ifdef configPRIO_BITS
-		{
-			/* Check the FreeRTOS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
-		}
-		#endif
+            #ifdef configPRIO_BITS
+                {
+                    /* Check the FreeRTOS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
+                }
+            #endif
 
-		/* Shift the priority group value back to its position within the AIRCR
-		register. */
-		ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
-		ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
+            /* Shift the priority group value back to its position within the AIRCR
+             * register. */
+            ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
+            ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
 
-		/* Restore the clobbered interrupt priority register to its original
-		value. */
-		*pucFirstUserPriorityRegister = ulOriginalPriority;
-	}
-	#endif /* conifgASSERT_DEFINED */
+            /* Restore the clobbered interrupt priority register to its original
+             * value. */
+            *pucFirstUserPriorityRegister = ulOriginalPriority;
+        }
+    #endif /* conifgASSERT_DEFINED */
 
-	/* Make PendSV and SysTick the lowest priority interrupts. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+    /* Make PendSV and SysTick the lowest priority interrupts. */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
-	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-	here already. */
-	vPortSetupTimerInterrupt();
+    /* Start the timer that generates the tick ISR.  Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
 
-	/* Initialise the critical nesting count ready for the first task. */
-	uxCriticalNesting = 0;
+    /* Initialise the critical nesting count ready for the first task. */
+    uxCriticalNesting = 0;
 
-	/* Ensure the VFP is enabled - it should be anyway. */
-	vPortEnableVFP();
+    /* Ensure the VFP is enabled - it should be anyway. */
+    vPortEnableVFP();
 
-	/* Lazy save always. */
-	*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
+    /* Lazy save always. */
+    *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
 
-	/* Start the first task. */
-	vPortStartFirstTask();
+    /* Start the first task. */
+    vPortStartFirstTask();
 
-	/* Should not get here! */
-	return 0;
+    /* Should not get here! */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void )
 {
-	/* Not implemented in ports where there is nothing to return to.
-	Artificially force an assert. */
-	configASSERT( uxCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( uxCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void )
 {
-	portDISABLE_INTERRUPTS();
-	uxCriticalNesting++;
+    portDISABLE_INTERRUPTS();
+    uxCriticalNesting++;
 
-	/* This is not the interrupt safe version of the enter critical function so
-	assert() if it is being called from an interrupt context.  Only API
-	functions that end in "FromISR" can be used in an interrupt.  Only assert if
-	the critical nesting count is 1 to protect against recursive calls if the
-	assert function also uses a critical section. */
-	if( uxCriticalNesting == 1 )
-	{
-		configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
-	}
+    /* This is not the interrupt safe version of the enter critical function so
+     * assert() if it is being called from an interrupt context.  Only API
+     * functions that end in "FromISR" can be used in an interrupt.  Only assert if
+     * the critical nesting count is 1 to protect against recursive calls if the
+     * assert function also uses a critical section. */
+    if( uxCriticalNesting == 1 )
+    {
+        configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
+    }
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void )
 {
-	configASSERT( uxCriticalNesting );
-	uxCriticalNesting--;
-	if( uxCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
+    configASSERT( uxCriticalNesting );
+    uxCriticalNesting--;
+
+    if( uxCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
 }
 /*-----------------------------------------------------------*/
 
 void xPortSysTickHandler( void )
 {
-	/* The SysTick runs at the lowest interrupt priority, so when this interrupt
-	executes all interrupts must be unmasked.  There is therefore no need to
-	save and then restore the interrupt mask value as its value is already
-	known. */
-	portDISABLE_INTERRUPTS();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* A context switch is required.  Context switching is performed in
-			the PendSV interrupt.  Pend the PendSV interrupt. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portENABLE_INTERRUPTS();
+    /* The SysTick runs at the lowest interrupt priority, so when this interrupt
+     * executes all interrupts must be unmasked.  There is therefore no need to
+     * save and then restore the interrupt mask value as its value is already
+     * known. */
+    portDISABLE_INTERRUPTS();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* A context switch is required.  Context switching is performed in
+             * the PendSV interrupt.  Pend the PendSV interrupt. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+    portENABLE_INTERRUPTS();
 }
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TICKLESS_IDLE == 1 )
+#if ( configUSE_TICKLESS_IDLE == 1 )
 
-	__weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-	{
-	uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
-	TickType_t xModifiableIdleTime;
+    __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+    {
+        uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+        TickType_t xModifiableIdleTime;
 
-		/* Make sure the SysTick reload value does not overflow the counter. */
-		if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-		{
-			xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-		}
+        /* Make sure the SysTick reload value does not overflow the counter. */
+        if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+        {
+            xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+        }
 
-		/* Stop the SysTick momentarily.  The time the SysTick is stopped for
-		is accounted for as best it can be, but using the tickless mode will
-		inevitably result in some tiny drift of the time maintained by the
-		kernel with respect to calendar time. */
-		portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+        /* Stop the SysTick momentarily.  The time the SysTick is stopped for
+         * is accounted for as best it can be, but using the tickless mode will
+         * inevitably result in some tiny drift of the time maintained by the
+         * kernel with respect to calendar time. */
+        portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
 
-		/* Calculate the reload value required to wait xExpectedIdleTime
-		tick periods.  -1 is used because this code will execute part way
-		through one of the tick periods. */
-		ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-		if( ulReloadValue > ulStoppedTimerCompensation )
-		{
-			ulReloadValue -= ulStoppedTimerCompensation;
-		}
+        /* Calculate the reload value required to wait xExpectedIdleTime
+         * tick periods.  -1 is used because this code will execute part way
+         * through one of the tick periods. */
+        ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
 
-		/* Enter a critical section but don't use the taskENTER_CRITICAL()
-		method as that will mask interrupts that should exit sleep mode. */
-		__disable_interrupt();
-		__DSB();
-		__ISB();
+        if( ulReloadValue > ulStoppedTimerCompensation )
+        {
+            ulReloadValue -= ulStoppedTimerCompensation;
+        }
 
-		/* If a context switch is pending or a task is waiting for the scheduler
-		to be unsuspended then abandon the low power entry. */
-		if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-		{
-			/* Restart from whatever is left in the count register to complete
-			this tick period. */
-			portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+        /* Enter a critical section but don't use the taskENTER_CRITICAL()
+         * method as that will mask interrupts that should exit sleep mode. */
+        __disable_interrupt();
+        __DSB();
+        __ISB();
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+        /* If a context switch is pending or a task is waiting for the scheduler
+         * to be unsuspended then abandon the low power entry. */
+        if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+        {
+            /* Restart from whatever is left in the count register to complete
+             * this tick period. */
+            portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Reset the reload register to the value required for normal tick
-			periods. */
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts - see comments above __disable_interrupt()
-			call above. */
-			__enable_interrupt();
-		}
-		else
-		{
-			/* Set the new reload value. */
-			portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+            /* Reset the reload register to the value required for normal tick
+             * periods. */
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
 
-			/* Clear the SysTick count flag and set the count value back to
-			zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            /* Re-enable interrupts - see comments above __disable_interrupt()
+             * call above. */
+            __enable_interrupt();
+        }
+        else
+        {
+            /* Set the new reload value. */
+            portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            /* Clear the SysTick count flag and set the count value back to
+             * zero. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-			/* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
-			set its parameter to 0 to indicate that its implementation contains
-			its own wait for interrupt or wait for event instruction, and so wfi
-			should not be executed again.  However, the original expected idle
-			time variable must remain unmodified, so a copy is taken. */
-			xModifiableIdleTime = xExpectedIdleTime;
-			configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-			if( xModifiableIdleTime > 0 )
-			{
-				__DSB();
-				__WFI();
-				__ISB();
-			}
-			configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts to allow the interrupt that brought the MCU
-			out of sleep mode to execute immediately.  see comments above
-			__disable_interrupt() call above. */
-			__enable_interrupt();
-			__DSB();
-			__ISB();
+            /* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
+             * set its parameter to 0 to indicate that its implementation contains
+             * its own wait for interrupt or wait for event instruction, and so wfi
+             * should not be executed again.  However, the original expected idle
+             * time variable must remain unmodified, so a copy is taken. */
+            xModifiableIdleTime = xExpectedIdleTime;
+            configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
 
-			/* Disable interrupts again because the clock is about to be stopped
-			and interrupts that execute while the clock is stopped will increase
-			any slippage between the time maintained by the RTOS and calendar
-			time. */
-			__disable_interrupt();
-			__DSB();
-			__ISB();
-			
-			/* Disable the SysTick clock without reading the 
-			portNVIC_SYSTICK_CTRL_REG register to ensure the
-			portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again, 
-			the time the SysTick is stopped for is accounted for as best it can 
-			be, but using the tickless mode will inevitably result in some tiny 
-			drift of the time maintained by the kernel with respect to calendar 
-			time*/
-			portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+            if( xModifiableIdleTime > 0 )
+            {
+                __DSB();
+                __WFI();
+                __ISB();
+            }
 
-			/* Determine if the SysTick clock has already counted to zero and
-			been set back to the current reload value (the reload back being
-			correct for the entire expected idle time) or if the SysTick is yet
-			to count to zero (in which case an interrupt other than the SysTick
-			must have brought the system out of sleep mode). */
-			if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-			{
-				uint32_t ulCalculatedLoadValue;
+            configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
 
-				/* The tick interrupt is already pending, and the SysTick count
-				reloaded with ulReloadValue.  Reset the
-				portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
-				period. */
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+            /* Re-enable interrupts to allow the interrupt that brought the MCU
+             * out of sleep mode to execute immediately.  see comments above
+             * __disable_interrupt() call above. */
+            __enable_interrupt();
+            __DSB();
+            __ISB();
 
-				/* Don't allow a tiny value, or values that have somehow
-				underflowed because the post sleep hook did something
-				that took too long. */
-				if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-				{
-					ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-				}
+            /* Disable interrupts again because the clock is about to be stopped
+             * and interrupts that execute while the clock is stopped will increase
+             * any slippage between the time maintained by the RTOS and calendar
+             * time. */
+            __disable_interrupt();
+            __DSB();
+            __ISB();
 
-				portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+            /* Disable the SysTick clock without reading the
+             * portNVIC_SYSTICK_CTRL_REG register to ensure the
+             * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
+             * the time the SysTick is stopped for is accounted for as best it can
+             * be, but using the tickless mode will inevitably result in some tiny
+             * drift of the time maintained by the kernel with respect to calendar
+             * time*/
+            portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
 
-				/* As the pending tick will be processed as soon as this
-				function exits, the tick value maintained by the tick is stepped
-				forward by one less than the time spent waiting. */
-				ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-			}
-			else
-			{
-				/* Something other than the tick interrupt ended the sleep.
-				Work out how long the sleep lasted rounded to complete tick
-				periods (not the ulReload value which accounted for part
-				ticks). */
-				ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+            /* Determine if the SysTick clock has already counted to zero and
+             * been set back to the current reload value (the reload back being
+             * correct for the entire expected idle time) or if the SysTick is yet
+             * to count to zero (in which case an interrupt other than the SysTick
+             * must have brought the system out of sleep mode). */
+            if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+            {
+                uint32_t ulCalculatedLoadValue;
 
-				/* How many complete tick periods passed while the processor
-				was waiting? */
-				ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+                /* The tick interrupt is already pending, and the SysTick count
+                 * reloaded with ulReloadValue.  Reset the
+                 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+                 * period. */
+                ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
 
-				/* The reload value is set to whatever fraction of a single tick
-				period remains. */
-				portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-			}
+                /* Don't allow a tiny value, or values that have somehow
+                 * underflowed because the post sleep hook did something
+                 * that took too long. */
+                if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+                {
+                    ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+                }
 
-			/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
-			again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
-			value. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-			vTaskStepTick( ulCompleteTickPeriods );
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+                portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
 
-			/* Exit with interrupts enabled. */
-			__enable_interrupt();
-		}
-	}
+                /* As the pending tick will be processed as soon as this
+                 * function exits, the tick value maintained by the tick is stepped
+                 * forward by one less than the time spent waiting. */
+                ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+            }
+            else
+            {
+                /* Something other than the tick interrupt ended the sleep.
+                 * Work out how long the sleep lasted rounded to complete tick
+                 * periods (not the ulReload value which accounted for part
+                 * ticks). */
+                ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+                /* How many complete tick periods passed while the processor
+                 * was waiting? */
+                ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+                /* The reload value is set to whatever fraction of a single tick
+                 * period remains. */
+                portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+            }
+
+            /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+             * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+             * value. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            vTaskStepTick( ulCompleteTickPeriods );
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Exit with interrupts enabled. */
+            __enable_interrupt();
+        }
+    }
 
 #endif /* configUSE_TICKLESS_IDLE */
 /*-----------------------------------------------------------*/
@@ -543,102 +553,81 @@ void xPortSysTickHandler( void )
  */
 __weak void vPortSetupTimerInterrupt( void )
 {
-	/* Calculate the constants required to configure the tick interrupt. */
-	#if( configUSE_TICKLESS_IDLE == 1 )
-	{
-		ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
-		xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
-	}
-	#endif /* configUSE_TICKLESS_IDLE */
+    /* Calculate the constants required to configure the tick interrupt. */
+    #if ( configUSE_TICKLESS_IDLE == 1 )
+        {
+            ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+            xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+            ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+        }
+    #endif /* configUSE_TICKLESS_IDLE */
 
-	/* Stop and clear the SysTick. */
-	portNVIC_SYSTICK_CTRL_REG = 0UL;
-	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+    /* Stop and clear the SysTick. */
+    portNVIC_SYSTICK_CTRL_REG = 0UL;
+    portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-	/* Configure SysTick to interrupt at the requested rate. */
-	portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
+    /* Configure SysTick to interrupt at the requested rate. */
+    portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+    portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
 }
 /*-----------------------------------------------------------*/
 
-#if( configASSERT_DEFINED == 1 )
+#if ( configASSERT_DEFINED == 1 )
 
-	void vPortValidateInterruptPriority( void )
-	{
-	uint32_t ulCurrentInterrupt;
-	uint8_t ucCurrentPriority;
+    void vPortValidateInterruptPriority( void )
+    {
+        uint32_t ulCurrentInterrupt;
+        uint8_t ucCurrentPriority;
 
-		/* Obtain the number of the currently executing interrupt. */
-		__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+        /* Obtain the number of the currently executing interrupt. */
+        __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
-		/* Is the interrupt number a user defined interrupt? */
-		if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
-		{
-			/* Look up the interrupt's priority. */
-			ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
+        /* Is the interrupt number a user defined interrupt? */
+        if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
+        {
+            /* Look up the interrupt's priority. */
+            ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
 
-			/* The following assertion will fail if a service routine (ISR) for
-			an interrupt that has been assigned a priority above
-			configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
-			function.  ISR safe FreeRTOS API functions must *only* be called
-			from interrupts that have been assigned a priority at or below
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
+            /* The following assertion will fail if a service routine (ISR) for
+             * an interrupt that has been assigned a priority above
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
+             * function.  ISR safe FreeRTOS API functions must *only* be called
+             * from interrupts that have been assigned a priority at or below
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Numerically low interrupt priority numbers represent logically high
+             * interrupt priorities, therefore the priority of the interrupt must
+             * be set to a value equal to or numerically *higher* than
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Interrupts that	use the FreeRTOS API must not be left at their
+             * default priority of	zero as that is the highest possible priority,
+             * which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
+             * and	therefore also guaranteed to be invalid.
+             *
+             * FreeRTOS maintains separate thread and ISR API functions to ensure
+             * interrupt entry is as fast and simple as possible.
+             *
+             * The following links provide detailed information:
+             * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+             * https://www.FreeRTOS.org/FAQHelp.html */
+            configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
+        }
 
-			Numerically low interrupt priority numbers represent logically high
-			interrupt priorities, therefore the priority of the interrupt must
-			be set to a value equal to or numerically *higher* than
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
-
-			Interrupts that	use the FreeRTOS API must not be left at their
-			default priority of	zero as that is the highest possible priority,
-			which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
-			and	therefore also guaranteed to be invalid.
-
-			FreeRTOS maintains separate thread and ISR API functions to ensure
-			interrupt entry is as fast and simple as possible.
-
-			The following links provide detailed information:
-			http://www.freertos.org/RTOS-Cortex-M3-M4.html
-			http://www.freertos.org/FAQHelp.html */
-			configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
-		}
-
-		/* Priority grouping:  The interrupt controller (NVIC) allows the bits
-		that define each interrupt's priority to be split between bits that
-		define the interrupt's pre-emption priority bits and bits that define
-		the interrupt's sub-priority.  For simplicity all bits must be defined
-		to be pre-emption priority bits.  The following assertion will fail if
-		this is not the case (if some bits represent a sub-priority).
-
-		If the application only uses CMSIS libraries for interrupt
-		configuration then the correct setting can be achieved on all Cortex-M
-		devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
-		scheduler.  Note however that some vendor specific peripheral libraries
-		assume a non-zero priority group setting, in which cases using a value
-		of zero will result in unpredictable behaviour. */
-		configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
-	}
+        /* Priority grouping:  The interrupt controller (NVIC) allows the bits
+         * that define each interrupt's priority to be split between bits that
+         * define the interrupt's pre-emption priority bits and bits that define
+         * the interrupt's sub-priority.  For simplicity all bits must be defined
+         * to be pre-emption priority bits.  The following assertion will fail if
+         * this is not the case (if some bits represent a sub-priority).
+         *
+         * If the application only uses CMSIS libraries for interrupt
+         * configuration then the correct setting can be achieved on all Cortex-M
+         * devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
+         * scheduler.  Note however that some vendor specific peripheral libraries
+         * assume a non-zero priority group setting, in which cases using a value
+         * of zero will result in unpredictable behaviour. */
+        configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
+    }
 
 #endif /* configASSERT_DEFINED */
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
diff --git a/portable/IAR/ARM_CM7/r0p1/portasm.s b/portable/IAR/ARM_CM7/r0p1/portasm.s
index 599176022..3ba197f48 100644
--- a/portable/IAR/ARM_CM7/r0p1/portasm.s
+++ b/portable/IAR/ARM_CM7/r0p1/portasm.s
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/ARM_CM7/r0p1/portmacro.h b/portable/IAR/ARM_CM7/r0p1/portmacro.h
index 3c5806cbe..5d100fd40 100644
--- a/portable/IAR/ARM_CM7/r0p1/portmacro.h
+++ b/portable/IAR/ARM_CM7/r0p1/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,18 +19,18 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -43,168 +43,167 @@ extern "C" {
  */
 
 /* IAR includes. */
-#include 
+    #include 
 
 /* Type definitions. */
-#define portCHAR		char
-#define portFLOAT		float
-#define portDOUBLE		double
-#define portLONG		long
-#define portSHORT		short
-#define portSTACK_TYPE	uint32_t
-#define portBASE_TYPE	long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE StackType_t;
-typedef long BaseType_t;
-typedef unsigned long UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC 1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Architecture specifics. */
-#define portSTACK_GROWTH			( -1 )
-#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT			8
+    #define portSTACK_GROWTH      ( -1 )
+    #define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT    8
 /*-----------------------------------------------------------*/
 
 /* Compiler directives. */
-#define portWEAK_SYMBOL				__attribute__( ( weak ) )
+    #define portWEAK_SYMBOL    __attribute__( ( weak ) )
 
 /*-----------------------------------------------------------*/
 
 
 /* Scheduler utilities. */
-#define portYIELD()											\
-{															\
-	/* Set a PendSV to request a context switch. */			\
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;			\
-	__DSB();												\
-	__ISB();												\
-}
+    #define portYIELD()                                 \
+    {                                                   \
+        /* Set a PendSV to request a context switch. */ \
+        portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
+        __DSB();                                        \
+        __ISB();                                        \
+    }
 
-#define portNVIC_INT_CTRL_REG		( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT		( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()
-#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired != pdFALSE ) portYIELD()
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 
 /*-----------------------------------------------------------*/
 
 /* Architecture specific optimisations. */
-#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
-	#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
-#endif
+    #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
+        #define configUSE_PORT_OPTIMISED_TASK_SELECTION    1
+    #endif
 
-#if( configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 )
+    #if ( configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 )
 
-	/* Check the configuration. */
-	#if( configMAX_PRIORITIES > 32 )
-		#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
-	#endif
+/* Check the configuration. */
+        #if ( configMAX_PRIORITIES > 32 )
+            #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
+        #endif
 
-	/* Store/clear the ready priorities in a bit map. */
-	#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
-	#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
+/* Store/clear the ready priorities in a bit map. */
+        #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities )    ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
+        #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities )     ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
 
-	/*-----------------------------------------------------------*/
+/*-----------------------------------------------------------*/
 
-	#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( ( uint32_t ) __CLZ( ( uxReadyPriorities ) ) ) )
+        #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities )    uxTopPriority = ( 31UL - ( ( uint32_t ) __CLZ( ( uxReadyPriorities ) ) ) )
 
-#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
+    #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
 /*-----------------------------------------------------------*/
 
 /* Critical section management. */
-extern void vPortEnterCritical( void );
-extern void vPortExitCritical( void );
+    extern void vPortEnterCritical( void );
+    extern void vPortExitCritical( void );
 
-#define portDISABLE_INTERRUPTS()							\
-{															\
-	 /* Errata work around. */								\
-	__disable_interrupt();									\
-	__set_BASEPRI( configMAX_SYSCALL_INTERRUPT_PRIORITY );	\
-	__DSB();												\
-	__ISB();												\
-	__enable_interrupt();									\
-}
+    #define portDISABLE_INTERRUPTS()                           \
+    {                                                          \
+        /* Errata work around. */                              \
+        __disable_interrupt();                                 \
+        __set_BASEPRI( configMAX_SYSCALL_INTERRUPT_PRIORITY ); \
+        __DSB();                                               \
+        __ISB();                                               \
+        __enable_interrupt();                                  \
+    }
 
-#define portENABLE_INTERRUPTS()					__set_BASEPRI( 0 )
-#define portENTER_CRITICAL()					vPortEnterCritical()
-#define portEXIT_CRITICAL()						vPortExitCritical()
-#define portSET_INTERRUPT_MASK_FROM_ISR()		__get_BASEPRI(); portDISABLE_INTERRUPTS()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)	__set_BASEPRI( x )
+    #define portENABLE_INTERRUPTS()                   __set_BASEPRI( 0 )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         __get_BASEPRI(); portDISABLE_INTERRUPTS()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    __set_BASEPRI( x )
 /*-----------------------------------------------------------*/
 
 /* Tickless idle/low power functionality. */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site.  These are
-not necessary for to use this port.  They are defined so the common demo files
-(which build with all the ports) will build. */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+ * not necessary for to use this port.  They are defined so the common demo files
+ * (which build with all the ports) will build. */
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
-#ifdef configASSERT
-	void vPortValidateInterruptPriority( void );
-	#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() 	vPortValidateInterruptPriority()
-#endif
+    #ifdef configASSERT
+        void vPortValidateInterruptPriority( void );
+        #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()    vPortValidateInterruptPriority()
+    #endif
 
 /* portNOP() is not required by this port. */
-#define portNOP()
+    #define portNOP()
 
-#define portINLINE	__inline
+    #define portINLINE              __inline
 
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE inline __attribute__(( always_inline))
-#endif
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE    inline __attribute__( ( always_inline ) )
+    #endif
 
 /*-----------------------------------------------------------*/
 
-portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
-{
-uint32_t ulCurrentInterrupt;
-BaseType_t xReturn;
+    portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
+    {
+        uint32_t ulCurrentInterrupt;
+        BaseType_t xReturn;
 
-	/* Obtain the number of the currently executing interrupt. */
-	__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+        /* Obtain the number of the currently executing interrupt. */
+        __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
-	if( ulCurrentInterrupt == 0 )
-	{
-		xReturn = pdFALSE;
-	}
-	else
-	{
-		xReturn = pdTRUE;
-	}
+        if( ulCurrentInterrupt == 0 )
+        {
+            xReturn = pdFALSE;
+        }
+        else
+        {
+            xReturn = pdTRUE;
+        }
 
-	return xReturn;
-}
+        return xReturn;
+    }
 
 /*-----------------------------------------------------------*/
 
 /* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
-the source code because to do so would cause other compilers to generate
-warnings. */
-#pragma diag_suppress=Pe191
-#pragma diag_suppress=Pa082
+ * the source code because to do so would cause other compilers to generate
+ * warnings. */
+    #pragma diag_suppress=Pe191
+    #pragma diag_suppress=Pa082
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
-
diff --git a/portable/IAR/ARM_CRx_No_GIC/port.c b/portable/IAR/ARM_CRx_No_GIC/port.c
index e84773bcc..dee6ceb51 100644
--- a/portable/IAR/ARM_CRx_No_GIC/port.c
+++ b/portable/IAR/ARM_CRx_No_GIC/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/ARM_CRx_No_GIC/portASM.s b/portable/IAR/ARM_CRx_No_GIC/portASM.s
index 49bbca263..4d9d7faad 100644
--- a/portable/IAR/ARM_CRx_No_GIC/portASM.s
+++ b/portable/IAR/ARM_CRx_No_GIC/portASM.s
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/IAR/ARM_CRx_No_GIC/portmacro.h b/portable/IAR/ARM_CRx_No_GIC/portmacro.h
index 99fc18dbf..e4ecaf20c 100644
--- a/portable/IAR/ARM_CRx_No_GIC/portmacro.h
+++ b/portable/IAR/ARM_CRx_No_GIC/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/ATMega323/port.c b/portable/IAR/ATMega323/port.c
index bc9ce9f3e..906166d3d 100644
--- a/portable/IAR/ATMega323/port.c
+++ b/portable/IAR/ATMega323/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/ATMega323/portmacro.h b/portable/IAR/ATMega323/portmacro.h
index 4b7f1253f..d388d309b 100644
--- a/portable/IAR/ATMega323/portmacro.h
+++ b/portable/IAR/ATMega323/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/ATMega323/portmacro.s90 b/portable/IAR/ATMega323/portmacro.s90
index a43b83cd2..eabb405d7 100644
--- a/portable/IAR/ATMega323/portmacro.s90
+++ b/portable/IAR/ATMega323/portmacro.s90
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/IAR/AVR32_UC3/exception.s82 b/portable/IAR/AVR32_UC3/exception.s82
index 2df712c40..30e096749 100644
--- a/portable/IAR/AVR32_UC3/exception.s82
+++ b/portable/IAR/AVR32_UC3/exception.s82
@@ -9,8 +9,9 @@
  * - Supported devices:  All AVR32UC devices with an INTC module can be used.
  * - AppNote:
  *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
+ * \author               Atmel Corporation (Now Microchip):
+                                          https://www.microchip.com \n
+ *                       Support and FAQ: https://www.microchip.com/support
  *
  ******************************************************************************/
 
diff --git a/portable/IAR/AVR32_UC3/port.c b/portable/IAR/AVR32_UC3/port.c
index 4b718884e..9505cdefd 100644
--- a/portable/IAR/AVR32_UC3/port.c
+++ b/portable/IAR/AVR32_UC3/port.c
@@ -7,13 +7,14 @@
  * - Supported devices:  All AVR32 devices can be used.
  * - AppNote:
  *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
+ * \author               Atmel Corporation (Now Microchip):
+ *                                        https://www.microchip.com \n
+ *                       Support and FAQ: https://www.microchip.com/support/
  *
  *****************************************************************************/
 
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -33,8 +34,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/AVR32_UC3/portmacro.h b/portable/IAR/AVR32_UC3/portmacro.h
index ef7d1df8c..a1a58784c 100644
--- a/portable/IAR/AVR32_UC3/portmacro.h
+++ b/portable/IAR/AVR32_UC3/portmacro.h
@@ -7,13 +7,14 @@
  * - Supported devices:  All AVR32 devices can be used.
  * - AppNote:
  *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
+ * \author               Atmel Corporation (Now Microchip):
+ *                                        https://www.microchip.com
+ *                       Support and FAQ: https://www.microchip.com/support
  *
  *****************************************************************************/
 
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -33,8 +34,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/AVR32_UC3/read.c b/portable/IAR/AVR32_UC3/read.c
index 30b5ee85d..61b17a4cc 100644
--- a/portable/IAR/AVR32_UC3/read.c
+++ b/portable/IAR/AVR32_UC3/read.c
@@ -8,8 +8,9 @@
  * - Supported devices:  All AVR32 devices with a USART module can be used.
  * - AppNote:
  *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
+ * \author               Atmel Corporation (Now Microchip):
+ *                                        https://www.microchip.com \n
+ *                       Support and FAQ: https://www.microchip.com/support/
  *
  ******************************************************************************/
 
diff --git a/portable/IAR/AVR32_UC3/write.c b/portable/IAR/AVR32_UC3/write.c
index 859487eca..a78e0c17a 100644
--- a/portable/IAR/AVR32_UC3/write.c
+++ b/portable/IAR/AVR32_UC3/write.c
@@ -8,8 +8,9 @@
  * - Supported devices:  All AVR32 devices with a USART module can be used.
  * - AppNote:
  *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
+ * \author               Atmel Corporation (Now Microchip):
+ *                                        https://www.microchip.com \n
+ *                       Support and FAQ: https://www.microchip.com/support
  *
  ******************************************************************************/
 
diff --git a/portable/IAR/AVR_AVRDx/port.c b/portable/IAR/AVR_AVRDx/port.c
new file mode 100644
index 000000000..a09be5a3c
--- /dev/null
+++ b/portable/IAR/AVR_AVRDx/port.c
@@ -0,0 +1,300 @@
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#include 
+#include "porthardware.h"
+#include "FreeRTOS.h"
+#include "task.h"
+
+/*-----------------------------------------------------------
+* Implementation of functions defined in portable.h for the AVR port.
+*----------------------------------------------------------*/
+
+/* Start tasks with interrupts enables. */
+#define portFLAGS_INT_ENABLED    ( ( StackType_t ) 0x80 )
+
+/*-----------------------------------------------------------*/
+
+
+#define portBYTES_USED_BY_RETURN_ADDRESS    2
+#define portNO_CRITICAL_NESTING             ( ( UBaseType_t ) 0 )
+
+/* Stores the critical section nesting.  This must not be initialised to 0.
+ * It will be initialised when a task starts. */
+UBaseType_t uxCriticalNesting = 0x50;
+
+/*
+ * Setup timer to generate a tick interrupt.
+ */
+static void prvSetupTimerInterrupt( void );
+
+/*
+ * The IAR compiler does not have full support for inline assembler, so
+ * these are defined in the portmacro assembler file.
+ */
+extern void vPortYieldFromTick( void );
+extern void vPortStart( void );
+
+/*-----------------------------------------------------------*/
+
+/*
+ * See header file for description.
+ */
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
+{
+    uint16_t usAddress;
+    StackType_t * pxTopOfHardwareStack;
+
+    /* Simulate how the stack would look after a call to vPortYield(). */
+
+    /*lint -e950 -e611 -e923 Lint doesn't like this much - but nothing I can do about it. */
+
+    /* The IAR compiler requires two stacks per task.  First there is the
+     * hardware call stack which uses the AVR stack pointer.  Second there is the
+     * software stack (local variables, parameter passing, etc.) which uses the
+     * AVR Y register.
+     * This function places both stacks within the memory block passed in as the
+     * first parameter.  The hardware stack is placed at the bottom of the memory
+     * block.  A gap is then left for the hardware stack to grow.  Next the software
+     * stack is placed.  The amount of space between the software and hardware
+     * stacks is defined by configCALL_STACK_SIZE.
+     * The first part of the stack is the hardware stack.  Place the start
+     * address of the task on the hardware stack. */
+
+    /* Place a few bytes of known values on the bottom of the stack.
+     * This is just useful for debugging. */
+    /**pxTopOfStack = 0x11; */
+    /*pxTopOfStack--; */
+    /**pxTopOfStack = 0x22; */
+    /*pxTopOfStack--; */
+    /**pxTopOfStack = 0x33; */
+    /*pxTopOfStack--; */
+
+    /* Remember where the top of the hardware stack is - this is required
+     * below. */
+    pxTopOfHardwareStack = pxTopOfStack;
+
+    usAddress = ( uint16_t ) pxCode;
+    *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
+    pxTopOfStack--;
+
+    usAddress >>= 8;
+    *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
+    pxTopOfStack--;
+
+    /* Leave enough space for the hardware stack before starting the software
+     * stack.  The '- 2' is because we have already used two spaces for the
+     * address of the start of the task. */
+    pxTopOfStack -= ( configCALL_STACK_SIZE - 2 );
+
+    /* Next simulate the stack as if after a call to portSAVE_CONTEXT().
+     *  portSAVE_CONTEXT places the flags on the stack immediately after r0
+     *  to ensure the interrupts get disabled as soon as possible, and so ensuring
+     *  the stack use is minimal should a context switch interrupt occur. */
+
+    *pxTopOfStack = ( StackType_t ) 0x00; /* R0 */
+    pxTopOfStack--;
+    *pxTopOfStack = portFLAGS_INT_ENABLED;
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x00; /* RAMPZ */
+    pxTopOfStack--;
+
+    /* Next place the address of the hardware stack.  This is required so
+     * the AVR stack pointer can be restored to point to the hardware stack. */
+    pxTopOfHardwareStack -= portBYTES_USED_BY_RETURN_ADDRESS;
+    usAddress = ( uint16_t ) pxTopOfHardwareStack;
+
+    /* SPL */
+    *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
+    pxTopOfStack--;
+
+    /* SPH */
+    usAddress >>= 8;
+    *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
+    pxTopOfStack--;
+
+    /* Now the remaining registers. */
+    *pxTopOfStack = ( StackType_t ) 0x01; /* R1 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x02; /* R2 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x03; /* R3 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x04; /* R4 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x05; /* R5 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x06; /* R6 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x07; /* R7 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x08; /* R8 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x09; /* R9 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x10; /* R10 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x11; /* R11 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x12; /* R12 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x13; /* R13 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x14; /* R14 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x15; /* R15 */
+    pxTopOfStack--;
+
+    /* Place the parameter on the stack in the expected location. */
+    usAddress = ( uint16_t ) pvParameters;
+    *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
+    pxTopOfStack--;
+
+    usAddress >>= 8;
+    *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
+    pxTopOfStack--;
+
+    *pxTopOfStack = ( StackType_t ) 0x18; /* R18 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x19; /* R19 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x20; /* R20 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x21; /* R21 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x22; /* R22 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x23; /* R23 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x24; /* R24 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x25; /* R25 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x26; /* R26 X */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x27; /* R27 */
+    pxTopOfStack--;
+
+    /* The Y register is not stored as it is used as the software stack and
+     * gets saved into the task control block. */
+
+    *pxTopOfStack = ( StackType_t ) 0x30;  /* R30 Z */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x031; /* R31 */
+
+    pxTopOfStack--;
+    *pxTopOfStack = portNO_CRITICAL_NESTING; /* Critical nesting is zero when the task starts. */
+
+    /*lint +e950 +e611 +e923 */
+
+    return pxTopOfStack;
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xPortStartScheduler( void )
+{
+    /* Setup the hardware to generate the tick. */
+    prvSetupTimerInterrupt();
+
+    /* Restore the context of the first task that is going to run.
+     * Normally we would just call portRESTORE_CONTEXT() here, but as the IAR
+     * compiler does not fully support inline assembler we have to make a call.*/
+    vPortStart();
+
+    /* Should not get here. */
+    return pdTRUE;
+}
+/*-----------------------------------------------------------*/
+
+void vPortEndScheduler( void )
+{
+    /* vPortEndScheduler is not implemented in this port. */
+}
+
+/*-----------------------------------------------------------*/
+
+/*
+ * Setup timer to generate a tick interrupt.
+ */
+static void prvSetupTimerInterrupt( void )
+{
+    TICK_init();
+}
+
+/*-----------------------------------------------------------*/
+
+#if configUSE_PREEMPTION == 1
+
+/*
+ * Tick ISR for preemptive scheduler.  We can use a naked attribute as
+ * the context is saved at the start of vPortYieldFromTick().  The tick
+ * count is incremented after the context is saved.
+ */
+
+    __task void TICK_INT( void )
+    {
+        vPortYieldFromTick();
+        asm ( "reti" );
+    }
+#else
+
+/*
+ * Tick ISR for the cooperative scheduler.  All this does is increment the
+ * tick count.  We don't need to switch context, this can only be done by
+ * manual calls to taskYIELD();
+ */
+
+    __interrupt void TICK_INT( void )
+    {
+        /* Clear tick interrupt flag. */
+        INT_FLAGS = INT_MASK;
+
+        xTaskIncrementTick();
+    }
+#endif /* if configUSE_PREEMPTION == 1 */
+
+/*-----------------------------------------------------------*/
+
+void vPortEnterCritical( void )
+{
+    portDISABLE_INTERRUPTS();
+    uxCriticalNesting++;
+}
+
+/*-----------------------------------------------------------*/
+
+void vPortExitCritical( void )
+{
+    uxCriticalNesting--;
+
+    if( uxCriticalNesting == portNO_CRITICAL_NESTING )
+    {
+        portENABLE_INTERRUPTS();
+    }
+}
diff --git a/portable/IAR/AVR_AVRDx/porthardware.h b/portable/IAR/AVR_AVRDx/porthardware.h
new file mode 100644
index 000000000..2d17b4202
--- /dev/null
+++ b/portable/IAR/AVR_AVRDx/porthardware.h
@@ -0,0 +1,100 @@
+#ifndef PORTHARDWARE_H
+#define PORTHARDWARE_H
+
+#include 
+#include "FreeRTOSConfig.h"
+
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_TIMER_INSTANCE == 0 )
+
+    #define TICK_INT_vect    TCB0_INT_vect
+    #define INT_FLAGS        TCB0_INTFLAGS
+    #define INT_MASK         TCB_CAPT_bm
+
+    #define TICK_init()                                      \
+    {                                                        \
+        TCB0.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
+        TCB0.INTCTRL = TCB_CAPT_bm;                          \
+        TCB0.CTRLA = TCB_ENABLE_bm;                          \
+    }
+
+#elif ( configUSE_TIMER_INSTANCE == 1 )
+
+    #define TICK_INT_vect    TCB1_INT_vect
+    #define INT_FLAGS        TCB1_INTFLAGS
+    #define INT_MASK         TCB_CAPT_bm
+
+    #define TICK_init()                                      \
+    {                                                        \
+        TCB1.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
+        TCB1.INTCTRL = TCB_CAPT_bm;                          \
+        TCB1.CTRLA = TCB_ENABLE_bm;                          \
+    }
+
+#elif ( configUSE_TIMER_INSTANCE == 2 )
+
+    #define TICK_INT_vect    TCB2_INT_vect
+    #define INT_FLAGS        TCB2_INTFLAGS
+    #define INT_MASK         TCB_CAPT_bm
+
+    #define TICK_init()                                      \
+    {                                                        \
+        TCB2.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
+        TCB2.INTCTRL = TCB_CAPT_bm;                          \
+        TCB2.CTRLA = TCB_ENABLE_bm;                          \
+    }
+
+#elif ( configUSE_TIMER_INSTANCE == 3 )
+
+    #define TICK_INT_vect    TCB3_INT_vect
+    #define INT_FLAGS        TCB3_INTFLAGS
+    #define INT_MASK         TCB_CAPT_bm
+
+    #define TICK_init()                                      \
+    {                                                        \
+        TCB3.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
+        TCB3.INTCTRL = TCB_CAPT_bm;                          \
+        TCB3.CTRLA = TCB_ENABLE_bm;                          \
+    }
+
+#elif ( configUSE_TIMER_INSTANCE == 4 )
+
+    #define TICK_INT_vect    TCB4_INT_vect
+    #define INT_FLAGS        TCB4_INTFLAGS
+    #define INT_MASK         TCB_CAPT_bm
+
+    #define TICK_init()                                      \
+    {                                                        \
+        TCB4.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
+        TCB4.INTCTRL = TCB_CAPT_bm;                          \
+        TCB4.CTRLA = TCB_ENABLE_bm;                          \
+    }
+
+#elif ( configUSE_TIMER_INSTANCE == 5 )
+
+    #define TICK_INT_vect    RTC_CNT_vect
+    #define INT_FLAGS        RTC_INTFLAGS
+    #define INT_MASK         RTC_OVF_bm
+
+/* Hertz to period for RTC setup */
+    #define RTC_PERIOD_HZ( x )    ( 32768 * ( ( 1.0 / x ) ) )
+    #define TICK_init()                                        \
+    {                                                          \
+        while( RTC.STATUS > 0 ) {; }                           \
+        RTC.CTRLA = RTC_PRESCALER_DIV1_gc | 1 << RTC_RTCEN_bp; \
+        RTC.PER = RTC_PERIOD_HZ( configTICK_RATE_HZ );         \
+        RTC.INTCTRL |= 1 << RTC_OVF_bp;                        \
+    }
+
+#else /* if ( configUSE_TIMER_INSTANCE == 0 ) */
+    #undef TICK_INT_vect
+    #undef INT_FLAGS
+    #undef INT_MASK
+    #undef TICK_init()
+    #error Invalid timer setting.
+#endif /* if ( configUSE_TIMER_INSTANCE == 0 ) */
+
+/*-----------------------------------------------------------*/
+
+#endif /* PORTHARDWARE_H */
diff --git a/portable/IAR/AVR_AVRDx/portmacro.h b/portable/IAR/AVR_AVRDx/portmacro.h
new file mode 100644
index 000000000..7d0e52e0b
--- /dev/null
+++ b/portable/IAR/AVR_AVRDx/portmacro.h
@@ -0,0 +1,108 @@
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef PORTMACRO_H
+#define PORTMACRO_H
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/*-----------------------------------------------------------
+ * Port specific definitions.
+ *
+ * The settings in this file configure FreeRTOS correctly for the
+ * given hardware and compiler.
+ *
+ * These settings should not be altered.
+ *-----------------------------------------------------------
+ */
+
+/* Type definitions. */
+#define portCHAR                 char
+#define portFLOAT                float
+#define portDOUBLE               double
+#define portLONG                 long
+#define portSHORT                int
+#define portSTACK_TYPE           uint8_t
+#define portBASE_TYPE            char
+
+#define portPOINTER_SIZE_TYPE    uint16_t
+
+typedef portSTACK_TYPE   StackType_t;
+typedef signed char      BaseType_t;
+typedef unsigned char    UBaseType_t;
+
+#if ( configUSE_16_BIT_TICKS == 1 )
+    typedef uint16_t     TickType_t;
+    #define portMAX_DELAY    ( TickType_t ) 0xffff
+#else
+    typedef uint32_t     TickType_t;
+    #define portMAX_DELAY    ( TickType_t ) 0xffffffffUL
+#endif
+
+/*-----------------------------------------------------------*/
+
+/* Critical section management. */
+extern void vPortEnterCritical( void );
+extern void vPortExitCritical( void );
+
+#define portENTER_CRITICAL()        vPortEnterCritical()
+#define portEXIT_CRITICAL()         vPortExitCritical()
+
+#define portDISABLE_INTERRUPTS()    asm ( "cli" )
+#define portENABLE_INTERRUPTS()     asm ( "sei" )
+/*-----------------------------------------------------------*/
+
+/* Architecture specifics. */
+#define portSTACK_GROWTH      ( -1 )
+#define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+#define portBYTE_ALIGNMENT    1
+#define portNOP()    asm ( "nop" )
+/*-----------------------------------------------------------*/
+
+/* Kernel utilities. */
+extern void vPortYield( void );
+#define portYIELD()             vPortYield()
+
+extern void vPortYieldFromISR( void );
+#define portYIELD_FROM_ISR()    vPortYieldFromISR()
+/*-----------------------------------------------------------*/
+
+/* Task function macros as described on the FreeRTOS.org WEB site. */
+#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+#define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+
+#endif /* PORTMACRO_H */
diff --git a/portable/IAR/AVR_AVRDx/portmacro.s90 b/portable/IAR/AVR_AVRDx/portmacro.s90
new file mode 100644
index 000000000..19b7a76f2
--- /dev/null
+++ b/portable/IAR/AVR_AVRDx/portmacro.s90
@@ -0,0 +1,253 @@
+;/*
+; * FreeRTOS Kernel V10.4.1
+; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+; *
+; * Permission is hereby granted, free of charge, to any person obtaining a copy of
+; * this software and associated documentation files (the "Software"), to deal in
+; * the Software without restriction, including without limitation the rights to
+; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+; * the Software, and to permit persons to whom the Software is furnished to do so,
+; * subject to the following conditions:
+; *
+; * The above copyright notice and this permission notice shall be included in all
+; * copies or substantial portions of the Software.
+; *
+; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+; *
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
+; *
+; */
+
+#include "porthardware.h"
+
+; Declare all extern symbols here - including any ISRs that are referenced in
+; the vector table.
+
+; ISR functions
+; -------------
+EXTERN TICK_INT
+
+; Functions used by scheduler
+; ---------------------------
+EXTERN vTaskSwitchContext
+EXTERN pxCurrentTCB
+EXTERN xTaskIncrementTick
+EXTERN uxCriticalNesting
+
+; Functions implemented in this file
+; ----------------------------------
+PUBLIC vPortYield
+PUBLIC vPortYieldFromTick
+PUBLIC vPortYieldFromISR
+PUBLIC vPortStart
+
+; Interrupt vector table.
+; -----------------------
+;
+; For simplicity the RTOS tick interrupt routine uses the __task keyword.
+; As the IAR compiler does not permit a function to be declared using both
+; __task and __interrupt, the use of __task necessitates that the interrupt
+; vector table be setup manually.
+;
+; To write an ISR, implement the ISR function using the __interrupt keyword
+; but do not install the interrupt using the "#pragma vector=ABC" method.
+; Instead manually place the name of the ISR in the vector table using an
+; ORG and jmp instruction as demonstrated below.
+; You will also have to add an EXTERN statement at the top of the file.
+
+    ASEG
+
+        ORG TICK_INT_vect                   ; Vector address
+            jmp TICK_INT                    ; ISR
+
+    RSEG CODE
+
+CLR_INT MACRO  FLAG_REG, FLAG_MASK
+        st -y, r16
+        ldi r16, FLAG_MASK
+        sts FLAG_REG, r16
+        ld r16, y+
+        
+        ENDM
+
+; Saving and Restoring a Task Context and Task Switching
+; ------------------------------------------------------
+;
+; The IAR compiler does not fully support inline assembler, so saving and
+; restoring a task context has to be written in an asm file.
+;
+; vPortYield() and vPortYieldFromTick() are usually written in C.  Doing
+; so in this case would required calls to be made to portSAVE_CONTEXT() and
+; portRESTORE_CONTEXT().  This is dis-advantageous as the context switch
+; function would require two extra jump and return instructions over the
+; WinAVR equivalent.
+;
+; To avoid this I have opted to implement both vPortYield() and
+; vPortYieldFromTick() in this assembly file.  For convenience
+; portSAVE_CONTEXT and portRESTORE_CONTEXT are implemented as macros.
+
+portSAVE_CONTEXT MACRO
+    st  -y, r0          ; First save the r0 register - we need to use this.
+    in  r0, SREG        ; Obtain the SREG value so we can disable interrupts...
+    cli                 ; ... as soon as possible.
+    st  -y, r0          ; Store the SREG as it was before we disabled interrupts.
+
+    in  r0, RAMPZ
+    st  -y, r0
+
+    in  r0, SPL         ; Next store the hardware stack pointer.  The IAR...
+    st  -y, r0          ; ... compiler uses the hardware stack as a call stack ...
+    in  r0, SPH         ; ...  only.
+    st  -y, r0
+
+    st  -y, r1          ; Now store the rest of the registers.  Dont store the ...
+    st  -y, r2          ; ... the Y register here as it is used as the software
+    st  -y, r3          ; stack pointer and will get saved into the TCB.
+    st  -y, r4
+    st  -y, r5
+    st  -y, r6
+    st  -y, r7
+    st  -y, r8
+    st  -y, r9
+    st  -y, r10
+    st  -y, r11
+    st  -y, r12
+    st  -y, r13
+    st  -y, r14
+    st  -y, r15
+    st  -y, r16
+    st  -y, r17
+    st  -y, r18
+    st  -y, r19
+    st  -y, r20
+    st  -y, r21
+    st  -y, r22
+    st  -y, r23
+    st  -y, r24
+    st  -y, r25
+    st  -y, r26
+    st  -y, r27
+    st  -y, r30
+    st  -y, r31
+
+    lds r0, uxCriticalNesting
+    st  -y, r0                  ; Store the critical nesting counter.
+
+    lds r26, pxCurrentTCB       ; Finally save the software stack pointer (Y ...
+    lds r27, pxCurrentTCB + 1   ; ... register) into the TCB.
+    st  x+, r28
+    st  x+, r29
+
+    ENDM
+
+
+portRESTORE_CONTEXT MACRO
+    lds r26, pxCurrentTCB
+    lds r27, pxCurrentTCB + 1       ; Restore the software stack pointer from ...
+    ld  r28, x+                     ; the TCB into the software stack pointer (...
+    ld  r29, x+                     ; ... the Y register).
+
+    ld  r0, y+
+    sts uxCriticalNesting, r0
+
+    ld  r31, y+                     ; Restore the registers down to R0.  The Y
+    ld  r30, y+                     ; register is missing from this list as it
+    ld  r27, y+                     ; has already been restored.
+    ld  r26, y+
+    ld  r25, y+
+    ld  r24, y+
+    ld  r23, y+
+    ld  r22, y+
+    ld  r21, y+
+    ld  r20, y+
+    ld  r19, y+
+    ld  r18, y+
+    ld  r17, y+
+    ld  r16, y+
+    ld  r15, y+
+    ld  r14, y+
+    ld  r13, y+
+    ld  r12, y+
+    ld  r11, y+
+    ld  r10, y+
+    ld  r9, y+
+    ld  r8, y+
+    ld  r7, y+
+    ld  r6, y+
+    ld  r5, y+
+    ld  r4, y+
+    ld  r3, y+
+    ld  r2, y+
+    ld  r1, y+
+
+    ld  r0, y+                      ; The next thing on the stack is the ...
+    out SPH, r0                     ; ... hardware stack pointer.
+    ld  r0, y+
+    out SPL, r0
+
+    ld  r0, y+
+    out RAMPZ, r0
+
+    ld  r0, y+                      ; Next there is the SREG register.
+    out SREG, r0
+
+    ld  r0, y+                      ; Finally we have finished with r0, so restore r0.
+
+    ENDM
+
+
+
+; vPortYield(), vPortYieldFromTick() and vPortYieldFromISR()
+; -------------------------------------
+;
+; Manual and preemptive context switch functions respectively.
+; The IAR compiler does not fully support inline assembler,
+; so these are implemented here rather than the more usually
+; place of within port.c.
+
+vPortYield:
+    portSAVE_CONTEXT                ; Save the context of the current task.
+    call vTaskSwitchContext         ; Call the scheduler.
+    portRESTORE_CONTEXT             ; Restore the context of whichever task the ...
+    ret                             ; ... scheduler decided should run.
+
+vPortYieldFromTick:
+    CLR_INT INT_FLAGS, INT_MASK     ; Clear tick interrupt flag
+
+    portSAVE_CONTEXT                ; Save the context of the current task.    
+    call xTaskIncrementTick         ; Call the timer tick function.
+    tst r16
+    breq SkipTaskSwitch
+    call vTaskSwitchContext         ; Call the scheduler.
+
+SkipTaskSwitch:
+    portRESTORE_CONTEXT             ; Restore the context of whichever task the ...
+    reti                            ; ... scheduler decided should run.
+
+vPortYieldFromISR:
+    portSAVE_CONTEXT                ; Save the context of the current task.
+    call vTaskSwitchContext         ; Call the scheduler.
+    portRESTORE_CONTEXT             ; Restore the context of whichever task the ...
+    reti                            ; ... scheduler decided should run.
+
+; vPortStart()
+; ------------
+;
+; Again due to the lack of inline assembler, this is required
+; to get access to the portRESTORE_CONTEXT macro.
+
+vPortStart:
+    portRESTORE_CONTEXT
+    ret
+
+; Just a filler for unused interrupt vectors.
+vNoISR:
+    reti
+
+    END
diff --git a/portable/IAR/AVR_Mega0/port.c b/portable/IAR/AVR_Mega0/port.c
new file mode 100644
index 000000000..2f91208d4
--- /dev/null
+++ b/portable/IAR/AVR_Mega0/port.c
@@ -0,0 +1,298 @@
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#include 
+#include "porthardware.h"
+#include "FreeRTOS.h"
+#include "task.h"
+
+/*-----------------------------------------------------------
+* Implementation of functions defined in portable.h for the AVR port.
+*----------------------------------------------------------*/
+
+/* Start tasks with interrupts enables. */
+#define portFLAGS_INT_ENABLED    ( ( StackType_t ) 0x80 )
+
+/*-----------------------------------------------------------*/
+
+
+#define portBYTES_USED_BY_RETURN_ADDRESS    2
+#define portNO_CRITICAL_NESTING             ( ( UBaseType_t ) 0 )
+
+/* Stores the critical section nesting.  This must not be initialised to 0.
+ * It will be initialised when a task starts. */
+UBaseType_t uxCriticalNesting = 0x50;
+
+/*
+ * Setup timer to generate a tick interrupt.
+ */
+static void prvSetupTimerInterrupt( void );
+
+/*
+ * The IAR compiler does not have full support for inline assembler, so
+ * these are defined in the portmacro assembler file.
+ */
+extern void vPortYieldFromTick( void );
+extern void vPortStart( void );
+
+/*-----------------------------------------------------------*/
+
+/*
+ * See header file for description.
+ */
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
+{
+    uint16_t usAddress;
+    StackType_t * pxTopOfHardwareStack;
+
+    /* Simulate how the stack would look after a call to vPortYield(). */
+
+    /*lint -e950 -e611 -e923 Lint doesn't like this much - but nothing I can do about it. */
+
+    /* The IAR compiler requires two stacks per task.  First there is the
+     * hardware call stack which uses the AVR stack pointer.  Second there is the
+     * software stack (local variables, parameter passing, etc.) which uses the
+     * AVR Y register.
+     * This function places both stacks within the memory block passed in as the
+     * first parameter.  The hardware stack is placed at the bottom of the memory
+     * block.  A gap is then left for the hardware stack to grow.  Next the software
+     * stack is placed.  The amount of space between the software and hardware
+     * stacks is defined by configCALL_STACK_SIZE.
+     * The first part of the stack is the hardware stack.  Place the start
+     * address of the task on the hardware stack. */
+
+    /* Place a few bytes of known values on the bottom of the stack.
+     * This is just useful for debugging. */
+    /**pxTopOfStack = 0x11; */
+    /*pxTopOfStack--; */
+    /**pxTopOfStack = 0x22; */
+    /*pxTopOfStack--; */
+    /**pxTopOfStack = 0x33; */
+    /*pxTopOfStack--; */
+
+    /* Remember where the top of the hardware stack is - this is required
+     * below. */
+    pxTopOfHardwareStack = pxTopOfStack;
+
+    usAddress = ( uint16_t ) pxCode;
+    *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
+    pxTopOfStack--;
+
+    usAddress >>= 8;
+    *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
+    pxTopOfStack--;
+
+    /* Leave enough space for the hardware stack before starting the software
+     * stack.  The '- 2' is because we have already used two spaces for the
+     * address of the start of the task. */
+    pxTopOfStack -= ( configCALL_STACK_SIZE - 2 );
+
+    /* Next simulate the stack as if after a call to portSAVE_CONTEXT().
+     *  portSAVE_CONTEXT places the flags on the stack immediately after r0
+     *  to ensure the interrupts get disabled as soon as possible, and so ensuring
+     *  the stack use is minimal should a context switch interrupt occur. */
+
+    *pxTopOfStack = ( StackType_t ) 0x00; /* R0 */
+    pxTopOfStack--;
+    *pxTopOfStack = portFLAGS_INT_ENABLED;
+    pxTopOfStack--;
+
+    /* Next place the address of the hardware stack.  This is required so
+     * the AVR stack pointer can be restored to point to the hardware stack. */
+    pxTopOfHardwareStack -= portBYTES_USED_BY_RETURN_ADDRESS;
+    usAddress = ( uint16_t ) pxTopOfHardwareStack;
+
+    /* SPL */
+    *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
+    pxTopOfStack--;
+
+    /* SPH */
+    usAddress >>= 8;
+    *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
+    pxTopOfStack--;
+
+    /* Now the remaining registers. */
+    *pxTopOfStack = ( StackType_t ) 0x01; /* R1 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x02; /* R2 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x03; /* R3 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x04; /* R4 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x05; /* R5 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x06; /* R6 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x07; /* R7 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x08; /* R8 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x09; /* R9 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x10; /* R10 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x11; /* R11 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x12; /* R12 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x13; /* R13 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x14; /* R14 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x15; /* R15 */
+    pxTopOfStack--;
+
+    /* Place the parameter on the stack in the expected location. */
+    usAddress = ( uint16_t ) pvParameters;
+    *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
+    pxTopOfStack--;
+
+    usAddress >>= 8;
+    *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
+    pxTopOfStack--;
+
+    *pxTopOfStack = ( StackType_t ) 0x18; /* R18 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x19; /* R19 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x20; /* R20 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x21; /* R21 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x22; /* R22 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x23; /* R23 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x24; /* R24 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x25; /* R25 */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x26; /* R26 X */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x27; /* R27 */
+    pxTopOfStack--;
+
+    /* The Y register is not stored as it is used as the software stack and
+     * gets saved into the task control block. */
+
+    *pxTopOfStack = ( StackType_t ) 0x30;  /* R30 Z */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) 0x031; /* R31 */
+
+    pxTopOfStack--;
+    *pxTopOfStack = portNO_CRITICAL_NESTING; /* Critical nesting is zero when the task starts. */
+
+    /*lint +e950 +e611 +e923 */
+
+    return pxTopOfStack;
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xPortStartScheduler( void )
+{
+    /* Setup the hardware to generate the tick. */
+    prvSetupTimerInterrupt();
+
+    /* Restore the context of the first task that is going to run.
+     * Normally we would just call portRESTORE_CONTEXT() here, but as the IAR
+     * compiler does not fully support inline assembler we have to make a call.*/
+    vPortStart();
+
+    /* Should not get here. */
+    return pdTRUE;
+}
+/*-----------------------------------------------------------*/
+
+void vPortEndScheduler( void )
+{
+    /* vPortEndScheduler is not implemented in this port. */
+}
+
+/*-----------------------------------------------------------*/
+
+/*
+ * Setup timer to generate a tick interrupt.
+ */
+static void prvSetupTimerInterrupt( void )
+{
+    TICK_init();
+}
+
+/*-----------------------------------------------------------*/
+
+#if configUSE_PREEMPTION == 1
+
+/*
+ * Tick ISR for preemptive scheduler.  We can use a naked attribute as
+ * the context is saved at the start of vPortYieldFromTick().  The tick
+ * count is incremented after the context is saved.
+ */
+
+    __task void TICK_INT( void )
+    {
+        vPortYieldFromTick();
+        asm ( "reti" );
+    }
+#else
+
+/*
+ * Tick ISR for the cooperative scheduler.  All this does is increment the
+ * tick count.  We don't need to switch context, this can only be done by
+ * manual calls to taskYIELD();
+ */
+
+    __interrupt void TICK_INT( void )
+    {
+        /* Clear tick interrupt flag. */
+        INT_FLAGS = INT_MASK;
+
+        xTaskIncrementTick();
+    }
+#endif /* if configUSE_PREEMPTION == 1 */
+
+/*-----------------------------------------------------------*/
+
+void vPortEnterCritical( void )
+{
+    portDISABLE_INTERRUPTS();
+    uxCriticalNesting++;
+}
+
+/*-----------------------------------------------------------*/
+
+void vPortExitCritical( void )
+{
+    uxCriticalNesting--;
+
+    if( uxCriticalNesting == portNO_CRITICAL_NESTING )
+    {
+        portENABLE_INTERRUPTS();
+    }
+}
diff --git a/portable/IAR/AVR_Mega0/porthardware.h b/portable/IAR/AVR_Mega0/porthardware.h
new file mode 100644
index 000000000..4188ae274
--- /dev/null
+++ b/portable/IAR/AVR_Mega0/porthardware.h
@@ -0,0 +1,87 @@
+#ifndef PORTHARDWARE_H
+#define PORTHARDWARE_H
+
+#include 
+#include "FreeRTOSConfig.h"
+
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_TIMER_INSTANCE == 0 )
+
+    #define TICK_INT_vect    TCB0_INT_vect
+    #define INT_FLAGS        TCB0_INTFLAGS
+    #define INT_MASK         TCB_CAPT_bm
+
+    #define TICK_init()                                      \
+    {                                                        \
+        TCB0.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
+        TCB0.INTCTRL = TCB_CAPT_bm;                          \
+        TCB0.CTRLA = TCB_ENABLE_bm;                          \
+    }
+
+#elif ( configUSE_TIMER_INSTANCE == 1 )
+
+    #define TICK_INT_vect    TCB1_INT_vect
+    #define INT_FLAGS        TCB1_INTFLAGS
+    #define INT_MASK         TCB_CAPT_bm
+
+    #define TICK_init()                                      \
+    {                                                        \
+        TCB1.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
+        TCB1.INTCTRL = TCB_CAPT_bm;                          \
+        TCB1.CTRLA = TCB_ENABLE_bm;                          \
+    }
+
+#elif ( configUSE_TIMER_INSTANCE == 2 )
+
+    #define TICK_INT_vect    TCB2_INT_vect
+    #define INT_FLAGS        TCB2_INTFLAGS
+    #define INT_MASK         TCB_CAPT_bm
+
+    #define TICK_init()                                      \
+    {                                                        \
+        TCB2.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
+        TCB2.INTCTRL = TCB_CAPT_bm;                          \
+        TCB2.CTRLA = TCB_ENABLE_bm;                          \
+    }
+
+#elif ( configUSE_TIMER_INSTANCE == 3 )
+
+    #define TICK_INT_vect    TCB3_INT_vect
+    #define INT_FLAGS        TCB3_INTFLAGS
+    #define INT_MASK         TCB_CAPT_bm
+
+    #define TICK_init()                                      \
+    {                                                        \
+        TCB3.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
+        TCB3.INTCTRL = TCB_CAPT_bm;                          \
+        TCB3.CTRLA = TCB_ENABLE_bm;                          \
+    }
+
+#elif ( configUSE_TIMER_INSTANCE == 4 )
+
+    #define TICK_INT_vect    RTC_CNT_vect
+    #define INT_FLAGS        RTC_INTFLAGS
+    #define INT_MASK         RTC_OVF_bm
+
+/* Hertz to period for RTC setup */
+    #define RTC_PERIOD_HZ( x )    ( 32768 * ( ( 1.0 / x ) ) )
+    #define TICK_init()                                        \
+    {                                                          \
+        while( RTC.STATUS > 0 ) {; }                           \
+        RTC.CTRLA = RTC_PRESCALER_DIV1_gc | 1 << RTC_RTCEN_bp; \
+        RTC.PER = RTC_PERIOD_HZ( configTICK_RATE_HZ );         \
+        RTC.INTCTRL |= 1 << RTC_OVF_bp;                        \
+    }
+
+#else /* if ( configUSE_TIMER_INSTANCE == 0 ) */
+    #undef TICK_INT_vect
+    #undef INT_FLAGS
+    #undef INT_MASK
+    #undef TICK_init()
+    #error Invalid timer setting.
+#endif /* if ( configUSE_TIMER_INSTANCE == 0 ) */
+
+/*-----------------------------------------------------------*/
+
+#endif /* PORTHARDWARE_H */
diff --git a/portable/IAR/AVR_Mega0/portmacro.h b/portable/IAR/AVR_Mega0/portmacro.h
new file mode 100644
index 000000000..7d0e52e0b
--- /dev/null
+++ b/portable/IAR/AVR_Mega0/portmacro.h
@@ -0,0 +1,108 @@
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef PORTMACRO_H
+#define PORTMACRO_H
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/*-----------------------------------------------------------
+ * Port specific definitions.
+ *
+ * The settings in this file configure FreeRTOS correctly for the
+ * given hardware and compiler.
+ *
+ * These settings should not be altered.
+ *-----------------------------------------------------------
+ */
+
+/* Type definitions. */
+#define portCHAR                 char
+#define portFLOAT                float
+#define portDOUBLE               double
+#define portLONG                 long
+#define portSHORT                int
+#define portSTACK_TYPE           uint8_t
+#define portBASE_TYPE            char
+
+#define portPOINTER_SIZE_TYPE    uint16_t
+
+typedef portSTACK_TYPE   StackType_t;
+typedef signed char      BaseType_t;
+typedef unsigned char    UBaseType_t;
+
+#if ( configUSE_16_BIT_TICKS == 1 )
+    typedef uint16_t     TickType_t;
+    #define portMAX_DELAY    ( TickType_t ) 0xffff
+#else
+    typedef uint32_t     TickType_t;
+    #define portMAX_DELAY    ( TickType_t ) 0xffffffffUL
+#endif
+
+/*-----------------------------------------------------------*/
+
+/* Critical section management. */
+extern void vPortEnterCritical( void );
+extern void vPortExitCritical( void );
+
+#define portENTER_CRITICAL()        vPortEnterCritical()
+#define portEXIT_CRITICAL()         vPortExitCritical()
+
+#define portDISABLE_INTERRUPTS()    asm ( "cli" )
+#define portENABLE_INTERRUPTS()     asm ( "sei" )
+/*-----------------------------------------------------------*/
+
+/* Architecture specifics. */
+#define portSTACK_GROWTH      ( -1 )
+#define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+#define portBYTE_ALIGNMENT    1
+#define portNOP()    asm ( "nop" )
+/*-----------------------------------------------------------*/
+
+/* Kernel utilities. */
+extern void vPortYield( void );
+#define portYIELD()             vPortYield()
+
+extern void vPortYieldFromISR( void );
+#define portYIELD_FROM_ISR()    vPortYieldFromISR()
+/*-----------------------------------------------------------*/
+
+/* Task function macros as described on the FreeRTOS.org WEB site. */
+#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+#define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+
+#endif /* PORTMACRO_H */
diff --git a/portable/IAR/AVR_Mega0/portmacro.s90 b/portable/IAR/AVR_Mega0/portmacro.s90
new file mode 100644
index 000000000..ef8572ecb
--- /dev/null
+++ b/portable/IAR/AVR_Mega0/portmacro.s90
@@ -0,0 +1,248 @@
+;/*
+; * FreeRTOS Kernel V10.4.1
+; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+; *
+; * Permission is hereby granted, free of charge, to any person obtaining a copy of
+; * this software and associated documentation files (the "Software"), to deal in
+; * the Software without restriction, including without limitation the rights to
+; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+; * the Software, and to permit persons to whom the Software is furnished to do so,
+; * subject to the following conditions:
+; *
+; * The above copyright notice and this permission notice shall be included in all
+; * copies or substantial portions of the Software.
+; *
+; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+; *
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
+; *
+; * 1 tab == 4 spaces!
+; */
+
+#include "porthardware.h"
+
+; Declare all extern symbols here - including any ISRs that are referenced in
+; the vector table.
+
+; ISR functions
+; -------------
+EXTERN TICK_INT
+
+; Functions used by scheduler
+; ---------------------------
+EXTERN vTaskSwitchContext
+EXTERN pxCurrentTCB
+EXTERN xTaskIncrementTick
+EXTERN uxCriticalNesting
+
+; Functions implemented in this file
+; ----------------------------------
+PUBLIC vPortYield
+PUBLIC vPortYieldFromTick
+PUBLIC vPortYieldFromISR
+PUBLIC vPortStart
+
+; Interrupt vector table.
+; -----------------------
+;
+; For simplicity the RTOS tick interrupt routine uses the __task keyword.
+; As the IAR compiler does not permit a function to be declared using both
+; __task and __interrupt, the use of __task necessitates that the interrupt
+; vector table be setup manually.
+;
+; To write an ISR, implement the ISR function using the __interrupt keyword
+; but do not install the interrupt using the "#pragma vector=ABC" method.
+; Instead manually place the name of the ISR in the vector table using an
+; ORG and jmp instruction as demonstrated below.
+; You will also have to add an EXTERN statement at the top of the file.
+
+    ASEG
+
+    ORG TICK_INT_vect                   ; Vector address
+        jmp TICK_INT                    ; ISR
+
+    RSEG CODE
+
+CLR_INT MACRO  FLAG_REG, FLAG_MASK
+    st -y, r16
+    ldi r16, FLAG_MASK
+    sts FLAG_REG, r16
+    ld r16, y+
+        
+    ENDM
+
+; Saving and Restoring a Task Context and Task Switching
+; ------------------------------------------------------
+;
+; The IAR compiler does not fully support inline assembler, so saving and
+; restoring a task context has to be written in an asm file.
+;
+; vPortYield() and vPortYieldFromTick() are usually written in C.  Doing
+; so in this case would required calls to be made to portSAVE_CONTEXT() and
+; portRESTORE_CONTEXT().  This is dis-advantageous as the context switch
+; function would require two extra jump and return instructions over the
+; WinAVR equivalent.
+;
+; To avoid this I have opted to implement both vPortYield() and
+; vPortYieldFromTick() in this assembly file.  For convenience
+; portSAVE_CONTEXT and portRESTORE_CONTEXT are implemented as macros.
+
+portSAVE_CONTEXT MACRO
+    st  -y, r0          ; First save the r0 register - we need to use this.
+    in  r0, SREG        ; Obtain the SREG value so we can disable interrupts...
+    cli                 ; ... as soon as possible.
+    st  -y, r0          ; Store the SREG as it was before we disabled interrupts.
+
+    in  r0, SPL         ; Next store the hardware stack pointer.  The IAR...
+    st  -y, r0          ; ... compiler uses the hardware stack as a call stack ...
+    in  r0, SPH         ; ...  only.
+    st  -y, r0
+
+    st  -y, r1          ; Now store the rest of the registers.  Dont store the ...
+    st  -y, r2          ; ... the Y register here as it is used as the software
+    st  -y, r3          ; stack pointer and will get saved into the TCB.
+    st  -y, r4
+    st  -y, r5
+    st  -y, r6
+    st  -y, r7
+    st  -y, r8
+    st  -y, r9
+    st  -y, r10
+    st  -y, r11
+    st  -y, r12
+    st  -y, r13
+    st  -y, r14
+    st  -y, r15
+    st  -y, r16
+    st  -y, r17
+    st  -y, r18
+    st  -y, r19
+    st  -y, r20
+    st  -y, r21
+    st  -y, r22
+    st  -y, r23
+    st  -y, r24
+    st  -y, r25
+    st  -y, r26
+    st  -y, r27
+    st  -y, r30
+    st  -y, r31
+        
+    lds r0, uxCriticalNesting
+    st  -y, r0                  ; Store the critical nesting counter.
+
+    lds r26, pxCurrentTCB       ; Finally save the software stack pointer (Y ...
+    lds r27, pxCurrentTCB + 1   ; ... register) into the TCB.
+    st  x+, r28
+    st  x+, r29
+
+    ENDM
+
+
+portRESTORE_CONTEXT MACRO
+    lds r26, pxCurrentTCB
+    lds r27, pxCurrentTCB + 1       ; Restore the software stack pointer from ...
+    ld  r28, x+                     ; the TCB into the software stack pointer (...
+    ld  r29, x+                     ; ... the Y register).
+
+    ld  r0, y+
+    sts uxCriticalNesting, r0
+
+    ld  r31, y+                     ; Restore the registers down to R0.  The Y
+    ld  r30, y+                     ; register is missing from this list as it
+    ld  r27, y+                     ; has already been restored.
+    ld  r26, y+
+    ld  r25, y+
+    ld  r24, y+
+    ld  r23, y+
+    ld  r22, y+
+    ld  r21, y+
+    ld  r20, y+
+    ld  r19, y+
+    ld  r18, y+
+    ld  r17, y+
+    ld  r16, y+
+    ld  r15, y+
+    ld  r14, y+
+    ld  r13, y+
+    ld  r12, y+
+    ld  r11, y+
+    ld  r10, y+
+    ld  r9, y+
+    ld  r8, y+
+    ld  r7, y+
+    ld  r6, y+
+    ld  r5, y+
+    ld  r4, y+
+    ld  r3, y+
+    ld  r2, y+
+    ld  r1, y+
+
+    ld  r0, y+                      ; The next thing on the stack is the ...
+    out SPH, r0                     ; ... hardware stack pointer.
+    ld  r0, y+
+    out SPL, r0
+
+    ld  r0, y+                      ; Next there is the SREG register.
+    out SREG, r0
+
+    ld  r0, y+                      ; Finally we have finished with r0, so restore r0.
+
+    ENDM
+
+
+
+; vPortYield(), vPortYieldFromTick() and vPortYieldFromISR()
+; -------------------------------------
+;
+; Manual and preemptive context switch functions respectively.
+; The IAR compiler does not fully support inline assembler,
+; so these are implemented here rather than the more usually
+; place of within port.c.
+
+vPortYield:
+    portSAVE_CONTEXT                ; Save the context of the current task.
+    call vTaskSwitchContext         ; Call the scheduler.
+    portRESTORE_CONTEXT             ; Restore the context of whichever task the ...
+    ret                             ; ... scheduler decided should run.
+
+vPortYieldFromTick:
+    CLR_INT INT_FLAGS, INT_MASK     ; Clear tick interrupt flag
+ 
+    portSAVE_CONTEXT                ; Save the context of the current task.
+    call xTaskIncrementTick         ; Call the timer tick function.
+    tst r16
+    breq SkipTaskSwitch
+    call vTaskSwitchContext         ; Call the scheduler.
+
+SkipTaskSwitch:
+    portRESTORE_CONTEXT             ; Restore the context of whichever task the ...
+    reti                            ; ... scheduler decided should run.
+
+vPortYieldFromISR:
+    portSAVE_CONTEXT                ; Save the context of the current task.
+    call vTaskSwitchContext         ; Call the scheduler.
+    portRESTORE_CONTEXT             ; Restore the context of whichever task the ...
+    reti                            ; ... scheduler decided should run.
+
+; vPortStart()
+; ------------
+;
+; Again due to the lack of inline assembler, this is required
+; to get access to the portRESTORE_CONTEXT macro.
+
+vPortStart:
+        portRESTORE_CONTEXT
+        ret
+
+; Just a filler for unused interrupt vectors.
+vNoISR:
+    reti
+
+END
diff --git a/portable/IAR/AtmelSAM7S64/ISR_Support.h b/portable/IAR/AtmelSAM7S64/ISR_Support.h
index 360fff6d5..c3cca9bde 100644
--- a/portable/IAR/AtmelSAM7S64/ISR_Support.h
+++ b/portable/IAR/AtmelSAM7S64/ISR_Support.h
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/IAR/AtmelSAM7S64/port.c b/portable/IAR/AtmelSAM7S64/port.c
index 1dbf34c9c..4a95fde6f 100644
--- a/portable/IAR/AtmelSAM7S64/port.c
+++ b/portable/IAR/AtmelSAM7S64/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/AtmelSAM7S64/portasm.s79 b/portable/IAR/AtmelSAM7S64/portasm.s79
index beee2b543..adb497429 100644
--- a/portable/IAR/AtmelSAM7S64/portasm.s79
+++ b/portable/IAR/AtmelSAM7S64/portasm.s79
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/IAR/AtmelSAM7S64/portmacro.h b/portable/IAR/AtmelSAM7S64/portmacro.h
index 86cb21142..033c2bf67 100644
--- a/portable/IAR/AtmelSAM7S64/portmacro.h
+++ b/portable/IAR/AtmelSAM7S64/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/AtmelSAM9XE/port.c b/portable/IAR/AtmelSAM9XE/port.c
index b65a07c0c..d759ce04e 100644
--- a/portable/IAR/AtmelSAM9XE/port.c
+++ b/portable/IAR/AtmelSAM9XE/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/AtmelSAM9XE/portmacro.h b/portable/IAR/AtmelSAM9XE/portmacro.h
index a721c9f1c..d8cdbffa4 100644
--- a/portable/IAR/AtmelSAM9XE/portmacro.h
+++ b/portable/IAR/AtmelSAM9XE/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/LPC2000/ISR_Support.h b/portable/IAR/LPC2000/ISR_Support.h
index 360fff6d5..c3cca9bde 100644
--- a/portable/IAR/LPC2000/ISR_Support.h
+++ b/portable/IAR/LPC2000/ISR_Support.h
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/IAR/LPC2000/port.c b/portable/IAR/LPC2000/port.c
index 1385ec0d4..b0d325aa2 100644
--- a/portable/IAR/LPC2000/port.c
+++ b/portable/IAR/LPC2000/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/LPC2000/portasm.s79 b/portable/IAR/LPC2000/portasm.s79
index 1967218aa..d54cb3203 100644
--- a/portable/IAR/LPC2000/portasm.s79
+++ b/portable/IAR/LPC2000/portasm.s79
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/IAR/LPC2000/portmacro.h b/portable/IAR/LPC2000/portmacro.h
index cb275c7d8..c45a9c4e9 100644
--- a/portable/IAR/LPC2000/portmacro.h
+++ b/portable/IAR/LPC2000/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/MSP430/port.c b/portable/IAR/MSP430/port.c
index 1a03448b3..fbaacba4f 100644
--- a/portable/IAR/MSP430/port.c
+++ b/portable/IAR/MSP430/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/MSP430/portasm.h b/portable/IAR/MSP430/portasm.h
index d95e0ae70..782ea71ce 100644
--- a/portable/IAR/MSP430/portasm.h
+++ b/portable/IAR/MSP430/portasm.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/MSP430/portext.s43 b/portable/IAR/MSP430/portext.s43
index 48673467a..4db66d702 100644
--- a/portable/IAR/MSP430/portext.s43
+++ b/portable/IAR/MSP430/portext.s43
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/MSP430/portmacro.h b/portable/IAR/MSP430/portmacro.h
index c3a50aa8a..3c8f391c8 100644
--- a/portable/IAR/MSP430/portmacro.h
+++ b/portable/IAR/MSP430/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/MSP430X/data_model.h b/portable/IAR/MSP430X/data_model.h
index 36935cb0f..49a05851e 100644
--- a/portable/IAR/MSP430X/data_model.h
+++ b/portable/IAR/MSP430X/data_model.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/MSP430X/port.c b/portable/IAR/MSP430X/port.c
index fb460d089..e631aa18f 100644
--- a/portable/IAR/MSP430X/port.c
+++ b/portable/IAR/MSP430X/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/MSP430X/portext.s43 b/portable/IAR/MSP430X/portext.s43
index 09333cbfc..66007aeab 100644
--- a/portable/IAR/MSP430X/portext.s43
+++ b/portable/IAR/MSP430X/portext.s43
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/MSP430X/portmacro.h b/portable/IAR/MSP430X/portmacro.h
index cf0aace8b..5cf4177c3 100644
--- a/portable/IAR/MSP430X/portmacro.h
+++ b/portable/IAR/MSP430X/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/RISC-V/Documentation.url b/portable/IAR/RISC-V/Documentation.url
index 7cb013afb..c7819d55b 100644
--- a/portable/IAR/RISC-V/Documentation.url
+++ b/portable/IAR/RISC-V/Documentation.url
@@ -2,4 +2,4 @@
 Prop3=19,11
 [InternetShortcut]
 IDList=
-URL=https://freertos.org/Using-FreeRTOS-on-RISC-V.html
+URL=https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
diff --git a/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h
index 2296be895..0bf49cfbb 100644
--- a/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h
+++ b/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/RISC-V/port.c b/portable/IAR/RISC-V/port.c
index bf8eca07e..efbf85466 100644
--- a/portable/IAR/RISC-V/port.c
+++ b/portable/IAR/RISC-V/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -38,15 +38,15 @@
 #include "string.h"
 
 #ifdef configCLINT_BASE_ADDRESS
-	#warning The configCLINT_BASE_ADDRESS constant has been deprecated.  configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS are currently being derived from the (possibly 0) configCLINT_BASE_ADDRESS setting.  Please update to define configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS dirctly in place of configCLINT_BASE_ADDRESS.  See https://www.freertos.org/Using-FreeRTOS-on-RISC-V.html
+	#warning The configCLINT_BASE_ADDRESS constant has been deprecated.  configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS are currently being derived from the (possibly 0) configCLINT_BASE_ADDRESS setting.  Please update to define configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS dirctly in place of configCLINT_BASE_ADDRESS.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
 #endif
 
 #ifndef configMTIME_BASE_ADDRESS
-	#warning configMTIME_BASE_ADDRESS must be defined in FreeRTOSConfig.h.  If the target chip includes a memory-mapped mtime register then set configMTIME_BASE_ADDRESS to the mapped address.  Otherwise set configMTIME_BASE_ADDRESS to 0.  See https://www.freertos.org/Using-FreeRTOS-on-RISC-V.html
+	#warning configMTIME_BASE_ADDRESS must be defined in FreeRTOSConfig.h.  If the target chip includes a memory-mapped mtime register then set configMTIME_BASE_ADDRESS to the mapped address.  Otherwise set configMTIME_BASE_ADDRESS to 0.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
 #endif
 
 #ifndef configMTIMECMP_BASE_ADDRESS
-	#warning configMTIMECMP_BASE_ADDRESS must be defined in FreeRTOSConfig.h.  If the target chip includes a memory-mapped mtimecmp register then set configMTIMECMP_BASE_ADDRESS to the mapped address.  Otherwise set configMTIMECMP_BASE_ADDRESS to 0.  See https://www.freertos.org/Using-FreeRTOS-on-RISC-V.html
+	#warning configMTIMECMP_BASE_ADDRESS must be defined in FreeRTOSConfig.h.  If the target chip includes a memory-mapped mtimecmp register then set configMTIMECMP_BASE_ADDRESS to the mapped address.  Otherwise set configMTIMECMP_BASE_ADDRESS to 0.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
 #endif
 
 /* Let the user override the pre-loading of the initial LR with the address of
diff --git a/portable/IAR/RISC-V/portASM.s b/portable/IAR/RISC-V/portASM.s
index a33009977..970104274 100644
--- a/portable/IAR/RISC-V/portASM.s
+++ b/portable/IAR/RISC-V/portASM.s
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -72,21 +72,21 @@
 /* Check the freertos_risc_v_chip_specific_extensions.h and/or command line
 definitions. */
 #if defined( portasmHAS_CLINT ) && defined( portasmHAS_MTIME )
-	#error The portasmHAS_CLINT constant has been deprecated.  Please replace it with portasmHAS_MTIME.  portasmHAS_CLINT and portasmHAS_MTIME cannot both be defined at once.  See https://www.freertos.org/Using-FreeRTOS-on-RISC-V.html
+	#error The portasmHAS_CLINT constant has been deprecated.  Please replace it with portasmHAS_MTIME.  portasmHAS_CLINT and portasmHAS_MTIME cannot both be defined at once.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
 #endif
 
 #ifdef portasmHAS_CLINT
-	#warning The portasmHAS_CLINT constant has been deprecated.  Please replace it with portasmHAS_MTIME and portasmHAS_SIFIVE_CLINT.  For now portasmHAS_MTIME and portasmHAS_SIFIVE_CLINT are derived from portasmHAS_CLINT.  See https://www.freertos.org/Using-FreeRTOS-on-RISC-V.html
+	#warning The portasmHAS_CLINT constant has been deprecated.  Please replace it with portasmHAS_MTIME and portasmHAS_SIFIVE_CLINT.  For now portasmHAS_MTIME and portasmHAS_SIFIVE_CLINT are derived from portasmHAS_CLINT.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
 	#define portasmHAS_MTIME portasmHAS_CLINT
 	#define portasmHAS_SIFIVE_CLINT portasmHAS_CLINT
 #endif
 
 #ifndef portasmHAS_MTIME
-	#error freertos_risc_v_chip_specific_extensions.h must define portasmHAS_MTIME to either 1 (MTIME clock present) or 0 (MTIME clock not present).  See https://www.freertos.org/Using-FreeRTOS-on-RISC-V.html
+	#error freertos_risc_v_chip_specific_extensions.h must define portasmHAS_MTIME to either 1 (MTIME clock present) or 0 (MTIME clock not present).  See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
 #endif
 
 #ifndef portasmHANDLE_INTERRUPT
-	#error portasmHANDLE_INTERRUPT must be defined to the function to be called to handle external/peripheral interrupts.  portasmHANDLE_INTERRUPT can be defined on the assembler command line or in the appropriate freertos_risc_v_chip_specific_extensions.h header file.  https://www.freertos.org/Using-FreeRTOS-on-RISC-V.html
+	#error portasmHANDLE_INTERRUPT must be defined to the function to be called to handle external/peripheral interrupts.  portasmHANDLE_INTERRUPT can be defined on the assembler command line or in the appropriate freertos_risc_v_chip_specific_extensions.h header file.  https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
 #endif
 
 
@@ -320,11 +320,6 @@ xPortStartFirstTask:
 
 	portasmRESTORE_ADDITIONAL_REGISTERS	/* Defined in freertos_risc_v_chip_specific_extensions.h to restore any registers unique to the RISC-V implementation. */
 
-	load_x  t0, 29 * portWORD_SIZE( sp )	/* mstatus */
-	addi t0, t0, 0x08						/* Set MIE bit so the first task starts with interrupts enabled - required as returns with ret not eret. */
-	csrrw  x0, CSR_MSTATUS, t0					/* Interrupts enabled from here! */
-
-	load_x  x5, 2 * portWORD_SIZE( sp )		/* t0 */
 	load_x  x6, 3 * portWORD_SIZE( sp )		/* t1 */
 	load_x  x7, 4 * portWORD_SIZE( sp )		/* t2 */
 	load_x  x8, 5 * portWORD_SIZE( sp )		/* s0/fp */
@@ -351,6 +346,11 @@ xPortStartFirstTask:
 	load_x  x29, 26 * portWORD_SIZE( sp )	/* t4 */
 	load_x  x30, 27 * portWORD_SIZE( sp )	/* t5 */
 	load_x  x31, 28 * portWORD_SIZE( sp )	/* t6 */
+
+	load_x  x5, 29 * portWORD_SIZE( sp )	/* Initial mstatus into x5 (t0) */
+	addi x5, x5, 0x08						/* Set MIE bit so the first task starts with interrupts enabled - required as returns with ret not eret. */
+	csrrw  x0, CSR_MSTATUS, x5					/* Interrupts enabled from here! */
+	load_x  x5, 2 * portWORD_SIZE( sp )		/* Initial x5 (t0) value. */
 	addi	sp, sp, portCONTEXT_SIZE
 	ret
 
@@ -421,6 +421,7 @@ xPortStartFirstTask:
 pxPortInitialiseStack:
 
 	csrr t0, CSR_MSTATUS					/* Obtain current mstatus value. */
+	andi t0, t0, ~0x8					/* Ensure interrupts are disabled when the stack is restored within an ISR.  Required when a task is created after the schedulre has been started, otherwise interrupts would be disabled anyway. */
 	addi t1, x0, 0x188					/* Generate the value 0x1880, which are the MPIE and MPP bits to set in mstatus. */
 	slli t1, t1, 4
 	or t0, t0, t1						/* Set MPIE and MPP bits in mstatus value. */
diff --git a/portable/IAR/RISC-V/portmacro.h b/portable/IAR/RISC-V/portmacro.h
index 4d31f4f77..d406c5423 100644
--- a/portable/IAR/RISC-V/portmacro.h
+++ b/portable/IAR/RISC-V/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -164,7 +164,7 @@ definition is found. */
 	#define configMTIME_BASE_ADDRESS 	( ( configCLINT_BASE_ADDRESS ) + 0xBFF8UL )
 	#define configMTIMECMP_BASE_ADDRESS ( ( configCLINT_BASE_ADDRESS ) + 0x4000UL )
 #elif !defined( configMTIME_BASE_ADDRESS ) || !defined( configMTIMECMP_BASE_ADDRESS )
-	#error configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS must be defined in FreeRTOSConfig.h.  Set them to zero if there is no MTIME (machine time) clock.  See https://www.freertos.org/Using-FreeRTOS-on-RISC-V.html
+	#error configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS must be defined in FreeRTOSConfig.h.  Set them to zero if there is no MTIME (machine time) clock.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
 #endif
 
 
diff --git a/portable/IAR/RL78/ISR_Support.h b/portable/IAR/RL78/ISR_Support.h
index 1be2a7b3f..7d0d8e4f1 100644
--- a/portable/IAR/RL78/ISR_Support.h
+++ b/portable/IAR/RL78/ISR_Support.h
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/IAR/RL78/port.c b/portable/IAR/RL78/port.c
index 3dbe43e61..73ff01fee 100644
--- a/portable/IAR/RL78/port.c
+++ b/portable/IAR/RL78/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/RL78/portasm.s87 b/portable/IAR/RL78/portasm.s87
index 0913fa482..979e7327d 100644
--- a/portable/IAR/RL78/portasm.s87
+++ b/portable/IAR/RL78/portasm.s87
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/IAR/RL78/portmacro.h b/portable/IAR/RL78/portmacro.h
index c6aa995bd..6ea66cefd 100644
--- a/portable/IAR/RL78/portmacro.h
+++ b/portable/IAR/RL78/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/RX100/port.c b/portable/IAR/RX100/port.c
index 083e740f3..d6645910d 100644
--- a/portable/IAR/RX100/port.c
+++ b/portable/IAR/RX100/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/RX100/port_asm.s b/portable/IAR/RX100/port_asm.s
index d6de5b7f5..1effd3d16 100644
--- a/portable/IAR/RX100/port_asm.s
+++ b/portable/IAR/RX100/port_asm.s
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/RX100/portmacro.h b/portable/IAR/RX100/portmacro.h
index 8e288e8d0..df1989675 100644
--- a/portable/IAR/RX100/portmacro.h
+++ b/portable/IAR/RX100/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/RX600/port.c b/portable/IAR/RX600/port.c
index 45a7174fd..43ca66bac 100644
--- a/portable/IAR/RX600/port.c
+++ b/portable/IAR/RX600/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/RX600/port_asm.s b/portable/IAR/RX600/port_asm.s
index 073215b91..8ab0c80dd 100644
--- a/portable/IAR/RX600/port_asm.s
+++ b/portable/IAR/RX600/port_asm.s
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/RX600/portmacro.h b/portable/IAR/RX600/portmacro.h
index 66963c975..0a48c1504 100644
--- a/portable/IAR/RX600/portmacro.h
+++ b/portable/IAR/RX600/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/RX700v3_DPFPU/port.c b/portable/IAR/RX700v3_DPFPU/port.c
new file mode 100644
index 000000000..b4f2e76fd
--- /dev/null
+++ b/portable/IAR/RX700v3_DPFPU/port.c
@@ -0,0 +1,567 @@
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ * 1 tab == 4 spaces!
+ */
+
+/*-----------------------------------------------------------
+* Implementation of functions defined in portable.h for the RXv3 DPFPU port.
+*----------------------------------------------------------*/
+
+#warning Testing for DFPU support in this port is not yet complete
+
+/* Scheduler includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+
+/* Library includes. */
+#include "string.h"
+
+/* Hardware specifics. */
+#if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
+
+    #include "platform.h"
+
+#else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
+
+    #include "iodefine.h"
+
+#endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
+
+/*-----------------------------------------------------------*/
+
+/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
+ * PSW is set with U and I set, and PM and IPL clear. */
+#define portINITIAL_PSW     ( ( StackType_t ) 0x00030000 )
+#define portINITIAL_FPSW    ( ( StackType_t ) 0x00000100 )
+#define portINITIAL_DPSW    ( ( StackType_t ) 0x00000100 )
+#define portINITIAL_DCMR    ( ( StackType_t ) 0x00000000 )
+#define portINITIAL_DECNT   ( ( StackType_t ) 0x00000001 )
+
+/* Tasks are not created with a DPFPU context, but can be given a DPFPU context
+ * after they have been created.  A variable is stored as part of the tasks context
+ * that holds portNO_DPFPU_CONTEXT if the task does not have a DPFPU context, or
+ * any other value if the task does have a DPFPU context. */
+#define portNO_DPFPU_CONTEXT    ( ( StackType_t ) 0 )
+#define portHAS_DPFPU_CONTEXT   ( ( StackType_t ) 1 )
+
+/* The space on the stack required to hold the DPFPU data registers.  This is 16
+ * 64-bit registers. */
+#define portDPFPU_DATA_REGISTER_WORDS   ( 16 * 2 )
+
+/*-----------------------------------------------------------*/
+
+/*
+ * Function to start the first task executing - written in asm code as direct
+ * access to registers is required.
+ */
+static void prvStartFirstTask( void );
+
+/*
+ * Software interrupt handler.  Performs the actual context switch (saving and
+ * restoring of registers).  Written in asm code as direct register access is
+ * required.
+ */
+__interrupt void vSoftwareInterruptISR( void );
+
+/*
+ * The tick ISR handler.  The peripheral used is configured by the application
+ * via a hook/callback function.
+ */
+__interrupt void vTickISR( void );
+
+/*-----------------------------------------------------------*/
+
+/* Saved as part of the task context.  If ulPortTaskHasDPFPUContext is non-zero
+ * then a DPFPU context must be saved and restored for the task. */
+#if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
+
+    StackType_t ulPortTaskHasDPFPUContext = portNO_DPFPU_CONTEXT;
+
+#endif /* configUSE_TASK_DPFPU_SUPPORT */
+
+/* This is accessed by the inline assembler functions so is file scope for
+ * convenience. */
+extern void * pxCurrentTCB;
+extern void vTaskSwitchContext( void );
+
+/*-----------------------------------------------------------*/
+
+/*
+ * See header file for description.
+ */
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
+{
+    /* R0 is not included as it is the stack pointer. */
+
+    *pxTopOfStack = 0x00;
+    pxTopOfStack--;
+    *pxTopOfStack = portINITIAL_PSW;
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) pxCode;
+
+    /* When debugging it can be useful if every register is set to a known
+     * value.  Otherwise code space can be saved by just setting the registers
+     * that need to be set. */
+    #ifdef USE_FULL_REGISTER_INITIALISATION
+        {
+            pxTopOfStack--;
+            *pxTopOfStack = 0xffffffff; /* r15. */
+            pxTopOfStack--;
+            *pxTopOfStack = 0xeeeeeeee;
+            pxTopOfStack--;
+            *pxTopOfStack = 0xdddddddd;
+            pxTopOfStack--;
+            *pxTopOfStack = 0xcccccccc;
+            pxTopOfStack--;
+            *pxTopOfStack = 0xbbbbbbbb;
+            pxTopOfStack--;
+            *pxTopOfStack = 0xaaaaaaaa;
+            pxTopOfStack--;
+            *pxTopOfStack = 0x99999999;
+            pxTopOfStack--;
+            *pxTopOfStack = 0x88888888;
+            pxTopOfStack--;
+            *pxTopOfStack = 0x77777777;
+            pxTopOfStack--;
+            *pxTopOfStack = 0x66666666;
+            pxTopOfStack--;
+            *pxTopOfStack = 0x55555555;
+            pxTopOfStack--;
+            *pxTopOfStack = 0x44444444;
+            pxTopOfStack--;
+            *pxTopOfStack = 0x33333333;
+            pxTopOfStack--;
+            *pxTopOfStack = 0x22222222;
+            pxTopOfStack--;
+        }
+    #else /* ifdef USE_FULL_REGISTER_INITIALISATION */
+        {
+            pxTopOfStack -= 15;
+        }
+    #endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
+
+    *pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
+    pxTopOfStack--;
+    *pxTopOfStack = portINITIAL_FPSW;
+    pxTopOfStack--;
+    *pxTopOfStack = 0x11111111; /* Accumulator 1. */
+    pxTopOfStack--;
+    *pxTopOfStack = 0x22222222; /* Accumulator 1. */
+    pxTopOfStack--;
+    *pxTopOfStack = 0x33333333; /* Accumulator 1. */
+    pxTopOfStack--;
+    *pxTopOfStack = 0x44444444; /* Accumulator 0. */
+    pxTopOfStack--;
+    *pxTopOfStack = 0x55555555; /* Accumulator 0. */
+    pxTopOfStack--;
+    *pxTopOfStack = 0x66666666; /* Accumulator 0. */
+
+    #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
+        {
+            /* The task will start without a DPFPU context.  A task that
+             * uses the DPFPU hardware must call vPortTaskUsesDPFPU() before
+             * executing any floating point instructions. */
+            pxTopOfStack--;
+            *pxTopOfStack = portNO_DPFPU_CONTEXT;
+        }
+    #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
+        {
+            /* The task will start with a DPFPU context.  Leave enough
+             * space for the registers - and ensure they are initialised if desired. */
+            #ifdef USE_FULL_REGISTER_INITIALISATION
+                {
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack = 1515.1515; /* DR15. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack = 1414.1414; /* DR14. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack = 1313.1313; /* DR13. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack = 1212.1212; /* DR12. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack = 1111.1111; /* DR11. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack = 1010.1010; /* DR10. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  909.0909; /* DR9. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  808.0808; /* DR8. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  707.0707; /* DR7. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  606.0606; /* DR6. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  505.0505; /* DR5. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  404.0404; /* DR4. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  303.0303; /* DR3. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  202.0202; /* DR2. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  101.0101; /* DR1. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack = 9876.54321;/* DR0. */
+                }
+            #else /* ifdef USE_FULL_REGISTER_INITIALISATION */
+                {
+                    pxTopOfStack -= portDPFPU_DATA_REGISTER_WORDS;
+                    memset( pxTopOfStack, 0x00, portDPFPU_DATA_REGISTER_WORDS * sizeof( StackType_t ) );
+                }
+            #endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
+            pxTopOfStack--;
+            *pxTopOfStack = portINITIAL_DECNT; /* DECNT. */
+            pxTopOfStack--;
+            *pxTopOfStack = portINITIAL_DCMR;  /* DCMR. */
+            pxTopOfStack--;
+            *pxTopOfStack = portINITIAL_DPSW;  /* DPSW. */
+        }
+    #elif ( configUSE_TASK_DPFPU_SUPPORT == 0 )
+        {
+            /* Omit DPFPU support. */
+        }
+    #else /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
+        {
+            #error Invalid configUSE_TASK_DPFPU_SUPPORT setting - configUSE_TASK_DPFPU_SUPPORT must be set to 0, 1, 2, or left undefined.
+        }
+    #endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
+
+    return pxTopOfStack;
+}
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
+
+    void vPortTaskUsesDPFPU( void )
+    {
+        /* A task is registering the fact that it needs a DPFPU context.  Set the
+         * DPFPU flag (which is saved as part of the task context). */
+        ulPortTaskHasDPFPUContext = portHAS_DPFPU_CONTEXT;
+    }
+
+#endif /* configUSE_TASK_DPFPU_SUPPORT */
+/*-----------------------------------------------------------*/
+
+BaseType_t xPortStartScheduler( void )
+{
+    extern void vApplicationSetupTimerInterrupt( void );
+
+    /* Use pxCurrentTCB just so it does not get optimised away. */
+    if( pxCurrentTCB != NULL )
+    {
+        /* Call an application function to set up the timer that will generate the
+         * tick interrupt.  This way the application can decide which peripheral to
+         * use.  A demo application is provided to show a suitable example. */
+        vApplicationSetupTimerInterrupt();
+
+        /* Enable the software interrupt. */
+        _IEN( _ICU_SWINT ) = 1;
+
+        /* Ensure the software interrupt is clear. */
+        _IR( _ICU_SWINT ) = 0;
+
+        /* Ensure the software interrupt is set to the kernel priority. */
+        _IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
+
+        /* Start the first task. */
+        prvStartFirstTask();
+    }
+
+    /* Should not get here. */
+    return pdFAIL;
+}
+/*-----------------------------------------------------------*/
+
+void vPortEndScheduler( void )
+{
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( pxCurrentTCB == NULL );
+
+    /* The following line is just to prevent the symbol getting optimised away. */
+    ( void ) vTaskSwitchContext();
+}
+/*-----------------------------------------------------------*/
+
+static void prvStartFirstTask( void )
+{
+    __asm volatile
+    (
+
+        /* When starting the scheduler there is nothing that needs moving to the
+         * interrupt stack because the function is not called from an interrupt.
+         * Just ensure the current stack is the user stack. */
+        "SETPSW		U						\n"\
+
+
+        /* Obtain the location of the stack associated with which ever task
+         * pxCurrentTCB is currently pointing to. */
+        "MOV.L		#_pxCurrentTCB, R15		\n"\
+        "MOV.L		[R15], R15				\n"\
+        "MOV.L		[R15], R0				\n"\
+
+
+        /* Restore the registers from the stack of the task pointed to by
+         * pxCurrentTCB. */
+
+        #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
+
+            /* The restored ulPortTaskHasDPFPUContext is to be zero here.
+             * So, it is never necessary to restore the DPFPU context here. */
+            "POP		R15									\n"\
+            "MOV.L		#_ulPortTaskHasDPFPUContext, R14	\n"\
+            "MOV.L		R15, [R14]							\n"\
+
+        #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
+
+            /* Restore the DPFPU context. */
+            "DPOPM.L	DPSW-DECNT				\n"\
+            "DPOPM.D	DR0-DR15				\n"\
+
+        #endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
+
+        "POP		R15						\n"\
+
+        /* Accumulator low 32 bits. */
+        "MVTACLO	R15, A0					\n"\
+        "POP		R15						\n"\
+
+        /* Accumulator high 32 bits. */
+        "MVTACHI	R15, A0					\n"\
+        "POP		R15						\n"\
+
+        /* Accumulator guard. */
+        "MVTACGU	R15, A0					\n"\
+        "POP		R15						\n"\
+
+        /* Accumulator low 32 bits. */
+        "MVTACLO	R15, A1					\n"\
+        "POP		R15						\n"\
+
+        /* Accumulator high 32 bits. */
+        "MVTACHI	R15, A1					\n"\
+        "POP		R15						\n"\
+
+        /* Accumulator guard. */
+        "MVTACGU	R15, A1					\n"\
+        "POP		R15						\n"\
+
+        /* Floating point status word. */
+        "MVTC		R15, FPSW 				\n"\
+
+        /* R1 to R15 - R0 is not included as it is the SP. */
+        "POPM		R1-R15 					\n"\
+
+        /* This pops the remaining registers. */
+        "RTE								\n"\
+        "NOP								\n"\
+        "NOP								\n"
+    );
+}
+/*-----------------------------------------------------------*/
+
+#pragma vector = VECT( ICU, SWINT )
+__interrupt void vSoftwareInterruptISR( void )
+{
+    __asm volatile
+    (
+        /* Re-enable interrupts. */
+        "SETPSW		I							\n"\
+
+
+        /* Move the data that was automatically pushed onto the interrupt stack when
+         * the interrupt occurred from the interrupt stack to the user stack.
+         *
+         * R15 is saved before it is clobbered. */
+        "PUSH.L		R15							\n"\
+
+        /* Read the user stack pointer. */
+        "MVFC		USP, R15					\n"\
+
+        /* Move the address down to the data being moved. */
+        "SUB		#12, R15					\n"\
+        "MVTC		R15, USP					\n"\
+
+        /* Copy the data across, R15, then PC, then PSW. */
+        "MOV.L		[ R0 ], [ R15 ]				\n"\
+        "MOV.L 		4[ R0 ], 4[ R15 ]			\n"\
+        "MOV.L		8[ R0 ], 8[ R15 ]			\n"\
+
+        /* Move the interrupt stack pointer to its new correct position. */
+        "ADD		#12, R0						\n"\
+
+        /* All the rest of the registers are saved directly to the user stack. */
+        "SETPSW		U							\n"\
+
+        /* Save the rest of the general registers (R15 has been saved already). */
+        "PUSHM		R1-R14						\n"\
+
+        /* Save the FPSW and accumulators. */
+        "MVFC		FPSW, R15					\n"\
+        "PUSH.L		R15							\n"\
+        "MVFACGU	#0, A1, R15					\n"\
+        "PUSH.L		R15							\n"\
+        "MVFACHI	#0, A1, R15					\n"\
+        "PUSH.L		R15							\n"\
+        "MVFACLO	#0, A1, R15					\n" /* Low order word. */ \
+        "PUSH.L		R15							\n"\
+        "MVFACGU	#0, A0, R15					\n"\
+        "PUSH.L		R15							\n"\
+        "MVFACHI	#0, A0, R15					\n"\
+        "PUSH.L		R15							\n"\
+        "MVFACLO	#0, A0, R15					\n" /* Low order word. */ \
+        "PUSH.L		R15							\n"\
+
+        #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
+
+            /* Does the task have a DPFPU context that needs saving?  If
+             * ulPortTaskHasDPFPUContext is 0 then no. */
+            "MOV.L		#_ulPortTaskHasDPFPUContext, R15	\n"\
+            "MOV.L		[R15], R15							\n"\
+            "CMP		#0, R15								\n"\
+
+            /* Save the DPFPU context, if any. */
+            "BEQ.B		__lab1						\n"\
+            "DPUSHM.D	DR0-DR15					\n"\
+            "DPUSHM.L	DPSW-DECNT					\n"\
+            "__lab1:								\n"\
+
+            /* Save ulPortTaskHasDPFPUContext itself. */
+            "PUSH.L		R15							\n"\
+
+        #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
+
+            /* Save the DPFPU context, always. */
+            "DPUSHM.D	DR0-DR15					\n"\
+            "DPUSHM.L	DPSW-DECNT					\n"\
+
+        #endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
+
+
+        /* Save the stack pointer to the TCB. */
+        "MOV.L		#_pxCurrentTCB, R15			\n"\
+        "MOV.L		[ R15 ], R15				\n"\
+        "MOV.L		R0, [ R15 ]					\n"\
+
+
+        /* Ensure the interrupt mask is set to the syscall priority while the kernel
+         * structures are being accessed. */
+        "MVTIPL		%0 							\n"\
+
+        /* Select the next task to run. */
+        "BSR.A		_vTaskSwitchContext			\n"\
+
+        /* Reset the interrupt mask as no more data structure access is required. */
+        "MVTIPL		%1							\n"\
+
+
+        /* Load the stack pointer of the task that is now selected as the Running
+         * state task from its TCB. */
+        "MOV.L		#_pxCurrentTCB,R15			\n"\
+        "MOV.L		[ R15 ], R15				\n"\
+        "MOV.L		[ R15 ], R0					\n"\
+
+
+        /* Restore the context of the new task.  The PSW (Program Status Word) and
+         * PC will be popped by the RTE instruction. */
+
+        #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
+
+            /* Is there a DPFPU context to restore?  If the restored
+             * ulPortTaskHasDPFPUContext is zero then no. */
+            "POP		R15									\n"\
+            "MOV.L		#_ulPortTaskHasDPFPUContext, R14	\n"\
+            "MOV.L		R15, [R14]							\n"\
+            "CMP		#0, R15								\n"\
+
+            /* Restore the DPFPU context, if any. */
+            "BEQ.B		__lab2						\n"\
+            "DPOPM.L	DPSW-DECNT					\n"\
+            "DPOPM.D	DR0-DR15					\n"\
+            "__lab2:								\n"\
+
+        #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
+
+            /* Restore the DPFPU context, always. */
+            "DPOPM.L	DPSW-DECNT					\n"\
+            "DPOPM.D	DR0-DR15					\n"\
+
+        #endif /* if( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
+
+        "POP		R15							\n"\
+
+        /* Accumulator low 32 bits. */
+        "MVTACLO	R15, A0						\n"\
+        "POP		R15							\n"\
+
+        /* Accumulator high 32 bits. */
+        "MVTACHI	R15, A0						\n"\
+        "POP		R15							\n"\
+
+        /* Accumulator guard. */
+        "MVTACGU	R15, A0						\n"\
+        "POP		R15							\n"\
+
+        /* Accumulator low 32 bits. */
+        "MVTACLO	R15, A1						\n"\
+        "POP		R15							\n"\
+
+        /* Accumulator high 32 bits. */
+        "MVTACHI	R15, A1						\n"\
+        "POP		R15							\n"\
+
+        /* Accumulator guard. */
+        "MVTACGU	R15, A1						\n"\
+        "POP		R15							\n"\
+        "MVTC		R15, FPSW					\n"\
+        "POPM		R1-R15						\n"\
+        "RTE									\n"\
+        "NOP									\n"\
+        "NOP									  "
+        portCDT_NO_PARSE( :: ) "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ), "i" ( configKERNEL_INTERRUPT_PRIORITY )
+    );
+}
+/*-----------------------------------------------------------*/
+
+#pragma vector = _VECT( configTICK_VECTOR )
+__interrupt void vTickISR( void )
+{
+    /* Re-enable interrupts. */
+    __enable_interrupt();
+
+    /* Increment the tick, and perform any processing the new tick value
+     * necessitates.  Ensure IPL is at the max syscall value first. */
+    __set_interrupt_level( configMAX_SYSCALL_INTERRUPT_PRIORITY );
+    {
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            taskYIELD();
+        }
+    }
+    __set_interrupt_level( configKERNEL_INTERRUPT_PRIORITY );
+}
+/*-----------------------------------------------------------*/
diff --git a/portable/IAR/RX700v3_DPFPU/portmacro.h b/portable/IAR/RX700v3_DPFPU/portmacro.h
new file mode 100644
index 000000000..aad0976ec
--- /dev/null
+++ b/portable/IAR/RX700v3_DPFPU/portmacro.h
@@ -0,0 +1,195 @@
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef PORTMACRO_H
+    #define PORTMACRO_H
+
+/* Hardware specifics. */
+    #include 
+
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
+
+/*-----------------------------------------------------------
+ * Port specific definitions.
+ *
+ * The settings in this file configure FreeRTOS correctly for the
+ * given hardware and compiler.
+ *
+ * These settings should not be altered.
+ *-----------------------------------------------------------
+ */
+
+/* When the FIT configurator or the Smart Configurator is used, platform.h has to be 
+ * used. */
+    #ifndef configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H
+        #define configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H 0
+    #endif
+
+/* If configUSE_TASK_DPFPU_SUPPORT is set to 1 (or undefined) then each task will
+ * be created without a DPFPU context, and a task must call vTaskUsesDPFPU() before
+ * making use of any DPFPU registers.  If configUSE_TASK_DPFPU_SUPPORT is set to 2 then
+ * tasks are created with a DPFPU context by default, and calling vTaskUsesDPFPU() has
+ * no effect.  If configUSE_TASK_DPFPU_SUPPORT is set to 0 then tasks never take care
+ * of any DPFPU context (even if DPFPU registers are used). */
+    #ifndef configUSE_TASK_DPFPU_SUPPORT
+        #define configUSE_TASK_DPFPU_SUPPORT 1
+    #endif
+
+/*-----------------------------------------------------------*/
+
+/* Type definitions - these are a bit legacy and not really used now, other than
+ * portSTACK_TYPE and portBASE_TYPE. */
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
+
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
+
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
+
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
+
+/*-----------------------------------------------------------*/
+
+/* Hardware specifics. */
+    #define portBYTE_ALIGNMENT    8     /* Could make four, according to manual. */
+    #define portSTACK_GROWTH      -1
+    #define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portNOP()    __no_operation()
+
+/* Yield equivalent to "*portITU_SWINTR = 0x01; ( void ) *portITU_SWINTR;"
+ * where portITU_SWINTR is the location of the software interrupt register
+ * (0x000872E0).  Don't rely on the assembler to select a register, so instead
+ * save and restore clobbered registers manually. */
+    #define portYIELD()           \
+    __asm volatile                \
+    (                             \
+        "PUSH.L	R10					\n"\
+        "MOV.L	#0x872E0, R10		\n"\
+        "MOV.B	#0x1, [R10]			\n"\
+        "CMP	[R10].UB, R10		\n"\
+        "POP    R10					\n"\
+        portCDT_NO_PARSE( ::: ) "cc"\
+    )
+
+    #define portYIELD_FROM_ISR( x )                           if( ( x ) != pdFALSE ) portYIELD()
+
+/* Workaround to reduce errors/warnings caused by e2 studio CDT's INDEXER and CODAN. */
+    #ifdef __CDT_PARSER__
+    #ifndef __asm
+    #define __asm asm
+    #endif
+    #ifndef __attribute__
+    #define __attribute__( ... )
+    #endif
+    #define portCDT_NO_PARSE( token )
+    #else
+    #define portCDT_NO_PARSE( token ) token
+    #endif
+
+/* These macros should not be called directly, but through the
+ * taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros.  An extra check is
+ * performed if configASSERT() is defined to ensure an assertion handler does not
+ * inadvertently attempt to lower the IPL when the call to assert was triggered
+ * because the IPL value was found to be above	configMAX_SYSCALL_INTERRUPT_PRIORITY
+ * when an ISR safe FreeRTOS API function was executed.  ISR safe FreeRTOS API
+ * functions are those that end in FromISR.  FreeRTOS maintains a separate
+ * interrupt API to ensure API function and interrupt entry is as fast and as
+ * simple as possible. */
+    #define portENABLE_INTERRUPTS()                           __set_interrupt_level( ( uint8_t ) 0 )
+    #ifdef configASSERT
+        #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()    configASSERT( ( __get_interrupt_level() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
+        #define portDISABLE_INTERRUPTS()                      if( __get_interrupt_level() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) __set_interrupt_level( ( uint8_t ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
+    #else
+        #define portDISABLE_INTERRUPTS()                      __set_interrupt_level( ( uint8_t ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
+    #endif
+
+/* Critical nesting counts are stored in the TCB. */
+    #define portCRITICAL_NESTING_IN_TCB    ( 1 )
+
+/* The critical nesting functions defined within tasks.c. */
+    extern void vTaskEnterCritical( void );
+    extern void vTaskExitCritical( void );
+    #define portENTER_CRITICAL()    vTaskEnterCritical()
+    #define portEXIT_CRITICAL()     vTaskExitCritical()
+
+/* As this port allows interrupt nesting... */
+    #define portSET_INTERRUPT_MASK_FROM_ISR()                              __get_interrupt_level(); portDISABLE_INTERRUPTS()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus )    __set_interrupt_level( ( uint8_t ) ( uxSavedInterruptStatus ) )
+
+/*-----------------------------------------------------------*/
+
+/* Task function macros as described on the FreeRTOS.org WEB site. */
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
+
+/*-----------------------------------------------------------*/
+
+/* If configUSE_TASK_DPFPU_SUPPORT is set to 1 (or left undefined) then tasks are
+ * created without a DPFPU context and must call vPortTaskUsesDPFPU() to give
+ * themselves a DPFPU context before using any DPFPU instructions.  If
+ * configUSE_TASK_DPFPU_SUPPORT is set to 2 then all tasks will have a DPFPU context
+ * by default. */
+    #if( configUSE_TASK_DPFPU_SUPPORT == 1 )
+        void vPortTaskUsesDPFPU( void );
+    #else
+/* Each task has a DPFPU context already, so define this function away to
+ * nothing to prevent it being called accidentally. */
+        #define vPortTaskUsesDPFPU()
+    #endif
+    #define portTASK_USES_DPFPU() vPortTaskUsesDPFPU()
+
+/* Definition to allow compatibility with existing FreeRTOS Demo using flop.c. */
+    #define portTASK_USES_FLOATING_POINT() vPortTaskUsesDPFPU()
+
+/* Prevent warnings of undefined behaviour: the order of volatile accesses is
+ * undefined - all warnings have been manually checked and are not an issue, and
+ * the warnings cannot be prevent by code changes without undesirable effects. */
+    #pragma diag_suppress=Pa082
+
+    #ifdef __cplusplus
+        }
+    #endif
+
+#endif /* PORTMACRO_H */
diff --git a/portable/IAR/RXv2/port.c b/portable/IAR/RXv2/port.c
index 4024645ac..7d924ef62 100644
--- a/portable/IAR/RXv2/port.c
+++ b/portable/IAR/RXv2/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/RXv2/port_asm.s b/portable/IAR/RXv2/port_asm.s
index 3b0d4be8f..f6d261d6e 100644
--- a/portable/IAR/RXv2/port_asm.s
+++ b/portable/IAR/RXv2/port_asm.s
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/RXv2/portmacro.h b/portable/IAR/RXv2/portmacro.h
index dd9763b92..21b7ed00a 100644
--- a/portable/IAR/RXv2/portmacro.h
+++ b/portable/IAR/RXv2/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/STR71x/ISR_Support.h b/portable/IAR/STR71x/ISR_Support.h
index 360fff6d5..c3cca9bde 100644
--- a/portable/IAR/STR71x/ISR_Support.h
+++ b/portable/IAR/STR71x/ISR_Support.h
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/IAR/STR71x/port.c b/portable/IAR/STR71x/port.c
index a2856432a..4509104fb 100644
--- a/portable/IAR/STR71x/port.c
+++ b/portable/IAR/STR71x/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/STR71x/portasm.s79 b/portable/IAR/STR71x/portasm.s79
index e67859c7f..2b922ce37 100644
--- a/portable/IAR/STR71x/portasm.s79
+++ b/portable/IAR/STR71x/portasm.s79
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/IAR/STR71x/portmacro.h b/portable/IAR/STR71x/portmacro.h
index ca2e3bac9..9c412fb6c 100644
--- a/portable/IAR/STR71x/portmacro.h
+++ b/portable/IAR/STR71x/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/STR75x/ISR_Support.h b/portable/IAR/STR75x/ISR_Support.h
index 360fff6d5..c3cca9bde 100644
--- a/portable/IAR/STR75x/ISR_Support.h
+++ b/portable/IAR/STR75x/ISR_Support.h
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/IAR/STR75x/port.c b/portable/IAR/STR75x/port.c
index 20b4a3525..e14fa0948 100644
--- a/portable/IAR/STR75x/port.c
+++ b/portable/IAR/STR75x/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/STR75x/portasm.s79 b/portable/IAR/STR75x/portasm.s79
index 935660059..faa91f003 100644
--- a/portable/IAR/STR75x/portasm.s79
+++ b/portable/IAR/STR75x/portasm.s79
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/IAR/STR75x/portmacro.h b/portable/IAR/STR75x/portmacro.h
index f9a8a1e9a..fb8e1057b 100644
--- a/portable/IAR/STR75x/portmacro.h
+++ b/portable/IAR/STR75x/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/STR91x/ISR_Support.h b/portable/IAR/STR91x/ISR_Support.h
index c4a12a2a1..9c89a41f7 100644
--- a/portable/IAR/STR91x/ISR_Support.h
+++ b/portable/IAR/STR91x/ISR_Support.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/STR91x/port.c b/portable/IAR/STR91x/port.c
index 7d4ad1d9c..05e9e2466 100644
--- a/portable/IAR/STR91x/port.c
+++ b/portable/IAR/STR91x/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/STR91x/portasm.s79 b/portable/IAR/STR91x/portasm.s79
index 4232c62cd..634cb2203 100644
--- a/portable/IAR/STR91x/portasm.s79
+++ b/portable/IAR/STR91x/portasm.s79
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/STR91x/portmacro.h b/portable/IAR/STR91x/portmacro.h
index 3f800ba76..03924dd11 100644
--- a/portable/IAR/STR91x/portmacro.h
+++ b/portable/IAR/STR91x/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/V850ES/ISR_Support.h b/portable/IAR/V850ES/ISR_Support.h
index d3822fbf5..2374d159d 100644
--- a/portable/IAR/V850ES/ISR_Support.h
+++ b/portable/IAR/V850ES/ISR_Support.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/V850ES/port.c b/portable/IAR/V850ES/port.c
index 82a36fd1e..8581a519c 100644
--- a/portable/IAR/V850ES/port.c
+++ b/portable/IAR/V850ES/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/IAR/V850ES/portasm.s85 b/portable/IAR/V850ES/portasm.s85
index f02882473..8a3ddfbfa 100644
--- a/portable/IAR/V850ES/portasm.s85
+++ b/portable/IAR/V850ES/portasm.s85
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/IAR/V850ES/portasm_Fx3.s85 b/portable/IAR/V850ES/portasm_Fx3.s85
index e0f8e8205..8a1272ab5 100644
--- a/portable/IAR/V850ES/portasm_Fx3.s85
+++ b/portable/IAR/V850ES/portasm_Fx3.s85
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/IAR/V850ES/portasm_Hx2.s85 b/portable/IAR/V850ES/portasm_Hx2.s85
index 81bd08d17..c873e17aa 100644
--- a/portable/IAR/V850ES/portasm_Hx2.s85
+++ b/portable/IAR/V850ES/portasm_Hx2.s85
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/IAR/V850ES/portmacro.h b/portable/IAR/V850ES/portmacro.h
index 0b661e82a..42b081fa5 100644
--- a/portable/IAR/V850ES/portmacro.h
+++ b/portable/IAR/V850ES/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/MPLAB/PIC18F/port.c b/portable/MPLAB/PIC18F/port.c
index 6f76d4623..b5a2f37b1 100644
--- a/portable/MPLAB/PIC18F/port.c
+++ b/portable/MPLAB/PIC18F/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/MPLAB/PIC18F/portmacro.h b/portable/MPLAB/PIC18F/portmacro.h
index 0b4212605..540fd4208 100644
--- a/portable/MPLAB/PIC18F/portmacro.h
+++ b/portable/MPLAB/PIC18F/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/MPLAB/PIC24_dsPIC/port.c b/portable/MPLAB/PIC24_dsPIC/port.c
index 62f621c71..413146298 100644
--- a/portable/MPLAB/PIC24_dsPIC/port.c
+++ b/portable/MPLAB/PIC24_dsPIC/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S b/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S
index 43c39f069..8dc18cc5f 100644
--- a/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S
+++ b/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S b/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S
index da48e54db..05a205063 100644
--- a/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S
+++ b/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/MPLAB/PIC24_dsPIC/portmacro.h b/portable/MPLAB/PIC24_dsPIC/portmacro.h
index ece9cd916..f36ec243a 100644
--- a/portable/MPLAB/PIC24_dsPIC/portmacro.h
+++ b/portable/MPLAB/PIC24_dsPIC/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/MPLAB/PIC32MEC14xx/ISR_Support.h b/portable/MPLAB/PIC32MEC14xx/ISR_Support.h
index 41170d368..a1fac5b3d 100644
--- a/portable/MPLAB/PIC32MEC14xx/ISR_Support.h
+++ b/portable/MPLAB/PIC32MEC14xx/ISR_Support.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/MPLAB/PIC32MEC14xx/port.c b/portable/MPLAB/PIC32MEC14xx/port.c
index c2d837fc4..ac138a644 100644
--- a/portable/MPLAB/PIC32MEC14xx/port.c
+++ b/portable/MPLAB/PIC32MEC14xx/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/MPLAB/PIC32MEC14xx/port_asm.S b/portable/MPLAB/PIC32MEC14xx/port_asm.S
index e8fb4fcdc..30ee8f514 100644
--- a/portable/MPLAB/PIC32MEC14xx/port_asm.S
+++ b/portable/MPLAB/PIC32MEC14xx/port_asm.S
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/MPLAB/PIC32MEC14xx/portmacro.h b/portable/MPLAB/PIC32MEC14xx/portmacro.h
index f4a30b044..d5f04bd67 100644
--- a/portable/MPLAB/PIC32MEC14xx/portmacro.h
+++ b/portable/MPLAB/PIC32MEC14xx/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/MPLAB/PIC32MX/ISR_Support.h b/portable/MPLAB/PIC32MX/ISR_Support.h
index 1dab513e5..57c63bd33 100644
--- a/portable/MPLAB/PIC32MX/ISR_Support.h
+++ b/portable/MPLAB/PIC32MX/ISR_Support.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/MPLAB/PIC32MX/port.c b/portable/MPLAB/PIC32MX/port.c
index 8ed86eb08..fa5c3d414 100644
--- a/portable/MPLAB/PIC32MX/port.c
+++ b/portable/MPLAB/PIC32MX/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/MPLAB/PIC32MX/port_asm.S b/portable/MPLAB/PIC32MX/port_asm.S
index 1e6c76685..e2a07003c 100644
--- a/portable/MPLAB/PIC32MX/port_asm.S
+++ b/portable/MPLAB/PIC32MX/port_asm.S
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/MPLAB/PIC32MX/portmacro.h b/portable/MPLAB/PIC32MX/portmacro.h
index a578e5859..4ca9af796 100644
--- a/portable/MPLAB/PIC32MX/portmacro.h
+++ b/portable/MPLAB/PIC32MX/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/MPLAB/PIC32MZ/ISR_Support.h b/portable/MPLAB/PIC32MZ/ISR_Support.h
index f0c2688f0..bc81655fc 100644
--- a/portable/MPLAB/PIC32MZ/ISR_Support.h
+++ b/portable/MPLAB/PIC32MZ/ISR_Support.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/MPLAB/PIC32MZ/port.c b/portable/MPLAB/PIC32MZ/port.c
index 028d35be3..275e52838 100644
--- a/portable/MPLAB/PIC32MZ/port.c
+++ b/portable/MPLAB/PIC32MZ/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/MPLAB/PIC32MZ/port_asm.S b/portable/MPLAB/PIC32MZ/port_asm.S
index ac83332a6..0bcc29127 100644
--- a/portable/MPLAB/PIC32MZ/port_asm.S
+++ b/portable/MPLAB/PIC32MZ/port_asm.S
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/MPLAB/PIC32MZ/portmacro.h b/portable/MPLAB/PIC32MZ/portmacro.h
index 65843cf54..278f4ad94 100644
--- a/portable/MPLAB/PIC32MZ/portmacro.h
+++ b/portable/MPLAB/PIC32MZ/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/MSVC-MingW/port.c b/portable/MSVC-MingW/port.c
index 982ef0da3..5a6446c8d 100644
--- a/portable/MSVC-MingW/port.c
+++ b/portable/MSVC-MingW/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/MSVC-MingW/portmacro.h b/portable/MSVC-MingW/portmacro.h
index 91a8a0a15..03cd40e5d 100644
--- a/portable/MSVC-MingW/portmacro.h
+++ b/portable/MSVC-MingW/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -28,8 +28,8 @@
 #ifndef PORTMACRO_H
 #define PORTMACRO_H
 
-#include 
-#include 
+#include 
+#include 
 
 /******************************************************************************
 	Defines
diff --git a/portable/MemMang/ReadMe.url b/portable/MemMang/ReadMe.url
index b04bfe3e5..4d2d04429 100644
--- a/portable/MemMang/ReadMe.url
+++ b/portable/MemMang/ReadMe.url
@@ -1,5 +1,5 @@
 [{000214A0-0000-0000-C000-000000000046}]
 Prop3=19,2
 [InternetShortcut]
-URL=http://www.freertos.org/a00111.html
+URL=https://www.FreeRTOS.org/a00111.html
 IDList=
diff --git a/portable/MemMang/heap_1.c b/portable/MemMang/heap_1.c
index ec29a131a..ece7da5ce 100644
--- a/portable/MemMang/heap_1.c
+++ b/portable/MemMang/heap_1.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -31,13 +31,13 @@
  * implementation does NOT allow allocated memory to be freed again.
  *
  * See heap_2.c, heap_3.c and heap_4.c for alternative implementations, and the
- * memory management pages of http://www.FreeRTOS.org for more information.
+ * memory management pages of https://www.FreeRTOS.org for more information.
  */
 #include 
 
 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
-all the API functions to use the MPU wrappers.  That should only be done when
-task.h is included from an application file. */
+ * all the API functions to use the MPU wrappers.  That should only be done when
+ * task.h is included from an application file. */
 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
 #include "FreeRTOS.h"
@@ -45,20 +45,21 @@ task.h is included from an application file. */
 
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 )
-	#error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 0 )
+    #error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0
 #endif
 
 /* A few bytes might be lost to byte aligning the heap start address. */
-#define configADJUSTED_HEAP_SIZE	( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT )
+#define configADJUSTED_HEAP_SIZE    ( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT )
 
 /* Allocate the memory for the heap. */
-#if( configAPPLICATION_ALLOCATED_HEAP == 1 )
-	/* The application writer has already defined the array used for the RTOS
-	heap - probably so it can be placed in a special segment or address. */
-	extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
+#if ( configAPPLICATION_ALLOCATED_HEAP == 1 )
+
+/* The application writer has already defined the array used for the RTOS
+* heap - probably so it can be placed in a special segment or address. */
+    extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
 #else
-	static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
+    static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
 #endif /* configAPPLICATION_ALLOCATED_HEAP */
 
 /* Index into the ucHeap array. */
@@ -66,81 +67,78 @@ static size_t xNextFreeByte = ( size_t ) 0;
 
 /*-----------------------------------------------------------*/
 
-void *pvPortMalloc( size_t xWantedSize )
+void * pvPortMalloc( size_t xWantedSize )
 {
-void *pvReturn = NULL;
-static uint8_t *pucAlignedHeap = NULL;
+    void * pvReturn = NULL;
+    static uint8_t * pucAlignedHeap = NULL;
 
-	/* Ensure that blocks are always aligned to the required number of bytes. */
-	#if( portBYTE_ALIGNMENT != 1 )
-	{
-		if( xWantedSize & portBYTE_ALIGNMENT_MASK )
-		{
-			/* Byte alignment required. */
-			xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
-		}
-	}
-	#endif
+    /* Ensure that blocks are always aligned to the required number of bytes. */
+    #if ( portBYTE_ALIGNMENT != 1 )
+        {
+            if( xWantedSize & portBYTE_ALIGNMENT_MASK )
+            {
+                /* Byte alignment required. */
+                xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
+            }
+        }
+    #endif
 
-	vTaskSuspendAll();
-	{
-		if( pucAlignedHeap == NULL )
-		{
-			/* Ensure the heap starts on a correctly aligned boundary. */
-			pucAlignedHeap = ( uint8_t * ) ( ( ( portPOINTER_SIZE_TYPE ) &ucHeap[ portBYTE_ALIGNMENT ] ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) );
-		}
+    vTaskSuspendAll();
+    {
+        if( pucAlignedHeap == NULL )
+        {
+            /* Ensure the heap starts on a correctly aligned boundary. */
+            pucAlignedHeap = ( uint8_t * ) ( ( ( portPOINTER_SIZE_TYPE ) & ucHeap[ portBYTE_ALIGNMENT ] ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) );
+        }
 
-		/* Check there is enough room left for the allocation. */
-		if( ( ( xNextFreeByte + xWantedSize ) < configADJUSTED_HEAP_SIZE ) &&
-			( ( xNextFreeByte + xWantedSize ) > xNextFreeByte )	)/* Check for overflow. */
-		{
-			/* Return the next free byte then increment the index past this
-			block. */
-			pvReturn = pucAlignedHeap + xNextFreeByte;
-			xNextFreeByte += xWantedSize;
-		}
+        /* Check there is enough room left for the allocation. */
+        if( ( ( xNextFreeByte + xWantedSize ) < configADJUSTED_HEAP_SIZE ) &&
+            ( ( xNextFreeByte + xWantedSize ) > xNextFreeByte ) ) /* Check for overflow. */
+        {
+            /* Return the next free byte then increment the index past this
+             * block. */
+            pvReturn = pucAlignedHeap + xNextFreeByte;
+            xNextFreeByte += xWantedSize;
+        }
 
-		traceMALLOC( pvReturn, xWantedSize );
-	}
-	( void ) xTaskResumeAll();
+        traceMALLOC( pvReturn, xWantedSize );
+    }
+    ( void ) xTaskResumeAll();
 
-	#if( configUSE_MALLOC_FAILED_HOOK == 1 )
-	{
-		if( pvReturn == NULL )
-		{
-			extern void vApplicationMallocFailedHook( void );
-			vApplicationMallocFailedHook();
-		}
-	}
-	#endif
+    #if ( configUSE_MALLOC_FAILED_HOOK == 1 )
+        {
+            if( pvReturn == NULL )
+            {
+                extern void vApplicationMallocFailedHook( void );
+                vApplicationMallocFailedHook();
+            }
+        }
+    #endif
 
-	return pvReturn;
+    return pvReturn;
 }
 /*-----------------------------------------------------------*/
 
-void vPortFree( void *pv )
+void vPortFree( void * pv )
 {
-	/* Memory cannot be freed using this scheme.  See heap_2.c, heap_3.c and
-	heap_4.c for alternative implementations, and the memory management pages of
-	http://www.FreeRTOS.org for more information. */
-	( void ) pv;
+    /* Memory cannot be freed using this scheme.  See heap_2.c, heap_3.c and
+     * heap_4.c for alternative implementations, and the memory management pages of
+     * https://www.FreeRTOS.org for more information. */
+    ( void ) pv;
 
-	/* Force an assert as it is invalid to call this function. */
-	configASSERT( pv == NULL );
+    /* Force an assert as it is invalid to call this function. */
+    configASSERT( pv == NULL );
 }
 /*-----------------------------------------------------------*/
 
 void vPortInitialiseBlocks( void )
 {
-	/* Only required when static memory is not cleared. */
-	xNextFreeByte = ( size_t ) 0;
+    /* Only required when static memory is not cleared. */
+    xNextFreeByte = ( size_t ) 0;
 }
 /*-----------------------------------------------------------*/
 
 size_t xPortGetFreeHeapSize( void )
 {
-	return ( configADJUSTED_HEAP_SIZE - xNextFreeByte );
+    return( configADJUSTED_HEAP_SIZE - xNextFreeByte );
 }
-
-
-
diff --git a/portable/MemMang/heap_2.c b/portable/MemMang/heap_2.c
index 5ca61c664..ca4d8a73b 100644
--- a/portable/MemMang/heap_2.c
+++ b/portable/MemMang/heap_2.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -32,13 +32,13 @@
  * an equivalent that does combine adjacent blocks into single larger blocks.
  *
  * See heap_1.c, heap_3.c and heap_4.c for alternative implementations, and the
- * memory management pages of http://www.FreeRTOS.org for more information.
+ * memory management pages of https://www.FreeRTOS.org for more information.
  */
 #include 
 
 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
-all the API functions to use the MPU wrappers.  That should only be done when
-task.h is included from an application file. */
+ * all the API functions to use the MPU wrappers.  That should only be done when
+ * task.h is included from an application file. */
 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
 #include "FreeRTOS.h"
@@ -46,12 +46,12 @@ task.h is included from an application file. */
 
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 )
-	#error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 0 )
+    #error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0
 #endif
 
 /* A few bytes might be lost to byte aligning the heap start address. */
-#define configADJUSTED_HEAP_SIZE	( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT )
+#define configADJUSTED_HEAP_SIZE    ( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT )
 
 /*
  * Initialises the heap structures before their first use.
@@ -59,32 +59,33 @@ task.h is included from an application file. */
 static void prvHeapInit( void );
 
 /* Allocate the memory for the heap. */
-#if( configAPPLICATION_ALLOCATED_HEAP == 1 )
-	/* The application writer has already defined the array used for the RTOS
-	heap - probably so it can be placed in a special segment or address. */
-	extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
+#if ( configAPPLICATION_ALLOCATED_HEAP == 1 )
+
+/* The application writer has already defined the array used for the RTOS
+* heap - probably so it can be placed in a special segment or address. */
+    extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
 #else
-	static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
+    static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
 #endif /* configAPPLICATION_ALLOCATED_HEAP */
 
 
 /* Define the linked list structure.  This is used to link free blocks in order
-of their size. */
+ * of their size. */
 typedef struct A_BLOCK_LINK
 {
-	struct A_BLOCK_LINK *pxNextFreeBlock;	/*<< The next free block in the list. */
-	size_t xBlockSize;						/*<< The size of the free block. */
+    struct A_BLOCK_LINK * pxNextFreeBlock; /*<< The next free block in the list. */
+    size_t xBlockSize;                     /*<< The size of the free block. */
 } BlockLink_t;
 
 
-static const uint16_t heapSTRUCT_SIZE	= ( ( sizeof ( BlockLink_t ) + ( portBYTE_ALIGNMENT - 1 ) ) & ~portBYTE_ALIGNMENT_MASK );
-#define heapMINIMUM_BLOCK_SIZE	( ( size_t ) ( heapSTRUCT_SIZE * 2 ) )
+static const uint16_t heapSTRUCT_SIZE = ( ( sizeof( BlockLink_t ) + ( portBYTE_ALIGNMENT - 1 ) ) & ~portBYTE_ALIGNMENT_MASK );
+#define heapMINIMUM_BLOCK_SIZE    ( ( size_t ) ( heapSTRUCT_SIZE * 2 ) )
 
 /* Create a couple of list links to mark the start and end of the list. */
 static BlockLink_t xStart, xEnd;
 
 /* Keeps track of the number of free bytes remaining, but says nothing about
-fragmentation. */
+ * fragmentation. */
 static size_t xFreeBytesRemaining = configADJUSTED_HEAP_SIZE;
 
 /* STATIC FUNCTIONS ARE DEFINED AS MACROS TO MINIMIZE THE FUNCTION CALL DEPTH. */
@@ -94,179 +95,180 @@ static size_t xFreeBytesRemaining = configADJUSTED_HEAP_SIZE;
  * the block.  Small blocks at the start of the list and large blocks at the end
  * of the list.
  */
-#define prvInsertBlockIntoFreeList( pxBlockToInsert )								\
-{																					\
-BlockLink_t *pxIterator;															\
-size_t xBlockSize;																	\
-																					\
-	xBlockSize = pxBlockToInsert->xBlockSize;										\
-																					\
-	/* Iterate through the list until a block is found that has a larger size */	\
-	/* than the block we are inserting. */											\
-	for( pxIterator = &xStart; pxIterator->pxNextFreeBlock->xBlockSize < xBlockSize; pxIterator = pxIterator->pxNextFreeBlock )	\
-	{																				\
-		/* There is nothing to do here - just iterate to the correct position. */	\
-	}																				\
-																					\
-	/* Update the list to include the block being inserted in the correct */		\
-	/* position. */																	\
-	pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;					\
-	pxIterator->pxNextFreeBlock = pxBlockToInsert;									\
+#define prvInsertBlockIntoFreeList( pxBlockToInsert )                                                                               \
+    {                                                                                                                               \
+        BlockLink_t * pxIterator;                                                                                                   \
+        size_t xBlockSize;                                                                                                          \
+                                                                                                                                    \
+        xBlockSize = pxBlockToInsert->xBlockSize;                                                                                   \
+                                                                                                                                    \
+        /* Iterate through the list until a block is found that has a larger size */                                                \
+        /* than the block we are inserting. */                                                                                      \
+        for( pxIterator = &xStart; pxIterator->pxNextFreeBlock->xBlockSize < xBlockSize; pxIterator = pxIterator->pxNextFreeBlock ) \
+        {                                                                                                                           \
+            /* There is nothing to do here - just iterate to the correct position. */                                               \
+        }                                                                                                                           \
+                                                                                                                                    \
+        /* Update the list to include the block being inserted in the correct */                                                    \
+        /* position. */                                                                                                             \
+        pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;                                                             \
+        pxIterator->pxNextFreeBlock = pxBlockToInsert;                                                                              \
+    }
+/*-----------------------------------------------------------*/
+
+void * pvPortMalloc( size_t xWantedSize )
+{
+    BlockLink_t * pxBlock, * pxPreviousBlock, * pxNewBlockLink;
+    static BaseType_t xHeapHasBeenInitialised = pdFALSE;
+    void * pvReturn = NULL;
+
+    vTaskSuspendAll();
+    {
+        /* If this is the first call to malloc then the heap will require
+         * initialisation to setup the list of free blocks. */
+        if( xHeapHasBeenInitialised == pdFALSE )
+        {
+            prvHeapInit();
+            xHeapHasBeenInitialised = pdTRUE;
+        }
+
+        /* The wanted size is increased so it can contain a BlockLink_t
+         * structure in addition to the requested amount of bytes. */
+        if( xWantedSize > 0 )
+        {
+            xWantedSize += heapSTRUCT_SIZE;
+
+            /* Ensure that blocks are always aligned to the required number of bytes. */
+            if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0 )
+            {
+                /* Byte alignment required. */
+                xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
+            }
+        }
+
+        if( ( xWantedSize > 0 ) && ( xWantedSize < configADJUSTED_HEAP_SIZE ) )
+        {
+            /* Blocks are stored in byte order - traverse the list from the start
+             * (smallest) block until one of adequate size is found. */
+            pxPreviousBlock = &xStart;
+            pxBlock = xStart.pxNextFreeBlock;
+
+            while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
+            {
+                pxPreviousBlock = pxBlock;
+                pxBlock = pxBlock->pxNextFreeBlock;
+            }
+
+            /* If we found the end marker then a block of adequate size was not found. */
+            if( pxBlock != &xEnd )
+            {
+                /* Return the memory space - jumping over the BlockLink_t structure
+                 * at its start. */
+                pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + heapSTRUCT_SIZE );
+
+                /* This block is being returned for use so must be taken out of the
+                 * list of free blocks. */
+                pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
+
+                /* If the block is larger than required it can be split into two. */
+                if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
+                {
+                    /* This block is to be split into two.  Create a new block
+                     * following the number of bytes requested. The void cast is
+                     * used to prevent byte alignment warnings from the compiler. */
+                    pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
+
+                    /* Calculate the sizes of two blocks split from the single
+                     * block. */
+                    pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
+                    pxBlock->xBlockSize = xWantedSize;
+
+                    /* Insert the new block into the list of free blocks. */
+                    prvInsertBlockIntoFreeList( ( pxNewBlockLink ) );
+                }
+
+                xFreeBytesRemaining -= pxBlock->xBlockSize;
+            }
+        }
+
+        traceMALLOC( pvReturn, xWantedSize );
+    }
+    ( void ) xTaskResumeAll();
+
+    #if ( configUSE_MALLOC_FAILED_HOOK == 1 )
+        {
+            if( pvReturn == NULL )
+            {
+                extern void vApplicationMallocFailedHook( void );
+                vApplicationMallocFailedHook();
+            }
+        }
+    #endif
+
+    return pvReturn;
 }
 /*-----------------------------------------------------------*/
 
-void *pvPortMalloc( size_t xWantedSize )
+void vPortFree( void * pv )
 {
-BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
-static BaseType_t xHeapHasBeenInitialised = pdFALSE;
-void *pvReturn = NULL;
+    uint8_t * puc = ( uint8_t * ) pv;
+    BlockLink_t * pxLink;
 
-	vTaskSuspendAll();
-	{
-		/* If this is the first call to malloc then the heap will require
-		initialisation to setup the list of free blocks. */
-		if( xHeapHasBeenInitialised == pdFALSE )
-		{
-			prvHeapInit();
-			xHeapHasBeenInitialised = pdTRUE;
-		}
+    if( pv != NULL )
+    {
+        /* The memory being freed will have an BlockLink_t structure immediately
+         * before it. */
+        puc -= heapSTRUCT_SIZE;
 
-		/* The wanted size is increased so it can contain a BlockLink_t
-		structure in addition to the requested amount of bytes. */
-		if( xWantedSize > 0 )
-		{
-			xWantedSize += heapSTRUCT_SIZE;
+        /* This unexpected casting is to keep some compilers from issuing
+         * byte alignment warnings. */
+        pxLink = ( void * ) puc;
 
-			/* Ensure that blocks are always aligned to the required number of bytes. */
-			if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0 )
-			{
-				/* Byte alignment required. */
-				xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
-			}
-		}
-
-		if( ( xWantedSize > 0 ) && ( xWantedSize < configADJUSTED_HEAP_SIZE ) )
-		{
-			/* Blocks are stored in byte order - traverse the list from the start
-			(smallest) block until one of adequate size is found. */
-			pxPreviousBlock = &xStart;
-			pxBlock = xStart.pxNextFreeBlock;
-			while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
-			{
-				pxPreviousBlock = pxBlock;
-				pxBlock = pxBlock->pxNextFreeBlock;
-			}
-
-			/* If we found the end marker then a block of adequate size was not found. */
-			if( pxBlock != &xEnd )
-			{
-				/* Return the memory space - jumping over the BlockLink_t structure
-				at its start. */
-				pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + heapSTRUCT_SIZE );
-
-				/* This block is being returned for use so must be taken out of the
-				list of free blocks. */
-				pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
-
-				/* If the block is larger than required it can be split into two. */
-				if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
-				{
-					/* This block is to be split into two.  Create a new block
-					following the number of bytes requested. The void cast is
-					used to prevent byte alignment warnings from the compiler. */
-					pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
-
-					/* Calculate the sizes of two blocks split from the single
-					block. */
-					pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
-					pxBlock->xBlockSize = xWantedSize;
-
-					/* Insert the new block into the list of free blocks. */
-					prvInsertBlockIntoFreeList( ( pxNewBlockLink ) );
-				}
-
-				xFreeBytesRemaining -= pxBlock->xBlockSize;
-			}
-		}
-
-		traceMALLOC( pvReturn, xWantedSize );
-	}
-	( void ) xTaskResumeAll();
-
-	#if( configUSE_MALLOC_FAILED_HOOK == 1 )
-	{
-		if( pvReturn == NULL )
-		{
-			extern void vApplicationMallocFailedHook( void );
-			vApplicationMallocFailedHook();
-		}
-	}
-	#endif
-
-	return pvReturn;
-}
-/*-----------------------------------------------------------*/
-
-void vPortFree( void *pv )
-{
-uint8_t *puc = ( uint8_t * ) pv;
-BlockLink_t *pxLink;
-
-	if( pv != NULL )
-	{
-		/* The memory being freed will have an BlockLink_t structure immediately
-		before it. */
-		puc -= heapSTRUCT_SIZE;
-
-		/* This unexpected casting is to keep some compilers from issuing
-		byte alignment warnings. */
-		pxLink = ( void * ) puc;
-
-		vTaskSuspendAll();
-		{
-			/* Add this block to the list of free blocks. */
-			prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
-			xFreeBytesRemaining += pxLink->xBlockSize;
-			traceFREE( pv, pxLink->xBlockSize );
-		}
-		( void ) xTaskResumeAll();
-	}
+        vTaskSuspendAll();
+        {
+            /* Add this block to the list of free blocks. */
+            prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
+            xFreeBytesRemaining += pxLink->xBlockSize;
+            traceFREE( pv, pxLink->xBlockSize );
+        }
+        ( void ) xTaskResumeAll();
+    }
 }
 /*-----------------------------------------------------------*/
 
 size_t xPortGetFreeHeapSize( void )
 {
-	return xFreeBytesRemaining;
+    return xFreeBytesRemaining;
 }
 /*-----------------------------------------------------------*/
 
 void vPortInitialiseBlocks( void )
 {
-	/* This just exists to keep the linker quiet. */
+    /* This just exists to keep the linker quiet. */
 }
 /*-----------------------------------------------------------*/
 
 static void prvHeapInit( void )
 {
-BlockLink_t *pxFirstFreeBlock;
-uint8_t *pucAlignedHeap;
+    BlockLink_t * pxFirstFreeBlock;
+    uint8_t * pucAlignedHeap;
 
-	/* Ensure the heap starts on a correctly aligned boundary. */
-	pucAlignedHeap = ( uint8_t * ) ( ( ( portPOINTER_SIZE_TYPE ) &ucHeap[ portBYTE_ALIGNMENT ] ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) );
+    /* Ensure the heap starts on a correctly aligned boundary. */
+    pucAlignedHeap = ( uint8_t * ) ( ( ( portPOINTER_SIZE_TYPE ) & ucHeap[ portBYTE_ALIGNMENT ] ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) );
 
-	/* xStart is used to hold a pointer to the first item in the list of free
-	blocks.  The void cast is used to prevent compiler warnings. */
-	xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
-	xStart.xBlockSize = ( size_t ) 0;
+    /* xStart is used to hold a pointer to the first item in the list of free
+     * blocks.  The void cast is used to prevent compiler warnings. */
+    xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
+    xStart.xBlockSize = ( size_t ) 0;
 
-	/* xEnd is used to mark the end of the list of free blocks. */
-	xEnd.xBlockSize = configADJUSTED_HEAP_SIZE;
-	xEnd.pxNextFreeBlock = NULL;
+    /* xEnd is used to mark the end of the list of free blocks. */
+    xEnd.xBlockSize = configADJUSTED_HEAP_SIZE;
+    xEnd.pxNextFreeBlock = NULL;
 
-	/* To start with there is a single free block that is sized to take up the
-	entire heap space. */
-	pxFirstFreeBlock = ( void * ) pucAlignedHeap;
-	pxFirstFreeBlock->xBlockSize = configADJUSTED_HEAP_SIZE;
-	pxFirstFreeBlock->pxNextFreeBlock = &xEnd;
+    /* To start with there is a single free block that is sized to take up the
+     * entire heap space. */
+    pxFirstFreeBlock = ( void * ) pucAlignedHeap;
+    pxFirstFreeBlock->xBlockSize = configADJUSTED_HEAP_SIZE;
+    pxFirstFreeBlock->pxNextFreeBlock = &xEnd;
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/MemMang/heap_3.c b/portable/MemMang/heap_3.c
index 511477558..718a8c88c 100644
--- a/portable/MemMang/heap_3.c
+++ b/portable/MemMang/heap_3.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -34,14 +34,14 @@
  * a heap memory area.
  *
  * See heap_1.c, heap_2.c and heap_4.c for alternative implementations, and the
- * memory management pages of http://www.FreeRTOS.org for more information.
+ * memory management pages of https://www.FreeRTOS.org for more information.
  */
 
 #include 
 
 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
-all the API functions to use the MPU wrappers.  That should only be done when
-task.h is included from an application file. */
+ * all the API functions to use the MPU wrappers.  That should only be done when
+ * task.h is included from an application file. */
 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
 #include "FreeRTOS.h"
@@ -49,49 +49,46 @@ task.h is included from an application file. */
 
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 )
-	#error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 0 )
+    #error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0
 #endif
 
 /*-----------------------------------------------------------*/
 
-void *pvPortMalloc( size_t xWantedSize )
+void * pvPortMalloc( size_t xWantedSize )
 {
-void *pvReturn;
+    void * pvReturn;
 
-	vTaskSuspendAll();
-	{
-		pvReturn = malloc( xWantedSize );
-		traceMALLOC( pvReturn, xWantedSize );
-	}
-	( void ) xTaskResumeAll();
+    vTaskSuspendAll();
+    {
+        pvReturn = malloc( xWantedSize );
+        traceMALLOC( pvReturn, xWantedSize );
+    }
+    ( void ) xTaskResumeAll();
 
-	#if( configUSE_MALLOC_FAILED_HOOK == 1 )
-	{
-		if( pvReturn == NULL )
-		{
-			extern void vApplicationMallocFailedHook( void );
-			vApplicationMallocFailedHook();
-		}
-	}
-	#endif
+    #if ( configUSE_MALLOC_FAILED_HOOK == 1 )
+        {
+            if( pvReturn == NULL )
+            {
+                extern void vApplicationMallocFailedHook( void );
+                vApplicationMallocFailedHook();
+            }
+        }
+    #endif
 
-	return pvReturn;
+    return pvReturn;
 }
 /*-----------------------------------------------------------*/
 
-void vPortFree( void *pv )
+void vPortFree( void * pv )
 {
-	if( pv )
-	{
-		vTaskSuspendAll();
-		{
-			free( pv );
-			traceFREE( pv, 0 );
-		}
-		( void ) xTaskResumeAll();
-	}
+    if( pv )
+    {
+        vTaskSuspendAll();
+        {
+            free( pv );
+            traceFREE( pv, 0 );
+        }
+        ( void ) xTaskResumeAll();
+    }
 }
-
-
-
diff --git a/portable/MemMang/heap_4.c b/portable/MemMang/heap_4.c
index ade9e4782..8008f2706 100644
--- a/portable/MemMang/heap_4.c
+++ b/portable/MemMang/heap_4.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,10 +19,9 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*
@@ -31,13 +30,13 @@
  * limits memory fragmentation.
  *
  * See heap_1.c, heap_2.c and heap_3.c for alternative implementations, and the
- * memory management pages of http://www.FreeRTOS.org for more information.
+ * memory management pages of https://www.FreeRTOS.org for more information.
  */
 #include 
 
 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
-all the API functions to use the MPU wrappers.  That should only be done when
-task.h is included from an application file. */
+ * all the API functions to use the MPU wrappers.  That should only be done when
+ * task.h is included from an application file. */
 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
 #include "FreeRTOS.h"
@@ -45,31 +44,32 @@ task.h is included from an application file. */
 
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 )
-	#error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 0 )
+    #error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0
 #endif
 
 /* Block sizes must not get too small. */
-#define heapMINIMUM_BLOCK_SIZE	( ( size_t ) ( xHeapStructSize << 1 ) )
+#define heapMINIMUM_BLOCK_SIZE    ( ( size_t ) ( xHeapStructSize << 1 ) )
 
 /* Assumes 8bit bytes! */
-#define heapBITS_PER_BYTE		( ( size_t ) 8 )
+#define heapBITS_PER_BYTE         ( ( size_t ) 8 )
 
 /* Allocate the memory for the heap. */
-#if( configAPPLICATION_ALLOCATED_HEAP == 1 )
-	/* The application writer has already defined the array used for the RTOS
-	heap - probably so it can be placed in a special segment or address. */
-	extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
+#if ( configAPPLICATION_ALLOCATED_HEAP == 1 )
+
+/* The application writer has already defined the array used for the RTOS
+* heap - probably so it can be placed in a special segment or address. */
+    extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
 #else
-	static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
+    PRIVILEGED_DATA static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
 #endif /* configAPPLICATION_ALLOCATED_HEAP */
 
 /* Define the linked list structure.  This is used to link free blocks in order
-of their memory address. */
+ * of their memory address. */
 typedef struct A_BLOCK_LINK
 {
-	struct A_BLOCK_LINK *pxNextFreeBlock;	/*<< The next free block in the list. */
-	size_t xBlockSize;						/*<< The size of the free block. */
+    struct A_BLOCK_LINK * pxNextFreeBlock; /*<< The next free block in the list. */
+    size_t xBlockSize;                     /*<< The size of the free block. */
 } BlockLink_t;
 
 /*-----------------------------------------------------------*/
@@ -80,413 +80,415 @@ typedef struct A_BLOCK_LINK
  * the block in front it and/or the block behind it if the memory blocks are
  * adjacent to each other.
  */
-static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert );
+static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) PRIVILEGED_FUNCTION;
 
 /*
  * Called automatically to setup the required heap structures the first time
  * pvPortMalloc() is called.
  */
-static void prvHeapInit( void );
+static void prvHeapInit( void ) PRIVILEGED_FUNCTION;
 
 /*-----------------------------------------------------------*/
 
 /* The size of the structure placed at the beginning of each allocated memory
-block must by correctly byte aligned. */
-static const size_t xHeapStructSize	= ( sizeof( BlockLink_t ) + ( ( size_t ) ( portBYTE_ALIGNMENT - 1 ) ) ) & ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
+ * block must by correctly byte aligned. */
+static const size_t xHeapStructSize = ( sizeof( BlockLink_t ) + ( ( size_t ) ( portBYTE_ALIGNMENT - 1 ) ) ) & ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
 
 /* Create a couple of list links to mark the start and end of the list. */
-static BlockLink_t xStart, *pxEnd = NULL;
+PRIVILEGED_DATA static BlockLink_t xStart, * pxEnd = NULL;
 
 /* Keeps track of the number of calls to allocate and free memory as well as the
-number of free bytes remaining, but says nothing about fragmentation. */
-static size_t xFreeBytesRemaining = 0U;
-static size_t xMinimumEverFreeBytesRemaining = 0U;
-static size_t xNumberOfSuccessfulAllocations = 0;
-static size_t xNumberOfSuccessfulFrees = 0;
+ * number of free bytes remaining, but says nothing about fragmentation. */
+PRIVILEGED_DATA static size_t xFreeBytesRemaining = 0U;
+PRIVILEGED_DATA static size_t xMinimumEverFreeBytesRemaining = 0U;
+PRIVILEGED_DATA static size_t xNumberOfSuccessfulAllocations = 0;
+PRIVILEGED_DATA static size_t xNumberOfSuccessfulFrees = 0;
 
 /* Gets set to the top bit of an size_t type.  When this bit in the xBlockSize
-member of an BlockLink_t structure is set then the block belongs to the
-application.  When the bit is free the block is still part of the free heap
-space. */
-static size_t xBlockAllocatedBit = 0;
+ * member of an BlockLink_t structure is set then the block belongs to the
+ * application.  When the bit is free the block is still part of the free heap
+ * space. */
+PRIVILEGED_DATA static size_t xBlockAllocatedBit = 0;
 
 /*-----------------------------------------------------------*/
 
-void *pvPortMalloc( size_t xWantedSize )
+void * pvPortMalloc( size_t xWantedSize )
 {
-BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
-void *pvReturn = NULL;
+    BlockLink_t * pxBlock, * pxPreviousBlock, * pxNewBlockLink;
+    void * pvReturn = NULL;
 
-	vTaskSuspendAll();
-	{
-		/* If this is the first call to malloc then the heap will require
-		initialisation to setup the list of free blocks. */
-		if( pxEnd == NULL )
-		{
-			prvHeapInit();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
+    vTaskSuspendAll();
+    {
+        /* If this is the first call to malloc then the heap will require
+         * initialisation to setup the list of free blocks. */
+        if( pxEnd == NULL )
+        {
+            prvHeapInit();
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
 
-		/* Check the requested block size is not so large that the top bit is
-		set.  The top bit of the block size member of the BlockLink_t structure
-		is used to determine who owns the block - the application or the
-		kernel, so it must be free. */
-		if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
-		{
-			/* The wanted size is increased so it can contain a BlockLink_t
-			structure in addition to the requested amount of bytes. */
-			if( xWantedSize > 0 )
-			{
-				xWantedSize += xHeapStructSize;
+        /* Check the requested block size is not so large that the top bit is
+         * set.  The top bit of the block size member of the BlockLink_t structure
+         * is used to determine who owns the block - the application or the
+         * kernel, so it must be free. */
+        if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
+        {
+            /* The wanted size is increased so it can contain a BlockLink_t
+             * structure in addition to the requested amount of bytes. */
+            if( xWantedSize > 0 )
+            {
+                xWantedSize += xHeapStructSize;
 
-				/* Ensure that blocks are always aligned to the required number
-				of bytes. */
-				if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 )
-				{
-					/* Byte alignment required. */
-					xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
-					configASSERT( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) == 0 );
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
+                /* Ensure that blocks are always aligned to the required number
+                 * of bytes. */
+                if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 )
+                {
+                    /* Byte alignment required. */
+                    xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
+                    configASSERT( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) == 0 );
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
 
-			if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
-			{
-				/* Traverse the list from the start	(lowest address) block until
-				one	of adequate size is found. */
-				pxPreviousBlock = &xStart;
-				pxBlock = xStart.pxNextFreeBlock;
-				while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
-				{
-					pxPreviousBlock = pxBlock;
-					pxBlock = pxBlock->pxNextFreeBlock;
-				}
+            if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
+            {
+                /* Traverse the list from the start	(lowest address) block until
+                 * one	of adequate size is found. */
+                pxPreviousBlock = &xStart;
+                pxBlock = xStart.pxNextFreeBlock;
 
-				/* If the end marker was reached then a block of adequate size
-				was	not found. */
-				if( pxBlock != pxEnd )
-				{
-					/* Return the memory space pointed to - jumping over the
-					BlockLink_t structure at its start. */
-					pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
+                while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
+                {
+                    pxPreviousBlock = pxBlock;
+                    pxBlock = pxBlock->pxNextFreeBlock;
+                }
 
-					/* This block is being returned for use so must be taken out
-					of the list of free blocks. */
-					pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
+                /* If the end marker was reached then a block of adequate size
+                 * was	not found. */
+                if( pxBlock != pxEnd )
+                {
+                    /* Return the memory space pointed to - jumping over the
+                     * BlockLink_t structure at its start. */
+                    pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
 
-					/* If the block is larger than required it can be split into
-					two. */
-					if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
-					{
-						/* This block is to be split into two.  Create a new
-						block following the number of bytes requested. The void
-						cast is used to prevent byte alignment warnings from the
-						compiler. */
-						pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
-						configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 );
+                    /* This block is being returned for use so must be taken out
+                     * of the list of free blocks. */
+                    pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
 
-						/* Calculate the sizes of two blocks split from the
-						single block. */
-						pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
-						pxBlock->xBlockSize = xWantedSize;
+                    /* If the block is larger than required it can be split into
+                     * two. */
+                    if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
+                    {
+                        /* This block is to be split into two.  Create a new
+                         * block following the number of bytes requested. The void
+                         * cast is used to prevent byte alignment warnings from the
+                         * compiler. */
+                        pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
+                        configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 );
 
-						/* Insert the new block into the list of free blocks. */
-						prvInsertBlockIntoFreeList( pxNewBlockLink );
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
+                        /* Calculate the sizes of two blocks split from the
+                         * single block. */
+                        pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
+                        pxBlock->xBlockSize = xWantedSize;
 
-					xFreeBytesRemaining -= pxBlock->xBlockSize;
+                        /* Insert the new block into the list of free blocks. */
+                        prvInsertBlockIntoFreeList( pxNewBlockLink );
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
 
-					if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
-					{
-						xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
+                    xFreeBytesRemaining -= pxBlock->xBlockSize;
 
-					/* The block is being returned - it is allocated and owned
-					by the application and has no "next" block. */
-					pxBlock->xBlockSize |= xBlockAllocatedBit;
-					pxBlock->pxNextFreeBlock = NULL;
-					xNumberOfSuccessfulAllocations++;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
+                    if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
+                    {
+                        xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
 
-		traceMALLOC( pvReturn, xWantedSize );
-	}
-	( void ) xTaskResumeAll();
+                    /* The block is being returned - it is allocated and owned
+                     * by the application and has no "next" block. */
+                    pxBlock->xBlockSize |= xBlockAllocatedBit;
+                    pxBlock->pxNextFreeBlock = NULL;
+                    xNumberOfSuccessfulAllocations++;
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
 
-	#if( configUSE_MALLOC_FAILED_HOOK == 1 )
-	{
-		if( pvReturn == NULL )
-		{
-			extern void vApplicationMallocFailedHook( void );
-			vApplicationMallocFailedHook();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	#endif
+        traceMALLOC( pvReturn, xWantedSize );
+    }
+    ( void ) xTaskResumeAll();
 
-	configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 );
-	return pvReturn;
+    #if ( configUSE_MALLOC_FAILED_HOOK == 1 )
+        {
+            if( pvReturn == NULL )
+            {
+                extern void vApplicationMallocFailedHook( void );
+                vApplicationMallocFailedHook();
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+    #endif /* if ( configUSE_MALLOC_FAILED_HOOK == 1 ) */
+
+    configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 );
+    return pvReturn;
 }
 /*-----------------------------------------------------------*/
 
-void vPortFree( void *pv )
+void vPortFree( void * pv )
 {
-uint8_t *puc = ( uint8_t * ) pv;
-BlockLink_t *pxLink;
+    uint8_t * puc = ( uint8_t * ) pv;
+    BlockLink_t * pxLink;
 
-	if( pv != NULL )
-	{
-		/* The memory being freed will have an BlockLink_t structure immediately
-		before it. */
-		puc -= xHeapStructSize;
+    if( pv != NULL )
+    {
+        /* The memory being freed will have an BlockLink_t structure immediately
+         * before it. */
+        puc -= xHeapStructSize;
 
-		/* This casting is to keep the compiler from issuing warnings. */
-		pxLink = ( void * ) puc;
+        /* This casting is to keep the compiler from issuing warnings. */
+        pxLink = ( void * ) puc;
 
-		/* Check the block is actually allocated. */
-		configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
-		configASSERT( pxLink->pxNextFreeBlock == NULL );
+        /* Check the block is actually allocated. */
+        configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
+        configASSERT( pxLink->pxNextFreeBlock == NULL );
 
-		if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
-		{
-			if( pxLink->pxNextFreeBlock == NULL )
-			{
-				/* The block is being returned to the heap - it is no longer
-				allocated. */
-				pxLink->xBlockSize &= ~xBlockAllocatedBit;
+        if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
+        {
+            if( pxLink->pxNextFreeBlock == NULL )
+            {
+                /* The block is being returned to the heap - it is no longer
+                 * allocated. */
+                pxLink->xBlockSize &= ~xBlockAllocatedBit;
 
-				vTaskSuspendAll();
-				{
-					/* Add this block to the list of free blocks. */
-					xFreeBytesRemaining += pxLink->xBlockSize;
-					traceFREE( pv, pxLink->xBlockSize );
-					prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
-					xNumberOfSuccessfulFrees++;
-				}
-				( void ) xTaskResumeAll();
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
+                vTaskSuspendAll();
+                {
+                    /* Add this block to the list of free blocks. */
+                    xFreeBytesRemaining += pxLink->xBlockSize;
+                    traceFREE( pv, pxLink->xBlockSize );
+                    prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
+                    xNumberOfSuccessfulFrees++;
+                }
+                ( void ) xTaskResumeAll();
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
 }
 /*-----------------------------------------------------------*/
 
 size_t xPortGetFreeHeapSize( void )
 {
-	return xFreeBytesRemaining;
+    return xFreeBytesRemaining;
 }
 /*-----------------------------------------------------------*/
 
 size_t xPortGetMinimumEverFreeHeapSize( void )
 {
-	return xMinimumEverFreeBytesRemaining;
+    return xMinimumEverFreeBytesRemaining;
 }
 /*-----------------------------------------------------------*/
 
 void vPortInitialiseBlocks( void )
 {
-	/* This just exists to keep the linker quiet. */
+    /* This just exists to keep the linker quiet. */
 }
 /*-----------------------------------------------------------*/
 
-static void prvHeapInit( void )
+static void prvHeapInit( void ) /* PRIVILEGED_FUNCTION */
 {
-BlockLink_t *pxFirstFreeBlock;
-uint8_t *pucAlignedHeap;
-size_t uxAddress;
-size_t xTotalHeapSize = configTOTAL_HEAP_SIZE;
+    BlockLink_t * pxFirstFreeBlock;
+    uint8_t * pucAlignedHeap;
+    size_t uxAddress;
+    size_t xTotalHeapSize = configTOTAL_HEAP_SIZE;
 
-	/* Ensure the heap starts on a correctly aligned boundary. */
-	uxAddress = ( size_t ) ucHeap;
+    /* Ensure the heap starts on a correctly aligned boundary. */
+    uxAddress = ( size_t ) ucHeap;
 
-	if( ( uxAddress & portBYTE_ALIGNMENT_MASK ) != 0 )
-	{
-		uxAddress += ( portBYTE_ALIGNMENT - 1 );
-		uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
-		xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
-	}
+    if( ( uxAddress & portBYTE_ALIGNMENT_MASK ) != 0 )
+    {
+        uxAddress += ( portBYTE_ALIGNMENT - 1 );
+        uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
+        xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
+    }
 
-	pucAlignedHeap = ( uint8_t * ) uxAddress;
+    pucAlignedHeap = ( uint8_t * ) uxAddress;
 
-	/* xStart is used to hold a pointer to the first item in the list of free
-	blocks.  The void cast is used to prevent compiler warnings. */
-	xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
-	xStart.xBlockSize = ( size_t ) 0;
+    /* xStart is used to hold a pointer to the first item in the list of free
+     * blocks.  The void cast is used to prevent compiler warnings. */
+    xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
+    xStart.xBlockSize = ( size_t ) 0;
 
-	/* pxEnd is used to mark the end of the list of free blocks and is inserted
-	at the end of the heap space. */
-	uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
-	uxAddress -= xHeapStructSize;
-	uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
-	pxEnd = ( void * ) uxAddress;
-	pxEnd->xBlockSize = 0;
-	pxEnd->pxNextFreeBlock = NULL;
+    /* pxEnd is used to mark the end of the list of free blocks and is inserted
+     * at the end of the heap space. */
+    uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
+    uxAddress -= xHeapStructSize;
+    uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
+    pxEnd = ( void * ) uxAddress;
+    pxEnd->xBlockSize = 0;
+    pxEnd->pxNextFreeBlock = NULL;
 
-	/* To start with there is a single free block that is sized to take up the
-	entire heap space, minus the space taken by pxEnd. */
-	pxFirstFreeBlock = ( void * ) pucAlignedHeap;
-	pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
-	pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
+    /* To start with there is a single free block that is sized to take up the
+     * entire heap space, minus the space taken by pxEnd. */
+    pxFirstFreeBlock = ( void * ) pucAlignedHeap;
+    pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
+    pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
 
-	/* Only one block exists - and it covers the entire usable heap space. */
-	xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
-	xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
+    /* Only one block exists - and it covers the entire usable heap space. */
+    xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
+    xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
 
-	/* Work out the position of the top bit in a size_t variable. */
-	xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 );
+    /* Work out the position of the top bit in a size_t variable. */
+    xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 );
 }
 /*-----------------------------------------------------------*/
 
-static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert )
+static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) /* PRIVILEGED_FUNCTION */
 {
-BlockLink_t *pxIterator;
-uint8_t *puc;
+    BlockLink_t * pxIterator;
+    uint8_t * puc;
 
-	/* Iterate through the list until a block is found that has a higher address
-	than the block being inserted. */
-	for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
-	{
-		/* Nothing to do here, just iterate to the right position. */
-	}
+    /* Iterate through the list until a block is found that has a higher address
+     * than the block being inserted. */
+    for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
+    {
+        /* Nothing to do here, just iterate to the right position. */
+    }
 
-	/* Do the block being inserted, and the block it is being inserted after
-	make a contiguous block of memory? */
-	puc = ( uint8_t * ) pxIterator;
-	if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
-	{
-		pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
-		pxBlockToInsert = pxIterator;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    /* Do the block being inserted, and the block it is being inserted after
+     * make a contiguous block of memory? */
+    puc = ( uint8_t * ) pxIterator;
 
-	/* Do the block being inserted, and the block it is being inserted before
-	make a contiguous block of memory? */
-	puc = ( uint8_t * ) pxBlockToInsert;
-	if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
-	{
-		if( pxIterator->pxNextFreeBlock != pxEnd )
-		{
-			/* Form one big block from the two blocks. */
-			pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
-			pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
-		}
-		else
-		{
-			pxBlockToInsert->pxNextFreeBlock = pxEnd;
-		}
-	}
-	else
-	{
-		pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
-	}
+    if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
+    {
+        pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
+        pxBlockToInsert = pxIterator;
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	/* If the block being inserted plugged a gab, so was merged with the block
-	before and the block after, then it's pxNextFreeBlock pointer will have
-	already been set, and should not be set here as that would make it point
-	to itself. */
-	if( pxIterator != pxBlockToInsert )
-	{
-		pxIterator->pxNextFreeBlock = pxBlockToInsert;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    /* Do the block being inserted, and the block it is being inserted before
+     * make a contiguous block of memory? */
+    puc = ( uint8_t * ) pxBlockToInsert;
+
+    if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
+    {
+        if( pxIterator->pxNextFreeBlock != pxEnd )
+        {
+            /* Form one big block from the two blocks. */
+            pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
+            pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
+        }
+        else
+        {
+            pxBlockToInsert->pxNextFreeBlock = pxEnd;
+        }
+    }
+    else
+    {
+        pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
+    }
+
+    /* If the block being inserted plugged a gab, so was merged with the block
+     * before and the block after, then it's pxNextFreeBlock pointer will have
+     * already been set, and should not be set here as that would make it point
+     * to itself. */
+    if( pxIterator != pxBlockToInsert )
+    {
+        pxIterator->pxNextFreeBlock = pxBlockToInsert;
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 }
 /*-----------------------------------------------------------*/
 
-void vPortGetHeapStats( HeapStats_t *pxHeapStats )
+void vPortGetHeapStats( HeapStats_t * pxHeapStats )
 {
-BlockLink_t *pxBlock;
-size_t xBlocks = 0, xMaxSize = 0, xMinSize = portMAX_DELAY; /* portMAX_DELAY used as a portable way of getting the maximum value. */
+    BlockLink_t * pxBlock;
+    size_t xBlocks = 0, xMaxSize = 0, xMinSize = portMAX_DELAY; /* portMAX_DELAY used as a portable way of getting the maximum value. */
 
-	vTaskSuspendAll();
-	{
-		pxBlock = xStart.pxNextFreeBlock;
+    vTaskSuspendAll();
+    {
+        pxBlock = xStart.pxNextFreeBlock;
 
-		/* pxBlock will be NULL if the heap has not been initialised.  The heap
-		is initialised automatically when the first allocation is made. */
-		if( pxBlock != NULL )
-		{
-			do
-			{
-				/* Increment the number of blocks and record the largest block seen
-				so far. */
-				xBlocks++;
+        /* pxBlock will be NULL if the heap has not been initialised.  The heap
+         * is initialised automatically when the first allocation is made. */
+        if( pxBlock != NULL )
+        {
+            do
+            {
+                /* Increment the number of blocks and record the largest block seen
+                 * so far. */
+                xBlocks++;
 
-				if( pxBlock->xBlockSize > xMaxSize )
-				{
-					xMaxSize = pxBlock->xBlockSize;
-				}
+                if( pxBlock->xBlockSize > xMaxSize )
+                {
+                    xMaxSize = pxBlock->xBlockSize;
+                }
 
-				if( pxBlock->xBlockSize < xMinSize )
-				{
-					xMinSize = pxBlock->xBlockSize;
-				}
+                if( pxBlock->xBlockSize < xMinSize )
+                {
+                    xMinSize = pxBlock->xBlockSize;
+                }
 
-				/* Move to the next block in the chain until the last block is
-				reached. */
-				pxBlock = pxBlock->pxNextFreeBlock;
-			} while( pxBlock != pxEnd );
-		}
-	}
-	( void ) xTaskResumeAll();
+                /* Move to the next block in the chain until the last block is
+                 * reached. */
+                pxBlock = pxBlock->pxNextFreeBlock;
+            } while( pxBlock != pxEnd );
+        }
+    }
+    ( void ) xTaskResumeAll();
 
-	pxHeapStats->xSizeOfLargestFreeBlockInBytes = xMaxSize;
-	pxHeapStats->xSizeOfSmallestFreeBlockInBytes = xMinSize;
-	pxHeapStats->xNumberOfFreeBlocks = xBlocks;
+    pxHeapStats->xSizeOfLargestFreeBlockInBytes = xMaxSize;
+    pxHeapStats->xSizeOfSmallestFreeBlockInBytes = xMinSize;
+    pxHeapStats->xNumberOfFreeBlocks = xBlocks;
 
-	taskENTER_CRITICAL();
-	{
-		pxHeapStats->xAvailableHeapSpaceInBytes = xFreeBytesRemaining;
-		pxHeapStats->xNumberOfSuccessfulAllocations = xNumberOfSuccessfulAllocations;
-		pxHeapStats->xNumberOfSuccessfulFrees = xNumberOfSuccessfulFrees;
-		pxHeapStats->xMinimumEverFreeBytesRemaining = xMinimumEverFreeBytesRemaining;
-	}
-	taskEXIT_CRITICAL();
+    taskENTER_CRITICAL();
+    {
+        pxHeapStats->xAvailableHeapSpaceInBytes = xFreeBytesRemaining;
+        pxHeapStats->xNumberOfSuccessfulAllocations = xNumberOfSuccessfulAllocations;
+        pxHeapStats->xNumberOfSuccessfulFrees = xNumberOfSuccessfulFrees;
+        pxHeapStats->xMinimumEverFreeBytesRemaining = xMinimumEverFreeBytesRemaining;
+    }
+    taskEXIT_CRITICAL();
 }
-
diff --git a/portable/MemMang/heap_5.c b/portable/MemMang/heap_5.c
index bd6b66ab2..aab4f8f46 100644
--- a/portable/MemMang/heap_5.c
+++ b/portable/MemMang/heap_5.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -31,7 +31,7 @@
  * memory blocks as they are freed.
  *
  * See heap_1.c, heap_2.c, heap_3.c and heap_4.c for alternative
- * implementations, and the memory management pages of http://www.FreeRTOS.org
+ * implementations, and the memory management pages of https://www.FreeRTOS.org
  * for more information.
  *
  * Usage notes:
@@ -57,9 +57,9 @@
  *
  * HeapRegion_t xHeapRegions[] =
  * {
- * 	{ ( uint8_t * ) 0x80000000UL, 0x10000 }, << Defines a block of 0x10000 bytes starting at address 0x80000000
- * 	{ ( uint8_t * ) 0x90000000UL, 0xa0000 }, << Defines a block of 0xa0000 bytes starting at address of 0x90000000
- * 	{ NULL, 0 }                << Terminates the array.
+ *  { ( uint8_t * ) 0x80000000UL, 0x10000 }, << Defines a block of 0x10000 bytes starting at address 0x80000000
+ *  { ( uint8_t * ) 0x90000000UL, 0xa0000 }, << Defines a block of 0xa0000 bytes starting at address of 0x90000000
+ *  { NULL, 0 }                << Terminates the array.
  * };
  *
  * vPortDefineHeapRegions( xHeapRegions ); << Pass the array into vPortDefineHeapRegions().
@@ -70,8 +70,8 @@
 #include 
 
 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
-all the API functions to use the MPU wrappers.  That should only be done when
-task.h is included from an application file. */
+ * all the API functions to use the MPU wrappers.  That should only be done when
+ * task.h is included from an application file. */
 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
 #include "FreeRTOS.h"
@@ -79,22 +79,22 @@ task.h is included from an application file. */
 
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 )
-	#error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 0 )
+    #error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0
 #endif
 
 /* Block sizes must not get too small. */
-#define heapMINIMUM_BLOCK_SIZE	( ( size_t ) ( xHeapStructSize << 1 ) )
+#define heapMINIMUM_BLOCK_SIZE    ( ( size_t ) ( xHeapStructSize << 1 ) )
 
 /* Assumes 8bit bytes! */
-#define heapBITS_PER_BYTE		( ( size_t ) 8 )
+#define heapBITS_PER_BYTE         ( ( size_t ) 8 )
 
 /* Define the linked list structure.  This is used to link free blocks in order
-of their memory address. */
+ * of their memory address. */
 typedef struct A_BLOCK_LINK
 {
-	struct A_BLOCK_LINK *pxNextFreeBlock;	/*<< The next free block in the list. */
-	size_t xBlockSize;						/*<< The size of the free block. */
+    struct A_BLOCK_LINK * pxNextFreeBlock; /*<< The next free block in the list. */
+    size_t xBlockSize;                     /*<< The size of the free block. */
 } BlockLink_t;
 
 /*-----------------------------------------------------------*/
@@ -105,443 +105,446 @@ typedef struct A_BLOCK_LINK
  * the block in front it and/or the block behind it if the memory blocks are
  * adjacent to each other.
  */
-static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert );
+static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert );
 
 /*-----------------------------------------------------------*/
 
 /* The size of the structure placed at the beginning of each allocated memory
-block must by correctly byte aligned. */
-static const size_t xHeapStructSize	= ( sizeof( BlockLink_t ) + ( ( size_t ) ( portBYTE_ALIGNMENT - 1 ) ) ) & ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
+ * block must by correctly byte aligned. */
+static const size_t xHeapStructSize = ( sizeof( BlockLink_t ) + ( ( size_t ) ( portBYTE_ALIGNMENT - 1 ) ) ) & ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
 
 /* Create a couple of list links to mark the start and end of the list. */
-static BlockLink_t xStart, *pxEnd = NULL;
+static BlockLink_t xStart, * pxEnd = NULL;
 
 /* Keeps track of the number of calls to allocate and free memory as well as the
-number of free bytes remaining, but says nothing about fragmentation. */
+ * number of free bytes remaining, but says nothing about fragmentation. */
 static size_t xFreeBytesRemaining = 0U;
 static size_t xMinimumEverFreeBytesRemaining = 0U;
 static size_t xNumberOfSuccessfulAllocations = 0;
 static size_t xNumberOfSuccessfulFrees = 0;
 
 /* Gets set to the top bit of an size_t type.  When this bit in the xBlockSize
-member of an BlockLink_t structure is set then the block belongs to the
-application.  When the bit is free the block is still part of the free heap
-space. */
+ * member of an BlockLink_t structure is set then the block belongs to the
+ * application.  When the bit is free the block is still part of the free heap
+ * space. */
 static size_t xBlockAllocatedBit = 0;
 
 /*-----------------------------------------------------------*/
 
-void *pvPortMalloc( size_t xWantedSize )
+void * pvPortMalloc( size_t xWantedSize )
 {
-BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
-void *pvReturn = NULL;
+    BlockLink_t * pxBlock, * pxPreviousBlock, * pxNewBlockLink;
+    void * pvReturn = NULL;
 
-	/* The heap must be initialised before the first call to
-	prvPortMalloc(). */
-	configASSERT( pxEnd );
+    /* The heap must be initialised before the first call to
+     * prvPortMalloc(). */
+    configASSERT( pxEnd );
 
-	vTaskSuspendAll();
-	{
-		/* Check the requested block size is not so large that the top bit is
-		set.  The top bit of the block size member of the BlockLink_t structure
-		is used to determine who owns the block - the application or the
-		kernel, so it must be free. */
-		if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
-		{
-			/* The wanted size is increased so it can contain a BlockLink_t
-			structure in addition to the requested amount of bytes. */
-			if( xWantedSize > 0 )
-			{
-				xWantedSize += xHeapStructSize;
+    vTaskSuspendAll();
+    {
+        /* Check the requested block size is not so large that the top bit is
+         * set.  The top bit of the block size member of the BlockLink_t structure
+         * is used to determine who owns the block - the application or the
+         * kernel, so it must be free. */
+        if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
+        {
+            /* The wanted size is increased so it can contain a BlockLink_t
+             * structure in addition to the requested amount of bytes. */
+            if( xWantedSize > 0 )
+            {
+                xWantedSize += xHeapStructSize;
 
-				/* Ensure that blocks are always aligned to the required number
-				of bytes. */
-				if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 )
-				{
-					/* Byte alignment required. */
-					xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
+                /* Ensure that blocks are always aligned to the required number
+                 * of bytes. */
+                if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 )
+                {
+                    /* Byte alignment required. */
+                    xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
 
-			if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
-			{
-				/* Traverse the list from the start	(lowest address) block until
-				one	of adequate size is found. */
-				pxPreviousBlock = &xStart;
-				pxBlock = xStart.pxNextFreeBlock;
-				while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
-				{
-					pxPreviousBlock = pxBlock;
-					pxBlock = pxBlock->pxNextFreeBlock;
-				}
+            if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
+            {
+                /* Traverse the list from the start	(lowest address) block until
+                 * one	of adequate size is found. */
+                pxPreviousBlock = &xStart;
+                pxBlock = xStart.pxNextFreeBlock;
 
-				/* If the end marker was reached then a block of adequate size
-				was	not found. */
-				if( pxBlock != pxEnd )
-				{
-					/* Return the memory space pointed to - jumping over the
-					BlockLink_t structure at its start. */
-					pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
+                while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
+                {
+                    pxPreviousBlock = pxBlock;
+                    pxBlock = pxBlock->pxNextFreeBlock;
+                }
 
-					/* This block is being returned for use so must be taken out
-					of the list of free blocks. */
-					pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
+                /* If the end marker was reached then a block of adequate size
+                 * was	not found. */
+                if( pxBlock != pxEnd )
+                {
+                    /* Return the memory space pointed to - jumping over the
+                     * BlockLink_t structure at its start. */
+                    pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
 
-					/* If the block is larger than required it can be split into
-					two. */
-					if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
-					{
-						/* This block is to be split into two.  Create a new
-						block following the number of bytes requested. The void
-						cast is used to prevent byte alignment warnings from the
-						compiler. */
-						pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
+                    /* This block is being returned for use so must be taken out
+                     * of the list of free blocks. */
+                    pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
 
-						/* Calculate the sizes of two blocks split from the
-						single block. */
-						pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
-						pxBlock->xBlockSize = xWantedSize;
+                    /* If the block is larger than required it can be split into
+                     * two. */
+                    if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
+                    {
+                        /* This block is to be split into two.  Create a new
+                         * block following the number of bytes requested. The void
+                         * cast is used to prevent byte alignment warnings from the
+                         * compiler. */
+                        pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
 
-						/* Insert the new block into the list of free blocks. */
-						prvInsertBlockIntoFreeList( ( pxNewBlockLink ) );
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
+                        /* Calculate the sizes of two blocks split from the
+                         * single block. */
+                        pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
+                        pxBlock->xBlockSize = xWantedSize;
 
-					xFreeBytesRemaining -= pxBlock->xBlockSize;
+                        /* Insert the new block into the list of free blocks. */
+                        prvInsertBlockIntoFreeList( ( pxNewBlockLink ) );
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
 
-					if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
-					{
-						xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
+                    xFreeBytesRemaining -= pxBlock->xBlockSize;
 
-					/* The block is being returned - it is allocated and owned
-					by the application and has no "next" block. */
-					pxBlock->xBlockSize |= xBlockAllocatedBit;
-					pxBlock->pxNextFreeBlock = NULL;
-					xNumberOfSuccessfulAllocations++;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
+                    if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
+                    {
+                        xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
 
-		traceMALLOC( pvReturn, xWantedSize );
-	}
-	( void ) xTaskResumeAll();
+                    /* The block is being returned - it is allocated and owned
+                     * by the application and has no "next" block. */
+                    pxBlock->xBlockSize |= xBlockAllocatedBit;
+                    pxBlock->pxNextFreeBlock = NULL;
+                    xNumberOfSuccessfulAllocations++;
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
 
-	#if( configUSE_MALLOC_FAILED_HOOK == 1 )
-	{
-		if( pvReturn == NULL )
-		{
-			extern void vApplicationMallocFailedHook( void );
-			vApplicationMallocFailedHook();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	#endif
+        traceMALLOC( pvReturn, xWantedSize );
+    }
+    ( void ) xTaskResumeAll();
 
-	return pvReturn;
+    #if ( configUSE_MALLOC_FAILED_HOOK == 1 )
+        {
+            if( pvReturn == NULL )
+            {
+                extern void vApplicationMallocFailedHook( void );
+                vApplicationMallocFailedHook();
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+    #endif /* if ( configUSE_MALLOC_FAILED_HOOK == 1 ) */
+
+    return pvReturn;
 }
 /*-----------------------------------------------------------*/
 
-void vPortFree( void *pv )
+void vPortFree( void * pv )
 {
-uint8_t *puc = ( uint8_t * ) pv;
-BlockLink_t *pxLink;
+    uint8_t * puc = ( uint8_t * ) pv;
+    BlockLink_t * pxLink;
 
-	if( pv != NULL )
-	{
-		/* The memory being freed will have an BlockLink_t structure immediately
-		before it. */
-		puc -= xHeapStructSize;
+    if( pv != NULL )
+    {
+        /* The memory being freed will have an BlockLink_t structure immediately
+         * before it. */
+        puc -= xHeapStructSize;
 
-		/* This casting is to keep the compiler from issuing warnings. */
-		pxLink = ( void * ) puc;
+        /* This casting is to keep the compiler from issuing warnings. */
+        pxLink = ( void * ) puc;
 
-		/* Check the block is actually allocated. */
-		configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
-		configASSERT( pxLink->pxNextFreeBlock == NULL );
+        /* Check the block is actually allocated. */
+        configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
+        configASSERT( pxLink->pxNextFreeBlock == NULL );
 
-		if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
-		{
-			if( pxLink->pxNextFreeBlock == NULL )
-			{
-				/* The block is being returned to the heap - it is no longer
-				allocated. */
-				pxLink->xBlockSize &= ~xBlockAllocatedBit;
+        if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
+        {
+            if( pxLink->pxNextFreeBlock == NULL )
+            {
+                /* The block is being returned to the heap - it is no longer
+                 * allocated. */
+                pxLink->xBlockSize &= ~xBlockAllocatedBit;
 
-				vTaskSuspendAll();
-				{
-					/* Add this block to the list of free blocks. */
-					xFreeBytesRemaining += pxLink->xBlockSize;
-					traceFREE( pv, pxLink->xBlockSize );
-					prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
-					xNumberOfSuccessfulFrees++;
-				}
-				( void ) xTaskResumeAll();
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
+                vTaskSuspendAll();
+                {
+                    /* Add this block to the list of free blocks. */
+                    xFreeBytesRemaining += pxLink->xBlockSize;
+                    traceFREE( pv, pxLink->xBlockSize );
+                    prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
+                    xNumberOfSuccessfulFrees++;
+                }
+                ( void ) xTaskResumeAll();
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
 }
 /*-----------------------------------------------------------*/
 
 size_t xPortGetFreeHeapSize( void )
 {
-	return xFreeBytesRemaining;
+    return xFreeBytesRemaining;
 }
 /*-----------------------------------------------------------*/
 
 size_t xPortGetMinimumEverFreeHeapSize( void )
 {
-	return xMinimumEverFreeBytesRemaining;
+    return xMinimumEverFreeBytesRemaining;
 }
 /*-----------------------------------------------------------*/
 
-static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert )
+static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert )
 {
-BlockLink_t *pxIterator;
-uint8_t *puc;
+    BlockLink_t * pxIterator;
+    uint8_t * puc;
 
-	/* Iterate through the list until a block is found that has a higher address
-	than the block being inserted. */
-	for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
-	{
-		/* Nothing to do here, just iterate to the right position. */
-	}
+    /* Iterate through the list until a block is found that has a higher address
+     * than the block being inserted. */
+    for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
+    {
+        /* Nothing to do here, just iterate to the right position. */
+    }
 
-	/* Do the block being inserted, and the block it is being inserted after
-	make a contiguous block of memory? */
-	puc = ( uint8_t * ) pxIterator;
-	if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
-	{
-		pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
-		pxBlockToInsert = pxIterator;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    /* Do the block being inserted, and the block it is being inserted after
+     * make a contiguous block of memory? */
+    puc = ( uint8_t * ) pxIterator;
 
-	/* Do the block being inserted, and the block it is being inserted before
-	make a contiguous block of memory? */
-	puc = ( uint8_t * ) pxBlockToInsert;
-	if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
-	{
-		if( pxIterator->pxNextFreeBlock != pxEnd )
-		{
-			/* Form one big block from the two blocks. */
-			pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
-			pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
-		}
-		else
-		{
-			pxBlockToInsert->pxNextFreeBlock = pxEnd;
-		}
-	}
-	else
-	{
-		pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
-	}
+    if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
+    {
+        pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
+        pxBlockToInsert = pxIterator;
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	/* If the block being inserted plugged a gab, so was merged with the block
-	before and the block after, then it's pxNextFreeBlock pointer will have
-	already been set, and should not be set here as that would make it point
-	to itself. */
-	if( pxIterator != pxBlockToInsert )
-	{
-		pxIterator->pxNextFreeBlock = pxBlockToInsert;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    /* Do the block being inserted, and the block it is being inserted before
+     * make a contiguous block of memory? */
+    puc = ( uint8_t * ) pxBlockToInsert;
+
+    if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
+    {
+        if( pxIterator->pxNextFreeBlock != pxEnd )
+        {
+            /* Form one big block from the two blocks. */
+            pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
+            pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
+        }
+        else
+        {
+            pxBlockToInsert->pxNextFreeBlock = pxEnd;
+        }
+    }
+    else
+    {
+        pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
+    }
+
+    /* If the block being inserted plugged a gab, so was merged with the block
+     * before and the block after, then it's pxNextFreeBlock pointer will have
+     * already been set, and should not be set here as that would make it point
+     * to itself. */
+    if( pxIterator != pxBlockToInsert )
+    {
+        pxIterator->pxNextFreeBlock = pxBlockToInsert;
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 }
 /*-----------------------------------------------------------*/
 
 void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions )
 {
-BlockLink_t *pxFirstFreeBlockInRegion = NULL, *pxPreviousFreeBlock;
-size_t xAlignedHeap;
-size_t xTotalRegionSize, xTotalHeapSize = 0;
-BaseType_t xDefinedRegions = 0;
-size_t xAddress;
-const HeapRegion_t *pxHeapRegion;
+    BlockLink_t * pxFirstFreeBlockInRegion = NULL, * pxPreviousFreeBlock;
+    size_t xAlignedHeap;
+    size_t xTotalRegionSize, xTotalHeapSize = 0;
+    BaseType_t xDefinedRegions = 0;
+    size_t xAddress;
+    const HeapRegion_t * pxHeapRegion;
 
-	/* Can only call once! */
-	configASSERT( pxEnd == NULL );
+    /* Can only call once! */
+    configASSERT( pxEnd == NULL );
 
-	pxHeapRegion = &( pxHeapRegions[ xDefinedRegions ] );
+    pxHeapRegion = &( pxHeapRegions[ xDefinedRegions ] );
 
-	while( pxHeapRegion->xSizeInBytes > 0 )
-	{
-		xTotalRegionSize = pxHeapRegion->xSizeInBytes;
+    while( pxHeapRegion->xSizeInBytes > 0 )
+    {
+        xTotalRegionSize = pxHeapRegion->xSizeInBytes;
 
-		/* Ensure the heap region starts on a correctly aligned boundary. */
-		xAddress = ( size_t ) pxHeapRegion->pucStartAddress;
-		if( ( xAddress & portBYTE_ALIGNMENT_MASK ) != 0 )
-		{
-			xAddress += ( portBYTE_ALIGNMENT - 1 );
-			xAddress &= ~portBYTE_ALIGNMENT_MASK;
+        /* Ensure the heap region starts on a correctly aligned boundary. */
+        xAddress = ( size_t ) pxHeapRegion->pucStartAddress;
 
-			/* Adjust the size for the bytes lost to alignment. */
-			xTotalRegionSize -= xAddress - ( size_t ) pxHeapRegion->pucStartAddress;
-		}
+        if( ( xAddress & portBYTE_ALIGNMENT_MASK ) != 0 )
+        {
+            xAddress += ( portBYTE_ALIGNMENT - 1 );
+            xAddress &= ~portBYTE_ALIGNMENT_MASK;
 
-		xAlignedHeap = xAddress;
+            /* Adjust the size for the bytes lost to alignment. */
+            xTotalRegionSize -= xAddress - ( size_t ) pxHeapRegion->pucStartAddress;
+        }
 
-		/* Set xStart if it has not already been set. */
-		if( xDefinedRegions == 0 )
-		{
-			/* xStart is used to hold a pointer to the first item in the list of
-			free blocks.  The void cast is used to prevent compiler warnings. */
-			xStart.pxNextFreeBlock = ( BlockLink_t * ) xAlignedHeap;
-			xStart.xBlockSize = ( size_t ) 0;
-		}
-		else
-		{
-			/* Should only get here if one region has already been added to the
-			heap. */
-			configASSERT( pxEnd != NULL );
+        xAlignedHeap = xAddress;
 
-			/* Check blocks are passed in with increasing start addresses. */
-			configASSERT( xAddress > ( size_t ) pxEnd );
-		}
+        /* Set xStart if it has not already been set. */
+        if( xDefinedRegions == 0 )
+        {
+            /* xStart is used to hold a pointer to the first item in the list of
+             *  free blocks.  The void cast is used to prevent compiler warnings. */
+            xStart.pxNextFreeBlock = ( BlockLink_t * ) xAlignedHeap;
+            xStart.xBlockSize = ( size_t ) 0;
+        }
+        else
+        {
+            /* Should only get here if one region has already been added to the
+             * heap. */
+            configASSERT( pxEnd != NULL );
 
-		/* Remember the location of the end marker in the previous region, if
-		any. */
-		pxPreviousFreeBlock = pxEnd;
+            /* Check blocks are passed in with increasing start addresses. */
+            configASSERT( xAddress > ( size_t ) pxEnd );
+        }
 
-		/* pxEnd is used to mark the end of the list of free blocks and is
-		inserted at the end of the region space. */
-		xAddress = xAlignedHeap + xTotalRegionSize;
-		xAddress -= xHeapStructSize;
-		xAddress &= ~portBYTE_ALIGNMENT_MASK;
-		pxEnd = ( BlockLink_t * ) xAddress;
-		pxEnd->xBlockSize = 0;
-		pxEnd->pxNextFreeBlock = NULL;
+        /* Remember the location of the end marker in the previous region, if
+         * any. */
+        pxPreviousFreeBlock = pxEnd;
 
-		/* To start with there is a single free block in this region that is
-		sized to take up the entire heap region minus the space taken by the
-		free block structure. */
-		pxFirstFreeBlockInRegion = ( BlockLink_t * ) xAlignedHeap;
-		pxFirstFreeBlockInRegion->xBlockSize = xAddress - ( size_t ) pxFirstFreeBlockInRegion;
-		pxFirstFreeBlockInRegion->pxNextFreeBlock = pxEnd;
+        /* pxEnd is used to mark the end of the list of free blocks and is
+         * inserted at the end of the region space. */
+        xAddress = xAlignedHeap + xTotalRegionSize;
+        xAddress -= xHeapStructSize;
+        xAddress &= ~portBYTE_ALIGNMENT_MASK;
+        pxEnd = ( BlockLink_t * ) xAddress;
+        pxEnd->xBlockSize = 0;
+        pxEnd->pxNextFreeBlock = NULL;
 
-		/* If this is not the first region that makes up the entire heap space
-		then link the previous region to this region. */
-		if( pxPreviousFreeBlock != NULL )
-		{
-			pxPreviousFreeBlock->pxNextFreeBlock = pxFirstFreeBlockInRegion;
-		}
+        /* To start with there is a single free block in this region that is
+         * sized to take up the entire heap region minus the space taken by the
+         * free block structure. */
+        pxFirstFreeBlockInRegion = ( BlockLink_t * ) xAlignedHeap;
+        pxFirstFreeBlockInRegion->xBlockSize = xAddress - ( size_t ) pxFirstFreeBlockInRegion;
+        pxFirstFreeBlockInRegion->pxNextFreeBlock = pxEnd;
 
-		xTotalHeapSize += pxFirstFreeBlockInRegion->xBlockSize;
+        /* If this is not the first region that makes up the entire heap space
+         * then link the previous region to this region. */
+        if( pxPreviousFreeBlock != NULL )
+        {
+            pxPreviousFreeBlock->pxNextFreeBlock = pxFirstFreeBlockInRegion;
+        }
 
-		/* Move onto the next HeapRegion_t structure. */
-		xDefinedRegions++;
-		pxHeapRegion = &( pxHeapRegions[ xDefinedRegions ] );
-	}
+        xTotalHeapSize += pxFirstFreeBlockInRegion->xBlockSize;
 
-	xMinimumEverFreeBytesRemaining = xTotalHeapSize;
-	xFreeBytesRemaining = xTotalHeapSize;
+        /* Move onto the next HeapRegion_t structure. */
+        xDefinedRegions++;
+        pxHeapRegion = &( pxHeapRegions[ xDefinedRegions ] );
+    }
 
-	/* Check something was actually defined before it is accessed. */
-	configASSERT( xTotalHeapSize );
+    xMinimumEverFreeBytesRemaining = xTotalHeapSize;
+    xFreeBytesRemaining = xTotalHeapSize;
 
-	/* Work out the position of the top bit in a size_t variable. */
-	xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 );
+    /* Check something was actually defined before it is accessed. */
+    configASSERT( xTotalHeapSize );
+
+    /* Work out the position of the top bit in a size_t variable. */
+    xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 );
 }
 /*-----------------------------------------------------------*/
 
-void vPortGetHeapStats( HeapStats_t *pxHeapStats )
+void vPortGetHeapStats( HeapStats_t * pxHeapStats )
 {
-BlockLink_t *pxBlock;
-size_t xBlocks = 0, xMaxSize = 0, xMinSize = portMAX_DELAY; /* portMAX_DELAY used as a portable way of getting the maximum value. */
+    BlockLink_t * pxBlock;
+    size_t xBlocks = 0, xMaxSize = 0, xMinSize = portMAX_DELAY; /* portMAX_DELAY used as a portable way of getting the maximum value. */
 
-	vTaskSuspendAll();
-	{
-		pxBlock = xStart.pxNextFreeBlock;
+    vTaskSuspendAll();
+    {
+        pxBlock = xStart.pxNextFreeBlock;
 
-		/* pxBlock will be NULL if the heap has not been initialised.  The heap
-		is initialised automatically when the first allocation is made. */
-		if( pxBlock != NULL )
-		{
-			do
-			{
-				/* Increment the number of blocks and record the largest block seen
-				so far. */
-				xBlocks++;
+        /* pxBlock will be NULL if the heap has not been initialised.  The heap
+         * is initialised automatically when the first allocation is made. */
+        if( pxBlock != NULL )
+        {
+            do
+            {
+                /* Increment the number of blocks and record the largest block seen
+                 * so far. */
+                xBlocks++;
 
-				if( pxBlock->xBlockSize > xMaxSize )
-				{
-					xMaxSize = pxBlock->xBlockSize;
-				}
+                if( pxBlock->xBlockSize > xMaxSize )
+                {
+                    xMaxSize = pxBlock->xBlockSize;
+                }
 
-				/* Heap five will have a zero sized block at the end of each
-				each region - the block is only used to link to the next
-				heap region so it not a real block. */
-				if( pxBlock->xBlockSize != 0 )
-				{
-					if( pxBlock->xBlockSize < xMinSize )
-					{
-						xMinSize = pxBlock->xBlockSize;
-					}
-				}
+                /* Heap five will have a zero sized block at the end of each
+                 * each region - the block is only used to link to the next
+                 * heap region so it not a real block. */
+                if( pxBlock->xBlockSize != 0 )
+                {
+                    if( pxBlock->xBlockSize < xMinSize )
+                    {
+                        xMinSize = pxBlock->xBlockSize;
+                    }
+                }
 
-				/* Move to the next block in the chain until the last block is
-				reached. */
-				pxBlock = pxBlock->pxNextFreeBlock;
-			} while( pxBlock != pxEnd );
-		}
-	}
-	( void ) xTaskResumeAll();
+                /* Move to the next block in the chain until the last block is
+                 * reached. */
+                pxBlock = pxBlock->pxNextFreeBlock;
+            } while( pxBlock != pxEnd );
+        }
+    }
+    ( void ) xTaskResumeAll();
 
-	pxHeapStats->xSizeOfLargestFreeBlockInBytes = xMaxSize;
-	pxHeapStats->xSizeOfSmallestFreeBlockInBytes = xMinSize;
-	pxHeapStats->xNumberOfFreeBlocks = xBlocks;
+    pxHeapStats->xSizeOfLargestFreeBlockInBytes = xMaxSize;
+    pxHeapStats->xSizeOfSmallestFreeBlockInBytes = xMinSize;
+    pxHeapStats->xNumberOfFreeBlocks = xBlocks;
 
-	taskENTER_CRITICAL();
-	{
-		pxHeapStats->xAvailableHeapSpaceInBytes = xFreeBytesRemaining;
-		pxHeapStats->xNumberOfSuccessfulAllocations = xNumberOfSuccessfulAllocations;
-		pxHeapStats->xNumberOfSuccessfulFrees = xNumberOfSuccessfulFrees;
-		pxHeapStats->xMinimumEverFreeBytesRemaining = xMinimumEverFreeBytesRemaining;
-	}
-	taskEXIT_CRITICAL();
+    taskENTER_CRITICAL();
+    {
+        pxHeapStats->xAvailableHeapSpaceInBytes = xFreeBytesRemaining;
+        pxHeapStats->xNumberOfSuccessfulAllocations = xNumberOfSuccessfulAllocations;
+        pxHeapStats->xNumberOfSuccessfulFrees = xNumberOfSuccessfulFrees;
+        pxHeapStats->xMinimumEverFreeBytesRemaining = xMinimumEverFreeBytesRemaining;
+    }
+    taskEXIT_CRITICAL();
 }
-
diff --git a/portable/MikroC/ARM_CM4F/port.c b/portable/MikroC/ARM_CM4F/port.c
index 052c197ae..33fc346a6 100644
--- a/portable/MikroC/ARM_CM4F/port.c
+++ b/portable/MikroC/ARM_CM4F/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,15 +19,14 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------
- * Implementation of functions defined in portable.h for the ARM CM4F port.
- *----------------------------------------------------------*/
+* Implementation of functions defined in portable.h for the ARM CM4F port.
+*----------------------------------------------------------*/
 
 /* Scheduler includes. */
 #include "FreeRTOS.h"
@@ -35,89 +34,90 @@
 
 
 #ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 1UL << 2UL )
+    #define configSYSTICK_CLOCK_HZ      configCPU_CLOCK_HZ
+    /* Ensure the SysTick is clocked at the same frequency as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 1UL << 2UL )
 #else
-	/* The way the SysTick is clocked is not modified in case it is not the same
-	as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 0 )
+
+/* The way the SysTick is clocked is not modified in case it is not the same
+ * as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 0 )
 #endif
 
 /* Constants required to manipulate the core.  Registers first... */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_CTRL_REG             ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG             ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG    ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SHPR3_REG                    ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
 /* ...then bits in the registers. */
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portNVIC_PENDSVCLEAR_BIT			 ( 1UL << 27UL )
-#define portNVIC_PEND_SYSTICK_CLEAR_BIT		( 1UL << 25UL )
+#define portNVIC_SYSTICK_INT_BIT              ( 1UL << 1UL )
+#define portNVIC_SYSTICK_ENABLE_BIT           ( 1UL << 0UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT       ( 1UL << 16UL )
+#define portNVIC_PENDSVCLEAR_BIT              ( 1UL << 27UL )
+#define portNVIC_PEND_SYSTICK_CLEAR_BIT       ( 1UL << 25UL )
 
-#define portNVIC_PENDSV_PRI					( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
-#define portNVIC_SYSTICK_PRI				( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
+#define portNVIC_PENDSV_PRI                   ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
+#define portNVIC_SYSTICK_PRI                  ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
 
 /* Constants required to check the validity of an interrupt priority. */
-#define portFIRST_USER_INTERRUPT_NUMBER		( 16 )
-#define portNVIC_IP_REGISTERS_OFFSET_16	 ( 0xE000E3F0 )
-#define portAIRCR_REG						( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
-#define portMAX_8_BIT_VALUE					( ( uint8_t ) 0xff )
-#define portTOP_BIT_OF_BYTE					( ( uint8_t ) 0x80 )
-#define portMAX_PRIGROUP_BITS				( ( uint8_t ) 7 )
-#define portPRIORITY_GROUP_MASK				( 0x07UL << 8UL )
-#define portPRIGROUP_SHIFT					( 8UL )
+#define portFIRST_USER_INTERRUPT_NUMBER       ( 16 )
+#define portNVIC_IP_REGISTERS_OFFSET_16       ( 0xE000E3F0 )
+#define portAIRCR_REG                         ( *( ( volatile uint32_t * ) 0xE000ED0C ) )
+#define portMAX_8_BIT_VALUE                   ( ( uint8_t ) 0xff )
+#define portTOP_BIT_OF_BYTE                   ( ( uint8_t ) 0x80 )
+#define portMAX_PRIGROUP_BITS                 ( ( uint8_t ) 7 )
+#define portPRIORITY_GROUP_MASK               ( 0x07UL << 8UL )
+#define portPRIGROUP_SHIFT                    ( 8UL )
 
 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
-#define portVECTACTIVE_MASK					( 0xFFUL )
+#define portVECTACTIVE_MASK                   ( 0xFFUL )
 
 /* Constants required to manipulate the VFP. */
-#define portFPCCR							( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
-#define portASPEN_AND_LSPEN_BITS			( 0x3UL << 30UL )
+#define portFPCCR                             ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
+#define portASPEN_AND_LSPEN_BITS              ( 0x3UL << 30UL )
 
 /* Constants required to set up the initial stack. */
-#define portINITIAL_XPSR					( 0x01000000 )
-#define portINITIAL_EXC_RETURN				( 0xfffffffd )
+#define portINITIAL_XPSR                      ( 0x01000000 )
+#define portINITIAL_EXC_RETURN                ( 0xfffffffd )
 
 /* The systick is a 24-bit counter. */
-#define portMAX_24_BIT_NUMBER				( 0xffffffUL )
+#define portMAX_24_BIT_NUMBER                 ( 0xffffffUL )
 
 /* A fiddle factor to estimate the number of SysTick counts that would have
-occurred while the SysTick counter is stopped during tickless idle
-calculations. */
-#define portMISSED_COUNTS_FACTOR			( 45UL )
+ * occurred while the SysTick counter is stopped during tickless idle
+ * calculations. */
+#define portMISSED_COUNTS_FACTOR              ( 45UL )
 
 /* Let the user override the pre-loading of the initial LR with the address of
-prvTaskExitError() in case it messes up unwinding of the stack in the
-debugger. */
+ * prvTaskExitError() in case it messes up unwinding of the stack in the
+ * debugger. */
 #ifdef configTASK_RETURN_ADDRESS
-	#define portTASK_RETURN_ADDRESS	configTASK_RETURN_ADDRESS
+    #define portTASK_RETURN_ADDRESS    configTASK_RETURN_ADDRESS
 #else
-	#define portTASK_RETURN_ADDRESS	prvTaskExitError
+    #define portTASK_RETURN_ADDRESS    prvTaskExitError
 #endif
 
 /* Cannot find a weak linkage attribute, so the
-configOVERRIDE_DEFAULT_TICK_CONFIGURATION constant must be set to 1 if the
-application writer wants to provide their own implementation of
-vPortSetupTimerInterrupt().  Ensure configOVERRIDE_DEFAULT_TICK_CONFIGURATION
-is defined. */
+ * configOVERRIDE_DEFAULT_TICK_CONFIGURATION constant must be set to 1 if the
+ * application writer wants to provide their own implementation of
+ * vPortSetupTimerInterrupt().  Ensure configOVERRIDE_DEFAULT_TICK_CONFIGURATION
+ * is defined. */
 #ifndef configOVERRIDE_DEFAULT_TICK_CONFIGURATION
-		#define configOVERRIDE_DEFAULT_TICK_CONFIGURATION 0
+    #define configOVERRIDE_DEFAULT_TICK_CONFIGURATION    0
 #endif
 
 /* Manual definition of missing asm names. */
-#define psp 	9
-#define basepri	17
-#define msp		8
-#define ipsr	5
-#define control	20
+#define psp        9
+#define basepri    17
+#define msp        8
+#define ipsr       5
+#define control    20
 
 /* From port.c. */
-extern void *pxCurrentTCB;
+extern void * pxCurrentTCB;
 
 /* Each task maintains its own interrupt status in the critical nesting
-variable. */
+ * variable. */
 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 
 /*
@@ -142,7 +142,7 @@ static void prvPortStartFirstTask( void );
 /*
  * Function to enable the VFP.
  */
- static void vPortEnableVFP( void );
+static void vPortEnableVFP( void );
 
 /*
  * Used to catch tasks that attempt to return from their implementing function.
@@ -154,24 +154,24 @@ static void prvTaskExitError( void );
 /*
  * The number of SysTick increments that make up one tick period.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulTimerCountsForOneTick = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulTimerCountsForOneTick = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * The maximum number of tick periods that can be suppressed is limited by the
  * 24 bit resolution of the SysTick timer.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t xMaximumPossibleSuppressedTicks = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * Compensate for the CPU cycles that pass while the SysTick is stopped (low
  * power functionality only.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulStoppedTimerCompensation = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulStoppedTimerCompensation = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
@@ -180,8 +180,8 @@ static void prvTaskExitError( void );
  * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
  */
 #if ( configASSERT_DEFINED == 1 )
-	 static uint8_t ucMaxSysCallPriority = 0;
-	 static uint32_t ulMaxPRIGROUPValue = 0;
+    static uint8_t ucMaxSysCallPriority = 0;
+    static uint32_t ulMaxPRIGROUPValue = 0;
 #endif /* configASSERT_DEFINED */
 
 /*-----------------------------------------------------------*/
@@ -189,90 +189,100 @@ static void prvTaskExitError( void );
 /*
  * See header file for description.
  */
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	interrupt. */
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
 
-	/* Offset added to account for the way the MCU uses the stack on entry/exit
-	of interrupts, and to ensure alignment. */
-	pxTopOfStack--;
+    /* Offset added to account for the way the MCU uses the stack on entry/exit
+     * of interrupts, and to ensure alignment. */
+    pxTopOfStack--;
 
-	/* Sometimes the parameters are loaded from the stack. */
-	*pxTopOfStack = ( StackType_t ) pvParameters;
-	pxTopOfStack--;
+    /* Sometimes the parameters are loaded from the stack. */
+    *pxTopOfStack = ( StackType_t ) pvParameters;
+    pxTopOfStack--;
 
-	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) pxCode;	/* PC */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
+    *pxTopOfStack = portINITIAL_XPSR;                        /* xPSR */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) pxCode;                  /* PC */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
 
-	/* Save code space by skipping register initialisation. */
-	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
-	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
+    /* Save code space by skipping register initialisation. */
+    pxTopOfStack -= 5;                            /* R12, R3, R2 and R1. */
+    *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
 
-	/* A save method is being used that requires each task to maintain its
-	own exec return value. */
-	pxTopOfStack--;
-	*pxTopOfStack = portINITIAL_EXC_RETURN;
+    /* A save method is being used that requires each task to maintain its
+     * own exec return value. */
+    pxTopOfStack--;
+    *pxTopOfStack = portINITIAL_EXC_RETURN;
 
-	pxTopOfStack -= 8;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
+    pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
 
-	return pxTopOfStack;
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 static void prvTaskExitError( void )
 {
-	/* A function that implements a task must not exit or attempt to return to
-	its caller as there is nothing to return to.  If a task wants to exit it
-	should instead call vTaskDelete( NULL ).
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to.  If a task wants to exit it
+     * should instead call vTaskDelete( NULL ).
+     *
+     * Artificially force an assert() to be triggered if configASSERT() is
+     * defined, then stop here so application writers can catch the error. */
+    configASSERT( uxCriticalNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
 
-	Artificially force an assert() to be triggered if configASSERT() is
-	defined, then stop here so application writers can catch the error. */
-	configASSERT( uxCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
-	for( ;; );
+    for( ; ; )
+    {
+    }
 }
 /*-----------------------------------------------------------*/
 
 void vPortSVCHandler( void ) iv IVT_INT_SVCall ics ICS_OFF
 {
-	__asm {
-			ldr r3, =_pxCurrentTCB  /* Restore the context. */
-			ldr r1, [r3]			/* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
-			ldr r0, [r1]			/* The first item in pxCurrentTCB is the task top of stack. */
-			ldm r0!, (r4-r11, r14)/* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
-			msr psp, r0				/* Restore the task stack pointer. */
-			isb
-			mov r0, #0
-			msr basepri, r0
-			bx r14
-	};
+    __asm {
+/* *INDENT-OFF* */
+        ldr r3, =_pxCurrentTCB     /* Restore the context. */
+        ldr r1, [ r3 ]    /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
+        ldr r0, [ r1 ]              /* The first item in pxCurrentTCB is the task top of stack. */
+        ldm r0 !, ( r4 - r11, r14 ) /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
+        msr psp, r0                 /* Restore the task stack pointer. */
+        isb
+        mov r0, #0
+        msr basepri, r0
+        bx r14
+/* *INDENT-ON* */
+    };
 }
 /*-----------------------------------------------------------*/
 
 static void prvPortStartFirstTask( void )
 {
-	__asm {
-				ldr r0, =0xE000ED08	 /* Use the NVIC offset register to locate the stack. */
-				ldr r0, [r0]
-				ldr r0, [r0]
-				msr msp, r0			 /* Set the msp back to the start of the stack. */
-				/* Clear the bit that indicates the FPU is in use in case the FPU was used
-				before the scheduler was started - which would otherwise result in the
-				unnecessary leaving of space in the SVC stack for lazy saving of FPU
-				registers. */
-				mov r0, #0
-				msr control, r0
-				cpsie i				 /* Globally enable interrupts. */
-				cpsie f
-				dsb
-				isb
-				svc #0					/* System call to start first task. */
-				nop
-			};
+    __asm {
+/* *INDENT-OFF* */
+        ldr r0, =0xE000ED08 /* Use the NVIC offset register to locate the stack. */
+        ldr r0, [ r0 ]
+        ldr r0, [ r0 ]
+        msr msp, r0 /* Set the msp back to the start of the stack. */
+
+        /* Clear the bit that indicates the FPU is in use in case the FPU was used
+         * before the scheduler was started - which would otherwise result in the
+         * unnecessary leaving of space in the SVC stack for lazy saving of FPU
+         * registers. */
+        mov r0, #0
+        msr control, r0
+        cpsie i /* Globally enable interrupts. */
+        cpsie f
+        dsb
+        isb
+        svc #0 /* System call to start first task. */
+        nop
+/* *INDENT-ON* */
+    };
 }
 /*-----------------------------------------------------------*/
 
@@ -281,508 +291,549 @@ static void prvPortStartFirstTask( void )
  */
 BaseType_t xPortStartScheduler( void )
 {
-	/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
-	See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
-	configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
+    /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
+     * See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
+    configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
 
-	#if( configASSERT_DEFINED == 1 )
-	{
-		volatile uint32_t ulOriginalPriority;
-		volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
-		volatile uint8_t ucMaxPriorityValue;
+    #if ( configASSERT_DEFINED == 1 )
+        {
+            volatile uint32_t ulOriginalPriority;
+            volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
+            volatile uint8_t ucMaxPriorityValue;
 
-		/* Determine the maximum priority from which ISR safe FreeRTOS API
-		functions can be called.  ISR safe functions are those that end in
-		"FromISR".  FreeRTOS maintains separate thread and ISR API functions to
-		ensure interrupt entry is as fast and simple as possible.
+            /* Determine the maximum priority from which ISR safe FreeRTOS API
+             * functions can be called.  ISR safe functions are those that end in
+             * "FromISR".  FreeRTOS maintains separate thread and ISR API functions to
+             * ensure interrupt entry is as fast and simple as possible.
+             *
+             * Save the interrupt priority value that is about to be clobbered. */
+            ulOriginalPriority = *pucFirstUserPriorityRegister;
 
-		Save the interrupt priority value that is about to be clobbered. */
-		ulOriginalPriority = *pucFirstUserPriorityRegister;
+            /* Determine the number of priority bits available.  First write to all
+             * possible bits. */
+            *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
 
-		/* Determine the number of priority bits available.  First write to all
-		possible bits. */
-		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
+            /* Read the value back to see how many bits stuck. */
+            ucMaxPriorityValue = *pucFirstUserPriorityRegister;
 
-		/* Read the value back to see how many bits stuck. */
-		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
+            /* The kernel interrupt priority should be set to the lowest
+             * priority. */
+            configASSERT( ucMaxPriorityValue == ( configKERNEL_INTERRUPT_PRIORITY & ucMaxPriorityValue ) );
 
-		/* The kernel interrupt priority should be set to the lowest
-		priority. */
-		configASSERT( ucMaxPriorityValue == ( configKERNEL_INTERRUPT_PRIORITY & ucMaxPriorityValue ) );
+            /* Use the same mask on the maximum system call priority. */
+            ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
 
-		/* Use the same mask on the maximum system call priority. */
-		ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
+            /* Calculate the maximum acceptable priority group value for the number
+             * of bits read back. */
+            ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
 
-		/* Calculate the maximum acceptable priority group value for the number
-		of bits read back. */
-		ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
-		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
-		{
-			ulMaxPRIGROUPValue--;
-			ucMaxPriorityValue <<= ( uint8_t ) 0x01;
-		}
+            while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
+            {
+                ulMaxPRIGROUPValue--;
+                ucMaxPriorityValue <<= ( uint8_t ) 0x01;
+            }
 
-		#ifdef __NVIC_PRIO_BITS
-		{
-			/* Check the CMSIS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
-		}
-		#endif
+            #ifdef __NVIC_PRIO_BITS
+                {
+                    /* Check the CMSIS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
+                }
+            #endif
 
-		#ifdef configPRIO_BITS
-		{
-			/* Check the FreeRTOS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
-		}
-		#endif
+            #ifdef configPRIO_BITS
+                {
+                    /* Check the FreeRTOS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
+                }
+            #endif
 
-		/* Shift the priority group value back to its position within the AIRCR
-		register. */
-		ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
-		ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
+            /* Shift the priority group value back to its position within the AIRCR
+             * register. */
+            ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
+            ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
 
-		/* Restore the clobbered interrupt priority register to its original
-		value. */
-		*pucFirstUserPriorityRegister = ulOriginalPriority;
-	}
-	#endif /* conifgASSERT_DEFINED */
+            /* Restore the clobbered interrupt priority register to its original
+             * value. */
+            *pucFirstUserPriorityRegister = ulOriginalPriority;
+        }
+    #endif /* conifgASSERT_DEFINED */
 
-	/* Make PendSV and SysTick the lowest priority interrupts. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+    /* Make PendSV and SysTick the lowest priority interrupts. */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
-	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-	here already. */
-	vPortSetupTimerInterrupt();
+    /* Start the timer that generates the tick ISR.  Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
 
-	/* Initialise the critical nesting count ready for the first task. */
-	uxCriticalNesting = 0;
+    /* Initialise the critical nesting count ready for the first task. */
+    uxCriticalNesting = 0;
 
-	/* Ensure the VFP is enabled - it should be anyway. */
-	vPortEnableVFP();
+    /* Ensure the VFP is enabled - it should be anyway. */
+    vPortEnableVFP();
 
-	/* Lazy save always. */
-	*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
+    /* Lazy save always. */
+    *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
 
-	/* Start the first task. */
-	prvPortStartFirstTask();
+    /* Start the first task. */
+    prvPortStartFirstTask();
 
-	/* Should never get here as the tasks will now be executing!  Call the task
-	exit error function to prevent compiler warnings about a static function
-	not being called in the case that the application writer overrides this
-	functionality by defining configTASK_RETURN_ADDRESS. */
-	prvTaskExitError();
+    /* Should never get here as the tasks will now be executing!  Call the task
+     * exit error function to prevent compiler warnings about a static function
+     * not being called in the case that the application writer overrides this
+     * functionality by defining configTASK_RETURN_ADDRESS. */
+    prvTaskExitError();
 
-	/* Should not get here! */
-	return 0;
+    /* Should not get here! */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void )
 {
-	/* Not implemented in ports where there is nothing to return to.
-	Artificially force an assert. */
-	configASSERT( uxCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( uxCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void )
 {
-	portDISABLE_INTERRUPTS();
-	uxCriticalNesting++;
+    portDISABLE_INTERRUPTS();
+    uxCriticalNesting++;
 
-	/* This is not the interrupt safe version of the enter critical function so
-	assert() if it is being called from an interrupt context.  Only API
-	functions that end in "FromISR" can be used in an interrupt.  Only assert if
-	the critical nesting count is 1 to protect against recursive calls if the
-	assert function also uses a critical section. */
-	if( uxCriticalNesting == 1 )
-	{
-		configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
-	}
+    /* This is not the interrupt safe version of the enter critical function so
+     * assert() if it is being called from an interrupt context.  Only API
+     * functions that end in "FromISR" can be used in an interrupt.  Only assert if
+     * the critical nesting count is 1 to protect against recursive calls if the
+     * assert function also uses a critical section. */
+    if( uxCriticalNesting == 1 )
+    {
+        configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
+    }
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void )
 {
-	configASSERT( uxCriticalNesting );
-	uxCriticalNesting--;
-	if( uxCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
+    configASSERT( uxCriticalNesting );
+    uxCriticalNesting--;
+
+    if( uxCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
 }
 /*-----------------------------------------------------------*/
 
 const uint8_t ucMaxSyscallInterruptPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY;
 void xPortPendSVHandler( void ) iv IVT_INT_PendSV ics ICS_OFF
 {
-	__asm {
-#ifdef HW_DEBUG
-				/* The function is not truly naked, so add back the 4 bytes subtracted
-				from the stack pointer by the function prologue. */
-		add sp, sp, #4
-#endif
-	mrs r0, psp
-	isb
+    __asm {
+        #ifdef HW_DEBUG
+/* *INDENT-OFF* */
 
-	ldr	r3, =_pxCurrentTCB		 /* Get the location of the current TCB. */
-	ldr	r2, [r3]
+            /* The function is not truly naked, so add back the 4 bytes subtracted
+            * from the stack pointer by the function prologue. */
+            add sp, sp, # 4
+        #endif
+        mrs r0, psp
+        isb
 
-	tst r14, #0x10			 /* Is the task using the FPU context?  If so, push high vfp registers. */
-	it eq
-	vstmdbeq r0!, (s16-s31)
+        ldr r3, =_pxCurrentTCB /* Get the location of the current TCB. */
+        ldr r2, [ r3 ]
 
-	stmdb r0!, (r4-r11, r14)		 /* Save the core registers. */
+        tst r14, #0x10 /* Is the task using the FPU context?  If so, push high vfp registers. */
+        it eq
+        vstmdbeq r0 !, ( s16 - s31 )
 
-	str r0, [r2]			 /* Save the new top of stack into the first member of the TCB. */
+        stmdb r0 !, ( r4 - r11, r14 ) /* Save the core registers. */
 
-	stmdb sp!, (r0, r3)
-	ldr r0, =_ucMaxSyscallInterruptPriority
-	ldr r1, [r0]
-	msr basepri, r1
-	dsb
-	isb
-	bl _vTaskSwitchContext
-	mov r0, #0
-	msr basepri, r0
-	ldm sp!, (r0, r3)
+        str r0, [ r2 ]                /* Save the new top of stack into the first member of the TCB. */
 
-	ldr r1, [r3]			 /* The first item in pxCurrentTCB is the task top of stack. */
-	ldr r0, [r1]
+        stmdb sp !, ( r0, r3 )
+        ldr r0, = _ucMaxSyscallInterruptPriority
+        ldr r1, [ r0 ]
+        msr basepri, r1
+        dsb
+        isb
+        bl _vTaskSwitchContext
+        mov r0, #0
+        msr basepri, r0
+        ldm sp !, ( r0, r3 )
 
-	ldm r0!, (r4-r11, r14)		 /* Pop the core registers. */
+        ldr r1, [ r3 ] /* The first item in pxCurrentTCB is the task top of stack. */
+        ldr r0, [ r1 ]
 
-	tst r14, #0x10			 /* Is the task using the FPU context?  If so, pop the high vfp registers too. */
-	it eq
-	vldmiaeq r0!, (s16-s31)
+        ldm r0 !, ( r4 - r11, r14 ) /* Pop the core registers. */
 
-	msr psp, r0
-	isb
-	bx r14
-	}
+        tst r14, #0x10             /* Is the task using the FPU context?  If so, pop the high vfp registers too. */
+        it eq
+        vldmiaeq r0 !, ( s16 - s31 )
+
+        msr psp, r0
+        isb
+        bx r14
+/* *INDENT-ON* */
+    }
 }
 /*-----------------------------------------------------------*/
 
 void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO
 {
-	/* The SysTick runs at the lowest interrupt priority, so when this interrupt
-	executes all interrupts must be unmasked.  There is therefore no need to
-	save and then restore the interrupt mask value as its value is already
-	known - therefore the slightly faster portDISABLE_INTERRUPTS() function is
-	used in place of portSET_INTERRUPT_MASK_FROM_ISR(). */
-	portDISABLE_INTERRUPTS();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* A context switch is required.  Context switching is performed in
-			the PendSV interrupt.  Pend the PendSV interrupt. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portENABLE_INTERRUPTS();
+    /* The SysTick runs at the lowest interrupt priority, so when this interrupt
+     * executes all interrupts must be unmasked.  There is therefore no need to
+     * save and then restore the interrupt mask value as its value is already
+     * known - therefore the slightly faster portDISABLE_INTERRUPTS() function is
+     * used in place of portSET_INTERRUPT_MASK_FROM_ISR(). */
+    portDISABLE_INTERRUPTS();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* A context switch is required.  Context switching is performed in
+             * the PendSV interrupt.  Pend the PendSV interrupt. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+    portENABLE_INTERRUPTS();
 }
 /*-----------------------------------------------------------*/
 
-#if( ( configUSE_TICKLESS_IDLE == 1 ) && ( configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0 ) )
+    #if ( ( configUSE_TICKLESS_IDLE == 1 ) && ( configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0 ) )
 
-	void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-	{
-	uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
-	TickType_t xModifiableIdleTime;
+    void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+    {
+        uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+        TickType_t xModifiableIdleTime;
 
-		/* Make sure the SysTick reload value does not overflow the counter. */
-		if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-		{
-			xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-		}
+        /* Make sure the SysTick reload value does not overflow the counter. */
+        if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+        {
+            xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+        }
 
-		/* Stop the SysTick momentarily.  The time the SysTick is stopped for
-		is accounted for as best it can be, but using the tickless mode will
-		inevitably result in some tiny drift of the time maintained by the
-		kernel with respect to calendar time. */
-		portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+        /* Stop the SysTick momentarily.  The time the SysTick is stopped for
+         * is accounted for as best it can be, but using the tickless mode will
+         * inevitably result in some tiny drift of the time maintained by the
+         * kernel with respect to calendar time. */
+        portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
 
-		/* Calculate the reload value required to wait xExpectedIdleTime
-		tick periods.  -1 is used because this code will execute part way
-		through one of the tick periods. */
-		ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-		if( ulReloadValue > ulStoppedTimerCompensation )
-		{
-			ulReloadValue -= ulStoppedTimerCompensation;
-		}
+        /* Calculate the reload value required to wait xExpectedIdleTime
+         * tick periods.  -1 is used because this code will execute part way
+         * through one of the tick periods. */
+        ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
 
-		/* Enter a critical section but don't use the taskENTER_CRITICAL()
-		method as that will mask interrupts that should exit sleep mode. */
-		__asm { "cpsid i" };
-		__asm { "dsb" };
-		__asm { "isb" };
+        if( ulReloadValue > ulStoppedTimerCompensation )
+        {
+            ulReloadValue -= ulStoppedTimerCompensation;
+        }
 
-		/* If a context switch is pending or a task is waiting for the scheduler
-		to be unsuspended then abandon the low power entry. */
-		if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-		{
-			/* Restart from whatever is left in the count register to complete
-			this tick period. */
-			portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+        /* Enter a critical section but don't use the taskENTER_CRITICAL()
+         * method as that will mask interrupts that should exit sleep mode. */
+        __asm {
+            "cpsid i"
+        };
+        __asm {
+            "dsb"
+        };
+        __asm {
+            "isb"
+        };
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+        /* If a context switch is pending or a task is waiting for the scheduler
+         * to be unsuspended then abandon the low power entry. */
+        if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+        {
+            /* Restart from whatever is left in the count register to complete
+             * this tick period. */
+            portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Reset the reload register to the value required for normal tick
-			periods. */
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts - see comments above the cpsid instruction()
-			above. */
-			__asm { "cpsie i" };
-		}
-		else
-		{
-			/* Set the new reload value. */
-			portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+            /* Reset the reload register to the value required for normal tick
+             * periods. */
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
 
-			/* Clear the SysTick count flag and set the count value back to
-			zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            /* Re-enable interrupts - see comments above the cpsid instruction()
+             * above. */
+            __asm {
+                "cpsie i"
+            };
+        }
+        else
+        {
+            /* Set the new reload value. */
+            portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            /* Clear the SysTick count flag and set the count value back to
+             * zero. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-			/* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
-			set its parameter to 0 to indicate that its implementation contains
-			its own wait for interrupt or wait for event instruction, and so wfi
-			should not be executed again.  However, the original expected idle
-			time variable must remain unmodified, so a copy is taken. */
-			xModifiableIdleTime = xExpectedIdleTime;
-			configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-			if( xModifiableIdleTime > 0 )
-			{
-				__asm { "dsb" };
-				__asm { "wfi" };
-				__asm { "isb" };
-			}
-			configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts to allow the interrupt that brought the MCU
-			out of sleep mode to execute immediately.  see comments above
-			__disable_interrupt() call above. */
-			__asm { "cpsie i" };
-			__asm { "dsb" };
-			__asm { "isb" };
+            /* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
+             * set its parameter to 0 to indicate that its implementation contains
+             * its own wait for interrupt or wait for event instruction, and so wfi
+             * should not be executed again.  However, the original expected idle
+             * time variable must remain unmodified, so a copy is taken. */
+            xModifiableIdleTime = xExpectedIdleTime;
+            configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
 
-			/* Disable interrupts again because the clock is about to be stopped
-			and interrupts that execute while the clock is stopped will increase
-			any slippage between the time maintained by the RTOS and calendar
-			time. */
-			__asm { "cpsid i" };
-			__asm { "dsb" };
-			__asm { "isb" };
+            if( xModifiableIdleTime > 0 )
+            {
+                __asm {
+                    "dsb"
+                };
+                __asm {
+                    "wfi"
+                };
+                __asm {
+                    "isb"
+                };
+            }
 
-			/* Disable the SysTick clock without reading the
-			portNVIC_SYSTICK_CTRL_REG register to ensure the
-			portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
-			the time the SysTick is stopped for is accounted for as best it can
-			be, but using the tickless mode will inevitably result in some tiny
-			drift of the time maintained by the kernel with respect to calendar
-			time*/
-			portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+            configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
 
-			/* Determine if the SysTick clock has already counted to zero and
-			been set back to the current reload value (the reload back being
-			correct for the entire expected idle time) or if the SysTick is yet
-			to count to zero (in which case an interrupt other than the SysTick
-			must have brought the system out of sleep mode). */
-			if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-			{
-				uint32_t ulCalculatedLoadValue;
+            /* Re-enable interrupts to allow the interrupt that brought the MCU
+             * out of sleep mode to execute immediately.  see comments above
+             * __disable_interrupt() call above. */
+            __asm {
+                "cpsie i"
+            };
+            __asm {
+                "dsb"
+            };
+            __asm {
+                "isb"
+            };
 
-				/* The tick interrupt is already pending, and the SysTick count
-				reloaded with ulReloadValue.  Reset the
-				portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
-				period. */
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+            /* Disable interrupts again because the clock is about to be stopped
+             * and interrupts that execute while the clock is stopped will increase
+             * any slippage between the time maintained by the RTOS and calendar
+             * time. */
+            __asm {
+                "cpsid i"
+            };
+            __asm {
+                "dsb"
+            };
+            __asm {
+                "isb"
+            };
 
-				/* Don't allow a tiny value, or values that have somehow
-				underflowed because the post sleep hook did something
-				that took too long. */
-				if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-				{
-					ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-				}
+            /* Disable the SysTick clock without reading the
+             * portNVIC_SYSTICK_CTRL_REG register to ensure the
+             * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
+             * the time the SysTick is stopped for is accounted for as best it can
+             * be, but using the tickless mode will inevitably result in some tiny
+             * drift of the time maintained by the kernel with respect to calendar
+             * time*/
+            portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
 
-				portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+            /* Determine if the SysTick clock has already counted to zero and
+             * been set back to the current reload value (the reload back being
+             * correct for the entire expected idle time) or if the SysTick is yet
+             * to count to zero (in which case an interrupt other than the SysTick
+             * must have brought the system out of sleep mode). */
+            if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+            {
+                uint32_t ulCalculatedLoadValue;
 
-				/* As the pending tick will be processed as soon as this
-				function exits, the tick value maintained by the tick is stepped
-				forward by one less than the time spent waiting. */
-				ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-			}
-			else
-			{
-				/* Something other than the tick interrupt ended the sleep.
-				Work out how long the sleep lasted rounded to complete tick
-				periods (not the ulReload value which accounted for part
-				ticks). */
-				ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+                /* The tick interrupt is already pending, and the SysTick count
+                 * reloaded with ulReloadValue.  Reset the
+                 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+                 * period. */
+                ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
 
-				/* How many complete tick periods passed while the processor
-				was waiting? */
-				ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+                /* Don't allow a tiny value, or values that have somehow
+                 * underflowed because the post sleep hook did something
+                 * that took too long. */
+                if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+                {
+                    ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+                }
 
-				/* The reload value is set to whatever fraction of a single tick
-				period remains. */
-				portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-			}
+                portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
 
-			/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
-			again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
-			value. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-			vTaskStepTick( ulCompleteTickPeriods );
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+                /* As the pending tick will be processed as soon as this
+                 * function exits, the tick value maintained by the tick is stepped
+                 * forward by one less than the time spent waiting. */
+                ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+            }
+            else
+            {
+                /* Something other than the tick interrupt ended the sleep.
+                 * Work out how long the sleep lasted rounded to complete tick
+                 * periods (not the ulReload value which accounted for part
+                 * ticks). */
+                ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Exit with interrupts enabled. */
-			__asm { "cpsie i" };
-		}
-	}
+                /* How many complete tick periods passed while the processor
+                 * was waiting? */
+                ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
 
-#endif /* #if configUSE_TICKLESS_IDLE */
+                /* The reload value is set to whatever fraction of a single tick
+                 * period remains. */
+                portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+            }
+
+            /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+             * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+             * value. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            vTaskStepTick( ulCompleteTickPeriods );
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Exit with interrupts enabled. */
+            __asm {
+                "cpsie i"
+            };
+        }
+    }
+
+    #endif /* #if configUSE_TICKLESS_IDLE */
 /*-----------------------------------------------------------*/
 
 /*
  * Setup the systick timer to generate the tick interrupts at the required
  * frequency.
  */
-#if( configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0 )
+    #if ( configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0 )
 
-	void vPortSetupTimerInterrupt( void )
-	{
-			/* Calculate the constants required to configure the tick interrupt. */
-			#if( configUSE_TICKLESS_IDLE == 1 )
-			{
-					ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
-					xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-					ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
-			}
-			#endif /* configUSE_TICKLESS_IDLE */
+    void vPortSetupTimerInterrupt( void )
+    {
+        /* Calculate the constants required to configure the tick interrupt. */
+        #if ( configUSE_TICKLESS_IDLE == 1 )
+            {
+                ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+                xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+                ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+            }
+        #endif /* configUSE_TICKLESS_IDLE */
 
-			/* Reset SysTick. */
-			portNVIC_SYSTICK_CTRL_REG = 0UL;
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+        /* Reset SysTick. */
+        portNVIC_SYSTICK_CTRL_REG = 0UL;
+        portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-			/* Configure SysTick to interrupt at the requested rate. */
-			portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-			portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
-	}
+        /* Configure SysTick to interrupt at the requested rate. */
+        portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+        portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
+    }
 
-#endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */
+    #endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */
 /*-----------------------------------------------------------*/
 
 /* This is a naked function. */
 static void vPortEnableVFP( void )
 {
-	__asm {
-			ldr r0, =0xE000ED88			 /* The FPU enable bits are in the CPACR. */
-			ldr r1, [r0]
+    __asm {
+/* *INDENT-OFF* */
+        ldr r0, =0xE000ED88 /* The FPU enable bits are in the CPACR. */
+        ldr r1, [ r0 ]
 
-			orr r1, r1, #0xF00000		 /* Enable CP10 and CP11 coprocessors, then save back. */
-			str r1, [r0]
-			bx r14
-	};
+        orr r1, r1, #0xF00000 /* Enable CP10 and CP11 coprocessors, then save back. */
+        str r1, [ r0 ]
+        bx r14
+/* *INDENT-ON* */
+    };
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xPortIsInsideInterrupt( void )
 {
-BaseType_t xReturn;
+    BaseType_t xReturn;
 
-	/* Obtain the number of the currently executing interrupt. */
-	if( CPU_REG_GET( CPU_IPSR ) == 0 )
-	{
-		xReturn = pdFALSE;
-	}
-	else
-	{
-		xReturn = pdTRUE;
-	}
+    /* Obtain the number of the currently executing interrupt. */
+    if( CPU_REG_GET( CPU_IPSR ) == 0 )
+    {
+        xReturn = pdFALSE;
+    }
+    else
+    {
+        xReturn = pdTRUE;
+    }
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
-#if( configASSERT_DEFINED == 1 )
+    #if ( configASSERT_DEFINED == 1 )
 
-	/* Limitations in the MikroC inline asm means ulCurrentInterrupt has to be
-	global - which makes vPortValidateInterruptPriority() non re-entrant.
-	However that should not matter as an interrupt can only itself be
-	interrupted by a higher priority interrupt.  That means if
-	ulCurrentInterrupt, so ulCurrentInterrupt getting corrupted cannot lead to
-	an invalid interrupt priority being missed. */
-	uint32_t ulCurrentInterrupt;
-	uint8_t ucCurrentPriority;
-	void vPortValidateInterruptPriority( void )
-	{
-		/* Obtain the number of the currently executing interrupt. */
-		__asm { push (r0, r1)
-				mrs r0, ipsr
-				ldr r1, =_ulCurrentInterrupt
-				str r0, [r1]
-				pop (r0, r1)
-		};
+/* Limitations in the MikroC inline asm means ulCurrentInterrupt has to be
+ * global - which makes vPortValidateInterruptPriority() non re-entrant.
+ * However that should not matter as an interrupt can only itself be
+ * interrupted by a higher priority interrupt.  That means if
+ * ulCurrentInterrupt, so ulCurrentInterrupt getting corrupted cannot lead to
+ * an invalid interrupt priority being missed. */
+    uint32_t ulCurrentInterrupt;
+    uint8_t ucCurrentPriority;
+    void vPortValidateInterruptPriority( void )
+    {
+        /* Obtain the number of the currently executing interrupt. */
+        __asm {
+/* *INDENT-OFF* */
+            push( r0, r1 )
+            mrs r0, ipsr
+            ldr r1, =_ulCurrentInterrupt
+            str r0, [ r1 ]
+            pop( r0, r1 )
+/* *INDENT-ON* */
+        };
 
-		/* Is the interrupt number a user defined interrupt? */
-		if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
-		{
-			/* Look up the interrupt's priority. */
-			ucCurrentPriority = *( ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + ulCurrentInterrupt ) );
+        /* Is the interrupt number a user defined interrupt? */
+        if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
+        {
+            /* Look up the interrupt's priority. */
+            ucCurrentPriority = *( ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + ulCurrentInterrupt ) );
 
-			/* The following assertion will fail if a service routine (ISR) for
-			an interrupt that has been assigned a priority above
-			configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
-			function.  ISR safe FreeRTOS API functions must *only* be called
-			from interrupts that have been assigned a priority at or below
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
+            /* The following assertion will fail if a service routine (ISR) for
+             * an interrupt that has been assigned a priority above
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
+             * function.  ISR safe FreeRTOS API functions must *only* be called
+             * from interrupts that have been assigned a priority at or below
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Numerically low interrupt priority numbers represent logically high
+             * interrupt priorities, therefore the priority of the interrupt must
+             * be set to a value equal to or numerically *higher* than
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Interrupts that	use the FreeRTOS API must not be left at their
+             * default priority of	zero as that is the highest possible priority,
+             * which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
+             * and	therefore also guaranteed to be invalid.
+             *
+             * FreeRTOS maintains separate thread and ISR API functions to ensure
+             * interrupt entry is as fast and simple as possible.
+             *
+             * The following links provide detailed information:
+             * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+             * https://www.FreeRTOS.org/FAQHelp.html */
+            configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
+        }
 
-			Numerically low interrupt priority numbers represent logically high
-			interrupt priorities, therefore the priority of the interrupt must
-			be set to a value equal to or numerically *higher* than
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
+        /* Priority grouping:  The interrupt controller (NVIC) allows the bits
+         * that define each interrupt's priority to be split between bits that
+         * define the interrupt's pre-emption priority bits and bits that define
+         * the interrupt's sub-priority.  For simplicity all bits must be defined
+         * to be pre-emption priority bits.  The following assertion will fail if
+         * this is not the case (if some bits represent a sub-priority).
+         *
+         * If the application only uses CMSIS libraries for interrupt
+         * configuration then the correct setting can be achieved on all Cortex-M
+         * devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
+         * scheduler.  Note however that some vendor specific peripheral libraries
+         * assume a non-zero priority group setting, in which cases using a value
+         * of zero will result in unpredictable behaviour. */
+        configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
+    }
 
-			Interrupts that	use the FreeRTOS API must not be left at their
-			default priority of	zero as that is the highest possible priority,
-			which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
-			and	therefore also guaranteed to be invalid.
-
-			FreeRTOS maintains separate thread and ISR API functions to ensure
-			interrupt entry is as fast and simple as possible.
-
-			The following links provide detailed information:
-			http://www.freertos.org/RTOS-Cortex-M3-M4.html
-			http://www.freertos.org/FAQHelp.html */
-			configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
-		}
-
-		/* Priority grouping:  The interrupt controller (NVIC) allows the bits
-		that define each interrupt's priority to be split between bits that
-		define the interrupt's pre-emption priority bits and bits that define
-		the interrupt's sub-priority.  For simplicity all bits must be defined
-		to be pre-emption priority bits.  The following assertion will fail if
-		this is not the case (if some bits represent a sub-priority).
-
-		If the application only uses CMSIS libraries for interrupt
-		configuration then the correct setting can be achieved on all Cortex-M
-		devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
-		scheduler.  Note however that some vendor specific peripheral libraries
-		assume a non-zero priority group setting, in which cases using a value
-		of zero will result in unpredictable behaviour. */
-		configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
-	}
-
-#endif /* configASSERT_DEFINED */
\ No newline at end of file
+    #endif /* configASSERT_DEFINED */
diff --git a/portable/MikroC/ARM_CM4F/portmacro.h b/portable/MikroC/ARM_CM4F/portmacro.h
index 8758c072b..7b78e09ea 100644
--- a/portable/MikroC/ARM_CM4F/portmacro.h
+++ b/portable/MikroC/ARM_CM4F/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,18 +19,18 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -43,146 +43,147 @@ extern "C" {
  */
 
 /* The compiler needs to be told functions that are only referenced by pointer
-are to be included in the build.  NOTE:  Omitting these lines will result in a
-run-time crash, not a linker error! */
-#pragma funcall vTaskStartScheduler prvIdleTask
-#pragma funcall xTimerCreateTimerTask prvTimerTask
+ * are to be included in the build.  NOTE:  Omitting these lines will result in a
+ * run-time crash, not a linker error! */
+    #pragma funcall vTaskStartScheduler prvIdleTask
+    #pragma funcall xTimerCreateTimerTask prvTimerTask
 
 /* Type definitions. */
-#define portCHAR        char
-#define portFLOAT        float
-#define portDOUBLE        double
-#define portLONG        long
-#define portSHORT        short
-#define portSTACK_TYPE    uint32_t
-#define portBASE_TYPE    long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE StackType_t;
-typedef long BaseType_t;
-typedef unsigned long UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-    typedef uint16_t TickType_t;
-    #define portMAX_DELAY ( TickType_t ) 0xffff
-#else
-    typedef uint32_t TickType_t;
-    #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-    /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-    not need to be guarded with a critical section. */
-    #define portTICK_TYPE_IS_ATOMIC 1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Architecture specifics. */
-#define portSTACK_GROWTH            ( -1 )
-#define portTICK_PERIOD_MS            ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT            8
+    #define portSTACK_GROWTH      ( -1 )
+    #define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT    8
 /*-----------------------------------------------------------*/
 
 /* Scheduler utilities. */
-#define portYIELD()                                                             \
-{                                                                                \
-    /* Set a PendSV to request a context switch. */                                \
-    portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;                                \
-                                                                                \
-    /* Barriers are normally not required but do ensure the code is completely    \
-    within the specified behaviour for the architecture. */                        \
-  __asm{ dsb  };                       \
-  __asm{ isb };                      \
-}
+    #define portYIELD()                                 \
+    {                                                   \
+        /* Set a PendSV to request a context switch. */ \
+        portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
+                                                        \
+        /* Barriers are normally not required but do ensure the code is completely \
+         * within the specified behaviour for the architecture. */ \
+        __asm{ dsb };                                              \
+        __asm{ isb };                                              \
+    }
 
-#define portNVIC_INT_CTRL_REG        ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT        ( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()
-#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired != pdFALSE ) portYIELD()
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /* Critical section management. */
-extern void vPortEnterCritical( void );
-extern void vPortExitCritical( void );
-#define portDISABLE_INTERRUPTS()                CPU_REG_SET( CPU_BASEPRI, configMAX_SYSCALL_INTERRUPT_PRIORITY ); __asm{ dsb }; __asm{ isb }
-#define portENABLE_INTERRUPTS()                    CPU_REG_SET( CPU_BASEPRI, 0 );
-#define portENTER_CRITICAL()                    vPortEnterCritical()
-#define portEXIT_CRITICAL()                        vPortExitCritical()
-#define portSET_INTERRUPT_MASK_FROM_ISR()        ulPortRaiseBASEPRI()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)    CPU_REG_SET( CPU_BASEPRI, x ); /* Barrier instructions not used as this is only used to lower the basepri. */
+    extern void vPortEnterCritical( void );
+    extern void vPortExitCritical( void );
+    #define portDISABLE_INTERRUPTS()                  CPU_REG_SET( CPU_BASEPRI, configMAX_SYSCALL_INTERRUPT_PRIORITY ); __asm{ dsb }; __asm{ isb }
+    #define portENABLE_INTERRUPTS()                   CPU_REG_SET( CPU_BASEPRI, 0 );
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulPortRaiseBASEPRI()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    CPU_REG_SET( CPU_BASEPRI, x ); /* Barrier instructions not used as this is only used to lower the basepri. */
 
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site.  These are
-not necessary for to use this port.  They are defined so the common demo files
-(which build with all the ports) will build. */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+ * not necessary for to use this port.  They are defined so the common demo files
+ * (which build with all the ports) will build. */
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
 /* Tickless idle/low power functionality. */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-    extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-    #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Architecture specific optimisations. */
-#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
-    #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
-#endif
-
-#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
-
-    /* Generic helper function. */
-    __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
-    {
-    uint8_t ucReturn;
-
-        __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) );
-        return ucReturn;
-    }
-
-    /* Check the configuration. */
-    #if( configMAX_PRIORITIES > 32 )
-        #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
+    #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
+        #define configUSE_PORT_OPTIMISED_TASK_SELECTION    1
     #endif
 
-    /* Store/clear the ready priorities in a bit map. */
-    #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
-    #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
+    #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
 
-    /*-----------------------------------------------------------*/
+/* Generic helper function. */
+        __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
+        {
+            uint8_t ucReturn;
 
-    #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
+            __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) );
 
-#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
+            return ucReturn;
+        }
+
+/* Check the configuration. */
+        #if ( configMAX_PRIORITIES > 32 )
+            #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
+        #endif
+
+/* Store/clear the ready priorities in a bit map. */
+        #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities )    ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
+        #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities )     ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
 
 /*-----------------------------------------------------------*/
 
-#ifdef configASSERT
-    void vPortValidateInterruptPriority( void );
-    #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()     vPortValidateInterruptPriority()
-#endif
+        #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities )    uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
+
+    #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
+
+/*-----------------------------------------------------------*/
+
+    #ifdef configASSERT
+        void vPortValidateInterruptPriority( void );
+        #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()    vPortValidateInterruptPriority()
+    #endif
 
 /* portNOP() is not required by this port. */
-#define portNOP()
+    #define portNOP()
 
-BaseType_t xPortIsInsideInterrupt( void );
+    BaseType_t xPortIsInsideInterrupt( void );
 
 /*-----------------------------------------------------------*/
 
-static inline uint32_t ulPortRaiseBASEPRI( void )
-{
-uint32_t ulOriginalBASEPRI;
+    static inline uint32_t ulPortRaiseBASEPRI( void )
+    {
+        uint32_t ulOriginalBASEPRI;
 
-	ulOriginalBASEPRI = CPU_REG_GET( CPU_BASEPRI );
-	CPU_REG_SET( CPU_BASEPRI, configMAX_SYSCALL_INTERRUPT_PRIORITY );
-	__asm{ dsb };
-	__asm{ isb };
-	return ulOriginalBASEPRI;
-}
+        ulOriginalBASEPRI = CPU_REG_GET( CPU_BASEPRI );
+        CPU_REG_SET( CPU_BASEPRI, configMAX_SYSCALL_INTERRUPT_PRIORITY );
+        __asm{ dsb };
+        __asm{ isb };
+        return ulOriginalBASEPRI;
+    }
 /*-----------------------------------------------------------*/
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
-#endif /* PORTMACRO_H */
\ No newline at end of file
+#endif /* PORTMACRO_H */
diff --git a/portable/Paradigm/Tern_EE/large_untested/port.c b/portable/Paradigm/Tern_EE/large_untested/port.c
index fb727e0c9..74bc88058 100644
--- a/portable/Paradigm/Tern_EE/large_untested/port.c
+++ b/portable/Paradigm/Tern_EE/large_untested/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/Paradigm/Tern_EE/large_untested/portasm.h b/portable/Paradigm/Tern_EE/large_untested/portasm.h
index 9392f7bf6..91fe8e62d 100644
--- a/portable/Paradigm/Tern_EE/large_untested/portasm.h
+++ b/portable/Paradigm/Tern_EE/large_untested/portasm.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/Paradigm/Tern_EE/large_untested/portmacro.h b/portable/Paradigm/Tern_EE/large_untested/portmacro.h
index 354b000b5..a39d675ce 100644
--- a/portable/Paradigm/Tern_EE/large_untested/portmacro.h
+++ b/portable/Paradigm/Tern_EE/large_untested/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/Paradigm/Tern_EE/small/port.c b/portable/Paradigm/Tern_EE/small/port.c
index 6fdb9b896..e90b6f41b 100644
--- a/portable/Paradigm/Tern_EE/small/port.c
+++ b/portable/Paradigm/Tern_EE/small/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/Paradigm/Tern_EE/small/portasm.h b/portable/Paradigm/Tern_EE/small/portasm.h
index e2240629f..522b21f98 100644
--- a/portable/Paradigm/Tern_EE/small/portasm.h
+++ b/portable/Paradigm/Tern_EE/small/portasm.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/Paradigm/Tern_EE/small/portmacro.h b/portable/Paradigm/Tern_EE/small/portmacro.h
index fd3ca1db0..c21bc585f 100644
--- a/portable/Paradigm/Tern_EE/small/portmacro.h
+++ b/portable/Paradigm/Tern_EE/small/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/RVDS/ARM7_LPC21xx/port.c b/portable/RVDS/ARM7_LPC21xx/port.c
index b111f131b..921b9e60c 100644
--- a/portable/RVDS/ARM7_LPC21xx/port.c
+++ b/portable/RVDS/ARM7_LPC21xx/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/RVDS/ARM7_LPC21xx/portASM.s b/portable/RVDS/ARM7_LPC21xx/portASM.s
index f7a5e16be..71d0fb6ad 100644
--- a/portable/RVDS/ARM7_LPC21xx/portASM.s
+++ b/portable/RVDS/ARM7_LPC21xx/portASM.s
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/RVDS/ARM7_LPC21xx/portmacro.h b/portable/RVDS/ARM7_LPC21xx/portmacro.h
index 6f24ac70d..aec39d7b6 100644
--- a/portable/RVDS/ARM7_LPC21xx/portmacro.h
+++ b/portable/RVDS/ARM7_LPC21xx/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,19 +19,20 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 
 #ifndef PORTMACRO_H
 #define PORTMACRO_H
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
-extern "C" {
+    extern "C" {
 #endif
+/* *INDENT-ON* */
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -138,9 +139,11 @@ extern void vPortExitCritical( void );
 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
 #define portTASK_FUNCTION( vFunction, pvParameters )	void vFunction( void *pvParameters )
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
-}
+    }
 #endif
+/* *INDENT-ON* */
 
 #endif /* PORTMACRO_H */
 
diff --git a/portable/RVDS/ARM7_LPC21xx/portmacro.inc b/portable/RVDS/ARM7_LPC21xx/portmacro.inc
index 12e0071b9..3163e104d 100644
--- a/portable/RVDS/ARM7_LPC21xx/portmacro.inc
+++ b/portable/RVDS/ARM7_LPC21xx/portmacro.inc
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/RVDS/ARM_CA9/port.c b/portable/RVDS/ARM_CA9/port.c
index 250f31304..7933427f2 100644
--- a/portable/RVDS/ARM_CA9/port.c
+++ b/portable/RVDS/ARM_CA9/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -33,23 +33,23 @@
 #include "task.h"
 
 #ifndef configINTERRUPT_CONTROLLER_BASE_ADDRESS
-	#error configINTERRUPT_CONTROLLER_BASE_ADDRESS must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+	#error configINTERRUPT_CONTROLLER_BASE_ADDRESS must be defined.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif
 
 #ifndef configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET
-	#error configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+	#error configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET must be defined.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif
 
 #ifndef configUNIQUE_INTERRUPT_PRIORITIES
-	#error configUNIQUE_INTERRUPT_PRIORITIES must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+	#error configUNIQUE_INTERRUPT_PRIORITIES must be defined.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif
 
 #ifndef configSETUP_TICK_INTERRUPT
-	#error configSETUP_TICK_INTERRUPT() must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+	#error configSETUP_TICK_INTERRUPT() must be defined.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif /* configSETUP_TICK_INTERRUPT */
 
 #ifndef configMAX_API_CALL_INTERRUPT_PRIORITY
-	#error configMAX_API_CALL_INTERRUPT_PRIORITY must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+	#error configMAX_API_CALL_INTERRUPT_PRIORITY must be defined.  See https://www.FreeRTOS.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif
 
 #if configMAX_API_CALL_INTERRUPT_PRIORITY == 0
@@ -456,8 +456,8 @@ uint32_t ulReturn;
 		interrupt entry is as fast and simple as possible.
 
 		The following links provide detailed information:
-		http://www.freertos.org/RTOS-Cortex-M3-M4.html
-		http://www.freertos.org/FAQHelp.html */
+		https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+		https://www.FreeRTOS.org/FAQHelp.html */
 		configASSERT( portICCRPR_RUNNING_PRIORITY_REGISTER >= ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) );
 
 		/* Priority grouping:  The interrupt controller (GIC) allows the bits
diff --git a/portable/RVDS/ARM_CA9/portASM.s b/portable/RVDS/ARM_CA9/portASM.s
index dfcb93005..48579dcda 100644
--- a/portable/RVDS/ARM_CA9/portASM.s
+++ b/portable/RVDS/ARM_CA9/portASM.s
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/RVDS/ARM_CA9/portmacro.h b/portable/RVDS/ARM_CA9/portmacro.h
index 02a721165..3aa9a2b2a 100644
--- a/portable/RVDS/ARM_CA9/portmacro.h
+++ b/portable/RVDS/ARM_CA9/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,10 +19,9 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
diff --git a/portable/RVDS/ARM_CA9/portmacro.inc b/portable/RVDS/ARM_CA9/portmacro.inc
index 648c9db30..c23b5ba27 100644
--- a/portable/RVDS/ARM_CA9/portmacro.inc
+++ b/portable/RVDS/ARM_CA9/portmacro.inc
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/RVDS/ARM_CM0/port.c b/portable/RVDS/ARM_CM0/port.c
index 51a57de55..a22dfd2b8 100644
--- a/portable/RVDS/ARM_CM0/port.c
+++ b/portable/RVDS/ARM_CM0/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,80 +19,79 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------
- * Implementation of functions defined in portable.h for the ARM CM0 port.
- *----------------------------------------------------------*/
+* Implementation of functions defined in portable.h for the ARM CM0 port.
+*----------------------------------------------------------*/
 
 /* Scheduler includes. */
 #include "FreeRTOS.h"
 #include "task.h"
 
 /* Constants required to manipulate the NVIC. */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_INT_CTRL_REG				( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
-#define portNVIC_SYSTICK_CLK_BIT			( 1UL << 2UL )
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portNVIC_PENDSVSET_BIT				( 1UL << 28UL )
-#define portMIN_INTERRUPT_PRIORITY			( 255UL )
-#define portNVIC_PENDSV_PRI					( portMIN_INTERRUPT_PRIORITY << 16UL )
-#define portNVIC_SYSTICK_PRI				( portMIN_INTERRUPT_PRIORITY << 24UL )
+#define portNVIC_SYSTICK_CTRL_REG             ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG             ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG    ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_INT_CTRL_REG                 ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+#define portNVIC_SHPR3_REG                    ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_CLK_BIT              ( 1UL << 2UL )
+#define portNVIC_SYSTICK_INT_BIT              ( 1UL << 1UL )
+#define portNVIC_SYSTICK_ENABLE_BIT           ( 1UL << 0UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT       ( 1UL << 16UL )
+#define portNVIC_PENDSVSET_BIT                ( 1UL << 28UL )
+#define portMIN_INTERRUPT_PRIORITY            ( 255UL )
+#define portNVIC_PENDSV_PRI                   ( portMIN_INTERRUPT_PRIORITY << 16UL )
+#define portNVIC_SYSTICK_PRI                  ( portMIN_INTERRUPT_PRIORITY << 24UL )
 
 /* Constants required to set up the initial stack. */
-#define portINITIAL_XPSR			( 0x01000000 )
+#define portINITIAL_XPSR                      ( 0x01000000 )
 
 /* The systick is a 24-bit counter. */
-#define portMAX_24_BIT_NUMBER		( 0xffffffUL )
+#define portMAX_24_BIT_NUMBER                 ( 0xffffffUL )
 
 /* A fiddle factor to estimate the number of SysTick counts that would have
- occurred while the SysTick counter is stopped during tickless idle
- calculations. */
+ * occurred while the SysTick counter is stopped during tickless idle
+ * calculations. */
 #ifndef portMISSED_COUNTS_FACTOR
-	#define portMISSED_COUNTS_FACTOR	( 45UL )
+    #define portMISSED_COUNTS_FACTOR    ( 45UL )
 #endif
 
 /* Constants used with memory barrier intrinsics. */
-#define portSY_FULL_READ_WRITE		( 15 )
+#define portSY_FULL_READ_WRITE    ( 15 )
 
 /* Legacy macro for backward compatibility only.  This macro used to be used to
-replace the function that configures the clock used to generate the tick
-interrupt (prvSetupTimerInterrupt()), but now the function is declared weak so
-the application writer can override it by simply defining a function of the
-same name (vApplicationSetupTickInterrupt()). */
+ * replace the function that configures the clock used to generate the tick
+ * interrupt (prvSetupTimerInterrupt()), but now the function is declared weak so
+ * the application writer can override it by simply defining a function of the
+ * same name (vApplicationSetupTickInterrupt()). */
 #ifndef configOVERRIDE_DEFAULT_TICK_CONFIGURATION
-	#define configOVERRIDE_DEFAULT_TICK_CONFIGURATION 0
+    #define configOVERRIDE_DEFAULT_TICK_CONFIGURATION    0
 #endif
 
 /* Each task maintains its own interrupt status in the critical nesting
-variable. */
+ * variable. */
 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 
 /* The number of SysTick increments that make up one tick period. */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulTimerCountsForOneTick = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulTimerCountsForOneTick = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /* The maximum number of tick periods that can be suppressed is limited by the
- 24 bit resolution of the SysTick timer. */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
+ * 24 bit resolution of the SysTick timer. */
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t xMaximumPossibleSuppressedTicks = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
- /* Compensate for the CPU cycles that pass while the SysTick is stopped (low
- power functionality only.
-*/
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulStoppedTimerCompensation = 0;
+/* Compensate for the CPU cycles that pass while the SysTick is stopped (low
+ * power functionality only.
+ */
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulStoppedTimerCompensation = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
@@ -124,71 +123,78 @@ static void prvTaskExitError( void );
 /*
  * See header file for description.
  */
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	interrupt. */
-	pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) pxCode;	/* PC */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) prvTaskExitError;	/* LR */
-	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
-	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
-	pxTopOfStack -= 8; /* R11..R4. */
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
+    pxTopOfStack--;                                   /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+    *pxTopOfStack = portINITIAL_XPSR;                 /* xPSR */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) pxCode;           /* PC */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) prvTaskExitError; /* LR */
+    pxTopOfStack -= 5;                                /* R12, R3, R2 and R1. */
+    *pxTopOfStack = ( StackType_t ) pvParameters;     /* R0 */
+    pxTopOfStack -= 8;                                /* R11..R4. */
 
-	return pxTopOfStack;
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 static void prvTaskExitError( void )
 {
-	/* A function that implements a task must not exit or attempt to return to
-	its caller as there is nothing to return to.  If a task wants to exit it
-	should instead call vTaskDelete( NULL ).
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to.  If a task wants to exit it
+     * should instead call vTaskDelete( NULL ).
+     *
+     * Artificially force an assert() to be triggered if configASSERT() is
+     * defined, then stop here so application writers can catch the error. */
+    configASSERT( uxCriticalNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
 
-	Artificially force an assert() to be triggered if configASSERT() is
-	defined, then stop here so application writers can catch the error. */
-	configASSERT( uxCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
-	for( ;; );
+    for( ; ; )
+    {
+    }
 }
 /*-----------------------------------------------------------*/
 
 void vPortSVCHandler( void )
 {
-	/* This function is no longer used, but retained for backward
-	compatibility. */
+    /* This function is no longer used, but retained for backward
+     * compatibility. */
 }
 /*-----------------------------------------------------------*/
 
 __asm void prvPortStartFirstTask( void )
 {
-	extern pxCurrentTCB;
+    extern pxCurrentTCB;
 
-	PRESERVE8
+    PRESERVE8
 
-	/* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector
-	table offset register that can be used to locate the initial stack value.
-	Not all M0 parts have the application vector table at address 0. */
+    /* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector
+     * table offset register that can be used to locate the initial stack value.
+     * Not all M0 parts have the application vector table at address 0. */
+/* *INDENT-OFF* */
 
-	ldr	r3, =pxCurrentTCB	/* Obtain location of pxCurrentTCB. */
-	ldr r1, [r3]
-	ldr r0, [r1]			/* The first item in pxCurrentTCB is the task top of stack. */
-	adds r0, #32			/* Discard everything up to r0. */
-	msr psp, r0				/* This is now the new top of stack to use in the task. */
-	movs r0, #2				/* Switch to the psp stack. */
-	msr CONTROL, r0
-	isb
-	pop {r0-r5}				/* Pop the registers that are saved automatically. */
-	mov lr, r5				/* lr is now in r5. */
-	pop {r3}				/* The return address is now in r3. */
-	pop {r2}				/* Pop and discard the XPSR. */
-	cpsie i					/* The first task has its context and interrupts can be enabled. */
-	bx r3					/* Finally, jump to the user defined task code. */
+    ldr r3, = pxCurrentTCB /* Obtain location of pxCurrentTCB. */
+    ldr r1, [ r3 ]
+    ldr r0, [ r1 ]         /* The first item in pxCurrentTCB is the task top of stack. */
+    adds r0, # 32          /* Discard everything up to r0. */
+    msr psp, r0            /* This is now the new top of stack to use in the task. */
+    movs r0, # 2           /* Switch to the psp stack. */
+    msr CONTROL, r0
+    isb
+    pop { r0 - r5 } /* Pop the registers that are saved automatically. */
+    mov lr, r5 /* lr is now in r5. */
+    pop { r3 } /* The return address is now in r3. */
+    pop { r2 } /* Pop and discard the XPSR. */
+    cpsie i /* The first task has its context and interrupts can be enabled. */
+    bx r3 /* Finally, jump to the user defined task code. */
 
-	ALIGN
+    ALIGN
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
@@ -197,42 +203,43 @@ __asm void prvPortStartFirstTask( void )
  */
 BaseType_t xPortStartScheduler( void )
 {
-	/* Make PendSV, CallSV and SysTick the same priority as the kernel. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+    /* Make PendSV, CallSV and SysTick the same priority as the kernel. */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
 
-	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-	here already. */
-	vPortSetupTimerInterrupt();
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
-	/* Initialise the critical nesting count ready for the first task. */
-	uxCriticalNesting = 0;
+    /* Start the timer that generates the tick ISR.  Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
 
-	/* Start the first task. */
-	prvPortStartFirstTask();
+    /* Initialise the critical nesting count ready for the first task. */
+    uxCriticalNesting = 0;
 
-	/* Should not get here! */
-	return 0;
+    /* Start the first task. */
+    prvPortStartFirstTask();
+
+    /* Should not get here! */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void )
 {
-	/* Not implemented in ports where there is nothing to return to.
-	Artificially force an assert. */
-	configASSERT( uxCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( uxCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
 void vPortYield( void )
 {
-	/* Set a PendSV to request a context switch. */
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+    /* Set a PendSV to request a context switch. */
+    portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
 
-	/* Barriers are normally not required but do ensure the code is completely
-	within the specified behaviour for the architecture. */
-	__dsb( portSY_FULL_READ_WRITE );
-	__isb( portSY_FULL_READ_WRITE );
+    /* Barriers are normally not required but do ensure the code is completely
+     * within the specified behaviour for the architecture. */
+    __dsb( portSY_FULL_READ_WRITE );
+    __isb( portSY_FULL_READ_WRITE );
 }
 /*-----------------------------------------------------------*/
 
@@ -240,97 +247,104 @@ void vPortEnterCritical( void )
 {
     portDISABLE_INTERRUPTS();
     uxCriticalNesting++;
-	__dsb( portSY_FULL_READ_WRITE );
-	__isb( portSY_FULL_READ_WRITE );
+    __dsb( portSY_FULL_READ_WRITE );
+    __isb( portSY_FULL_READ_WRITE );
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void )
 {
-	configASSERT( uxCriticalNesting );
-	uxCriticalNesting--;
-	if( uxCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
+    configASSERT( uxCriticalNesting );
+    uxCriticalNesting--;
+
+    if( uxCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
 }
 /*-----------------------------------------------------------*/
 
 __asm uint32_t ulSetInterruptMaskFromISR( void )
 {
-	mrs r0, PRIMASK
-	cpsid i
-	bx lr
+/* *INDENT-OFF* */
+    mrs r0, PRIMASK
+    cpsid i
+    bx lr
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
 __asm void vClearInterruptMaskFromISR( uint32_t ulMask )
 {
-	msr PRIMASK, r0
-	bx lr
+/* *INDENT-OFF* */
+    msr PRIMASK, r0
+    bx lr
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
 __asm void xPortPendSVHandler( void )
 {
-	extern vTaskSwitchContext
-	extern pxCurrentTCB
+    extern vTaskSwitchContext
+    extern pxCurrentTCB
 
-	PRESERVE8
+/* *INDENT-OFF* */
+    PRESERVE8
 
-	mrs r0, psp
+    mrs r0, psp
 
-	ldr	r3, =pxCurrentTCB 	/* Get the location of the current TCB. */
-	ldr	r2, [r3]
+    ldr r3, = pxCurrentTCB /* Get the location of the current TCB. */
+    ldr r2, [ r3 ]
 
-	subs r0, #32			/* Make space for the remaining low registers. */
-	str r0, [r2]			/* Save the new top of stack. */
-	stmia r0!, {r4-r7}		/* Store the low registers that are not saved automatically. */
-	mov r4, r8				/* Store the high registers. */
-	mov r5, r9
-	mov r6, r10
-	mov r7, r11
-	stmia r0!, {r4-r7}
+    subs r0, # 32  /* Make space for the remaining low registers. */
+    str r0, [ r2 ] /* Save the new top of stack. */
+    stmia r0 !, { r4 - r7 } /* Store the low registers that are not saved automatically. */
+    mov r4, r8 /* Store the high registers. */
+    mov r5, r9
+    mov r6, r10
+    mov r7, r11
+    stmia r0 !, { r4 - r7 }
 
-	push {r3, r14}
-	cpsid i
-	bl vTaskSwitchContext
-	cpsie i
-	pop {r2, r3}			/* lr goes in r3. r2 now holds tcb pointer. */
+    push { r3, r14 }
+    cpsid i
+    bl vTaskSwitchContext
+    cpsie i
+    pop { r2, r3 } /* lr goes in r3. r2 now holds tcb pointer. */
 
-	ldr r1, [r2]
-	ldr r0, [r1]			/* The first item in pxCurrentTCB is the task top of stack. */
-	adds r0, #16			/* Move to the high registers. */
-	ldmia r0!, {r4-r7}		/* Pop the high registers. */
-	mov r8, r4
-	mov r9, r5
-	mov r10, r6
-	mov r11, r7
+    ldr r1, [ r2 ]
+    ldr r0, [ r1 ] /* The first item in pxCurrentTCB is the task top of stack. */
+    adds r0, # 16  /* Move to the high registers. */
+    ldmia r0 !, { r4 - r7 } /* Pop the high registers. */
+    mov r8, r4
+    mov r9, r5
+    mov r10, r6
+    mov r11, r7
 
-	msr psp, r0				/* Remember the new top of stack for the task. */
+    msr psp, r0   /* Remember the new top of stack for the task. */
 
-	subs r0, #32			/* Go back for the low registers that are not automatically restored. */
-	ldmia r0!, {r4-r7}      /* Pop low registers.  */
+    subs r0, # 32 /* Go back for the low registers that are not automatically restored. */
+    ldmia r0 !, { r4 - r7 } /* Pop low registers.  */
 
-	bx r3
-	ALIGN
+    bx r3
+    ALIGN
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
 void xPortSysTickHandler( void )
 {
-uint32_t ulPreviousMask;
+    uint32_t ulPreviousMask;
 
-	ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* Pend a context switch. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
+    ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* Pend a context switch. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
 }
 /*-----------------------------------------------------------*/
 
@@ -338,192 +352,195 @@ uint32_t ulPreviousMask;
  * Setup the systick timer to generate the tick interrupts at the required
  * frequency.
  */
-#if( configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0 )
+#if ( configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0 )
 
-	__weak void vPortSetupTimerInterrupt( void )
-	{
-		/* Calculate the constants required to configure the tick interrupt. */
-		#if( configUSE_TICKLESS_IDLE == 1 )
-			ulTimerCountsForOneTick = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );
-			xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-			ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR;
-		#endif /* configUSE_TICKLESS_IDLE */
+    __weak void vPortSetupTimerInterrupt( void )
+    {
+        /* Calculate the constants required to configure the tick interrupt. */
+        #if ( configUSE_TICKLESS_IDLE == 1 )
+            ulTimerCountsForOneTick = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );
+            xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+            ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR;
+        #endif /* configUSE_TICKLESS_IDLE */
 
-		/* Stop and reset the SysTick. */
-		portNVIC_SYSTICK_CTRL_REG = 0UL;
-		portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+        /* Stop and reset the SysTick. */
+        portNVIC_SYSTICK_CTRL_REG = 0UL;
+        portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-		/* Configure SysTick to interrupt at the requested rate. */
-		portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-		portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
-	}
+        /* Configure SysTick to interrupt at the requested rate. */
+        portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+        portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
+    }
 
 #endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TICKLESS_IDLE == 1 )
+#if ( configUSE_TICKLESS_IDLE == 1 )
 
-__weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-{
-uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
-TickType_t xModifiableIdleTime;
+    __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+    {
+        uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+        TickType_t xModifiableIdleTime;
 
-	/* Make sure the SysTick reload value does not overflow the counter. */
-	if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-	{
-		xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-	}
+        /* Make sure the SysTick reload value does not overflow the counter. */
+        if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+        {
+            xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+        }
 
-	/* Stop the SysTick momentarily. The time the SysTick is stopped for
-	is accounted for as best it can be, but using the tickless mode will
-	inevitably result in some tiny drift of the time maintained by the
-	kernel with respect to calendar time. */
-	portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+        /* Stop the SysTick momentarily. The time the SysTick is stopped for
+         * is accounted for as best it can be, but using the tickless mode will
+         * inevitably result in some tiny drift of the time maintained by the
+         * kernel with respect to calendar time. */
+        portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
 
-	/* Calculate the reload value required to wait xExpectedIdleTime
-	tick periods.  -1 is used because this code will execute part way
-	through one of the tick periods. */
-	ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-	if( ulReloadValue > ulStoppedTimerCompensation )
-	{
-		ulReloadValue -= ulStoppedTimerCompensation;
-	}
+        /* Calculate the reload value required to wait xExpectedIdleTime
+         * tick periods.  -1 is used because this code will execute part way
+         * through one of the tick periods. */
+        ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
 
-	/* Enter a critical section but don't use the taskENTER_CRITICAL()
-	method as that will mask interrupts that should exit sleep mode. */
-	__disable_irq();
-	__dsb( portSY_FULL_READ_WRITE );
-	__isb( portSY_FULL_READ_WRITE );
+        if( ulReloadValue > ulStoppedTimerCompensation )
+        {
+            ulReloadValue -= ulStoppedTimerCompensation;
+        }
 
-	/* If a context switch is pending or a task is waiting for the scheduler
-	to be unsuspended then abandon the low power entry. */
-	if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-	{
-		/* Restart from whatever is left in the count register to complete
-		this tick period. */
-		portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+        /* Enter a critical section but don't use the taskENTER_CRITICAL()
+         * method as that will mask interrupts that should exit sleep mode. */
+        __disable_irq();
+        __dsb( portSY_FULL_READ_WRITE );
+        __isb( portSY_FULL_READ_WRITE );
 
-		/* Restart SysTick. */
-		portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+        /* If a context switch is pending or a task is waiting for the scheduler
+         * to be unsuspended then abandon the low power entry. */
+        if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+        {
+            /* Restart from whatever is left in the count register to complete
+             * this tick period. */
+            portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-		/* Reset the reload register to the value required for normal tick
-		periods. */
-		portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-		/* Re-enable interrupts - see comments above __disable_irq() call
-		above. */
-		__enable_irq();
-	}
-	else
-	{
-		/* Set the new reload value. */
-		portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+            /* Reset the reload register to the value required for normal tick
+             * periods. */
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
 
-		/* Clear the SysTick count flag and set the count value back to
-		zero. */
-		portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            /* Re-enable interrupts - see comments above __disable_irq() call
+             * above. */
+            __enable_irq();
+        }
+        else
+        {
+            /* Set the new reload value. */
+            portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
 
-		/* Restart SysTick. */
-		portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            /* Clear the SysTick count flag and set the count value back to
+             * zero. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-		/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
-		set its parameter to 0 to indicate that its implementation contains
-		its own wait for interrupt or wait for event instruction, and so wfi
-		should not be executed again. However, the original expected idle
-		time variable must remain unmodified, so a copy is taken. */
-		xModifiableIdleTime = xExpectedIdleTime;
-		configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-		if( xModifiableIdleTime > 0 )
-		{
-			__dsb( portSY_FULL_READ_WRITE );
-			__wfi();
-			__isb( portSY_FULL_READ_WRITE );
-		}
-		configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-		/* Re-enable interrupts to allow the interrupt that brought the MCU
-		out of sleep mode to execute immediately. see comments above
-		__disable_interrupt() call above. */
-		__enable_irq();
-		__dsb( portSY_FULL_READ_WRITE );
-		__isb( portSY_FULL_READ_WRITE );
+            /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
+             * set its parameter to 0 to indicate that its implementation contains
+             * its own wait for interrupt or wait for event instruction, and so wfi
+             * should not be executed again. However, the original expected idle
+             * time variable must remain unmodified, so a copy is taken. */
+            xModifiableIdleTime = xExpectedIdleTime;
+            configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
 
-		/* Disable interrupts again because the clock is about to be stopped
-		and interrupts that execute while the clock is stopped will increase
-		any slippage between the time maintained by the RTOS and calendar
-		time. */
-		__disable_irq();
-		__dsb( portSY_FULL_READ_WRITE );
-		__isb( portSY_FULL_READ_WRITE );
+            if( xModifiableIdleTime > 0 )
+            {
+                __dsb( portSY_FULL_READ_WRITE );
+                __wfi();
+                __isb( portSY_FULL_READ_WRITE );
+            }
 
-		/* Disable the SysTick clock without reading the
-		portNVIC_SYSTICK_CTRL_REG register to ensure the
-		portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
-		the time the SysTick is stopped for is accounted for as best it can
-		be, but using the tickless mode will inevitably result in some tiny
-		drift of the time maintained by the kernel with respect to calendar
-		time*/
-		portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+            configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
 
-		/* Determine if the SysTick clock has already counted to zero and
-		been set back to the current reload value (the reload back being
-		correct for the entire expected idle time) or if the SysTick is yet
-		to count to zero (in which case an interrupt other than the SysTick
-		must have brought the system out of sleep mode). */
-		if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-		{
-			uint32_t ulCalculatedLoadValue;
+            /* Re-enable interrupts to allow the interrupt that brought the MCU
+             * out of sleep mode to execute immediately. see comments above
+             * __disable_interrupt() call above. */
+            __enable_irq();
+            __dsb( portSY_FULL_READ_WRITE );
+            __isb( portSY_FULL_READ_WRITE );
 
-			/* The tick interrupt is already pending, and the SysTick count
-			reloaded with ulReloadValue.  Reset the
-			portNVIC_SYSTICK_LOAD with whatever remains of this tick
-			period. */
-			ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+            /* Disable interrupts again because the clock is about to be stopped
+             * and interrupts that execute while the clock is stopped will increase
+             * any slippage between the time maintained by the RTOS and calendar
+             * time. */
+            __disable_irq();
+            __dsb( portSY_FULL_READ_WRITE );
+            __isb( portSY_FULL_READ_WRITE );
 
-			/* Don't allow a tiny value, or values that have somehow
-			underflowed because the post sleep hook did something
-			that took too long. */
-			if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-			{
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-			}
+            /* Disable the SysTick clock without reading the
+             * portNVIC_SYSTICK_CTRL_REG register to ensure the
+             * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
+             * the time the SysTick is stopped for is accounted for as best it can
+             * be, but using the tickless mode will inevitably result in some tiny
+             * drift of the time maintained by the kernel with respect to calendar
+             * time*/
+            portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
 
-			portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+            /* Determine if the SysTick clock has already counted to zero and
+             * been set back to the current reload value (the reload back being
+             * correct for the entire expected idle time) or if the SysTick is yet
+             * to count to zero (in which case an interrupt other than the SysTick
+             * must have brought the system out of sleep mode). */
+            if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+            {
+                uint32_t ulCalculatedLoadValue;
 
-			/* As the pending tick will be processed as soon as this
-			function exits, the tick value maintained by the tick is stepped
-			forward by one less than the time spent waiting. */
-			ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-		}
-		else
-		{
-			/* Something other than the tick interrupt ended the sleep.
-			Work out how long the sleep lasted rounded to complete tick
-			periods (not the ulReload value which accounted for part
-			ticks). */
-			ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+                /* The tick interrupt is already pending, and the SysTick count
+                 * reloaded with ulReloadValue.  Reset the
+                 * portNVIC_SYSTICK_LOAD with whatever remains of this tick
+                 * period. */
+                ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
 
-			/* How many complete tick periods passed while the processor
-			was waiting? */
-			ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+                /* Don't allow a tiny value, or values that have somehow
+                 * underflowed because the post sleep hook did something
+                 * that took too long. */
+                if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+                {
+                    ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+                }
 
-			/* The reload value is set to whatever fraction of a single tick
-			period remains. */
-			portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-		}
+                portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
 
-		/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD
-		again, then set portNVIC_SYSTICK_LOAD back to its standard
-		value. */
-		portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-		portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-		vTaskStepTick( ulCompleteTickPeriods );
-		portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+                /* As the pending tick will be processed as soon as this
+                 * function exits, the tick value maintained by the tick is stepped
+                 * forward by one less than the time spent waiting. */
+                ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+            }
+            else
+            {
+                /* Something other than the tick interrupt ended the sleep.
+                 * Work out how long the sleep lasted rounded to complete tick
+                 * periods (not the ulReload value which accounted for part
+                 * ticks). */
+                ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-		/* Exit with interrpts enabled. */
-		__enable_irq();
-	}
-}
+                /* How many complete tick periods passed while the processor
+                 * was waiting? */
+                ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+                /* The reload value is set to whatever fraction of a single tick
+                 * period remains. */
+                portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+            }
+
+            /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD
+             * again, then set portNVIC_SYSTICK_LOAD back to its standard
+             * value. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            vTaskStepTick( ulCompleteTickPeriods );
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Exit with interrpts enabled. */
+            __enable_irq();
+        }
+    }
 
 #endif /* #if configUSE_TICKLESS_IDLE */
 
diff --git a/portable/RVDS/ARM_CM0/portmacro.h b/portable/RVDS/ARM_CM0/portmacro.h
index df18970c4..8271aacc4 100644
--- a/portable/RVDS/ARM_CM0/portmacro.h
+++ b/portable/RVDS/ARM_CM0/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,19 +19,20 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 
 #ifndef PORTMACRO_H
 #define PORTMACRO_H
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
-extern "C" {
+    extern "C" {
 #endif
+/* *INDENT-ON* */
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -44,78 +45,79 @@ extern "C" {
  */
 
 /* Type definitions. */
-#define portCHAR		char
-#define portFLOAT		float
-#define portDOUBLE		double
-#define portLONG		long
-#define portSHORT		short
-#define portSTACK_TYPE	uint32_t
-#define portBASE_TYPE	long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE StackType_t;
-typedef long BaseType_t;
-typedef unsigned long UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC 1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Architecture specifics. */
-#define portSTACK_GROWTH			( -1 )
-#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT			8
+    #define portSTACK_GROWTH      ( -1 )
+    #define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT    8
 /*-----------------------------------------------------------*/
 
 
 /* Scheduler utilities. */
-extern void vPortYield( void );
-#define portNVIC_INT_CTRL_REG		( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT		( 1UL << 28UL )
-#define portYIELD()					vPortYield()
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
+    extern void vPortYield( void );
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portYIELD()                                 vPortYield()
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /* Critical section management. */
-extern void vPortEnterCritical( void );
-extern void vPortExitCritical( void );
-extern uint32_t ulSetInterruptMaskFromISR( void );
-extern void vClearInterruptMaskFromISR( uint32_t ulMask );
+    extern void vPortEnterCritical( void );
+    extern void vPortExitCritical( void );
+    extern uint32_t ulSetInterruptMaskFromISR( void );
+    extern void vClearInterruptMaskFromISR( uint32_t ulMask );
 
-#define portSET_INTERRUPT_MASK_FROM_ISR()		ulSetInterruptMaskFromISR()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)	vClearInterruptMaskFromISR( x )
-#define portDISABLE_INTERRUPTS()				__disable_irq()
-#define portENABLE_INTERRUPTS()					__enable_irq()
-#define portENTER_CRITICAL()					vPortEnterCritical()
-#define portEXIT_CRITICAL()						vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulSetInterruptMaskFromISR()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vClearInterruptMaskFromISR( x )
+    #define portDISABLE_INTERRUPTS()                  __disable_irq()
+    #define portENABLE_INTERRUPTS()                   __enable_irq()
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
 
 /*-----------------------------------------------------------*/
 
 /* Tickless idle/low power functionality. */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site. */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 
-#define portNOP()
+    #define portNOP()
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
-}
+    }
 #endif
+/* *INDENT-ON* */
 
 #endif /* PORTMACRO_H */
-
diff --git a/portable/RVDS/ARM_CM3/port.c b/portable/RVDS/ARM_CM3/port.c
index 9e65d6cec..6de6a2568 100644
--- a/portable/RVDS/ARM_CM3/port.c
+++ b/portable/RVDS/ARM_CM3/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,89 +19,89 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------
- * Implementation of functions defined in portable.h for the ARM CM3 port.
- *----------------------------------------------------------*/
+* Implementation of functions defined in portable.h for the ARM CM3 port.
+*----------------------------------------------------------*/
 
 /* Scheduler includes. */
 #include "FreeRTOS.h"
 #include "task.h"
 
 #ifndef configKERNEL_INTERRUPT_PRIORITY
-	#define configKERNEL_INTERRUPT_PRIORITY 255
+    #define configKERNEL_INTERRUPT_PRIORITY    255
 #endif
 
 #if configMAX_SYSCALL_INTERRUPT_PRIORITY == 0
-	#error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+    #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See http: /*www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
 #endif
 
 #ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 1UL << 2UL )
+    #define configSYSTICK_CLOCK_HZ      configCPU_CLOCK_HZ
+    /* Ensure the SysTick is clocked at the same frequency as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 1UL << 2UL )
 #else
-	/* The way the SysTick is clocked is not modified in case it is not the same
-	as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 0 )
+
+/* The way the SysTick is clocked is not modified in case it is not the same
+ * as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 0 )
 #endif
 
 /* Legacy macro for backward compatibility only.  This macro used to be used to
-replace the function that configures the clock used to generate the tick
-interrupt (prvSetupTimerInterrupt()), but now the function is declared weak so
-the application writer can override it by simply defining a function of the
-same name (vApplicationSetupTickInterrupt()). */
+ * replace the function that configures the clock used to generate the tick
+ * interrupt (prvSetupTimerInterrupt()), but now the function is declared weak so
+ * the application writer can override it by simply defining a function of the
+ * same name (vApplicationSetupTickInterrupt()). */
 #ifndef configOVERRIDE_DEFAULT_TICK_CONFIGURATION
-	#define configOVERRIDE_DEFAULT_TICK_CONFIGURATION 0
+    #define configOVERRIDE_DEFAULT_TICK_CONFIGURATION    0
 #endif
 
 /* Constants required to manipulate the core.  Registers first... */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_CTRL_REG             ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG             ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG    ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SHPR3_REG                    ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
 /* ...then bits in the registers. */
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portNVIC_PENDSVCLEAR_BIT 			( 1UL << 27UL )
-#define portNVIC_PEND_SYSTICK_CLEAR_BIT		( 1UL << 25UL )
+#define portNVIC_SYSTICK_INT_BIT              ( 1UL << 1UL )
+#define portNVIC_SYSTICK_ENABLE_BIT           ( 1UL << 0UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT       ( 1UL << 16UL )
+#define portNVIC_PENDSVCLEAR_BIT              ( 1UL << 27UL )
+#define portNVIC_PEND_SYSTICK_CLEAR_BIT       ( 1UL << 25UL )
 
-#define portNVIC_PENDSV_PRI					( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
-#define portNVIC_SYSTICK_PRI				( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
+#define portNVIC_PENDSV_PRI                   ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
+#define portNVIC_SYSTICK_PRI                  ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
 
 /* Constants required to check the validity of an interrupt priority. */
-#define portFIRST_USER_INTERRUPT_NUMBER		( 16 )
-#define portNVIC_IP_REGISTERS_OFFSET_16 	( 0xE000E3F0 )
-#define portAIRCR_REG						( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
-#define portMAX_8_BIT_VALUE					( ( uint8_t ) 0xff )
-#define portTOP_BIT_OF_BYTE					( ( uint8_t ) 0x80 )
-#define portMAX_PRIGROUP_BITS				( ( uint8_t ) 7 )
-#define portPRIORITY_GROUP_MASK				( 0x07UL << 8UL )
-#define portPRIGROUP_SHIFT					( 8UL )
+#define portFIRST_USER_INTERRUPT_NUMBER       ( 16 )
+#define portNVIC_IP_REGISTERS_OFFSET_16       ( 0xE000E3F0 )
+#define portAIRCR_REG                         ( *( ( volatile uint32_t * ) 0xE000ED0C ) )
+#define portMAX_8_BIT_VALUE                   ( ( uint8_t ) 0xff )
+#define portTOP_BIT_OF_BYTE                   ( ( uint8_t ) 0x80 )
+#define portMAX_PRIGROUP_BITS                 ( ( uint8_t ) 7 )
+#define portPRIORITY_GROUP_MASK               ( 0x07UL << 8UL )
+#define portPRIGROUP_SHIFT                    ( 8UL )
 
 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
-#define portVECTACTIVE_MASK					( 0xFFUL )
+#define portVECTACTIVE_MASK                   ( 0xFFUL )
 
 /* Constants required to set up the initial stack. */
-#define portINITIAL_XPSR			( 0x01000000 )
+#define portINITIAL_XPSR                      ( 0x01000000 )
 
 /* The systick is a 24-bit counter. */
-#define portMAX_24_BIT_NUMBER				( 0xffffffUL )
+#define portMAX_24_BIT_NUMBER                 ( 0xffffffUL )
 
 /* A fiddle factor to estimate the number of SysTick counts that would have
-occurred while the SysTick counter is stopped during tickless idle
-calculations. */
-#define portMISSED_COUNTS_FACTOR			( 45UL )
+ * occurred while the SysTick counter is stopped during tickless idle
+ * calculations. */
+#define portMISSED_COUNTS_FACTOR              ( 45UL )
 
 /* For strict compliance with the Cortex-M spec the task start address should
-have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
-#define portSTART_ADDRESS_MASK				( ( StackType_t ) 0xfffffffeUL )
+ * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
+#define portSTART_ADDRESS_MASK                ( ( StackType_t ) 0xfffffffeUL )
 
 /*
  * Setup the timer to generate the tick interrupts.  The implementation in this
@@ -130,30 +130,30 @@ static void prvTaskExitError( void );
 /*-----------------------------------------------------------*/
 
 /* Each task maintains its own interrupt status in the critical nesting
-variable. */
+ * variable. */
 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 
 /*
  * The number of SysTick increments that make up one tick period.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulTimerCountsForOneTick = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulTimerCountsForOneTick = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * The maximum number of tick periods that can be suppressed is limited by the
  * 24 bit resolution of the SysTick timer.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t xMaximumPossibleSuppressedTicks = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * Compensate for the CPU cycles that pass while the SysTick is stopped (low
  * power functionality only.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulStoppedTimerCompensation = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulStoppedTimerCompensation = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
@@ -162,9 +162,9 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
  * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
  */
 #if ( configASSERT_DEFINED == 1 )
-	 static uint8_t ucMaxSysCallPriority = 0;
-	 static uint32_t ulMaxPRIGROUPValue = 0;
-	 static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16;
+    static uint8_t ucMaxSysCallPriority = 0;
+    static uint32_t ulMaxPRIGROUPValue = 0;
+    static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16;
 #endif /* configASSERT_DEFINED */
 
 /*-----------------------------------------------------------*/
@@ -172,76 +172,85 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 /*
  * See header file for description.
  */
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	interrupt. */
-	pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
-	pxTopOfStack--;
-	*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;	/* PC */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) prvTaskExitError;	/* LR */
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
+    pxTopOfStack--;                                                      /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+    *pxTopOfStack = portINITIAL_XPSR;                                    /* xPSR */
+    pxTopOfStack--;
+    *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) prvTaskExitError;                    /* LR */
 
-	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
-	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
-	pxTopOfStack -= 8;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
+    pxTopOfStack -= 5;                                                   /* R12, R3, R2 and R1. */
+    *pxTopOfStack = ( StackType_t ) pvParameters;                        /* R0 */
+    pxTopOfStack -= 8;                                                   /* R11, R10, R9, R8, R7, R6, R5 and R4. */
 
-	return pxTopOfStack;
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 static void prvTaskExitError( void )
 {
-	/* A function that implements a task must not exit or attempt to return to
-	its caller as there is nothing to return to.  If a task wants to exit it
-	should instead call vTaskDelete( NULL ).
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to.  If a task wants to exit it
+     * should instead call vTaskDelete( NULL ).
+     *
+     * Artificially force an assert() to be triggered if configASSERT() is
+     * defined, then stop here so application writers can catch the error. */
+    configASSERT( uxCriticalNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
 
-	Artificially force an assert() to be triggered if configASSERT() is
-	defined, then stop here so application writers can catch the error. */
-	configASSERT( uxCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
-	for( ;; );
+    for( ; ; )
+    {
+    }
 }
 /*-----------------------------------------------------------*/
 
 __asm void vPortSVCHandler( void )
 {
-	PRESERVE8
+/* *INDENT-OFF* */
+    PRESERVE8
 
-	ldr	r3, =pxCurrentTCB	/* Restore the context. */
-	ldr r1, [r3]			/* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
-	ldr r0, [r1]			/* The first item in pxCurrentTCB is the task top of stack. */
-	ldmia r0!, {r4-r11}		/* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
-	msr psp, r0				/* Restore the task stack pointer. */
-	isb
-	mov r0, #0
-	msr	basepri, r0
-	orr r14, #0xd
-	bx r14
+    ldr r3, = pxCurrentTCB   /* Restore the context. */
+    ldr r1, [ r3 ] /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
+    ldr r0, [ r1 ]           /* The first item in pxCurrentTCB is the task top of stack. */
+    ldmia r0 !, { r4 - r11 } /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
+    msr psp, r0 /* Restore the task stack pointer. */
+    isb
+    mov r0, # 0
+    msr basepri, r0
+    orr r14, # 0xd
+    bx r14
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
 __asm void prvStartFirstTask( void )
 {
-	PRESERVE8
+/* *INDENT-OFF* */
+    PRESERVE8
 
-	/* Use the NVIC offset register to locate the stack. */
-	ldr r0, =0xE000ED08
-	ldr r0, [r0]
-	ldr r0, [r0]
+    /* Use the NVIC offset register to locate the stack. */
+    ldr r0, =0xE000ED08
+    ldr r0, [ r0 ]
+    ldr r0, [ r0 ]
 
-	/* Set the msp back to the start of the stack. */
-	msr msp, r0
-	/* Globally enable interrupts. */
-	cpsie i
-	cpsie f
-	dsb
-	isb
-	/* Call SVC to start the first task. */
-	svc 0
-	nop
-	nop
+    /* Set the msp back to the start of the stack. */
+    msr msp, r0
+    /* Globally enable interrupts. */
+    cpsie i
+    cpsie f
+    dsb
+    isb
+    /* Call SVC to start the first task. */
+    svc 0
+    nop
+    nop
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
@@ -250,348 +259,357 @@ __asm void prvStartFirstTask( void )
  */
 BaseType_t xPortStartScheduler( void )
 {
-	#if( configASSERT_DEFINED == 1 )
-	{
-		volatile uint32_t ulOriginalPriority;
-		volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
-		volatile uint8_t ucMaxPriorityValue;
+    #if ( configASSERT_DEFINED == 1 )
+        {
+            volatile uint32_t ulOriginalPriority;
+            volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
+            volatile uint8_t ucMaxPriorityValue;
 
-		/* Determine the maximum priority from which ISR safe FreeRTOS API
-		functions can be called.  ISR safe functions are those that end in
-		"FromISR".  FreeRTOS maintains separate thread and ISR API functions to
-		ensure interrupt entry is as fast and simple as possible.
+            /* Determine the maximum priority from which ISR safe FreeRTOS API
+             * functions can be called.  ISR safe functions are those that end in
+             * "FromISR".  FreeRTOS maintains separate thread and ISR API functions to
+             * ensure interrupt entry is as fast and simple as possible.
+             *
+             * Save the interrupt priority value that is about to be clobbered. */
+            ulOriginalPriority = *pucFirstUserPriorityRegister;
 
-		Save the interrupt priority value that is about to be clobbered. */
-		ulOriginalPriority = *pucFirstUserPriorityRegister;
+            /* Determine the number of priority bits available.  First write to all
+             * possible bits. */
+            *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
 
-		/* Determine the number of priority bits available.  First write to all
-		possible bits. */
-		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
+            /* Read the value back to see how many bits stuck. */
+            ucMaxPriorityValue = *pucFirstUserPriorityRegister;
 
-		/* Read the value back to see how many bits stuck. */
-		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
+            /* The kernel interrupt priority should be set to the lowest
+             * priority. */
+            configASSERT( ucMaxPriorityValue == ( configKERNEL_INTERRUPT_PRIORITY & ucMaxPriorityValue ) );
 
-		/* The kernel interrupt priority should be set to the lowest
-		priority. */
-		configASSERT( ucMaxPriorityValue == ( configKERNEL_INTERRUPT_PRIORITY & ucMaxPriorityValue ) );
+            /* Use the same mask on the maximum system call priority. */
+            ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
 
-		/* Use the same mask on the maximum system call priority. */
-		ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
+            /* Calculate the maximum acceptable priority group value for the number
+             * of bits read back. */
+            ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
 
-		/* Calculate the maximum acceptable priority group value for the number
-		of bits read back. */
-		ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
-		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
-		{
-			ulMaxPRIGROUPValue--;
-			ucMaxPriorityValue <<= ( uint8_t ) 0x01;
-		}
+            while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
+            {
+                ulMaxPRIGROUPValue--;
+                ucMaxPriorityValue <<= ( uint8_t ) 0x01;
+            }
 
-		#ifdef __NVIC_PRIO_BITS
-		{
-			/* Check the CMSIS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
-		}
-		#endif
+            #ifdef __NVIC_PRIO_BITS
+                {
+                    /* Check the CMSIS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
+                }
+            #endif
 
-		#ifdef configPRIO_BITS
-		{
-			/* Check the FreeRTOS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
-		}
-		#endif
+            #ifdef configPRIO_BITS
+                {
+                    /* Check the FreeRTOS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
+                }
+            #endif
 
-		/* Shift the priority group value back to its position within the AIRCR
-		register. */
-		ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
-		ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
+            /* Shift the priority group value back to its position within the AIRCR
+             * register. */
+            ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
+            ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
 
-		/* Restore the clobbered interrupt priority register to its original
-		value. */
-		*pucFirstUserPriorityRegister = ulOriginalPriority;
-	}
-	#endif /* conifgASSERT_DEFINED */
+            /* Restore the clobbered interrupt priority register to its original
+             * value. */
+            *pucFirstUserPriorityRegister = ulOriginalPriority;
+        }
+    #endif /* conifgASSERT_DEFINED */
 
-	/* Make PendSV and SysTick the lowest priority interrupts. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+    /* Make PendSV and SysTick the lowest priority interrupts. */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
 
-	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-	here already. */
-	vPortSetupTimerInterrupt();
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
-	/* Initialise the critical nesting count ready for the first task. */
-	uxCriticalNesting = 0;
+    /* Start the timer that generates the tick ISR.  Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
 
-	/* Start the first task. */
-	prvStartFirstTask();
+    /* Initialise the critical nesting count ready for the first task. */
+    uxCriticalNesting = 0;
 
-	/* Should not get here! */
-	return 0;
+    /* Start the first task. */
+    prvStartFirstTask();
+
+    /* Should not get here! */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void )
 {
-	/* Not implemented in ports where there is nothing to return to.
-	Artificially force an assert. */
-	configASSERT( uxCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( uxCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void )
 {
-	portDISABLE_INTERRUPTS();
-	uxCriticalNesting++;
+    portDISABLE_INTERRUPTS();
+    uxCriticalNesting++;
 
-	/* This is not the interrupt safe version of the enter critical function so
-	assert() if it is being called from an interrupt context.  Only API
-	functions that end in "FromISR" can be used in an interrupt.  Only assert if
-	the critical nesting count is 1 to protect against recursive calls if the
-	assert function also uses a critical section. */
-	if( uxCriticalNesting == 1 )
-	{
-		configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
-	}
+    /* This is not the interrupt safe version of the enter critical function so
+     * assert() if it is being called from an interrupt context.  Only API
+     * functions that end in "FromISR" can be used in an interrupt.  Only assert if
+     * the critical nesting count is 1 to protect against recursive calls if the
+     * assert function also uses a critical section. */
+    if( uxCriticalNesting == 1 )
+    {
+        configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
+    }
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void )
 {
-	configASSERT( uxCriticalNesting );
-	uxCriticalNesting--;
-	if( uxCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
+    configASSERT( uxCriticalNesting );
+    uxCriticalNesting--;
+
+    if( uxCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
 }
 /*-----------------------------------------------------------*/
 
 __asm void xPortPendSVHandler( void )
 {
-	extern uxCriticalNesting;
-	extern pxCurrentTCB;
-	extern vTaskSwitchContext;
+    extern uxCriticalNesting;
+    extern pxCurrentTCB;
+    extern vTaskSwitchContext;
 
-	PRESERVE8
+/* *INDENT-OFF* */
+    PRESERVE8
 
-	mrs r0, psp
-	isb
+    mrs r0, psp
+    isb
 
-	ldr	r3, =pxCurrentTCB		/* Get the location of the current TCB. */
-	ldr	r2, [r3]
+    ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */
+    ldr r2, [ r3 ]
 
-	stmdb r0!, {r4-r11}			/* Save the remaining registers. */
-	str r0, [r2]				/* Save the new top of stack into the first member of the TCB. */
+    stmdb r0 !, { r4 - r11 } /* Save the remaining registers. */
+    str r0, [ r2 ] /* Save the new top of stack into the first member of the TCB. */
 
-	stmdb sp!, {r3, r14}
-	mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
-	msr basepri, r0
-	dsb
-	isb
-	bl vTaskSwitchContext
-	mov r0, #0
-	msr basepri, r0
-	ldmia sp!, {r3, r14}
+    stmdb sp !, { r3, r14 }
+    mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
+    msr basepri, r0
+    dsb
+    isb
+    bl vTaskSwitchContext
+    mov r0, #0
+    msr basepri, r0
+    ldmia sp !, { r3, r14 }
 
-	ldr r1, [r3]
-	ldr r0, [r1]				/* The first item in pxCurrentTCB is the task top of stack. */
-	ldmia r0!, {r4-r11}			/* Pop the registers and the critical nesting count. */
-	msr psp, r0
-	isb
-	bx r14
-	nop
+    ldr r1, [ r3 ]
+    ldr r0, [ r1 ] /* The first item in pxCurrentTCB is the task top of stack. */
+    ldmia r0 !, { r4 - r11 } /* Pop the registers and the critical nesting count. */
+    msr psp, r0
+    isb
+    bx r14
+    nop
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
 void xPortSysTickHandler( void )
 {
-	/* The SysTick runs at the lowest interrupt priority, so when this interrupt
-	executes all interrupts must be unmasked.  There is therefore no need to
-	save and then restore the interrupt mask value as its value is already
-	known - therefore the slightly faster vPortRaiseBASEPRI() function is used
-	in place of portSET_INTERRUPT_MASK_FROM_ISR(). */
-	vPortRaiseBASEPRI();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* A context switch is required.  Context switching is performed in
-			the PendSV interrupt.  Pend the PendSV interrupt. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	vPortClearBASEPRIFromISR();
+    /* The SysTick runs at the lowest interrupt priority, so when this interrupt
+     * executes all interrupts must be unmasked.  There is therefore no need to
+     * save and then restore the interrupt mask value as its value is already
+     * known - therefore the slightly faster vPortRaiseBASEPRI() function is used
+     * in place of portSET_INTERRUPT_MASK_FROM_ISR(). */
+    vPortRaiseBASEPRI();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* A context switch is required.  Context switching is performed in
+             * the PendSV interrupt.  Pend the PendSV interrupt. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+
+    vPortClearBASEPRIFromISR();
 }
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TICKLESS_IDLE == 1 )
+#if ( configUSE_TICKLESS_IDLE == 1 )
 
-	__weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-	{
-	uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
-	TickType_t xModifiableIdleTime;
+    __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+    {
+        uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+        TickType_t xModifiableIdleTime;
 
-		/* Make sure the SysTick reload value does not overflow the counter. */
-		if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-		{
-			xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-		}
+        /* Make sure the SysTick reload value does not overflow the counter. */
+        if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+        {
+            xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+        }
 
-		/* Stop the SysTick momentarily.  The time the SysTick is stopped for
-		is accounted for as best it can be, but using the tickless mode will
-		inevitably result in some tiny drift of the time maintained by the
-		kernel with respect to calendar time. */
-		portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+        /* Stop the SysTick momentarily.  The time the SysTick is stopped for
+         * is accounted for as best it can be, but using the tickless mode will
+         * inevitably result in some tiny drift of the time maintained by the
+         * kernel with respect to calendar time. */
+        portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
 
-		/* Calculate the reload value required to wait xExpectedIdleTime
-		tick periods.  -1 is used because this code will execute part way
-		through one of the tick periods. */
-		ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-		if( ulReloadValue > ulStoppedTimerCompensation )
-		{
-			ulReloadValue -= ulStoppedTimerCompensation;
-		}
+        /* Calculate the reload value required to wait xExpectedIdleTime
+         * tick periods.  -1 is used because this code will execute part way
+         * through one of the tick periods. */
+        ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
 
-		/* Enter a critical section but don't use the taskENTER_CRITICAL()
-		method as that will mask interrupts that should exit sleep mode. */
-		__disable_irq();
-		__dsb( portSY_FULL_READ_WRITE );
-		__isb( portSY_FULL_READ_WRITE );
+        if( ulReloadValue > ulStoppedTimerCompensation )
+        {
+            ulReloadValue -= ulStoppedTimerCompensation;
+        }
 
-		/* If a context switch is pending or a task is waiting for the scheduler
-		to be unsuspended then abandon the low power entry. */
-		if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-		{
-			/* Restart from whatever is left in the count register to complete
-			this tick period. */
-			portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+        /* Enter a critical section but don't use the taskENTER_CRITICAL()
+         * method as that will mask interrupts that should exit sleep mode. */
+        __disable_irq();
+        __dsb( portSY_FULL_READ_WRITE );
+        __isb( portSY_FULL_READ_WRITE );
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+        /* If a context switch is pending or a task is waiting for the scheduler
+         * to be unsuspended then abandon the low power entry. */
+        if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+        {
+            /* Restart from whatever is left in the count register to complete
+             * this tick period. */
+            portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Reset the reload register to the value required for normal tick
-			periods. */
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts - see comments above __disable_irq() call
-			above. */
-			__enable_irq();
-		}
-		else
-		{
-			/* Set the new reload value. */
-			portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+            /* Reset the reload register to the value required for normal tick
+             * periods. */
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
 
-			/* Clear the SysTick count flag and set the count value back to
-			zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            /* Re-enable interrupts - see comments above __disable_irq() call
+             * above. */
+            __enable_irq();
+        }
+        else
+        {
+            /* Set the new reload value. */
+            portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            /* Clear the SysTick count flag and set the count value back to
+             * zero. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-			/* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
-			set its parameter to 0 to indicate that its implementation contains
-			its own wait for interrupt or wait for event instruction, and so wfi
-			should not be executed again.  However, the original expected idle
-			time variable must remain unmodified, so a copy is taken. */
-			xModifiableIdleTime = xExpectedIdleTime;
-			configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-			if( xModifiableIdleTime > 0 )
-			{
-				__dsb( portSY_FULL_READ_WRITE );
-				__wfi();
-				__isb( portSY_FULL_READ_WRITE );
-			}
-			configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts to allow the interrupt that brought the MCU
-			out of sleep mode to execute immediately.  see comments above
-			__disable_interrupt() call above. */
-			__enable_irq();
-			__dsb( portSY_FULL_READ_WRITE );
-			__isb( portSY_FULL_READ_WRITE );
+            /* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
+             * set its parameter to 0 to indicate that its implementation contains
+             * its own wait for interrupt or wait for event instruction, and so wfi
+             * should not be executed again.  However, the original expected idle
+             * time variable must remain unmodified, so a copy is taken. */
+            xModifiableIdleTime = xExpectedIdleTime;
+            configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
 
-			/* Disable interrupts again because the clock is about to be stopped
-			and interrupts that execute while the clock is stopped will increase
-			any slippage between the time maintained by the RTOS and calendar
-			time. */
-			__disable_irq();
-			__dsb( portSY_FULL_READ_WRITE );
-			__isb( portSY_FULL_READ_WRITE );
+            if( xModifiableIdleTime > 0 )
+            {
+                __dsb( portSY_FULL_READ_WRITE );
+                __wfi();
+                __isb( portSY_FULL_READ_WRITE );
+            }
 
-			/* Disable the SysTick clock without reading the
-			portNVIC_SYSTICK_CTRL_REG register to ensure the
-			portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
-			the time the SysTick is stopped for is accounted for as best it can
-			be, but using the tickless mode will inevitably result in some tiny
-			drift of the time maintained by the kernel with respect to calendar
-			time*/
-			portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+            configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
 
-			/* Determine if the SysTick clock has already counted to zero and
-			been set back to the current reload value (the reload back being
-			correct for the entire expected idle time) or if the SysTick is yet
-			to count to zero (in which case an interrupt other than the SysTick
-			must have brought the system out of sleep mode). */
-			if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-			{
-				uint32_t ulCalculatedLoadValue;
+            /* Re-enable interrupts to allow the interrupt that brought the MCU
+             * out of sleep mode to execute immediately.  see comments above
+             * __disable_interrupt() call above. */
+            __enable_irq();
+            __dsb( portSY_FULL_READ_WRITE );
+            __isb( portSY_FULL_READ_WRITE );
 
-				/* The tick interrupt is already pending, and the SysTick count
-				reloaded with ulReloadValue.  Reset the
-				portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
-				period. */
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+            /* Disable interrupts again because the clock is about to be stopped
+             * and interrupts that execute while the clock is stopped will increase
+             * any slippage between the time maintained by the RTOS and calendar
+             * time. */
+            __disable_irq();
+            __dsb( portSY_FULL_READ_WRITE );
+            __isb( portSY_FULL_READ_WRITE );
 
-				/* Don't allow a tiny value, or values that have somehow
-				underflowed because the post sleep hook did something
-				that took too long. */
-				if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-				{
-					ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-				}
+            /* Disable the SysTick clock without reading the
+             * portNVIC_SYSTICK_CTRL_REG register to ensure the
+             * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
+             * the time the SysTick is stopped for is accounted for as best it can
+             * be, but using the tickless mode will inevitably result in some tiny
+             * drift of the time maintained by the kernel with respect to calendar
+             * time*/
+            portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
 
-				portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+            /* Determine if the SysTick clock has already counted to zero and
+             * been set back to the current reload value (the reload back being
+             * correct for the entire expected idle time) or if the SysTick is yet
+             * to count to zero (in which case an interrupt other than the SysTick
+             * must have brought the system out of sleep mode). */
+            if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+            {
+                uint32_t ulCalculatedLoadValue;
 
-				/* As the pending tick will be processed as soon as this
-				function exits, the tick value maintained by the tick is stepped
-				forward by one less than the time spent waiting. */
-				ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-			}
-			else
-			{
-				/* Something other than the tick interrupt ended the sleep.
-				Work out how long the sleep lasted rounded to complete tick
-				periods (not the ulReload value which accounted for part
-				ticks). */
-				ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+                /* The tick interrupt is already pending, and the SysTick count
+                 * reloaded with ulReloadValue.  Reset the
+                 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+                 * period. */
+                ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
 
-				/* How many complete tick periods passed while the processor
-				was waiting? */
-				ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+                /* Don't allow a tiny value, or values that have somehow
+                 * underflowed because the post sleep hook did something
+                 * that took too long. */
+                if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+                {
+                    ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+                }
 
-				/* The reload value is set to whatever fraction of a single tick
-				period remains. */
-				portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-			}
+                portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
 
-			/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
-			again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
-			value. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-			vTaskStepTick( ulCompleteTickPeriods );
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+                /* As the pending tick will be processed as soon as this
+                 * function exits, the tick value maintained by the tick is stepped
+                 * forward by one less than the time spent waiting. */
+                ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+            }
+            else
+            {
+                /* Something other than the tick interrupt ended the sleep.
+                 * Work out how long the sleep lasted rounded to complete tick
+                 * periods (not the ulReload value which accounted for part
+                 * ticks). */
+                ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Exit with interrupts enabled. */
-			__enable_irq();
-		}
-	}
+                /* How many complete tick periods passed while the processor
+                 * was waiting? */
+                ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+                /* The reload value is set to whatever fraction of a single tick
+                 * period remains. */
+                portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+            }
+
+            /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+             * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+             * value. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            vTaskStepTick( ulCompleteTickPeriods );
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Exit with interrupts enabled. */
+            __enable_irq();
+        }
+    }
 
 #endif /* #if configUSE_TICKLESS_IDLE */
 
@@ -601,98 +619,98 @@ void xPortSysTickHandler( void )
  * Setup the SysTick timer to generate the tick interrupts at the required
  * frequency.
  */
-#if( configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0 )
+#if ( configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0 )
 
-	__weak void vPortSetupTimerInterrupt( void )
-	{
-		/* Calculate the constants required to configure the tick interrupt. */
-		#if( configUSE_TICKLESS_IDLE == 1 )
-		{
-			ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
-			xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-			ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
-		}
-		#endif /* configUSE_TICKLESS_IDLE */
+    __weak void vPortSetupTimerInterrupt( void )
+    {
+        /* Calculate the constants required to configure the tick interrupt. */
+        #if ( configUSE_TICKLESS_IDLE == 1 )
+            {
+                ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+                xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+                ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+            }
+        #endif /* configUSE_TICKLESS_IDLE */
 
-		/* Stop and clear the SysTick. */
-		portNVIC_SYSTICK_CTRL_REG = 0UL;
-		portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+        /* Stop and clear the SysTick. */
+        portNVIC_SYSTICK_CTRL_REG = 0UL;
+        portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-		/* Configure SysTick to interrupt at the requested rate. */
-		portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-		portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
-	}
+        /* Configure SysTick to interrupt at the requested rate. */
+        portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+        portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
+    }
 
 #endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */
 /*-----------------------------------------------------------*/
 
 __asm uint32_t vPortGetIPSR( void )
 {
-	PRESERVE8
+/* *INDENT-OFF* */
+    PRESERVE8
 
-	mrs r0, ipsr
-	bx r14
+    mrs r0, ipsr
+    bx r14
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
-#if( configASSERT_DEFINED == 1 )
+#if ( configASSERT_DEFINED == 1 )
 
-	void vPortValidateInterruptPriority( void )
-	{
-	uint32_t ulCurrentInterrupt;
-	uint8_t ucCurrentPriority;
+    void vPortValidateInterruptPriority( void )
+    {
+        uint32_t ulCurrentInterrupt;
+        uint8_t ucCurrentPriority;
 
-		/* Obtain the number of the currently executing interrupt. */
-		ulCurrentInterrupt = vPortGetIPSR();
+        /* Obtain the number of the currently executing interrupt. */
+        ulCurrentInterrupt = vPortGetIPSR();
 
-		/* Is the interrupt number a user defined interrupt? */
-		if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
-		{
-			/* Look up the interrupt's priority. */
-			ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
+        /* Is the interrupt number a user defined interrupt? */
+        if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
+        {
+            /* Look up the interrupt's priority. */
+            ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
 
-			/* The following assertion will fail if a service routine (ISR) for
-			an interrupt that has been assigned a priority above
-			configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
-			function.  ISR safe FreeRTOS API functions must *only* be called
-			from interrupts that have been assigned a priority at or below
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
+            /* The following assertion will fail if a service routine (ISR) for
+             * an interrupt that has been assigned a priority above
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
+             * function.  ISR safe FreeRTOS API functions must *only* be called
+             * from interrupts that have been assigned a priority at or below
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Numerically low interrupt priority numbers represent logically high
+             * interrupt priorities, therefore the priority of the interrupt must
+             * be set to a value equal to or numerically *higher* than
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Interrupts that	use the FreeRTOS API must not be left at their
+             * default priority of	zero as that is the highest possible priority,
+             * which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
+             * and	therefore also guaranteed to be invalid.
+             *
+             * FreeRTOS maintains separate thread and ISR API functions to ensure
+             * interrupt entry is as fast and simple as possible.
+             *
+             * The following links provide detailed information:
+             * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+             * https://www.FreeRTOS.org/FAQHelp.html */
+            configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
+        }
 
-			Numerically low interrupt priority numbers represent logically high
-			interrupt priorities, therefore the priority of the interrupt must
-			be set to a value equal to or numerically *higher* than
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
-
-			Interrupts that	use the FreeRTOS API must not be left at their
-			default priority of	zero as that is the highest possible priority,
-			which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
-			and	therefore also guaranteed to be invalid.
-
-			FreeRTOS maintains separate thread and ISR API functions to ensure
-			interrupt entry is as fast and simple as possible.
-
-			The following links provide detailed information:
-			http://www.freertos.org/RTOS-Cortex-M3-M4.html
-			http://www.freertos.org/FAQHelp.html */
-			configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
-		}
-
-		/* Priority grouping:  The interrupt controller (NVIC) allows the bits
-		that define each interrupt's priority to be split between bits that
-		define the interrupt's pre-emption priority bits and bits that define
-		the interrupt's sub-priority.  For simplicity all bits must be defined
-		to be pre-emption priority bits.  The following assertion will fail if
-		this is not the case (if some bits represent a sub-priority).
-
-		If the application only uses CMSIS libraries for interrupt
-		configuration then the correct setting can be achieved on all Cortex-M
-		devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
-		scheduler.  Note however that some vendor specific peripheral libraries
-		assume a non-zero priority group setting, in which cases using a value
-		of zero will result in unpredictable behaviour. */
-		configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
-	}
+        /* Priority grouping:  The interrupt controller (NVIC) allows the bits
+         * that define each interrupt's priority to be split between bits that
+         * define the interrupt's pre-emption priority bits and bits that define
+         * the interrupt's sub-priority.  For simplicity all bits must be defined
+         * to be pre-emption priority bits.  The following assertion will fail if
+         * this is not the case (if some bits represent a sub-priority).
+         *
+         * If the application only uses CMSIS libraries for interrupt
+         * configuration then the correct setting can be achieved on all Cortex-M
+         * devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
+         * scheduler.  Note however that some vendor specific peripheral libraries
+         * assume a non-zero priority group setting, in which cases using a value
+         * of zero will result in unpredictable behaviour. */
+        configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
+    }
 
 #endif /* configASSERT_DEFINED */
-
-
diff --git a/portable/RVDS/ARM_CM3/portmacro.h b/portable/RVDS/ARM_CM3/portmacro.h
index 82df5ec82..2eb5a3cab 100644
--- a/portable/RVDS/ARM_CM3/portmacro.h
+++ b/portable/RVDS/ARM_CM3/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,19 +19,20 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 
 #ifndef PORTMACRO_H
 #define PORTMACRO_H
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
-extern "C" {
+    extern "C" {
 #endif
+/* *INDENT-ON* */
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -44,209 +45,220 @@ extern "C" {
  */
 
 /* Type definitions. */
-#define portCHAR		char
-#define portFLOAT		float
-#define portDOUBLE		double
-#define portLONG		long
-#define portSHORT		short
-#define portSTACK_TYPE	uint32_t
-#define portBASE_TYPE	long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE StackType_t;
-typedef long BaseType_t;
-typedef unsigned long UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC 1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Architecture specifics. */
-#define portSTACK_GROWTH			( -1 )
-#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT			8
+    #define portSTACK_GROWTH          ( -1 )
+    #define portTICK_PERIOD_MS        ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT        8
 
 /* Constants used with memory barrier intrinsics. */
-#define portSY_FULL_READ_WRITE		( 15 )
+    #define portSY_FULL_READ_WRITE    ( 15 )
 
 /*-----------------------------------------------------------*/
 
 /* Scheduler utilities. */
-#define portYIELD()																\
-{																				\
-	/* Set a PendSV to request a context switch. */								\
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;								\
-																				\
-	/* Barriers are normally not required but do ensure the code is completely	\
-	within the specified behaviour for the architecture. */						\
-	__dsb( portSY_FULL_READ_WRITE );											\
-	__isb( portSY_FULL_READ_WRITE );											\
-}
+    #define portYIELD()                                 \
+    {                                                   \
+        /* Set a PendSV to request a context switch. */ \
+        portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
+                                                        \
+        /* Barriers are normally not required but do ensure the code is completely \
+         * within the specified behaviour for the architecture. */ \
+        __dsb( portSY_FULL_READ_WRITE );                           \
+        __isb( portSY_FULL_READ_WRITE );                           \
+    }
 /*-----------------------------------------------------------*/
 
-#define portNVIC_INT_CTRL_REG		( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT		( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()
-#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired != pdFALSE ) portYIELD()
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /* Critical section management. */
-extern void vPortEnterCritical( void );
-extern void vPortExitCritical( void );
+    extern void vPortEnterCritical( void );
+    extern void vPortExitCritical( void );
 
-#define portDISABLE_INTERRUPTS()				vPortRaiseBASEPRI()
-#define portENABLE_INTERRUPTS()					vPortSetBASEPRI( 0 )
-#define portENTER_CRITICAL()					vPortEnterCritical()
-#define portEXIT_CRITICAL()						vPortExitCritical()
-#define portSET_INTERRUPT_MASK_FROM_ISR()		ulPortRaiseBASEPRI()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)	vPortSetBASEPRI(x)
+    #define portDISABLE_INTERRUPTS()                  vPortRaiseBASEPRI()
+    #define portENABLE_INTERRUPTS()                   vPortSetBASEPRI( 0 )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulPortRaiseBASEPRI()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vPortSetBASEPRI( x )
 
 /*-----------------------------------------------------------*/
 
 /* Tickless idle/low power functionality. */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Port specific optimisations. */
-#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
-	#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
-#endif
+    #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
+        #define configUSE_PORT_OPTIMISED_TASK_SELECTION    1
+    #endif
 
-#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
+    #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
 
-	/* Check the configuration. */
-	#if( configMAX_PRIORITIES > 32 )
-		#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
-	#endif
+/* Check the configuration. */
+        #if ( configMAX_PRIORITIES > 32 )
+            #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
+        #endif
 
-	/* Store/clear the ready priorities in a bit map. */
-	#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
-	#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
+/* Store/clear the ready priorities in a bit map. */
+        #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities )    ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
+        #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities )     ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
 
-	/*-----------------------------------------------------------*/
+/*-----------------------------------------------------------*/
 
-	#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) )
+        #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities )    uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) )
 
-#endif /* taskRECORD_READY_PRIORITY */
+    #endif /* taskRECORD_READY_PRIORITY */
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site.  These are
-not necessary for to use this port.  They are defined so the common demo files
-(which build with all the ports) will build. */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+ * not necessary for to use this port.  They are defined so the common demo files
+ * (which build with all the ports) will build. */
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
-#ifdef configASSERT
-	void vPortValidateInterruptPriority( void );
-	#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() 	vPortValidateInterruptPriority()
-#endif
+    #ifdef configASSERT
+        void vPortValidateInterruptPriority( void );
+        #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()    vPortValidateInterruptPriority()
+    #endif
 
 /* portNOP() is not required by this port. */
-#define portNOP()
+    #define portNOP()
 
-#define portINLINE __inline
+    #define portINLINE              __inline
 
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE __forceinline
-#endif
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE    __forceinline
+    #endif
 
 /*-----------------------------------------------------------*/
 
-static portFORCE_INLINE void vPortSetBASEPRI( uint32_t ulBASEPRI )
-{
-	__asm
-	{
-		/* Barrier instructions are not used as this function is only used to
-		lower the BASEPRI value. */
-		msr basepri, ulBASEPRI
-	}
-}
+    static portFORCE_INLINE void vPortSetBASEPRI( uint32_t ulBASEPRI )
+    {
+        __asm
+        {
+            /* Barrier instructions are not used as this function is only used to
+             * lower the BASEPRI value. */
+/* *INDENT-OFF* */
+            msr basepri, ulBASEPRI
+/* *INDENT-ON* */
+        }
+    }
 /*-----------------------------------------------------------*/
 
-static portFORCE_INLINE void vPortRaiseBASEPRI( void )
-{
-uint32_t ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
+    static portFORCE_INLINE void vPortRaiseBASEPRI( void )
+    {
+        uint32_t ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
 
-	__asm
-	{
-		/* Set BASEPRI to the max syscall priority to effect a critical
-		section. */
-		msr basepri, ulNewBASEPRI
-		dsb
-		isb
-	}
-}
+        __asm
+        {
+            /* Set BASEPRI to the max syscall priority to effect a critical
+             * section. */
+/* *INDENT-OFF* */
+            msr basepri, ulNewBASEPRI
+            dsb
+            isb
+/* *INDENT-ON* */
+        }
+    }
 /*-----------------------------------------------------------*/
 
-static portFORCE_INLINE void vPortClearBASEPRIFromISR( void )
-{
-	__asm
-	{
-		/* Set BASEPRI to 0 so no interrupts are masked.  This function is only
-		used to lower the mask in an interrupt, so memory barriers are not 
-		used. */
-		msr basepri, #0
-	}
-}
+    static portFORCE_INLINE void vPortClearBASEPRIFromISR( void )
+    {
+        __asm
+        {
+            /* Set BASEPRI to 0 so no interrupts are masked.  This function is only
+             * used to lower the mask in an interrupt, so memory barriers are not
+             * used. */
+/* *INDENT-OFF* */
+            msr basepri, # 0
+/* *INDENT-ON* */
+        }
+    }
 /*-----------------------------------------------------------*/
 
-static portFORCE_INLINE uint32_t ulPortRaiseBASEPRI( void )
-{
-uint32_t ulReturn, ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
+    static portFORCE_INLINE uint32_t ulPortRaiseBASEPRI( void )
+    {
+        uint32_t ulReturn, ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
 
-	__asm
-	{
-		/* Set BASEPRI to the max syscall priority to effect a critical
-		section. */
-		mrs ulReturn, basepri
-		msr basepri, ulNewBASEPRI
-		dsb
-		isb
-	}
+        __asm
+        {
+            /* Set BASEPRI to the max syscall priority to effect a critical
+             * section. */
+/* *INDENT-OFF* */
+            mrs ulReturn, basepri
+            msr basepri, ulNewBASEPRI
+            dsb
+            isb
+/* *INDENT-ON* */
+        }
 
-	return ulReturn;
-}
+        return ulReturn;
+    }
 /*-----------------------------------------------------------*/
 
-static portFORCE_INLINE BaseType_t xPortIsInsideInterrupt( void )
-{
-uint32_t ulCurrentInterrupt;
-BaseType_t xReturn;
+    static portFORCE_INLINE BaseType_t xPortIsInsideInterrupt( void )
+    {
+        uint32_t ulCurrentInterrupt;
+        BaseType_t xReturn;
 
-	/* Obtain the number of the currently executing interrupt. */
-	__asm
-	{
-		mrs ulCurrentInterrupt, ipsr
-	}
+        /* Obtain the number of the currently executing interrupt. */
+        __asm
+        {
+/* *INDENT-OFF* */
+            mrs ulCurrentInterrupt, ipsr
+/* *INDENT-ON* */
+        }
 
-	if( ulCurrentInterrupt == 0 )
-	{
-		xReturn = pdFALSE;
-	}
-	else
-	{
-		xReturn = pdTRUE;
-	}
+        if( ulCurrentInterrupt == 0 )
+        {
+            xReturn = pdFALSE;
+        }
+        else
+        {
+            xReturn = pdTRUE;
+        }
 
-	return xReturn;
-}
+        return xReturn;
+    }
 
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
-}
+    }
 #endif
+/* *INDENT-ON* */
 
 #endif /* PORTMACRO_H */
-
diff --git a/portable/RVDS/ARM_CM4F/port.c b/portable/RVDS/ARM_CM4F/port.c
index 42e18b846..5f4ac1754 100644
--- a/portable/RVDS/ARM_CM4F/port.c
+++ b/portable/RVDS/ARM_CM4F/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,100 +19,100 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------
- * Implementation of functions defined in portable.h for the ARM CM4F port.
- *----------------------------------------------------------*/
+* Implementation of functions defined in portable.h for the ARM CM4F port.
+*----------------------------------------------------------*/
 
 /* Scheduler includes. */
 #include "FreeRTOS.h"
 #include "task.h"
 
 #ifndef __TARGET_FPU_VFP
-	#error This port can only be used when the project options are configured to enable hardware floating point support.
+    #error This port can only be used when the project options are configured to enable hardware floating point support.
 #endif
 
 #if configMAX_SYSCALL_INTERRUPT_PRIORITY == 0
-	#error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+    #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See http: /*www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
 #endif
 
 #ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 1UL << 2UL )
+    #define configSYSTICK_CLOCK_HZ      configCPU_CLOCK_HZ
+    /* Ensure the SysTick is clocked at the same frequency as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 1UL << 2UL )
 #else
-	/* The way the SysTick is clocked is not modified in case it is not the same
-	as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 0 )
+
+/* The way the SysTick is clocked is not modified in case it is not the same
+ * as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 0 )
 #endif
 
 /* Legacy macro for backward compatibility only.  This macro used to be used to
-replace the function that configures the clock used to generate the tick
-interrupt (prvSetupTimerInterrupt()), but now the function is declared weak so
-the application writer can override it by simply defining a function of the
-same name (vApplicationSetupTickInterrupt()). */
+ * replace the function that configures the clock used to generate the tick
+ * interrupt (prvSetupTimerInterrupt()), but now the function is declared weak so
+ * the application writer can override it by simply defining a function of the
+ * same name (vApplicationSetupTickInterrupt()). */
 #ifndef configOVERRIDE_DEFAULT_TICK_CONFIGURATION
-	#define configOVERRIDE_DEFAULT_TICK_CONFIGURATION 0
+    #define configOVERRIDE_DEFAULT_TICK_CONFIGURATION    0
 #endif
 
 /* Constants required to manipulate the core.  Registers first... */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_CTRL_REG             ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG             ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG    ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SHPR3_REG                    ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
 /* ...then bits in the registers. */
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portNVIC_PENDSVCLEAR_BIT 			( 1UL << 27UL )
-#define portNVIC_PEND_SYSTICK_CLEAR_BIT		( 1UL << 25UL )
+#define portNVIC_SYSTICK_INT_BIT              ( 1UL << 1UL )
+#define portNVIC_SYSTICK_ENABLE_BIT           ( 1UL << 0UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT       ( 1UL << 16UL )
+#define portNVIC_PENDSVCLEAR_BIT              ( 1UL << 27UL )
+#define portNVIC_PEND_SYSTICK_CLEAR_BIT       ( 1UL << 25UL )
 
 /* Constants used to detect a Cortex-M7 r0p1 core, which should use the ARM_CM7
-r0p1 port. */
-#define portCPUID							( * ( ( volatile uint32_t * ) 0xE000ed00 ) )
-#define portCORTEX_M7_r0p1_ID				( 0x410FC271UL )
-#define portCORTEX_M7_r0p0_ID				( 0x410FC270UL )
+ * r0p1 port. */
+#define portCPUID                             ( *( ( volatile uint32_t * ) 0xE000ed00 ) )
+#define portCORTEX_M7_r0p1_ID                 ( 0x410FC271UL )
+#define portCORTEX_M7_r0p0_ID                 ( 0x410FC270UL )
 
-#define portNVIC_PENDSV_PRI					( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
-#define portNVIC_SYSTICK_PRI				( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
+#define portNVIC_PENDSV_PRI                   ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
+#define portNVIC_SYSTICK_PRI                  ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
 
 /* Constants required to check the validity of an interrupt priority. */
-#define portFIRST_USER_INTERRUPT_NUMBER		( 16 )
-#define portNVIC_IP_REGISTERS_OFFSET_16 	( 0xE000E3F0 )
-#define portAIRCR_REG						( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
-#define portMAX_8_BIT_VALUE					( ( uint8_t ) 0xff )
-#define portTOP_BIT_OF_BYTE					( ( uint8_t ) 0x80 )
-#define portMAX_PRIGROUP_BITS				( ( uint8_t ) 7 )
-#define portPRIORITY_GROUP_MASK				( 0x07UL << 8UL )
-#define portPRIGROUP_SHIFT					( 8UL )
+#define portFIRST_USER_INTERRUPT_NUMBER       ( 16 )
+#define portNVIC_IP_REGISTERS_OFFSET_16       ( 0xE000E3F0 )
+#define portAIRCR_REG                         ( *( ( volatile uint32_t * ) 0xE000ED0C ) )
+#define portMAX_8_BIT_VALUE                   ( ( uint8_t ) 0xff )
+#define portTOP_BIT_OF_BYTE                   ( ( uint8_t ) 0x80 )
+#define portMAX_PRIGROUP_BITS                 ( ( uint8_t ) 7 )
+#define portPRIORITY_GROUP_MASK               ( 0x07UL << 8UL )
+#define portPRIGROUP_SHIFT                    ( 8UL )
 
 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
-#define portVECTACTIVE_MASK					( 0xFFUL )
+#define portVECTACTIVE_MASK                   ( 0xFFUL )
 
 /* Constants required to manipulate the VFP. */
-#define portFPCCR					( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
-#define portASPEN_AND_LSPEN_BITS	( 0x3UL << 30UL )
+#define portFPCCR                             ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
+#define portASPEN_AND_LSPEN_BITS              ( 0x3UL << 30UL )
 
 /* Constants required to set up the initial stack. */
-#define portINITIAL_XPSR			( 0x01000000 )
-#define portINITIAL_EXC_RETURN		( 0xfffffffd )
+#define portINITIAL_XPSR                      ( 0x01000000 )
+#define portINITIAL_EXC_RETURN                ( 0xfffffffd )
 
 /* The systick is a 24-bit counter. */
-#define portMAX_24_BIT_NUMBER		( 0xffffffUL )
+#define portMAX_24_BIT_NUMBER                 ( 0xffffffUL )
 
 /* A fiddle factor to estimate the number of SysTick counts that would have
-occurred while the SysTick counter is stopped during tickless idle
-calculations. */
-#define portMISSED_COUNTS_FACTOR	( 45UL )
+ * occurred while the SysTick counter is stopped during tickless idle
+ * calculations. */
+#define portMISSED_COUNTS_FACTOR              ( 45UL )
 
 /* For strict compliance with the Cortex-M spec the task start address should
-have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
-#define portSTART_ADDRESS_MASK		( ( StackType_t ) 0xfffffffeUL )
+ * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
+#define portSTART_ADDRESS_MASK                ( ( StackType_t ) 0xfffffffeUL )
 
 /*
  * Setup the timer to generate the tick interrupts.  The implementation in this
@@ -146,30 +146,30 @@ static void prvTaskExitError( void );
 /*-----------------------------------------------------------*/
 
 /* Each task maintains its own interrupt status in the critical nesting
-variable. */
+ * variable. */
 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 
 /*
  * The number of SysTick increments that make up one tick period.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulTimerCountsForOneTick = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulTimerCountsForOneTick = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * The maximum number of tick periods that can be suppressed is limited by the
  * 24 bit resolution of the SysTick timer.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t xMaximumPossibleSuppressedTicks = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * Compensate for the CPU cycles that pass while the SysTick is stopped (low
  * power functionality only.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulStoppedTimerCompensation = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulStoppedTimerCompensation = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
@@ -178,9 +178,9 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
  * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
  */
 #if ( configASSERT_DEFINED == 1 )
-	 static uint8_t ucMaxSysCallPriority = 0;
-	 static uint32_t ulMaxPRIGROUPValue = 0;
-	 static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16;
+    static uint8_t ucMaxSysCallPriority = 0;
+    static uint32_t ulMaxPRIGROUPValue = 0;
+    static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16;
 #endif /* configASSERT_DEFINED */
 
 /*-----------------------------------------------------------*/
@@ -188,109 +188,121 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 /*
  * See header file for description.
  */
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	interrupt. */
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
 
-	/* Offset added to account for the way the MCU uses the stack on entry/exit
-	of interrupts, and to ensure alignment. */
-	pxTopOfStack--;
+    /* Offset added to account for the way the MCU uses the stack on entry/exit
+     * of interrupts, and to ensure alignment. */
+    pxTopOfStack--;
 
-	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
-	pxTopOfStack--;
-	*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;	/* PC */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) prvTaskExitError;	/* LR */
+    *pxTopOfStack = portINITIAL_XPSR;                                    /* xPSR */
+    pxTopOfStack--;
+    *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) prvTaskExitError;                    /* LR */
 
-	/* Save code space by skipping register initialisation. */
-	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
-	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
+    /* Save code space by skipping register initialisation. */
+    pxTopOfStack -= 5;                            /* R12, R3, R2 and R1. */
+    *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
 
-	/* A save method is being used that requires each task to maintain its
-	own exec return value. */
-	pxTopOfStack--;
-	*pxTopOfStack = portINITIAL_EXC_RETURN;
+    /* A save method is being used that requires each task to maintain its
+     * own exec return value. */
+    pxTopOfStack--;
+    *pxTopOfStack = portINITIAL_EXC_RETURN;
 
-	pxTopOfStack -= 8;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
+    pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
 
-	return pxTopOfStack;
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 static void prvTaskExitError( void )
 {
-	/* A function that implements a task must not exit or attempt to return to
-	its caller as there is nothing to return to.  If a task wants to exit it
-	should instead call vTaskDelete( NULL ).
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to.  If a task wants to exit it
+     * should instead call vTaskDelete( NULL ).
+     *
+     * Artificially force an assert() to be triggered if configASSERT() is
+     * defined, then stop here so application writers can catch the error. */
+    configASSERT( uxCriticalNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
 
-	Artificially force an assert() to be triggered if configASSERT() is
-	defined, then stop here so application writers can catch the error. */
-	configASSERT( uxCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
-	for( ;; );
+    for( ; ; )
+    {
+    }
 }
 /*-----------------------------------------------------------*/
 
 __asm void vPortSVCHandler( void )
 {
-	PRESERVE8
+/* *INDENT-OFF* */
+    PRESERVE8
 
-	/* Get the location of the current TCB. */
-	ldr	r3, =pxCurrentTCB
-	ldr r1, [r3]
-	ldr r0, [r1]
-	/* Pop the core registers. */
-	ldmia r0!, {r4-r11, r14}
-	msr psp, r0
-	isb
-	mov r0, #0
-	msr	basepri, r0
-	bx r14
+    /* Get the location of the current TCB. */
+    ldr r3, = pxCurrentTCB
+    ldr r1, [ r3 ]
+    ldr r0, [ r1 ]
+    /* Pop the core registers. */
+    ldmia r0 !, {r4-r11,r14}
+    msr psp, r0
+    isb
+    mov r0, # 0
+    msr basepri, r0
+    bx r14
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
 __asm void prvStartFirstTask( void )
 {
-	PRESERVE8
+/* *INDENT-OFF* */
+    PRESERVE8
 
-	/* Use the NVIC offset register to locate the stack. */
-	ldr r0, =0xE000ED08
-	ldr r0, [r0]
-	ldr r0, [r0]
-	/* Set the msp back to the start of the stack. */
-	msr msp, r0
-	/* Clear the bit that indicates the FPU is in use in case the FPU was used
-	before the scheduler was started - which would otherwise result in the
-	unnecessary leaving of space in the SVC stack for lazy saving of FPU
-	registers. */
-	mov r0, #0
-	msr control, r0
-	/* Globally enable interrupts. */
-	cpsie i
-	cpsie f
-	dsb
-	isb
-	/* Call SVC to start the first task. */
-	svc 0
-	nop
-	nop
+    /* Use the NVIC offset register to locate the stack. */
+    ldr r0, =0xE000ED08
+    ldr r0, [ r0 ]
+    ldr r0, [ r0 ]
+    /* Set the msp back to the start of the stack. */
+    msr msp, r0
+
+    /* Clear the bit that indicates the FPU is in use in case the FPU was used
+     * before the scheduler was started - which would otherwise result in the
+     * unnecessary leaving of space in the SVC stack for lazy saving of FPU
+     * registers. */
+    mov r0, #0
+    msr control, r0
+    /* Globally enable interrupts. */
+    cpsie i
+    cpsie f
+    dsb
+    isb
+    /* Call SVC to start the first task. */
+    svc 0
+    nop
+    nop
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
 __asm void prvEnableVFP( void )
 {
-	PRESERVE8
+/* *INDENT-OFF* */
+    PRESERVE8
 
-	/* The FPU enable bits are in the CPACR. */
-	ldr.w r0, =0xE000ED88
-	ldr	r1, [r0]
+    /* The FPU enable bits are in the CPACR. */
+    ldr.w r0, =0xE000ED88
+    ldr r1, [ r0 ]
 
-	/* Enable CP10 and CP11 coprocessors, then save back. */
-	orr	r1, r1, #( 0xf << 20 )
-	str r1, [r0]
-	bx	r14
-	nop
+    /* Enable CP10 and CP11 coprocessors, then save back. */
+    orr r1, r1, #( 0xf << 20 )
+    str r1, [ r0 ]
+    bx r14
+    nop
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
@@ -299,389 +311,397 @@ __asm void prvEnableVFP( void )
  */
 BaseType_t xPortStartScheduler( void )
 {
-	/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
-	See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
-	configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
+    /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
+     * See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
+    configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
 
-	/* This port can be used on all revisions of the Cortex-M7 core other than
-	the r0p1 parts.  r0p1 parts should use the port from the
-	/source/portable/GCC/ARM_CM7/r0p1 directory. */
-	configASSERT( portCPUID != portCORTEX_M7_r0p1_ID );
-	configASSERT( portCPUID != portCORTEX_M7_r0p0_ID );
+    /* This port can be used on all revisions of the Cortex-M7 core other than
+     * the r0p1 parts.  r0p1 parts should use the port from the
+     * /source/portable/GCC/ARM_CM7/r0p1 directory. */
+    configASSERT( portCPUID != portCORTEX_M7_r0p1_ID );
+    configASSERT( portCPUID != portCORTEX_M7_r0p0_ID );
 
-	#if( configASSERT_DEFINED == 1 )
-	{
-		volatile uint32_t ulOriginalPriority;
-		volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
-		volatile uint8_t ucMaxPriorityValue;
+    #if ( configASSERT_DEFINED == 1 )
+        {
+            volatile uint32_t ulOriginalPriority;
+            volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
+            volatile uint8_t ucMaxPriorityValue;
 
-		/* Determine the maximum priority from which ISR safe FreeRTOS API
-		functions can be called.  ISR safe functions are those that end in
-		"FromISR".  FreeRTOS maintains separate thread and ISR API functions to
-		ensure interrupt entry is as fast and simple as possible.
+            /* Determine the maximum priority from which ISR safe FreeRTOS API
+             * functions can be called.  ISR safe functions are those that end in
+             * "FromISR".  FreeRTOS maintains separate thread and ISR API functions to
+             * ensure interrupt entry is as fast and simple as possible.
+             *
+             * Save the interrupt priority value that is about to be clobbered. */
+            ulOriginalPriority = *pucFirstUserPriorityRegister;
 
-		Save the interrupt priority value that is about to be clobbered. */
-		ulOriginalPriority = *pucFirstUserPriorityRegister;
+            /* Determine the number of priority bits available.  First write to all
+             * possible bits. */
+            *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
 
-		/* Determine the number of priority bits available.  First write to all
-		possible bits. */
-		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
+            /* Read the value back to see how many bits stuck. */
+            ucMaxPriorityValue = *pucFirstUserPriorityRegister;
 
-		/* Read the value back to see how many bits stuck. */
-		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
+            /* The kernel interrupt priority should be set to the lowest
+             * priority. */
+            configASSERT( ucMaxPriorityValue == ( configKERNEL_INTERRUPT_PRIORITY & ucMaxPriorityValue ) );
 
-		/* The kernel interrupt priority should be set to the lowest
-		priority. */
-		configASSERT( ucMaxPriorityValue == ( configKERNEL_INTERRUPT_PRIORITY & ucMaxPriorityValue ) );
+            /* Use the same mask on the maximum system call priority. */
+            ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
 
-		/* Use the same mask on the maximum system call priority. */
-		ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
+            /* Calculate the maximum acceptable priority group value for the number
+             * of bits read back. */
+            ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
 
-		/* Calculate the maximum acceptable priority group value for the number
-		of bits read back. */
-		ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
-		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
-		{
-			ulMaxPRIGROUPValue--;
-			ucMaxPriorityValue <<= ( uint8_t ) 0x01;
-		}
+            while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
+            {
+                ulMaxPRIGROUPValue--;
+                ucMaxPriorityValue <<= ( uint8_t ) 0x01;
+            }
 
-		#ifdef __NVIC_PRIO_BITS
-		{
-			/* Check the CMSIS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
-		}
-		#endif
+            #ifdef __NVIC_PRIO_BITS
+                {
+                    /* Check the CMSIS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
+                }
+            #endif
 
-		#ifdef configPRIO_BITS
-		{
-			/* Check the FreeRTOS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
-		}
-		#endif
+            #ifdef configPRIO_BITS
+                {
+                    /* Check the FreeRTOS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
+                }
+            #endif
 
-		/* Shift the priority group value back to its position within the AIRCR
-		register. */
-		ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
-		ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
+            /* Shift the priority group value back to its position within the AIRCR
+             * register. */
+            ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
+            ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
 
-		/* Restore the clobbered interrupt priority register to its original
-		value. */
-		*pucFirstUserPriorityRegister = ulOriginalPriority;
-	}
-	#endif /* conifgASSERT_DEFINED */
+            /* Restore the clobbered interrupt priority register to its original
+             * value. */
+            *pucFirstUserPriorityRegister = ulOriginalPriority;
+        }
+    #endif /* conifgASSERT_DEFINED */
 
-	/* Make PendSV and SysTick the lowest priority interrupts. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+    /* Make PendSV and SysTick the lowest priority interrupts. */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
-	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-	here already. */
-	vPortSetupTimerInterrupt();
+    /* Start the timer that generates the tick ISR.  Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
 
-	/* Initialise the critical nesting count ready for the first task. */
-	uxCriticalNesting = 0;
+    /* Initialise the critical nesting count ready for the first task. */
+    uxCriticalNesting = 0;
 
-	/* Ensure the VFP is enabled - it should be anyway. */
-	prvEnableVFP();
+    /* Ensure the VFP is enabled - it should be anyway. */
+    prvEnableVFP();
 
-	/* Lazy save always. */
-	*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
+    /* Lazy save always. */
+    *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
 
-	/* Start the first task. */
-	prvStartFirstTask();
+    /* Start the first task. */
+    prvStartFirstTask();
 
-	/* Should not get here! */
-	return 0;
+    /* Should not get here! */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void )
 {
-	/* Not implemented in ports where there is nothing to return to.
-	Artificially force an assert. */
-	configASSERT( uxCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( uxCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void )
 {
-	portDISABLE_INTERRUPTS();
-	uxCriticalNesting++;
+    portDISABLE_INTERRUPTS();
+    uxCriticalNesting++;
 
-	/* This is not the interrupt safe version of the enter critical function so
-	assert() if it is being called from an interrupt context.  Only API
-	functions that end in "FromISR" can be used in an interrupt.  Only assert if
-	the critical nesting count is 1 to protect against recursive calls if the
-	assert function also uses a critical section. */
-	if( uxCriticalNesting == 1 )
-	{
-		configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
-	}
+    /* This is not the interrupt safe version of the enter critical function so
+     * assert() if it is being called from an interrupt context.  Only API
+     * functions that end in "FromISR" can be used in an interrupt.  Only assert if
+     * the critical nesting count is 1 to protect against recursive calls if the
+     * assert function also uses a critical section. */
+    if( uxCriticalNesting == 1 )
+    {
+        configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
+    }
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void )
 {
-	configASSERT( uxCriticalNesting );
-	uxCriticalNesting--;
-	if( uxCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
+    configASSERT( uxCriticalNesting );
+    uxCriticalNesting--;
+
+    if( uxCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
 }
 /*-----------------------------------------------------------*/
 
 __asm void xPortPendSVHandler( void )
 {
-	extern uxCriticalNesting;
-	extern pxCurrentTCB;
-	extern vTaskSwitchContext;
+    extern uxCriticalNesting;
+    extern pxCurrentTCB;
+    extern vTaskSwitchContext;
 
-	PRESERVE8
+/* *INDENT-OFF* */
+    PRESERVE8
 
-	mrs r0, psp
-	isb
-	/* Get the location of the current TCB. */
-	ldr	r3, =pxCurrentTCB
-	ldr	r2, [r3]
+    mrs r0, psp
+    isb
+    /* Get the location of the current TCB. */
+    ldr r3, =pxCurrentTCB
+    ldr r2, [ r3 ]
 
-	/* Is the task using the FPU context?  If so, push high vfp registers. */
-	tst r14, #0x10
-	it eq
-	vstmdbeq r0!, {s16-s31}
+    /* Is the task using the FPU context?  If so, push high vfp registers. */
+    tst r14, #0x10
+    it eq
+    vstmdbeq r0!, {s16-s31}
 
-	/* Save the core registers. */
-	stmdb r0!, {r4-r11, r14}
+    /* Save the core registers. */
+    stmdb r0!, {r4-r11, r14}
 
-	/* Save the new top of stack into the first member of the TCB. */
-	str r0, [r2]
+    /* Save the new top of stack into the first member of the TCB. */
+    str r0, [ r2 ]
 
-	stmdb sp!, {r0, r3}
-	mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
-	msr basepri, r0
-	dsb
-	isb
-	bl vTaskSwitchContext
-	mov r0, #0
-	msr basepri, r0
-	ldmia sp!, {r0, r3}
+    stmdb sp!, {r0, r3}
+    mov r0, # configMAX_SYSCALL_INTERRUPT_PRIORITY
+    msr basepri, r0
+    dsb
+    isb
+    bl vTaskSwitchContext
+    mov r0, # 0
+    msr basepri, r0
+    ldmia sp!, {r0, r3}
 
-	/* The first item in pxCurrentTCB is the task top of stack. */
-	ldr r1, [r3]
-	ldr r0, [r1]
+    /* The first item in pxCurrentTCB is the task top of stack. */
+    ldr r1, [ r3 ]
+    ldr r0, [ r1 ]
 
-	/* Pop the core registers. */
-	ldmia r0!, {r4-r11, r14}
+    /* Pop the core registers. */
+    ldmia r0!, {r4-r11, r14}
 
-	/* Is the task using the FPU context?  If so, pop the high vfp registers
-	too. */
-	tst r14, #0x10
-	it eq
-	vldmiaeq r0!, {s16-s31}
+    /* Is the task using the FPU context?  If so, pop the high vfp registers
+     * too. */
+    tst r14, # 0x10
+    it eq
+    vldmiaeq r0!, {s16-s31}
 
-	msr psp, r0
-	isb
-	#ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata */
-		#if WORKAROUND_PMU_CM001 == 1
-			push { r14 }
-			pop { pc }
-			nop
-		#endif
-	#endif
+    msr psp, r0
+    isb
+    #ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata */
+        #if WORKAROUND_PMU_CM001 == 1
+            push { r14 }
+            pop { pc }
+            nop
+        #endif
+    #endif
 
-	bx r14
+    bx r14
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
 void xPortSysTickHandler( void )
 {
-	/* The SysTick runs at the lowest interrupt priority, so when this interrupt
-	executes all interrupts must be unmasked.  There is therefore no need to
-	save and then restore the interrupt mask value as its value is already
-	known - therefore the slightly faster vPortRaiseBASEPRI() function is used
-	in place of portSET_INTERRUPT_MASK_FROM_ISR(). */
-	vPortRaiseBASEPRI();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* A context switch is required.  Context switching is performed in
-			the PendSV interrupt.  Pend the PendSV interrupt. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	vPortClearBASEPRIFromISR();
+    /* The SysTick runs at the lowest interrupt priority, so when this interrupt
+     * executes all interrupts must be unmasked.  There is therefore no need to
+     * save and then restore the interrupt mask value as its value is already
+     * known - therefore the slightly faster vPortRaiseBASEPRI() function is used
+     * in place of portSET_INTERRUPT_MASK_FROM_ISR(). */
+    vPortRaiseBASEPRI();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* A context switch is required.  Context switching is performed in
+             * the PendSV interrupt.  Pend the PendSV interrupt. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+
+    vPortClearBASEPRIFromISR();
 }
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TICKLESS_IDLE == 1 )
+#if ( configUSE_TICKLESS_IDLE == 1 )
 
-	__weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-	{
-	uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
-	TickType_t xModifiableIdleTime;
+    __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+    {
+        uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+        TickType_t xModifiableIdleTime;
 
-		/* Make sure the SysTick reload value does not overflow the counter. */
-		if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-		{
-			xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-		}
+        /* Make sure the SysTick reload value does not overflow the counter. */
+        if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+        {
+            xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+        }
 
-		/* Stop the SysTick momentarily.  The time the SysTick is stopped for
-		is accounted for as best it can be, but using the tickless mode will
-		inevitably result in some tiny drift of the time maintained by the
-		kernel with respect to calendar time. */
-		portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+        /* Stop the SysTick momentarily.  The time the SysTick is stopped for
+         * is accounted for as best it can be, but using the tickless mode will
+         * inevitably result in some tiny drift of the time maintained by the
+         * kernel with respect to calendar time. */
+        portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
 
-		/* Calculate the reload value required to wait xExpectedIdleTime
-		tick periods.  -1 is used because this code will execute part way
-		through one of the tick periods. */
-		ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-		if( ulReloadValue > ulStoppedTimerCompensation )
-		{
-			ulReloadValue -= ulStoppedTimerCompensation;
-		}
+        /* Calculate the reload value required to wait xExpectedIdleTime
+         * tick periods.  -1 is used because this code will execute part way
+         * through one of the tick periods. */
+        ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
 
-		/* Enter a critical section but don't use the taskENTER_CRITICAL()
-		method as that will mask interrupts that should exit sleep mode. */
-		__disable_irq();
-		__dsb( portSY_FULL_READ_WRITE );
-		__isb( portSY_FULL_READ_WRITE );
+        if( ulReloadValue > ulStoppedTimerCompensation )
+        {
+            ulReloadValue -= ulStoppedTimerCompensation;
+        }
 
-		/* If a context switch is pending or a task is waiting for the scheduler
-		to be unsuspended then abandon the low power entry. */
-		if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-		{
-			/* Restart from whatever is left in the count register to complete
-			this tick period. */
-			portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+        /* Enter a critical section but don't use the taskENTER_CRITICAL()
+         * method as that will mask interrupts that should exit sleep mode. */
+        __disable_irq();
+        __dsb( portSY_FULL_READ_WRITE );
+        __isb( portSY_FULL_READ_WRITE );
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+        /* If a context switch is pending or a task is waiting for the scheduler
+         * to be unsuspended then abandon the low power entry. */
+        if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+        {
+            /* Restart from whatever is left in the count register to complete
+             * this tick period. */
+            portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Reset the reload register to the value required for normal tick
-			periods. */
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts - see comments above __disable_irq() call
-			above. */
-			__enable_irq();
-		}
-		else
-		{
-			/* Set the new reload value. */
-			portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+            /* Reset the reload register to the value required for normal tick
+             * periods. */
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
 
-			/* Clear the SysTick count flag and set the count value back to
-			zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            /* Re-enable interrupts - see comments above __disable_irq() call
+             * above. */
+            __enable_irq();
+        }
+        else
+        {
+            /* Set the new reload value. */
+            portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            /* Clear the SysTick count flag and set the count value back to
+             * zero. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-			/* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
-			set its parameter to 0 to indicate that its implementation contains
-			its own wait for interrupt or wait for event instruction, and so wfi
-			should not be executed again.  However, the original expected idle
-			time variable must remain unmodified, so a copy is taken. */
-			xModifiableIdleTime = xExpectedIdleTime;
-			configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-			if( xModifiableIdleTime > 0 )
-			{
-				__dsb( portSY_FULL_READ_WRITE );
-				__wfi();
-				__isb( portSY_FULL_READ_WRITE );
-			}
-			configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts to allow the interrupt that brought the MCU
-			out of sleep mode to execute immediately.  see comments above
-			__disable_interrupt() call above. */
-			__enable_irq();
-			__dsb( portSY_FULL_READ_WRITE );
-			__isb( portSY_FULL_READ_WRITE );
+            /* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
+             * set its parameter to 0 to indicate that its implementation contains
+             * its own wait for interrupt or wait for event instruction, and so wfi
+             * should not be executed again.  However, the original expected idle
+             * time variable must remain unmodified, so a copy is taken. */
+            xModifiableIdleTime = xExpectedIdleTime;
+            configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
 
-			/* Disable interrupts again because the clock is about to be stopped
-			and interrupts that execute while the clock is stopped will increase
-			any slippage between the time maintained by the RTOS and calendar
-			time. */
-			__disable_irq();
-			__dsb( portSY_FULL_READ_WRITE );
-			__isb( portSY_FULL_READ_WRITE );
+            if( xModifiableIdleTime > 0 )
+            {
+                __dsb( portSY_FULL_READ_WRITE );
+                __wfi();
+                __isb( portSY_FULL_READ_WRITE );
+            }
 
-			/* Disable the SysTick clock without reading the
-			portNVIC_SYSTICK_CTRL_REG register to ensure the
-			portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
-			the time the SysTick is stopped for is accounted for as best it can
-			be, but using the tickless mode will inevitably result in some tiny
-			drift of the time maintained by the kernel with respect to calendar
-			time*/
-			portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+            configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
 
-			/* Determine if the SysTick clock has already counted to zero and
-			been set back to the current reload value (the reload back being
-			correct for the entire expected idle time) or if the SysTick is yet
-			to count to zero (in which case an interrupt other than the SysTick
-			must have brought the system out of sleep mode). */
-			if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-			{
-				uint32_t ulCalculatedLoadValue;
+            /* Re-enable interrupts to allow the interrupt that brought the MCU
+             * out of sleep mode to execute immediately.  see comments above
+             * __disable_interrupt() call above. */
+            __enable_irq();
+            __dsb( portSY_FULL_READ_WRITE );
+            __isb( portSY_FULL_READ_WRITE );
 
-				/* The tick interrupt is already pending, and the SysTick count
-				reloaded with ulReloadValue.  Reset the
-				portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
-				period. */
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+            /* Disable interrupts again because the clock is about to be stopped
+             * and interrupts that execute while the clock is stopped will increase
+             * any slippage between the time maintained by the RTOS and calendar
+             * time. */
+            __disable_irq();
+            __dsb( portSY_FULL_READ_WRITE );
+            __isb( portSY_FULL_READ_WRITE );
 
-				/* Don't allow a tiny value, or values that have somehow
-				underflowed because the post sleep hook did something
-				that took too long. */
-				if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-				{
-					ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-				}
+            /* Disable the SysTick clock without reading the
+             * portNVIC_SYSTICK_CTRL_REG register to ensure the
+             * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
+             * the time the SysTick is stopped for is accounted for as best it can
+             * be, but using the tickless mode will inevitably result in some tiny
+             * drift of the time maintained by the kernel with respect to calendar
+             * time*/
+            portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
 
-				portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+            /* Determine if the SysTick clock has already counted to zero and
+             * been set back to the current reload value (the reload back being
+             * correct for the entire expected idle time) or if the SysTick is yet
+             * to count to zero (in which case an interrupt other than the SysTick
+             * must have brought the system out of sleep mode). */
+            if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+            {
+                uint32_t ulCalculatedLoadValue;
 
-				/* As the pending tick will be processed as soon as this
-				function exits, the tick value maintained by the tick is stepped
-				forward by one less than the time spent waiting. */
-				ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-			}
-			else
-			{
-				/* Something other than the tick interrupt ended the sleep.
-				Work out how long the sleep lasted rounded to complete tick
-				periods (not the ulReload value which accounted for part
-				ticks). */
-				ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+                /* The tick interrupt is already pending, and the SysTick count
+                 * reloaded with ulReloadValue.  Reset the
+                 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+                 * period. */
+                ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
 
-				/* How many complete tick periods passed while the processor
-				was waiting? */
-				ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+                /* Don't allow a tiny value, or values that have somehow
+                 * underflowed because the post sleep hook did something
+                 * that took too long. */
+                if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+                {
+                    ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+                }
 
-				/* The reload value is set to whatever fraction of a single tick
-				period remains. */
-				portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-			}
+                portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
 
-			/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
-			again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
-			value. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-			vTaskStepTick( ulCompleteTickPeriods );
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+                /* As the pending tick will be processed as soon as this
+                 * function exits, the tick value maintained by the tick is stepped
+                 * forward by one less than the time spent waiting. */
+                ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+            }
+            else
+            {
+                /* Something other than the tick interrupt ended the sleep.
+                 * Work out how long the sleep lasted rounded to complete tick
+                 * periods (not the ulReload value which accounted for part
+                 * ticks). */
+                ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Exit with interrupts enabled. */
-			__enable_irq();
-		}
-	}
+                /* How many complete tick periods passed while the processor
+                 * was waiting? */
+                ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+                /* The reload value is set to whatever fraction of a single tick
+                 * period remains. */
+                portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+            }
+
+            /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+             * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+             * value. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            vTaskStepTick( ulCompleteTickPeriods );
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Exit with interrupts enabled. */
+            __enable_irq();
+        }
+    }
 
 #endif /* #if configUSE_TICKLESS_IDLE */
 
@@ -691,98 +711,98 @@ void xPortSysTickHandler( void )
  * Setup the SysTick timer to generate the tick interrupts at the required
  * frequency.
  */
-#if( configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0 )
+#if ( configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0 )
 
-	__weak void vPortSetupTimerInterrupt( void )
-	{
-		/* Calculate the constants required to configure the tick interrupt. */
-		#if( configUSE_TICKLESS_IDLE == 1 )
-		{
-			ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
-			xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-			ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
-		}
-		#endif /* configUSE_TICKLESS_IDLE */
+    __weak void vPortSetupTimerInterrupt( void )
+    {
+        /* Calculate the constants required to configure the tick interrupt. */
+        #if ( configUSE_TICKLESS_IDLE == 1 )
+            {
+                ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+                xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+                ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+            }
+        #endif /* configUSE_TICKLESS_IDLE */
 
-		/* Stop and clear the SysTick. */
-		portNVIC_SYSTICK_CTRL_REG = 0UL;
-		portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+        /* Stop and clear the SysTick. */
+        portNVIC_SYSTICK_CTRL_REG = 0UL;
+        portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-		/* Configure SysTick to interrupt at the requested rate. */
-		portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-		portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
-	}
+        /* Configure SysTick to interrupt at the requested rate. */
+        portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+        portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
+    }
 
 #endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */
 /*-----------------------------------------------------------*/
 
 __asm uint32_t vPortGetIPSR( void )
 {
-	PRESERVE8
+/* *INDENT-OFF* */
+    PRESERVE8
 
-	mrs r0, ipsr
-	bx r14
+    mrs r0, ipsr
+    bx r14
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
-#if( configASSERT_DEFINED == 1 )
+#if ( configASSERT_DEFINED == 1 )
 
-	void vPortValidateInterruptPriority( void )
-	{
-	uint32_t ulCurrentInterrupt;
-	uint8_t ucCurrentPriority;
+    void vPortValidateInterruptPriority( void )
+    {
+        uint32_t ulCurrentInterrupt;
+        uint8_t ucCurrentPriority;
 
-		/* Obtain the number of the currently executing interrupt. */
-		ulCurrentInterrupt = vPortGetIPSR();
+        /* Obtain the number of the currently executing interrupt. */
+        ulCurrentInterrupt = vPortGetIPSR();
 
-		/* Is the interrupt number a user defined interrupt? */
-		if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
-		{
-			/* Look up the interrupt's priority. */
-			ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
+        /* Is the interrupt number a user defined interrupt? */
+        if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
+        {
+            /* Look up the interrupt's priority. */
+            ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
 
-			/* The following assertion will fail if a service routine (ISR) for
-			an interrupt that has been assigned a priority above
-			configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
-			function.  ISR safe FreeRTOS API functions must *only* be called
-			from interrupts that have been assigned a priority at or below
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
+            /* The following assertion will fail if a service routine (ISR) for
+             * an interrupt that has been assigned a priority above
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
+             * function.  ISR safe FreeRTOS API functions must *only* be called
+             * from interrupts that have been assigned a priority at or below
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Numerically low interrupt priority numbers represent logically high
+             * interrupt priorities, therefore the priority of the interrupt must
+             * be set to a value equal to or numerically *higher* than
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Interrupts that	use the FreeRTOS API must not be left at their
+             * default priority of	zero as that is the highest possible priority,
+             * which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
+             * and	therefore also guaranteed to be invalid.
+             *
+             * FreeRTOS maintains separate thread and ISR API functions to ensure
+             * interrupt entry is as fast and simple as possible.
+             *
+             * The following links provide detailed information:
+             * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+             * https://www.FreeRTOS.org/FAQHelp.html */
+            configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
+        }
 
-			Numerically low interrupt priority numbers represent logically high
-			interrupt priorities, therefore the priority of the interrupt must
-			be set to a value equal to or numerically *higher* than
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
-
-			Interrupts that	use the FreeRTOS API must not be left at their
-			default priority of	zero as that is the highest possible priority,
-			which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
-			and	therefore also guaranteed to be invalid.
-
-			FreeRTOS maintains separate thread and ISR API functions to ensure
-			interrupt entry is as fast and simple as possible.
-
-			The following links provide detailed information:
-			http://www.freertos.org/RTOS-Cortex-M3-M4.html
-			http://www.freertos.org/FAQHelp.html */
-			configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
-		}
-
-		/* Priority grouping:  The interrupt controller (NVIC) allows the bits
-		that define each interrupt's priority to be split between bits that
-		define the interrupt's pre-emption priority bits and bits that define
-		the interrupt's sub-priority.  For simplicity all bits must be defined
-		to be pre-emption priority bits.  The following assertion will fail if
-		this is not the case (if some bits represent a sub-priority).
-
-		If the application only uses CMSIS libraries for interrupt
-		configuration then the correct setting can be achieved on all Cortex-M
-		devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
-		scheduler.  Note however that some vendor specific peripheral libraries
-		assume a non-zero priority group setting, in which cases using a value
-		of zero will result in unpredictable behaviour. */
-		configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
-	}
+        /* Priority grouping:  The interrupt controller (NVIC) allows the bits
+         * that define each interrupt's priority to be split between bits that
+         * define the interrupt's pre-emption priority bits and bits that define
+         * the interrupt's sub-priority.  For simplicity all bits must be defined
+         * to be pre-emption priority bits.  The following assertion will fail if
+         * this is not the case (if some bits represent a sub-priority).
+         *
+         * If the application only uses CMSIS libraries for interrupt
+         * configuration then the correct setting can be achieved on all Cortex-M
+         * devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
+         * scheduler.  Note however that some vendor specific peripheral libraries
+         * assume a non-zero priority group setting, in which cases using a value
+         * of zero will result in unpredictable behaviour. */
+        configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
+    }
 
 #endif /* configASSERT_DEFINED */
-
-
diff --git a/portable/RVDS/ARM_CM4F/portmacro.h b/portable/RVDS/ARM_CM4F/portmacro.h
index 82df5ec82..aa9cc05c1 100644
--- a/portable/RVDS/ARM_CM4F/portmacro.h
+++ b/portable/RVDS/ARM_CM4F/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -28,10 +28,12 @@
 
 #ifndef PORTMACRO_H
 #define PORTMACRO_H
+/* *INDENT-OFF* */
 
 #ifdef __cplusplus
-extern "C" {
+    extern "C" {
 #endif
+/* *INDENT-ON* */
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -44,209 +46,219 @@ extern "C" {
  */
 
 /* Type definitions. */
-#define portCHAR		char
-#define portFLOAT		float
-#define portDOUBLE		double
-#define portLONG		long
-#define portSHORT		short
-#define portSTACK_TYPE	uint32_t
-#define portBASE_TYPE	long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE StackType_t;
-typedef long BaseType_t;
-typedef unsigned long UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC 1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Architecture specifics. */
-#define portSTACK_GROWTH			( -1 )
-#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT			8
+    #define portSTACK_GROWTH          ( -1 )
+    #define portTICK_PERIOD_MS        ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT        8
 
 /* Constants used with memory barrier intrinsics. */
-#define portSY_FULL_READ_WRITE		( 15 )
+    #define portSY_FULL_READ_WRITE    ( 15 )
 
 /*-----------------------------------------------------------*/
 
 /* Scheduler utilities. */
-#define portYIELD()																\
-{																				\
-	/* Set a PendSV to request a context switch. */								\
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;								\
-																				\
-	/* Barriers are normally not required but do ensure the code is completely	\
-	within the specified behaviour for the architecture. */						\
-	__dsb( portSY_FULL_READ_WRITE );											\
-	__isb( portSY_FULL_READ_WRITE );											\
-}
+    #define portYIELD()                                 \
+    {                                                   \
+        /* Set a PendSV to request a context switch. */ \
+        portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
+                                                        \
+        /* Barriers are normally not required but do ensure the code is completely \
+         * within the specified behaviour for the architecture. */ \
+        __dsb( portSY_FULL_READ_WRITE );                           \
+        __isb( portSY_FULL_READ_WRITE );                           \
+    }
 /*-----------------------------------------------------------*/
 
-#define portNVIC_INT_CTRL_REG		( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT		( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()
-#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired != pdFALSE ) portYIELD()
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /* Critical section management. */
-extern void vPortEnterCritical( void );
-extern void vPortExitCritical( void );
+    extern void vPortEnterCritical( void );
+    extern void vPortExitCritical( void );
 
-#define portDISABLE_INTERRUPTS()				vPortRaiseBASEPRI()
-#define portENABLE_INTERRUPTS()					vPortSetBASEPRI( 0 )
-#define portENTER_CRITICAL()					vPortEnterCritical()
-#define portEXIT_CRITICAL()						vPortExitCritical()
-#define portSET_INTERRUPT_MASK_FROM_ISR()		ulPortRaiseBASEPRI()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)	vPortSetBASEPRI(x)
+    #define portDISABLE_INTERRUPTS()                  vPortRaiseBASEPRI()
+    #define portENABLE_INTERRUPTS()                   vPortSetBASEPRI( 0 )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulPortRaiseBASEPRI()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vPortSetBASEPRI( x )
 
 /*-----------------------------------------------------------*/
 
 /* Tickless idle/low power functionality. */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Port specific optimisations. */
-#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
-	#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
-#endif
+    #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
+        #define configUSE_PORT_OPTIMISED_TASK_SELECTION    1
+    #endif
 
-#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
+    #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
 
-	/* Check the configuration. */
-	#if( configMAX_PRIORITIES > 32 )
-		#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
-	#endif
+/* Check the configuration. */
+        #if ( configMAX_PRIORITIES > 32 )
+            #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
+        #endif
 
-	/* Store/clear the ready priorities in a bit map. */
-	#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
-	#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
+/* Store/clear the ready priorities in a bit map. */
+        #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities )    ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
+        #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities )     ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
 
-	/*-----------------------------------------------------------*/
+/*-----------------------------------------------------------*/
 
-	#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) )
+        #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities )    uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) )
 
-#endif /* taskRECORD_READY_PRIORITY */
+    #endif /* taskRECORD_READY_PRIORITY */
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site.  These are
-not necessary for to use this port.  They are defined so the common demo files
-(which build with all the ports) will build. */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+ * not necessary for to use this port.  They are defined so the common demo files
+ * (which build with all the ports) will build. */
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
-#ifdef configASSERT
-	void vPortValidateInterruptPriority( void );
-	#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() 	vPortValidateInterruptPriority()
-#endif
+    #ifdef configASSERT
+        void vPortValidateInterruptPriority( void );
+        #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()    vPortValidateInterruptPriority()
+    #endif
 
 /* portNOP() is not required by this port. */
-#define portNOP()
+    #define portNOP()
 
-#define portINLINE __inline
+    #define portINLINE              __inline
 
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE __forceinline
-#endif
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE    __forceinline
+    #endif
 
 /*-----------------------------------------------------------*/
 
-static portFORCE_INLINE void vPortSetBASEPRI( uint32_t ulBASEPRI )
-{
-	__asm
-	{
-		/* Barrier instructions are not used as this function is only used to
-		lower the BASEPRI value. */
-		msr basepri, ulBASEPRI
-	}
-}
+    static portFORCE_INLINE void vPortSetBASEPRI( uint32_t ulBASEPRI )
+    {
+        __asm
+        {
+            /* Barrier instructions are not used as this function is only used to
+             * lower the BASEPRI value. */
+/* *INDENT-OFF* */
+        msr basepri, ulBASEPRI
+/* *INDENT-ON* */
+        }
+    }
 /*-----------------------------------------------------------*/
 
-static portFORCE_INLINE void vPortRaiseBASEPRI( void )
-{
-uint32_t ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
+    static portFORCE_INLINE void vPortRaiseBASEPRI( void )
+    {
+        uint32_t ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
 
-	__asm
-	{
-		/* Set BASEPRI to the max syscall priority to effect a critical
-		section. */
-		msr basepri, ulNewBASEPRI
-		dsb
-		isb
-	}
-}
+        __asm
+        {
+            /* Set BASEPRI to the max syscall priority to effect a critical
+             * section. */
+/* *INDENT-OFF* */
+            msr basepri, ulNewBASEPRI
+            dsb
+            isb
+/* *INDENT-ON* */
+        }
+    }
 /*-----------------------------------------------------------*/
 
-static portFORCE_INLINE void vPortClearBASEPRIFromISR( void )
-{
-	__asm
-	{
-		/* Set BASEPRI to 0 so no interrupts are masked.  This function is only
-		used to lower the mask in an interrupt, so memory barriers are not 
-		used. */
-		msr basepri, #0
-	}
-}
+    static portFORCE_INLINE void vPortClearBASEPRIFromISR( void )
+    {
+        __asm
+        {
+            /* Set BASEPRI to 0 so no interrupts are masked.  This function is only
+             * used to lower the mask in an interrupt, so memory barriers are not
+             * used. */
+/* *INDENT-OFF* */
+            msr basepri, # 0
+/* *INDENT-ON* */
+        }
+    }
 /*-----------------------------------------------------------*/
 
-static portFORCE_INLINE uint32_t ulPortRaiseBASEPRI( void )
-{
-uint32_t ulReturn, ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
+    static portFORCE_INLINE uint32_t ulPortRaiseBASEPRI( void )
+    {
+        uint32_t ulReturn, ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
 
-	__asm
-	{
-		/* Set BASEPRI to the max syscall priority to effect a critical
-		section. */
-		mrs ulReturn, basepri
-		msr basepri, ulNewBASEPRI
-		dsb
-		isb
-	}
+        __asm
+        {
+            /* Set BASEPRI to the max syscall priority to effect a critical
+             * section. */
+/* *INDENT-OFF* */
+            mrs ulReturn, basepri
+            msr basepri, ulNewBASEPRI
+            dsb
+            isb
+/* *INDENT-ON* */
+        }
 
-	return ulReturn;
-}
+        return ulReturn;
+    }
 /*-----------------------------------------------------------*/
 
-static portFORCE_INLINE BaseType_t xPortIsInsideInterrupt( void )
-{
-uint32_t ulCurrentInterrupt;
-BaseType_t xReturn;
+    static portFORCE_INLINE BaseType_t xPortIsInsideInterrupt( void )
+    {
+        uint32_t ulCurrentInterrupt;
+        BaseType_t xReturn;
 
-	/* Obtain the number of the currently executing interrupt. */
-	__asm
-	{
-		mrs ulCurrentInterrupt, ipsr
-	}
+        /* Obtain the number of the currently executing interrupt. */
+        __asm
+        {
+/* *INDENT-OFF* */
+            mrs ulCurrentInterrupt, ipsr
+/* *INDENT-ON* */
+        }
 
-	if( ulCurrentInterrupt == 0 )
-	{
-		xReturn = pdFALSE;
-	}
-	else
-	{
-		xReturn = pdTRUE;
-	}
-
-	return xReturn;
-}
+        if( ulCurrentInterrupt == 0 )
+        {
+            xReturn = pdFALSE;
+        }
+        else
+        {
+            xReturn = pdTRUE;
+        }
 
+        return xReturn;
+    }
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
-}
+    }
 #endif
+/* *INDENT-ON* */
 
 #endif /* PORTMACRO_H */
-
diff --git a/portable/RVDS/ARM_CM4_MPU/port.c b/portable/RVDS/ARM_CM4_MPU/port.c
index 59ae308d3..a15b700cd 100644
--- a/portable/RVDS/ARM_CM4_MPU/port.c
+++ b/portable/RVDS/ARM_CM4_MPU/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,15 +19,14 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------
- * Implementation of functions defined in portable.h for the ARM CM3 port.
- *----------------------------------------------------------*/
+* Implementation of functions defined in portable.h for the ARM CM4 MPU port.
+*----------------------------------------------------------*/
 
 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
  * all the API functions to use the MPU wrappers.  That should only be done when
@@ -39,68 +38,68 @@
 #include "task.h"
 
 #ifndef __TARGET_FPU_VFP
-	#error This port can only be used when the project options are configured to enable hardware floating point support.
+    #error This port can only be used when the project options are configured to enable hardware floating point support.
 #endif
 
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
 /* Constants required to access and manipulate the NVIC. */
-#define portNVIC_SYSTICK_CTRL_REG				( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG				( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG		( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG					( *	( ( volatile uint32_t * ) 0xe000ed20 ) )
-#define portNVIC_SYSPRI1_REG					( * ( ( volatile uint32_t * ) 0xe000ed1c ) )
-#define portNVIC_SYS_CTRL_STATE_REG				( * ( ( volatile uint32_t * ) 0xe000ed24 ) )
-#define portNVIC_MEM_FAULT_ENABLE				( 1UL << 16UL )
+#define portNVIC_SYSTICK_CTRL_REG                 ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG                 ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG        ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SHPR3_REG                        ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SHPR2_REG                        ( *( ( volatile uint32_t * ) 0xe000ed1c ) )
+#define portNVIC_SYS_CTRL_STATE_REG               ( *( ( volatile uint32_t * ) 0xe000ed24 ) )
+#define portNVIC_MEM_FAULT_ENABLE                 ( 1UL << 16UL )
 
 /* Constants required to access and manipulate the MPU. */
-#define portMPU_TYPE_REG						( * ( ( volatile uint32_t * ) 0xe000ed90 ) )
-#define portMPU_REGION_BASE_ADDRESS_REG			( * ( ( volatile uint32_t * ) 0xe000ed9C ) )
-#define portMPU_REGION_ATTRIBUTE_REG			( * ( ( volatile uint32_t * ) 0xe000edA0 ) )
-#define portMPU_CTRL_REG						( * ( ( volatile uint32_t * ) 0xe000ed94 ) )
-#define portEXPECTED_MPU_TYPE_VALUE				( 8UL << 8UL ) /* 8 regions, unified. */
-#define portMPU_ENABLE							( 0x01UL )
-#define portMPU_BACKGROUND_ENABLE				( 1UL << 2UL )
-#define portPRIVILEGED_EXECUTION_START_ADDRESS	( 0UL )
-#define portMPU_REGION_VALID					( 0x10UL )
-#define portMPU_REGION_ENABLE					( 0x01UL )
-#define portPERIPHERALS_START_ADDRESS			0x40000000UL
-#define portPERIPHERALS_END_ADDRESS				0x5FFFFFFFUL
+#define portMPU_TYPE_REG                          ( *( ( volatile uint32_t * ) 0xe000ed90 ) )
+#define portMPU_REGION_BASE_ADDRESS_REG           ( *( ( volatile uint32_t * ) 0xe000ed9C ) )
+#define portMPU_REGION_ATTRIBUTE_REG              ( *( ( volatile uint32_t * ) 0xe000edA0 ) )
+#define portMPU_CTRL_REG                          ( *( ( volatile uint32_t * ) 0xe000ed94 ) )
+#define portEXPECTED_MPU_TYPE_VALUE               ( portTOTAL_NUM_REGIONS << 8UL )
+#define portMPU_ENABLE                            ( 0x01UL )
+#define portMPU_BACKGROUND_ENABLE                 ( 1UL << 2UL )
+#define portPRIVILEGED_EXECUTION_START_ADDRESS    ( 0UL )
+#define portMPU_REGION_VALID                      ( 0x10UL )
+#define portMPU_REGION_ENABLE                     ( 0x01UL )
+#define portPERIPHERALS_START_ADDRESS             0x40000000UL
+#define portPERIPHERALS_END_ADDRESS               0x5FFFFFFFUL
 
 /* Constants required to access and manipulate the SysTick. */
-#define portNVIC_SYSTICK_CLK					( 0x00000004UL )
-#define portNVIC_SYSTICK_INT					( 0x00000002UL )
-#define portNVIC_SYSTICK_ENABLE					( 0x00000001UL )
-#define portNVIC_PENDSV_PRI						( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
-#define portNVIC_SYSTICK_PRI					( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
-#define portNVIC_SVC_PRI						( ( ( uint32_t ) configMAX_SYSCALL_INTERRUPT_PRIORITY - 1UL ) << 24UL )
+#define portNVIC_SYSTICK_CLK                      ( 0x00000004UL )
+#define portNVIC_SYSTICK_INT                      ( 0x00000002UL )
+#define portNVIC_SYSTICK_ENABLE                   ( 0x00000001UL )
+#define portNVIC_PENDSV_PRI                       ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
+#define portNVIC_SYSTICK_PRI                      ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
+#define portNVIC_SVC_PRI                          ( ( ( uint32_t ) configMAX_SYSCALL_INTERRUPT_PRIORITY - 1UL ) << 24UL )
 
 /* Constants required to manipulate the VFP. */
-#define portFPCCR								( ( volatile uint32_t * ) 0xe000ef34UL ) /* Floating point context control register. */
-#define portASPEN_AND_LSPEN_BITS				( 0x3UL << 30UL )
+#define portFPCCR                                 ( ( volatile uint32_t * ) 0xe000ef34UL ) /* Floating point context control register. */
+#define portASPEN_AND_LSPEN_BITS                  ( 0x3UL << 30UL )
 
 /* Constants required to set up the initial stack. */
-#define portINITIAL_XPSR						( 0x01000000UL )
-#define portINITIAL_EXC_RETURN					( 0xfffffffdUL )
-#define portINITIAL_CONTROL_IF_UNPRIVILEGED		( 0x03 )
-#define portINITIAL_CONTROL_IF_PRIVILEGED		( 0x02 )
+#define portINITIAL_XPSR                          ( 0x01000000UL )
+#define portINITIAL_EXC_RETURN                    ( 0xfffffffdUL )
+#define portINITIAL_CONTROL_IF_UNPRIVILEGED       ( 0x03 )
+#define portINITIAL_CONTROL_IF_PRIVILEGED         ( 0x02 )
 
 /* Constants required to check the validity of an interrupt priority. */
-#define portFIRST_USER_INTERRUPT_NUMBER		( 16 )
-#define portNVIC_IP_REGISTERS_OFFSET_16 	( 0xE000E3F0 )
-#define portAIRCR_REG						( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
-#define portMAX_8_BIT_VALUE					( ( uint8_t ) 0xff )
-#define portTOP_BIT_OF_BYTE					( ( uint8_t ) 0x80 )
-#define portMAX_PRIGROUP_BITS				( ( uint8_t ) 7 )
-#define portPRIORITY_GROUP_MASK				( 0x07UL << 8UL )
-#define portPRIGROUP_SHIFT					( 8UL )
+#define portFIRST_USER_INTERRUPT_NUMBER           ( 16 )
+#define portNVIC_IP_REGISTERS_OFFSET_16           ( 0xE000E3F0 )
+#define portAIRCR_REG                             ( *( ( volatile uint32_t * ) 0xE000ED0C ) )
+#define portMAX_8_BIT_VALUE                       ( ( uint8_t ) 0xff )
+#define portTOP_BIT_OF_BYTE                       ( ( uint8_t ) 0x80 )
+#define portMAX_PRIGROUP_BITS                     ( ( uint8_t ) 7 )
+#define portPRIORITY_GROUP_MASK                   ( 0x07UL << 8UL )
+#define portPRIGROUP_SHIFT                        ( 8UL )
 
 /* Offsets in the stack to the parameters when inside the SVC handler. */
-#define portOFFSET_TO_PC						( 6 )
+#define portOFFSET_TO_PC                          ( 6 )
 
 /* For strict compliance with the Cortex-M spec the task start address should
  * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
-#define portSTART_ADDRESS_MASK				( ( StackType_t ) 0xfffffffeUL )
+#define portSTART_ADDRESS_MASK                    ( ( StackType_t ) 0xfffffffeUL )
 
 /* Each task maintains its own interrupt status in the critical nesting
  * variable.  Note this is not saved as part of the task context as context
@@ -145,7 +144,7 @@ static void prvRestoreContextOfFirstTask( void ) PRIVILEGED_FUNCTION;
  * C portion of the SVC handler.  The SVC handler is split between an asm entry
  * and a C wrapper for simplicity of coding and maintenance.
  */
-void prvSVCHandler( uint32_t *pulRegisters ) __attribute__((used)) PRIVILEGED_FUNCTION;
+void prvSVCHandler( uint32_t * pulRegisters ) __attribute__( ( used ) ) PRIVILEGED_FUNCTION;
 
 /*
  * Function to enable the VFP.
@@ -163,9 +162,9 @@ static uint32_t prvPortGetIPSR( void );
  * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
  */
 #if ( configASSERT_DEFINED == 1 )
-	 static uint8_t ucMaxSysCallPriority = 0;
-	 static uint32_t ulMaxPRIGROUPValue = 0;
-	 static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16;
+    static uint8_t ucMaxSysCallPriority = 0;
+    static uint32_t ulMaxPRIGROUPValue = 0;
+    static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16;
 #endif /* configASSERT_DEFINED */
 
 /**
@@ -202,154 +201,181 @@ extern void vPortResetPrivilege( BaseType_t xRunningPrivileged );
 /*
  * See header file for description.
  */
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged )
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters,
+                                     BaseType_t xRunPrivileged )
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	 * interrupt. */
-	pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
-	pxTopOfStack--;
-	*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;	/* PC */
-	pxTopOfStack--;
-	*pxTopOfStack = 0;	/* LR */
-	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
-	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
+    pxTopOfStack--;                                                      /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
+    *pxTopOfStack = portINITIAL_XPSR;                                    /* xPSR */
+    pxTopOfStack--;
+    *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
+    pxTopOfStack--;
+    *pxTopOfStack = 0;                                                   /* LR */
+    pxTopOfStack -= 5;                                                   /* R12, R3, R2 and R1. */
+    *pxTopOfStack = ( StackType_t ) pvParameters;                        /* R0 */
 
-	/* A save method is being used that requires each task to maintain its
-	 * own exec return value. */
-	pxTopOfStack--;
-	*pxTopOfStack = portINITIAL_EXC_RETURN;
+    /* A save method is being used that requires each task to maintain its
+     * own exec return value. */
+    pxTopOfStack--;
+    *pxTopOfStack = portINITIAL_EXC_RETURN;
 
-	pxTopOfStack -= 9;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
+    pxTopOfStack -= 9; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
 
-	if( xRunPrivileged == pdTRUE )
-	{
-		*pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;
-	}
-	else
-	{
-		*pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;
-	}
+    if( xRunPrivileged == pdTRUE )
+    {
+        *pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;
+    }
+    else
+    {
+        *pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;
+    }
 
-	return pxTopOfStack;
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
-void prvSVCHandler( uint32_t *pulParam )
+void prvSVCHandler( uint32_t * pulParam )
 {
-uint8_t ucSVCNumber;
-uint32_t ulReg, ulPC;
-#if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 )
-	extern uint32_t __syscalls_flash_start__;
-	extern uint32_t __syscalls_flash_end__;
-#endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */
+    uint8_t ucSVCNumber;
+    uint32_t ulReg, ulPC;
 
-	/* The stack contains: r0, r1, r2, r3, r12, LR, PC and xPSR. The first
-	 * argument (r0) is pulParam[ 0 ]. */
-	ulPC = pulParam[ portOFFSET_TO_PC ];
-	ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ];
-	switch( ucSVCNumber )
-	{
-		case portSVC_START_SCHEDULER	:	portNVIC_SYSPRI1_REG |= portNVIC_SVC_PRI;
-											prvRestoreContextOfFirstTask();
-											break;
+    #if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 )
+        extern uint32_t __syscalls_flash_start__;
+        extern uint32_t __syscalls_flash_end__;
+    #endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */
 
-		case portSVC_YIELD				:	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-											/* Barriers are normally not required
-											 * but do ensure the code is completely
-											 * within the specified behaviour for the
-											 * architecture. */
-											__asm volatile( "dsb" );
-											__asm volatile( "isb" );
+    /* The stack contains: r0, r1, r2, r3, r12, LR, PC and xPSR. The first
+     * argument (r0) is pulParam[ 0 ]. */
+    ulPC = pulParam[ portOFFSET_TO_PC ];
+    ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ];
 
-											break;
+    switch( ucSVCNumber )
+    {
+        case portSVC_START_SCHEDULER:
+            portNVIC_SHPR2_REG |= portNVIC_SVC_PRI;
+            prvRestoreContextOfFirstTask();
+            break;
 
-	#if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 )
-		case portSVC_RAISE_PRIVILEGE	:	/* Only raise the privilege, if the
-											 * svc was raised from any of the
-											 * system calls. */
-											if( ( ulPC >= ( uint32_t ) __syscalls_flash_start__ ) &&
-												( ulPC <= ( uint32_t ) __syscalls_flash_end__ ) )
-											{
-												__asm
-												{
-													mrs ulReg, control	/* Obtain current control value. */
-													bic ulReg, #1		/* Set privilege bit. */
-													msr control, ulReg	/* Write back new control value. */
-												}
-											}
-											break;
-	#else
-		case portSVC_RAISE_PRIVILEGE	:	__asm
-											{
-												mrs ulReg, control	/* Obtain current control value. */
-												bic ulReg, #1		/* Set privilege bit. */
-												msr control, ulReg	/* Write back new control value. */
-											}
-											break;
-	#endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */
+        case portSVC_YIELD:
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
 
-		default							:	/* Unknown SVC call. */
-											break;
-	}
+            /* Barriers are normally not required
+             * but do ensure the code is completely
+             * within the specified behaviour for the
+             * architecture. */
+            __asm volatile ( "dsb" );
+            __asm volatile ( "isb" );
+
+            break;
+
+            #if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 )
+                case portSVC_RAISE_PRIVILEGE: /* Only raise the privilege, if the
+                                               * svc was raised from any of the
+                                               * system calls. */
+
+                    if( ( ulPC >= ( uint32_t ) __syscalls_flash_start__ ) &&
+                        ( ulPC <= ( uint32_t ) __syscalls_flash_end__ ) )
+                    {
+                        __asm
+                        {
+/* *INDENT-OFF* */
+                            mrs ulReg, control /* Obtain current control value. */
+                            bic ulReg, # 1     /* Set privilege bit. */
+                            msr control, ulReg /* Write back new control value. */
+/* *INDENT-ON* */
+                        }
+                    }
+
+                    break;
+            #else /* if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */
+                case portSVC_RAISE_PRIVILEGE:
+                    __asm
+                    {
+/* *INDENT-OFF* */
+                        mrs ulReg, control /* Obtain current control value. */
+                        bic ulReg, # 1     /* Set privilege bit. */
+                        msr control, ulReg /* Write back new control value. */
+/* *INDENT-ON* */
+                    }
+                    break;
+                    #endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */
+
+                default: /* Unknown SVC call. */
+                    break;
+    }
 }
 /*-----------------------------------------------------------*/
 
 __asm void vPortSVCHandler( void )
 {
-	extern prvSVCHandler
+    extern prvSVCHandler
 
-	PRESERVE8
+/* *INDENT-OFF* */
+        PRESERVE8
 
-	/* Assumes psp was in use. */
-	#ifndef USE_PROCESS_STACK	/* Code should not be required if a main() is using the process stack. */
-		tst lr, #4
-		ite eq
-		mrseq r0, msp
-		mrsne r0, psp
-	#else
-		mrs r0, psp
-	#endif
-		b prvSVCHandler
+    /* Assumes psp was in use. */
+    #ifndef USE_PROCESS_STACK   /* Code should not be required if a main() is using the process stack. */
+        tst lr, # 4
+        ite eq
+        mrseq r0, msp
+        mrsne r0, psp
+    #else
+        mrs r0, psp
+    #endif
+
+    b prvSVCHandler
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
 __asm void prvRestoreContextOfFirstTask( void )
 {
-	PRESERVE8
+/* *INDENT-OFF* */
+    PRESERVE8
 
-	ldr r0, =0xE000ED08				/* Use the NVIC offset register to locate the stack. */
-	ldr r0, [r0]
-	ldr r0, [r0]
-	msr msp, r0						/* Set the msp back to the start of the stack. */
-	ldr	r3, =pxCurrentTCB			/* Restore the context. */
-	ldr r1, [r3]
-	ldr r0, [r1]					/* The first item in the TCB is the task top of stack. */
-	add r1, r1, #4					/* Move onto the second item in the TCB... */
+    ldr r0, =0xE000ED08 /* Use the NVIC offset register to locate the stack. */
+    ldr r0, [ r0 ]
+    ldr r0, [ r0 ]
+    msr msp, r0              /* Set the msp back to the start of the stack. */
+    ldr r3, =pxCurrentTCB   /* Restore the context. */
+    ldr r1, [ r3 ]
+    ldr r0, [ r1 ]    /* The first item in the TCB is the task top of stack. */
+    add r1, r1, #4          /* Move onto the second item in the TCB... */
 
-	dmb								/* Complete outstanding transfers before disabling MPU. */
-	ldr r2, =0xe000ed94				/* MPU_CTRL register. */
-	ldr r3, [r2]					/* Read the value of MPU_CTRL. */
-	bic r3, r3, #1					/* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
-	str r3, [r2]					/* Disable MPU. */
+    dmb               /* Complete outstanding transfers before disabling MPU. */
+    ldr r2, =0xe000ed94     /* MPU_CTRL register. */
+    ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */
+    bic r3, r3, # 1          /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
+    str r3, [ r2 ]           /* Disable MPU. */
 
-	ldr r2, =0xe000ed9c				/* Region Base Address register. */
-	ldmia r1!, {r4-r11}				/* Read 4 sets of MPU registers. */
-	stmia r2!, {r4-r11}				/* Write 4 sets of MPU registers. */
+    ldr r2, =0xe000ed9c     /* Region Base Address register. */
+    ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
+    stmia r2, { r4 - r11 }  /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
 
-	ldr r2, =0xe000ed94				/* MPU_CTRL register. */
-	ldr r3, [r2]					/* Read the value of MPU_CTRL. */
-	orr r3, r3, #1					/* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
-	str r3, [r2]					/* Enable MPU. */
-	dsb								/* Force memory writes before continuing. */
+    #if ( portTOTAL_NUM_REGIONS == 16 )
+        ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
+        stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
+        ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
+        stmia r2, { r4 - r11 }  /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
+    #endif /* portTOTAL_NUM_REGIONS == 16. */
 
-	ldmia r0!, {r3-r11, r14}		/* Pop the registers that are not automatically saved on exception entry. */
-	msr control, r3
-	msr psp, r0						/* Restore the task stack pointer. */
-	mov r0, #0
-	msr	basepri, r0
-	bx r14
-	nop
+    ldr r2, =0xe000ed94     /* MPU_CTRL register. */
+    ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */
+    orr r3, r3, #1          /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
+    str r3, [ r2 ]           /* Enable MPU. */
+    dsb                      /* Force memory writes before continuing. */
+
+    ldmia r0 !, { r3 - r11, r14 } /* Pop the registers that are not automatically saved on exception entry. */
+    msr control, r3
+    msr psp, r0 /* Restore the task stack pointer. */
+    mov r0, #0
+    msr basepri, r0
+    bx r14
+    nop
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
@@ -358,239 +384,254 @@ __asm void prvRestoreContextOfFirstTask( void )
  */
 BaseType_t xPortStartScheduler( void )
 {
-	/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See
-	 * http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
-	configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) );
+    /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See
+     * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
+    configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) );
 
-	#if( configASSERT_DEFINED == 1 )
-	{
-		volatile uint32_t ulOriginalPriority;
-		volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
-		volatile uint8_t ucMaxPriorityValue;
+    #if ( configASSERT_DEFINED == 1 )
+        {
+            volatile uint32_t ulOriginalPriority;
+            volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
+            volatile uint8_t ucMaxPriorityValue;
 
-		/* Determine the maximum priority from which ISR safe FreeRTOS API
-		 * functions can be called.  ISR safe functions are those that end in
-		 * "FromISR".  FreeRTOS maintains separate thread and ISR API functions to
-		 * ensure interrupt entry is as fast and simple as possible.
+            /* Determine the maximum priority from which ISR safe FreeRTOS API
+             * functions can be called.  ISR safe functions are those that end in
+             * "FromISR".  FreeRTOS maintains separate thread and ISR API functions to
+             * ensure interrupt entry is as fast and simple as possible.
+             *
+             * Save the interrupt priority value that is about to be clobbered. */
+            ulOriginalPriority = *pucFirstUserPriorityRegister;
 
-		 * Save the interrupt priority value that is about to be clobbered. */
-		ulOriginalPriority = *pucFirstUserPriorityRegister;
+            /* Determine the number of priority bits available.  First write to all
+             * possible bits. */
+            *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
 
-		/* Determine the number of priority bits available.  First write to all
-		 * possible bits. */
-		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
+            /* Read the value back to see how many bits stuck. */
+            ucMaxPriorityValue = *pucFirstUserPriorityRegister;
 
-		/* Read the value back to see how many bits stuck. */
-		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
+            /* Use the same mask on the maximum system call priority. */
+            ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
 
-		/* Use the same mask on the maximum system call priority. */
-		ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
+            /* Calculate the maximum acceptable priority group value for the number
+             * of bits read back. */
+            ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
 
-		/* Calculate the maximum acceptable priority group value for the number
-		 * of bits read back. */
-		ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
-		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
-		{
-			ulMaxPRIGROUPValue--;
-			ucMaxPriorityValue <<= ( uint8_t ) 0x01;
-		}
+            while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
+            {
+                ulMaxPRIGROUPValue--;
+                ucMaxPriorityValue <<= ( uint8_t ) 0x01;
+            }
 
-		#ifdef __NVIC_PRIO_BITS
-		{
-			/* Check the CMSIS configuration that defines the number of
-			 * priority bits matches the number of priority bits actually queried
-			 * from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
-		}
-		#endif
+            #ifdef __NVIC_PRIO_BITS
+                {
+                    /* Check the CMSIS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
+                }
+            #endif
 
-		#ifdef configPRIO_BITS
-		{
-			/* Check the FreeRTOS configuration that defines the number of
-			 * priority bits matches the number of priority bits actually queried
-			 * from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
-		}
-		#endif
+            #ifdef configPRIO_BITS
+                {
+                    /* Check the FreeRTOS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
+                }
+            #endif
 
-		/* Shift the priority group value back to its position within the AIRCR
-		 * register. */
-		ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
-		ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
+            /* Shift the priority group value back to its position within the AIRCR
+             * register. */
+            ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
+            ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
 
-		/* Restore the clobbered interrupt priority register to its original
-		 * value. */
-		*pucFirstUserPriorityRegister = ulOriginalPriority;
-	}
-	#endif /* conifgASSERT_DEFINED */
+            /* Restore the clobbered interrupt priority register to its original
+             * value. */
+            *pucFirstUserPriorityRegister = ulOriginalPriority;
+        }
+    #endif /* conifgASSERT_DEFINED */
 
-	/* Make PendSV and SysTick the same priority as the kernel, and the SVC
-	 * handler higher priority so it can be used to exit a critical section (where
-	 * lower priorities are masked). */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+    /* Make PendSV and SysTick the same priority as the kernel, and the SVC
+     * handler higher priority so it can be used to exit a critical section (where
+     * lower priorities are masked). */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
-	/* Configure the regions in the MPU that are common to all tasks. */
-	prvSetupMPU();
+    /* Configure the regions in the MPU that are common to all tasks. */
+    prvSetupMPU();
 
-	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-	 * here already. */
-	vSetupTimerInterrupt();
+    /* Start the timer that generates the tick ISR.  Interrupts are disabled
+     * here already. */
+    vSetupTimerInterrupt();
 
-	/* Initialise the critical nesting count ready for the first task. */
-	uxCriticalNesting = 0;
+    /* Initialise the critical nesting count ready for the first task. */
+    uxCriticalNesting = 0;
 
-	/* Ensure the VFP is enabled - it should be anyway. */
-	vPortEnableVFP();
+    /* Ensure the VFP is enabled - it should be anyway. */
+    vPortEnableVFP();
 
-	/* Lazy save always. */
-	*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
+    /* Lazy save always. */
+    *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
 
-	/* Start the first task. */
-	prvStartFirstTask();
+    /* Start the first task. */
+    prvStartFirstTask();
 
-	/* Should not get here! */
-	return 0;
+    /* Should not get here! */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 __asm void prvStartFirstTask( void )
 {
-	PRESERVE8
+/* *INDENT-OFF* */
+    PRESERVE8
 
-	/* Use the NVIC offset register to locate the stack. */
-	ldr r0, =0xE000ED08
-	ldr r0, [r0]
-	ldr r0, [r0]
-	/* Set the msp back to the start of the stack. */
-	msr msp, r0
-	/* Clear the bit that indicates the FPU is in use in case the FPU was used
-	 * before the scheduler was started - which would otherwise result in the
-	 * unnecessary leaving of space in the SVC stack for lazy saving of FPU
-	 * registers. */
-	mov r0, #0
-	msr control, r0
-	/* Globally enable interrupts. */
-	cpsie i
-	cpsie f
-	dsb
-	isb
-	svc portSVC_START_SCHEDULER	/* System call to start first task. */
-	nop
-	nop
+    /* Use the NVIC offset register to locate the stack. */
+    ldr r0, =0xE000ED08
+    ldr r0, [ r0 ]
+    ldr r0, [ r0 ]
+    /* Set the msp back to the start of the stack. */
+    msr msp, r0
+
+    /* Clear the bit that indicates the FPU is in use in case the FPU was used
+     * before the scheduler was started - which would otherwise result in the
+     * unnecessary leaving of space in the SVC stack for lazy saving of FPU
+     * registers. */
+    mov r0, #0
+    msr control, r0
+    /* Globally enable interrupts. */
+    cpsie i
+    cpsie f
+    dsb
+    isb
+    svc portSVC_START_SCHEDULER /* System call to start first task. */
+    nop
+    nop
+/* *INDENT-ON* */
 }
 
 void vPortEndScheduler( void )
 {
-	/* Not implemented in ports where there is nothing to return to.
-	 * Artificially force an assert. */
-	configASSERT( uxCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( uxCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void )
 {
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	portDISABLE_INTERRUPTS();
-	uxCriticalNesting++;
+    portDISABLE_INTERRUPTS();
+    uxCriticalNesting++;
 
-	vPortResetPrivilege( xRunningPrivileged );
+    vPortResetPrivilege( xRunningPrivileged );
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void )
 {
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
-	configASSERT( uxCriticalNesting );
-	uxCriticalNesting--;
-	if( uxCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
-	vPortResetPrivilege( xRunningPrivileged );
+    configASSERT( uxCriticalNesting );
+    uxCriticalNesting--;
+
+    if( uxCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
+
+    vPortResetPrivilege( xRunningPrivileged );
 }
 /*-----------------------------------------------------------*/
 
 __asm void xPortPendSVHandler( void )
 {
-	extern uxCriticalNesting;
-	extern pxCurrentTCB;
-	extern vTaskSwitchContext;
+    extern uxCriticalNesting;
+    extern pxCurrentTCB;
+    extern vTaskSwitchContext;
 
-	PRESERVE8
+/* *INDENT-OFF* */
+    PRESERVE8
 
-	mrs r0, psp
+    mrs r0, psp
 
-	ldr r3, =pxCurrentTCB			/* Get the location of the current TCB. */
-	ldr r2, [r3]
+    ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */
+    ldr r2, [ r3 ]
 
-	tst r14, #0x10					/* Is the task using the FPU context?  If so, push high vfp registers. */
-	it eq
-	vstmdbeq r0!, {s16-s31}
+    tst r14, #0x10 /* Is the task using the FPU context?  If so, push high vfp registers. */
+    it eq
+    vstmdbeq r0 !, { s16 - s31 }
 
-	mrs r1, control
-	stmdb r0!, {r1, r4-r11, r14}	/* Save the remaining registers. */
-	str r0, [r2]					/* Save the new top of stack into the first member of the TCB. */
+    mrs r1, control
+    stmdb r0 !, { r1, r4 - r11, r14 }   /* Save the remaining registers. */
+    str r0, [ r2 ] /* Save the new top of stack into the first member of the TCB. */
 
-	stmdb sp!, {r0, r3}
-	mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
-	msr basepri, r0
-	dsb
-	isb
-	bl vTaskSwitchContext
-	mov r0, #0
-	msr basepri, r0
-	ldmia sp!, {r0, r3}
-									/* Restore the context. */
-	ldr r1, [r3]
-	ldr r0, [r1]					/* The first item in the TCB is the task top of stack. */
-	add r1, r1, #4					/* Move onto the second item in the TCB... */
+    stmdb sp !, { r0, r3 }
+    mov r0, # configMAX_SYSCALL_INTERRUPT_PRIORITY
+    msr basepri, r0
+    dsb
+    isb
+    bl vTaskSwitchContext
+    mov r0, #0
+    msr basepri, r0
+    ldmia sp !, { r0, r3 }
+    /* Restore the context. */
+    ldr r1, [ r3 ]
+    ldr r0, [ r1 ]           /* The first item in the TCB is the task top of stack. */
+    add r1, r1, #4          /* Move onto the second item in the TCB... */
 
-	dmb								/* Complete outstanding transfers before disabling MPU. */
-	ldr r2, =0xe000ed94				/* MPU_CTRL register. */
-	ldr r3, [r2]					/* Read the value of MPU_CTRL. */
-	bic r3, r3, #1					/* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
-	str r3, [r2]					/* Disable MPU. */
+    dmb                      /* Complete outstanding transfers before disabling MPU. */
+    ldr r2, =0xe000ed94     /* MPU_CTRL register. */
+    ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */
+    bic r3, r3, #1          /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
+    str r3, [ r2 ]           /* Disable MPU. */
 
-	ldr r2, =0xe000ed9c				/* Region Base Address register. */
-	ldmia r1!, {r4-r11}				/* Read 4 sets of MPU registers. */
-	stmia r2!, {r4-r11}				/* Write 4 sets of MPU registers. */
+    ldr r2, =0xe000ed9c     /* Region Base Address register. */
+    ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
+    stmia r2, { r4 - r11 }   /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
 
-	ldr r2, =0xe000ed94				/* MPU_CTRL register. */
-	ldr r3, [r2]					/* Read the value of MPU_CTRL. */
-	orr r3, r3, #1					/* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
-	str r3, [r2]					/* Enable MPU. */
-	dsb								/* Force memory writes before continuing. */
+    #if ( portTOTAL_NUM_REGIONS == 16 )
+        ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
+        stmia r2, { r4 - r11 }  /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
+        ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
+        stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
+    #endif /* portTOTAL_NUM_REGIONS == 16. */
 
-	ldmia r0!, {r3-r11, r14}		/* Pop the registers that are not automatically saved on exception entry. */
-	msr control, r3
+    ldr r2, =0xe000ed94     /* MPU_CTRL register. */
+    ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */
+    orr r3, r3, #1          /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
+    str r3, [ r2 ]           /* Enable MPU. */
+    dsb                      /* Force memory writes before continuing. */
 
-	tst r14, #0x10					/* Is the task using the FPU context?  If so, pop the high vfp registers too. */
-	it eq
-	vldmiaeq r0!, {s16-s31}
+    ldmia r0 !, { r3 - r11, r14 }                               /* Pop the registers that are not automatically saved on exception entry. */
+    msr control, r3
 
-	msr psp, r0
-	bx r14
-	nop
+    tst r14, #0x10 /* Is the task using the FPU context?  If so, pop the high vfp registers too. */
+    it eq
+    vldmiaeq r0 !, { s16 - s31 }
+
+    msr psp, r0
+    bx r14
+    nop
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
 void xPortSysTickHandler( void )
 {
-uint32_t ulDummy;
+    uint32_t ulDummy;
 
-	ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* Pend a context switch. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
+    ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* Pend a context switch. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
 }
 /*-----------------------------------------------------------*/
 
@@ -600,317 +641,336 @@ uint32_t ulDummy;
  */
 __weak void vSetupTimerInterrupt( void )
 {
-	/* Reset the SysTick. */
-	portNVIC_SYSTICK_CTRL_REG = 0UL;
-	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+    /* Reset the SysTick. */
+    portNVIC_SYSTICK_CTRL_REG = 0UL;
+    portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-	/* Configure SysTick to interrupt at the requested rate. */
-	portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
+    /* Configure SysTick to interrupt at the requested rate. */
+    portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+    portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
 }
 /*-----------------------------------------------------------*/
 
 __asm void vPortSwitchToUserMode( void )
 {
-	PRESERVE8
+/* *INDENT-OFF* */
+    PRESERVE8
 
-	mrs r0, control
-	orr r0, #1
-	msr control, r0
-	bx r14
+    mrs r0, control
+    orr r0, #1
+    msr control, r0
+    bx r14
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
 __asm void vPortEnableVFP( void )
 {
-	PRESERVE8
+/* *INDENT-OFF* */
+    PRESERVE8
 
-	ldr.w r0, =0xE000ED88		/* The FPU enable bits are in the CPACR. */
-	ldr r1, [r0]
+    ldr.w r0, =0xE000ED88 /* The FPU enable bits are in the CPACR. */
+    ldr r1, [ r0 ]
 
-	orr r1, r1, #( 0xf << 20 )	/* Enable CP10 and CP11 coprocessors, then save back. */
-	str r1, [r0]
-	bx r14
-	nop
-	nop
+    orr r1, r1, #( 0xf << 20 ) /* Enable CP10 and CP11 coprocessors, then save back. */
+    str r1, [ r0 ]
+    bx r14
+    nop
+    nop
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
 static void prvSetupMPU( void )
 {
-extern uint32_t __privileged_functions_start__;
-extern uint32_t __privileged_functions_end__;
-extern uint32_t __FLASH_segment_start__;
-extern uint32_t __FLASH_segment_end__;
-extern uint32_t __privileged_data_start__;
-extern uint32_t __privileged_data_end__;
+    extern uint32_t __privileged_functions_start__;
+    extern uint32_t __privileged_functions_end__;
+    extern uint32_t __FLASH_segment_start__;
+    extern uint32_t __FLASH_segment_end__;
+    extern uint32_t __privileged_data_start__;
+    extern uint32_t __privileged_data_end__;
 
-	/* Check the expected MPU is present. */
-	if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
-	{
-		/* First setup the unprivileged flash for unprivileged read only access. */
-		portMPU_REGION_BASE_ADDRESS_REG =	( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */
-											( portMPU_REGION_VALID ) |
-											( portUNPRIVILEGED_FLASH_REGION );
+    /* The only permitted number of regions are 8 or 16. */
+    configASSERT( ( portTOTAL_NUM_REGIONS == 8 ) || ( portTOTAL_NUM_REGIONS == 16 ) );
 
-		portMPU_REGION_ATTRIBUTE_REG =	( portMPU_REGION_READ_ONLY ) |
-										( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
-										( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |
-										( portMPU_REGION_ENABLE );
+    /* Ensure that the configTOTAL_MPU_REGIONS is configured correctly. */
+    configASSERT( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE );
 
-		/* Setup the privileged flash for privileged only access.  This is where
-		 * the kernel code is placed. */
-		portMPU_REGION_BASE_ADDRESS_REG =	( ( uint32_t ) __privileged_functions_start__ ) | /* Base address. */
-											( portMPU_REGION_VALID ) |
-											( portPRIVILEGED_FLASH_REGION );
+    /* Check the expected MPU is present. */
+    if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
+    {
+        /* First setup the unprivileged flash for unprivileged read only access. */
+        portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */
+                                          ( portMPU_REGION_VALID ) |
+                                          ( portUNPRIVILEGED_FLASH_REGION );
 
-		portMPU_REGION_ATTRIBUTE_REG =	( portMPU_REGION_PRIVILEGED_READ_ONLY ) |
-										( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
-										( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __privileged_functions_start__ ) ) |
-										( portMPU_REGION_ENABLE );
+        portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_ONLY ) |
+                                       ( ( configTEX_S_C_B_FLASH & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) |
+                                       ( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |
+                                       ( portMPU_REGION_ENABLE );
 
-		/* Setup the privileged data RAM region.  This is where the kernel data
-		 * is placed. */
-		portMPU_REGION_BASE_ADDRESS_REG =	( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
-											( portMPU_REGION_VALID ) |
-											( portPRIVILEGED_RAM_REGION );
+        /* Setup the privileged flash for privileged only access.  This is where
+         * the kernel code is placed. */
+        portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __privileged_functions_start__ ) | /* Base address. */
+                                          ( portMPU_REGION_VALID ) |
+                                          ( portPRIVILEGED_FLASH_REGION );
 
-		portMPU_REGION_ATTRIBUTE_REG =	( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
-										( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
-										prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |
-										( portMPU_REGION_ENABLE );
+        portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |
+                                       ( ( configTEX_S_C_B_FLASH & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) |
+                                       ( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __privileged_functions_start__ ) ) |
+                                       ( portMPU_REGION_ENABLE );
 
-		/* By default allow everything to access the general peripherals.  The
-		 * system peripherals and registers are protected. */
-		portMPU_REGION_BASE_ADDRESS_REG =	( portPERIPHERALS_START_ADDRESS ) |
-											( portMPU_REGION_VALID ) |
-											( portGENERAL_PERIPHERALS_REGION );
+        /* Setup the privileged data RAM region.  This is where the kernel data
+         * is placed. */
+        portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
+                                          ( portMPU_REGION_VALID ) |
+                                          ( portPRIVILEGED_RAM_REGION );
 
-		portMPU_REGION_ATTRIBUTE_REG =	( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |
-										( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |
-										( portMPU_REGION_ENABLE );
+        portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
+                                       ( ( configTEX_S_C_B_SRAM & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) |
+                                       prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |
+                                       ( portMPU_REGION_ENABLE );
 
-		/* Enable the memory fault exception. */
-		portNVIC_SYS_CTRL_STATE_REG |= portNVIC_MEM_FAULT_ENABLE;
+        /* By default allow everything to access the general peripherals.  The
+         * system peripherals and registers are protected. */
+        portMPU_REGION_BASE_ADDRESS_REG = ( portPERIPHERALS_START_ADDRESS ) |
+                                          ( portMPU_REGION_VALID ) |
+                                          ( portGENERAL_PERIPHERALS_REGION );
 
-		/* Enable the MPU with the background region configured. */
-		portMPU_CTRL_REG |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );
-	}
+        portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |
+                                       ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |
+                                       ( portMPU_REGION_ENABLE );
+
+        /* Enable the memory fault exception. */
+        portNVIC_SYS_CTRL_STATE_REG |= portNVIC_MEM_FAULT_ENABLE;
+
+        /* Enable the MPU with the background region configured. */
+        portMPU_CTRL_REG |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );
+    }
 }
 /*-----------------------------------------------------------*/
 
 static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes )
 {
-uint32_t ulRegionSize, ulReturnValue = 4;
+    uint32_t ulRegionSize, ulReturnValue = 4;
 
-	/* 32 is the smallest region size, 31 is the largest valid value for
-	 * ulReturnValue. */
-	for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )
-	{
-		if( ulActualSizeInBytes <= ulRegionSize )
-		{
-			break;
-		}
-		else
-		{
-			ulReturnValue++;
-		}
-	}
+    /* 32 is the smallest region size, 31 is the largest valid value for
+     * ulReturnValue. */
+    for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )
+    {
+        if( ulActualSizeInBytes <= ulRegionSize )
+        {
+            break;
+        }
+        else
+        {
+            ulReturnValue++;
+        }
+    }
 
-	/* Shift the code by one before returning so it can be written directly
-	 * into the the correct bit position of the attribute register. */
-	return ( ulReturnValue << 1UL );
+    /* Shift the code by one before returning so it can be written directly
+     * into the the correct bit position of the attribute register. */
+    return( ulReturnValue << 1UL );
 }
 /*-----------------------------------------------------------*/
 
 __asm BaseType_t xIsPrivileged( void )
 {
-	PRESERVE8
+/* *INDENT-OFF* */
+    PRESERVE8
 
-	mrs r0, control		/* r0 = CONTROL. */
-	tst r0, #1			/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
-	ite ne
-	movne r0, #0		/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
-	moveq r0, #1		/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
-	bx lr				/* Return. */
+    mrs r0, control /* r0 = CONTROL. */
+    tst r0, #1     /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
+    ite ne
+    movne r0, #0   /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
+    moveq r0, #1   /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
+    bx lr           /* Return. */
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
 __asm void vResetPrivilege( void )
 {
-	PRESERVE8
+/* *INDENT-OFF* */
+    PRESERVE8
 
-	mrs r0, control		/* r0 = CONTROL. */
-	orrs r0, #1			/* r0 = r0 | 1. */
-	msr control, r0		/* CONTROL = r0. */
-	bx lr				/* Return. */
+    mrs r0, control /* r0 = CONTROL. */
+    orrs r0, #1    /* r0 = r0 | 1. */
+    msr control, r0 /* CONTROL = r0. */
+    bx lr           /* Return. */
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
-void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t ulStackDepth )
+void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
+                                const struct xMEMORY_REGION * const xRegions,
+                                StackType_t * pxBottomOfStack,
+                                uint32_t ulStackDepth )
 {
-extern uint32_t __SRAM_segment_start__;
-extern uint32_t __SRAM_segment_end__;
-extern uint32_t __privileged_data_start__;
-extern uint32_t __privileged_data_end__;
+    extern uint32_t __SRAM_segment_start__;
+    extern uint32_t __SRAM_segment_end__;
+    extern uint32_t __privileged_data_start__;
+    extern uint32_t __privileged_data_end__;
 
 
-int32_t lIndex;
-uint32_t ul;
+    int32_t lIndex;
+    uint32_t ul;
 
-	if( xRegions == NULL )
-	{
-		/* No MPU regions are specified so allow access to all RAM. */
-		xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
-				( ( uint32_t ) __SRAM_segment_start__ ) | /* Base address. */
-				( portMPU_REGION_VALID ) |
-				( portSTACK_REGION );
+    if( xRegions == NULL )
+    {
+        /* No MPU regions are specified so allow access to all RAM. */
+        xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
+            ( ( uint32_t ) __SRAM_segment_start__ ) | /* Base address. */
+            ( portMPU_REGION_VALID ) |
+            ( portSTACK_REGION );
 
-		xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
-				( portMPU_REGION_READ_WRITE ) |
-				( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
-				( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) |
-				( portMPU_REGION_ENABLE );
+        xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
+            ( portMPU_REGION_READ_WRITE ) |
+            ( ( configTEX_S_C_B_SRAM & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) |
+            ( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) |
+            ( portMPU_REGION_ENABLE );
 
-		/* Re-instate the privileged only RAM region as xRegion[ 0 ] will have
-		 * just removed the privileged only parameters. */
-		xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =
-				( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
-				( portMPU_REGION_VALID ) |
-				( portSTACK_REGION + 1 );
+        /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have
+         * just removed the privileged only parameters. */
+        xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =
+            ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
+            ( portMPU_REGION_VALID ) |
+            ( portSTACK_REGION + 1 );
 
-		xMPUSettings->xRegion[ 1 ].ulRegionAttribute =
-				( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
-				( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
-				prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |
-				( portMPU_REGION_ENABLE );
+        xMPUSettings->xRegion[ 1 ].ulRegionAttribute =
+            ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
+            ( ( configTEX_S_C_B_SRAM & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) |
+            prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |
+            ( portMPU_REGION_ENABLE );
 
-		/* Invalidate all other regions. */
-		for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
-		{
-			xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
-			xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
-		}
-	}
-	else
-	{
-		/* This function is called automatically when the task is created - in
-		 * which case the stack region parameters will be valid.  At all other
-		 * times the stack parameters will not be valid and it is assumed that the
-		 * stack region has already been configured. */
-		if( ulStackDepth > 0 )
-		{
-			/* Define the region that allows access to the stack. */
-			xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
-					( ( uint32_t ) pxBottomOfStack ) |
-					( portMPU_REGION_VALID ) |
-					( portSTACK_REGION ); /* Region number. */
+        /* Invalidate all other regions. */
+        for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
+        {
+            xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
+            xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
+        }
+    }
+    else
+    {
+        /* This function is called automatically when the task is created - in
+         * which case the stack region parameters will be valid.  At all other
+         * times the stack parameters will not be valid and it is assumed that the
+         * stack region has already been configured. */
+        if( ulStackDepth > 0 )
+        {
+            /* Define the region that allows access to the stack. */
+            xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
+                ( ( uint32_t ) pxBottomOfStack ) |
+                ( portMPU_REGION_VALID ) |
+                ( portSTACK_REGION ); /* Region number. */
 
-			xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
-					( portMPU_REGION_READ_WRITE ) | /* Read and write. */
-					( prvGetMPURegionSizeSetting( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) ) |
-					( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
-					( portMPU_REGION_ENABLE );
-		}
+            xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
+                ( portMPU_REGION_READ_WRITE ) | /* Read and write. */
+                ( prvGetMPURegionSizeSetting( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) ) |
+                ( ( configTEX_S_C_B_SRAM & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) |
+                ( portMPU_REGION_ENABLE );
+        }
 
-		lIndex = 0;
+        lIndex = 0;
 
-		for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
-		{
-			if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )
-			{
-				/* Translate the generic region definition contained in
-				 * xRegions into the CM3 specific MPU settings that are then
-				 * stored in xMPUSettings. */
-				xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =
-						( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) |
-						( portMPU_REGION_VALID ) |
-						( portSTACK_REGION + ul ); /* Region number. */
+        for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
+        {
+            if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )
+            {
+                /* Translate the generic region definition contained in
+                 * xRegions into the CM4 specific MPU settings that are then
+                 * stored in xMPUSettings. */
+                xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =
+                    ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) |
+                    ( portMPU_REGION_VALID ) |
+                    ( portSTACK_REGION + ul ); /* Region number. */
 
-				xMPUSettings->xRegion[ ul ].ulRegionAttribute =
-						( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |
-						( xRegions[ lIndex ].ulParameters ) |
-						( portMPU_REGION_ENABLE );
-			}
-			else
-			{
-				/* Invalidate the region. */
-				xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
-				xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
-			}
+                xMPUSettings->xRegion[ ul ].ulRegionAttribute =
+                    ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |
+                    ( xRegions[ lIndex ].ulParameters ) |
+                    ( portMPU_REGION_ENABLE );
+            }
+            else
+            {
+                /* Invalidate the region. */
+                xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
+                xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
+            }
 
-			lIndex++;
-		}
-	}
+            lIndex++;
+        }
+    }
 }
 /*-----------------------------------------------------------*/
 
 __asm uint32_t prvPortGetIPSR( void )
 {
-	PRESERVE8
+/* *INDENT-OFF* */
+    PRESERVE8
 
-	mrs r0, ipsr
-	bx r14
+    mrs r0, ipsr
+    bx r14
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
-#if( configASSERT_DEFINED == 1 )
+#if ( configASSERT_DEFINED == 1 )
 
-	void vPortValidateInterruptPriority( void )
-	{
-	uint32_t ulCurrentInterrupt;
-	uint8_t ucCurrentPriority;
+    void vPortValidateInterruptPriority( void )
+    {
+        uint32_t ulCurrentInterrupt;
+        uint8_t ucCurrentPriority;
 
-		/* Obtain the number of the currently executing interrupt. */
-		ulCurrentInterrupt = prvPortGetIPSR();
+        /* Obtain the number of the currently executing interrupt. */
+        ulCurrentInterrupt = prvPortGetIPSR();
 
-		/* Is the interrupt number a user defined interrupt? */
-		if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
-		{
-			/* Look up the interrupt's priority. */
-			ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
+        /* Is the interrupt number a user defined interrupt? */
+        if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
+        {
+            /* Look up the interrupt's priority. */
+            ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
 
-			/* The following assertion will fail if a service routine (ISR) for
-			 * an interrupt that has been assigned a priority above
-			 * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
-			 * function.  ISR safe FreeRTOS API functions must *only* be called
-			 * from interrupts that have been assigned a priority at or below
-			 * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+            /* The following assertion will fail if a service routine (ISR) for
+             * an interrupt that has been assigned a priority above
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
+             * function.  ISR safe FreeRTOS API functions must *only* be called
+             * from interrupts that have been assigned a priority at or below
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Numerically low interrupt priority numbers represent logically high
+             * interrupt priorities, therefore the priority of the interrupt must
+             * be set to a value equal to or numerically *higher* than
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Interrupts that	use the FreeRTOS API must not be left at their
+             * default priority of	zero as that is the highest possible priority,
+             * which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
+             * and	therefore also guaranteed to be invalid.
+             *
+             * FreeRTOS maintains separate thread and ISR API functions to ensure
+             * interrupt entry is as fast and simple as possible.
+             *
+             * The following links provide detailed information:
+             * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+             * https://www.FreeRTOS.org/FAQHelp.html */
+            configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
+        }
 
-			 * Numerically low interrupt priority numbers represent logically high
-			 * interrupt priorities, therefore the priority of the interrupt must
-			 * be set to a value equal to or numerically *higher* than
-			 * configMAX_SYSCALL_INTERRUPT_PRIORITY.
-
-			 * Interrupts that	use the FreeRTOS API must not be left at their
-			 * default priority of	zero as that is the highest possible priority,
-			 * which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
-			 * and	therefore also guaranteed to be invalid.
-
-			 * FreeRTOS maintains separate thread and ISR API functions to ensure
-			 * interrupt entry is as fast and simple as possible.
-
-			 * The following links provide detailed information:
-			 * http://www.freertos.org/RTOS-Cortex-M3-M4.html
-			 * http://www.freertos.org/FAQHelp.html */
-			configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
-		}
-
-		/* Priority grouping:  The interrupt controller (NVIC) allows the bits
-		 * that define each interrupt's priority to be split between bits that
-		 * define the interrupt's pre-emption priority bits and bits that define
-		 * the interrupt's sub-priority.  For simplicity all bits must be defined
-		 * to be pre-emption priority bits.  The following assertion will fail if
-		 * this is not the case (if some bits represent a sub-priority).
-
-		 * If the application only uses CMSIS libraries for interrupt
-		 * configuration then the correct setting can be achieved on all Cortex-M
-		 * devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
-		 * scheduler.  Note however that some vendor specific peripheral libraries
-		 * assume a non-zero priority group setting, in which cases using a value
-		 * of zero will result in unpredicable behaviour. */
-		configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
-	}
+        /* Priority grouping:  The interrupt controller (NVIC) allows the bits
+         * that define each interrupt's priority to be split between bits that
+         * define the interrupt's pre-emption priority bits and bits that define
+         * the interrupt's sub-priority.  For simplicity all bits must be defined
+         * to be pre-emption priority bits.  The following assertion will fail if
+         * this is not the case (if some bits represent a sub-priority).
+         *
+         * If the application only uses CMSIS libraries for interrupt
+         * configuration then the correct setting can be achieved on all Cortex-M
+         * devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
+         * scheduler.  Note however that some vendor specific peripheral libraries
+         * assume a non-zero priority group setting, in which cases using a value
+         * of zero will result in unpredicable behaviour. */
+        configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
+    }
 
 #endif /* configASSERT_DEFINED */
 /*-----------------------------------------------------------*/
diff --git a/portable/RVDS/ARM_CM4_MPU/portmacro.h b/portable/RVDS/ARM_CM4_MPU/portmacro.h
index d5402a6b0..38335d06a 100644
--- a/portable/RVDS/ARM_CM4_MPU/portmacro.h
+++ b/portable/RVDS/ARM_CM4_MPU/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,19 +19,20 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 
 #ifndef PORTMACRO_H
 #define PORTMACRO_H
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
-extern "C" {
+    extern "C" {
 #endif
+/* *INDENT-ON* */
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -44,159 +45,246 @@ extern "C" {
  */
 
 /* Type definitions. */
-#define portCHAR		char
-#define portFLOAT		float
-#define portDOUBLE		double
-#define portLONG		long
-#define portSHORT		short
-#define portSTACK_TYPE	uint32_t
-#define portBASE_TYPE	long
+#define portCHAR          char
+#define portFLOAT         float
+#define portDOUBLE        double
+#define portLONG          long
+#define portSHORT         short
+#define portSTACK_TYPE    uint32_t
+#define portBASE_TYPE     long
 
-typedef portSTACK_TYPE StackType_t;
-typedef long BaseType_t;
-typedef unsigned long UBaseType_t;
+typedef portSTACK_TYPE   StackType_t;
+typedef long             BaseType_t;
+typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffff
+#if ( configUSE_16_BIT_TICKS == 1 )
+    typedef uint16_t     TickType_t;
+    #define portMAX_DELAY              ( TickType_t ) 0xffff
 #else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+    typedef uint32_t     TickType_t;
+    #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC 1
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+    #define portTICK_TYPE_IS_ATOMIC    1
 #endif
 /*-----------------------------------------------------------*/
 
 /* MPU specific constants. */
-#define portUSING_MPU_WRAPPERS		1
-#define portPRIVILEGE_BIT			( 0x80000000UL )
+#define portUSING_MPU_WRAPPERS                                   1
+#define portPRIVILEGE_BIT                                        ( 0x80000000UL )
 
-#define portMPU_REGION_READ_WRITE								( 0x03UL << 24UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY						( 0x05UL << 24UL )
-#define portMPU_REGION_READ_ONLY								( 0x06UL << 24UL )
-#define portMPU_REGION_PRIVILEGED_READ_WRITE					( 0x01UL << 24UL )
-#define portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY	( 0x02UL << 24UL )
-#define portMPU_REGION_CACHEABLE_BUFFERABLE						( 0x07UL << 16UL )
-#define portMPU_REGION_EXECUTE_NEVER							( 0x01UL << 28UL )
+#define portMPU_REGION_READ_WRITE                                ( 0x03UL << 24UL )
+#define portMPU_REGION_PRIVILEGED_READ_ONLY                      ( 0x05UL << 24UL )
+#define portMPU_REGION_READ_ONLY                                 ( 0x06UL << 24UL )
+#define portMPU_REGION_PRIVILEGED_READ_WRITE                     ( 0x01UL << 24UL )
+#define portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY    ( 0x02UL << 24UL )
+#define portMPU_REGION_CACHEABLE_BUFFERABLE                      ( 0x07UL << 16UL )
+#define portMPU_REGION_EXECUTE_NEVER                             ( 0x01UL << 28UL )
 
-#define portUNPRIVILEGED_FLASH_REGION		( 0UL )
-#define portPRIVILEGED_FLASH_REGION			( 1UL )
-#define portPRIVILEGED_RAM_REGION			( 2UL )
-#define portGENERAL_PERIPHERALS_REGION		( 3UL )
-#define portSTACK_REGION					( 4UL )
-#define portFIRST_CONFIGURABLE_REGION		( 5UL )
-#define portLAST_CONFIGURABLE_REGION		( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS		( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS				( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
+/* Location of the TEX,S,C,B bits in the MPU Region Attribute and Size
+ * Register (RASR). */
+#define portMPU_RASR_TEX_S_C_B_LOCATION                          ( 16UL )
+#define portMPU_RASR_TEX_S_C_B_MASK                              ( 0x3FUL )
+
+/* MPU settings that can be overriden in FreeRTOSConfig.h. */
+#ifndef configTOTAL_MPU_REGIONS
+    /* Define to 8 for backward compatibility. */
+    #define configTOTAL_MPU_REGIONS    ( 8UL )
+#endif
+
+/*
+ * The TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits define the
+ * memory type, and where necessary the cacheable and shareable properties
+ * of the memory region.
+ *
+ * The TEX, C, and B bits together indicate the memory type of the region,
+ * and:
+ * - For Normal memory, the cacheable properties of the region.
+ * - For Device memory, whether the region is shareable.
+ *
+ * For Normal memory regions, the S bit indicates whether the region is
+ * shareable. For Strongly-ordered and Device memory, the S bit is ignored.
+ *
+ * See the following two tables for setting TEX, S, C and B bits for
+ * unprivileged flash, privileged flash and privileged RAM regions.
+ *
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | TEX | C | B | Memory type            |  Description or Normal region cacheability             |  Shareable?             |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 000 | 0 | 0 | Strongly-ordered       |  Strongly ordered                                      |  Shareable              |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 000 | 0 | 1 | Device                 |  Shared device                                         |  Shareable              |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 000 | 1 | 0 | Normal                 |  Outer and inner   write-through; no write allocate    |  S bit                  |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 000 | 1 | 1 | Normal                 |  Outer and inner   write-back; no write allocate       |  S bit                  |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 001 | 0 | 0 | Normal                 |  Outer and inner   Non-cacheable                       |  S bit                  |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 001 | 0 | 1 | Reserved               |  Reserved                                              |  Reserved               |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 001 | 1 | 0 | IMPLEMENTATION DEFINED |  IMPLEMENTATION DEFINED                                |  IMPLEMENTATION DEFINED |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 001 | 1 | 1 | Normal                 |  Outer and inner   write-back; write and read allocate |  S bit                  |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 010 | 0 | 0 | Device                 |  Non-shared device                                     |  Not shareable          |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 010 | 0 | 1 | Reserved               |  Reserved                                              |  Reserved               |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 010 | 1 | X | Reserved               |  Reserved                                              |  Reserved               |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 011 | X | X | Reserved               |  Reserved                                              |  Reserved               |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ | 1BB | A | A | Normal                 | Cached memory, with AA and BB indicating the inner and |  Reserved               |
+ |     |   |   |                        | outer cacheability rules that must be exported on the  |                         |
+ |     |   |   |                        | bus. See the table below for the cacheability policy   |                         |
+ |     |   |   |                        | encoding. memory, BB=Outer policy, AA=Inner policy.    |                         |
+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
+ |
+ +-----------------------------------------+----------------------------------------+
+ | AA or BB subfield of {TEX,C,B} encoding |  Cacheability policy                   |
+ +-----------------------------------------+----------------------------------------+
+ | 00                                      |  Non-cacheable                         |
+ +-----------------------------------------+----------------------------------------+
+ | 01                                      |  Write-back, write and   read allocate |
+ +-----------------------------------------+----------------------------------------+
+ | 10                                      |  Write-through, no write   allocate    |
+ +-----------------------------------------+----------------------------------------+
+ | 11                                      |  Write-back, no write   allocate       |
+ +-----------------------------------------+----------------------------------------+
+ */
+
+/* TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits for Flash
+ * region. */
+#ifndef configTEX_S_C_B_FLASH
+    /* Default to TEX=000, S=1, C=1, B=1 for backward compatibility. */
+    #define configTEX_S_C_B_FLASH    ( 0x07UL )
+#endif
+
+/* TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits for SRAM
+ * region. */
+#ifndef configTEX_S_C_B_SRAM
+    /* Default to TEX=000, S=1, C=1, B=1 for backward compatibility. */
+    #define configTEX_S_C_B_SRAM          ( 0x07UL )
+#endif
+
+#define portUNPRIVILEGED_FLASH_REGION     ( 0UL )
+#define portPRIVILEGED_FLASH_REGION       ( 1UL )
+#define portPRIVILEGED_RAM_REGION         ( 2UL )
+#define portGENERAL_PERIPHERALS_REGION    ( 3UL )
+#define portSTACK_REGION                  ( 4UL )
+#define portFIRST_CONFIGURABLE_REGION     ( 5UL )
+#define portTOTAL_NUM_REGIONS             ( configTOTAL_MPU_REGIONS )
+#define portNUM_CONFIGURABLE_REGIONS      ( portTOTAL_NUM_REGIONS - portFIRST_CONFIGURABLE_REGION )
+#define portLAST_CONFIGURABLE_REGION      ( portTOTAL_NUM_REGIONS - 1 )
 
 void vPortSwitchToUserMode( void );
-#define portSWITCH_TO_USER_MODE()	vPortSwitchToUserMode()
+#define portSWITCH_TO_USER_MODE()    vPortSwitchToUserMode()
 
 typedef struct MPU_REGION_REGISTERS
 {
-	uint32_t ulRegionBaseAddress;
-	uint32_t ulRegionAttribute;
+    uint32_t ulRegionBaseAddress;
+    uint32_t ulRegionAttribute;
 } xMPU_REGION_REGISTERS;
 
 /* Plus 1 to create space for the stack region. */
 typedef struct MPU_SETTINGS
 {
-	xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS ];
+    xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS ];
 } xMPU_SETTINGS;
 
 /* Architecture specifics. */
-#define portSTACK_GROWTH			( -1 )
-#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT			8
+#define portSTACK_GROWTH          ( -1 )
+#define portTICK_PERIOD_MS        ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+#define portBYTE_ALIGNMENT        8
 
 /* Constants used with memory barrier intrinsics. */
-#define portSY_FULL_READ_WRITE		( 15 )
+#define portSY_FULL_READ_WRITE    ( 15 )
 
 /*-----------------------------------------------------------*/
 
 /* SVC numbers for various services. */
-#define portSVC_START_SCHEDULER				0
-#define portSVC_YIELD						1
-#define portSVC_RAISE_PRIVILEGE				2
+#define portSVC_START_SCHEDULER    0
+#define portSVC_YIELD              1
+#define portSVC_RAISE_PRIVILEGE    2
 
 /* Scheduler utilities. */
 
-#define portYIELD()				__asm{ SVC portSVC_YIELD }
-#define portYIELD_WITHIN_API() 													\
-{																				\
-	/* Set a PendSV to request a context switch. */								\
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;								\
-																				\
-	/* Barriers are normally not required but do ensure the code is completely	\
-	within the specified behaviour for the architecture. */						\
-	__dsb( portSY_FULL_READ_WRITE );											\
-	__isb( portSY_FULL_READ_WRITE );											\
-}
+#define portYIELD()    __asm{ SVC portSVC_YIELD }
+#define portYIELD_WITHIN_API()                          \
+    {                                                   \
+        /* Set a PendSV to request a context switch. */ \
+        portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
+                                                        \
+        /* Barriers are normally not required but do ensure the code is completely \
+         * within the specified behaviour for the architecture. */ \
+        __dsb( portSY_FULL_READ_WRITE );                           \
+        __isb( portSY_FULL_READ_WRITE );                           \
+    }
 /*-----------------------------------------------------------*/
 
-#define portNVIC_INT_CTRL_REG		( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT		( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
+#define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+#define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+#define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+#define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /* Critical section management. */
 extern void vPortEnterCritical( void );
 extern void vPortExitCritical( void );
 
-#define portDISABLE_INTERRUPTS()				vPortRaiseBASEPRI()
-#define portENABLE_INTERRUPTS()					vPortSetBASEPRI(0)
-#define portENTER_CRITICAL()					vPortEnterCritical()
-#define portEXIT_CRITICAL()						vPortExitCritical()
-#define portSET_INTERRUPT_MASK_FROM_ISR()		ulPortRaiseBASEPRI()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)	vPortSetBASEPRI(x)
+#define portDISABLE_INTERRUPTS()                  vPortRaiseBASEPRI()
+#define portENABLE_INTERRUPTS()                   vPortSetBASEPRI( 0 )
+#define portENTER_CRITICAL()                      vPortEnterCritical()
+#define portEXIT_CRITICAL()                       vPortExitCritical()
+#define portSET_INTERRUPT_MASK_FROM_ISR()         ulPortRaiseBASEPRI()
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vPortSetBASEPRI( x )
 
 /*-----------------------------------------------------------*/
 
 /* Architecture specific optimisations. */
 #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
-	#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
+    #define configUSE_PORT_OPTIMISED_TASK_SELECTION    1
 #endif
 
 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
 
-	/* Check the configuration. */
-	#if( configMAX_PRIORITIES > 32 )
-		#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
-	#endif
+/* Check the configuration. */
+    #if ( configMAX_PRIORITIES > 32 )
+        #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
+    #endif
 
-	/* Store/clear the ready priorities in a bit map. */
-	#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
-	#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
+/* Store/clear the ready priorities in a bit map. */
+    #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities )    ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
+    #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities )     ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
 
-	/*-----------------------------------------------------------*/
+/*-----------------------------------------------------------*/
 
-	#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) )
+    #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities )    uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) )
 
 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site.  These are
-not necessary for to use this port.  They are defined so the common demo files
-(which build with all the ports) will build. */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+ * not necessary for to use this port.  They are defined so the common demo files
+ * (which build with all the ports) will build. */
+#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+#define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
 #ifdef configASSERT
-	void vPortValidateInterruptPriority( void );
-	#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() 	vPortValidateInterruptPriority()
+    void vPortValidateInterruptPriority( void );
+    #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()    vPortValidateInterruptPriority()
 #endif
 
 /* portNOP() is not required by this port. */
 #define portNOP()
 
-#define portINLINE __inline
+#define portINLINE              __inline
 
 #ifndef portFORCE_INLINE
-	#define portFORCE_INLINE __forceinline
+    #define portFORCE_INLINE    __forceinline
 #endif
 /*-----------------------------------------------------------*/
 
@@ -208,109 +296,118 @@ extern void vResetPrivilege( void );
  *
  * @return 1 if the processor is already privileged, 0 otherwise.
  */
-#define portIS_PRIVILEGED()			xIsPrivileged()
+#define portIS_PRIVILEGED()      xIsPrivileged()
 
 /**
  * @brief Raise an SVC request to raise privilege.
  */
-#define portRAISE_PRIVILEGE()		__asm { svc portSVC_RAISE_PRIVILEGE }
+#define portRAISE_PRIVILEGE()    __asm { svc portSVC_RAISE_PRIVILEGE }
 
 /**
  * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
  * register.
  */
-#define portRESET_PRIVILEGE()		vResetPrivilege()
+#define portRESET_PRIVILEGE()    vResetPrivilege()
 /*-----------------------------------------------------------*/
 
 static portFORCE_INLINE void vPortSetBASEPRI( uint32_t ulBASEPRI )
 {
-	__asm
-	{
-		/* Barrier instructions are not used as this function is only used to
-		lower the BASEPRI value. */
-		msr basepri, ulBASEPRI
-	}
+    __asm
+    {
+        /* Barrier instructions are not used as this function is only used to
+         * lower the BASEPRI value. */
+/* *INDENT-OFF* */
+        msr basepri, ulBASEPRI
+/* *INDENT-ON* */
+    }
 }
 /*-----------------------------------------------------------*/
 
 static portFORCE_INLINE void vPortRaiseBASEPRI( void )
 {
-uint32_t ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
+    uint32_t ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
 
-	__asm
-	{
-		/* Set BASEPRI to the max syscall priority to effect a critical
-		section. */
-		msr basepri, ulNewBASEPRI
-		dsb
-		isb
-	}
+    __asm
+    {
+        /* Set BASEPRI to the max syscall priority to effect a critical
+         * section. */
+/* *INDENT-OFF* */
+        msr basepri, ulNewBASEPRI
+        dsb
+        isb
+/* *INDENT-ON* */
+    }
 }
 /*-----------------------------------------------------------*/
 
 static portFORCE_INLINE void vPortClearBASEPRIFromISR( void )
 {
-	__asm
-	{
-		/* Set BASEPRI to 0 so no interrupts are masked.  This function is only
-		used to lower the mask in an interrupt, so memory barriers are not
-		used. */
-		msr basepri, #0
-	}
+    __asm
+    {
+        /* Set BASEPRI to 0 so no interrupts are masked.  This function is only
+         * used to lower the mask in an interrupt, so memory barriers are not
+         * used. */
+/* *INDENT-OFF* */
+        msr basepri, # 0
+/* *INDENT-ON* */
+    }
 }
 /*-----------------------------------------------------------*/
 
 static portFORCE_INLINE uint32_t ulPortRaiseBASEPRI( void )
 {
-uint32_t ulReturn, ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
+    uint32_t ulReturn, ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
 
-	__asm
-	{
-		/* Set BASEPRI to the max syscall priority to effect a critical
-		section. */
-		mrs ulReturn, basepri
-		msr basepri, ulNewBASEPRI
-		dsb
-		isb
-	}
+    __asm
+    {
+        /* Set BASEPRI to the max syscall priority to effect a critical
+         * section. */
+/* *INDENT-OFF* */
+        mrs ulReturn, basepri
+        msr basepri, ulNewBASEPRI
+        dsb
+        isb
+/* *INDENT-ON* */
+    }
 
-	return ulReturn;
+    return ulReturn;
 }
 /*-----------------------------------------------------------*/
 
 static portFORCE_INLINE BaseType_t xPortIsInsideInterrupt( void )
 {
-uint32_t ulCurrentInterrupt;
-BaseType_t xReturn;
+    uint32_t ulCurrentInterrupt;
+    BaseType_t xReturn;
 
-	/* Obtain the number of the currently executing interrupt. */
-	__asm
-	{
-		mrs ulCurrentInterrupt, ipsr
-	}
+    /* Obtain the number of the currently executing interrupt. */
+    __asm
+    {
+        mrs ulCurrentInterrupt, ipsr
+    }
 
-	if( ulCurrentInterrupt == 0 )
-	{
-		xReturn = pdFALSE;
-	}
-	else
-	{
-		xReturn = pdTRUE;
-	}
+    if( ulCurrentInterrupt == 0 )
+    {
+        xReturn = pdFALSE;
+    }
+    else
+    {
+        xReturn = pdTRUE;
+    }
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
 #ifndef configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY
-	#warning "configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY is not defined. We recommend defining it to 1 in FreeRTOSConfig.h for better security. https://www.freertos.org/FreeRTOS-V10.3.x.html"
-	#define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY 0
+    #warning "configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY is not defined. We recommend defining it to 1 in FreeRTOSConfig.h for better security. https://www.FreeRTOS.org/FreeRTOS-V10.3.x.html"
+    #define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY    0
 #endif
 /*-----------------------------------------------------------*/
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
-}
+    }
 #endif
+/* *INDENT-ON* */
 
 #endif /* PORTMACRO_H */
-
diff --git a/portable/RVDS/ARM_CM7/r0p1/port.c b/portable/RVDS/ARM_CM7/r0p1/port.c
index 24d48a3c4..17e16f3e3 100644
--- a/portable/RVDS/ARM_CM7/r0p1/port.c
+++ b/portable/RVDS/ARM_CM7/r0p1/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,94 +19,94 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------
- * Implementation of functions defined in portable.h for the ARM CM4F port.
- *----------------------------------------------------------*/
+* Implementation of functions defined in portable.h for the ARM CM7 port.
+*----------------------------------------------------------*/
 
 /* Scheduler includes. */
 #include "FreeRTOS.h"
 #include "task.h"
 
 #ifndef __TARGET_FPU_VFP
-	#error This port can only be used when the project options are configured to enable hardware floating point support.
+    #error This port can only be used when the project options are configured to enable hardware floating point support.
 #endif
 
 #if configMAX_SYSCALL_INTERRUPT_PRIORITY == 0
-	#error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+    #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See http: /*www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
 #endif
 
 #ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 1UL << 2UL )
+    #define configSYSTICK_CLOCK_HZ      configCPU_CLOCK_HZ
+    /* Ensure the SysTick is clocked at the same frequency as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 1UL << 2UL )
 #else
-	/* The way the SysTick is clocked is not modified in case it is not the same
-	as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 0 )
+
+/* The way the SysTick is clocked is not modified in case it is not the same
+ * as the core. */
+    #define portNVIC_SYSTICK_CLK_BIT    ( 0 )
 #endif
 
 /* The __weak attribute does not work as you might expect with the Keil tools
-so the configOVERRIDE_DEFAULT_TICK_CONFIGURATION constant must be set to 1 if
-the application writer wants to provide their own implementation of
-vPortSetupTimerInterrupt().  Ensure configOVERRIDE_DEFAULT_TICK_CONFIGURATION
-is defined. */
+ * so the configOVERRIDE_DEFAULT_TICK_CONFIGURATION constant must be set to 1 if
+ * the application writer wants to provide their own implementation of
+ * vPortSetupTimerInterrupt().  Ensure configOVERRIDE_DEFAULT_TICK_CONFIGURATION
+ * is defined. */
 #ifndef configOVERRIDE_DEFAULT_TICK_CONFIGURATION
-	#define configOVERRIDE_DEFAULT_TICK_CONFIGURATION 0
+    #define configOVERRIDE_DEFAULT_TICK_CONFIGURATION    0
 #endif
 
 /* Constants required to manipulate the core.  Registers first... */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_CTRL_REG             ( *( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG             ( *( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG    ( *( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SHPR3_REG                    ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
 /* ...then bits in the registers. */
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portNVIC_PENDSVCLEAR_BIT 			( 1UL << 27UL )
-#define portNVIC_PEND_SYSTICK_CLEAR_BIT		( 1UL << 25UL )
+#define portNVIC_SYSTICK_INT_BIT              ( 1UL << 1UL )
+#define portNVIC_SYSTICK_ENABLE_BIT           ( 1UL << 0UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT       ( 1UL << 16UL )
+#define portNVIC_PENDSVCLEAR_BIT              ( 1UL << 27UL )
+#define portNVIC_PEND_SYSTICK_CLEAR_BIT       ( 1UL << 25UL )
 
-#define portNVIC_PENDSV_PRI					( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
-#define portNVIC_SYSTICK_PRI				( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
+#define portNVIC_PENDSV_PRI                   ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
+#define portNVIC_SYSTICK_PRI                  ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
 
 /* Constants required to check the validity of an interrupt priority. */
-#define portFIRST_USER_INTERRUPT_NUMBER		( 16 )
-#define portNVIC_IP_REGISTERS_OFFSET_16 	( 0xE000E3F0 )
-#define portAIRCR_REG						( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
-#define portMAX_8_BIT_VALUE					( ( uint8_t ) 0xff )
-#define portTOP_BIT_OF_BYTE					( ( uint8_t ) 0x80 )
-#define portMAX_PRIGROUP_BITS				( ( uint8_t ) 7 )
-#define portPRIORITY_GROUP_MASK				( 0x07UL << 8UL )
-#define portPRIGROUP_SHIFT					( 8UL )
+#define portFIRST_USER_INTERRUPT_NUMBER       ( 16 )
+#define portNVIC_IP_REGISTERS_OFFSET_16       ( 0xE000E3F0 )
+#define portAIRCR_REG                         ( *( ( volatile uint32_t * ) 0xE000ED0C ) )
+#define portMAX_8_BIT_VALUE                   ( ( uint8_t ) 0xff )
+#define portTOP_BIT_OF_BYTE                   ( ( uint8_t ) 0x80 )
+#define portMAX_PRIGROUP_BITS                 ( ( uint8_t ) 7 )
+#define portPRIORITY_GROUP_MASK               ( 0x07UL << 8UL )
+#define portPRIGROUP_SHIFT                    ( 8UL )
 
 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
-#define portVECTACTIVE_MASK					( 0xFFUL )
+#define portVECTACTIVE_MASK                   ( 0xFFUL )
 
 /* Constants required to manipulate the VFP. */
-#define portFPCCR					( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
-#define portASPEN_AND_LSPEN_BITS	( 0x3UL << 30UL )
+#define portFPCCR                             ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
+#define portASPEN_AND_LSPEN_BITS              ( 0x3UL << 30UL )
 
 /* Constants required to set up the initial stack. */
-#define portINITIAL_XPSR			( 0x01000000 )
-#define portINITIAL_EXC_RETURN		( 0xfffffffd )
+#define portINITIAL_XPSR                      ( 0x01000000 )
+#define portINITIAL_EXC_RETURN                ( 0xfffffffd )
 
 /* The systick is a 24-bit counter. */
-#define portMAX_24_BIT_NUMBER		( 0xffffffUL )
+#define portMAX_24_BIT_NUMBER                 ( 0xffffffUL )
 
 /* A fiddle factor to estimate the number of SysTick counts that would have
-occurred while the SysTick counter is stopped during tickless idle
-calculations. */
-#define portMISSED_COUNTS_FACTOR	( 45UL )
+ * occurred while the SysTick counter is stopped during tickless idle
+ * calculations. */
+#define portMISSED_COUNTS_FACTOR              ( 45UL )
 
 /* For strict compliance with the Cortex-M spec the task start address should
-have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
-#define portSTART_ADDRESS_MASK		( ( StackType_t ) 0xfffffffeUL )
+ * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
+#define portSTART_ADDRESS_MASK                ( ( StackType_t ) 0xfffffffeUL )
 
 /*
  * Setup the timer to generate the tick interrupts.  The implementation in this
@@ -140,30 +140,30 @@ static void prvTaskExitError( void );
 /*-----------------------------------------------------------*/
 
 /* Each task maintains its own interrupt status in the critical nesting
-variable. */
+ * variable. */
 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 
 /*
  * The number of SysTick increments that make up one tick period.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulTimerCountsForOneTick = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulTimerCountsForOneTick = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * The maximum number of tick periods that can be suppressed is limited by the
  * 24 bit resolution of the SysTick timer.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t xMaximumPossibleSuppressedTicks = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
  * Compensate for the CPU cycles that pass while the SysTick is stopped (low
  * power functionality only.
  */
-#if( configUSE_TICKLESS_IDLE == 1 )
-	static uint32_t ulStoppedTimerCompensation = 0;
+#if ( configUSE_TICKLESS_IDLE == 1 )
+    static uint32_t ulStoppedTimerCompensation = 0;
 #endif /* configUSE_TICKLESS_IDLE */
 
 /*
@@ -172,9 +172,9 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
  * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
  */
 #if ( configASSERT_DEFINED == 1 )
-	 static uint8_t ucMaxSysCallPriority = 0;
-	 static uint32_t ulMaxPRIGROUPValue = 0;
-	 static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16;
+    static uint8_t ucMaxSysCallPriority = 0;
+    static uint32_t ulMaxPRIGROUPValue = 0;
+    static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16;
 #endif /* configASSERT_DEFINED */
 
 /*-----------------------------------------------------------*/
@@ -182,109 +182,121 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 /*
  * See header file for description.
  */
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	interrupt. */
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
 
-	/* Offset added to account for the way the MCU uses the stack on entry/exit
-	of interrupts, and to ensure alignment. */
-	pxTopOfStack--;
+    /* Offset added to account for the way the MCU uses the stack on entry/exit
+     * of interrupts, and to ensure alignment. */
+    pxTopOfStack--;
 
-	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
-	pxTopOfStack--;
-	*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;	/* PC */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) prvTaskExitError;	/* LR */
+    *pxTopOfStack = portINITIAL_XPSR;                                    /* xPSR */
+    pxTopOfStack--;
+    *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) prvTaskExitError;                    /* LR */
 
-	/* Save code space by skipping register initialisation. */
-	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
-	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
+    /* Save code space by skipping register initialisation. */
+    pxTopOfStack -= 5;                            /* R12, R3, R2 and R1. */
+    *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
 
-	/* A save method is being used that requires each task to maintain its
-	own exec return value. */
-	pxTopOfStack--;
-	*pxTopOfStack = portINITIAL_EXC_RETURN;
+    /* A save method is being used that requires each task to maintain its
+     * own exec return value. */
+    pxTopOfStack--;
+    *pxTopOfStack = portINITIAL_EXC_RETURN;
 
-	pxTopOfStack -= 8;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
+    pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
 
-	return pxTopOfStack;
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 static void prvTaskExitError( void )
 {
-	/* A function that implements a task must not exit or attempt to return to
-	its caller as there is nothing to return to.  If a task wants to exit it
-	should instead call vTaskDelete( NULL ).
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to.  If a task wants to exit it
+     * should instead call vTaskDelete( NULL ).
+     *
+     * Artificially force an assert() to be triggered if configASSERT() is
+     * defined, then stop here so application writers can catch the error. */
+    configASSERT( uxCriticalNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
 
-	Artificially force an assert() to be triggered if configASSERT() is
-	defined, then stop here so application writers can catch the error. */
-	configASSERT( uxCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
-	for( ;; );
+    for( ; ; )
+    {
+    }
 }
 /*-----------------------------------------------------------*/
 
 __asm void vPortSVCHandler( void )
 {
-	PRESERVE8
+    PRESERVE8
 
-	/* Get the location of the current TCB. */
-	ldr	r3, =pxCurrentTCB
-	ldr r1, [r3]
-	ldr r0, [r1]
-	/* Pop the core registers. */
-	ldmia r0!, {r4-r11, r14}
-	msr psp, r0
-	isb
-	mov r0, #0
-	msr	basepri, r0
-	bx r14
+/* *INDENT-OFF* */
+    /* Get the location of the current TCB. */
+    ldr r3, =pxCurrentTCB
+    ldr r1, [ r3 ]
+    ldr r0, [ r1 ]
+    /* Pop the core registers. */
+    ldmia r0 !, { r4 - r11, r14 }
+    msr psp, r0
+    isb
+    mov r0, #0
+    msr basepri, r0
+    bx r14
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
 __asm void prvStartFirstTask( void )
 {
-	PRESERVE8
+/* *INDENT-OFF* */
+    PRESERVE8
 
-	/* Use the NVIC offset register to locate the stack. */
-	ldr r0, =0xE000ED08
-	ldr r0, [r0]
-	ldr r0, [r0]
-	/* Set the msp back to the start of the stack. */
-	msr msp, r0
-	/* Clear the bit that indicates the FPU is in use in case the FPU was used
-	before the scheduler was started - which would otherwise result in the
-	unnecessary leaving of space in the SVC stack for lazy saving of FPU
-	registers. */
-	mov r0, #0
-	msr control, r0
-	/* Globally enable interrupts. */
-	cpsie i
-	cpsie f
-	dsb
-	isb
-	/* Call SVC to start the first task. */
-	svc 0
-	nop
-	nop
+    /* Use the NVIC offset register to locate the stack. */
+    ldr r0, =0xE000ED08
+    ldr r0, [ r0 ]
+    ldr r0, [ r0 ]
+    /* Set the msp back to the start of the stack. */
+    msr msp, r0
+
+    /* Clear the bit that indicates the FPU is in use in case the FPU was used
+     * before the scheduler was started - which would otherwise result in the
+     * unnecessary leaving of space in the SVC stack for lazy saving of FPU
+     * registers. */
+    mov r0, #0
+    msr control, r0
+    /* Globally enable interrupts. */
+    cpsie i
+    cpsie f
+    dsb
+    isb
+    /* Call SVC to start the first task. */
+    svc 0
+    nop
+    nop
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
 __asm void prvEnableVFP( void )
 {
-	PRESERVE8
+/* *INDENT-OFF* */
+    PRESERVE8
 
-	/* The FPU enable bits are in the CPACR. */
-	ldr.w r0, =0xE000ED88
-	ldr	r1, [r0]
+    /* The FPU enable bits are in the CPACR. */
+    ldr.w r0, =0xE000ED88
+    ldr r1, [ r0 ]
 
-	/* Enable CP10 and CP11 coprocessors, then save back. */
-	orr	r1, r1, #( 0xf << 20 )
-	str r1, [r0]
-	bx	r14
-	nop
+    /* Enable CP10 and CP11 coprocessors, then save back. */
+    orr r1, r1, #( 0xf << 20 )
+    str r1, [ r0 ]
+    bx r14
+    nop
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
@@ -293,381 +305,390 @@ __asm void prvEnableVFP( void )
  */
 BaseType_t xPortStartScheduler( void )
 {
-	#if( configASSERT_DEFINED == 1 )
-	{
-		volatile uint32_t ulOriginalPriority;
-		volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
-		volatile uint8_t ucMaxPriorityValue;
+    #if ( configASSERT_DEFINED == 1 )
+        {
+            volatile uint32_t ulOriginalPriority;
+            volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
+            volatile uint8_t ucMaxPriorityValue;
 
-		/* Determine the maximum priority from which ISR safe FreeRTOS API
-		functions can be called.  ISR safe functions are those that end in
-		"FromISR".  FreeRTOS maintains separate thread and ISR API functions to
-		ensure interrupt entry is as fast and simple as possible.
+            /* Determine the maximum priority from which ISR safe FreeRTOS API
+             * functions can be called.  ISR safe functions are those that end in
+             * "FromISR".  FreeRTOS maintains separate thread and ISR API functions to
+             * ensure interrupt entry is as fast and simple as possible.
+             *
+             * Save the interrupt priority value that is about to be clobbered. */
+            ulOriginalPriority = *pucFirstUserPriorityRegister;
 
-		Save the interrupt priority value that is about to be clobbered. */
-		ulOriginalPriority = *pucFirstUserPriorityRegister;
+            /* Determine the number of priority bits available.  First write to all
+             * possible bits. */
+            *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
 
-		/* Determine the number of priority bits available.  First write to all
-		possible bits. */
-		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
+            /* Read the value back to see how many bits stuck. */
+            ucMaxPriorityValue = *pucFirstUserPriorityRegister;
 
-		/* Read the value back to see how many bits stuck. */
-		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
+            /* The kernel interrupt priority should be set to the lowest
+             * priority. */
+            configASSERT( ucMaxPriorityValue == ( configKERNEL_INTERRUPT_PRIORITY & ucMaxPriorityValue ) );
 
-		/* The kernel interrupt priority should be set to the lowest
-		priority. */
-		configASSERT( ucMaxPriorityValue == ( configKERNEL_INTERRUPT_PRIORITY & ucMaxPriorityValue ) );
+            /* Use the same mask on the maximum system call priority. */
+            ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
 
-		/* Use the same mask on the maximum system call priority. */
-		ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
+            /* Calculate the maximum acceptable priority group value for the number
+             * of bits read back. */
+            ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
 
-		/* Calculate the maximum acceptable priority group value for the number
-		of bits read back. */
-		ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
-		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
-		{
-			ulMaxPRIGROUPValue--;
-			ucMaxPriorityValue <<= ( uint8_t ) 0x01;
-		}
+            while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
+            {
+                ulMaxPRIGROUPValue--;
+                ucMaxPriorityValue <<= ( uint8_t ) 0x01;
+            }
 
-		#ifdef __NVIC_PRIO_BITS
-		{
-			/* Check the CMSIS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
-		}
-		#endif
+            #ifdef __NVIC_PRIO_BITS
+                {
+                    /* Check the CMSIS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
+                }
+            #endif
 
-		#ifdef configPRIO_BITS
-		{
-			/* Check the FreeRTOS configuration that defines the number of
-			priority bits matches the number of priority bits actually queried
-			from the hardware. */
-			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
-		}
-		#endif
+            #ifdef configPRIO_BITS
+                {
+                    /* Check the FreeRTOS configuration that defines the number of
+                     * priority bits matches the number of priority bits actually queried
+                     * from the hardware. */
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
+                }
+            #endif
 
-		/* Shift the priority group value back to its position within the AIRCR
-		register. */
-		ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
-		ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
+            /* Shift the priority group value back to its position within the AIRCR
+             * register. */
+            ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
+            ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
 
-		/* Restore the clobbered interrupt priority register to its original
-		value. */
-		*pucFirstUserPriorityRegister = ulOriginalPriority;
-	}
-	#endif /* conifgASSERT_DEFINED */
+            /* Restore the clobbered interrupt priority register to its original
+             * value. */
+            *pucFirstUserPriorityRegister = ulOriginalPriority;
+        }
+    #endif /* conifgASSERT_DEFINED */
 
-	/* Make PendSV and SysTick the lowest priority interrupts. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+    /* Make PendSV and SysTick the lowest priority interrupts. */
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
 
-	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-	here already. */
-	vPortSetupTimerInterrupt();
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
-	/* Initialise the critical nesting count ready for the first task. */
-	uxCriticalNesting = 0;
+    /* Start the timer that generates the tick ISR.  Interrupts are disabled
+     * here already. */
+    vPortSetupTimerInterrupt();
 
-	/* Ensure the VFP is enabled - it should be anyway. */
-	prvEnableVFP();
+    /* Initialise the critical nesting count ready for the first task. */
+    uxCriticalNesting = 0;
 
-	/* Lazy save always. */
-	*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
+    /* Ensure the VFP is enabled - it should be anyway. */
+    prvEnableVFP();
 
-	/* Start the first task. */
-	prvStartFirstTask();
+    /* Lazy save always. */
+    *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
 
-	/* Should not get here! */
-	return 0;
+    /* Start the first task. */
+    prvStartFirstTask();
+
+    /* Should not get here! */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void )
 {
-	/* Not implemented in ports where there is nothing to return to.
-	Artificially force an assert. */
-	configASSERT( uxCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( uxCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void )
 {
-	portDISABLE_INTERRUPTS();
-	uxCriticalNesting++;
+    portDISABLE_INTERRUPTS();
+    uxCriticalNesting++;
 
-	/* This is not the interrupt safe version of the enter critical function so
-	assert() if it is being called from an interrupt context.  Only API
-	functions that end in "FromISR" can be used in an interrupt.  Only assert if
-	the critical nesting count is 1 to protect against recursive calls if the
-	assert function also uses a critical section. */
-	if( uxCriticalNesting == 1 )
-	{
-		configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
-	}
+    /* This is not the interrupt safe version of the enter critical function so
+     * assert() if it is being called from an interrupt context.  Only API
+     * functions that end in "FromISR" can be used in an interrupt.  Only assert if
+     * the critical nesting count is 1 to protect against recursive calls if the
+     * assert function also uses a critical section. */
+    if( uxCriticalNesting == 1 )
+    {
+        configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
+    }
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void )
 {
-	configASSERT( uxCriticalNesting );
-	uxCriticalNesting--;
-	if( uxCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
+    configASSERT( uxCriticalNesting );
+    uxCriticalNesting--;
+
+    if( uxCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
 }
 /*-----------------------------------------------------------*/
 
 __asm void xPortPendSVHandler( void )
 {
-	extern uxCriticalNesting;
-	extern pxCurrentTCB;
-	extern vTaskSwitchContext;
+    extern uxCriticalNesting;
+    extern pxCurrentTCB;
+    extern vTaskSwitchContext;
 
-	PRESERVE8
+/* *INDENT-OFF* */
+    PRESERVE8
 
-	mrs r0, psp
-	isb
-	/* Get the location of the current TCB. */
-	ldr	r3, =pxCurrentTCB
-	ldr	r2, [r3]
+    mrs r0, psp
+    isb
+    /* Get the location of the current TCB. */
+    ldr r3, =pxCurrentTCB
+    ldr r2, [ r3 ]
 
-	/* Is the task using the FPU context?  If so, push high vfp registers. */
-	tst r14, #0x10
-	it eq
-	vstmdbeq r0!, {s16-s31}
+    /* Is the task using the FPU context?  If so, push high vfp registers. */
+    tst r14, #0x10
+    it eq
+    vstmdbeq r0 !, { s16 - s31 }
 
-	/* Save the core registers. */
-	stmdb r0!, {r4-r11, r14}
+    /* Save the core registers. */
+    stmdb r0 !, { r4 - r11, r14 }
 
-	/* Save the new top of stack into the first member of the TCB. */
-	str r0, [r2]
+    /* Save the new top of stack into the first member of the TCB. */
+    str r0, [ r2 ]
 
-	stmdb sp!, {r0, r3}
-	mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
-	cpsid i
-	msr basepri, r0
-	dsb
-	isb
-	cpsie i
-	bl vTaskSwitchContext
-	mov r0, #0
-	msr basepri, r0
-	ldmia sp!, {r0, r3}
+    stmdb sp !, { r0, r3 }
+    mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
+    cpsid i
+    msr basepri, r0
+    dsb
+    isb
+    cpsie i
+    bl vTaskSwitchContext
+    mov r0, #0
+    msr basepri, r0
+    ldmia sp !, { r0, r3 }
 
-	/* The first item in pxCurrentTCB is the task top of stack. */
-	ldr r1, [r3]
-	ldr r0, [r1]
+    /* The first item in pxCurrentTCB is the task top of stack. */
+    ldr r1, [ r3 ]
+    ldr r0, [ r1 ]
 
-	/* Pop the core registers. */
-	ldmia r0!, {r4-r11, r14}
+    /* Pop the core registers. */
+    ldmia r0 !, { r4 - r11, r14 }
 
-	/* Is the task using the FPU context?  If so, pop the high vfp registers
-	too. */
-	tst r14, #0x10
-	it eq
-	vldmiaeq r0!, {s16-s31}
+    /* Is the task using the FPU context?  If so, pop the high vfp registers
+     * too. */
+    tst r14, #0x10
+    it eq
+    vldmiaeq r0 !, { s16 - s31 }
 
-	msr psp, r0
-	isb
-	#ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata */
-		#if WORKAROUND_PMU_CM001 == 1
-			push { r14 }
-			pop { pc }
-			nop
-		#endif
-	#endif
+    msr psp, r0
+    isb
+    #ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata */
+        #if WORKAROUND_PMU_CM001 == 1
+            push { r14 }
+            pop { pc }
+            nop
+        #endif
+    #endif
 
-	bx r14
+    bx r14
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
 void xPortSysTickHandler( void )
 {
-	/* The SysTick runs at the lowest interrupt priority, so when this interrupt
-	executes all interrupts must be unmasked.  There is therefore no need to
-	save and then restore the interrupt mask value as its value is already
-	known - therefore the slightly faster vPortRaiseBASEPRI() function is used
-	in place of portSET_INTERRUPT_MASK_FROM_ISR(). */
-	vPortRaiseBASEPRI();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* A context switch is required.  Context switching is performed in
-			the PendSV interrupt.  Pend the PendSV interrupt. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	vPortClearBASEPRIFromISR();
+    /* The SysTick runs at the lowest interrupt priority, so when this interrupt
+     * executes all interrupts must be unmasked.  There is therefore no need to
+     * save and then restore the interrupt mask value as its value is already
+     * known - therefore the slightly faster vPortRaiseBASEPRI() function is used
+     * in place of portSET_INTERRUPT_MASK_FROM_ISR(). */
+    vPortRaiseBASEPRI();
+    {
+        /* Increment the RTOS tick. */
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* A context switch is required.  Context switching is performed in
+             * the PendSV interrupt.  Pend the PendSV interrupt. */
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+        }
+    }
+
+    vPortClearBASEPRIFromISR();
 }
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TICKLESS_IDLE == 1 )
+#if ( configUSE_TICKLESS_IDLE == 1 )
 
-	__weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-	{
-	uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
-	TickType_t xModifiableIdleTime;
+    __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+    {
+        uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+        TickType_t xModifiableIdleTime;
 
-		/* Make sure the SysTick reload value does not overflow the counter. */
-		if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-		{
-			xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-		}
+        /* Make sure the SysTick reload value does not overflow the counter. */
+        if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+        {
+            xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+        }
 
-		/* Stop the SysTick momentarily.  The time the SysTick is stopped for
-		is accounted for as best it can be, but using the tickless mode will
-		inevitably result in some tiny drift of the time maintained by the
-		kernel with respect to calendar time. */
-		portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+        /* Stop the SysTick momentarily.  The time the SysTick is stopped for
+         * is accounted for as best it can be, but using the tickless mode will
+         * inevitably result in some tiny drift of the time maintained by the
+         * kernel with respect to calendar time. */
+        portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
 
-		/* Calculate the reload value required to wait xExpectedIdleTime
-		tick periods.  -1 is used because this code will execute part way
-		through one of the tick periods. */
-		ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-		if( ulReloadValue > ulStoppedTimerCompensation )
-		{
-			ulReloadValue -= ulStoppedTimerCompensation;
-		}
+        /* Calculate the reload value required to wait xExpectedIdleTime
+         * tick periods.  -1 is used because this code will execute part way
+         * through one of the tick periods. */
+        ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
 
-		/* Enter a critical section but don't use the taskENTER_CRITICAL()
-		method as that will mask interrupts that should exit sleep mode. */
-		__disable_irq();
-		__dsb( portSY_FULL_READ_WRITE );
-		__isb( portSY_FULL_READ_WRITE );
+        if( ulReloadValue > ulStoppedTimerCompensation )
+        {
+            ulReloadValue -= ulStoppedTimerCompensation;
+        }
 
-		/* If a context switch is pending or a task is waiting for the scheduler
-		to be unsuspended then abandon the low power entry. */
-		if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-		{
-			/* Restart from whatever is left in the count register to complete
-			this tick period. */
-			portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+        /* Enter a critical section but don't use the taskENTER_CRITICAL()
+         * method as that will mask interrupts that should exit sleep mode. */
+        __disable_irq();
+        __dsb( portSY_FULL_READ_WRITE );
+        __isb( portSY_FULL_READ_WRITE );
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+        /* If a context switch is pending or a task is waiting for the scheduler
+         * to be unsuspended then abandon the low power entry. */
+        if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+        {
+            /* Restart from whatever is left in the count register to complete
+             * this tick period. */
+            portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Reset the reload register to the value required for normal tick
-			periods. */
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts - see comments above __disable_irq() call
-			above. */
-			__enable_irq();
-		}
-		else
-		{
-			/* Set the new reload value. */
-			portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+            /* Reset the reload register to the value required for normal tick
+             * periods. */
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
 
-			/* Clear the SysTick count flag and set the count value back to
-			zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            /* Re-enable interrupts - see comments above __disable_irq() call
+             * above. */
+            __enable_irq();
+        }
+        else
+        {
+            /* Set the new reload value. */
+            portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
 
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            /* Clear the SysTick count flag and set the count value back to
+             * zero. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-			/* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
-			set its parameter to 0 to indicate that its implementation contains
-			its own wait for interrupt or wait for event instruction, and so wfi
-			should not be executed again.  However, the original expected idle
-			time variable must remain unmodified, so a copy is taken. */
-			xModifiableIdleTime = xExpectedIdleTime;
-			configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-			if( xModifiableIdleTime > 0 )
-			{
-				__dsb( portSY_FULL_READ_WRITE );
-				__wfi();
-				__isb( portSY_FULL_READ_WRITE );
-			}
-			configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+            /* Restart SysTick. */
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
-			/* Re-enable interrupts to allow the interrupt that brought the MCU
-			out of sleep mode to execute immediately.  see comments above
-			__disable_interrupt() call above. */
-			__enable_irq();
-			__dsb( portSY_FULL_READ_WRITE );
-			__isb( portSY_FULL_READ_WRITE );
+            /* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
+             * set its parameter to 0 to indicate that its implementation contains
+             * its own wait for interrupt or wait for event instruction, and so wfi
+             * should not be executed again.  However, the original expected idle
+             * time variable must remain unmodified, so a copy is taken. */
+            xModifiableIdleTime = xExpectedIdleTime;
+            configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
 
-			/* Disable interrupts again because the clock is about to be stopped
-			and interrupts that execute while the clock is stopped will increase
-			any slippage between the time maintained by the RTOS and calendar
-			time. */
-			__disable_irq();
-			__dsb( portSY_FULL_READ_WRITE );
-			__isb( portSY_FULL_READ_WRITE );
+            if( xModifiableIdleTime > 0 )
+            {
+                __dsb( portSY_FULL_READ_WRITE );
+                __wfi();
+                __isb( portSY_FULL_READ_WRITE );
+            }
 
-			/* Disable the SysTick clock without reading the
-			portNVIC_SYSTICK_CTRL_REG register to ensure the
-			portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
-			the time the SysTick is stopped for is accounted for as best it can
-			be, but using the tickless mode will inevitably result in some tiny
-			drift of the time maintained by the kernel with respect to calendar
-			time*/
-			portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+            configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
 
-			/* Determine if the SysTick clock has already counted to zero and
-			been set back to the current reload value (the reload back being
-			correct for the entire expected idle time) or if the SysTick is yet
-			to count to zero (in which case an interrupt other than the SysTick
-			must have brought the system out of sleep mode). */
-			if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-			{
-				uint32_t ulCalculatedLoadValue;
+            /* Re-enable interrupts to allow the interrupt that brought the MCU
+             * out of sleep mode to execute immediately.  see comments above
+             * __disable_interrupt() call above. */
+            __enable_irq();
+            __dsb( portSY_FULL_READ_WRITE );
+            __isb( portSY_FULL_READ_WRITE );
 
-				/* The tick interrupt is already pending, and the SysTick count
-				reloaded with ulReloadValue.  Reset the
-				portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
-				period. */
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+            /* Disable interrupts again because the clock is about to be stopped
+             * and interrupts that execute while the clock is stopped will increase
+             * any slippage between the time maintained by the RTOS and calendar
+             * time. */
+            __disable_irq();
+            __dsb( portSY_FULL_READ_WRITE );
+            __isb( portSY_FULL_READ_WRITE );
 
-				/* Don't allow a tiny value, or values that have somehow
-				underflowed because the post sleep hook did something
-				that took too long. */
-				if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-				{
-					ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-				}
+            /* Disable the SysTick clock without reading the
+             * portNVIC_SYSTICK_CTRL_REG register to ensure the
+             * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
+             * the time the SysTick is stopped for is accounted for as best it can
+             * be, but using the tickless mode will inevitably result in some tiny
+             * drift of the time maintained by the kernel with respect to calendar
+             * time*/
+            portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
 
-				portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+            /* Determine if the SysTick clock has already counted to zero and
+             * been set back to the current reload value (the reload back being
+             * correct for the entire expected idle time) or if the SysTick is yet
+             * to count to zero (in which case an interrupt other than the SysTick
+             * must have brought the system out of sleep mode). */
+            if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+            {
+                uint32_t ulCalculatedLoadValue;
 
-				/* As the pending tick will be processed as soon as this
-				function exits, the tick value maintained by the tick is stepped
-				forward by one less than the time spent waiting. */
-				ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-			}
-			else
-			{
-				/* Something other than the tick interrupt ended the sleep.
-				Work out how long the sleep lasted rounded to complete tick
-				periods (not the ulReload value which accounted for part
-				ticks). */
-				ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+                /* The tick interrupt is already pending, and the SysTick count
+                 * reloaded with ulReloadValue.  Reset the
+                 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+                 * period. */
+                ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
 
-				/* How many complete tick periods passed while the processor
-				was waiting? */
-				ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+                /* Don't allow a tiny value, or values that have somehow
+                 * underflowed because the post sleep hook did something
+                 * that took too long. */
+                if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+                {
+                    ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+                }
 
-				/* The reload value is set to whatever fraction of a single tick
-				period remains. */
-				portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-			}
+                portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
 
-			/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
-			again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
-			value. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-			vTaskStepTick( ulCompleteTickPeriods );
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+                /* As the pending tick will be processed as soon as this
+                 * function exits, the tick value maintained by the tick is stepped
+                 * forward by one less than the time spent waiting. */
+                ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+            }
+            else
+            {
+                /* Something other than the tick interrupt ended the sleep.
+                 * Work out how long the sleep lasted rounded to complete tick
+                 * periods (not the ulReload value which accounted for part
+                 * ticks). */
+                ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-			/* Exit with interrupts enabled. */
-			__enable_irq();
-		}
-	}
+                /* How many complete tick periods passed while the processor
+                 * was waiting? */
+                ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+                /* The reload value is set to whatever fraction of a single tick
+                 * period remains. */
+                portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+            }
+
+            /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+             * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+             * value. */
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+            vTaskStepTick( ulCompleteTickPeriods );
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+            /* Exit with interrupts enabled. */
+            __enable_irq();
+        }
+    }
 
 #endif /* #if configUSE_TICKLESS_IDLE */
 
@@ -677,98 +698,98 @@ void xPortSysTickHandler( void )
  * Setup the SysTick timer to generate the tick interrupts at the required
  * frequency.
  */
-#if( configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0 )
+#if ( configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0 )
 
-	__weak void vPortSetupTimerInterrupt( void )
-	{
-		/* Calculate the constants required to configure the tick interrupt. */
-		#if( configUSE_TICKLESS_IDLE == 1 )
-		{
-			ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
-			xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-			ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
-		}
-		#endif /* configUSE_TICKLESS_IDLE */
+    __weak void vPortSetupTimerInterrupt( void )
+    {
+        /* Calculate the constants required to configure the tick interrupt. */
+        #if ( configUSE_TICKLESS_IDLE == 1 )
+            {
+                ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+                xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+                ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+            }
+        #endif /* configUSE_TICKLESS_IDLE */
 
-		/* Stop and clear the SysTick. */
-		portNVIC_SYSTICK_CTRL_REG = 0UL;
-		portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+        /* Stop and clear the SysTick. */
+        portNVIC_SYSTICK_CTRL_REG = 0UL;
+        portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
-		/* Configure SysTick to interrupt at the requested rate. */
-		portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-		portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
-	}
+        /* Configure SysTick to interrupt at the requested rate. */
+        portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+        portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
+    }
 
 #endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */
 /*-----------------------------------------------------------*/
 
 __asm uint32_t vPortGetIPSR( void )
 {
-	PRESERVE8
+/* *INDENT-OFF* */
+    PRESERVE8
 
-	mrs r0, ipsr
-	bx r14
+    mrs r0, ipsr
+    bx r14
+/* *INDENT-ON* */
 }
 /*-----------------------------------------------------------*/
 
-#if( configASSERT_DEFINED == 1 )
+#if ( configASSERT_DEFINED == 1 )
 
-	void vPortValidateInterruptPriority( void )
-	{
-	uint32_t ulCurrentInterrupt;
-	uint8_t ucCurrentPriority;
+    void vPortValidateInterruptPriority( void )
+    {
+        uint32_t ulCurrentInterrupt;
+        uint8_t ucCurrentPriority;
 
-		/* Obtain the number of the currently executing interrupt. */
-		ulCurrentInterrupt = vPortGetIPSR();
+        /* Obtain the number of the currently executing interrupt. */
+        ulCurrentInterrupt = vPortGetIPSR();
 
-		/* Is the interrupt number a user defined interrupt? */
-		if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
-		{
-			/* Look up the interrupt's priority. */
-			ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
+        /* Is the interrupt number a user defined interrupt? */
+        if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
+        {
+            /* Look up the interrupt's priority. */
+            ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
 
-			/* The following assertion will fail if a service routine (ISR) for
-			an interrupt that has been assigned a priority above
-			configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
-			function.  ISR safe FreeRTOS API functions must *only* be called
-			from interrupts that have been assigned a priority at or below
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
+            /* The following assertion will fail if a service routine (ISR) for
+             * an interrupt that has been assigned a priority above
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
+             * function.  ISR safe FreeRTOS API functions must *only* be called
+             * from interrupts that have been assigned a priority at or below
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Numerically low interrupt priority numbers represent logically high
+             * interrupt priorities, therefore the priority of the interrupt must
+             * be set to a value equal to or numerically *higher* than
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+             *
+             * Interrupts that	use the FreeRTOS API must not be left at their
+             * default priority of	zero as that is the highest possible priority,
+             * which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
+             * and	therefore also guaranteed to be invalid.
+             *
+             * FreeRTOS maintains separate thread and ISR API functions to ensure
+             * interrupt entry is as fast and simple as possible.
+             *
+             * The following links provide detailed information:
+             * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
+             * https://www.FreeRTOS.org/FAQHelp.html */
+            configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
+        }
 
-			Numerically low interrupt priority numbers represent logically high
-			interrupt priorities, therefore the priority of the interrupt must
-			be set to a value equal to or numerically *higher* than
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
-
-			Interrupts that	use the FreeRTOS API must not be left at their
-			default priority of	zero as that is the highest possible priority,
-			which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
-			and	therefore also guaranteed to be invalid.
-
-			FreeRTOS maintains separate thread and ISR API functions to ensure
-			interrupt entry is as fast and simple as possible.
-
-			The following links provide detailed information:
-			http://www.freertos.org/RTOS-Cortex-M3-M4.html
-			http://www.freertos.org/FAQHelp.html */
-			configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
-		}
-
-		/* Priority grouping:  The interrupt controller (NVIC) allows the bits
-		that define each interrupt's priority to be split between bits that
-		define the interrupt's pre-emption priority bits and bits that define
-		the interrupt's sub-priority.  For simplicity all bits must be defined
-		to be pre-emption priority bits.  The following assertion will fail if
-		this is not the case (if some bits represent a sub-priority).
-
-		If the application only uses CMSIS libraries for interrupt
-		configuration then the correct setting can be achieved on all Cortex-M
-		devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
-		scheduler.  Note however that some vendor specific peripheral libraries
-		assume a non-zero priority group setting, in which cases using a value
-		of zero will result in unpredictable behaviour. */
-		configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
-	}
+        /* Priority grouping:  The interrupt controller (NVIC) allows the bits
+         * that define each interrupt's priority to be split between bits that
+         * define the interrupt's pre-emption priority bits and bits that define
+         * the interrupt's sub-priority.  For simplicity all bits must be defined
+         * to be pre-emption priority bits.  The following assertion will fail if
+         * this is not the case (if some bits represent a sub-priority).
+         *
+         * If the application only uses CMSIS libraries for interrupt
+         * configuration then the correct setting can be achieved on all Cortex-M
+         * devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
+         * scheduler.  Note however that some vendor specific peripheral libraries
+         * assume a non-zero priority group setting, in which cases using a value
+         * of zero will result in unpredictable behaviour. */
+        configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
+    }
 
 #endif /* configASSERT_DEFINED */
-
-
diff --git a/portable/RVDS/ARM_CM7/r0p1/portmacro.h b/portable/RVDS/ARM_CM7/r0p1/portmacro.h
index 6ac5793da..4a3962c1f 100644
--- a/portable/RVDS/ARM_CM7/r0p1/portmacro.h
+++ b/portable/RVDS/ARM_CM7/r0p1/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,19 +19,19 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -44,213 +44,222 @@ extern "C" {
  */
 
 /* Type definitions. */
-#define portCHAR		char
-#define portFLOAT		float
-#define portDOUBLE		double
-#define portLONG		long
-#define portSHORT		short
-#define portSTACK_TYPE	uint32_t
-#define portBASE_TYPE	long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE StackType_t;
-typedef long BaseType_t;
-typedef unsigned long UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC 1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Architecture specifics. */
-#define portSTACK_GROWTH			( -1 )
-#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT			8
+    #define portSTACK_GROWTH          ( -1 )
+    #define portTICK_PERIOD_MS        ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT        8
 
 /* Constants used with memory barrier intrinsics. */
-#define portSY_FULL_READ_WRITE		( 15 )
+    #define portSY_FULL_READ_WRITE    ( 15 )
 
 /*-----------------------------------------------------------*/
 
 /* Scheduler utilities. */
-#define portYIELD()																\
-{																				\
-	/* Set a PendSV to request a context switch. */								\
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;								\
-																				\
-	/* Barriers are normally not required but do ensure the code is completely	\
-	within the specified behaviour for the architecture. */						\
-	__dsb( portSY_FULL_READ_WRITE );											\
-	__isb( portSY_FULL_READ_WRITE );											\
-}
+    #define portYIELD()                                 \
+    {                                                   \
+        /* Set a PendSV to request a context switch. */ \
+        portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
+                                                        \
+        /* Barriers are normally not required but do ensure the code is completely \
+         * within the specified behaviour for the architecture. */ \
+        __dsb( portSY_FULL_READ_WRITE );                           \
+        __isb( portSY_FULL_READ_WRITE );                           \
+    }
 /*-----------------------------------------------------------*/
 
-#define portNVIC_INT_CTRL_REG		( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT		( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()
-#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired != pdFALSE ) portYIELD()
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 /* Critical section management. */
-extern void vPortEnterCritical( void );
-extern void vPortExitCritical( void );
+    extern void vPortEnterCritical( void );
+    extern void vPortExitCritical( void );
 
-#define portDISABLE_INTERRUPTS()				vPortRaiseBASEPRI()
-#define portENABLE_INTERRUPTS()					vPortSetBASEPRI( 0 )
-#define portENTER_CRITICAL()					vPortEnterCritical()
-#define portEXIT_CRITICAL()						vPortExitCritical()
-#define portSET_INTERRUPT_MASK_FROM_ISR()		ulPortRaiseBASEPRI()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )	vPortSetBASEPRI( x )
+    #define portDISABLE_INTERRUPTS()                  vPortRaiseBASEPRI()
+    #define portENABLE_INTERRUPTS()                   vPortSetBASEPRI( 0 )
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulPortRaiseBASEPRI()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vPortSetBASEPRI( x )
 
 /*-----------------------------------------------------------*/
 
 /* Tickless idle/low power functionality. */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Port specific optimisations. */
-#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
-	#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
-#endif
+    #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
+        #define configUSE_PORT_OPTIMISED_TASK_SELECTION    1
+    #endif
 
-#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
+    #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
 
-	/* Check the configuration. */
-	#if( configMAX_PRIORITIES > 32 )
-		#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
-	#endif
+/* Check the configuration. */
+        #if ( configMAX_PRIORITIES > 32 )
+            #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
+        #endif
 
-	/* Store/clear the ready priorities in a bit map. */
-	#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
-	#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
+/* Store/clear the ready priorities in a bit map. */
+        #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities )    ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
+        #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities )     ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
 
-	/*-----------------------------------------------------------*/
+/*-----------------------------------------------------------*/
 
-	#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) )
+        #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities )    uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) )
 
-#endif /* taskRECORD_READY_PRIORITY */
+    #endif /* taskRECORD_READY_PRIORITY */
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site.  These are
-not necessary for to use this port.  They are defined so the common demo files
-(which build with all the ports) will build. */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+ * not necessary for to use this port.  They are defined so the common demo files
+ * (which build with all the ports) will build. */
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 /*-----------------------------------------------------------*/
 
-#ifdef configASSERT
-	void vPortValidateInterruptPriority( void );
-	#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() 	vPortValidateInterruptPriority()
-#endif
+    #ifdef configASSERT
+        void vPortValidateInterruptPriority( void );
+        #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()    vPortValidateInterruptPriority()
+    #endif
 
 /* portNOP() is not required by this port. */
-#define portNOP()
+    #define portNOP()
 
-#define portINLINE __inline
+    #define portINLINE              __inline
 
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE __forceinline
-#endif
+    #ifndef portFORCE_INLINE
+        #define portFORCE_INLINE    __forceinline
+    #endif
 
 /*-----------------------------------------------------------*/
 
-static portFORCE_INLINE void vPortSetBASEPRI( uint32_t ulBASEPRI )
-{
-	__asm
-	{
-		/* Barrier instructions are not used as this function is only used to
-		lower the BASEPRI value. */
-		msr basepri, ulBASEPRI
-	}
-}
+    static portFORCE_INLINE void vPortSetBASEPRI( uint32_t ulBASEPRI )
+    {
+        __asm
+        {
+            /* Barrier instructions are not used as this function is only used to
+             * lower the BASEPRI value. */
+/* *INDENT-OFF* */
+            msr basepri, ulBASEPRI
+/* *INDENT-ON* */
+        }
+    }
 /*-----------------------------------------------------------*/
 
-static portFORCE_INLINE void vPortRaiseBASEPRI( void )
-{
-uint32_t ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
+    static portFORCE_INLINE void vPortRaiseBASEPRI( void )
+    {
+        uint32_t ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
 
-	__asm
-	{
-		/* Set BASEPRI to the max syscall priority to effect a critical
-		section. */
-		cpsid i
-		msr basepri, ulNewBASEPRI
-		dsb
-		isb
-		cpsie i
-	}
-}
+        __asm
+        {
+            /* Set BASEPRI to the max syscall priority to effect a critical
+             * section. */
+/* *INDENT-OFF* */
+            cpsid i
+            msr basepri, ulNewBASEPRI
+            dsb
+            isb
+            cpsie i
+/* *INDENT-ON* */
+        }
+    }
 /*-----------------------------------------------------------*/
 
-static portFORCE_INLINE void vPortClearBASEPRIFromISR( void )
-{
-	__asm
-	{
-		/* Set BASEPRI to 0 so no interrupts are masked.  This function is only
-		used to lower the mask in an interrupt, so memory barriers are not 
-		used. */
-		msr basepri, #0
-	}
-}
+    static portFORCE_INLINE void vPortClearBASEPRIFromISR( void )
+    {
+        __asm
+        {
+            /* Set BASEPRI to 0 so no interrupts are masked.  This function is only
+             * used to lower the mask in an interrupt, so memory barriers are not
+             * used. */
+/* *INDENT-OFF* */
+            msr basepri, # 0
+/* *INDENT-ON* */
+        }
+    }
 /*-----------------------------------------------------------*/
 
-static portFORCE_INLINE uint32_t ulPortRaiseBASEPRI( void )
-{
-uint32_t ulReturn, ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
+    static portFORCE_INLINE uint32_t ulPortRaiseBASEPRI( void )
+    {
+        uint32_t ulReturn, ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
 
-	__asm
-	{
-		/* Set BASEPRI to the max syscall priority to effect a critical
-		section. */
-		mrs ulReturn, basepri
-		cpsid i
-		msr basepri, ulNewBASEPRI
-		dsb
-		isb
-		cpsie i
-	}
+        __asm
+        {
+            /* Set BASEPRI to the max syscall priority to effect a critical
+             * section. */
+/* *INDENT-OFF* */
+            mrs ulReturn, basepri
+            cpsid i
+            msr basepri, ulNewBASEPRI
+            dsb
+            isb
+            cpsie i
+/* *INDENT-ON* */
+        }
 
-	return ulReturn;
-}
+        return ulReturn;
+    }
 /*-----------------------------------------------------------*/
 
-static portFORCE_INLINE BaseType_t xPortIsInsideInterrupt( void )
-{
-uint32_t ulCurrentInterrupt;
-BaseType_t xReturn;
+    static portFORCE_INLINE BaseType_t xPortIsInsideInterrupt( void )
+    {
+        uint32_t ulCurrentInterrupt;
+        BaseType_t xReturn;
 
-	/* Obtain the number of the currently executing interrupt. */
-	__asm
-	{
-		mrs ulCurrentInterrupt, ipsr
-	}
+        /* Obtain the number of the currently executing interrupt. */
+        __asm
+        {
+/* *INDENT-OFF* */
+            mrs ulCurrentInterrupt, ipsr
+/* *INDENT-ON* */
+        }
 
-	if( ulCurrentInterrupt == 0 )
-	{
-		xReturn = pdFALSE;
-	}
-	else
-	{
-		xReturn = pdTRUE;
-	}
+        if( ulCurrentInterrupt == 0 )
+        {
+            xReturn = pdFALSE;
+        }
+        else
+        {
+            xReturn = pdTRUE;
+        }
 
-	return xReturn;
-}
+        return xReturn;
+    }
 
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
-
diff --git a/portable/Renesas/RX100/port.c b/portable/Renesas/RX100/port.c
index d947e64ca..7bc616560 100644
--- a/portable/Renesas/RX100/port.c
+++ b/portable/Renesas/RX100/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/Renesas/RX100/port_asm.src b/portable/Renesas/RX100/port_asm.src
index 0068e1f58..15a37c5cf 100644
--- a/portable/Renesas/RX100/port_asm.src
+++ b/portable/Renesas/RX100/port_asm.src
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/Renesas/RX100/portmacro.h b/portable/Renesas/RX100/portmacro.h
index 2f71e7e06..31a8f8011 100644
--- a/portable/Renesas/RX100/portmacro.h
+++ b/portable/Renesas/RX100/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/Renesas/RX200/port.c b/portable/Renesas/RX200/port.c
index 975722fae..f46b18c5b 100644
--- a/portable/Renesas/RX200/port.c
+++ b/portable/Renesas/RX200/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/Renesas/RX200/port_asm.src b/portable/Renesas/RX200/port_asm.src
index 0068e1f58..15a37c5cf 100644
--- a/portable/Renesas/RX200/port_asm.src
+++ b/portable/Renesas/RX200/port_asm.src
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/Renesas/RX200/portmacro.h b/portable/Renesas/RX200/portmacro.h
index 4abab1cfc..7f0343853 100644
--- a/portable/Renesas/RX200/portmacro.h
+++ b/portable/Renesas/RX200/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/Renesas/RX600/port.c b/portable/Renesas/RX600/port.c
index aa6010c93..d89829992 100644
--- a/portable/Renesas/RX600/port.c
+++ b/portable/Renesas/RX600/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/Renesas/RX600/port_asm.src b/portable/Renesas/RX600/port_asm.src
index 0068e1f58..15a37c5cf 100644
--- a/portable/Renesas/RX600/port_asm.src
+++ b/portable/Renesas/RX600/port_asm.src
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/Renesas/RX600/portmacro.h b/portable/Renesas/RX600/portmacro.h
index ab0d60304..2a3a8ad16 100644
--- a/portable/Renesas/RX600/portmacro.h
+++ b/portable/Renesas/RX600/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/Renesas/RX600v2/port.c b/portable/Renesas/RX600v2/port.c
index 1169082c0..a6a6a5b7d 100644
--- a/portable/Renesas/RX600v2/port.c
+++ b/portable/Renesas/RX600v2/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/Renesas/RX600v2/port_asm.src b/portable/Renesas/RX600v2/port_asm.src
index a0373b823..bbf85a6e5 100644
--- a/portable/Renesas/RX600v2/port_asm.src
+++ b/portable/Renesas/RX600v2/port_asm.src
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/Renesas/RX600v2/portmacro.h b/portable/Renesas/RX600v2/portmacro.h
index bf742a26c..b0165eae3 100644
--- a/portable/Renesas/RX600v2/portmacro.h
+++ b/portable/Renesas/RX600v2/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/Renesas/RX700v3_DPFPU/port.c b/portable/Renesas/RX700v3_DPFPU/port.c
new file mode 100644
index 000000000..fc411ebc5
--- /dev/null
+++ b/portable/Renesas/RX700v3_DPFPU/port.c
@@ -0,0 +1,590 @@
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ * 1 tab == 4 spaces!
+ */
+
+/*-----------------------------------------------------------
+* Implementation of functions defined in portable.h for the RXv3 DPFPU port.
+*----------------------------------------------------------*/
+
+#warning Testing for DFPU support in this port is not yet complete
+
+/* Scheduler includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+
+/* Library includes. */
+#include "string.h"
+
+/* Hardware specifics. */
+#if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
+
+    #include "platform.h"
+
+#else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
+
+    #include "iodefine.h"
+
+#endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
+
+/*-----------------------------------------------------------*/
+
+/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
+ * PSW is set with U and I set, and PM and IPL clear. */
+#define portINITIAL_PSW     ( ( StackType_t ) 0x00030000 )
+#define portINITIAL_FPSW    ( ( StackType_t ) 0x00000100 )
+#define portINITIAL_DPSW    ( ( StackType_t ) 0x00000100 )
+#define portINITIAL_DCMR    ( ( StackType_t ) 0x00000000 )
+#define portINITIAL_DECNT   ( ( StackType_t ) 0x00000001 )
+
+/* Tasks are not created with a DPFPU context, but can be given a DPFPU context
+ * after they have been created.  A variable is stored as part of the tasks context
+ * that holds portNO_DPFPU_CONTEXT if the task does not have a DPFPU context, or
+ * any other value if the task does have a DPFPU context. */
+#define portNO_DPFPU_CONTEXT    ( ( StackType_t ) 0 )
+#define portHAS_DPFPU_CONTEXT   ( ( StackType_t ) 1 )
+
+/* The space on the stack required to hold the DPFPU data registers.  This is 16
+ * 64-bit registers. */
+#define portDPFPU_DATA_REGISTER_WORDS   ( 16 * 2 )
+
+/*-----------------------------------------------------------*/
+
+/* The following lines are to ensure vSoftwareInterruptEntry can be referenced,
+ * and therefore installed in the vector table, when the FreeRTOS code is built
+ * as a library. */
+extern BaseType_t vSoftwareInterruptEntry;
+const BaseType_t * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry;
+
+/*-----------------------------------------------------------*/
+
+/*
+ * Function to start the first task executing - written in asm code as direct
+ * access to registers is required.
+ */
+static void prvStartFirstTask( void );
+
+/*
+ * Software interrupt handler.  Performs the actual context switch (saving and
+ * restoring of registers).  Written in asm code as direct register access is
+ * required.
+ */
+static void prvYieldHandler( void );
+
+/*
+ * The entry point for the software interrupt handler.  This is the function
+ * that calls the inline asm function prvYieldHandler().  It is installed in
+ * the vector table, but the code that installs it is in prvYieldHandler rather
+ * than using a #pragma.
+ */
+void vSoftwareInterruptISR( void );
+
+/*
+ * The tick ISR handler.  The peripheral used is configured by the application
+ * via a hook/callback function.
+ */
+void vTickISR( void );
+
+/*-----------------------------------------------------------*/
+
+/* Saved as part of the task context.  If ulPortTaskHasDPFPUContext is non-zero
+ * then a DPFPU context must be saved and restored for the task. */
+#if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
+
+    StackType_t ulPortTaskHasDPFPUContext = portNO_DPFPU_CONTEXT;
+
+#endif /* configUSE_TASK_DPFPU_SUPPORT */
+
+/* This is accessed by the inline assembler functions so is file scope for
+ * convenience. */
+extern void * pxCurrentTCB;
+extern void vTaskSwitchContext( void );
+
+/*-----------------------------------------------------------*/
+
+/*
+ * See header file for description.
+ */
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
+{
+    /* R0 is not included as it is the stack pointer. */
+
+    *pxTopOfStack = 0x00;
+    pxTopOfStack--;
+    *pxTopOfStack = portINITIAL_PSW;
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) pxCode;
+
+    /* When debugging it can be useful if every register is set to a known
+     * value.  Otherwise code space can be saved by just setting the registers
+     * that need to be set. */
+    #ifdef USE_FULL_REGISTER_INITIALISATION
+        {
+            pxTopOfStack--;
+            *pxTopOfStack = 0xffffffff; /* r15. */
+            pxTopOfStack--;
+            *pxTopOfStack = 0xeeeeeeee;
+            pxTopOfStack--;
+            *pxTopOfStack = 0xdddddddd;
+            pxTopOfStack--;
+            *pxTopOfStack = 0xcccccccc;
+            pxTopOfStack--;
+            *pxTopOfStack = 0xbbbbbbbb;
+            pxTopOfStack--;
+            *pxTopOfStack = 0xaaaaaaaa;
+            pxTopOfStack--;
+            *pxTopOfStack = 0x99999999;
+            pxTopOfStack--;
+            *pxTopOfStack = 0x88888888;
+            pxTopOfStack--;
+            *pxTopOfStack = 0x77777777;
+            pxTopOfStack--;
+            *pxTopOfStack = 0x66666666;
+            pxTopOfStack--;
+            *pxTopOfStack = 0x55555555;
+            pxTopOfStack--;
+            *pxTopOfStack = 0x44444444;
+            pxTopOfStack--;
+            *pxTopOfStack = 0x33333333;
+            pxTopOfStack--;
+            *pxTopOfStack = 0x22222222;
+            pxTopOfStack--;
+        }
+    #else /* ifdef USE_FULL_REGISTER_INITIALISATION */
+        {
+            pxTopOfStack -= 15;
+        }
+    #endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
+
+    *pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
+    pxTopOfStack--;
+    *pxTopOfStack = portINITIAL_FPSW;
+    pxTopOfStack--;
+    *pxTopOfStack = 0x11111111; /* Accumulator 1. */
+    pxTopOfStack--;
+    *pxTopOfStack = 0x22222222; /* Accumulator 1. */
+    pxTopOfStack--;
+    *pxTopOfStack = 0x33333333; /* Accumulator 1. */
+    pxTopOfStack--;
+    *pxTopOfStack = 0x44444444; /* Accumulator 0. */
+    pxTopOfStack--;
+    *pxTopOfStack = 0x55555555; /* Accumulator 0. */
+    pxTopOfStack--;
+    *pxTopOfStack = 0x66666666; /* Accumulator 0. */
+
+    #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
+        {
+            /* The task will start without a DPFPU context.  A task that
+             * uses the DPFPU hardware must call vPortTaskUsesDPFPU() before
+             * executing any floating point instructions. */
+            pxTopOfStack--;
+            *pxTopOfStack = portNO_DPFPU_CONTEXT;
+        }
+    #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
+        {
+            /* The task will start with a DPFPU context.  Leave enough
+             * space for the registers - and ensure they are initialised if desired. */
+            #ifdef USE_FULL_REGISTER_INITIALISATION
+                {
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack = 1515.1515; /* DR15. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack = 1414.1414; /* DR14. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack = 1313.1313; /* DR13. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack = 1212.1212; /* DR12. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack = 1111.1111; /* DR11. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack = 1010.1010; /* DR10. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  909.0909; /* DR9. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  808.0808; /* DR8. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  707.0707; /* DR7. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  606.0606; /* DR6. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  505.0505; /* DR5. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  404.0404; /* DR4. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  303.0303; /* DR3. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  202.0202; /* DR2. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack =  101.0101; /* DR1. */
+                    pxTopOfStack -= 2;
+                    *(double *)pxTopOfStack = 9876.54321;/* DR0. */
+                }
+            #else /* ifdef USE_FULL_REGISTER_INITIALISATION */
+                {
+                    pxTopOfStack -= portDPFPU_DATA_REGISTER_WORDS;
+                    memset( pxTopOfStack, 0x00, portDPFPU_DATA_REGISTER_WORDS * sizeof( StackType_t ) );
+                }
+            #endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
+            pxTopOfStack--;
+            *pxTopOfStack = portINITIAL_DECNT; /* DECNT. */
+            pxTopOfStack--;
+            *pxTopOfStack = portINITIAL_DCMR;  /* DCMR. */
+            pxTopOfStack--;
+            *pxTopOfStack = portINITIAL_DPSW;  /* DPSW. */
+        }
+    #elif ( configUSE_TASK_DPFPU_SUPPORT == 0 )
+        {
+            /* Omit DPFPU support. */
+        }
+    #else /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
+        {
+            #error Invalid configUSE_TASK_DPFPU_SUPPORT setting - configUSE_TASK_DPFPU_SUPPORT must be set to 0, 1, 2, or left undefined.
+        }
+    #endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
+
+    return pxTopOfStack;
+}
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
+
+    void vPortTaskUsesDPFPU( void )
+    {
+        /* A task is registering the fact that it needs a DPFPU context.  Set the
+         * DPFPU flag (which is saved as part of the task context). */
+        ulPortTaskHasDPFPUContext = portHAS_DPFPU_CONTEXT;
+    }
+
+#endif /* configUSE_TASK_DPFPU_SUPPORT */
+/*-----------------------------------------------------------*/
+
+BaseType_t xPortStartScheduler( void )
+{
+    extern void vApplicationSetupTimerInterrupt( void );
+
+    /* Use pxCurrentTCB just so it does not get optimised away. */
+    if( pxCurrentTCB != NULL )
+    {
+        /* Call an application function to set up the timer that will generate the
+         * tick interrupt.  This way the application can decide which peripheral to
+         * use.  A demo application is provided to show a suitable example. */
+        vApplicationSetupTimerInterrupt();
+
+        /* Enable the software interrupt. */
+        _IEN( _ICU_SWINT ) = 1;
+
+        /* Ensure the software interrupt is clear. */
+        _IR( _ICU_SWINT ) = 0;
+
+        /* Ensure the software interrupt is set to the kernel priority. */
+        _IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
+
+        /* Start the first task. */
+        prvStartFirstTask();
+    }
+
+    /* Just to make sure the function is not optimised away. */
+    ( void ) vSoftwareInterruptISR();
+
+    /* Should not get here. */
+    return pdFAIL;
+}
+/*-----------------------------------------------------------*/
+
+void vPortEndScheduler( void )
+{
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( pxCurrentTCB == NULL );
+
+    /* The following line is just to prevent the symbol getting optimised away. */
+    ( void ) vTaskSwitchContext();
+}
+/*-----------------------------------------------------------*/
+
+#pragma inline_asm prvStartFirstTask
+static void prvStartFirstTask( void )
+{
+#ifndef __CDT_PARSER__
+
+    /* When starting the scheduler there is nothing that needs moving to the
+     * interrupt stack because the function is not called from an interrupt.
+     * Just ensure the current stack is the user stack. */
+    SETPSW U
+
+
+    /* Obtain the location of the stack associated with which ever task
+     * pxCurrentTCB is currently pointing to. */
+    MOV.L # _pxCurrentTCB, R15
+    MOV.L [ R15 ], R15
+    MOV.L [ R15 ], R0
+
+
+    /* Restore the registers from the stack of the task pointed to by
+     * pxCurrentTCB. */
+
+    #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
+
+        /* The restored ulPortTaskHasDPFPUContext is to be zero here.
+         * So, it is never necessary to restore the DPFPU context here. */
+        POP R15
+        MOV.L # _ulPortTaskHasDPFPUContext, R14
+        MOV.L R15, [ R14 ]
+
+    #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
+
+        /* Restore the DPFPU context. */
+        DPOPM.L DPSW-DECNT
+        DPOPM.D DR0-DR15
+
+    #endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
+
+    POP R15
+
+    /* Accumulator low 32 bits. */
+    MVTACLO R15, A0
+    POP R15
+
+    /* Accumulator high 32 bits. */
+    MVTACHI R15, A0
+    POP R15
+
+    /* Accumulator guard. */
+    MVTACGU R15, A0
+    POP R15
+
+    /* Accumulator low 32 bits. */
+    MVTACLO R15, A1
+    POP R15
+
+    /* Accumulator high 32 bits. */
+    MVTACHI R15, A1
+    POP R15
+
+    /* Accumulator guard. */
+    MVTACGU R15, A1
+    POP R15
+
+    /* Floating point status word. */
+    MVTC R15, FPSW
+
+    /* R1 to R15 - R0 is not included as it is the SP. */
+    POPM R1-R15
+
+    /* This pops the remaining registers. */
+    RTE
+    NOP
+    NOP
+
+#endif /* ifndef __CDT_PARSER__ */
+}
+/*-----------------------------------------------------------*/
+
+void vSoftwareInterruptISR( void )
+{
+    prvYieldHandler();
+}
+/*-----------------------------------------------------------*/
+
+#pragma inline_asm prvYieldHandler
+static void prvYieldHandler( void )
+{
+#ifndef __CDT_PARSER__
+
+    /* Re-enable interrupts. */
+    SETPSW I
+
+
+    /* Move the data that was automatically pushed onto the interrupt stack when
+     * the interrupt occurred from the interrupt stack to the user stack.
+     *
+     * R15 is saved before it is clobbered. */
+    PUSH.L R15
+
+    /* Read the user stack pointer. */
+    MVFC USP, R15
+
+    /* Move the address down to the data being moved. */
+    SUB # 12, R15
+    MVTC R15, USP
+
+    /* Copy the data across, R15, then PC, then PSW. */
+    MOV.L [ R0 ], [ R15 ]
+    MOV.L 4[ R0 ], 4[ R15 ]
+    MOV.L 8[ R0 ], 8[ R15 ]
+
+    /* Move the interrupt stack pointer to its new correct position. */
+    ADD # 12, R0
+
+    /* All the rest of the registers are saved directly to the user stack. */
+    SETPSW U
+
+    /* Save the rest of the general registers (R15 has been saved already). */
+    PUSHM R1-R14
+
+    /* Save the FPSW and accumulators. */
+    MVFC FPSW, R15
+    PUSH.L R15
+    MVFACGU # 0, A1, R15
+    PUSH.L R15
+    MVFACHI # 0, A1, R15
+    PUSH.L R15
+    MVFACLO # 0, A1, R15 /* Low order word. */
+    PUSH.L R15
+    MVFACGU # 0, A0, R15
+    PUSH.L R15
+    MVFACHI # 0, A0, R15
+    PUSH.L R15
+    MVFACLO # 0, A0, R15 /* Low order word. */
+    PUSH.L R15
+
+    #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
+
+        /* Does the task have a DPFPU context that needs saving?  If
+         * ulPortTaskHasDPFPUContext is 0 then no. */
+        MOV.L # _ulPortTaskHasDPFPUContext, R15
+        MOV.L [ R15 ], R15
+        CMP # 0, R15
+
+        /* Save the DPFPU context, if any. */
+        BEQ.B ?+
+        DPUSHM.D DR0-DR15
+        DPUSHM.L DPSW-DECNT
+        ?:
+
+        /* Save ulPortTaskHasDPFPUContext itself. */
+        PUSH.L R15
+
+    #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
+
+        /* Save the DPFPU context, always. */
+        DPUSHM.D DR0-DR15
+        DPUSHM.L DPSW-DECNT
+
+    #endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
+
+
+    /* Save the stack pointer to the TCB. */
+    MOV.L # _pxCurrentTCB, R15
+    MOV.L [ R15 ], R15
+    MOV.L R0, [ R15 ]
+
+
+    /* Ensure the interrupt mask is set to the syscall priority while the kernel
+     * structures are being accessed. */
+    MVTIPL # configMAX_SYSCALL_INTERRUPT_PRIORITY
+
+    /* Select the next task to run. */
+    BSR.A _vTaskSwitchContext
+
+    /* Reset the interrupt mask as no more data structure access is required. */
+    MVTIPL # configKERNEL_INTERRUPT_PRIORITY
+
+
+    /* Load the stack pointer of the task that is now selected as the Running
+     * state task from its TCB. */
+    MOV.L # _pxCurrentTCB, R15
+    MOV.L [ R15 ], R15
+    MOV.L [ R15 ], R0
+
+
+    /* Restore the context of the new task.  The PSW (Program Status Word) and
+     * PC will be popped by the RTE instruction. */
+
+    #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
+
+        /* Is there a DPFPU context to restore?  If the restored
+         * ulPortTaskHasDPFPUContext is zero then no. */
+        POP R15
+        MOV.L # _ulPortTaskHasDPFPUContext, R14
+        MOV.L R15, [ R14 ]
+        CMP # 0, R15
+
+        /* Restore the DPFPU context, if any. */
+        BEQ.B ?+
+        DPOPM.L DPSW-DECNT
+        DPOPM.D DR0-DR15
+        ?:
+
+    #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
+
+        /* Restore the DPFPU context, always. */
+        DPOPM.L DPSW-DECNT
+        DPOPM.D DR0-DR15
+
+    #endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
+
+    POP R15
+
+    /* Accumulator low 32 bits. */
+    MVTACLO R15, A0
+    POP R15
+
+    /* Accumulator high 32 bits. */
+    MVTACHI R15, A0
+    POP R15
+
+    /* Accumulator guard. */
+    MVTACGU R15, A0
+    POP R15
+
+    /* Accumulator low 32 bits. */
+    MVTACLO R15, A1
+    POP R15
+
+    /* Accumulator high 32 bits. */
+    MVTACHI R15, A1
+    POP R15
+
+    /* Accumulator guard. */
+    MVTACGU R15, A1
+    POP R15
+    MVTC R15, FPSW
+    POPM R1-R15
+    RTE
+    NOP
+    NOP
+
+#endif /* ifndef __CDT_PARSER__ */
+}
+/*-----------------------------------------------------------*/
+
+#pragma interrupt ( vTickISR( vect = _VECT( configTICK_VECTOR ), enable ) )
+void vTickISR( void )
+{
+    /* Increment the tick, and perform any processing the new tick value
+     * necessitates.  Ensure IPL is at the max syscall value first. */
+    set_ipl( configMAX_SYSCALL_INTERRUPT_PRIORITY );
+    {
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            taskYIELD();
+        }
+    }
+    set_ipl( configKERNEL_INTERRUPT_PRIORITY );
+}
+/*-----------------------------------------------------------*/
diff --git a/portable/Renesas/RX700v3_DPFPU/port_asm.src b/portable/Renesas/RX700v3_DPFPU/port_asm.src
new file mode 100644
index 000000000..fe7abe645
--- /dev/null
+++ b/portable/Renesas/RX700v3_DPFPU/port_asm.src
@@ -0,0 +1,41 @@
+;/*
+; * FreeRTOS Kernel V10.4.1
+; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+; *
+; * Permission is hereby granted, free of charge, to any person obtaining a copy of
+; * this software and associated documentation files (the "Software"), to deal in
+; * the Software without restriction, including without limitation the rights to
+; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+; * the Software, and to permit persons to whom the Software is furnished to do so,
+; * subject to the following conditions:
+; *
+; * The above copyright notice and this permission notice shall be included in all
+; * copies or substantial portions of the Software.
+; *
+; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+; *
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
+; *
+; * 1 tab == 4 spaces!
+; */
+		.GLB	_vSoftwareInterruptISR
+		.GLB    _vSoftwareInterruptEntry
+
+		.SECTION   P,CODE
+
+_vSoftwareInterruptEntry:
+
+	BRA	_vSoftwareInterruptISR
+
+		.RVECTOR	27, _vSoftwareInterruptEntry
+
+		.END
+
+
+
diff --git a/portable/Renesas/RX700v3_DPFPU/portmacro.h b/portable/Renesas/RX700v3_DPFPU/portmacro.h
new file mode 100644
index 000000000..f4f92987e
--- /dev/null
+++ b/portable/Renesas/RX700v3_DPFPU/portmacro.h
@@ -0,0 +1,185 @@
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef PORTMACRO_H
+    #define PORTMACRO_H
+
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
+
+/* Hardware specifics. */
+    #include 
+
+/*-----------------------------------------------------------
+ * Port specific definitions.
+ *
+ * The settings in this file configure FreeRTOS correctly for the
+ * given hardware and compiler.
+ *
+ * These settings should not be altered.
+ *-----------------------------------------------------------
+ */
+
+/* When the FIT configurator or the Smart Configurator is used, platform.h has to be 
+ * used. */
+    #ifndef configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H
+        #define configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H 0
+    #endif
+
+/* If configUSE_TASK_DPFPU_SUPPORT is set to 1 (or undefined) then each task will
+ * be created without a DPFPU context, and a task must call vTaskUsesDPFPU() before
+ * making use of any DPFPU registers.  If configUSE_TASK_DPFPU_SUPPORT is set to 2 then
+ * tasks are created with a DPFPU context by default, and calling vTaskUsesDPFPU() has
+ * no effect.  If configUSE_TASK_DPFPU_SUPPORT is set to 0 then tasks never take care
+ * of any DPFPU context (even if DPFPU registers are used). */
+    #ifndef configUSE_TASK_DPFPU_SUPPORT
+        #define configUSE_TASK_DPFPU_SUPPORT 1
+    #endif
+
+/*-----------------------------------------------------------*/
+
+/* Type definitions - these are a bit legacy and not really used now, other than
+ * portSTACK_TYPE and portBASE_TYPE. */
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
+
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
+
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
+
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
+
+/*-----------------------------------------------------------*/
+
+/* Hardware specifics. */
+    #define portBYTE_ALIGNMENT    8     /* Could make four, according to manual. */
+    #define portSTACK_GROWTH      -1
+    #define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portNOP()    nop()
+
+/* Yield equivalent to "*portITU_SWINTR = 0x01; ( void ) *portITU_SWINTR;"
+ * where portITU_SWINTR is the location of the software interrupt register
+ * (0x000872E0).  Don't rely on the assembler to select a register, so instead
+ * save and restore clobbered registers manually. */
+    #pragma inline_asm vPortYield
+    static void vPortYield( void )
+    {
+    #ifndef __CDT_PARSER__
+        /* Save clobbered register - may not actually be necessary if inline asm
+         * functions are considered to use the same rules as function calls by the
+         * compiler. */
+        PUSH.L R5
+        /* Set ITU SWINTR. */
+        MOV.L # 000872E0H, R5
+        MOV.B # 1, [ R5 ]
+        /* Read back to ensure the value is taken before proceeding. */
+        CMP [ R5 ].UB, R5
+        /* Restore clobbered register to its previous value. */
+        POP R5
+    #endif
+    }
+
+    #define portYIELD()                                       vPortYield()
+    #define portYIELD_FROM_ISR( x )                           if( ( x ) != pdFALSE ) portYIELD()
+
+/* These macros should not be called directly, but through the
+ * taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros.  An extra check is
+ * performed if configASSERT() is defined to ensure an assertion handler does not
+ * inadvertently attempt to lower the IPL when the call to assert was triggered
+ * because the IPL value was found to be above	configMAX_SYSCALL_INTERRUPT_PRIORITY
+ * when an ISR safe FreeRTOS API function was executed.  ISR safe FreeRTOS API
+ * functions are those that end in FromISR.  FreeRTOS maintains a separate
+ * interrupt API to ensure API function and interrupt entry is as fast and as
+ * simple as possible. */
+    #define portENABLE_INTERRUPTS()                           set_ipl( ( long ) 0 )
+    #ifdef configASSERT
+        #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()    configASSERT( ( get_ipl() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
+        #define portDISABLE_INTERRUPTS()                      if( get_ipl() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
+    #else
+        #define portDISABLE_INTERRUPTS()                      set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
+    #endif
+
+/* Critical nesting counts are stored in the TCB. */
+    #define portCRITICAL_NESTING_IN_TCB    ( 1 )
+
+/* The critical nesting functions defined within tasks.c. */
+    extern void vTaskEnterCritical( void );
+    extern void vTaskExitCritical( void );
+    #define portENTER_CRITICAL()    vTaskEnterCritical()
+    #define portEXIT_CRITICAL()     vTaskExitCritical()
+
+/* As this port allows interrupt nesting... */
+    #define portSET_INTERRUPT_MASK_FROM_ISR()                              ( UBaseType_t ) get_ipl(); set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus )    set_ipl( ( long ) uxSavedInterruptStatus )
+
+/*-----------------------------------------------------------*/
+
+/* Task function macros as described on the FreeRTOS.org WEB site. */
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
+
+/*-----------------------------------------------------------*/
+
+/* If configUSE_TASK_DPFPU_SUPPORT is set to 1 (or left undefined) then tasks are
+ * created without a DPFPU context and must call vPortTaskUsesDPFPU() to give
+ * themselves a DPFPU context before using any DPFPU instructions.  If
+ * configUSE_TASK_DPFPU_SUPPORT is set to 2 then all tasks will have a DPFPU context
+ * by default. */
+    #if( configUSE_TASK_DPFPU_SUPPORT == 1 )
+        void vPortTaskUsesDPFPU( void );
+    #else
+/* Each task has a DPFPU context already, so define this function away to
+ * nothing to prevent it being called accidentally. */
+        #define vPortTaskUsesDPFPU()
+    #endif
+    #define portTASK_USES_DPFPU() vPortTaskUsesDPFPU()
+
+/* Definition to allow compatibility with existing FreeRTOS Demo using flop.c. */
+    #define portTASK_USES_FLOATING_POINT() vPortTaskUsesDPFPU()
+
+    #ifdef __cplusplus
+        }
+    #endif
+
+#endif /* PORTMACRO_H */
diff --git a/portable/Renesas/SH2A_FPU/ISR_Support.inc b/portable/Renesas/SH2A_FPU/ISR_Support.inc
index 724e3f0d5..d3c63abf5 100644
--- a/portable/Renesas/SH2A_FPU/ISR_Support.inc
+++ b/portable/Renesas/SH2A_FPU/ISR_Support.inc
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/Renesas/SH2A_FPU/port.c b/portable/Renesas/SH2A_FPU/port.c
index c156f2c82..215937d04 100644
--- a/portable/Renesas/SH2A_FPU/port.c
+++ b/portable/Renesas/SH2A_FPU/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/Renesas/SH2A_FPU/portasm.src b/portable/Renesas/SH2A_FPU/portasm.src
index 52371d808..c946ee336 100644
--- a/portable/Renesas/SH2A_FPU/portasm.src
+++ b/portable/Renesas/SH2A_FPU/portasm.src
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/Renesas/SH2A_FPU/portmacro.h b/portable/Renesas/SH2A_FPU/portmacro.h
index f0b803ce8..f660f63be 100644
--- a/portable/Renesas/SH2A_FPU/portmacro.h
+++ b/portable/Renesas/SH2A_FPU/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/Rowley/MSP430F449/port.c b/portable/Rowley/MSP430F449/port.c
index 798e2a13a..7b34d2f17 100644
--- a/portable/Rowley/MSP430F449/port.c
+++ b/portable/Rowley/MSP430F449/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/Rowley/MSP430F449/portasm.h b/portable/Rowley/MSP430F449/portasm.h
index 0fd15cda7..390350457 100644
--- a/portable/Rowley/MSP430F449/portasm.h
+++ b/portable/Rowley/MSP430F449/portasm.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/Rowley/MSP430F449/portext.asm b/portable/Rowley/MSP430F449/portext.asm
index 4dbbc5a61..2e7942c64 100644
--- a/portable/Rowley/MSP430F449/portext.asm
+++ b/portable/Rowley/MSP430F449/portext.asm
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/Rowley/MSP430F449/portmacro.h b/portable/Rowley/MSP430F449/portmacro.h
index 42f1d86af..2288108db 100644
--- a/portable/Rowley/MSP430F449/portmacro.h
+++ b/portable/Rowley/MSP430F449/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/SDCC/Cygnal/port.c b/portable/SDCC/Cygnal/port.c
index d53e473b8..62c0ab936 100644
--- a/portable/SDCC/Cygnal/port.c
+++ b/portable/SDCC/Cygnal/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/SDCC/Cygnal/portmacro.h b/portable/SDCC/Cygnal/portmacro.h
index 978bcd2ea..2d4280893 100644
--- a/portable/SDCC/Cygnal/portmacro.h
+++ b/portable/SDCC/Cygnal/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/Softune/MB91460/port.c b/portable/Softune/MB91460/port.c
index 0f09f40c2..73d13a007 100644
--- a/portable/Softune/MB91460/port.c
+++ b/portable/Softune/MB91460/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/Softune/MB91460/portmacro.h b/portable/Softune/MB91460/portmacro.h
index d6ef265e6..07a7779a3 100644
--- a/portable/Softune/MB91460/portmacro.h
+++ b/portable/Softune/MB91460/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/Softune/MB96340/port.c b/portable/Softune/MB96340/port.c
index f7cf2c8b9..e6e2f2b67 100644
--- a/portable/Softune/MB96340/port.c
+++ b/portable/Softune/MB96340/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/Softune/MB96340/portmacro.h b/portable/Softune/MB96340/portmacro.h
index 7b27f51cd..2f3bb0eca 100644
--- a/portable/Softune/MB96340/portmacro.h
+++ b/portable/Softune/MB96340/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/Tasking/ARM_CM4F/port.c b/portable/Tasking/ARM_CM4F/port.c
index d4ac309f1..e37b72acf 100644
--- a/portable/Tasking/ARM_CM4F/port.c
+++ b/portable/Tasking/ARM_CM4F/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,60 +19,59 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------
- * Implementation of functions defined in portable.h for the ARM CM4F port.
- *----------------------------------------------------------*/
+* Implementation of functions defined in portable.h for the ARM CM4F port.
+*----------------------------------------------------------*/
 
 /* Scheduler includes. */
 #include "FreeRTOS.h"
 #include "task.h"
 
 /* Constants required to manipulate the NVIC. */
-#define portNVIC_SYSTICK_CTRL		( ( volatile uint32_t * ) 0xe000e010 )
-#define portNVIC_SYSTICK_LOAD		( ( volatile uint32_t * ) 0xe000e014 )
-#define portNVIC_SYSPRI2			( ( volatile uint32_t * ) 0xe000ed20 )
-#define portNVIC_SYSTICK_CLK		0x00000004
-#define portNVIC_SYSTICK_INT		0x00000002
-#define portNVIC_SYSTICK_ENABLE		0x00000001
-#define portNVIC_PENDSV_PRI			( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )
-#define portNVIC_SYSTICK_PRI		( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )
+#define portNVIC_SYSTICK_CTRL       ( ( volatile uint32_t * ) 0xe000e010 )
+#define portNVIC_SYSTICK_LOAD       ( ( volatile uint32_t * ) 0xe000e014 )
+#define portNVIC_SHPR3_REG          ( ( volatile uint32_t * ) 0xe000ed20 )
+#define portNVIC_SYSTICK_CLK        0x00000004
+#define portNVIC_SYSTICK_INT        0x00000002
+#define portNVIC_SYSTICK_ENABLE     0x00000001
+#define portNVIC_PENDSV_PRI         ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )
+#define portNVIC_SYSTICK_PRI        ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )
 
 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
-#define portVECTACTIVE_MASK			( 0xFFUL )
+#define portVECTACTIVE_MASK         ( 0xFFUL )
 
 /* Constants required to manipulate the VFP. */
-#define portFPCCR					( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
-#define portASPEN_AND_LSPEN_BITS	( 0x3UL << 30UL )
+#define portFPCCR                   ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
+#define portASPEN_AND_LSPEN_BITS    ( 0x3UL << 30UL )
 
 /* Constants required to set up the initial stack. */
-#define portINITIAL_XPSR			( 0x01000000 )
-#define portINITIAL_EXC_RETURN		( 0xfffffffd )
+#define portINITIAL_XPSR            ( 0x01000000 )
+#define portINITIAL_EXC_RETURN      ( 0xfffffffd )
 
 /* Let the user override the pre-loading of the initial LR with the address of
-prvTaskExitError() in case it messes up unwinding of the stack in the
-debugger. */
+ * prvTaskExitError() in case it messes up unwinding of the stack in the
+ * debugger. */
 #ifdef configTASK_RETURN_ADDRESS
-	#define portTASK_RETURN_ADDRESS	configTASK_RETURN_ADDRESS
+    #define portTASK_RETURN_ADDRESS    configTASK_RETURN_ADDRESS
 #else
-	#define portTASK_RETURN_ADDRESS	prvTaskExitError
+    #define portTASK_RETURN_ADDRESS    prvTaskExitError
 #endif
 
 /* For strict compliance with the Cortex-M spec the task start address should
-have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
-#define portSTART_ADDRESS_MASK				( ( StackType_t ) 0xfffffffeUL )
+ * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
+#define portSTART_ADDRESS_MASK    ( ( StackType_t ) 0xfffffffeUL )
 
 /* The priority used by the kernel is assigned to a variable to make access
-from inline assembler easier. */
+ * from inline assembler easier. */
 const uint32_t ulKernelPriority = configKERNEL_INTERRUPT_PRIORITY;
 
 /* Each task maintains its own interrupt status in the critical nesting
-variable. */
+ * variable. */
 static uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
 
 /*
@@ -97,7 +96,7 @@ extern void vPortStartFirstTask( void );
 static void prvTaskExitError( void );
 
 /* This exists purely to allow the const to be used from within the
-port_asm.asm assembly file. */
+ * port_asm.asm assembly file. */
 const uint32_t ulMaxSyscallInterruptPriorityConst = configMAX_SYSCALL_INTERRUPT_PRIORITY;
 
 /*-----------------------------------------------------------*/
@@ -105,47 +104,52 @@ const uint32_t ulMaxSyscallInterruptPriorityConst = configMAX_SYSCALL_INTERRUPT_
 /*
  * See header file for description.
  */
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
 {
-	/* Simulate the stack frame as it would be created by a context switch
-	interrupt. */
+    /* Simulate the stack frame as it would be created by a context switch
+     * interrupt. */
 
-	/* Offset added to account for the way the MCU uses the stack on entry/exit
-	of interrupts, and to ensure alignment. */
-	pxTopOfStack--;
+    /* Offset added to account for the way the MCU uses the stack on entry/exit
+     * of interrupts, and to ensure alignment. */
+    pxTopOfStack--;
 
-	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
-	pxTopOfStack--;
-	*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;	/* PC */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
+    *pxTopOfStack = portINITIAL_XPSR;                                    /* xPSR */
+    pxTopOfStack--;
+    *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;             /* LR */
 
-	/* Save code space by skipping register initialisation. */
-	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
-	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
+    /* Save code space by skipping register initialisation. */
+    pxTopOfStack -= 5;                            /* R12, R3, R2 and R1. */
+    *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
 
-	/* A save method is being used that requires each task to maintain its
-	own exec return value. */
-	pxTopOfStack--;
-	*pxTopOfStack = portINITIAL_EXC_RETURN;
+    /* A save method is being used that requires each task to maintain its
+     * own exec return value. */
+    pxTopOfStack--;
+    *pxTopOfStack = portINITIAL_EXC_RETURN;
 
-	pxTopOfStack -= 8;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
+    pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
 
-	return pxTopOfStack;
+    return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 static void prvTaskExitError( void )
 {
-	/* A function that implements a task must not exit or attempt to return to
-	its caller as there is nothing to return to.  If a task wants to exit it
-	should instead call vTaskDelete( NULL ).
+    /* A function that implements a task must not exit or attempt to return to
+     * its caller as there is nothing to return to.  If a task wants to exit it
+     * should instead call vTaskDelete( NULL ).
+     *
+     * Artificially force an assert() to be triggered if configASSERT() is
+     * defined, then stop here so application writers can catch the error. */
+    configASSERT( ulCriticalNesting == ~0UL );
+    portDISABLE_INTERRUPTS();
 
-	Artificially force an assert() to be triggered if configASSERT() is
-	defined, then stop here so application writers can catch the error. */
-	configASSERT( ulCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
-	for( ;; );
+    for( ; ; )
+    {
+    }
 }
 /*-----------------------------------------------------------*/
 
@@ -154,98 +158,99 @@ static void prvTaskExitError( void )
  */
 BaseType_t xPortStartScheduler( void )
 {
-	/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
-	See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
-	configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) );
+    /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
+     * See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
+    configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) );
 
-	/* Make PendSV and SysTick the lowest priority interrupts. */
-	*(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
-	*(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;
+    /* Make PendSV and SysTick the lowest priority interrupts. */
+    *( portNVIC_SHPR3_REG ) |= portNVIC_PENDSV_PRI;
+    *( portNVIC_SHPR3_REG ) |= portNVIC_SYSTICK_PRI;
 
-	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-	here already. */
-	prvSetupTimerInterrupt();
+    /* Start the timer that generates the tick ISR.  Interrupts are disabled
+     * here already. */
+    prvSetupTimerInterrupt();
 
-	/* Initialise the critical nesting count ready for the first task. */
-	ulCriticalNesting = 0;
+    /* Initialise the critical nesting count ready for the first task. */
+    ulCriticalNesting = 0;
 
-	/* Ensure the VFP is enabled - it should be anyway. */
-	vPortEnableVFP();
+    /* Ensure the VFP is enabled - it should be anyway. */
+    vPortEnableVFP();
 
-	/* Lazy save always. */
-	*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
+    /* Lazy save always. */
+    *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
 
-	/* Start the first task. */
-	vPortStartFirstTask();
+    /* Start the first task. */
+    vPortStartFirstTask();
 
-	/* Should not get here! */
-	return 0;
+    /* Should not get here! */
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void )
 {
-	/* Not implemented in ports where there is nothing to return to.
-	Artificially force an assert. */
-	configASSERT( ulCriticalNesting == 1000UL );
+    /* Not implemented in ports where there is nothing to return to.
+     * Artificially force an assert. */
+    configASSERT( ulCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
 
 void vPortYield( void )
 {
-	/* Set a PendSV to request a context switch. */
-	*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
+    /* Set a PendSV to request a context switch. */
+    *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
 
-	/* Barriers are normally not required but do ensure the code is completely
-	within the specified behaviour for the architecture. */
-	__DSB();
-	__ISB();
+    /* Barriers are normally not required but do ensure the code is completely
+     * within the specified behaviour for the architecture. */
+    __DSB();
+    __ISB();
 }
 /*-----------------------------------------------------------*/
 
 void vPortEnterCritical( void )
 {
-	portDISABLE_INTERRUPTS();
-	ulCriticalNesting++;
-	__DSB();
-	__ISB();
+    portDISABLE_INTERRUPTS();
+    ulCriticalNesting++;
+    __DSB();
+    __ISB();
 
-	/* This is not the interrupt safe version of the enter critical function so
-	assert() if it is being called from an interrupt context.  Only API
-	functions that end in "FromISR" can be used in an interrupt.  Only assert if
-	the critical nesting count is 1 to protect against recursive calls if the
-	assert function also uses a critical section. */
-	if( ulCriticalNesting == 1 )
-	{
-		configASSERT( ( ( *(portNVIC_INT_CTRL) ) & portVECTACTIVE_MASK ) == 0 );
-	}
+    /* This is not the interrupt safe version of the enter critical function so
+     * assert() if it is being called from an interrupt context.  Only API
+     * functions that end in "FromISR" can be used in an interrupt.  Only assert if
+     * the critical nesting count is 1 to protect against recursive calls if the
+     * assert function also uses a critical section. */
+    if( ulCriticalNesting == 1 )
+    {
+        configASSERT( ( ( *( portNVIC_INT_CTRL ) ) & portVECTACTIVE_MASK ) == 0 );
+    }
 }
 /*-----------------------------------------------------------*/
 
 void vPortExitCritical( void )
 {
-	configASSERT( ulCriticalNesting );
-	ulCriticalNesting--;
-	if( ulCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
+    configASSERT( ulCriticalNesting );
+    ulCriticalNesting--;
+
+    if( ulCriticalNesting == 0 )
+    {
+        portENABLE_INTERRUPTS();
+    }
 }
 /*-----------------------------------------------------------*/
 
 void SysTick_Handler( void )
 {
-uint32_t ulDummy;
+    uint32_t ulDummy;
 
-	ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* Pend a context switch. */
-			*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
+    ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
+    {
+        if( xTaskIncrementTick() != pdFALSE )
+        {
+            /* Pend a context switch. */
+            *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
+        }
+    }
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
 }
 /*-----------------------------------------------------------*/
 
@@ -255,9 +260,8 @@ uint32_t ulDummy;
  */
 void prvSetupTimerInterrupt( void )
 {
-	/* Configure SysTick to interrupt at the requested rate. */
-	*(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	*(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
+    /* Configure SysTick to interrupt at the requested rate. */
+    *( portNVIC_SYSTICK_LOAD ) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+    *( portNVIC_SYSTICK_CTRL ) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
 }
 /*-----------------------------------------------------------*/
-
diff --git a/portable/Tasking/ARM_CM4F/port_asm.asm b/portable/Tasking/ARM_CM4F/port_asm.asm
index aa873a25f..9106c8a36 100644
--- a/portable/Tasking/ARM_CM4F/port_asm.asm
+++ b/portable/Tasking/ARM_CM4F/port_asm.asm
@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.4.1
 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ; *
-; * http://www.FreeRTOS.org
-; * http://aws.amazon.com/freertos
+; * https://www.FreeRTOS.org
+; * https://github.com/FreeRTOS
 ; *
 ; * 1 tab == 4 spaces!
 ; */
diff --git a/portable/Tasking/ARM_CM4F/portmacro.h b/portable/Tasking/ARM_CM4F/portmacro.h
index 1f8860c71..9666c6d9b 100644
--- a/portable/Tasking/ARM_CM4F/portmacro.h
+++ b/portable/Tasking/ARM_CM4F/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,19 +19,19 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
 
 
 #ifndef PORTMACRO_H
-#define PORTMACRO_H
+    #define PORTMACRO_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -44,47 +44,47 @@ extern "C" {
  */
 
 /* Type definitions. */
-#define portCHAR		char
-#define portFLOAT		float
-#define portDOUBLE		double
-#define portLONG		long
-#define portSHORT		short
-#define portSTACK_TYPE	uint32_t
-#define portBASE_TYPE	long
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    uint32_t
+    #define portBASE_TYPE     long
 
-typedef portSTACK_TYPE StackType_t;
-typedef long BaseType_t;
-typedef unsigned long UBaseType_t;
+    typedef portSTACK_TYPE   StackType_t;
+    typedef long             BaseType_t;
+    typedef unsigned long    UBaseType_t;
 
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t     TickType_t;
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC 1
-#endif
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+ * not need to be guarded with a critical section. */
+        #define portTICK_TYPE_IS_ATOMIC    1
+    #endif
 /*-----------------------------------------------------------*/
 
 /* Architecture specifics. */
-#define portSTACK_GROWTH			( -1 )
-#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT			8
+    #define portSTACK_GROWTH      ( -1 )
+    #define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT    8
 /*-----------------------------------------------------------*/
 
 
 /* Scheduler utilities. */
-extern void vPortYield( void );
-#define portNVIC_INT_CTRL			( ( volatile uint32_t * ) 0xe000ed04 )
-#define portNVIC_PENDSVSET			0x10000000
-#define portYIELD()					vPortYield()
+    extern void vPortYield( void );
+    #define portNVIC_INT_CTRL     ( ( volatile uint32_t * ) 0xe000ed04 )
+    #define portNVIC_PENDSVSET    0x10000000
+    #define portYIELD()                                 vPortYield()
 
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET
-#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
 
@@ -94,40 +94,39 @@ extern void vPortYield( void );
  * Set basepri to portMAX_SYSCALL_INTERRUPT_PRIORITY without effecting other
  * registers.  r0 is clobbered.
  */
-#define portSET_INTERRUPT_MASK() __set_BASEPRI( configMAX_SYSCALL_INTERRUPT_PRIORITY )
+    #define portSET_INTERRUPT_MASK()      __set_BASEPRI( configMAX_SYSCALL_INTERRUPT_PRIORITY )
 
 /*
  * Set basepri back to 0 without effective other registers.
  * r0 is clobbered.  FAQ:  Setting BASEPRI to 0 is not a bug.  Please see
- * http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before disagreeing.
+ * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before disagreeing.
  */
-#define portCLEAR_INTERRUPT_MASK() __set_BASEPRI( 0 )
+    #define portCLEAR_INTERRUPT_MASK()    __set_BASEPRI( 0 )
 
-extern uint32_t ulPortSetInterruptMask( void );
-extern void vPortClearInterruptMask( uint32_t ulNewMask );
-#define portSET_INTERRUPT_MASK_FROM_ISR()		ulPortSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)	vPortClearInterruptMask( x )
+    extern uint32_t ulPortSetInterruptMask( void );
+    extern void vPortClearInterruptMask( uint32_t ulNewMask );
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulPortSetInterruptMask()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vPortClearInterruptMask( x )
 
 
-extern void vPortEnterCritical( void );
-extern void vPortExitCritical( void );
+    extern void vPortEnterCritical( void );
+    extern void vPortExitCritical( void );
 
-#define portDISABLE_INTERRUPTS()	portSET_INTERRUPT_MASK()
-#define portENABLE_INTERRUPTS()		portCLEAR_INTERRUPT_MASK()
-#define portENTER_CRITICAL()		vPortEnterCritical()
-#define portEXIT_CRITICAL()			vPortExitCritical()
+    #define portDISABLE_INTERRUPTS()    portSET_INTERRUPT_MASK()
+    #define portENABLE_INTERRUPTS()     portCLEAR_INTERRUPT_MASK()
+    #define portENTER_CRITICAL()        vPortEnterCritical()
+    #define portEXIT_CRITICAL()         vPortExitCritical()
 
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site. */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 
-#define portNOP()
+    #define portNOP()
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* PORTMACRO_H */
-
diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c
index cefd2aa3e..8c15ae6d7 100644
--- a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c
+++ b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c
@@ -1,6 +1,6 @@
 /*
- * FreeRTOS Kernel V10.2.1
- * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Synopsys, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -30,23 +30,22 @@
  * \brief   exception processing for freertos
  */
 
-// #include "embARC.h"
+/* #include "embARC.h" */
 
 #include "arc_freertos_exceptions.h"
 
 #ifdef __GNU__
-extern void gnu_printf_setup(void);
+    extern void gnu_printf_setup( void );
 #endif
+
 /**
  * \brief  freertos related cpu exception initialization, all the interrupts handled by freertos must be not
  * fast irqs. If fiq is needed, please install the default firq_exc_entry or your own fast irq entry into
  * the specific interrupt exception.
  */
-void freertos_exc_init(void)
+void freertos_exc_init( void )
 {
-
-#ifdef __GNU__
-    gnu_printf_setup();
-#endif
-
+    #ifdef __GNU__
+        gnu_printf_setup();
+    #endif
 }
diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h
index ae398f4f6..a56adbbd8 100644
--- a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h
+++ b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h
@@ -1,6 +1,6 @@
 /*
- * FreeRTOS Kernel V10.2.1
- * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Synopsys, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -32,14 +32,14 @@
  * here, all arc cpu exceptions share the same entry, also for all interrupt
  * exceptions
  */
-extern void exc_entry_cpu(void);    /* cpu exception entry for freertos */
-extern void exc_entry_int(void);    /* int exception entry for freertos */
+extern void exc_entry_cpu( void ); /* cpu exception entry for freertos */
+extern void exc_entry_int( void ); /* int exception entry for freertos */
 
 /* task dispatch functions in .s */
-extern void start_r(void);
+extern void start_r( void );
 extern void start_dispatch();
 extern void dispatch();
 
-extern void freertos_exc_init(void);
+extern void freertos_exc_init( void );
 
-#endif  /* ARC_FREERTOS_EXCEPTIONS_H */
+#endif /* ARC_FREERTOS_EXCEPTIONS_H */
diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s b/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s
index 27aa5fef7..4f4fb5ef1 100644
--- a/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s
+++ b/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s
@@ -1,6 +1,6 @@
 /*
- * FreeRTOS Kernel V10.2.1
- * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Synopsys, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c b/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c
index 0d24c3c17..4b8a53fdc 100644
--- a/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c
+++ b/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c
@@ -1,6 +1,6 @@
 /*
- * FreeRTOS Kernel V10.2.1
- * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Synopsys, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -19,187 +19,220 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
-#if defined(__MW__)
+#if defined( __MW__ )
 
-#include 
-#include 
-#include 
+    #include 
+    #include 
+    #include 
 
-#include "FreeRTOS.h"
+    #include "FreeRTOS.h"
 
-#include "queue.h"
-#include "semphr.h"
-#include "task.h"
+    #include "queue.h"
+    #include "semphr.h"
+    #include "task.h"
 
-#include "arc/arc_exception.h"
-#include "embARC_toolchain.h"
-#include "embARC_debug.h"
+    #include "arc/arc_exception.h"
+    #include "embARC_toolchain.h"
+    #include "embARC_debug.h"
 
-#ifdef ENABLE_FREERTOS_TLS_DEBUG
-#define TLS_DEBUG(fmt, ...)	EMBARC_PRINTF(fmt, ##__VA_ARGS__)
-#else
-#define TLS_DEBUG(fmt, ...)
-#endif
+    #ifdef ENABLE_FREERTOS_TLS_DEBUG
+        #define TLS_DEBUG( fmt, ... )    EMBARC_PRINTF( fmt, ## __VA_ARGS__ )
+    #else
+        #define TLS_DEBUG( fmt, ... )
+    #endif
 
 /*
  * Runtime routines to execute constructors and
  * destructors for task local storage.
  */
-extern void __mw_run_tls_dtor();
-extern void __mw_run_tls_ctor();
+    extern void __mw_run_tls_dtor();
+    extern void __mw_run_tls_ctor();
+
+    extern uint32_t exc_nest_count;
 
 /*
  * Linker generated symbols to mark .tls section addresses
  * first byte .. last byte
  */
-extern char _ftls[], _etls[];
-#pragma weak _ftls
-#pragma weak _etls
+    extern char _ftls[], _etls[];
+    #pragma weak _ftls
+    #pragma weak _etls
 
-void executable_requires_tls_section(void)
-{
-#if _ARC
-	for (;;) {
-		_flag(1);
-		_nop();
-		_nop();
-		_nop();
-		_nop();
-		_nop();
-	}
-#endif
-}
-#pragma off_inline(executable_requires_tls_section);
-#pragma alias(executable_requires_tls_section, "executable_requires_.tls_section");
+    void executable_requires_tls_section( void )
+    {
+        #if _ARC
+            for( ; ; )
+            {
+                _flag( 1 );
+                _nop();
+                _nop();
+                _nop();
+                _nop();
+                _nop();
+            }
+        #endif
+    }
+    #pragma off_inline(executable_requires_tls_section);
+    #pragma alias(executable_requires_tls_section, "executable_requires_.tls_section");
 
-static void* init_task_tls(void)
-{
-	uint32_t len = (uint32_t)(_etls - _ftls);
-	void *tls = NULL;
+    static void * init_task_tls( void )
+    {
+        uint32_t len = ( uint32_t ) ( _etls - _ftls );
+        void * tls = NULL;
 
-#if FREERTOS_HEAP_SEL == 3
-	#warning "FreeRTOS TLS support is not compatible with heap 3 solution(FREERTOS_HEAP_SEL=3)!"
-	#warning "You can change FREERTOS_HEAP_SEL in freertos.mk to select other heap solution."
-#else
-	tls = pvPortMalloc(len);
-#endif
-	if (tls) {
-		TLS_DEBUG("Malloc task tls:%dbytes\r\n", len);
-		memcpy(tls, _ftls, len);
-		__mw_run_tls_ctor();	// Run constructors
-	}
-	return tls;
-}
+        #if FREERTOS_HEAP_SEL == 3
+        #warning "FreeRTOS TLS support is not compatible with heap 3 solution(FREERTOS_HEAP_SEL=3)!"
+        #warning "You can change FREERTOS_HEAP_SEL in freertos.mk to select other heap solution."
+        #else
+            tls = pvPortMalloc( len );
+        #endif
 
-static void free_task_tls(void *pxTCB)
-{
-	TaskHandle_t task2free = (TaskHandle_t)pxTCB;
+        if( tls )
+        {
+            TLS_DEBUG( "Malloc task tls:%dbytes\r\n", len );
+            memcpy( tls, _ftls, len );
+            __mw_run_tls_ctor(); /* Run constructors */
+        }
 
-	if (task2free != NULL) {
-		void *tls = pvTaskGetThreadLocalStoragePointer(task2free, 0);
-		if (tls) {
-			TLS_DEBUG("Free task tls\r\n");
-			__mw_run_tls_dtor();
-			vPortFree(tls);
-			vTaskSetThreadLocalStoragePointer(task2free, 0, NULL);
-		}
-	}
-}
+        return tls;
+    }
 
-void task_end_hook(void *pxTCB)
-{
-	free_task_tls(pxTCB);
-}
+    static void free_task_tls( void * pxTCB )
+    {
+        TaskHandle_t task2free = ( TaskHandle_t ) pxTCB;
 
-static void* get_isr_tls(void)
-{
-	// In an ISR
-	static int first = 1;
-	if (_Rarely(first)) {
-		first = 0;
-		__mw_run_tls_ctor();	// Run constructors
-	}
-	return (void *)_ftls;
-}
-#pragma off_inline(get_isr_tls)
+        if( task2free != NULL )
+        {
+            void * tls = pvTaskGetThreadLocalStoragePointer( task2free, 0 );
 
-static void* get_task_tls(void)
-{
-	TaskHandle_t cur_task;
+            if( tls )
+            {
+                TLS_DEBUG( "Free task tls\r\n" );
+                __mw_run_tls_dtor();
+                vPortFree( tls );
+                vTaskSetThreadLocalStoragePointer( task2free, 0, NULL );
+            }
+        }
+    }
 
-	cur_task = xTaskGetCurrentTaskHandle();
-	if (cur_task == NULL) return get_isr_tls();
-	void *tls = pvTaskGetThreadLocalStoragePointer(cur_task, 0);
-	if (tls == NULL) {
-		tls = init_task_tls();
-		if (tls) {
-			vTaskSetThreadLocalStoragePointer(cur_task, 0, tls);
-		} else {
-			tls = get_isr_tls();
-		}
-	}
-	return tls;
-}
-#pragma off_inline(get_task_tls)
+    void task_end_hook( void * pxTCB )
+    {
+        free_task_tls( pxTCB );
+    }
 
-#if _ARC /* for ARC XCALLs need to preserve flags */
-	extern void * _Preserve_flags _mwget_tls(void);
-#endif
+    static void * get_isr_tls( void )
+    {
+        /* In an ISR */
+        static int first = 1;
+
+        if( _Rarely( first ) )
+        {
+            first = 0;
+            __mw_run_tls_ctor(); /* Run constructors */
+        }
+
+        return ( void * ) _ftls;
+    }
+    #pragma off_inline(get_isr_tls)
+
+    static void * get_task_tls( void )
+    {
+        TaskHandle_t cur_task;
+
+        cur_task = xTaskGetCurrentTaskHandle();
+
+        if( cur_task == NULL )
+        {
+            return get_isr_tls();
+        }
+
+        void * tls = pvTaskGetThreadLocalStoragePointer( cur_task, 0 );
+
+        if( tls == NULL )
+        {
+            tls = init_task_tls();
+
+            if( tls )
+            {
+                vTaskSetThreadLocalStoragePointer( cur_task, 0, tls );
+            }
+            else
+            {
+                tls = get_isr_tls();
+            }
+        }
+
+        return tls;
+    }
+    #pragma off_inline(get_task_tls)
+
+    #if _ARC /* for ARC XCALLs need to preserve flags */
+        extern void * _Preserve_flags _mwget_tls( void );
+    #endif
 
 /*
  * Back end gens calls to find local data for this task
  */
-void* _mwget_tls(void)
-{
-	if (_ftls == (char *)0) {
-		executable_requires_tls_section();
-	}
-	if (exc_sense()) { /* In ISR */
-		return get_isr_tls();
-	} else { /* In Task */
-		return get_task_tls();
-	}
-}
+    void * _mwget_tls( void )
+    {
+        if( _ftls == ( char * ) 0 )
+        {
+            executable_requires_tls_section();
+        }
+
+        if( exc_nest_count > 0 ) /* In ISR */
+        {
+            return get_isr_tls();
+        }
+        else /* In Task */
+        {
+            return get_task_tls();
+        }
+    }
 
 
-// simple interface of thread safe
-typedef xSemaphoreHandle _lock_t;
-#if configUSE_RECURSIVE_MUTEXES != 1
-#error "configUSE_RECURSIVE_MUTEXES in FreeRTOSConfig.h need to 1"
-#endif
+/* simple interface of thread safe */
+    typedef xSemaphoreHandle _lock_t;
+    #if configUSE_RECURSIVE_MUTEXES != 1
+        #error "configUSE_RECURSIVE_MUTEXES in FreeRTOSConfig.h need to 1"
+    #endif
 
-void _mwmutex_create(_lock_t *mutex_ptr)
-{
-	*mutex_ptr = xSemaphoreCreateRecursiveMutex();
-}
+    void _mwmutex_create( _lock_t * mutex_ptr )
+    {
+        *mutex_ptr = xSemaphoreCreateRecursiveMutex();
+    }
 
-void _mwmutex_delete(_lock_t *mutex_ptr)
-{
-	if ((*mutex_ptr) != NULL) {
-		vSemaphoreDelete(*mutex_ptr);
-	}
-}
+    void _mwmutex_delete( _lock_t * mutex_ptr )
+    {
+        if( ( *mutex_ptr ) != NULL )
+        {
+            vSemaphoreDelete( *mutex_ptr );
+        }
+    }
 
-void _mwmutex_lock(_lock_t mutex)
-{
-	if ((mutex) != NULL) {
-		while (xSemaphoreTakeRecursive(mutex, portMAX_DELAY) != pdTRUE);
-	}
-}
+    void _mwmutex_lock( _lock_t mutex )
+    {
+        if( ( mutex ) != NULL )
+        {
+            while( xSemaphoreTakeRecursive( mutex, portMAX_DELAY ) != pdTRUE )
+            {
+            }
+        }
+    }
 
-void _mwmutex_unlock(_lock_t mutex)
-{
-	if ((mutex) != NULL) {
-		xSemaphoreGiveRecursive(mutex);
-	}
-}
+    void _mwmutex_unlock( _lock_t mutex )
+    {
+        if( ( mutex ) != NULL )
+        {
+            xSemaphoreGiveRecursive( mutex );
+        }
+    }
 
-#else
+#else /* if defined( __MW__ ) */
 
 #endif /* __MW__ */
diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/port.c b/portable/ThirdParty/GCC/ARC_EM_HS/port.c
index 06f65ccef..af58b052a 100644
--- a/portable/ThirdParty/GCC/ARC_EM_HS/port.c
+++ b/portable/ThirdParty/GCC/ARC_EM_HS/port.c
@@ -1,6 +1,6 @@
 /*
- * FreeRTOS Kernel V10.2.1
- * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Synopsys, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -19,10 +19,9 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*
@@ -40,40 +39,50 @@
 #include "arc_freertos_exceptions.h"
 
 volatile unsigned int ulCriticalNesting = 999UL;
-volatile unsigned int context_switch_reqflg;	/* task context switch request flag in exceptions and interrupts handling */
+volatile unsigned int context_switch_reqflg; /* task context switch request flag in exceptions and interrupts handling */
 
+/**
+ * \var exc_nest_count
+ * \brief the counter for exc/int processing, =0 no int/exc
+ * >1 in int/exc processing
+ * @}
+ */
+uint32_t exc_nest_count;
 /* --------------------------------------------------------------------------*/
+
 /**
  * @brief kernel tick interrupt handler of freertos
  */
 /* ----------------------------------------------------------------------------*/
-static void vKernelTick( void *ptr )
+static void vKernelTick( void * ptr )
 {
-	/* clear timer interrupt */
-	timer_int_clear(BOARD_OS_TIMER_ID);
-	board_timer_update(configTICK_RATE_HZ);
+    /* clear timer interrupt */
+    arc_timer_int_clear( BOARD_OS_TIMER_ID );
+    board_timer_update( configTICK_RATE_HZ );
 
-	if (xTaskIncrementTick()) {
-		portYIELD_FROM_ISR();	/* need to make task switch */
-	}
+    if( xTaskIncrementTick() )
+    {
+        portYIELD_FROM_ISR(); /* need to make task switch */
+    }
 }
 
 /* --------------------------------------------------------------------------*/
+
 /**
  * @brief  setup freertos kernel tick
  */
 /* ----------------------------------------------------------------------------*/
-static void prvSetupTimerInterrupt(void)
+static void prvSetupTimerInterrupt( void )
 {
-	unsigned int cyc = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
+    unsigned int cyc = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
 
-	int_disable(BOARD_OS_TIMER_INTNO); /* disable os timer interrupt */
-	timer_stop(BOARD_OS_TIMER_ID);
-	timer_start(BOARD_OS_TIMER_ID, TIMER_CTRL_IE | TIMER_CTRL_NH, cyc);
+    int_disable( BOARD_OS_TIMER_INTNO ); /* disable os timer interrupt */
+    arc_timer_stop( BOARD_OS_TIMER_ID );
+    arc_timer_start( BOARD_OS_TIMER_ID, TIMER_CTRL_IE | TIMER_CTRL_NH, cyc );
 
-	int_handler_install(BOARD_OS_TIMER_INTNO, (INT_HANDLER_T)vKernelTick);
-	int_pri_set(BOARD_OS_TIMER_INTNO, INT_PRI_MIN);
-	int_enable(BOARD_OS_TIMER_INTNO);
+    int_handler_install( BOARD_OS_TIMER_INTNO, ( INT_HANDLER_T ) vKernelTick );
+    int_pri_set( BOARD_OS_TIMER_INTNO, INT_PRI_MIN );
+    int_enable( BOARD_OS_TIMER_INTNO );
 }
 
 /*
@@ -85,32 +94,35 @@ static void prvSetupTimerInterrupt(void)
  * It's not efficient but simple.
  *
  */
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
 {
-	/* To ensure asserts in tasks.c don't fail, although in this case the assert
-	is not really required. */
-	pxTopOfStack--;
+    /* To ensure asserts in tasks.c don't fail, although in this case the assert
+     * is not really required. */
+    pxTopOfStack--;
 
-	/* Setup the initial stack of the task.  The stack is set exactly as
-	expected by the portRESTORE_CONTEXT() macro. */
+    /* Setup the initial stack of the task.  The stack is set exactly as
+     * expected by the portRESTORE_CONTEXT() macro. */
 
-	/* When the task starts is will expect to find the function parameter in
-	R0. */
-	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
+    /* When the task starts is will expect to find the function parameter in
+     * R0. */
+    *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
 
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) pxCode;		/* function body */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) pxCode; /* function body */
 
-	/* PC */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) start_r;	/* dispatch return address */
+    /* PC */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) start_r; /* dispatch return address */
 
-	pxTopOfStack--;
-	*pxTopOfStack = (StackType_t) portNO_CRITICAL_NESTING;
-	return pxTopOfStack;
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_NESTING;
+    return pxTopOfStack;
 }
 
 /* --------------------------------------------------------------------------*/
+
 /**
  * @brief  start the freertos scheduler, go to the first task
  *
@@ -119,67 +131,70 @@ StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t px
 /* ----------------------------------------------------------------------------*/
 BaseType_t xPortStartScheduler( void )
 {
-	/* Start the timer that generates the tick ISR. */
-	prvSetupTimerInterrupt();
-	start_dispatch();
+    /* Start the timer that generates the tick ISR. */
+    prvSetupTimerInterrupt();
+    start_dispatch();
 
-	/* Should not get here! */
-	return 0;
+    /* Should not get here! */
+    return 0;
 }
 
 /* --------------------------------------------------------------------------*/
+
 /**
  * @brief
  */
 /* ----------------------------------------------------------------------------*/
 void vPortEndScheduler( void )
 {
-
 }
 
 /* --------------------------------------------------------------------------*/
+
 /**
  * @brief  generate a task switch request in ISR
  */
 /* ----------------------------------------------------------------------------*/
-void vPortYieldFromIsr(void)
+void vPortYieldFromIsr( void )
 {
-	unsigned int status32;
+    unsigned int status32;
 
-	status32 = cpu_lock_save();
-	context_switch_reqflg = true;
-	cpu_unlock_restore(status32);
+    status32 = cpu_lock_save();
+    context_switch_reqflg = true;
+    cpu_unlock_restore( status32 );
 }
 
 /* --------------------------------------------------------------------------*/
+
 /**
  * @brief
  */
 /* ----------------------------------------------------------------------------*/
-void vPortYield(void)
+void vPortYield( void )
 {
-	unsigned int status32;
+    unsigned int status32;
 
-	status32 = cpu_lock_save();
-	dispatch();
-	cpu_unlock_restore(status32);
+    status32 = cpu_lock_save();
+    dispatch();
+    cpu_unlock_restore( status32 );
 }
 
 /* --------------------------------------------------------------------------*/
+
 /**
  * @brief
  */
 /* ----------------------------------------------------------------------------*/
-void vPortEndTask(void)
+void vPortEndTask( void )
 {
+    #if ( INCLUDE_vTaskDelete == 1 )
+        vTaskDelete( NULL ); /* Delete task itself */
+    #endif
 
-#if ( INCLUDE_vTaskDelete == 1 )
-	vTaskDelete(NULL); /* Delete task itself */
-#endif
-
-	while(1) { /* Yield to other task */
-		vPortYield();
-	}
+    while( 1 ) /* Yield to other task */
+    {
+        vPortYield();
+    }
 }
 
 #if ARC_FEATURE_STACK_CHECK
@@ -190,94 +205,95 @@ void vPortEndTask(void)
  * It's a copy from task.c. We need to konw the definition of TCB for the purpose of hardware
  * stack check. Pls don't forget to update it when FreeRTOS is updated.
  */
-typedef struct tskTaskControlBlock /* The old naming convention is used to prevent breaking kernel aware debuggers. */
-{
-	volatile StackType_t	*pxTopOfStack;	/*< Points to the location of the last item placed on the tasks stack.  THIS MUST BE THE FIRST MEMBER OF THE TCB STRUCT. */
+    typedef struct tskTaskControlBlock       /* The old naming convention is used to prevent breaking kernel aware debuggers. */
+    {
+        volatile StackType_t * pxTopOfStack; /*< Points to the location of the last item placed on the tasks stack.  THIS MUST BE THE FIRST MEMBER OF THE TCB STRUCT. */
 
-	#if ( portUSING_MPU_WRAPPERS == 1 )
-		xMPU_SETTINGS	xMPUSettings;		/*< The MPU settings are defined as part of the port layer.  THIS MUST BE THE SECOND MEMBER OF THE TCB STRUCT. */
-	#endif
+        #if ( portUSING_MPU_WRAPPERS == 1 )
+            xMPU_SETTINGS xMPUSettings; /*< The MPU settings are defined as part of the port layer.  THIS MUST BE THE SECOND MEMBER OF THE TCB STRUCT. */
+        #endif
 
-	ListItem_t			xStateListItem;	/*< The list that the state list item of a task is reference from denotes the state of that task (Ready, Blocked, Suspended ). */
-	ListItem_t			xEventListItem;		/*< Used to reference a task from an event list. */
-	UBaseType_t			uxPriority;			/*< The priority of the task.  0 is the lowest priority. */
-	StackType_t			*pxStack;			/*< Points to the start of the stack. */
-	char				pcTaskName[ configMAX_TASK_NAME_LEN ];/*< Descriptive name given to the task when created.  Facilitates debugging only. */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+        ListItem_t xStateListItem;                  /*< The list that the state list item of a task is reference from denotes the state of that task (Ready, Blocked, Suspended ). */
+        ListItem_t xEventListItem;                  /*< Used to reference a task from an event list. */
+        UBaseType_t uxPriority;                     /*< The priority of the task.  0 is the lowest priority. */
+        StackType_t * pxStack;                      /*< Points to the start of the stack. */
+        char pcTaskName[ configMAX_TASK_NAME_LEN ]; /*< Descriptive name given to the task when created.  Facilitates debugging only. */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
-	#if ( ( portSTACK_GROWTH > 0 ) || ( configRECORD_STACK_HIGH_ADDRESS == 1 ) )
-		StackType_t		*pxEndOfStack;		/*< Points to the highest valid address for the stack. */
-	#endif
+        #if ( ( portSTACK_GROWTH > 0 ) || ( configRECORD_STACK_HIGH_ADDRESS == 1 ) )
+            StackType_t * pxEndOfStack; /*< Points to the highest valid address for the stack. */
+        #endif
 
-	#if ( portCRITICAL_NESTING_IN_TCB == 1 )
-		UBaseType_t		uxCriticalNesting;	/*< Holds the critical section nesting depth for ports that do not maintain their own count in the port layer. */
-	#endif
+        #if ( portCRITICAL_NESTING_IN_TCB == 1 )
+            UBaseType_t uxCriticalNesting; /*< Holds the critical section nesting depth for ports that do not maintain their own count in the port layer. */
+        #endif
 
-	#if ( configUSE_TRACE_FACILITY == 1 )
-		UBaseType_t		uxTCBNumber;		/*< Stores a number that increments each time a TCB is created.  It allows debuggers to determine when a task has been deleted and then recreated. */
-		UBaseType_t		uxTaskNumber;		/*< Stores a number specifically for use by third party trace code. */
-	#endif
+        #if ( configUSE_TRACE_FACILITY == 1 )
+            UBaseType_t uxTCBNumber;  /*< Stores a number that increments each time a TCB is created.  It allows debuggers to determine when a task has been deleted and then recreated. */
+            UBaseType_t uxTaskNumber; /*< Stores a number specifically for use by third party trace code. */
+        #endif
 
-	#if ( configUSE_MUTEXES == 1 )
-		UBaseType_t		uxBasePriority;		/*< The priority last assigned to the task - used by the priority inheritance mechanism. */
-		UBaseType_t		uxMutexesHeld;
-	#endif
+        #if ( configUSE_MUTEXES == 1 )
+            UBaseType_t uxBasePriority; /*< The priority last assigned to the task - used by the priority inheritance mechanism. */
+            UBaseType_t uxMutexesHeld;
+        #endif
 
-	#if ( configUSE_APPLICATION_TASK_TAG == 1 )
-		TaskHookFunction_t pxTaskTag;
-	#endif
+        #if ( configUSE_APPLICATION_TASK_TAG == 1 )
+            TaskHookFunction_t pxTaskTag;
+        #endif
 
-	#if( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 )
-		void			*pvThreadLocalStoragePointers[ configNUM_THREAD_LOCAL_STORAGE_POINTERS ];
-	#endif
+        #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 )
+            void * pvThreadLocalStoragePointers[ configNUM_THREAD_LOCAL_STORAGE_POINTERS ];
+        #endif
 
-	#if( configGENERATE_RUN_TIME_STATS == 1 )
-		uint32_t		ulRunTimeCounter;	/*< Stores the amount of time the task has spent in the Running state. */
-	#endif
+        #if ( configGENERATE_RUN_TIME_STATS == 1 )
+            uint32_t ulRunTimeCounter; /*< Stores the amount of time the task has spent in the Running state. */
+        #endif
 
-	#if ( configUSE_NEWLIB_REENTRANT == 1 )
-		/* Allocate a Newlib reent structure that is specific to this task.
-		Note Newlib support has been included by popular demand, but is not
-		used by the FreeRTOS maintainers themselves.  FreeRTOS is not
-		responsible for resulting newlib operation.  User must be familiar with
-		newlib and must provide system-wide implementations of the necessary
-		stubs. Be warned that (at the time of writing) the current newlib design
-		implements a system-wide malloc() that must be provided with locks. */
-		struct	_reent xNewLib_reent;
-	#endif
+        #if ( configUSE_NEWLIB_REENTRANT == 1 )
 
-	#if( configUSE_TASK_NOTIFICATIONS == 1 )
-		volatile uint32_t ulNotifiedValue;
-		volatile uint8_t ucNotifyState;
-	#endif
+            /* Allocate a Newlib reent structure that is specific to this task.
+             * Note Newlib support has been included by popular demand, but is not
+             * used by the FreeRTOS maintainers themselves.  FreeRTOS is not
+             * responsible for resulting newlib operation.  User must be familiar with
+             * newlib and must provide system-wide implementations of the necessary
+             * stubs. Be warned that (at the time of writing) the current newlib design
+             * implements a system-wide malloc() that must be provided with locks. */
+            struct  _reent xNewLib_reent;
+        #endif
 
-	/* See the comments above the definition of
-	tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE. */
-	#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
-		uint8_t	ucStaticallyAllocated; 		/*< Set to pdTRUE if the task is a statically allocated to ensure no attempt is made to free the memory. */
-	#endif
+        #if ( configUSE_TASK_NOTIFICATIONS == 1 )
+            volatile uint32_t ulNotifiedValue;
+            volatile uint8_t ucNotifyState;
+        #endif
 
-	#if( INCLUDE_xTaskAbortDelay == 1 )
-		uint8_t ucDelayAborted;
-	#endif
+        /* See the comments above the definition of
+         * tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE. */
+        #if ( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
+            uint8_t ucStaticallyAllocated;                     /*< Set to pdTRUE if the task is a statically allocated to ensure no attempt is made to free the memory. */
+        #endif
 
-	#if( configUSE_POSIX_ERRNO == 1 )
-		int iTaskErrno;
-	#endif
+        #if ( INCLUDE_xTaskAbortDelay == 1 )
+            uint8_t ucDelayAborted;
+        #endif
 
-} tskTCB;
+        #if ( configUSE_POSIX_ERRNO == 1 )
+            int iTaskErrno;
+        #endif
+    } tskTCB;
 
 
-void vPortSetStackCheck(TaskHandle_t old, TaskHandle_t new)
-{
-
-	if (new != NULL) {
-#if ARC_FEATURE_SEC_PRESENT
-		arc_aux_write(AUX_S_KSTACK_BASE, (uint32_t)(new->pxEndOfStack));
-		arc_aux_write(AUX_S_KSTACK_TOP, (uint32_t)(new->pxStack));
-#else
-		arc_aux_write(AUX_KSTACK_BASE, (uint32_t)(new->pxEndOfStack));
-		arc_aux_write(AUX_KSTACK_TOP, (uint32_t)(new->pxStack));
-#endif
-	}
-}
-#endif
+    void vPortSetStackCheck( TaskHandle_t old,
+                             TaskHandle_t new )
+    {
+        if( new != NULL )
+        {
+            #if ARC_FEATURE_SEC_PRESENT
+                arc_aux_write( AUX_S_KSTACK_BASE, ( uint32_t ) ( new->pxEndOfStack ) );
+                arc_aux_write( AUX_S_KSTACK_TOP, ( uint32_t ) ( new->pxStack ) );
+            #else
+                arc_aux_write( AUX_KSTACK_BASE, ( uint32_t ) ( new->pxEndOfStack ) );
+                arc_aux_write( AUX_KSTACK_TOP, ( uint32_t ) ( new->pxStack ) );
+            #endif
+        }
+    }
+#endif /* if ARC_FEATURE_STACK_CHECK */
diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h b/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h
index dc950369c..4978a40a6 100644
--- a/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h
+++ b/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h
@@ -1,6 +1,6 @@
 /*
- * FreeRTOS Kernel V10.2.1
- * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Synopsys, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -19,22 +19,23 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
 #define PORTMACRO_H
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
-extern "C" {
+    extern "C" {
 #endif
+/* *INDENT-ON* */
 
 /* record stack high address for stack check */
 #ifndef configRECORD_STACK_HIGH_ADDRESS
-    #define configRECORD_STACK_HIGH_ADDRESS 1
+    #define configRECORD_STACK_HIGH_ADDRESS    1
 #endif
 
 /*-----------------------------------------------------------
@@ -48,111 +49,110 @@ extern "C" {
  */
 
 /* Type definitions. */
-#define portCHAR    char
-#define portFLOAT   float
-#define portDOUBLE  double
-#define portLONG    long
-#define portSHORT   short
-#define portSTACK_TYPE  unsigned int
-#define portBASE_TYPE   portLONG
+#define portCHAR          char
+#define portFLOAT         float
+#define portDOUBLE        double
+#define portLONG          long
+#define portSHORT         short
+#define portSTACK_TYPE    unsigned int
+#define portBASE_TYPE     portLONG
 
-#ifndef Inline
-#define Inline  static __inline__
-#endif
 #ifndef Asm
-#define Asm __asm__ volatile
+    #define Asm           __asm__ volatile
 #endif
 
 /*
  *  normal constants
  */
 #ifndef NULL
-#define NULL        0           /* invalid pointer */
+    #define NULL    0           /* invalid pointer */
 #endif /* NULL */
 
 #ifndef true
-#define true        1           /* true */
+    #define true    1           /* true */
 #endif /* true */
 
 #ifndef false
-#define false       0           /* false */
+    #define false    0          /* false */
 #endif /* false */
 
-typedef portSTACK_TYPE StackType_t;
-typedef long BaseType_t;
-typedef unsigned long UBaseType_t;
+typedef portSTACK_TYPE     StackType_t;
+typedef long               BaseType_t;
+typedef unsigned long      UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-    typedef uint16_t TickType_t;
-    #define portMAX_DELAY ( TickType_t ) 0xffff
+#if ( configUSE_16_BIT_TICKS == 1 )
+    typedef uint16_t       TickType_t;
+    #define portMAX_DELAY          ( TickType_t ) 0xffff
 #else
-    typedef unsigned int TickType_t;
-    #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+    typedef unsigned int   TickType_t;
+    #define portMAX_DELAY          ( TickType_t ) 0xffffffffUL
 #endif
 
-#define portNO_CRITICAL_NESTING 0x0
-#define portSTACK_GROWTH    ( -1 )
-#define portTICK_PERIOD_MS  ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT  8
-#define portNOP()       Asm( "nop_s" );
-#define IPM_ENABLE_ALL      1
+#define portNO_CRITICAL_NESTING    ( ( uint32_t ) 0 )
+#define portSTACK_GROWTH           ( -1 )
+#define portTICK_PERIOD_MS         ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+#define portBYTE_ALIGNMENT         8
+#define portNOP()               Asm( "nop_s" );
+#define IPM_ENABLE_ALL             1
 
-#define portYIELD_FROM_ISR()        vPortYieldFromIsr()
-#define portYIELD()         vPortYield()
+#define portYIELD_FROM_ISR()    vPortYieldFromIsr()
+#define portYIELD()             vPortYield()
 
 /* Critical section management. */
-#define portDISABLE_INTERRUPTS()        \
-{                       \
-    Asm("clri");                \
-    Asm("":::"memory");         \
-}                       \
+#define portDISABLE_INTERRUPTS() \
+    {                            \
+        Asm( "clri" );           \
+        Asm( "" ::: "memory" );  \
+    }                            \
 
-#define portENABLE_INTERRUPTS()         \
-{                       \
-    Asm("":::"memory");         \
-    Asm("seti");                \
-}                       \
+#define portENABLE_INTERRUPTS() \
+    {                           \
+        Asm( "" ::: "memory" ); \
+        Asm( "seti" );          \
+    }                           \
 
 extern volatile unsigned int ulCriticalNesting;
 
-#define portENTER_CRITICAL()            \
-{                       \
-    portDISABLE_INTERRUPTS()        \
-    ulCriticalNesting++;            \
-}
+#define portENTER_CRITICAL()     \
+    {                            \
+        portDISABLE_INTERRUPTS() \
+        ulCriticalNesting++;     \
+    }
 
 
-#define portEXIT_CRITICAL()                     \
-{                                   \
-    if (ulCriticalNesting > portNO_CRITICAL_NESTING)        \
-    {                               \
-        ulCriticalNesting--;                    \
-        if (ulCriticalNesting == portNO_CRITICAL_NESTING)   \
-        {                           \
-            portENABLE_INTERRUPTS()             \
-        }                           \
-    }                               \
-}
+#define portEXIT_CRITICAL()                                    \
+    {                                                          \
+        if( ulCriticalNesting > portNO_CRITICAL_NESTING )      \
+        {                                                      \
+            ulCriticalNesting--;                               \
+            if( ulCriticalNesting == portNO_CRITICAL_NESTING ) \
+            {                                                  \
+                portENABLE_INTERRUPTS()                        \
+            }                                                  \
+        }                                                      \
+    }
 
 
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+#define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 
-#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() do {} while (0)    /* we use the timer */
-#define portALT_GET_RUN_TIME_COUNTER_VALUE(dest) (dest = xTickCount)
+#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()              do {} while( 0 )     /* we use the timer */
+#define portALT_GET_RUN_TIME_COUNTER_VALUE( dest )            ( dest = xTickCount )
 
-#if defined(__MW__)
-extern void task_end_hook(void *pxTCB);
-#define portCLEAN_UP_TCB( pxTCB )   task_end_hook((void *)pxTCB)
+#if defined( __MW__ )
+    extern void task_end_hook( void * pxTCB );
+    #define portCLEAN_UP_TCB( pxTCB )    task_end_hook( ( void * ) pxTCB )
 #else
-#define portCLEAN_UP_TCB( pxTCB )   ( void ) pxTCB
+    #define portCLEAN_UP_TCB( pxTCB )    ( void ) pxTCB
 #endif
 
-void vPortYield(void);
-void vPortYieldFromIsr(void);
+void vPortYield( void );
+void vPortYieldFromIsr( void );
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
-}
+    }
 #endif
+/* *INDENT-ON* */
 
-#endif  /* PORTMACRO_H */
+#endif /* PORTMACRO_H */
diff --git a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c
new file mode 100644
index 000000000..8c15ae6d7
--- /dev/null
+++ b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c
@@ -0,0 +1,51 @@
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Synopsys, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ * 1 tab == 4 spaces!
+ */
+
+/**
+ * \file
+ * \brief   exception processing for freertos
+ */
+
+/* #include "embARC.h" */
+
+#include "arc_freertos_exceptions.h"
+
+#ifdef __GNU__
+    extern void gnu_printf_setup( void );
+#endif
+
+/**
+ * \brief  freertos related cpu exception initialization, all the interrupts handled by freertos must be not
+ * fast irqs. If fiq is needed, please install the default firq_exc_entry or your own fast irq entry into
+ * the specific interrupt exception.
+ */
+void freertos_exc_init( void )
+{
+    #ifdef __GNU__
+        gnu_printf_setup();
+    #endif
+}
diff --git a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h
new file mode 100644
index 000000000..a56adbbd8
--- /dev/null
+++ b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h
@@ -0,0 +1,45 @@
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Synopsys, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ * 1 tab == 4 spaces!
+ */
+
+#ifndef ARC_FREERTOS_EXCEPTIONS_H
+#define ARC_FREERTOS_EXCEPTIONS_H
+
+/*
+ * here, all arc cpu exceptions share the same entry, also for all interrupt
+ * exceptions
+ */
+extern void exc_entry_cpu( void ); /* cpu exception entry for freertos */
+extern void exc_entry_int( void ); /* int exception entry for freertos */
+
+/* task dispatch functions in .s */
+extern void start_r( void );
+extern void start_dispatch();
+extern void dispatch();
+
+extern void freertos_exc_init( void );
+
+#endif /* ARC_FREERTOS_EXCEPTIONS_H */
diff --git a/portable/ThirdParty/GCC/ARC_v1/arc_support.s b/portable/ThirdParty/GCC/ARC_v1/arc_support.s
new file mode 100644
index 000000000..2b8d73b26
--- /dev/null
+++ b/portable/ThirdParty/GCC/ARC_v1/arc_support.s
@@ -0,0 +1,321 @@
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Synopsys, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ * 1 tab == 4 spaces!
+ */
+
+/**
+ * \file
+ * \ingroup OS_FREERTOS
+ * \brief  freertos support for arc processor
+ *	like task dispatcher, interrupt handler
+ */
+/** @cond OS_FREERTOS_ASM_ARC_SUPPORT */
+
+/*
+ * core-dependent part in assemble language (for arc)
+ */
+#define __ASSEMBLY__
+#include "arc/arc.h"
+#include "arc/arc_asm_common.h"
+
+/*
+ *  task dispatcher
+ *
+ */
+	.text
+	.align 4
+	.global dispatch
+dispatch:
+/*
+ *  the pre-conditions of this routine are task context, CPU is
+ *  locked, dispatch is enabled.
+ */
+	SAVE_NONSCRATCH_REGS		/* save callee save registers */
+	mov	r1, dispatch_r
+	PUSH	r1			/* save return address */
+	ld	r0, [pxCurrentTCB]
+	bl	dispatcher
+
+/* return routine when task dispatch happened in task context */
+dispatch_r:
+	RESTORE_NONSCRATCH_REGS		/* recover registers */
+	j	[blink]
+
+/*
+ *  start dispatch
+ */
+	.global start_dispatch
+	.align 4
+start_dispatch:
+/*
+ *  this routine is called in the non-task context during the startup of the kernel
+ *  , and all the interrupts are locked.
+ *
+ *  when the dispatcher is called, the cpu is locked, no nest exception (CPU exception/interrupt).
+ *  In target_initialize, all interrupt priority mask should be cleared, cpu should be
+ *  locked, the interrupts outside the kernel such as fiq can be
+ *  enabled.
+ */
+	clri
+	mov	r0, 0
+	st	r0, [exc_nest_count]
+	b	dispatcher_0
+/*
+ *  dispatcher
+ */
+dispatcher:
+	ld	r1, [ulCriticalNesting]
+	PUSH	r1			/* save critical nesting */
+	st	sp, [r0]		/* save stack pointer of current task, r0->pxCurrentTCB */
+	jl	vTaskSwitchContext	/* change the value of pxCurrentTCB */
+/*
+ *  before dispatcher is called, task context | cpu locked | dispatch enabled
+ *  should be satisfied. In this routine, the processor will jump
+ *  into the entry of next to run task
+ *
+ *  i.e. kernel mode, IRQ disabled, dispatch enabled
+ */
+dispatcher_0:
+	ld	r1, [pxCurrentTCB]
+	ld	sp, [r1]	/* recover task stack */
+#if ARC_FEATURE_STACK_CHECK
+	lr r0, [AUX_STATUS32]
+	bclr r0, r0, AUX_STATUS_BIT_SC
+	flag r0
+	jl	vPortSetStackCheck
+	lr r0, [AUX_STATUS32]
+	bset r0, r0, AUX_STATUS_BIT_SC
+	flag r0
+#endif
+	POP	r0		/* get critical nesting */
+	st	r0, [ulCriticalNesting]
+	POP	r0		/* get return address  */
+	j	[r0]
+
+/*
+ *  task startup routine
+ *
+ */
+	.text
+	.global start_r
+	.align 4
+start_r:
+	seti	/* unlock cpu */
+	mov	blink, vPortEndTask	/* set return address */
+	POP	r1			/* get task function body */
+	POP	r0			/* get task parameters */
+	j	[r1]
+
+/****** exceptions and interrupts handing ******/
+/****** entry for exception handling ******/
+	.global exc_entry_cpu
+	.align 4
+exc_entry_cpu:
+
+	EXCEPTION_PROLOGUE
+
+
+	mov	blink,	sp
+	mov	r3, sp		/* as exception handler's para(p_excinfo) */
+
+	ld	r1, [exc_nest_count]
+	add	r1, r1, 1
+	st	r1, [exc_nest_count]
+	brne	r1, 0, exc_handler_1
+/* change to exception stack if interrupt happened in task context */
+	mov	sp, _e_stack
+exc_handler_1:
+	PUSH	blink
+
+/* find the exception cause */
+#if ARC_FEATURE_CORE_700
+	lr	r0, [AUX_ECR]
+	lsr	r0, r0, 16
+	bmsk	r0, r0, 7
+#endif
+	mov	r1, exc_int_handler_table
+	ld.as	r2, [r1, r0]
+
+	mov	r0, r3
+	jl	[r2]		/* !!!!jump to exception handler where interrupts are not allowed! */
+
+/* interrupts are not allowed */
+ret_exc:
+	POP	sp
+	mov	r1, exc_nest_count
+	ld	r0, [r1]
+	sub	r0, r0, 1
+	st 	r0, [r1]
+	brne	r0, 0, ret_exc_1  /* nested exception case */
+	lr	r1, [AUX_IRQ_LV12]
+	brne	r1, 0, ret_exc_1  /* nested or pending interrupt case */
+
+	ld	r0, [context_switch_reqflg]
+	brne	r0, 0, ret_exc_2
+ret_exc_1:	/* return from non-task context, interrupts or exceptions are nested */
+
+	EXCEPTION_EPILOGUE
+#if ARC_FEATURE_CORE_600
+	rtie ilink2
+#else
+	rtie
+#endif
+
+/* there is a dispatch request */
+ret_exc_2:
+	/* clear dispatch request */
+	mov	r0, 0
+	st	r0, [context_switch_reqflg]
+
+	ld	r0, [pxCurrentTCB]
+	breq	r0, 0, ret_exc_1
+
+	SAVE_CALLEE_REGS	/* save callee save registers */
+
+	lr	r0, [AUX_STATUS32]
+	bclr	r0, r0, AUX_STATUS_BIT_AE	/* clear exception bit */
+	flag	r0
+
+	mov	r1, ret_exc_r	/* save return address */
+	PUSH	r1
+
+	bl	dispatcher	/* r0->pxCurrentTCB */
+
+ret_exc_r:
+	/* recover exception status */
+	lr	r0, [AUX_STATUS32]
+	bset	r0, r0, AUX_STATUS_BIT_AE
+	flag	r0
+
+	RESTORE_CALLEE_REGS	/* recover registers */
+	EXCEPTION_EPILOGUE
+#if ARC_FEATURE_CORE_600
+	rtie ilink2
+#else
+	rtie
+#endif
+
+/****** entry for normal interrupt exception handling ******/
+	.global exc_entry_int	/* entry for interrupt handling */
+	.align 4
+exc_entry_int:
+
+	INTERRUPT_PROLOGUE
+
+	mov	blink, sp
+
+	/* disable interrupt */
+	push r0
+	lr  r0, [AUX_STATUS32]
+	push r0
+    bclr r0, r0, AUX_STATUS_BIT_E1
+    bclr r0, r0, AUX_STATUS_BIT_E2
+    flag r0
+	ld	r3, [exc_nest_count]
+	add	r2, r3, 1
+	st	r2, [exc_nest_count]
+	/* enable interrupt */
+	pop r0
+	flag r0
+	pop r0
+
+	brne	r3, 0, irq_handler_1
+/* change to exception stack if interrupt happened in task context */
+	mov	sp, _e_stack
+#if ARC_FEATURE_STACK_CHECK
+	lr r0, [AUX_STATUS32]
+	bclr r0, r0, AUX_STATUS_BIT_SC
+	flag r0
+#endif
+irq_handler_1:
+	PUSH	blink
+
+/* critical area */
+#if ARC_FEATURE_CORE_700
+	lr	r0, [AUX_IRQ_CAUSE1]
+#endif
+	mov	r1, exc_int_handler_table
+	ld.as	r2, [r1, r0]	/* r2 = exc_int_handler_table + irqno *4 */
+/* handle software triggered interrupt */
+	lr	r3, [AUX_IRQ_HINT]
+	cmp	r3, r0
+	bne.d irq_hint_handled
+	xor	r3, r3, r3
+	sr	r3, [AUX_IRQ_HINT]
+irq_hint_handled:
+
+	jl	[r2]		/* jump to interrupt handler */
+/* no interrupts are allowed from here */
+ret_int:
+	clri	/* disable interrupt */
+
+	POP	sp
+	mov	r1, exc_nest_count
+	ld	r0, [r1]
+	sub	r0, r0, 1
+	st	r0, [r1]
+/* if there are multi-bits set in IRQ_LV12, it's still in nest interrupt */
+	lr	r1, [AUX_IRQ_LV12]
+
+	ld	r0, [context_switch_reqflg]
+	brne	r0, 0, ret_int_2
+ret_int_1:	/* return from non-task context */
+	INTERRUPT_EPILOGUE
+#if ARC_FEATURE_CORE_600
+/* TODO: series 600 IRQ6 and IRQ7 uses ilink2 */
+	rtie ilink1
+#else
+	rtie
+#endif
+/* there is a dispatch request */
+ret_int_2:
+	/* clear dispatch request */
+	mov	r0, 0
+	st	r0, [context_switch_reqflg]
+
+	ld	r0, [pxCurrentTCB]
+	breq 	r0, 0, ret_int_1
+
+/* r1 has old AUX_IRQ_LV12 */
+	PUSH	r1
+/* clear related bits in IRQ_ACT manually to simulate a irq return  */
+
+	SAVE_CALLEE_REGS	/* save callee save registers */
+	mov	r1, ret_int_r	/* save return address */
+	PUSH	r1
+
+	bl	dispatcher	/* r0->pxCurrentTCB */
+
+ret_int_r:
+	RESTORE_CALLEE_REGS	/* recover registers */
+	POPAX	AUX_IRQ_LV12
+	INTERRUPT_EPILOGUE
+#if ARC_FEATURE_CORE_600
+	rtie ilink1
+#else
+	rtie
+#endif
+
+/** @endcond */
diff --git a/portable/ThirdParty/GCC/ARC_v1/port.c b/portable/ThirdParty/GCC/ARC_v1/port.c
new file mode 100644
index 000000000..7f38a8310
--- /dev/null
+++ b/portable/ThirdParty/GCC/ARC_v1/port.c
@@ -0,0 +1,295 @@
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Synopsys, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ * 1 tab == 4 spaces!
+ */
+
+/*
+ * Implementation of functions defined in portable.h
+ */
+
+#include "FreeRTOS.h"
+#include "task.h"
+#include "FreeRTOSConfig.h"
+
+#include "arc/arc_exception.h"
+#include "arc/arc_timer.h"
+#include "board.h"
+
+#include "arc_freertos_exceptions.h"
+
+volatile unsigned int ulCriticalNesting = 999UL;
+volatile unsigned int context_switch_reqflg; /* task context switch request flag in exceptions and interrupts handling */
+
+/**
+ * \var exc_nest_count
+ * \brief the counter for exc/int processing, =0 no int/exc
+ * >1 in int/exc processing
+ * @}
+ */
+uint32_t exc_nest_count;
+/* --------------------------------------------------------------------------*/
+
+/**
+ * @brief kernel tick interrupt handler of freertos
+ */
+/* ----------------------------------------------------------------------------*/
+static void vKernelTick( void * ptr )
+{
+    /* clear timer interrupt */
+    arc_timer_int_clear( BOARD_OS_TIMER_ID );
+    board_timer_update( configTICK_RATE_HZ );
+
+    if( xTaskIncrementTick() )
+    {
+        portYIELD_FROM_ISR(); /* need to make task switch */
+    }
+}
+
+/* --------------------------------------------------------------------------*/
+
+/**
+ * @brief  setup freertos kernel tick
+ */
+/* ----------------------------------------------------------------------------*/
+static void prvSetupTimerInterrupt( void )
+{
+    unsigned int cyc = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
+
+    int_disable( BOARD_OS_TIMER_INTNO ); /* disable os timer interrupt */
+    arc_timer_stop( BOARD_OS_TIMER_ID );
+    arc_timer_start( BOARD_OS_TIMER_ID, TIMER_CTRL_IE | TIMER_CTRL_NH, cyc );
+
+    int_handler_install( BOARD_OS_TIMER_INTNO, ( INT_HANDLER_T ) vKernelTick );
+    int_pri_set( BOARD_OS_TIMER_INTNO, INT_PRI_MIN );
+    int_enable( BOARD_OS_TIMER_INTNO );
+}
+
+/*
+ * Setup the stack of a new task so it is ready to be placed under the
+ * scheduler control.  The registers have to be placed on the stack in
+ * the order that the port expects to find them.
+ *
+ * For ARC, task context switch is implemented with the help of SWI exception
+ * It's not efficient but simple.
+ *
+ */
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
+{
+    /* To ensure asserts in tasks.c don't fail, although in this case the assert
+     * is not really required. */
+    pxTopOfStack--;
+
+    /* Setup the initial stack of the task.  The stack is set exactly as
+     * expected by the portRESTORE_CONTEXT() macro. */
+
+    /* When the task starts is will expect to find the function parameter in
+     * R0. */
+    *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
+
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) pxCode; /* function body */
+
+    /* PC */
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) start_r; /* dispatch return address */
+
+    pxTopOfStack--;
+    *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_NESTING;
+    return pxTopOfStack;
+}
+
+/* --------------------------------------------------------------------------*/
+
+/**
+ * @brief  start the freertos scheduler, go to the first task
+ *
+ * @returns
+ */
+/* ----------------------------------------------------------------------------*/
+BaseType_t xPortStartScheduler( void )
+{
+    /* Start the timer that generates the tick ISR. */
+    prvSetupTimerInterrupt();
+    start_dispatch();
+
+    /* Should not get here! */
+    return 0;
+}
+
+/* --------------------------------------------------------------------------*/
+
+/**
+ * @brief
+ */
+/* ----------------------------------------------------------------------------*/
+void vPortEndScheduler( void )
+{
+}
+
+/* --------------------------------------------------------------------------*/
+
+/**
+ * @brief  generate a task switch request in ISR
+ */
+/* ----------------------------------------------------------------------------*/
+void vPortYieldFromIsr( void )
+{
+    unsigned int status32;
+
+    status32 = cpu_lock_save();
+    context_switch_reqflg = true;
+    cpu_unlock_restore( status32 );
+}
+
+/* --------------------------------------------------------------------------*/
+
+/**
+ * @brief
+ */
+/* ----------------------------------------------------------------------------*/
+void vPortYield( void )
+{
+    unsigned int status32;
+
+    status32 = cpu_lock_save();
+    dispatch();
+    cpu_unlock_restore( status32 );
+}
+
+/* --------------------------------------------------------------------------*/
+
+/**
+ * @brief
+ */
+/* ----------------------------------------------------------------------------*/
+void vPortEndTask( void )
+{
+    #if ( INCLUDE_vTaskDelete == 1 )
+        vTaskDelete( NULL ); /* Delete task itself */
+    #endif
+
+    while( 1 ) /* Yield to other task */
+    {
+        vPortYield();
+    }
+}
+
+#if ARC_FEATURE_STACK_CHECK
+
+/*
+ * !!! Note !!!
+ * This a trick!!!
+ * It's a copy from task.c. We need to konw the definition of TCB for the purpose of hardware
+ * stack check. Pls don't forget to update it when FreeRTOS is updated.
+ */
+    typedef struct tskTaskControlBlock       /* The old naming convention is used to prevent breaking kernel aware debuggers. */
+    {
+        volatile StackType_t * pxTopOfStack; /*< Points to the location of the last item placed on the tasks stack.  THIS MUST BE THE FIRST MEMBER OF THE TCB STRUCT. */
+
+        #if ( portUSING_MPU_WRAPPERS == 1 )
+            xMPU_SETTINGS xMPUSettings;     /*< The MPU settings are defined as part of the port layer.  THIS MUST BE THE SECOND MEMBER OF THE TCB STRUCT. */
+        #endif
+
+        ListItem_t xStateListItem;                  /*< The list that the state list item of a task is reference from denotes the state of that task (Ready, Blocked, Suspended ). */
+        ListItem_t xEventListItem;                  /*< Used to reference a task from an event list. */
+        UBaseType_t uxPriority;                     /*< The priority of the task.  0 is the lowest priority. */
+        StackType_t * pxStack;                      /*< Points to the start of the stack. */
+        char pcTaskName[ configMAX_TASK_NAME_LEN ]; /*< Descriptive name given to the task when created.  Facilitates debugging only. */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+
+        #if ( ( portSTACK_GROWTH > 0 ) || ( configRECORD_STACK_HIGH_ADDRESS == 1 ) )
+            StackType_t * pxEndOfStack;     /*< Points to the highest valid address for the stack. */
+        #endif
+
+        #if ( portCRITICAL_NESTING_IN_TCB == 1 )
+            UBaseType_t uxCriticalNesting;  /*< Holds the critical section nesting depth for ports that do not maintain their own count in the port layer. */
+        #endif
+
+        #if ( configUSE_TRACE_FACILITY == 1 )
+            UBaseType_t uxTCBNumber;        /*< Stores a number that increments each time a TCB is created.  It allows debuggers to determine when a task has been deleted and then recreated. */
+            UBaseType_t uxTaskNumber;       /*< Stores a number specifically for use by third party trace code. */
+        #endif
+
+        #if ( configUSE_MUTEXES == 1 )
+            UBaseType_t uxBasePriority;     /*< The priority last assigned to the task - used by the priority inheritance mechanism. */
+            UBaseType_t uxMutexesHeld;
+        #endif
+
+        #if ( configUSE_APPLICATION_TASK_TAG == 1 )
+            TaskHookFunction_t pxTaskTag;
+        #endif
+
+        #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 )
+            void * pvThreadLocalStoragePointers[ configNUM_THREAD_LOCAL_STORAGE_POINTERS ];
+        #endif
+
+        #if ( configGENERATE_RUN_TIME_STATS == 1 )
+            uint32_t ulRunTimeCounter;      /*< Stores the amount of time the task has spent in the Running state. */
+        #endif
+
+        #if ( configUSE_NEWLIB_REENTRANT == 1 )
+
+            /* Allocate a Newlib reent structure that is specific to this task.
+             * Note Newlib support has been included by popular demand, but is not
+             * used by the FreeRTOS maintainers themselves.  FreeRTOS is not
+             * responsible for resulting newlib operation.  User must be familiar with
+             * newlib and must provide system-wide implementations of the necessary
+             * stubs. Be warned that (at the time of writing) the current newlib design
+             * implements a system-wide malloc() that must be provided with locks. */
+            struct  _reent xNewLib_reent;
+        #endif
+
+        #if ( configUSE_TASK_NOTIFICATIONS == 1 )
+            volatile uint32_t ulNotifiedValue;
+            volatile uint8_t ucNotifyState;
+        #endif
+
+        /* See the comments above the definition of
+         * tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE. */
+        #if ( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
+            uint8_t ucStaticallyAllocated;                     /*< Set to pdTRUE if the task is a statically allocated to ensure no attempt is made to free the memory. */
+        #endif
+
+        #if ( INCLUDE_xTaskAbortDelay == 1 )
+            uint8_t ucDelayAborted;
+        #endif
+
+        #if ( configUSE_POSIX_ERRNO == 1 )
+            int iTaskErrno;
+        #endif
+    } tskTCB;
+
+
+    void vPortSetStackCheck( TaskHandle_t old,
+                             TaskHandle_t new )
+    {
+        if( new != NULL )
+        {
+            arc_aux_write( AUX_USTACK_BASE, ( uint32_t ) ( new->pxEndOfStack ) );
+            arc_aux_write( AUX_USTACK_TOP, ( uint32_t ) ( new->pxStack ) );
+        }
+    }
+#endif /* if ARC_FEATURE_STACK_CHECK */
diff --git a/portable/ThirdParty/GCC/ARC_v1/portmacro.h b/portable/ThirdParty/GCC/ARC_v1/portmacro.h
new file mode 100644
index 000000000..afb4bbbf1
--- /dev/null
+++ b/portable/ThirdParty/GCC/ARC_v1/portmacro.h
@@ -0,0 +1,149 @@
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Synopsys, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ * 1 tab == 4 spaces!
+ */
+
+#ifndef PORTMACRO_H
+    #define PORTMACRO_H
+    #include "embARC.h"
+
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
+
+/* record stack high address for stack check */
+    #ifndef configRECORD_STACK_HIGH_ADDRESS
+        #define configRECORD_STACK_HIGH_ADDRESS    1
+    #endif
+
+/*-----------------------------------------------------------
+ * Port specific definitions.
+ *
+ * The settings in this file configure FreeRTOS correctly for the
+ * given hardware and compiler.
+ *
+ * These settings should not be altered.
+ *-----------------------------------------------------------
+ */
+
+/* Type definitions. */
+    #define portCHAR          char
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          long
+    #define portSHORT         short
+    #define portSTACK_TYPE    unsigned int
+    #define portBASE_TYPE     portLONG
+
+    #ifndef Asm
+        #define Asm           __asm__ volatile
+    #endif
+
+/*
+ *  normal constants
+ */
+    #ifndef NULL
+        #define NULL    0       /* invalid pointer */
+    #endif /* NULL */
+
+    #ifndef true
+        #define true    1       /* true */
+    #endif /* true */
+
+    #ifndef false
+        #define false    0      /* false */
+    #endif /* false */
+
+    typedef portSTACK_TYPE     StackType_t;
+    typedef long               BaseType_t;
+    typedef unsigned long      UBaseType_t;
+
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t       TickType_t;
+        #define portMAX_DELAY          ( TickType_t ) 0xffff
+    #else
+        typedef unsigned int   TickType_t;
+        #define portMAX_DELAY          ( TickType_t ) 0xffffffffUL
+    #endif
+
+    #define portNO_CRITICAL_NESTING    ( ( uint32_t ) 0 )
+    #define portSTACK_GROWTH           ( -1 )
+    #define portTICK_PERIOD_MS         ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT         8
+    #define portNOP()               Asm( "nop_s" );
+    #define IPM_ENABLE_ALL             1
+
+    #define portYIELD_FROM_ISR()    vPortYieldFromIsr()
+    #define portYIELD()             vPortYield()
+
+/* Critical section management. */
+    #define portDISABLE_INTERRUPTS() \
+    {                                \
+        arc_lock();                  \
+    }                                \
+
+    #define portENABLE_INTERRUPTS() \
+    {                               \
+        arc_unlock();               \
+    }                               \
+
+    extern volatile unsigned int ulCriticalNesting;
+
+    #define portENTER_CRITICAL() \
+    {                            \
+        portDISABLE_INTERRUPTS() \
+        ulCriticalNesting++;     \
+    }
+
+
+    #define portEXIT_CRITICAL()                                \
+    {                                                          \
+        if( ulCriticalNesting > portNO_CRITICAL_NESTING )      \
+        {                                                      \
+            ulCriticalNesting--;                               \
+            if( ulCriticalNesting == portNO_CRITICAL_NESTING ) \
+            {                                                  \
+                portENABLE_INTERRUPTS()                        \
+            }                                                  \
+        }                                                      \
+    }
+
+
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
+
+    #define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()              do {} while( 0 ) /* we use the timer */
+    #define portALT_GET_RUN_TIME_COUNTER_VALUE( dest )            ( dest = xTickCount )
+
+    #define portCLEAN_UP_TCB( pxTCB )                             ( void ) pxTCB
+
+    void vPortYield( void );
+    void vPortYieldFromIsr( void );
+
+    #ifdef __cplusplus
+}
+    #endif
+
+#endif /* PORTMACRO_H */
diff --git a/portable/ThirdParty/GCC/ARM_CM33_TFM/README.md b/portable/ThirdParty/GCC/ARM_CM33_TFM/README.md
new file mode 100644
index 000000000..6b03f5624
--- /dev/null
+++ b/portable/ThirdParty/GCC/ARM_CM33_TFM/README.md
@@ -0,0 +1,71 @@
+# Target of this port
+
+This port adds the support that FreeRTOS applications can call the secure
+services in Trusted Firmware M(TF-M) through Platform Security Architecture
+(PSA) API based on the ARM Cortex-M33 platform.
+
+The Platform Security Architecture (PSA) makes it quicker, easier and cheaper
+to design security into a device from the ground up. PSA is made up of four key
+stages: analyze, architect, implement, and certify. See [PSA Resource Page](https://developer.arm.com/architectures/security-architectures/platform-security-architecture).
+
+TF-M is an open source project. It provides a reference implementation of PSA
+for Arm M-profile architecture. Please get the details from this [link](https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/about/).
+
+# Derivation of the source code
+
+* ```os_wrapper_freertos.c```
+  The implementation of APIs which are defined in ```os_wrapper\mutex.h``` by TF-M
+  (tag: TF-Mv1.1). The implementation is based on FreeRTOS mutex type semaphore.
+
+# Usage notes
+
+To build a project based on this port:
+* Step 1: build the secure image. Please follow the **Build the Secure Side** section for details.
+* Step 2: build the nonsecure image. Please follow the **Build the Non-Secure Side** for details.
+
+## Build the Secure Side
+
+### Get the TF-M source code
+
+See the [link](https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/) to get the source code. This port is based on TF-M version **tag: TF-Mv1.1**.
+
+### Build TF-M
+
+Please refer to this [link](https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/tree/docs/getting_started/tfm_build_instruction.rst) to build the secure side.
+_**Note:** ```CONFIG_TFM_ENABLE_CTX_MGMT``` must be configured as "OFF" when building TF-M_.
+
+## Build the Non-Secure Side
+
+Please copy all the files in ```freertos_kernel\portable\GCC\ARM_CM33_NTZ``` into the ```freertos_kernel\portable\GCC\ARM_CM33_TFM``` folder before using this port. Note that TrustZone is enabled in this port. The TF-M runs in the Secure Side.
+
+Please call the API ```tfm_ns_interface_init()``` which is defined in ```os_wrapper_freertos.c``` at the very beginning of your application. Otherwise, it will always fail when calling a TF-M service in the Nonsecure Side.
+
+### Configuration in FreeRTOS kernel
+
+* ```configRUN_FREERTOS_SECURE_ONLY```
+This macro should be configured as 0. In this port, TF-M runs in the Secure Side while FreeRTOS
+Kernel runs in the Non-Secure Side.
+
+* ```configENABLE_FPU```
+The setting of this macro is decided by the setting in Secure Side which is platform-specific.
+If the Secure Side enables Non-Secure access to FPU, then this macro can be configured as 0 or 1. Otherwise, this macro can only be configured as 0.
+
+* ```configENABLE_TRUSTZONE```
+This macro should be configured as 0 because TF-M doesn't use the secure context management function of FreeRTOS. New secure context management might be introduced when TF-M supports multiple secure context.
+
+
+### Integrate TF-M Non-Secure interface with FreeRTOS project
+
+To enable calling TF-M services by the Non-Secure Side, the files below should be included in the FreeRTOS project and built together.
+* files in ```trusted-firmware-m\build\install\export\tfm\src```
+  These files contain the implementation of PSA Functional Developer APIs which can be called by Non-Secure Side directly and PSA Firmware Framework APIs in the IPC model. These files should be taken
+  as part of the Non-Secure source code.
+* files in ```trusted-firmware-m\build\install\export\tfm\include```
+  These files are the necessary header files to call TF-M services.
+* ```trusted-firmware-m\build\install\export\tfm\veneers\s_veneers.o```
+  This object file contains all the Non-Secure callable functions exported by
+  TF-M and it should be linked when generating the Non-Secure image.
+
+
+
+*Copyright (c) 2020, Arm Limited. All rights reserved.*
diff --git a/portable/ThirdParty/GCC/ARM_CM33_TFM/os_wrapper_freertos.c b/portable/ThirdParty/GCC/ARM_CM33_TFM/os_wrapper_freertos.c
new file mode 100644
index 000000000..5e9145b08
--- /dev/null
+++ b/portable/ThirdParty/GCC/ARM_CM33_TFM/os_wrapper_freertos.c
@@ -0,0 +1,96 @@
+/*
+ * Copyright (c) 2019-2020, Arm Limited. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+/*
+ * This file contains the implementation of APIs which are defined in
+ * os_wrapper/mutex.h by TF-M(tag: TF-Mv1.1). The implementation is based
+ * on FreeRTOS mutex type semaphore.
+ */
+
+#include "os_wrapper/mutex.h"
+
+#include "FreeRTOS.h"
+#include "semphr.h"
+#include "mpu_wrappers.h"
+
+#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+	/*
+	 * In the static allocation, the RAM is required to hold the semaphore's
+	 * state.
+	 */
+	StaticSemaphore_t xSecureMutexBuffer;
+#endif
+
+void * os_wrapper_mutex_create( void )
+{
+SemaphoreHandle_t xMutexHandle = NULL;
+
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+	xMutexHandle = xSemaphoreCreateMutex();
+#elif( configSUPPORT_STATIC_ALLOCATION == 1 )
+	xMutexHandle = xSemaphoreCreateMutexStatic( &xSecureMutexBuffer );
+#endif
+	return ( void * ) xMutexHandle;
+}
+/*-----------------------------------------------------------*/
+
+uint32_t os_wrapper_mutex_acquire( void * handle, uint32_t timeout )
+{
+BaseType_t xRet;
+
+	if( ! handle )
+		return OS_WRAPPER_ERROR;
+
+	xRet = xSemaphoreTake( ( SemaphoreHandle_t ) handle,
+						   ( timeout == OS_WRAPPER_WAIT_FOREVER ) ?
+                           portMAX_DELAY : ( TickType_t ) timeout );
+
+	if( xRet != pdPASS )
+		return OS_WRAPPER_ERROR;
+	else
+		return OS_WRAPPER_SUCCESS;
+}
+/*-----------------------------------------------------------*/
+
+uint32_t os_wrapper_mutex_release( void * handle )
+{
+BaseType_t xRet;
+
+	if( !handle )
+		return OS_WRAPPER_ERROR;
+
+	xRet = xSemaphoreGive( ( SemaphoreHandle_t ) handle );
+
+	if( xRet != pdPASS )
+		return OS_WRAPPER_ERROR;
+	else
+		return OS_WRAPPER_SUCCESS;
+}
+/*-----------------------------------------------------------*/
+
+uint32_t os_wrapper_mutex_delete( void * handle )
+{
+	vSemaphoreDelete( ( SemaphoreHandle_t ) handle );
+
+	return OS_WRAPPER_SUCCESS;
+}
+/*-----------------------------------------------------------*/
diff --git a/portable/GCC/ATmegaxxxx/port.c b/portable/ThirdParty/GCC/ATmega/port.c
similarity index 98%
rename from portable/GCC/ATmegaxxxx/port.c
rename to portable/ThirdParty/GCC/ATmega/port.c
index 270319ce8..f3caee95a 100644
--- a/portable/GCC/ATmegaxxxx/port.c
+++ b/portable/ThirdParty/GCC/ATmega/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -619,16 +619,7 @@ BaseType_t xPortStartScheduler( void )
 
 void vPortEndScheduler( void )
 {
-    /* It is unlikely that the AVR port will get stopped.  If required simply
-    disable the tick interrupt here. */
-
-#if defined (portUSE_WDTO)
-        wdt_disable();                                          /* disable Watchdog Timer */
-
-#elif defined( portUSE_TIMER0 )
-        portTIMSK &= ~( _BV(OCIE0B)|_BV(OCIE0A)|_BV(TOIE0) );   /* disable all Timer0 interrupts */
-
-#endif
+	/* It is unlikely that the ATmega port will get stopped. */
 }
 /*-----------------------------------------------------------*/
 
diff --git a/portable/GCC/ATmegaxxxx/portmacro.h b/portable/ThirdParty/GCC/ATmega/portmacro.h
similarity index 98%
rename from portable/GCC/ATmegaxxxx/portmacro.h
rename to portable/ThirdParty/GCC/ATmega/portmacro.h
index b6b512874..434e96d6a 100644
--- a/portable/GCC/ATmegaxxxx/portmacro.h
+++ b/portable/ThirdParty/GCC/ATmega/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
 */
diff --git a/portable/GCC/ATmegaxxxx/readme.md b/portable/ThirdParty/GCC/ATmega/readme.md
similarity index 100%
rename from portable/GCC/ATmegaxxxx/readme.md
rename to portable/ThirdParty/GCC/ATmega/readme.md
diff --git a/portable/ThirdParty/GCC/Posix/FreeRTOS-simulator-for-Linux.url b/portable/ThirdParty/GCC/Posix/FreeRTOS-simulator-for-Linux.url
new file mode 100644
index 000000000..60f7ee8c3
--- /dev/null
+++ b/portable/ThirdParty/GCC/Posix/FreeRTOS-simulator-for-Linux.url
@@ -0,0 +1,5 @@
+[{000214A0-0000-0000-C000-000000000046}]
+Prop3=19,11
+[InternetShortcut]
+IDList=
+URL=https://www.freertos.org/FreeRTOS-simulator-for-Linux.html
diff --git a/portable/ThirdParty/GCC/Posix/port.c b/portable/ThirdParty/GCC/Posix/port.c
index bae6e2f84..086ad487a 100644
--- a/portable/ThirdParty/GCC/Posix/port.c
+++ b/portable/ThirdParty/GCC/Posix/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Cambridge Consultants Ltd.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
@@ -33,8 +33,8 @@
  * running are blocked in sigwait().
  *
  * Task switch is done by resuming the thread for the next task by
- * sending it the resume signal (SIGUSR1) and then suspending the
- * current thread.
+ * signaling the condition variable and then waiting on a condition variable
+ * with the current thread.
  *
  * The timer interrupt uses SIGALRM and care is taken to ensure that
  * the signal handler runs only on the thread for the current task.
@@ -44,9 +44,6 @@
  * deadlocks as the FreeRTOS kernel can switch tasks while they're
  * holding a pthread mutex.
  *
- * Replacement malloc(), free(), calloc(), and realloc() are provided
- * for glibc (see below for more information).
- *
  * stdio (printf() and friends) should be called from a single task
  * only or serialized with a FreeRTOS primitive such as a binary
  * semaphore or mutex.
@@ -65,6 +62,7 @@
 /* Scheduler includes. */
 #include "FreeRTOS.h"
 #include "task.h"
+#include "utils/wait_for_event.h"
 /*-----------------------------------------------------------*/
 
 #define SIG_RESUME SIGUSR1
@@ -75,6 +73,7 @@ typedef struct THREAD
 	pdTASK_CODE pxCode;
 	void *pvParams;
 	BaseType_t xDying;
+	struct event *ev;
 } Thread_t;
 
 /*
@@ -104,82 +103,14 @@ static portBASE_TYPE xSchedulerEnd = pdFALSE;
 static void prvSetupSignalsAndSchedulerPolicy( void );
 static void prvSetupTimerInterrupt( void );
 static void *prvWaitForStart( void * pvParams );
-static void prvSwitchThread( Thread_t *xThreadToResume, Thread_t *xThreadToSuspend );
-static void prvSuspendSelf( void );
-static void prvResumeThread( pthread_t xThreadId );
+static void prvSwitchThread( Thread_t * xThreadToResume,
+                             Thread_t *xThreadToSuspend );
+static void prvSuspendSelf( Thread_t * thread);
+static void prvResumeThread( Thread_t * xThreadId );
 static void vPortSystemTickHandler( int sig );
 static void vPortStartFirstTask( void );
 /*-----------------------------------------------------------*/
 
-/*
- * The standard glibc malloc(), free() etc. take an internal lock so
- * it is not safe to switch tasks while calling them.
- *
- * Requiring the application use the safe xPortMalloc() and
- * vPortFree() is not sufficient as malloc() is used internally by
- * glibc (e.g., by strdup() and the pthread library.)
- *
- * To further complicate things malloc() and free() may be called
- * outside of task context during pthread destruction so using
- * vTaskSuspend() and xTaskResumeAll() cannot be used.
- * vPortEnterCritical() and vPortExitCritical() cannot be used either
- * as they use global state for the critical section nesting (this
- * cannot be fixed by using TLS as pthread destruction needs to free
- * the TLS).
- *
- * Explicitly save/disable and restore the signal mask to block the
- * timer (SIGALRM) and other signals.
- */
-
-extern void *__libc_malloc(size_t);
-extern void __libc_free(void *);
-extern void *__libc_calloc(size_t, size_t);
-extern void *__libc_realloc(void *ptr, size_t);
-
-void *malloc(size_t size)
-{
-sigset_t xSavedSignals;
-void *ptr;
-
-	pthread_sigmask( SIG_BLOCK, &xAllSignals, &xSavedSignals );
-	ptr = __libc_malloc( size );
-	pthread_sigmask( SIG_SETMASK, &xSavedSignals, NULL );
-
-	return ptr;
-}
-
-void free(void *ptr)
-{
-sigset_t xSavedSignals;
-
-	pthread_sigmask( SIG_BLOCK, &xAllSignals, &xSavedSignals );
-	__libc_free( ptr );
-	pthread_sigmask( SIG_SETMASK, &xSavedSignals, NULL );
-}
-
-void *calloc(size_t nmemb, size_t size)
-{
-sigset_t xSavedSignals;
-void *ptr;
-
-	pthread_sigmask( SIG_BLOCK, &xAllSignals, &xSavedSignals );
-	ptr = __libc_calloc( nmemb, size );
-	pthread_sigmask( SIG_SETMASK, &xSavedSignals, NULL );
-
-	return ptr;
-}
-
-void *realloc(void *ptr, size_t size)
-{
-sigset_t xSavedSignals;
-
-	pthread_sigmask( SIG_BLOCK, &xAllSignals, &xSavedSignals );
-	ptr = __libc_realloc( ptr, size );
-	pthread_sigmask( SIG_SETMASK, &xSavedSignals, NULL );
-
-	return ptr;
-}
-
 static void prvFatalError( const char *pcCall, int iErrno )
 {
 	fprintf( stderr, "%s: %s\n", pcCall, strerror( iErrno ) );
@@ -214,6 +145,8 @@ int iRet;
 	pthread_attr_init( &xThreadAttributes );
 	pthread_attr_setstack( &xThreadAttributes, pxEndOfStack, ulStackSize );
 
+	thread->ev = event_create();
+
 	vPortEnterCritical();
 
 	iRet = pthread_create( &thread->pthread, &xThreadAttributes,
@@ -234,7 +167,7 @@ void vPortStartFirstTask( void )
 Thread_t *pxFirstThread = prvGetThreadFromTask( xTaskGetCurrentTaskHandle() );
 
 	/* Start the first task. */
-	prvResumeThread( pxFirstThread->pthread );
+	prvResumeThread( pxFirstThread );
 }
 /*-----------------------------------------------------------*/
 
@@ -248,8 +181,8 @@ sigset_t xSignals;
 
 	hMainThread = pthread_self();
 
-	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-	here already. */
+	/* Start the timer that generates the tick ISR(SIGALRM).
+	   Interrupts are disabled here already. */
 	prvSetupTimerInterrupt();
 
 	/* Start the first task. */
@@ -275,22 +208,28 @@ void vPortEndScheduler( void )
 {
 struct itimerval itimer;
 struct sigaction sigtick;
+Thread_t *xCurrentThread;
 
 	/* Stop the timer and ignore any pending SIGALRMs that would end
 	 * up running on the main thread when it is resumed. */
 	itimer.it_value.tv_sec = 0;
 	itimer.it_value.tv_usec = 0;
+
+	itimer.it_interval.tv_sec = 0;
+	itimer.it_interval.tv_usec = 0;
 	(void)setitimer( ITIMER_REAL, &itimer, NULL );
 
 	sigtick.sa_flags = 0;
 	sigtick.sa_handler = SIG_IGN;
+	sigemptyset( &sigtick.sa_mask );
 	sigaction( SIGALRM, &sigtick, NULL );
 
 	/* Signal the scheduler to exit its loop. */
 	xSchedulerEnd = pdTRUE;
 	(void)pthread_kill( hMainThread, SIG_RESUME );
 
-	prvSuspendSelf();
+	xCurrentThread = prvGetThreadFromTask( xTaskGetCurrentTaskHandle() );
+	prvSuspendSelf(xCurrentThread);
 }
 /*-----------------------------------------------------------*/
 
@@ -421,16 +360,21 @@ uint64_t xExpectedTicks;
 
 	uxCriticalNesting++; /* Signals are blocked in this signal handler. */
 
+#if ( configUSE_PREEMPTION == 1 )
 	pxThreadToSuspend = prvGetThreadFromTask( xTaskGetCurrentTaskHandle() );
+#endif
 
 	/* Tick Increment, accounting for any lost signals or drift in
 	 * the timer. */
-	xExpectedTicks = (prvGetTimeNs() - prvStartTimeNs)
-		/ (portTICK_RATE_MICROSECONDS * 1000);
-	do {
+/*
+ *      Comment code to adjust timing according to full demo requirements
+ *      xExpectedTicks = (prvGetTimeNs() - prvStartTimeNs)
+ *		/ (portTICK_RATE_MICROSECONDS * 1000);
+ * do { */
 		xTaskIncrementTick();
-		prvTickCount++;
-	} while (prvTickCount < xExpectedTicks);
+/*		prvTickCount++;
+ *	} while (prvTickCount < xExpectedTicks);
+*/
 
 #if ( configUSE_PREEMPTION == 1 )
 	/* Select Next Task. */
@@ -457,8 +401,7 @@ void vPortCancelThread( void *pxTaskToDelete )
 Thread_t *pxThreadToCancel = prvGetThreadFromTask( pxTaskToDelete );
 
 	/*
-	 * The thread has already been suspended so it can be safely
-	 * cancelled.
+	 * The thread has already been suspended so it can be safely cancelled.
 	 */
 	pthread_cancel( pxThreadToCancel->pthread );
 	pthread_join( pxThreadToCancel->pthread, NULL );
@@ -469,7 +412,7 @@ static void *prvWaitForStart( void * pvParams )
 {
 Thread_t *pxThread = pvParams;
 
-	prvSuspendSelf();
+	prvSuspendSelf(pxThread);
 
 	/* Resumed for the first time, unblocks all signals. */
 	uxCriticalNesting = 0;
@@ -498,24 +441,25 @@ BaseType_t uxSavedCriticalNesting;
 		 */
 		uxSavedCriticalNesting = uxCriticalNesting;
 
-		prvResumeThread( pxThreadToResume->pthread );
+		prvResumeThread( pxThreadToResume );
 		if ( pxThreadToSuspend->xDying )
 		{
+			event_delete(pxThreadToSuspend->ev);
 			pthread_exit( NULL );
 		}
-		prvSuspendSelf();
+		prvSuspendSelf( pxThreadToSuspend );
 
 		uxCriticalNesting = uxSavedCriticalNesting;
 	}
 }
 /*-----------------------------------------------------------*/
 
-static void prvSuspendSelf( void )
+static void prvSuspendSelf( Thread_t *thread )
 {
 int iSig;
 
 	/*
-	 * Suspend this thread by waiting for a SIG_RESUME signal.
+	 * Suspend this thread by waiting for a pthread_cond_signal event.
 	 *
 	 * A suspended thread must not handle signals (interrupts) so
 	 * all signals must be blocked by calling this from:
@@ -526,17 +470,17 @@ int iSig;
 	 * - From a signal handler that has all signals masked.
 	 *
 	 * - A thread with all signals blocked with pthread_sigmask().
-	 */
-	sigwait( &xResumeSignals, &iSig );
+        */
+    event_wait(thread->ev);
 }
 
 /*-----------------------------------------------------------*/
 
-static void prvResumeThread( pthread_t xThreadId )
+static void prvResumeThread( Thread_t *xThreadId )
 {
-	if ( pthread_self() != xThreadId )
+	if ( pthread_self() != xThreadId->pthread )
 	{
-		pthread_kill( xThreadId, SIG_RESUME );
+		event_signal(xThreadId->ev);
 	}
 }
 /*-----------------------------------------------------------*/
diff --git a/portable/ThirdParty/GCC/Posix/portmacro.h b/portable/ThirdParty/GCC/Posix/portmacro.h
index 8046cbc8f..e0a5959af 100644
--- a/portable/ThirdParty/GCC/Posix/portmacro.h
+++ b/portable/ThirdParty/GCC/Posix/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.4.1
  * Copyright 2020 Cambridge Consultants Ltd.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/ThirdParty/GCC/Posix/utils/wait_for_event.c b/portable/ThirdParty/GCC/Posix/utils/wait_for_event.c
new file mode 100644
index 000000000..896604a53
--- /dev/null
+++ b/portable/ThirdParty/GCC/Posix/utils/wait_for_event.c
@@ -0,0 +1,76 @@
+#include 
+#include 
+#include 
+
+#include "wait_for_event.h"
+
+struct event
+{
+    pthread_mutex_t mutex;
+    pthread_cond_t cond;
+    bool event_triggered;
+};
+
+struct event * event_create()
+{
+    struct event * ev = malloc( sizeof( struct event ) );
+
+    ev->event_triggered = false;
+    pthread_mutex_init( &ev->mutex, NULL );
+    pthread_cond_init( &ev->cond, NULL );
+    return ev;
+}
+
+void event_delete( struct event * ev )
+{
+    pthread_mutex_destroy( &ev->mutex );
+    pthread_cond_destroy( &ev->cond );
+    free( ev );
+}
+
+bool event_wait( struct event * ev )
+{
+    pthread_mutex_lock( &ev->mutex );
+
+    while( ev->event_triggered == false )
+    {
+        pthread_cond_wait( &ev->cond, &ev->mutex );
+    }
+
+    ev->event_triggered = false;
+    pthread_mutex_unlock( &ev->mutex );
+    return true;
+}
+bool event_wait_timed( struct event * ev,
+                       time_t ms )
+{
+    struct timespec ts;
+    int ret = 0;
+
+    clock_gettime( CLOCK_REALTIME, &ts );
+    //ts.tv_sec += ms;
+    ts.tv_nsec += (ms * 1000000);
+    pthread_mutex_lock( &ev->mutex );
+
+    while( (ev->event_triggered == false) && (ret == 0) )
+    {
+        ret = pthread_cond_timedwait( &ev->cond, &ev->mutex, &ts );
+
+        if( ( ret == -1 ) && ( errno == ETIMEDOUT ) )
+        {
+            return false;
+        }
+    }
+
+    ev->event_triggered = false;
+    pthread_mutex_unlock( &ev->mutex );
+    return true;
+}
+
+void event_signal( struct event * ev )
+{
+    pthread_mutex_lock( &ev->mutex );
+    ev->event_triggered = true;
+    pthread_cond_signal( &ev->cond );
+    pthread_mutex_unlock( &ev->mutex );
+}
diff --git a/portable/ThirdParty/GCC/Posix/utils/wait_for_event.h b/portable/ThirdParty/GCC/Posix/utils/wait_for_event.h
new file mode 100644
index 000000000..2693a0d8c
--- /dev/null
+++ b/portable/ThirdParty/GCC/Posix/utils/wait_for_event.h
@@ -0,0 +1,18 @@
+#ifndef _WAIT_FOR_EVENT_H_
+#define _WAIT_FOR_EVENT_H_
+
+#include 
+#include 
+
+struct event;
+
+struct event * event_create();
+void event_delete( struct event * );
+bool event_wait( struct event * ev );
+bool event_wait_timed( struct event * ev,
+                       time_t ms );
+void event_signal( struct event * ev );
+
+
+
+#endif /* ifndef _WAIT_FOR_EVENT_H_ */
diff --git a/portable/ThirdParty/GCC/RISC-V/README-for-info-on-official-MIT-license-port.txt b/portable/ThirdParty/GCC/RISC-V/README-for-info-on-official-MIT-license-port.txt
index a404a5c3b..bc15d1279 100644
--- a/portable/ThirdParty/GCC/RISC-V/README-for-info-on-official-MIT-license-port.txt
+++ b/portable/ThirdParty/GCC/RISC-V/README-for-info-on-official-MIT-license-port.txt
@@ -2,5 +2,5 @@ The official and MIT licensed FreeRTOS ports for RISC-V are located in the follo
 \FreeRTOS\Source\portable\GCC\RISC-V
 \FreeRTOS\Source\portable\IAR\RISC-V
 
-Also so https://www.freertos.org/Using-FreeRTOS-on-RISC-V.html
+Also so https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
 
diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/FreeRTOS-openocd.c b/portable/ThirdParty/GCC/Xtensa_ESP32/FreeRTOS-openocd.c
index be72a04c0..e9bff32fc 100644
--- a/portable/ThirdParty/GCC/Xtensa_ESP32/FreeRTOS-openocd.c
+++ b/portable/ThirdParty/GCC/Xtensa_ESP32/FreeRTOS-openocd.c
@@ -14,11 +14,11 @@
 #include "sdkconfig.h"
 
 #ifdef __GNUC__
-#define USED __attribute__((used))
+    #define USED    __attribute__( ( used ) )
 #else
-#define USED
+    #define USED
 #endif
 
 #ifdef CONFIG_ESP32_DEBUG_OCDAWARE
-const int USED DRAM_ATTR uxTopUsedPriority = configMAX_PRIORITIES - 1;
+    const int USED DRAM_ATTR uxTopUsedPriority = configMAX_PRIORITIES - 1;
 #endif
diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/include/portbenchmark.h b/portable/ThirdParty/GCC/Xtensa_ESP32/include/portbenchmark.h
index aaddd9206..ce34b97b9 100644
--- a/portable/ThirdParty/GCC/Xtensa_ESP32/include/portbenchmark.h
+++ b/portable/ThirdParty/GCC/Xtensa_ESP32/include/portbenchmark.h
@@ -1,26 +1,26 @@
 /*******************************************************************************
-// Copyright (c) 2003-2015 Cadence Design Systems, Inc.
-//
-// Permission is hereby granted, free of charge, to any person obtaining
-// a copy of this software and associated documentation files (the
-// "Software"), to deal in the Software without restriction, including
-// without limitation the rights to use, copy, modify, merge, publish,
-// distribute, sublicense, and/or sell copies of the Software, and to
-// permit persons to whom the Software is furnished to do so, subject to
-// the following conditions:
-//
-// The above copyright notice and this permission notice shall be included
-// in all copies or substantial portions of the Software.
-//
-// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
-// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
-// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
-// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
-// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
---------------------------------------------------------------------------------
-*/
+ * // Copyright (c) 2003-2015 Cadence Design Systems, Inc.
+ * //
+ * // Permission is hereby granted, free of charge, to any person obtaining
+ * // a copy of this software and associated documentation files (the
+ * // "Software"), to deal in the Software without restriction, including
+ * // without limitation the rights to use, copy, modify, merge, publish,
+ * // distribute, sublicense, and/or sell copies of the Software, and to
+ * // permit persons to whom the Software is furnished to do so, subject to
+ * // the following conditions:
+ * //
+ * // The above copyright notice and this permission notice shall be included
+ * // in all copies or substantial portions of the Software.
+ * //
+ * // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * // EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * // MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * // IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * // CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * // TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * // SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * --------------------------------------------------------------------------------
+ */
 
 /*
  * This utility helps benchmarking interrupt latency and context switches.
@@ -37,7 +37,7 @@
 #endif
 
 #define portbenchmarkINTERRUPT_DISABLE()
-#define portbenchmarkINTERRUPT_RESTORE(newstate)
+#define portbenchmarkINTERRUPT_RESTORE( newstate )
 #define portbenchmarkIntLatency()
 #define portbenchmarkIntWait()
 #define portbenchmarkReset()
diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/include/portmacro.h b/portable/ThirdParty/GCC/Xtensa_ESP32/include/portmacro.h
index 2b5702b55..7835eab74 100644
--- a/portable/ThirdParty/GCC/Xtensa_ESP32/include/portmacro.h
+++ b/portable/ThirdParty/GCC/Xtensa_ESP32/include/portmacro.h
@@ -1,91 +1,93 @@
 /*
-    FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd.
-    All rights reserved
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that has become a de facto standard.             *
-     *                                                                       *
-     *    Help yourself get started quickly and support the FreeRTOS         *
-     *    project by purchasing a FreeRTOS tutorial book, reference          *
-     *    manual, or both from: http://www.FreeRTOS.org/Documentation        *
-     *                                                                       *
-     *    Thank you!                                                         *
-     *                                                                       *
-    ***************************************************************************
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
-
-    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
-    >>!   distribute a combined work that includes FreeRTOS without being   !<<
-    >>!   obliged to provide the source code for proprietary components     !<<
-    >>!   outside of the FreeRTOS kernel.                                   !<<
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available from the following
-    link: http://www.freertos.org/a00114.html
-
-    1 tab == 4 spaces!
-
-    ***************************************************************************
-     *                                                                       *
-     *    Having a problem?  Start by reading the FAQ "My application does   *
-     *    not run, what could be wrong?"                                     *
-     *                                                                       *
-     *    http://www.FreeRTOS.org/FAQHelp.html                               *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org - Documentation, books, training, latest versions,
-    license and Real Time Engineers Ltd. contact details.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
-    Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
+ *  FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd.
+ *  All rights reserved
+ *
+ *  VISIT https://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
+ *
+ ***************************************************************************
+ *                                                                       *
+ *    FreeRTOS provides completely free yet professionally developed,    *
+ *    robust, strictly quality controlled, supported, and cross          *
+ *    platform software that has become a de facto standard.             *
+ *                                                                       *
+ *    Help yourself get started quickly and support the FreeRTOS         *
+ *    project by purchasing a FreeRTOS tutorial book, reference          *
+ *    manual, or both from: https://www.FreeRTOS.org/Documentation       *
+ *                                                                       *
+ *    Thank you!                                                         *
+ *                                                                       *
+ ***************************************************************************
+ *
+ *  This file is part of the FreeRTOS distribution.
+ *
+ *  FreeRTOS is free software; you can redistribute it and/or modify it under
+ *  the terms of the GNU General Public License (version 2) as published by the
+ *  Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+ *
+ *  >>!   NOTE: The modification to the GPL is included to allow you to     !<<
+ *  >>!   distribute a combined work that includes FreeRTOS without being   !<<
+ *  >>!   obliged to provide the source code for proprietary components     !<<
+ *  >>!   outside of the FreeRTOS kernel.                                   !<<
+ *
+ *  FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
+ *  WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ *  FOR A PARTICULAR PURPOSE.  Full license text is available from the following
+ *  link: https://www.FreeRTOS.org/a00114.html
+ *
+ *
+ ***************************************************************************
+ *                                                                       *
+ *    Having a problem?  Start by reading the FAQ "My application does   *
+ *    not run, what could be wrong?"                                     *
+ *                                                                       *
+ *    https://www.FreeRTOS.org/FAQHelp.html                              *
+ *                                                                       *
+ ***************************************************************************
+ *
+ *  https://www.FreeRTOS.org - Documentation, books, training, latest versions,
+ *  license and Real Time Engineers Ltd. contact details.
+ *
+ *  https://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
+ *  including FreeRTOS+Trace - an indispensable productivity tool, a DOS
+ *  compatible FAT file system, and our tiny thread aware UDP/IP stack.
+ *
+ *  https://www.highintegritysystems.com/openrtos/ - Real Time Engineers ltd
+ *  license FreeRTOS to High Integrity Systems to sell under the OpenRTOS brand.
+ *  Low cost OpenRTOS licenses offer ticketed support, indemnification
+ *  and middleware.
+ *
+ *  https://www.highintegritysystems.com/safertos/ - High Integrity Systems
+ *  also provide a safety engineered and independently SIL3 certified version
+ *  for use in safety and mission critical applications that require
+ *  provable dependability.
+ *
+ */
 
 #ifndef PORTMACRO_H
 #define PORTMACRO_H
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
-extern "C" {
+    extern "C" {
 #endif
+/* *INDENT-ON* */
 
 #ifndef __ASSEMBLER__
 
-#include 
+    #include 
 
-#include 
-#include 
-#include 	/* required for XSHAL_CLIB */
-#include 
-#include "esp_timer.h"              /* required for FreeRTOS run time stats */
-#include "esp_system.h"
+    #include 
+    #include 
+    #include  /* required for XSHAL_CLIB */
+    #include 
+    #include "esp_timer.h"            /* required for FreeRTOS run time stats */
+    #include "esp_system.h"
 
 
-#include 
-#include "soc/soc_memory_layout.h"
+    #include 
+    #include "soc/soc_memory_layout.h"
 
-//#include "xtensa_context.h"
+/*#include "xtensa_context.h" */
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -99,117 +101,122 @@ extern "C" {
 
 /* Type definitions. */
 
-#define portCHAR		int8_t
-#define portFLOAT		float
-#define portDOUBLE		double
-#define portLONG		int32_t
-#define portSHORT		int16_t
-#define portSTACK_TYPE	uint8_t
-#define portBASE_TYPE	int
+    #define portCHAR          int8_t
+    #define portFLOAT         float
+    #define portDOUBLE        double
+    #define portLONG          int32_t
+    #define portSHORT         int16_t
+    #define portSTACK_TYPE    uint8_t
+    #define portBASE_TYPE     int
 
-typedef portSTACK_TYPE			StackType_t;
-typedef portBASE_TYPE			BaseType_t;
-typedef unsigned portBASE_TYPE	UBaseType_t;
+    typedef portSTACK_TYPE           StackType_t;
+    typedef portBASE_TYPE            BaseType_t;
+    typedef unsigned portBASE_TYPE   UBaseType_t;
 
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
-#endif
+    #if ( configUSE_16_BIT_TICKS == 1 )
+        typedef uint16_t             TickType_t;
+        #define portMAX_DELAY    ( TickType_t ) 0xffff
+    #else
+        typedef uint32_t             TickType_t;
+        #define portMAX_DELAY    ( TickType_t ) 0xffffffffUL
+    #endif
 /*-----------------------------------------------------------*/
 
-// portbenchmark
-#include "portbenchmark.h"
+/* portbenchmark */
+    #include "portbenchmark.h"
 
-#include "sdkconfig.h"
-#include "esp_attr.h"
+    #include "sdkconfig.h"
+    #include "esp_attr.h"
 
 /* "mux" data structure (spinlock) */
-typedef struct {
-	/* owner field values:
-	 * 0                - Uninitialized (invalid)
-	 * portMUX_FREE_VAL - Mux is free, can be locked by either CPU
-	 * CORE_ID_PRO / CORE_ID_APP - Mux is locked to the particular core
-	 *
-	 * Any value other than portMUX_FREE_VAL, CORE_ID_PRO, CORE_ID_APP indicates corruption
-	 */
-	uint32_t owner;
-	/* count field:
-	 * If mux is unlocked, count should be zero.
-	 * If mux is locked, count is non-zero & represents the number of recursive locks on the mux.
-	 */
-	uint32_t count;
-#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
-	const char *lastLockedFn;
-	int lastLockedLine;
-#endif
-} portMUX_TYPE;
+    typedef struct
+    {
+        /* owner field values:
+         * 0                - Uninitialized (invalid)
+         * portMUX_FREE_VAL - Mux is free, can be locked by either CPU
+         * CORE_ID_PRO / CORE_ID_APP - Mux is locked to the particular core
+         *
+         * Any value other than portMUX_FREE_VAL, CORE_ID_PRO, CORE_ID_APP indicates corruption
+         */
+        uint32_t owner;
 
-#define portMUX_FREE_VAL		0xB33FFFFF
+        /* count field:
+         * If mux is unlocked, count should be zero.
+         * If mux is locked, count is non-zero & represents the number of recursive locks on the mux.
+         */
+        uint32_t count;
+        #ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
+            const char * lastLockedFn;
+            int lastLockedLine;
+        #endif
+    } portMUX_TYPE;
+
+    #define portMUX_FREE_VAL      0xB33FFFFF
 
 /* Special constants for vPortCPUAcquireMutexTimeout() */
-#define portMUX_NO_TIMEOUT      (-1)  /* When passed for 'timeout_cycles', spin forever if necessary */
-#define portMUX_TRY_LOCK        0     /* Try to acquire the spinlock a single time only */
+    #define portMUX_NO_TIMEOUT    ( -1 ) /* When passed for 'timeout_cycles', spin forever if necessary */
+    #define portMUX_TRY_LOCK      0      /* Try to acquire the spinlock a single time only */
 
-// Keep this in sync with the portMUX_TYPE struct definition please.
-#ifndef CONFIG_FREERTOS_PORTMUX_DEBUG
-#define portMUX_INITIALIZER_UNLOCKED {					\
-		.owner = portMUX_FREE_VAL,						\
-		.count = 0,										\
-	}
-#else
-#define portMUX_INITIALIZER_UNLOCKED {					\
-		.owner = portMUX_FREE_VAL,						\
-		.count = 0,										\
-		.lastLockedFn = "(never locked)",				\
-		.lastLockedLine = -1							\
-	}
-#endif
+/* Keep this in sync with the portMUX_TYPE struct definition please. */
+    #ifndef CONFIG_FREERTOS_PORTMUX_DEBUG
+        #define portMUX_INITIALIZER_UNLOCKED \
+    {                                        \
+        .owner = portMUX_FREE_VAL,           \
+        .count = 0,                          \
+    }
+    #else
+        #define portMUX_INITIALIZER_UNLOCKED \
+    {                                        \
+        .owner = portMUX_FREE_VAL,           \
+        .count = 0,                          \
+        .lastLockedFn = "(never locked)",    \
+        .lastLockedLine = -1                 \
+    }
+    #endif /* ifndef CONFIG_FREERTOS_PORTMUX_DEBUG */
 
 
-#define portASSERT_IF_IN_ISR()        vPortAssertIfInISR()
-void vPortAssertIfInISR();
+    #define portASSERT_IF_IN_ISR()    vPortAssertIfInISR()
+    void vPortAssertIfInISR();
 
-#define portCRITICAL_NESTING_IN_TCB 1
+    #define portCRITICAL_NESTING_IN_TCB    1
 
 /*
-Modifications to portENTER_CRITICAL.
+ * Modifications to portENTER_CRITICAL.
+ *
+ * For an introduction, see "Critical Sections & Disabling Interrupts" in docs/api-guides/freertos-smp.rst
+ *
+ * The original portENTER_CRITICAL only disabled the ISRs. This is enough for single-CPU operation: by
+ * disabling the interrupts, there is no task switch so no other tasks can meddle in the data, and because
+ * interrupts are disabled, ISRs can't corrupt data structures either.
+ *
+ * For multiprocessing, things get a bit more hairy. First of all, disabling the interrupts doesn't stop
+ * the tasks or ISRs on the other processors meddling with our CPU. For tasks, this is solved by adding
+ * a spinlock to the portENTER_CRITICAL macro. A task running on the other CPU accessing the same data will
+ * spinlock in the portENTER_CRITICAL code until the first CPU is done.
+ *
+ * For ISRs, we now also need muxes: while portENTER_CRITICAL disabling interrupts will stop ISRs on the same
+ * CPU from meddling with the data, it does not stop interrupts on the other cores from interfering with the
+ * data. For this, we also use a spinlock in the routines called by the ISR, but these spinlocks
+ * do not disable the interrupts (because they already are).
+ *
+ * This all assumes that interrupts are either entirely disabled or enabled. Interrupt priority levels
+ * will break this scheme.
+ *
+ * Remark: For the ESP32, portENTER_CRITICAL and portENTER_CRITICAL_ISR both alias vTaskEnterCritical, meaning
+ * that either function can be called both from ISR as well as task context. This is not standard FreeRTOS
+ * behaviour; please keep this in mind if you need any compatibility with other FreeRTOS implementations.
+ */
+    void vPortCPUInitializeMutex( portMUX_TYPE * mux );
+    #ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
+        #error CONFIG_FREERTOS_PORTMUX_DEBUG not supported in Amazon FreeRTOS
+    #endif
 
-For an introduction, see "Critical Sections & Disabling Interrupts" in docs/api-guides/freertos-smp.rst
-
-The original portENTER_CRITICAL only disabled the ISRs. This is enough for single-CPU operation: by
-disabling the interrupts, there is no task switch so no other tasks can meddle in the data, and because
-interrupts are disabled, ISRs can't corrupt data structures either.
-
-For multiprocessing, things get a bit more hairy. First of all, disabling the interrupts doesn't stop
-the tasks or ISRs on the other processors meddling with our CPU. For tasks, this is solved by adding
-a spinlock to the portENTER_CRITICAL macro. A task running on the other CPU accessing the same data will
-spinlock in the portENTER_CRITICAL code until the first CPU is done.
-
-For ISRs, we now also need muxes: while portENTER_CRITICAL disabling interrupts will stop ISRs on the same
-CPU from meddling with the data, it does not stop interrupts on the other cores from interfering with the
-data. For this, we also use a spinlock in the routines called by the ISR, but these spinlocks
-do not disable the interrupts (because they already are).
-
-This all assumes that interrupts are either entirely disabled or enabled. Interrupt priority levels
-will break this scheme.
-
-Remark: For the ESP32, portENTER_CRITICAL and portENTER_CRITICAL_ISR both alias vTaskEnterCritical, meaning
-that either function can be called both from ISR as well as task context. This is not standard FreeRTOS 
-behaviour; please keep this in mind if you need any compatibility with other FreeRTOS implementations.
-*/
-void vPortCPUInitializeMutex(portMUX_TYPE *mux);
-#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
-#error CONFIG_FREERTOS_PORTMUX_DEBUG not supported in Amazon FreeRTOS
-#endif
-
-void vTaskExitCritical();
-void vTaskEnterCritical();
-static inline void vPortConsumeSpinlockArg(int unused, ...)
-{
-}
+    void vTaskExitCritical();
+    void vTaskEnterCritical();
+    static inline void vPortConsumeSpinlockArg( int unused,
+                                                ... )
+    {
+    }
 
 /** @brief Acquire a portmux spinlock with a timeout
  *
@@ -219,66 +226,73 @@ static inline void vPortConsumeSpinlockArg(int unused, ...)
  *
  * @return true if mutex is successfully acquired, false on timeout.
  */
-bool vPortCPUAcquireMutexTimeout(portMUX_TYPE *mux, int timeout_cycles);
-void vPortCPUReleaseMutex(portMUX_TYPE *mux);
+    bool vPortCPUAcquireMutexTimeout( portMUX_TYPE * mux,
+                                      int timeout_cycles );
+    void vPortCPUReleaseMutex( portMUX_TYPE * mux );
 
-#define portENTER_CRITICAL(...)        do { vTaskEnterCritical(); vPortConsumeSpinlockArg(0, ##__VA_ARGS__); } while(0)
-#define portEXIT_CRITICAL(...)         do { vTaskExitCritical(); vPortConsumeSpinlockArg(0, ##__VA_ARGS__); } while(0)
+    #define portENTER_CRITICAL( ... )        do { vTaskEnterCritical(); vPortConsumeSpinlockArg( 0, ## __VA_ARGS__ ); } while( 0 )
+    #define portEXIT_CRITICAL( ... )         do { vTaskExitCritical(); vPortConsumeSpinlockArg( 0, ## __VA_ARGS__ ); } while( 0 )
 
 
-#define portENTER_CRITICAL_ISR(mux)    vPortCPUAcquireMutexTimeout(mux, portMUX_NO_TIMEOUT)
-#define portEXIT_CRITICAL_ISR(mux)     vPortCPUReleaseMutex(mux)
+    #define portENTER_CRITICAL_ISR( mux )    vPortCPUAcquireMutexTimeout( mux, portMUX_NO_TIMEOUT )
+    #define portEXIT_CRITICAL_ISR( mux )     vPortCPUReleaseMutex( mux )
 
-#define portENTER_CRITICAL_SAFE(mux)  do {                                             \
-                                         if (xPortInIsrContext()) {                    \
-                                             portENTER_CRITICAL_ISR(mux);              \
-                                         } else {                                      \
-                                             portENTER_CRITICAL(mux);                  \
-                                         }                                             \
-                                      } while(0)
+    #define portENTER_CRITICAL_SAFE( mux ) \
+    do {                                   \
+        if( xPortInIsrContext() ) {        \
+            portENTER_CRITICAL_ISR( mux ); \
+        }                                  \
+        else {                             \
+            portENTER_CRITICAL( mux );     \
+        }                                  \
+    } while( 0 )
 
-#define portEXIT_CRITICAL_SAFE(mux)  do {                                              \
-                                         if (xPortInIsrContext()) {                    \
-                                             portEXIT_CRITICAL_ISR(mux);               \
-                                         } else {                                      \
-                                             portEXIT_CRITICAL(mux);                   \
-                                         }                                             \
-                                      } while(0)
+    #define portEXIT_CRITICAL_SAFE( mux ) \
+    do {                                  \
+        if( xPortInIsrContext() ) {       \
+            portEXIT_CRITICAL_ISR( mux ); \
+        }                                 \
+        else {                            \
+            portEXIT_CRITICAL( mux );     \
+        }                                 \
+    } while( 0 )
 
 
-// Critical section management. NW-TODO: replace XTOS_SET_INTLEVEL with more efficient version, if any?
-// These cannot be nested. They should be used with a lot of care and cannot be called from interrupt level.
-//
-// Only applies to one CPU. See notes above & below for reasons not to use these.
-#define portDISABLE_INTERRUPTS()      do { XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL); portbenchmarkINTERRUPT_DISABLE(); } while (0)
-#define portENABLE_INTERRUPTS()       do { portbenchmarkINTERRUPT_RESTORE(0); XTOS_SET_INTLEVEL(0); } while (0)
+/* Critical section management. NW-TODO: replace XTOS_SET_INTLEVEL with more efficient version, if any? */
+/* These cannot be nested. They should be used with a lot of care and cannot be called from interrupt level. */
+/* */
+/* Only applies to one CPU. See notes above & below for reasons not to use these. */
+    #define portDISABLE_INTERRUPTS()    do { XTOS_SET_INTLEVEL( XCHAL_EXCM_LEVEL ); portbenchmarkINTERRUPT_DISABLE(); } while( 0 )
+    #define portENABLE_INTERRUPTS()     do { portbenchmarkINTERRUPT_RESTORE( 0 ); XTOS_SET_INTLEVEL( 0 ); } while( 0 )
 
-// Cleaner solution allows nested interrupts disabling and restoring via local registers or stack.
-// They can be called from interrupts too.
-// WARNING: Only applies to current CPU. See notes above.
-static inline unsigned portENTER_CRITICAL_NESTED() {
-	unsigned state = XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL);
-	portbenchmarkINTERRUPT_DISABLE();
-	return state;
-}
-#define portEXIT_CRITICAL_NESTED(state)   do { portbenchmarkINTERRUPT_RESTORE(state); XTOS_RESTORE_JUST_INTLEVEL(state); } while (0)
+/* Cleaner solution allows nested interrupts disabling and restoring via local registers or stack. */
+/* They can be called from interrupts too. */
+/* WARNING: Only applies to current CPU. See notes above. */
+    static inline unsigned portENTER_CRITICAL_NESTED()
+    {
+        unsigned state = XTOS_SET_INTLEVEL( XCHAL_EXCM_LEVEL );
 
-// These FreeRTOS versions are similar to the nested versions above
-#define portSET_INTERRUPT_MASK_FROM_ISR()            portENTER_CRITICAL_NESTED()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(state)     portEXIT_CRITICAL_NESTED(state)
+        portbenchmarkINTERRUPT_DISABLE();
+        return state;
+    }
+    #define portEXIT_CRITICAL_NESTED( state )             do { portbenchmarkINTERRUPT_RESTORE( state ); XTOS_RESTORE_JUST_INTLEVEL( state ); } while( 0 )
 
-//Because the ROM routines don't necessarily handle a stack in external RAM correctly, we force
-//the stack memory to always be internal.
-#define pvPortMallocTcbMem(size) heap_caps_malloc(size, MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT)
-#define pvPortMallocStackMem(size)  heap_caps_malloc(size, MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT)
+/* These FreeRTOS versions are similar to the nested versions above */
+    #define portSET_INTERRUPT_MASK_FROM_ISR()             portENTER_CRITICAL_NESTED()
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( state )    portEXIT_CRITICAL_NESTED( state )
 
-//xTaskCreateStatic uses these functions to check incoming memory.
-#define portVALID_TCB_MEM(ptr) (esp_ptr_internal(ptr) && esp_ptr_byte_accessible(ptr))
-#ifdef CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
-#define portVALID_STACK_MEM(ptr) esp_ptr_byte_accessible(ptr)
-#else
-#define portVALID_STACK_MEM(ptr) (esp_ptr_internal(ptr) && esp_ptr_byte_accessible(ptr))
-#endif
+/*Because the ROM routines don't necessarily handle a stack in external RAM correctly, we force */
+/*the stack memory to always be internal. */
+    #define pvPortMallocTcbMem( size )        heap_caps_malloc( size, MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT )
+    #define pvPortMallocStackMem( size )      heap_caps_malloc( size, MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT )
+
+/*xTaskCreateStatic uses these functions to check incoming memory. */
+    #define portVALID_TCB_MEM( ptr )          ( esp_ptr_internal( ptr ) && esp_ptr_byte_accessible( ptr ) )
+    #ifdef CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
+        #define portVALID_STACK_MEM( ptr )    esp_ptr_byte_accessible( ptr )
+    #else
+        #define portVALID_STACK_MEM( ptr )    ( esp_ptr_internal( ptr ) && esp_ptr_byte_accessible( ptr ) )
+    #endif
 
 /*
  * Wrapper for the Xtensa compare-and-set instruction. This subroutine will atomically compare
@@ -289,91 +303,98 @@ static inline unsigned portENTER_CRITICAL_NESTED() {
  * *bitwise inverse* of the old mem if the mem wasn't written. This doesn't seem to happen on the
  * ESP32 (portMUX assertions would fail).
  */
-static inline void uxPortCompareSet(volatile uint32_t *addr, uint32_t compare, uint32_t *set) {
-    __asm__ __volatile__ (
-        "WSR 	    %2,SCOMPARE1 \n"
-        "S32C1I     %0, %1, 0	 \n"
-        :"=r"(*set)
-        :"r"(addr), "r"(compare), "0"(*set)
-        );
-}
+        static inline void uxPortCompareSet( volatile uint32_t * addr,
+                                             uint32_t compare,
+                                             uint32_t * set )
+        {
+            __asm__ __volatile__ (
+                "WSR 	    %2,SCOMPARE1 \n"
+                "S32C1I     %0, %1, 0	 \n"
+                : "=r" ( *set )
+                : "r" ( addr ), "r" ( compare ), "0" ( *set )
+                );
+        }
 
-void uxPortCompareSetExtram(volatile uint32_t *addr, uint32_t compare, uint32_t *set);
+        void uxPortCompareSetExtram( volatile uint32_t * addr,
+                                     uint32_t compare,
+                                     uint32_t * set );
 
 /*-----------------------------------------------------------*/
 
 /* Architecture specifics. */
-#define portSTACK_GROWTH			( -1 )
-#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT			4
-#define portNOP()					XT_NOP()
+    #define portSTACK_GROWTH      ( -1 )
+    #define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+    #define portBYTE_ALIGNMENT    4
+    #define portNOP()    XT_NOP()
 /*-----------------------------------------------------------*/
 
 /* Fine resolution time */
-#define portGET_RUN_TIME_COUNTER_VALUE()  xthal_get_ccount()
-//ccount or esp_timer are initialized elsewhere
-#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()
+    #define portGET_RUN_TIME_COUNTER_VALUE()    xthal_get_ccount()
+/*ccount or esp_timer are initialized elsewhere */
+    #define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()
 
-#ifdef CONFIG_FREERTOS_RUN_TIME_STATS_USING_ESP_TIMER
+    #ifdef CONFIG_FREERTOS_RUN_TIME_STATS_USING_ESP_TIMER
 /* Coarse resolution time (us) */
-#define portALT_GET_RUN_TIME_COUNTER_VALUE(x)    x = (uint32_t)esp_timer_get_time()
-#endif
+        #define portALT_GET_RUN_TIME_COUNTER_VALUE( x )    x = ( uint32_t ) esp_timer_get_time()
+    #endif
 
 
 
 /* Kernel utilities. */
-void vPortYield( void );
-void _frxt_setup_switch( void );
-#define portYIELD()					vPortYield()
-#define portYIELD_FROM_ISR()        {traceISR_EXIT_TO_SCHEDULER(); _frxt_setup_switch();}
+    void vPortYield( void );
+    void _frxt_setup_switch( void );
+    #define portYIELD()             vPortYield()
+    #define portYIELD_FROM_ISR()    { traceISR_EXIT_TO_SCHEDULER(); _frxt_setup_switch(); }
 
-static inline uint32_t xPortGetCoreID();
+    static inline uint32_t xPortGetCoreID();
 
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site. */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 
-// When coprocessors are defined, we to maintain a pointer to coprocessors area.
-// We currently use a hack: redefine field xMPU_SETTINGS in TCB block as a structure that can hold:
-// MPU wrappers, coprocessor area pointer, trace code structure, and more if needed.
-// The field is normally used for memory protection. FreeRTOS should create another general purpose field.
-typedef struct {
-	#if XCHAL_CP_NUM > 0
-	volatile StackType_t* coproc_area; // Pointer to coprocessor save area; MUST BE FIRST
-	#endif
+/* When coprocessors are defined, we to maintain a pointer to coprocessors area. */
+/* We currently use a hack: redefine field xMPU_SETTINGS in TCB block as a structure that can hold: */
+/* MPU wrappers, coprocessor area pointer, trace code structure, and more if needed. */
+/* The field is normally used for memory protection. FreeRTOS should create another general purpose field. */
+    typedef struct
+    {
+        #if XCHAL_CP_NUM > 0
+            volatile StackType_t * coproc_area; /* Pointer to coprocessor save area; MUST BE FIRST */
+        #endif
 
-	#if portUSING_MPU_WRAPPERS
-	// Define here mpu_settings, which is port dependent
-	int mpu_setting; // Just a dummy example here; MPU not ported to Xtensa yet
-	#endif
+        #if portUSING_MPU_WRAPPERS
+            /* Define here mpu_settings, which is port dependent */
+            int mpu_setting; /* Just a dummy example here; MPU not ported to Xtensa yet */
+        #endif
 
-	#if configUSE_TRACE_FACILITY_2
-	struct {
-		// Cf. porttraceStamp()
-		int taskstamp;        /* Stamp from inside task to see where we are */
-		int taskstampcount;   /* A counter usually incremented when we restart the task's loop */
-	} porttrace;
-	#endif
-} xMPU_SETTINGS;
+        #if configUSE_TRACE_FACILITY_2
+            struct
+            {
+                /* Cf. porttraceStamp() */
+                int taskstamp;      /* Stamp from inside task to see where we are */
+                int taskstampcount; /* A counter usually incremented when we restart the task's loop */
+            } porttrace;
+        #endif
+    } xMPU_SETTINGS;
 
-// Main hack to use MPU_wrappers even when no MPU is defined (warning: mpu_setting should not be accessed; otherwise move this above xMPU_SETTINGS)
-#if (XCHAL_CP_NUM > 0 || configUSE_TRACE_FACILITY_2) && !portUSING_MPU_WRAPPERS   // If MPU wrappers not used, we still need to allocate coproc area
-	#undef portUSING_MPU_WRAPPERS
-	#define portUSING_MPU_WRAPPERS 1   // Enable it to allocate coproc area
-	#define MPU_WRAPPERS_H             // Override mpu_wrapper.h to disable unwanted code
-	#define PRIVILEGED_FUNCTION
-	#define PRIVILEGED_DATA
-#endif
+/* Main hack to use MPU_wrappers even when no MPU is defined (warning: mpu_setting should not be accessed; otherwise move this above xMPU_SETTINGS) */
+    #if ( XCHAL_CP_NUM > 0 || configUSE_TRACE_FACILITY_2 ) && !portUSING_MPU_WRAPPERS /* If MPU wrappers not used, we still need to allocate coproc area */
+        #undef portUSING_MPU_WRAPPERS
+        #define portUSING_MPU_WRAPPERS    1                                           /* Enable it to allocate coproc area */
+        #define MPU_WRAPPERS_H                                                        /* Override mpu_wrapper.h to disable unwanted code */
+        #define PRIVILEGED_FUNCTION
+        #define PRIVILEGED_DATA
+    #endif
 
-bool vApplicationSleep( TickType_t xExpectedIdleTime );
+    bool vApplicationSleep( TickType_t xExpectedIdleTime );
 
-#define portSUPPRESS_TICKS_AND_SLEEP( idleTime ) vApplicationSleep( idleTime )
+    #define portSUPPRESS_TICKS_AND_SLEEP( idleTime )    vApplicationSleep( idleTime )
 
 
 
-void _xt_coproc_release(volatile void * coproc_sa_base);
+    void _xt_coproc_release( volatile void * coproc_sa_base );
 
 
 /*
@@ -383,36 +404,36 @@ void _xt_coproc_release(volatile void * coproc_sa_base);
  * non-FreeRTOS-specific code, and behave the same as
  * pvPortMalloc()/vPortFree().
  */
-#define pvPortMalloc heap_caps_malloc_default
-#define vPortFree heap_caps_free
-#define xPortGetFreeHeapSize esp_get_free_heap_size
-#define xPortGetMinimumEverFreeHeapSize esp_get_minimum_free_heap_size
+    #define pvPortMalloc                       heap_caps_malloc_default
+    #define vPortFree                          heap_caps_free
+    #define xPortGetFreeHeapSize               esp_get_free_heap_size
+    #define xPortGetMinimumEverFreeHeapSize    esp_get_minimum_free_heap_size
 
 /*
  * Send an interrupt to another core in order to make the task running
  * on it yield for a higher-priority task.
  */
 
-void vPortYieldOtherCore( BaseType_t coreid) PRIVILEGED_FUNCTION;
+        void vPortYieldOtherCore( BaseType_t coreid ) PRIVILEGED_FUNCTION;
 
 
 /*
- Callback to set a watchpoint on the end of the stack. Called every context switch to change the stack
- watchpoint around.
+ * Callback to set a watchpoint on the end of the stack. Called every context switch to change the stack
+ * watchpoint around.
  */
-void vPortSetStackWatchpoint( void* pxStackStart );
+    void vPortSetStackWatchpoint( void * pxStackStart );
 
 /*
  * Returns true if the current core is in ISR context; low prio ISR, med prio ISR or timer tick ISR. High prio ISRs
  * aren't detected here, but they normally cannot call C code, so that should not be an issue anyway.
  */
-BaseType_t xPortInIsrContext();
+    BaseType_t xPortInIsrContext();
 
 /*
  * This function will be called in High prio ISRs. Returns true if the current core was in ISR context
  * before calling into high prio ISR context.
  */
-BaseType_t xPortInterruptedFromISRContext();
+    BaseType_t xPortInterruptedFromISRContext();
 
 /*
  * The structures and methods of manipulating the MPU are contained within the
@@ -421,42 +442,48 @@ BaseType_t xPortInterruptedFromISRContext();
  * Fills the xMPUSettings structure with the memory region information
  * contained in xRegions.
  */
-#if( portUSING_MPU_WRAPPERS == 1 )
-    struct xMEMORY_REGION;
-    void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t usStackDepth ) PRIVILEGED_FUNCTION;
-    void vPortReleaseTaskMPUSettings( xMPU_SETTINGS *xMPUSettings );
-#endif
+    #if ( portUSING_MPU_WRAPPERS == 1 )
+        struct xMEMORY_REGION;
+        void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
+                                        const struct xMEMORY_REGION * const xRegions,
+                                        StackType_t * pxBottomOfStack,
+                                        uint32_t usStackDepth ) PRIVILEGED_FUNCTION;
+        void vPortReleaseTaskMPUSettings( xMPU_SETTINGS * xMPUSettings );
+    #endif
 
 /* Multi-core: get current core ID */
-static inline uint32_t IRAM_ATTR xPortGetCoreID() {
-    int id;
-    asm (
-        "rsr.prid %0\n"
-        " extui %0,%0,13,1"
-        :"=r"(id));
-    return id;
-}
+    static inline uint32_t IRAM_ATTR xPortGetCoreID()
+    {
+        int id;
+
+        asm (
+            "rsr.prid %0\n"
+            " extui %0,%0,13,1"
+            : "=r" ( id ) );
+        return id;
+    }
 
 /* Get tick rate per second */
-uint32_t xPortGetTickRateHz(void);
+    uint32_t xPortGetTickRateHz( void );
 
-// porttrace
-#if configUSE_TRACE_FACILITY_2
-#include "porttrace.h"
-#endif
+/* porttrace */
+    #if configUSE_TRACE_FACILITY_2
+        #include "porttrace.h"
+    #endif
 
-// configASSERT_2 if requested
-#if configASSERT_2
-#include 
-void exit(int);
-#define configASSERT( x )   if (!(x)) { porttracePrint(-1); printf("\nAssertion failed in %s:%d\n", __FILE__, __LINE__); exit(-1); }
-#endif
+/* configASSERT_2 if requested */
+    #if configASSERT_2
+        #include 
+        void exit( int );
+        #define configASSERT( x )    if( !( x ) ) { porttracePrint( -1 ); printf( "\nAssertion failed in %s:%d\n", __FILE__, __LINE__ ); exit( -1 ); }
+    #endif
 
 #endif // __ASSEMBLER__
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
-}
+    }
 #endif
+/* *INDENT-ON* */
 
 #endif /* PORTMACRO_H */
-
diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_api.h b/portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_api.h
index 7f676ea31..f91dab17a 100644
--- a/portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_api.h
+++ b/portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_api.h
@@ -1,28 +1,28 @@
 /*******************************************************************************
-Copyright (c) 2006-2015 Cadence Design Systems Inc.
-
-Permission is hereby granted, free of charge, to any person obtaining
-a copy of this software and associated documentation files (the
-"Software"), to deal in the Software without restriction, including
-without limitation the rights to use, copy, modify, merge, publish,
-distribute, sublicense, and/or sell copies of the Software, and to
-permit persons to whom the Software is furnished to do so, subject to
-the following conditions:
-
-The above copyright notice and this permission notice shall be included
-in all copies or substantial portions of the Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
-IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
-CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
-TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
-SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-******************************************************************************/
+ * Copyright (c) 2006-2015 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ ******************************************************************************/
 
 /******************************************************************************
-  Xtensa-specific API for RTOS ports.
+*  Xtensa-specific API for RTOS ports.
 ******************************************************************************/
 
 #ifndef __XTENSA_API_H__
@@ -34,97 +34,99 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 
 /* Typedef for C-callable interrupt handler function */
-typedef void (*xt_handler)(void *);
+typedef void (* xt_handler)( void * );
 
 /* Typedef for C-callable exception handler function */
-typedef void (*xt_exc_handler)(XtExcFrame *);
+typedef void (* xt_exc_handler)( XtExcFrame * );
 
 
 /*
--------------------------------------------------------------------------------
-  Call this function to set a handler for the specified exception. The handler
-  will be installed on the core that calls this function.
-
-    n        - Exception number (type)
-    f        - Handler function address, NULL to uninstall handler.
-
-  The handler will be passed a pointer to the exception frame, which is created
-  on the stack of the thread that caused the exception.
-
-  If the handler returns, the thread context will be restored and the faulting
-  instruction will be retried. Any values in the exception frame that are
-  modified by the handler will be restored as part of the context. For details
-  of the exception frame structure see xtensa_context.h.
--------------------------------------------------------------------------------
-*/
-extern xt_exc_handler xt_set_exception_handler(int n, xt_exc_handler f);
+ * -------------------------------------------------------------------------------
+ * Call this function to set a handler for the specified exception. The handler
+ * will be installed on the core that calls this function.
+ *
+ *  n        - Exception number (type)
+ *  f        - Handler function address, NULL to uninstall handler.
+ *
+ * The handler will be passed a pointer to the exception frame, which is created
+ * on the stack of the thread that caused the exception.
+ *
+ * If the handler returns, the thread context will be restored and the faulting
+ * instruction will be retried. Any values in the exception frame that are
+ * modified by the handler will be restored as part of the context. For details
+ * of the exception frame structure see xtensa_context.h.
+ * -------------------------------------------------------------------------------
+ */
+extern xt_exc_handler xt_set_exception_handler( int n,
+                                                xt_exc_handler f );
 
 
 /*
--------------------------------------------------------------------------------
-  Call this function to set a handler for the specified interrupt. The handler
-  will be installed on the core that calls this function.
- 
-    n        - Interrupt number.
-    f        - Handler function address, NULL to uninstall handler.
-    arg      - Argument to be passed to handler.
--------------------------------------------------------------------------------
-*/
-extern xt_handler xt_set_interrupt_handler(int n, xt_handler f, void * arg);
+ * -------------------------------------------------------------------------------
+ * Call this function to set a handler for the specified interrupt. The handler
+ * will be installed on the core that calls this function.
+ *
+ *  n        - Interrupt number.
+ *  f        - Handler function address, NULL to uninstall handler.
+ *  arg      - Argument to be passed to handler.
+ * -------------------------------------------------------------------------------
+ */
+extern xt_handler xt_set_interrupt_handler( int n,
+                                            xt_handler f,
+                                            void * arg );
 
 
 /*
--------------------------------------------------------------------------------
-  Call this function to enable the specified interrupts on the core that runs
-  this code.
-
-    mask     - Bit mask of interrupts to be enabled.
--------------------------------------------------------------------------------
-*/
-extern void xt_ints_on(unsigned int mask);
+ * -------------------------------------------------------------------------------
+ * Call this function to enable the specified interrupts on the core that runs
+ * this code.
+ *
+ *  mask     - Bit mask of interrupts to be enabled.
+ * -------------------------------------------------------------------------------
+ */
+extern void xt_ints_on( unsigned int mask );
 
 
 /*
--------------------------------------------------------------------------------
-  Call this function to disable the specified interrupts on the core that runs
-  this code.
-
-    mask     - Bit mask of interrupts to be disabled.
--------------------------------------------------------------------------------
-*/
-extern void xt_ints_off(unsigned int mask);
+ * -------------------------------------------------------------------------------
+ * Call this function to disable the specified interrupts on the core that runs
+ * this code.
+ *
+ *  mask     - Bit mask of interrupts to be disabled.
+ * -------------------------------------------------------------------------------
+ */
+extern void xt_ints_off( unsigned int mask );
 
 
 /*
--------------------------------------------------------------------------------
-  Call this function to set the specified (s/w) interrupt.
--------------------------------------------------------------------------------
-*/
-static inline void xt_set_intset(unsigned int arg)
+ * -------------------------------------------------------------------------------
+ * Call this function to set the specified (s/w) interrupt.
+ * -------------------------------------------------------------------------------
+ */
+static inline void xt_set_intset( unsigned int arg )
 {
-    xthal_set_intset(arg);
+    xthal_set_intset( arg );
 }
 
 
 /*
--------------------------------------------------------------------------------
-  Call this function to clear the specified (s/w or edge-triggered)
-  interrupt.
--------------------------------------------------------------------------------
-*/
-static inline void xt_set_intclear(unsigned int arg)
+ * -------------------------------------------------------------------------------
+ * Call this function to clear the specified (s/w or edge-triggered)
+ * interrupt.
+ * -------------------------------------------------------------------------------
+ */
+static inline void xt_set_intclear( unsigned int arg )
 {
-    xthal_set_intclear(arg);
+    xthal_set_intclear( arg );
 }
 
 /*
--------------------------------------------------------------------------------
-  Call this function to get handler's argument for the specified interrupt.
- 
-    n        - Interrupt number.
--------------------------------------------------------------------------------
-*/
-extern void * xt_get_interrupt_handler_arg(int n);
+ * -------------------------------------------------------------------------------
+ * Call this function to get handler's argument for the specified interrupt.
+ *
+ *  n        - Interrupt number.
+ * -------------------------------------------------------------------------------
+ */
+extern void * xt_get_interrupt_handler_arg( int n );
 
 #endif /* __XTENSA_API_H__ */
-
diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_config.h b/portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_config.h
index 9a8da71fe..4ac32d71e 100644
--- a/portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_config.h
+++ b/portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_config.h
@@ -1,146 +1,145 @@
 /*******************************************************************************
-// Copyright (c) 2003-2015 Cadence Design Systems, Inc.
-//
-// Permission is hereby granted, free of charge, to any person obtaining
-// a copy of this software and associated documentation files (the
-// "Software"), to deal in the Software without restriction, including
-// without limitation the rights to use, copy, modify, merge, publish,
-// distribute, sublicense, and/or sell copies of the Software, and to
-// permit persons to whom the Software is furnished to do so, subject to
-// the following conditions:
-//
-// The above copyright notice and this permission notice shall be included
-// in all copies or substantial portions of the Software.
-//
-// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
-// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
-// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
-// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
-// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
---------------------------------------------------------------------------------
-
-  Configuration-specific information for Xtensa build. This file must be
-  included in FreeRTOSConfig.h to properly set up the config-dependent
-  parameters correctly.
-
-  NOTE: To enable thread-safe C library support, XT_USE_THREAD_SAFE_CLIB must
-  be defined to be > 0 somewhere above or on the command line.
-
+*  // Copyright (c) 2003-2015 Cadence Design Systems, Inc.
+*  //
+*  // Permission is hereby granted, free of charge, to any person obtaining
+*  // a copy of this software and associated documentation files (the
+*  // "Software"), to deal in the Software without restriction, including
+*  // without limitation the rights to use, copy, modify, merge, publish,
+*  // distribute, sublicense, and/or sell copies of the Software, and to
+*  // permit persons to whom the Software is furnished to do so, subject to
+*  // the following conditions:
+*  //
+*  // The above copyright notice and this permission notice shall be included
+*  // in all copies or substantial portions of the Software.
+*  //
+*  // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+*  // EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+*  // MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+*  // IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+*  // CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+*  // TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+*  // SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*  --------------------------------------------------------------------------------
+*
+*  Configuration-specific information for Xtensa build. This file must be
+*  included in FreeRTOSConfig.h to properly set up the config-dependent
+*  parameters correctly.
+*
+*  NOTE: To enable thread-safe C library support, XT_USE_THREAD_SAFE_CLIB must
+*  be defined to be > 0 somewhere above or on the command line.
+*
 *******************************************************************************/
 
 #ifndef XTENSA_CONFIG_H
-#define XTENSA_CONFIG_H
+    #define XTENSA_CONFIG_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+    #ifdef __cplusplus
+        extern "C" {
+    #endif
 
-#include 
-#include 
-#include 	/* required for XSHAL_CLIB */
+    #include 
+    #include 
+    #include  /* required for XSHAL_CLIB */
 
-#include "xtensa_context.h"
+    #include "xtensa_context.h"
 
 
 /*-----------------------------------------------------------------------------
-*                                 STACK REQUIREMENTS
-*
-* This section defines the minimum stack size, and the extra space required to
-* be allocated for saving coprocessor state and/or C library state information
-* (if thread safety is enabled for the C library). The sizes are in bytes.
-*
-* Stack sizes for individual tasks should be derived from these minima based on
-* the maximum call depth of the task and the maximum level of interrupt nesting.
-* A minimum stack size is defined by XT_STACK_MIN_SIZE. This minimum is based
-* on the requirement for a task that calls nothing else but can be interrupted.
-* This assumes that interrupt handlers do not call more than a few levels deep.
-* If this is not true, i.e. one or more interrupt handlers make deep calls then
-* the minimum must be increased.
-*
-* If the Xtensa processor configuration includes coprocessors, then space is 
-* allocated to save the coprocessor state on the stack.
-*
-* If thread safety is enabled for the C runtime library, (XT_USE_THREAD_SAFE_CLIB
-* is defined) then space is allocated to save the C library context in the TCB.
-* 
-* Allocating insufficient stack space is a common source of hard-to-find errors.
-* During development, it is best to enable the FreeRTOS stack checking features.
-*
-* Usage:
-* 
-* XT_USE_THREAD_SAFE_CLIB -- Define this to a nonzero value to enable thread-safe
-*                            use of the C library. This will require extra stack
-*                            space to be allocated for tasks that use the C library
-*                            reentrant functions. See below for more information.
-* 
-* NOTE: The Xtensa toolchain supports multiple C libraries and not all of them
-* support thread safety. Check your core configuration to see which C library
-* was chosen for your system.
-* 
-* XT_STACK_MIN_SIZE       -- The minimum stack size for any task. It is recommended
-*                            that you do not use a stack smaller than this for any
-*                            task. In case you want to use stacks smaller than this
-*                            size, you must verify that the smaller size(s) will work
-*                            under all operating conditions.
-*
-* XT_STACK_EXTRA          -- The amount of extra stack space to allocate for a task
-*                            that does not make C library reentrant calls. Add this
-*                            to the amount of stack space required by the task itself.
-*
-* XT_STACK_EXTRA_CLIB     -- The amount of space to allocate for C library state.
-*
------------------------------------------------------------------------------*/
+ *                                 STACK REQUIREMENTS
+ *
+ * This section defines the minimum stack size, and the extra space required to
+ * be allocated for saving coprocessor state and/or C library state information
+ * (if thread safety is enabled for the C library). The sizes are in bytes.
+ *
+ * Stack sizes for individual tasks should be derived from these minima based on
+ * the maximum call depth of the task and the maximum level of interrupt nesting.
+ * A minimum stack size is defined by XT_STACK_MIN_SIZE. This minimum is based
+ * on the requirement for a task that calls nothing else but can be interrupted.
+ * This assumes that interrupt handlers do not call more than a few levels deep.
+ * If this is not true, i.e. one or more interrupt handlers make deep calls then
+ * the minimum must be increased.
+ *
+ * If the Xtensa processor configuration includes coprocessors, then space is
+ * allocated to save the coprocessor state on the stack.
+ *
+ * If thread safety is enabled for the C runtime library, (XT_USE_THREAD_SAFE_CLIB
+ * is defined) then space is allocated to save the C library context in the TCB.
+ *
+ * Allocating insufficient stack space is a common source of hard-to-find errors.
+ * During development, it is best to enable the FreeRTOS stack checking features.
+ *
+ * Usage:
+ *
+ * XT_USE_THREAD_SAFE_CLIB -- Define this to a nonzero value to enable thread-safe
+ *                            use of the C library. This will require extra stack
+ *                            space to be allocated for tasks that use the C library
+ *                            reentrant functions. See below for more information.
+ *
+ * NOTE: The Xtensa toolchain supports multiple C libraries and not all of them
+ * support thread safety. Check your core configuration to see which C library
+ * was chosen for your system.
+ *
+ * XT_STACK_MIN_SIZE       -- The minimum stack size for any task. It is recommended
+ *                            that you do not use a stack smaller than this for any
+ *                            task. In case you want to use stacks smaller than this
+ *                            size, you must verify that the smaller size(s) will work
+ *                            under all operating conditions.
+ *
+ * XT_STACK_EXTRA          -- The amount of extra stack space to allocate for a task
+ *                            that does not make C library reentrant calls. Add this
+ *                            to the amount of stack space required by the task itself.
+ *
+ * XT_STACK_EXTRA_CLIB     -- The amount of space to allocate for C library state.
+ *
+ *  -----------------------------------------------------------------------------*/
 
 /* Extra space required for interrupt/exception hooks. */
-#ifdef XT_INTEXC_HOOKS
-  #ifdef __XTENSA_CALL0_ABI__
-    #define STK_INTEXC_EXTRA        0x200
-  #else
-    #define STK_INTEXC_EXTRA        0x180
-  #endif
-#else
-  #define STK_INTEXC_EXTRA          0
-#endif
+    #ifdef XT_INTEXC_HOOKS
+        #ifdef __XTENSA_CALL0_ABI__
+            #define STK_INTEXC_EXTRA     0x200
+        #else
+            #define STK_INTEXC_EXTRA     0x180
+        #endif
+    #else
+        #define STK_INTEXC_EXTRA         0
+    #endif
 
-#define XT_CLIB_CONTEXT_AREA_SIZE         0
+    #define XT_CLIB_CONTEXT_AREA_SIZE    0
 
 /*------------------------------------------------------------------------------
-  Extra size -- interrupt frame plus coprocessor save area plus hook space.
-  NOTE: Make sure XT_INTEXC_HOOKS is undefined unless you really need the hooks.
-------------------------------------------------------------------------------*/
-#ifdef __XTENSA_CALL0_ABI__
-  #define XT_XTRA_SIZE            (XT_STK_FRMSZ + STK_INTEXC_EXTRA + 0x10 + XT_CP_SIZE)
-#else
-  #define XT_XTRA_SIZE            (XT_STK_FRMSZ + STK_INTEXC_EXTRA + 0x20 + XT_CP_SIZE)
-#endif
+ *  Extra size -- interrupt frame plus coprocessor save area plus hook space.
+ *  NOTE: Make sure XT_INTEXC_HOOKS is undefined unless you really need the hooks.
+ *  ------------------------------------------------------------------------------*/
+    #ifdef __XTENSA_CALL0_ABI__
+        #define XT_XTRA_SIZE    ( XT_STK_FRMSZ + STK_INTEXC_EXTRA + 0x10 + XT_CP_SIZE )
+    #else
+        #define XT_XTRA_SIZE    ( XT_STK_FRMSZ + STK_INTEXC_EXTRA + 0x20 + XT_CP_SIZE )
+    #endif
 
 /*------------------------------------------------------------------------------
-  Space allocated for user code -- function calls and local variables.
-  NOTE: This number can be adjusted to suit your needs. You must verify that the
-  amount of space you reserve is adequate for the worst-case conditions in your
-  application.
-  NOTE: The windowed ABI requires more stack, since space has to be reserved
-  for spilling register windows.
-------------------------------------------------------------------------------*/
-#ifdef __XTENSA_CALL0_ABI__
-  #define XT_USER_SIZE            0x200
-#else
-  #define XT_USER_SIZE            0x400
-#endif
+ *  Space allocated for user code -- function calls and local variables.
+ *  NOTE: This number can be adjusted to suit your needs. You must verify that the
+ *  amount of space you reserve is adequate for the worst-case conditions in your
+ *  application.
+ *  NOTE: The windowed ABI requires more stack, since space has to be reserved
+ *  for spilling register windows.
+ *  ------------------------------------------------------------------------------*/
+    #ifdef __XTENSA_CALL0_ABI__
+        #define XT_USER_SIZE    0x200
+    #else
+        #define XT_USER_SIZE    0x400
+    #endif
 
 /* Minimum recommended stack size. */
-#define XT_STACK_MIN_SIZE         ((XT_XTRA_SIZE + XT_USER_SIZE) / sizeof(unsigned char))
+    #define XT_STACK_MIN_SIZE      ( ( XT_XTRA_SIZE + XT_USER_SIZE ) / sizeof( unsigned char ) )
 
 /* OS overhead with and without C library thread context. */
-#define XT_STACK_EXTRA            (XT_XTRA_SIZE)
-#define XT_STACK_EXTRA_CLIB       (XT_XTRA_SIZE + XT_CLIB_CONTEXT_AREA_SIZE)
+    #define XT_STACK_EXTRA         ( XT_XTRA_SIZE )
+    #define XT_STACK_EXTRA_CLIB    ( XT_XTRA_SIZE + XT_CLIB_CONTEXT_AREA_SIZE )
 
 
-#ifdef __cplusplus
-}
-#endif
+    #ifdef __cplusplus
+        }
+    #endif
 
 #endif /* XTENSA_CONFIG_H */
-
diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_rtos.h b/portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_rtos.h
index 3f211fb9f..dbd82b690 100644
--- a/portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_rtos.h
+++ b/portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_rtos.h
@@ -1,232 +1,231 @@
 /*******************************************************************************
-// Copyright (c) 2003-2015 Cadence Design Systems, Inc.
-//
-// Permission is hereby granted, free of charge, to any person obtaining
-// a copy of this software and associated documentation files (the
-// "Software"), to deal in the Software without restriction, including
-// without limitation the rights to use, copy, modify, merge, publish,
-// distribute, sublicense, and/or sell copies of the Software, and to
-// permit persons to whom the Software is furnished to do so, subject to
-// the following conditions:
-//
-// The above copyright notice and this permission notice shall be included
-// in all copies or substantial portions of the Software.
-//
-// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
-// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
-// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
-// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
-// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
---------------------------------------------------------------------------------
-
-        RTOS-SPECIFIC INFORMATION FOR XTENSA RTOS ASSEMBLER SOURCES
-                            (FreeRTOS Port)
-
-This header is the primary glue between generic Xtensa RTOS support
-sources and a specific RTOS port for Xtensa.  It contains definitions
-and macros for use primarily by Xtensa assembly coded source files.
-
-Macros in this header map callouts from generic Xtensa files to specific
-RTOS functions. It may also be included in C source files.
-
-Xtensa RTOS ports support all RTOS-compatible configurations of the Xtensa 
-architecture, using the Xtensa hardware abstraction layer (HAL) to deal 
-with configuration specifics.
-
-Should be included by all Xtensa generic and RTOS port-specific sources.
-
+*  // Copyright (c) 2003-2015 Cadence Design Systems, Inc.
+*  //
+*  // Permission is hereby granted, free of charge, to any person obtaining
+*  // a copy of this software and associated documentation files (the
+*  // "Software"), to deal in the Software without restriction, including
+*  // without limitation the rights to use, copy, modify, merge, publish,
+*  // distribute, sublicense, and/or sell copies of the Software, and to
+*  // permit persons to whom the Software is furnished to do so, subject to
+*  // the following conditions:
+*  //
+*  // The above copyright notice and this permission notice shall be included
+*  // in all copies or substantial portions of the Software.
+*  //
+*  // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+*  // EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+*  // MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+*  // IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+*  // CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+*  // TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+*  // SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*  --------------------------------------------------------------------------------
+*
+*       RTOS-SPECIFIC INFORMATION FOR XTENSA RTOS ASSEMBLER SOURCES
+*                           (FreeRTOS Port)
+*
+*  This header is the primary glue between generic Xtensa RTOS support
+*  sources and a specific RTOS port for Xtensa.  It contains definitions
+*  and macros for use primarily by Xtensa assembly coded source files.
+*
+*  Macros in this header map callouts from generic Xtensa files to specific
+*  RTOS functions. It may also be included in C source files.
+*
+*  Xtensa RTOS ports support all RTOS-compatible configurations of the Xtensa
+*  architecture, using the Xtensa hardware abstraction layer (HAL) to deal
+*  with configuration specifics.
+*
+*  Should be included by all Xtensa generic and RTOS port-specific sources.
+*
 *******************************************************************************/
 
 #ifndef XTENSA_RTOS_H
 #define XTENSA_RTOS_H
 
 #ifdef __ASSEMBLER__
-#include    
+    #include    
 #else
-#include    
+    #include    
 #endif
 
 #include    
 #include    
 
 /*
-Include any RTOS specific definitions that are needed by this header.
-*/
+ * Include any RTOS specific definitions that are needed by this header.
+ */
 #include    "FreeRTOSConfig.h"
 
 /*
-Convert FreeRTOSConfig definitions to XTENSA definitions.
-However these can still be overridden from the command line.
-*/
+ * Convert FreeRTOSConfig definitions to XTENSA definitions.
+ * However these can still be overridden from the command line.
+ */
 
 #ifndef XT_SIMULATOR
-  #if configXT_SIMULATOR
-    #define XT_SIMULATOR             1  /* Simulator mode */
-  #endif
+    #if configXT_SIMULATOR
+        #define XT_SIMULATOR    1       /* Simulator mode */
+    #endif
 #endif
 
 #ifndef XT_BOARD
-  #if configXT_BOARD
-    #define XT_BOARD                 1  /* Board mode */
-  #endif
+    #if configXT_BOARD
+        #define XT_BOARD    1           /* Board mode */
+    #endif
 #endif
 
 #ifndef XT_TIMER_INDEX
-  #if defined configXT_TIMER_INDEX
-    #define XT_TIMER_INDEX           configXT_TIMER_INDEX  /* Index of hardware timer to be used */
-  #endif
+    #if defined configXT_TIMER_INDEX
+        #define XT_TIMER_INDEX    configXT_TIMER_INDEX     /* Index of hardware timer to be used */
+    #endif
 #endif
 
 #ifndef XT_INTEXC_HOOKS
-  #if configXT_INTEXC_HOOKS
-    #define XT_INTEXC_HOOKS          1  /* Enables exception hooks */
-  #endif
+    #if configXT_INTEXC_HOOKS
+        #define XT_INTEXC_HOOKS    1    /* Enables exception hooks */
+    #endif
 #endif
 
-#if !defined(XT_SIMULATOR) && !defined(XT_BOARD)
-  #error Either XT_SIMULATOR or XT_BOARD must be defined.
+#if !defined( XT_SIMULATOR ) && !defined( XT_BOARD )
+    #error Either XT_SIMULATOR or XT_BOARD must be defined.
 #endif
 
 
 /*
-Name of RTOS (for messages).
-*/
+ * Name of RTOS (for messages).
+ */
 #define XT_RTOS_NAME    FreeRTOS
 
 /*
-Check some Xtensa configuration requirements and report error if not met.
-Error messages can be customize to the RTOS port.
-*/
+ * Check some Xtensa configuration requirements and report error if not met.
+ * Error messages can be customize to the RTOS port.
+ */
 
 #if !XCHAL_HAVE_XEA2
-#error "FreeRTOS/Xtensa requires XEA2 (exception architecture 2)."
+    #error "FreeRTOS/Xtensa requires XEA2 (exception architecture 2)."
 #endif
 
 
 /*******************************************************************************
-
-RTOS CALLOUT MACROS MAPPED TO RTOS PORT-SPECIFIC FUNCTIONS.
-
-Define callout macros used in generic Xtensa code to interact with the RTOS.
-The macros are simply the function names for use in calls from assembler code.
-Some of these functions may call back to generic functions in xtensa_context.h .
-
+*
+*  RTOS CALLOUT MACROS MAPPED TO RTOS PORT-SPECIFIC FUNCTIONS.
+*
+*  Define callout macros used in generic Xtensa code to interact with the RTOS.
+*  The macros are simply the function names for use in calls from assembler code.
+*  Some of these functions may call back to generic functions in xtensa_context.h .
+*
 *******************************************************************************/
 
 /*
-Inform RTOS of entry into an interrupt handler that will affect it. 
-Allows RTOS to manage switch to any system stack and count nesting level.
-Called after minimal context has been saved, with interrupts disabled.
-RTOS port can call0 _xt_context_save to save the rest of the context.
-May only be called from assembly code by the 'call0' instruction.
-*/
-// void XT_RTOS_INT_ENTER(void)
-#define XT_RTOS_INT_ENTER   _frxt_int_enter
+ * Inform RTOS of entry into an interrupt handler that will affect it.
+ * Allows RTOS to manage switch to any system stack and count nesting level.
+ * Called after minimal context has been saved, with interrupts disabled.
+ * RTOS port can call0 _xt_context_save to save the rest of the context.
+ * May only be called from assembly code by the 'call0' instruction.
+ */
+/* void XT_RTOS_INT_ENTER(void) */
+#define XT_RTOS_INT_ENTER    _frxt_int_enter
 
 /*
-Inform RTOS of completion of an interrupt handler, and give control to
-RTOS to perform thread/task scheduling, switch back from any system stack
-and restore the context, and return to the exit dispatcher saved in the
-stack frame at XT_STK_EXIT. RTOS port can call0 _xt_context_restore
-to save the context saved in XT_RTOS_INT_ENTER via _xt_context_save,
-leaving only a minimal part of the context to be restored by the exit
-dispatcher. This function does not return to the place it was called from.
-May only be called from assembly code by the 'call0' instruction.
-*/
-// void XT_RTOS_INT_EXIT(void)
+ * Inform RTOS of completion of an interrupt handler, and give control to
+ * RTOS to perform thread/task scheduling, switch back from any system stack
+ * and restore the context, and return to the exit dispatcher saved in the
+ * stack frame at XT_STK_EXIT. RTOS port can call0 _xt_context_restore
+ * to save the context saved in XT_RTOS_INT_ENTER via _xt_context_save,
+ * leaving only a minimal part of the context to be restored by the exit
+ * dispatcher. This function does not return to the place it was called from.
+ * May only be called from assembly code by the 'call0' instruction.
+ */
+/* void XT_RTOS_INT_EXIT(void) */
 #define XT_RTOS_INT_EXIT    _frxt_int_exit
 
 /*
-Inform RTOS of the occurrence of a tick timer interrupt.
-If RTOS has no tick timer, leave XT_RTOS_TIMER_INT undefined.
-May be coded in or called from C or assembly, per ABI conventions.
-RTOS may optionally define XT_TICK_PER_SEC in its own way (eg. macro).
-*/
-// void XT_RTOS_TIMER_INT(void)
-#define XT_RTOS_TIMER_INT   _frxt_timer_int
-#define XT_TICK_PER_SEC     configTICK_RATE_HZ
+ * Inform RTOS of the occurrence of a tick timer interrupt.
+ * If RTOS has no tick timer, leave XT_RTOS_TIMER_INT undefined.
+ * May be coded in or called from C or assembly, per ABI conventions.
+ * RTOS may optionally define XT_TICK_PER_SEC in its own way (eg. macro).
+ */
+/* void XT_RTOS_TIMER_INT(void) */
+#define XT_RTOS_TIMER_INT    _frxt_timer_int
+#define XT_TICK_PER_SEC      configTICK_RATE_HZ
 
 /*
-Return in a15 the base address of the co-processor state save area for the 
-thread that triggered a co-processor exception, or 0 if no thread was running.
-The state save area is structured as defined in xtensa_context.h and has size 
-XT_CP_SIZE. Co-processor instructions should only be used in thread code, never
-in interrupt handlers or the RTOS kernel. May only be called from assembly code
-and by the 'call0' instruction. A result of 0 indicates an unrecoverable error. 
-The implementation may use only a2-4, a15 (all other regs must be preserved).
-*/
-// void* XT_RTOS_CP_STATE(void)
+ * Return in a15 the base address of the co-processor state save area for the
+ * thread that triggered a co-processor exception, or 0 if no thread was running.
+ * The state save area is structured as defined in xtensa_context.h and has size
+ * XT_CP_SIZE. Co-processor instructions should only be used in thread code, never
+ * in interrupt handlers or the RTOS kernel. May only be called from assembly code
+ * and by the 'call0' instruction. A result of 0 indicates an unrecoverable error.
+ * The implementation may use only a2-4, a15 (all other regs must be preserved).
+ */
+/* void* XT_RTOS_CP_STATE(void) */
 #define XT_RTOS_CP_STATE    _frxt_task_coproc_state
 
 
 /*******************************************************************************
-
-HOOKS TO DYNAMICALLY INSTALL INTERRUPT AND EXCEPTION HANDLERS PER LEVEL.
-
-This Xtensa RTOS port provides hooks for dynamically installing exception
-and interrupt handlers to facilitate automated testing where each test
-case can install its own handler for user exceptions and each interrupt
-priority (level). This consists of an array of function pointers indexed
-by interrupt priority, with index 0 being the user exception handler hook.
-Each entry in the array is initially 0, and may be replaced by a function 
-pointer of type XT_INTEXC_HOOK. A handler may be uninstalled by installing 0.
-
-The handler for low and medium priority obeys ABI conventions so may be coded
-in C. For the exception handler, the cause is the contents of the EXCCAUSE
-reg, and the result is -1 if handled, else the cause (still needs handling).
-For interrupt handlers, the cause is a mask of pending enabled interrupts at
-that level, and the result is the same mask with the bits for the handled
-interrupts cleared (those not cleared still need handling). This allows a test
-case to either pre-handle or override the default handling for the exception
-or interrupt level (see xtensa_vectors.S).
-
-High priority handlers (including NMI) must be coded in assembly, are always
-called by 'call0' regardless of ABI, must preserve all registers except a0,
-and must not use or modify the interrupted stack. The hook argument 'cause'
-is not passed and the result is ignored, so as not to burden the caller with
-saving and restoring a2 (it assumes only one interrupt per level - see the
-discussion in high priority interrupts in xtensa_vectors.S). The handler
-therefore should be coded to prototype 'void h(void)' even though it plugs
-into an array of handlers of prototype 'unsigned h(unsigned)'.
-
-To enable interrupt/exception hooks, compile the RTOS with '-DXT_INTEXC_HOOKS'.
-
+*
+*  HOOKS TO DYNAMICALLY INSTALL INTERRUPT AND EXCEPTION HANDLERS PER LEVEL.
+*
+*  This Xtensa RTOS port provides hooks for dynamically installing exception
+*  and interrupt handlers to facilitate automated testing where each test
+*  case can install its own handler for user exceptions and each interrupt
+*  priority (level). This consists of an array of function pointers indexed
+*  by interrupt priority, with index 0 being the user exception handler hook.
+*  Each entry in the array is initially 0, and may be replaced by a function
+*  pointer of type XT_INTEXC_HOOK. A handler may be uninstalled by installing 0.
+*
+*  The handler for low and medium priority obeys ABI conventions so may be coded
+*  in C. For the exception handler, the cause is the contents of the EXCCAUSE
+*  reg, and the result is -1 if handled, else the cause (still needs handling).
+*  For interrupt handlers, the cause is a mask of pending enabled interrupts at
+*  that level, and the result is the same mask with the bits for the handled
+*  interrupts cleared (those not cleared still need handling). This allows a test
+*  case to either pre-handle or override the default handling for the exception
+*  or interrupt level (see xtensa_vectors.S).
+*
+*  High priority handlers (including NMI) must be coded in assembly, are always
+*  called by 'call0' regardless of ABI, must preserve all registers except a0,
+*  and must not use or modify the interrupted stack. The hook argument 'cause'
+*  is not passed and the result is ignored, so as not to burden the caller with
+*  saving and restoring a2 (it assumes only one interrupt per level - see the
+*  discussion in high priority interrupts in xtensa_vectors.S). The handler
+*  therefore should be coded to prototype 'void h(void)' even though it plugs
+*  into an array of handlers of prototype 'unsigned h(unsigned)'.
+*
+*  To enable interrupt/exception hooks, compile the RTOS with '-DXT_INTEXC_HOOKS'.
+*
 *******************************************************************************/
 
-#define XT_INTEXC_HOOK_NUM  (1 + XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI)
+#define XT_INTEXC_HOOK_NUM    ( 1 + XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI )
 
 #ifndef __ASSEMBLER__
-typedef unsigned (*XT_INTEXC_HOOK)(unsigned cause);
-extern  volatile XT_INTEXC_HOOK _xt_intexc_hooks[XT_INTEXC_HOOK_NUM];
+    typedef unsigned (* XT_INTEXC_HOOK)( unsigned cause );
+    extern volatile XT_INTEXC_HOOK _xt_intexc_hooks[ XT_INTEXC_HOOK_NUM ];
 #endif
 
 
 /*******************************************************************************
-
-CONVENIENCE INCLUSIONS.
-
-Ensures RTOS specific files need only include this one Xtensa-generic header.
-These headers are included last so they can use the RTOS definitions above.
-
+*
+*  CONVENIENCE INCLUSIONS.
+*
+*  Ensures RTOS specific files need only include this one Xtensa-generic header.
+*  These headers are included last so they can use the RTOS definitions above.
+*
 *******************************************************************************/
 
 #include    "xtensa_context.h"
 
 #ifdef XT_RTOS_TIMER_INT
-#include    "xtensa_timer.h"
+    #include    "xtensa_timer.h"
 #endif
 
 
 /*******************************************************************************
-
-Xtensa Port Version.
-
+*
+*  Xtensa Port Version.
+*
 *******************************************************************************/
 
-#define XTENSA_PORT_VERSION             1.4.2
-#define XTENSA_PORT_VERSION_STRING      "1.4.2"
+#define XTENSA_PORT_VERSION           1.4 .2
+#define XTENSA_PORT_VERSION_STRING    "1.4.2"
 
 #endif /* XTENSA_RTOS_H */
-
diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_timer.h b/portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_timer.h
index abbd5a348..431205d6b 100644
--- a/portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_timer.h
+++ b/portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_timer.h
@@ -1,159 +1,158 @@
 /*******************************************************************************
-// Copyright (c) 2003-2015 Cadence Design Systems, Inc.
-//
-// Permission is hereby granted, free of charge, to any person obtaining
-// a copy of this software and associated documentation files (the
-// "Software"), to deal in the Software without restriction, including
-// without limitation the rights to use, copy, modify, merge, publish,
-// distribute, sublicense, and/or sell copies of the Software, and to
-// permit persons to whom the Software is furnished to do so, subject to
-// the following conditions:
-//
-// The above copyright notice and this permission notice shall be included
-// in all copies or substantial portions of the Software.
-//
-// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
-// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
-// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
-// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
-// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
---------------------------------------------------------------------------------
-
-        XTENSA INFORMATION FOR RTOS TICK TIMER AND CLOCK FREQUENCY
-
-This header contains definitions and macros for use primarily by Xtensa
-RTOS assembly coded source files. It includes and uses the Xtensa hardware
-abstraction layer (HAL) to deal with config specifics. It may also be
-included in C source files.
-
-User may edit to modify timer selection and to specify clock frequency and
-tick duration to match timer interrupt to the real-time tick duration.
-
-If the RTOS has no timer interrupt, then there is no tick timer and the
-clock frequency is irrelevant, so all of these macros are left undefined
-and the Xtensa core configuration need not have a timer.
-
+*  // Copyright (c) 2003-2015 Cadence Design Systems, Inc.
+*  //
+*  // Permission is hereby granted, free of charge, to any person obtaining
+*  // a copy of this software and associated documentation files (the
+*  // "Software"), to deal in the Software without restriction, including
+*  // without limitation the rights to use, copy, modify, merge, publish,
+*  // distribute, sublicense, and/or sell copies of the Software, and to
+*  // permit persons to whom the Software is furnished to do so, subject to
+*  // the following conditions:
+*  //
+*  // The above copyright notice and this permission notice shall be included
+*  // in all copies or substantial portions of the Software.
+*  //
+*  // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+*  // EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+*  // MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+*  // IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+*  // CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+*  // TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+*  // SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*  --------------------------------------------------------------------------------
+*
+*       XTENSA INFORMATION FOR RTOS TICK TIMER AND CLOCK FREQUENCY
+*
+*  This header contains definitions and macros for use primarily by Xtensa
+*  RTOS assembly coded source files. It includes and uses the Xtensa hardware
+*  abstraction layer (HAL) to deal with config specifics. It may also be
+*  included in C source files.
+*
+*  User may edit to modify timer selection and to specify clock frequency and
+*  tick duration to match timer interrupt to the real-time tick duration.
+*
+*  If the RTOS has no timer interrupt, then there is no tick timer and the
+*  clock frequency is irrelevant, so all of these macros are left undefined
+*  and the Xtensa core configuration need not have a timer.
+*
 *******************************************************************************/
 
 #ifndef XTENSA_TIMER_H
 #define XTENSA_TIMER_H
 
 #ifdef __ASSEMBLER__
-#include    
+    #include    
 #endif
 
 #include    
 #include    
 
-#include    "xtensa_rtos.h"     /* in case this wasn't included directly */
+#include    "xtensa_rtos.h" /* in case this wasn't included directly */
 
 #include    "FreeRTOSConfig.h"
 
 /*
-Select timer to use for periodic tick, and determine its interrupt number 
-and priority. User may specify a timer by defining XT_TIMER_INDEX with -D,
-in which case its validity is checked (it must exist in this core and must 
-not be on a high priority interrupt - an error will be reported in invalid).
-Otherwise select the first low or medium priority interrupt timer available.
-*/
+ * Select timer to use for periodic tick, and determine its interrupt number
+ * and priority. User may specify a timer by defining XT_TIMER_INDEX with -D,
+ * in which case its validity is checked (it must exist in this core and must
+ * not be on a high priority interrupt - an error will be reported in invalid).
+ * Otherwise select the first low or medium priority interrupt timer available.
+ */
 #if XCHAL_NUM_TIMERS == 0
 
-  #error "This Xtensa configuration is unsupported, it has no timers."
+    #error "This Xtensa configuration is unsupported, it has no timers."
 
 #else
 
-#ifndef XT_TIMER_INDEX
-  #if XCHAL_TIMER3_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
-    #if XCHAL_INT_LEVEL(XCHAL_TIMER3_INTERRUPT) <= XCHAL_EXCM_LEVEL
-      #undef  XT_TIMER_INDEX
-      #define XT_TIMER_INDEX    3
+    #ifndef XT_TIMER_INDEX
+        #if XCHAL_TIMER3_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
+            #if XCHAL_INT_LEVEL( XCHAL_TIMER3_INTERRUPT ) <= XCHAL_EXCM_LEVEL
+                #undef  XT_TIMER_INDEX
+                #define XT_TIMER_INDEX    3
+            #endif
+        #endif
+        #if XCHAL_TIMER2_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
+            #if XCHAL_INT_LEVEL( XCHAL_TIMER2_INTERRUPT ) <= XCHAL_EXCM_LEVEL
+                #undef  XT_TIMER_INDEX
+                #define XT_TIMER_INDEX    2
+            #endif
+        #endif
+        #if XCHAL_TIMER1_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
+            #if XCHAL_INT_LEVEL( XCHAL_TIMER1_INTERRUPT ) <= XCHAL_EXCM_LEVEL
+                #undef  XT_TIMER_INDEX
+                #define XT_TIMER_INDEX    1
+            #endif
+        #endif
+        #if XCHAL_TIMER0_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
+            #if XCHAL_INT_LEVEL( XCHAL_TIMER0_INTERRUPT ) <= XCHAL_EXCM_LEVEL
+                #undef  XT_TIMER_INDEX
+                #define XT_TIMER_INDEX    0
+            #endif
+        #endif
+    #endif /* ifndef XT_TIMER_INDEX */
+    #ifndef XT_TIMER_INDEX
+        #error "There is no suitable timer in this Xtensa configuration."
     #endif
-  #endif
-  #if XCHAL_TIMER2_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
-    #if XCHAL_INT_LEVEL(XCHAL_TIMER2_INTERRUPT) <= XCHAL_EXCM_LEVEL
-      #undef  XT_TIMER_INDEX
-      #define XT_TIMER_INDEX    2
-    #endif
-  #endif
-  #if XCHAL_TIMER1_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
-    #if XCHAL_INT_LEVEL(XCHAL_TIMER1_INTERRUPT) <= XCHAL_EXCM_LEVEL
-      #undef  XT_TIMER_INDEX
-      #define XT_TIMER_INDEX    1
-    #endif
-  #endif
-  #if XCHAL_TIMER0_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
-    #if XCHAL_INT_LEVEL(XCHAL_TIMER0_INTERRUPT) <= XCHAL_EXCM_LEVEL
-      #undef  XT_TIMER_INDEX
-      #define XT_TIMER_INDEX    0
-    #endif
-  #endif
-#endif
-#ifndef XT_TIMER_INDEX
-  #error "There is no suitable timer in this Xtensa configuration."
-#endif
 
-#define XT_CCOMPARE             (CCOMPARE + XT_TIMER_INDEX)
-#define XT_TIMER_INTNUM         XCHAL_TIMER_INTERRUPT(XT_TIMER_INDEX)
-#define XT_TIMER_INTPRI         XCHAL_INT_LEVEL(XT_TIMER_INTNUM)
-#define XT_TIMER_INTEN          (1 << XT_TIMER_INTNUM)
+    #define XT_CCOMPARE        ( CCOMPARE + XT_TIMER_INDEX )
+    #define XT_TIMER_INTNUM    XCHAL_TIMER_INTERRUPT( XT_TIMER_INDEX )
+    #define XT_TIMER_INTPRI    XCHAL_INT_LEVEL( XT_TIMER_INTNUM )
+    #define XT_TIMER_INTEN     ( 1 << XT_TIMER_INTNUM )
 
-#if XT_TIMER_INTNUM == XTHAL_TIMER_UNCONFIGURED
-  #error "The timer selected by XT_TIMER_INDEX does not exist in this core."
-#elif XT_TIMER_INTPRI > XCHAL_EXCM_LEVEL
-  #error "The timer interrupt cannot be high priority (use medium or low)."
-#endif
+    #if XT_TIMER_INTNUM == XTHAL_TIMER_UNCONFIGURED
+        #error "The timer selected by XT_TIMER_INDEX does not exist in this core."
+    #elif XT_TIMER_INTPRI > XCHAL_EXCM_LEVEL
+        #error "The timer interrupt cannot be high priority (use medium or low)."
+    #endif
 
 #endif /* XCHAL_NUM_TIMERS */
 
 /*
-Set processor clock frequency, used to determine clock divisor for timer tick.
-User should BE SURE TO ADJUST THIS for the Xtensa platform being used.
-If using a supported board via the board-independent API defined in xtbsp.h,
-this may be left undefined and frequency and tick divisor will be computed 
-and cached during run-time initialization.
-
-NOTE ON SIMULATOR:
-Under the Xtensa instruction set simulator, the frequency can only be estimated 
-because it depends on the speed of the host and the version of the simulator.
-Also because it runs much slower than hardware, it is not possible to achieve
-real-time performance for most applications under the simulator. A frequency
-too low does not allow enough time between timer interrupts, starving threads.
-To obtain a more convenient but non-real-time tick duration on the simulator, 
-compile with xt-xcc option "-DXT_SIMULATOR".
-Adjust this frequency to taste (it's not real-time anyway!).
-*/
-#if defined(XT_SIMULATOR) && !defined(XT_CLOCK_FREQ)
-#define XT_CLOCK_FREQ       configCPU_CLOCK_HZ
+ * Set processor clock frequency, used to determine clock divisor for timer tick.
+ * User should BE SURE TO ADJUST THIS for the Xtensa platform being used.
+ * If using a supported board via the board-independent API defined in xtbsp.h,
+ * this may be left undefined and frequency and tick divisor will be computed
+ * and cached during run-time initialization.
+ *
+ * NOTE ON SIMULATOR:
+ * Under the Xtensa instruction set simulator, the frequency can only be estimated
+ * because it depends on the speed of the host and the version of the simulator.
+ * Also because it runs much slower than hardware, it is not possible to achieve
+ * real-time performance for most applications under the simulator. A frequency
+ * too low does not allow enough time between timer interrupts, starving threads.
+ * To obtain a more convenient but non-real-time tick duration on the simulator,
+ * compile with xt-xcc option "-DXT_SIMULATOR".
+ * Adjust this frequency to taste (it's not real-time anyway!).
+ */
+#if defined( XT_SIMULATOR ) && !defined( XT_CLOCK_FREQ )
+    #define XT_CLOCK_FREQ    configCPU_CLOCK_HZ
 #endif
 
-#if !defined(XT_CLOCK_FREQ) && !defined(XT_BOARD)
-  #error "XT_CLOCK_FREQ must be defined for the target platform."
+#if !defined( XT_CLOCK_FREQ ) && !defined( XT_BOARD )
+    #error "XT_CLOCK_FREQ must be defined for the target platform."
 #endif
 
 /*
-Default number of timer "ticks" per second (default 100 for 10ms tick).
-RTOS may define this in its own way (if applicable) in xtensa_rtos.h.
-User may redefine this to an optimal value for the application, either by
-editing this here or in xtensa_rtos.h, or compiling with xt-xcc option
-"-DXT_TICK_PER_SEC=" where  is a suitable number.
-*/
+ * Default number of timer "ticks" per second (default 100 for 10ms tick).
+ * RTOS may define this in its own way (if applicable) in xtensa_rtos.h.
+ * User may redefine this to an optimal value for the application, either by
+ * editing this here or in xtensa_rtos.h, or compiling with xt-xcc option
+ * "-DXT_TICK_PER_SEC=" where  is a suitable number.
+ */
 #ifndef XT_TICK_PER_SEC
-#define XT_TICK_PER_SEC    configTICK_RATE_HZ        /* 10 ms tick = 100 ticks per second */
+    #define XT_TICK_PER_SEC    configTICK_RATE_HZ    /* 10 ms tick = 100 ticks per second */
 #endif
 
 /*
-Derivation of clock divisor for timer tick and interrupt (one per tick).
-*/
+ * Derivation of clock divisor for timer tick and interrupt (one per tick).
+ */
 #ifdef XT_CLOCK_FREQ
-#define XT_TICK_DIVISOR     (XT_CLOCK_FREQ / XT_TICK_PER_SEC)
+    #define XT_TICK_DIVISOR    ( XT_CLOCK_FREQ / XT_TICK_PER_SEC )
 #endif
 
 #ifndef __ASSEMBLER__
-extern unsigned _xt_tick_divisor;
-extern void     _xt_tick_divisor_init(void);
+    extern unsigned _xt_tick_divisor;
+    extern void _xt_tick_divisor_init( void );
 #endif
 
-#endif  /* XTENSA_TIMER_H */
-
+#endif /* XTENSA_TIMER_H */
diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/port.c b/portable/ThirdParty/GCC/Xtensa_ESP32/port.c
index 824133c38..f6d10d50b 100644
--- a/portable/ThirdParty/GCC/Xtensa_ESP32/port.c
+++ b/portable/ThirdParty/GCC/Xtensa_ESP32/port.c
@@ -1,95 +1,96 @@
 /*
-    FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd.
-    All rights reserved
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
-
-	***************************************************************************
-    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
-    >>!   distribute a combined work that includes FreeRTOS without being   !<<
-    >>!   obliged to provide the source code for proprietary components     !<<
-    >>!   outside of the FreeRTOS kernel.                                   !<<
-	***************************************************************************
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
-    link: http://www.freertos.org/a00114.html
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that is more than just the market leader, it     *
-     *    is the industry's de facto standard.                               *
-     *                                                                       *
-     *    Help yourself get started quickly while simultaneously helping     *
-     *    to support the FreeRTOS project by purchasing a FreeRTOS           *
-     *    tutorial book, reference manual, or both:                          *
-     *    http://www.FreeRTOS.org/Documentation                              *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
-	the FAQ page "My application does not run, what could be wrong?".  Have you
-	defined configASSERT()?
-
-	http://www.FreeRTOS.org/support - In return for receiving this top quality
-	embedded software for free we request you assist our global community by
-	participating in the support forum.
-
-	http://www.FreeRTOS.org/training - Investing in training allows your team to
-	be as productive as possible as early as possible.  Now you can receive
-	FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
-	Ltd, and the world's leading authority on the world's leading RTOS.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
-    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
-    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and commercial middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
+ *  FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd.
+ *  All rights reserved
+ *
+ *  VISIT https://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
+ *
+ *  This file is part of the FreeRTOS distribution.
+ *
+ *  FreeRTOS is free software; you can redistribute it and/or modify it under
+ *  the terms of the GNU General Public License (version 2) as published by the
+ *  Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+ *
+ ***************************************************************************
+ *  >>!   NOTE: The modification to the GPL is included to allow you to     !<<
+ *  >>!   distribute a combined work that includes FreeRTOS without being   !<<
+ *  >>!   obliged to provide the source code for proprietary components     !<<
+ *  >>!   outside of the FreeRTOS kernel.                                   !<<
+ ***************************************************************************
+ *
+ *  FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
+ *  WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ *  FOR A PARTICULAR PURPOSE.  Full license text is available on the following
+ *  link: https://www.FreeRTOS.org/a00114.html
+ *
+ ***************************************************************************
+ *                                                                       *
+ *    FreeRTOS provides completely free yet professionally developed,    *
+ *    robust, strictly quality controlled, supported, and cross          *
+ *    platform software that is more than just the market leader, it     *
+ *    is the industry's de facto standard.                               *
+ *                                                                       *
+ *    Help yourself get started quickly while simultaneously helping     *
+ *    to support the FreeRTOS project by purchasing a FreeRTOS           *
+ *    tutorial book, reference manual, or both:                          *
+ *    https://www.FreeRTOS.org/Documentation                             *
+ *                                                                       *
+ ***************************************************************************
+ *
+ *  https://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
+ *  the FAQ page "My application does not run, what could be wrong?".  Have you
+ *  defined configASSERT()?
+ *
+ *  https://www.FreeRTOS.org/support - In return for receiving this top quality
+ *  embedded software for free we request you assist our global community by
+ *  participating in the support forum.
+ *
+ *  https://www.FreeRTOS.org/training - Investing in training allows your team
+ *  to be as productive as possible as early as possible.  Now you can receive
+ *  FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
+ *  Ltd, and the world's leading authority on the world's leading RTOS.
+ *
+ *  https://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
+ *  including FreeRTOS+Trace - an indispensable productivity tool, a DOS
+ *  compatible FAT file system, and our tiny thread aware UDP/IP stack.
+ *
+ *  https://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
+ *  Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
+ *
+ *  https://www.highintegritysystems.com/openrtos/ - Real Time Engineers ltd.
+ *  license FreeRTOS to High Integrity Systems ltd. to sell under the OpenRTOS
+ *  brand.  Low cost OpenRTOS licenses offer ticketed support, indemnification
+ *  and commercial middleware.
+ *
+ *  https://www.highintegritysystems.com/safertos/ - High Integrity Systems
+ *  also provide a safety engineered and independently SIL3 certified version
+ *  for use in safety and mission critical applications that require provable
+ *  dependability.
+ *
+ */
 
 /*******************************************************************************
-// Copyright (c) 2003-2015 Cadence Design Systems, Inc.
-//
-// Permission is hereby granted, free of charge, to any person obtaining
-// a copy of this software and associated documentation files (the
-// "Software"), to deal in the Software without restriction, including
-// without limitation the rights to use, copy, modify, merge, publish,
-// distribute, sublicense, and/or sell copies of the Software, and to
-// permit persons to whom the Software is furnished to do so, subject to
-// the following conditions:
-//
-// The above copyright notice and this permission notice shall be included
-// in all copies or substantial portions of the Software.
-//
-// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
-// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
-// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
-// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
-// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
---------------------------------------------------------------------------------
-*/
+ * // Copyright (c) 2003-2015 Cadence Design Systems, Inc.
+ * //
+ * // Permission is hereby granted, free of charge, to any person obtaining
+ * // a copy of this software and associated documentation files (the
+ * // "Software"), to deal in the Software without restriction, including
+ * // without limitation the rights to use, copy, modify, merge, publish,
+ * // distribute, sublicense, and/or sell copies of the Software, and to
+ * // permit persons to whom the Software is furnished to do so, subject to
+ * // the following conditions:
+ * //
+ * // The above copyright notice and this permission notice shall be included
+ * // in all copies or substantial portions of the Software.
+ * //
+ * // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * // EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * // MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * // IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * // CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * // TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * // SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * -----------------------------------------------------------------------------
+ */
 
 #include 
 #include 
@@ -109,153 +110,168 @@
 #include "esp_intr_alloc.h"
 
 /* Defined in portasm.h */
-extern void _frxt_tick_timer_init(void);
+extern void _frxt_tick_timer_init( void );
 
 /* Defined in xtensa_context.S */
-extern void _xt_coproc_init(void);
+extern void _xt_coproc_init( void );
 
 
 #if CONFIG_FREERTOS_CORETIMER_0
-    #define SYSTICK_INTR_ID (ETS_INTERNAL_TIMER0_INTR_SOURCE+ETS_INTERNAL_INTR_SOURCE_OFF)
+    #define SYSTICK_INTR_ID    ( ETS_INTERNAL_TIMER0_INTR_SOURCE + ETS_INTERNAL_INTR_SOURCE_OFF )
 #endif
 #if CONFIG_FREERTOS_CORETIMER_1
-    #define SYSTICK_INTR_ID (ETS_INTERNAL_TIMER1_INTR_SOURCE+ETS_INTERNAL_INTR_SOURCE_OFF)
+    #define SYSTICK_INTR_ID    ( ETS_INTERNAL_TIMER1_INTR_SOURCE + ETS_INTERNAL_INTR_SOURCE_OFF )
 #endif
 
 /*-----------------------------------------------------------*/
 
-unsigned port_xSchedulerRunning[portNUM_PROCESSORS] = {0}; // Duplicate of inaccessible xSchedulerRunning; needed at startup to avoid counting nesting
-unsigned port_interruptNesting[portNUM_PROCESSORS] = {0};  // Interrupt nesting level. Increased/decreased in portasm.c, _frxt_int_enter/_frxt_int_exit
+unsigned port_xSchedulerRunning[ portNUM_PROCESSORS ] = { 0 }; /* Duplicate of inaccessible xSchedulerRunning; needed at startup to avoid counting nesting */
+unsigned port_interruptNesting[ portNUM_PROCESSORS ] = { 0 };  /* Interrupt nesting level. Increased/decreased in portasm.c, _frxt_int_enter/_frxt_int_exit */
 
 /*-----------------------------------------------------------*/
 
-// User exception dispatcher when exiting
-void _xt_user_exit(void);
+/* User exception dispatcher when exiting */
+void _xt_user_exit( void );
 
 /*
  * Stack initialization
  */
+/* *INDENT-OFF* */
 #if portUSING_MPU_WRAPPERS
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged )
+    StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                         TaskFunction_t pxCode,
+                                         void * pvParameters,
+                                         BaseType_t xRunPrivileged )
 #else
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
+    StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                         TaskFunction_t pxCode,
+                                         void * pvParameters )
 #endif
+/* *INDENT-ON* */
 {
-	StackType_t *sp, *tp;
-	XtExcFrame  *frame;
-	#if XCHAL_CP_NUM > 0
-	uint32_t *p;
-	#endif
+    StackType_t * sp, * tp;
+    XtExcFrame * frame;
 
-	/* Create interrupt stack frame aligned to 16 byte boundary */
-	sp = (StackType_t *) (((UBaseType_t)(pxTopOfStack + 1) - XT_CP_SIZE - XT_STK_FRMSZ) & ~0xf);
+    #if XCHAL_CP_NUM > 0
+        uint32_t * p;
+    #endif
 
-	/* Clear the entire frame (do not use memset() because we don't depend on C library) */
-	for (tp = sp; tp <= pxTopOfStack; ++tp)
-		*tp = 0;
+    /* Create interrupt stack frame aligned to 16 byte boundary */
+    sp = ( StackType_t * ) ( ( ( UBaseType_t ) ( pxTopOfStack + 1 ) - XT_CP_SIZE - XT_STK_FRMSZ ) & ~0xf );
 
-	frame = (XtExcFrame *) sp;
+    /* Clear the entire frame (do not use memset() because we don't depend on C library) */
+    for( tp = sp; tp <= pxTopOfStack; ++tp )
+    {
+        *tp = 0;
+    }
 
-	/* Explicitly initialize certain saved registers */
-	frame->pc   = (UBaseType_t) pxCode;             /* task entrypoint                */
-	frame->a0   = 0;                                /* to terminate GDB backtrace     */
-	frame->a1   = (UBaseType_t) sp + XT_STK_FRMSZ;  /* physical top of stack frame    */
-	frame->exit = (UBaseType_t) _xt_user_exit;      /* user exception exit dispatcher */
+    frame = ( XtExcFrame * ) sp;
 
-	/* Set initial PS to int level 0, EXCM disabled ('rfe' will enable), user mode. */
-	/* Also set entry point argument parameter. */
-	#ifdef __XTENSA_CALL0_ABI__
-	frame->a2 = (UBaseType_t) pvParameters;
-	frame->ps = PS_UM | PS_EXCM;
-	#else
-	/* + for windowed ABI also set WOE and CALLINC (pretend task was 'call4'd). */
-	frame->a6 = (UBaseType_t) pvParameters;
-	frame->ps = PS_UM | PS_EXCM | PS_WOE | PS_CALLINC(1);
-	#endif
+    /* Explicitly initialize certain saved registers */
+    frame->pc = ( UBaseType_t ) pxCode;             /* task entrypoint                */
+    frame->a0 = 0;                                  /* to terminate GDB backtrace     */
+    frame->a1 = ( UBaseType_t ) sp + XT_STK_FRMSZ;  /* physical top of stack frame    */
+    frame->exit = ( UBaseType_t ) _xt_user_exit;    /* user exception exit dispatcher */
 
-	#ifdef XT_USE_SWPRI
-	/* Set the initial virtual priority mask value to all 1's. */
-	frame->vpri = 0xFFFFFFFF;
-	#endif
+    /* Set initial PS to int level 0, EXCM disabled ('rfe' will enable), user mode. */
+    /* Also set entry point argument parameter. */
+    #ifdef __XTENSA_CALL0_ABI__
+        frame->a2 = ( UBaseType_t ) pvParameters;
+        frame->ps = PS_UM | PS_EXCM;
+    #else
+        /* + for windowed ABI also set WOE and CALLINC (pretend task was 'call4'd). */
+        frame->a6 = ( UBaseType_t ) pvParameters;
+        frame->ps = PS_UM | PS_EXCM | PS_WOE | PS_CALLINC( 1 );
+    #endif
 
-	#if XCHAL_CP_NUM > 0
-	/* Init the coprocessor save area (see xtensa_context.h) */
-	/* No access to TCB here, so derive indirectly. Stack growth is top to bottom.
+    #ifdef XT_USE_SWPRI
+        /* Set the initial virtual priority mask value to all 1's. */
+        frame->vpri = 0xFFFFFFFF;
+    #endif
+
+    #if XCHAL_CP_NUM > 0
+        /* Init the coprocessor save area (see xtensa_context.h) */
+
+        /* No access to TCB here, so derive indirectly. Stack growth is top to bottom.
          * //p = (uint32_t *) xMPUSettings->coproc_area;
-	 */
-	p = (uint32_t *)(((uint32_t) pxTopOfStack - XT_CP_SIZE) & ~0xf);
-	p[0] = 0;
-	p[1] = 0;
-	p[2] = (((uint32_t) p) + 12 + XCHAL_TOTAL_SA_ALIGN - 1) & -XCHAL_TOTAL_SA_ALIGN;
-	#endif
+         */
+        p = ( uint32_t * ) ( ( ( uint32_t ) pxTopOfStack - XT_CP_SIZE ) & ~0xf );
+        p[ 0 ] = 0;
+        p[ 1 ] = 0;
+        p[ 2 ] = ( ( ( uint32_t ) p ) + 12 + XCHAL_TOTAL_SA_ALIGN - 1 ) & -XCHAL_TOTAL_SA_ALIGN;
+    #endif
 
-	return sp;
+    return sp;
 }
 
 /*-----------------------------------------------------------*/
 
 void vPortEndScheduler( void )
 {
-	/* It is unlikely that the Xtensa port will get stopped.  If required simply
-	disable the tick interrupt here. */
+    /* It is unlikely that the Xtensa port will get stopped.  If required simply
+     * disable the tick interrupt here. */
 }
 
 /*-----------------------------------------------------------*/
 
 BaseType_t xPortStartScheduler( void )
 {
-	// Interrupts are disabled at this point and stack contains PS with enabled interrupts when task context is restored
+    /* Interrupts are disabled at this point and stack contains PS with enabled interrupts when task context is restored */
 
-	#if XCHAL_CP_NUM > 0
-	/* Initialize co-processor management for tasks. Leave CPENABLE alone. */
-	_xt_coproc_init();
-	#endif
+    #if XCHAL_CP_NUM > 0
+        /* Initialize co-processor management for tasks. Leave CPENABLE alone. */
+        _xt_coproc_init();
+    #endif
 
-	/* Init the tick divisor value */
-	_xt_tick_divisor_init();
+    /* Init the tick divisor value */
+    _xt_tick_divisor_init();
 
-	/* Setup the hardware to generate the tick. */
-	_frxt_tick_timer_init();
+    /* Setup the hardware to generate the tick. */
+    _frxt_tick_timer_init();
 
-	port_xSchedulerRunning[xPortGetCoreID()] = 1;
+    port_xSchedulerRunning[ xPortGetCoreID() ] = 1;
 
-	// Cannot be directly called from C; never returns
-	__asm__ volatile ("call0    _frxt_dispatch\n");
+    /* Cannot be directly called from C; never returns */
+    __asm__ volatile ( "call0    _frxt_dispatch\n" );
 
-	/* Should not get here. */
-	return pdTRUE;
+    /* Should not get here. */
+    return pdTRUE;
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xPortSysTickHandler( void )
 {
-	BaseType_t ret;
-	unsigned interruptMask;
+    BaseType_t ret;
+    unsigned interruptMask;
 
-	portbenchmarkIntLatency();
-	traceISR_ENTER(SYSTICK_INTR_ID);
+    portbenchmarkIntLatency();
+    traceISR_ENTER( SYSTICK_INTR_ID );
 
-	/* Interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY must be
-	 * disabled before calling xTaskIncrementTick as it access the
-	 * kernel lists. */
-	interruptMask = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		ret = xTaskIncrementTick();
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( interruptMask );
+    /* Interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY must be
+     * disabled before calling xTaskIncrementTick as it access the
+     * kernel lists. */
+    interruptMask = portSET_INTERRUPT_MASK_FROM_ISR();
+    {
+        ret = xTaskIncrementTick();
+    }
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( interruptMask );
 
-	if( ret != pdFALSE )
-	{
-		portYIELD_FROM_ISR();
-	} else {
-		traceISR_EXIT();
-	}
-	return ret;
+    if( ret != pdFALSE )
+    {
+        portYIELD_FROM_ISR();
+    }
+    else
+    {
+        traceISR_EXIT();
+    }
+
+    return ret;
 }
 
 
-void vPortYieldOtherCore( BaseType_t coreid ) {
-	esp_crosscore_int_send_yield( coreid );
+void vPortYieldOtherCore( BaseType_t coreid )
+{
+    esp_crosscore_int_send_yield( coreid );
 }
 
 /*-----------------------------------------------------------*/
@@ -264,25 +280,28 @@ void vPortYieldOtherCore( BaseType_t coreid ) {
  * Used to set coprocessor area in stack. Current hack is to reuse MPU pointer for coprocessor area.
  */
 #if portUSING_MPU_WRAPPERS
-void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t usStackDepth )
-{
-	#if XCHAL_CP_NUM > 0
-	xMPUSettings->coproc_area = (StackType_t*)((((uint32_t)(pxBottomOfStack + usStackDepth - 1)) - XT_CP_SIZE ) & ~0xf);
+    void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
+                                    const struct xMEMORY_REGION * const xRegions,
+                                    StackType_t * pxBottomOfStack,
+                                    uint32_t usStackDepth )
+    {
+        #if XCHAL_CP_NUM > 0
+            xMPUSettings->coproc_area = ( StackType_t * ) ( ( ( ( uint32_t ) ( pxBottomOfStack + usStackDepth - 1 ) ) - XT_CP_SIZE ) & ~0xf );
 
 
-	/* NOTE: we cannot initialize the coprocessor save area here because FreeRTOS is going to
-         * clear the stack area after we return. This is done in pxPortInitialiseStack().
-	 */
-	#endif
-}
+            /* NOTE: we cannot initialize the coprocessor save area here because FreeRTOS is going to
+             * clear the stack area after we return. This is done in pxPortInitialiseStack().
+             */
+        #endif
+    }
 
-void vPortReleaseTaskMPUSettings( xMPU_SETTINGS *xMPUSettings )
-{
-	/* If task has live floating point registers somewhere, release them */
-	_xt_coproc_release( xMPUSettings->coproc_area );
-}
+    void vPortReleaseTaskMPUSettings( xMPU_SETTINGS * xMPUSettings )
+    {
+        /* If task has live floating point registers somewhere, release them */
+        _xt_coproc_release( xMPUSettings->coproc_area );
+    }
 
-#endif
+#endif /* if portUSING_MPU_WRAPPERS */
 
 /*
  * Returns true if the current core is in ISR context; low prio ISR, med prio ISR or timer tick ISR. High prio ISRs
@@ -290,12 +309,13 @@ void vPortReleaseTaskMPUSettings( xMPU_SETTINGS *xMPUSettings )
  */
 BaseType_t xPortInIsrContext()
 {
-	unsigned int irqStatus;
-	BaseType_t ret;
-	irqStatus=portENTER_CRITICAL_NESTED();
-	ret=(port_interruptNesting[xPortGetCoreID()] != 0);
-	portEXIT_CRITICAL_NESTED(irqStatus);
-	return ret;
+    unsigned int irqStatus;
+    BaseType_t ret;
+
+    irqStatus = portENTER_CRITICAL_NESTED();
+    ret = ( port_interruptNesting[ xPortGetCoreID() ] != 0 );
+    portEXIT_CRITICAL_NESTED( irqStatus );
+    return ret;
 }
 
 /*
@@ -304,29 +324,31 @@ BaseType_t xPortInIsrContext()
  */
 BaseType_t IRAM_ATTR xPortInterruptedFromISRContext()
 {
-	return (port_interruptNesting[xPortGetCoreID()] != 0);
+    return( port_interruptNesting[ xPortGetCoreID() ] != 0 );
 }
 
 void vPortAssertIfInISR()
 {
-	if (xPortInIsrContext()) {
-		ets_printf("core=%d port_interruptNesting=%d\n\n", xPortGetCoreID(), port_interruptNesting[xPortGetCoreID()]);
-	}
-	configASSERT(!xPortInIsrContext());
+    if( xPortInIsrContext() )
+    {
+        ets_printf( "core=%d port_interruptNesting=%d\n\n", xPortGetCoreID(), port_interruptNesting[ xPortGetCoreID() ] );
+    }
+
+    configASSERT( !xPortInIsrContext() );
 }
 
 /*
  * For kernel use: Initialize a per-CPU mux. Mux will be initialized unlocked.
  */
-void vPortCPUInitializeMutex(portMUX_TYPE *mux) {
-
-#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
-	ets_printf("Initializing mux %p\n", mux);
-	mux->lastLockedFn="(never locked)";
-	mux->lastLockedLine=-1;
-#endif
-	mux->owner=portMUX_FREE_VAL;
-	mux->count=0;
+void vPortCPUInitializeMutex( portMUX_TYPE * mux )
+{
+    #ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
+        ets_printf( "Initializing mux %p\n", mux );
+        mux->lastLockedFn = "(never locked)";
+        mux->lastLockedLine = -1;
+    #endif
+    mux->owner = portMUX_FREE_VAL;
+    mux->count = 0;
 }
 
 #include "portmux_impl.h"
@@ -335,33 +357,47 @@ void vPortCPUInitializeMutex(portMUX_TYPE *mux) {
  * For kernel use: Acquire a per-CPU mux. Spinlocks, so don't hold on to these muxes for too long.
  */
 #ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
-void vPortCPUAcquireMutex(portMUX_TYPE *mux, const char *fnName, int line) {
-	unsigned int irqStatus = portENTER_CRITICAL_NESTED();
-	vPortCPUAcquireMutexIntsDisabled(mux, portMUX_NO_TIMEOUT, fnName, line);
-	portEXIT_CRITICAL_NESTED(irqStatus);
-}
+    void vPortCPUAcquireMutex( portMUX_TYPE * mux,
+                               const char * fnName,
+                               int line )
+    {
+        unsigned int irqStatus = portENTER_CRITICAL_NESTED();
 
-bool vPortCPUAcquireMutexTimeout(portMUX_TYPE *mux, int timeout_cycles, const char *fnName, int line) {
-	unsigned int irqStatus = portENTER_CRITICAL_NESTED();
-	bool result = vPortCPUAcquireMutexIntsDisabled(mux, timeout_cycles, fnName, line);
-	portEXIT_CRITICAL_NESTED(irqStatus);
-	return result;
-}
+        vPortCPUAcquireMutexIntsDisabled( mux, portMUX_NO_TIMEOUT, fnName, line );
+        portEXIT_CRITICAL_NESTED( irqStatus );
+    }
 
-#else
-void vPortCPUAcquireMutex(portMUX_TYPE *mux) {
-	unsigned int irqStatus = portENTER_CRITICAL_NESTED();
-	vPortCPUAcquireMutexIntsDisabled(mux, portMUX_NO_TIMEOUT);
-	portEXIT_CRITICAL_NESTED(irqStatus);
-}
+    bool vPortCPUAcquireMutexTimeout( portMUX_TYPE * mux,
+                                      int timeout_cycles,
+                                      const char * fnName,
+                                      int line )
+    {
+        unsigned int irqStatus = portENTER_CRITICAL_NESTED();
+        bool result = vPortCPUAcquireMutexIntsDisabled( mux, timeout_cycles, fnName, line );
 
-bool vPortCPUAcquireMutexTimeout(portMUX_TYPE *mux, int timeout_cycles) {
-	unsigned int irqStatus = portENTER_CRITICAL_NESTED();
-	bool result = vPortCPUAcquireMutexIntsDisabled(mux, timeout_cycles);
-	portEXIT_CRITICAL_NESTED(irqStatus);
-	return result;
-}
-#endif
+        portEXIT_CRITICAL_NESTED( irqStatus );
+        return result;
+    }
+
+#else /* ifdef CONFIG_FREERTOS_PORTMUX_DEBUG */
+    void vPortCPUAcquireMutex( portMUX_TYPE * mux )
+    {
+        unsigned int irqStatus = portENTER_CRITICAL_NESTED();
+
+        vPortCPUAcquireMutexIntsDisabled( mux, portMUX_NO_TIMEOUT );
+        portEXIT_CRITICAL_NESTED( irqStatus );
+    }
+
+    bool vPortCPUAcquireMutexTimeout( portMUX_TYPE * mux,
+                                      int timeout_cycles )
+    {
+        unsigned int irqStatus = portENTER_CRITICAL_NESTED();
+        bool result = vPortCPUAcquireMutexIntsDisabled( mux, timeout_cycles );
+
+        portEXIT_CRITICAL_NESTED( irqStatus );
+        return result;
+    }
+#endif /* ifdef CONFIG_FREERTOS_PORTMUX_DEBUG */
 
 
 /*
@@ -370,59 +406,76 @@ bool vPortCPUAcquireMutexTimeout(portMUX_TYPE *mux, int timeout_cycles) {
  * Mux must be already locked by this core
  */
 #ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
-void vPortCPUReleaseMutex(portMUX_TYPE *mux, const char *fnName, int line) {
-	unsigned int irqStatus = portENTER_CRITICAL_NESTED();
-	vPortCPUReleaseMutexIntsDisabled(mux, fnName, line);
-	portEXIT_CRITICAL_NESTED(irqStatus);
-}
+    void vPortCPUReleaseMutex( portMUX_TYPE * mux,
+                               const char * fnName,
+                               int line )
+    {
+        unsigned int irqStatus = portENTER_CRITICAL_NESTED();
+
+        vPortCPUReleaseMutexIntsDisabled( mux, fnName, line );
+        portEXIT_CRITICAL_NESTED( irqStatus );
+    }
 #else
-void vPortCPUReleaseMutex(portMUX_TYPE *mux) {
-	unsigned int irqStatus = portENTER_CRITICAL_NESTED();
-	vPortCPUReleaseMutexIntsDisabled(mux);
-	portEXIT_CRITICAL_NESTED(irqStatus);
-}
-#endif
+    void vPortCPUReleaseMutex( portMUX_TYPE * mux )
+    {
+        unsigned int irqStatus = portENTER_CRITICAL_NESTED();
 
-void vPortSetStackWatchpoint( void* pxStackStart ) {
-	//Set watchpoint 1 to watch the last 32 bytes of the stack.
-	//Unfortunately, the Xtensa watchpoints can't set a watchpoint on a random [base - base+n] region because
-	//the size works by masking off the lowest address bits. For that reason, we futz a bit and watch the lowest 32
-	//bytes of the stack we can actually watch. In general, this can cause the watchpoint to be triggered at most
-	//28 bytes early. The value 32 is chosen because it's larger than the stack canary, which in FreeRTOS is 20 bytes.
-	//This way, we make sure we trigger before/when the stack canary is corrupted, not after.
-	int addr=(int)pxStackStart;
-	addr=(addr+31)&(~31);
-	esp_set_watchpoint(1, (char*)addr, 32, ESP_WATCHPOINT_STORE);
+        vPortCPUReleaseMutexIntsDisabled( mux );
+        portEXIT_CRITICAL_NESTED( irqStatus );
+    }
+#endif /* ifdef CONFIG_FREERTOS_PORTMUX_DEBUG */
+
+void vPortSetStackWatchpoint( void * pxStackStart )
+{
+    /*Set watchpoint 1 to watch the last 32 bytes of the stack. */
+    /*Unfortunately, the Xtensa watchpoints can't set a watchpoint on a random [base - base+n] region because */
+    /*the size works by masking off the lowest address bits. For that reason, we futz a bit and watch the lowest 32 */
+    /*bytes of the stack we can actually watch. In general, this can cause the watchpoint to be triggered at most */
+    /*28 bytes early. The value 32 is chosen because it's larger than the stack canary, which in FreeRTOS is 20 bytes. */
+    /*This way, we make sure we trigger before/when the stack canary is corrupted, not after. */
+    int addr = ( int ) pxStackStart;
+
+    addr = ( addr + 31 ) & ( ~31 );
+    esp_set_watchpoint( 1, ( char * ) addr, 32, ESP_WATCHPOINT_STORE );
 }
 
-#if defined(CONFIG_SPIRAM_SUPPORT)
+#if defined( CONFIG_SPIRAM_SUPPORT )
+
 /*
  * Compare & set (S32C1) does not work in external RAM. Instead, this routine uses a mux (in internal memory) to fake it.
  */
-static portMUX_TYPE extram_mux = portMUX_INITIALIZER_UNLOCKED;
+    static portMUX_TYPE extram_mux = portMUX_INITIALIZER_UNLOCKED;
 
-void uxPortCompareSetExtram(volatile uint32_t *addr, uint32_t compare, uint32_t *set) {
-	uint32_t prev;
-#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
-	vPortCPUAcquireMutexIntsDisabled(&extram_mux, portMUX_NO_TIMEOUT, __FUNCTION__, __LINE__);
-#else
-	vPortCPUAcquireMutexIntsDisabled(&extram_mux, portMUX_NO_TIMEOUT); 
-#endif
-	prev=*addr;
-	if (prev==compare) {
-		*addr=*set;
-	}
-	*set=prev;
-#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
-	vPortCPUReleaseMutexIntsDisabled(&extram_mux, __FUNCTION__, __LINE__);
-#else
-	vPortCPUReleaseMutexIntsDisabled(&extram_mux);
-#endif
-}
+    void uxPortCompareSetExtram( volatile uint32_t * addr,
+                                 uint32_t compare,
+                                 uint32_t * set )
+    {
+        uint32_t prev;
+
+        #ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
+            vPortCPUAcquireMutexIntsDisabled( &extram_mux, portMUX_NO_TIMEOUT, __FUNCTION__, __LINE__ );
+        #else
+            vPortCPUAcquireMutexIntsDisabled( &extram_mux, portMUX_NO_TIMEOUT );
+        #endif
+        prev = *addr;
+
+        if( prev == compare )
+        {
+            *addr = *set;
+        }
+
+        *set = prev;
+        #ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
+            vPortCPUReleaseMutexIntsDisabled( &extram_mux, __FUNCTION__, __LINE__ );
+        #else
+            vPortCPUReleaseMutexIntsDisabled( &extram_mux );
+        #endif
+    }
 #endif //defined(CONFIG_SPIRAM_SUPPORT)
 
 
 
-uint32_t xPortGetTickRateHz(void) {
-	return (uint32_t)configTICK_RATE_HZ;
+uint32_t xPortGetTickRateHz( void )
+{
+    return ( uint32_t ) configTICK_RATE_HZ;
 }
diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/portmux_impl.h b/portable/ThirdParty/GCC/Xtensa_ESP32/portmux_impl.h
index c251c0747..4c2f9dcfe 100644
--- a/portable/ThirdParty/GCC/Xtensa_ESP32/portmux_impl.h
+++ b/portable/ThirdParty/GCC/Xtensa_ESP32/portmux_impl.h
@@ -1,111 +1,113 @@
 /*
-    Copyright (C) 2016-2017 Espressif Shanghai PTE LTD
-    Copyright (C) 2015 Real Time Engineers Ltd.
-
-    All rights reserved
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
-
-	***************************************************************************
-    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
-    >>!   distribute a combined work that includes FreeRTOS without being   !<<
-    >>!   obliged to provide the source code for proprietary components     !<<
-    >>!   outside of the FreeRTOS kernel.                                   !<<
-	***************************************************************************
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
-    link: http://www.freertos.org/a00114.html
-*/
+ *  Copyright (C) 2016-2017 Espressif Shanghai PTE LTD
+ *  Copyright (C) 2015 Real Time Engineers Ltd.
+ *
+ *  All rights reserved
+ *
+ *  FreeRTOS is free software; you can redistribute it and/or modify it under
+ *  the terms of the GNU General Public License (version 2) as published by the
+ *  Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+ *
+ ***************************************************************************
+ *  >>!   NOTE: The modification to the GPL is included to allow you to     !<<
+ *  >>!   distribute a combined work that includes FreeRTOS without being   !<<
+ *  >>!   obliged to provide the source code for proprietary components     !<<
+ *  >>!   outside of the FreeRTOS kernel.                                   !<<
+ ***************************************************************************
+ *
+ *  FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
+ *  WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ *  FOR A PARTICULAR PURPOSE.  Full license text is available on the following
+ *  link: https://www.FreeRTOS.org/a00114.html
+ */
 
 /* This header exists for performance reasons, in order to inline the
-   implementation of vPortCPUAcquireMutexIntsDisabled and
-   vPortCPUReleaseMutexIntsDisabled into the
-   vTaskEnterCritical/vTaskExitCritical functions in task.c as well as the
-   vPortCPUAcquireMutex/vPortCPUReleaseMutex implementations.
-
-   Normally this kind of performance hack is over the top, but
-   vTaskEnterCritical/vTaskExitCritical is called a great
-   deal by FreeRTOS internals.
-
-   It should be #included by freertos port.c or tasks.c, in esp-idf.
-
-   The way it works is that it essentially uses portmux_impl.inc.h as a
-   generator template of sorts. When no external memory is used, this 
-   template is only used to generate the vPortCPUAcquireMutexIntsDisabledInternal
-   and vPortCPUReleaseMutexIntsDisabledInternal functions, which use S32C1 to
-   do an atomic compare & swap. When external memory is used the functions
-   vPortCPUAcquireMutexIntsDisabledExtram and vPortCPUReleaseMutexIntsDisabledExtram
-   are also generated, which use uxPortCompareSetExtram to fake the S32C1 instruction.
-   The wrapper functions vPortCPUAcquireMutexIntsDisabled and 
-   vPortCPUReleaseMutexIntsDisabled will then use the appropriate function to do the
-   actual lock/unlock.
-*/
+ * implementation of vPortCPUAcquireMutexIntsDisabled and
+ * vPortCPUReleaseMutexIntsDisabled into the
+ * vTaskEnterCritical/vTaskExitCritical functions in task.c as well as the
+ * vPortCPUAcquireMutex/vPortCPUReleaseMutex implementations.
+ *
+ * Normally this kind of performance hack is over the top, but
+ * vTaskEnterCritical/vTaskExitCritical is called a great
+ * deal by FreeRTOS internals.
+ *
+ * It should be #included by freertos port.c or tasks.c, in esp-idf.
+ *
+ * The way it works is that it essentially uses portmux_impl.inc.h as a
+ * generator template of sorts. When no external memory is used, this
+ * template is only used to generate the vPortCPUAcquireMutexIntsDisabledInternal
+ * and vPortCPUReleaseMutexIntsDisabledInternal functions, which use S32C1 to
+ * do an atomic compare & swap. When external memory is used the functions
+ * vPortCPUAcquireMutexIntsDisabledExtram and vPortCPUReleaseMutexIntsDisabledExtram
+ * are also generated, which use uxPortCompareSetExtram to fake the S32C1 instruction.
+ * The wrapper functions vPortCPUAcquireMutexIntsDisabled and
+ * vPortCPUReleaseMutexIntsDisabled will then use the appropriate function to do the
+ * actual lock/unlock.
+ */
 #include "soc/cpu.h"
 #include "portable.h"
 
 /* XOR one core ID with this value to get the other core ID */
-#define CORE_ID_XOR_SWAP (CORE_ID_PRO ^ CORE_ID_APP)
+#define CORE_ID_XOR_SWAP    ( CORE_ID_PRO ^ CORE_ID_APP )
 
 
 
-
-//Define the mux routines for use with muxes in internal RAM
-#define PORTMUX_AQUIRE_MUX_FN_NAME vPortCPUAcquireMutexIntsDisabledInternal
-#define PORTMUX_RELEASE_MUX_FN_NAME vPortCPUReleaseMutexIntsDisabledInternal
-#define PORTMUX_COMPARE_SET_FN_NAME uxPortCompareSet
+/*Define the mux routines for use with muxes in internal RAM */
+#define PORTMUX_AQUIRE_MUX_FN_NAME     vPortCPUAcquireMutexIntsDisabledInternal
+#define PORTMUX_RELEASE_MUX_FN_NAME    vPortCPUReleaseMutexIntsDisabledInternal
+#define PORTMUX_COMPARE_SET_FN_NAME    uxPortCompareSet
 #include "portmux_impl.inc.h"
 #undef PORTMUX_AQUIRE_MUX_FN_NAME
 #undef PORTMUX_RELEASE_MUX_FN_NAME
 #undef PORTMUX_COMPARE_SET_FN_NAME
 
 
-#if defined(CONFIG_SPIRAM_SUPPORT)
+#if defined( CONFIG_SPIRAM_SUPPORT )
 
-#define PORTMUX_AQUIRE_MUX_FN_NAME vPortCPUAcquireMutexIntsDisabledExtram
-#define PORTMUX_RELEASE_MUX_FN_NAME vPortCPUReleaseMutexIntsDisabledExtram
-#define PORTMUX_COMPARE_SET_FN_NAME uxPortCompareSetExtram
-#include "portmux_impl.inc.h"
-#undef PORTMUX_AQUIRE_MUX_FN_NAME
-#undef PORTMUX_RELEASE_MUX_FN_NAME
-#undef PORTMUX_COMPARE_SET_FN_NAME
+    #define PORTMUX_AQUIRE_MUX_FN_NAME     vPortCPUAcquireMutexIntsDisabledExtram
+    #define PORTMUX_RELEASE_MUX_FN_NAME    vPortCPUReleaseMutexIntsDisabledExtram
+    #define PORTMUX_COMPARE_SET_FN_NAME    uxPortCompareSetExtram
+    #include "portmux_impl.inc.h"
+    #undef PORTMUX_AQUIRE_MUX_FN_NAME
+    #undef PORTMUX_RELEASE_MUX_FN_NAME
+    #undef PORTMUX_COMPARE_SET_FN_NAME
 
 #endif
 
 
 #ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
-#define PORTMUX_AQUIRE_MUX_FN_ARGS portMUX_TYPE *mux, int timeout_cycles, const char *fnName, int line
-#define PORTMUX_RELEASE_MUX_FN_ARGS portMUX_TYPE *mux, const char *fnName, int line
-#define PORTMUX_AQUIRE_MUX_FN_CALL_ARGS(x) x, timeout_cycles, fnName, line
-#define PORTMUX_RELEASE_MUX_FN_CALL_ARGS(x) x, fnName, line
+    #define PORTMUX_AQUIRE_MUX_FN_ARGS     portMUX_TYPE * mux, int timeout_cycles, const char * fnName, int line
+    #define PORTMUX_RELEASE_MUX_FN_ARGS    portMUX_TYPE * mux, const char * fnName, int line
+    #define PORTMUX_AQUIRE_MUX_FN_CALL_ARGS( x )     x, timeout_cycles, fnName, line
+    #define PORTMUX_RELEASE_MUX_FN_CALL_ARGS( x )    x, fnName, line
 #else
-#define PORTMUX_AQUIRE_MUX_FN_ARGS portMUX_TYPE *mux, int timeout_cycles
-#define PORTMUX_RELEASE_MUX_FN_ARGS portMUX_TYPE *mux
-#define PORTMUX_AQUIRE_MUX_FN_CALL_ARGS(x) x, timeout_cycles
-#define PORTMUX_RELEASE_MUX_FN_CALL_ARGS(x) x
+    #define PORTMUX_AQUIRE_MUX_FN_ARGS     portMUX_TYPE * mux, int timeout_cycles
+    #define PORTMUX_RELEASE_MUX_FN_ARGS    portMUX_TYPE * mux
+    #define PORTMUX_AQUIRE_MUX_FN_CALL_ARGS( x )     x, timeout_cycles
+    #define PORTMUX_RELEASE_MUX_FN_CALL_ARGS( x )    x
 #endif
 
 
-static inline bool __attribute__((always_inline)) vPortCPUAcquireMutexIntsDisabled(PORTMUX_AQUIRE_MUX_FN_ARGS) {
-#if defined(CONFIG_SPIRAM_SUPPORT)
-	if (esp_ptr_external_ram(mux)) {
-		return vPortCPUAcquireMutexIntsDisabledExtram(PORTMUX_AQUIRE_MUX_FN_CALL_ARGS(mux));
-	}
-#endif
-	return vPortCPUAcquireMutexIntsDisabledInternal(PORTMUX_AQUIRE_MUX_FN_CALL_ARGS(mux));
+static inline bool __attribute__( ( always_inline ) ) vPortCPUAcquireMutexIntsDisabled( PORTMUX_AQUIRE_MUX_FN_ARGS )
+{
+    #if defined( CONFIG_SPIRAM_SUPPORT )
+        if( esp_ptr_external_ram( mux ) )
+        {
+            return vPortCPUAcquireMutexIntsDisabledExtram( PORTMUX_AQUIRE_MUX_FN_CALL_ARGS( mux ) );
+        }
+    #endif
+    return vPortCPUAcquireMutexIntsDisabledInternal( PORTMUX_AQUIRE_MUX_FN_CALL_ARGS( mux ) );
 }
 
 
-static inline void vPortCPUReleaseMutexIntsDisabled(PORTMUX_RELEASE_MUX_FN_ARGS) {
-#if defined(CONFIG_SPIRAM_SUPPORT)
-	if (esp_ptr_external_ram(mux)) {
-		vPortCPUReleaseMutexIntsDisabledExtram(PORTMUX_RELEASE_MUX_FN_CALL_ARGS(mux));
-		return;
-	}
-#endif
-	vPortCPUReleaseMutexIntsDisabledInternal(PORTMUX_RELEASE_MUX_FN_CALL_ARGS(mux));
+static inline void vPortCPUReleaseMutexIntsDisabled( PORTMUX_RELEASE_MUX_FN_ARGS )
+{
+    #if defined( CONFIG_SPIRAM_SUPPORT )
+        if( esp_ptr_external_ram( mux ) )
+        {
+            vPortCPUReleaseMutexIntsDisabledExtram( PORTMUX_RELEASE_MUX_FN_CALL_ARGS( mux ) );
+            return;
+        }
+    #endif
+    vPortCPUReleaseMutexIntsDisabledInternal( PORTMUX_RELEASE_MUX_FN_CALL_ARGS( mux ) );
 }
-
diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/portmux_impl.inc.h b/portable/ThirdParty/GCC/Xtensa_ESP32/portmux_impl.inc.h
index e29b74c66..e98d4884b 100644
--- a/portable/ThirdParty/GCC/Xtensa_ESP32/portmux_impl.inc.h
+++ b/portable/ThirdParty/GCC/Xtensa_ESP32/portmux_impl.inc.h
@@ -1,169 +1,200 @@
 /*
-    Copyright (C) 2016-2017 Espressif Shanghai PTE LTD
-    Copyright (C) 2015 Real Time Engineers Ltd.
-
-    All rights reserved
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
-
-	***************************************************************************
-    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
-    >>!   distribute a combined work that includes FreeRTOS without being   !<<
-    >>!   obliged to provide the source code for proprietary components     !<<
-    >>!   outside of the FreeRTOS kernel.                                   !<<
-	***************************************************************************
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
-    link: http://www.freertos.org/a00114.html
-*/
+ *  Copyright (C) 2016-2017 Espressif Shanghai PTE LTD
+ *  Copyright (C) 2015 Real Time Engineers Ltd.
+ *
+ *  All rights reserved
+ *
+ *  FreeRTOS is free software; you can redistribute it and/or modify it under
+ *  the terms of the GNU General Public License (version 2) as published by the
+ *  Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+ *
+ ***************************************************************************
+ *  >>!   NOTE: The modification to the GPL is included to allow you to     !<<
+ *  >>!   distribute a combined work that includes FreeRTOS without being   !<<
+ *  >>!   obliged to provide the source code for proprietary components     !<<
+ *  >>!   outside of the FreeRTOS kernel.                                   !<<
+ ***************************************************************************
+ *
+ *  FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
+ *  WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ *  FOR A PARTICULAR PURPOSE.  Full license text is available on the following
+ *  link: https://www.FreeRTOS.org/a00114.html
+ */
 
 
 /*
-  Warning: funky preprocessor hackery ahead. Including these headers will generate two
-  functions, which names are defined by the preprocessor macros 
-  PORTMUX_AQUIRE_MUX_FN_NAME and PORTMUX_RELEASE_MUX_FN_NAME. In order to do the compare
-  and exchange function, they will use whatever PORTMUX_COMPARE_SET_FN_NAME resolves to.
-
-  In some scenarios, this header is included *twice* in portmux_impl.h: one time 
-  for the 'normal' mux code which uses a compare&exchange routine, another time 
-  to generate code for a second set of these routines that use a second mux 
-  (in internal ram) to fake a compare&exchange on a variable in external memory.
-*/
+ * Warning: funky preprocessor hackery ahead. Including these headers will generate two
+ * functions, which names are defined by the preprocessor macros
+ * PORTMUX_AQUIRE_MUX_FN_NAME and PORTMUX_RELEASE_MUX_FN_NAME. In order to do the compare
+ * and exchange function, they will use whatever PORTMUX_COMPARE_SET_FN_NAME resolves to.
+ *
+ * In some scenarios, this header is included *twice* in portmux_impl.h: one time
+ * for the 'normal' mux code which uses a compare&exchange routine, another time
+ * to generate code for a second set of these routines that use a second mux
+ * (in internal ram) to fake a compare&exchange on a variable in external memory.
+ */
 
 
 
-static inline bool __attribute__((always_inline))
+static inline bool __attribute__( ( always_inline ) )
 #ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
-PORTMUX_AQUIRE_MUX_FN_NAME(portMUX_TYPE *mux, int timeout_cycles, const char *fnName, int line) {
+    PORTMUX_AQUIRE_MUX_FN_NAME( portMUX_TYPE * mux,
+                                int timeout_cycles,
+                                const char * fnName,
+                                int line )
+    {
 #else
-PORTMUX_AQUIRE_MUX_FN_NAME(portMUX_TYPE *mux, int timeout_cycles) {
-#endif
+    PORTMUX_AQUIRE_MUX_FN_NAME( portMUX_TYPE * mux, int timeout_cycles )
+    {
+        #endif
 
 
-#if !CONFIG_FREERTOS_UNICORE
-	uint32_t res;
-	portBASE_TYPE coreID, otherCoreID;
-	uint32_t ccount_start;
-	bool set_timeout = timeout_cycles > portMUX_NO_TIMEOUT;
-#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
-	if (!set_timeout) {
-		timeout_cycles = 10000; // Always set a timeout in debug mode
-		set_timeout = true;
-	}
-#endif
-	if (set_timeout) { // Timeout
-		RSR(CCOUNT, ccount_start);
-	}
+        #if !CONFIG_FREERTOS_UNICORE
+            uint32_t res;
+            portBASE_TYPE coreID, otherCoreID;
+            uint32_t ccount_start;
+            bool set_timeout = timeout_cycles > portMUX_NO_TIMEOUT;
+            #ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
+                if( !set_timeout )
+                {
+                    timeout_cycles = 10000; /* Always set a timeout in debug mode */
+                    set_timeout = true;
+                }
+            #endif
+
+            if( set_timeout ) /* Timeout */
+            {
+                RSR( CCOUNT, ccount_start );
+            }
+
+            #ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
+                uint32_t owner = mux->owner;
+
+                if( ( owner != portMUX_FREE_VAL ) && ( owner != CORE_ID_PRO ) && ( owner != CORE_ID_APP ) )
+                {
+                    ets_printf( "ERROR: vPortCPUAcquireMutex: mux %p is uninitialized (0x%X)! Called from %s line %d.\n", mux, owner, fnName, line );
+                    mux->owner = portMUX_FREE_VAL;
+                }
+            #endif
+
+            /* Spin until we own the core */
+
+            RSR( PRID, coreID );
+
+            /* Note: coreID is the full 32 bit core ID (CORE_ID_PRO/CORE_ID_APP),
+             * not the 0/1 value returned by xPortGetCoreID()
+             */
+            otherCoreID = CORE_ID_XOR_SWAP ^ coreID;
+
+            do
+            {
+                /* mux->owner should be one of portMUX_FREE_VAL, CORE_ID_PRO,
+                 * CORE_ID_APP:
+                 *
+                 * - If portMUX_FREE_VAL, we want to atomically set to 'coreID'.
+                 * - If "our" coreID, we can drop through immediately.
+                 * - If "otherCoreID", we spin here.
+                 */
+                res = coreID;
+                PORTMUX_COMPARE_SET_FN_NAME( &mux->owner, portMUX_FREE_VAL, &res );
+
+                if( res != otherCoreID )
+                {
+                    break; /* mux->owner is "our" coreID */
+                }
+
+                if( set_timeout )
+                {
+                    uint32_t ccount_now;
+                    RSR( CCOUNT, ccount_now );
+
+                    if( ccount_now - ccount_start > ( unsigned ) timeout_cycles )
+                    {
+                        #ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
+                            ets_printf( "Timeout on mux! last non-recursive lock %s line %d, curr %s line %d\n", mux->lastLockedFn, mux->lastLockedLine, fnName, line );
+                            ets_printf( "Owner 0x%x count %d\n", mux->owner, mux->count );
+                        #endif
+                        return false;
+                    }
+                }
+            } while( 1 );
+
+            assert( res == coreID || res == portMUX_FREE_VAL );           /* any other value implies memory corruption or uninitialized mux */
+            assert( ( res == portMUX_FREE_VAL ) == ( mux->count == 0 ) ); /* we're first to lock iff count is zero */
+            assert( mux->count < 0xFF );                                  /* Bad count value implies memory corruption */
+
+            /* now we own it, we can increment the refcount */
+            mux->count++;
+
+
+            #ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
+                if( res == portMUX_FREE_VAL ) /*initial lock */
+                {
+                    mux->lastLockedFn = fnName;
+                    mux->lastLockedLine = line;
+                }
+                else
+                {
+                    ets_printf( "Recursive lock: count=%d last non-recursive lock %s line %d, curr %s line %d\n", mux->count - 1,
+                                mux->lastLockedFn, mux->lastLockedLine, fnName, line );
+                }
+            #endif /* CONFIG_FREERTOS_PORTMUX_DEBUG */
+        #endif /* CONFIG_FREERTOS_UNICORE */
+        return true;
+    }
 
 #ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
-	uint32_t owner = mux->owner;
-	if (owner != portMUX_FREE_VAL && owner != CORE_ID_PRO && owner != CORE_ID_APP) {
-		ets_printf("ERROR: vPortCPUAcquireMutex: mux %p is uninitialized (0x%X)! Called from %s line %d.\n", mux, owner, fnName, line);
-		mux->owner=portMUX_FREE_VAL;
-	}
-#endif
-
-	/* Spin until we own the core */
-
-	RSR(PRID, coreID);
-	/* Note: coreID is the full 32 bit core ID (CORE_ID_PRO/CORE_ID_APP),
-	   not the 0/1 value returned by xPortGetCoreID()
-	*/
-	otherCoreID = CORE_ID_XOR_SWAP ^ coreID;
-	do {
-		/* mux->owner should be one of portMUX_FREE_VAL, CORE_ID_PRO,
-		   CORE_ID_APP:
-
-		   - If portMUX_FREE_VAL, we want to atomically set to 'coreID'.
-		   - If "our" coreID, we can drop through immediately.
-		   - If "otherCoreID", we spin here.
-		 */
-		res = coreID;
-		PORTMUX_COMPARE_SET_FN_NAME(&mux->owner, portMUX_FREE_VAL, &res);
-
-		if (res != otherCoreID) {
-			break; // mux->owner is "our" coreID
-		}
-
-		if (set_timeout) {
-			uint32_t ccount_now;
-			RSR(CCOUNT, ccount_now);
-			if (ccount_now - ccount_start > (unsigned)timeout_cycles) {
-#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
-				ets_printf("Timeout on mux! last non-recursive lock %s line %d, curr %s line %d\n", mux->lastLockedFn, mux->lastLockedLine, fnName, line);
-				ets_printf("Owner 0x%x count %d\n", mux->owner, mux->count);
-#endif
-				return false;
-			}
-		}
-	} while (1);
-
-	assert(res == coreID || res == portMUX_FREE_VAL); /* any other value implies memory corruption or uninitialized mux */
-	assert((res == portMUX_FREE_VAL) == (mux->count == 0)); /* we're first to lock iff count is zero */
-    assert(mux->count < 0xFF); /* Bad count value implies memory corruption */
-
-	/* now we own it, we can increment the refcount */
-	mux->count++;
-
-
-#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
-	if (res==portMUX_FREE_VAL) { //initial lock
-		mux->lastLockedFn=fnName;
-		mux->lastLockedLine=line;
-	} else {
-		ets_printf("Recursive lock: count=%d last non-recursive lock %s line %d, curr %s line %d\n", mux->count-1,
-				   mux->lastLockedFn, mux->lastLockedLine, fnName, line);
-	}
-#endif /* CONFIG_FREERTOS_PORTMUX_DEBUG */
-#endif /* CONFIG_FREERTOS_UNICORE */
-	return true;
-}
-
-#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
-static inline void PORTMUX_RELEASE_MUX_FN_NAME(portMUX_TYPE *mux, const char *fnName, int line) {
+        static inline void PORTMUX_RELEASE_MUX_FN_NAME( portMUX_TYPE * mux,
+                                                        const char * fnName,
+                                                        int line )
+        {
 #else
-static inline void PORTMUX_RELEASE_MUX_FN_NAME(portMUX_TYPE *mux) {
-#endif
+        static inline void PORTMUX_RELEASE_MUX_FN_NAME( portMUX_TYPE * mux )
+        {
+            #endif
 
 
-#if !CONFIG_FREERTOS_UNICORE
-	portBASE_TYPE coreID;
-#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
-	const char *lastLockedFn=mux->lastLockedFn;
-	int lastLockedLine=mux->lastLockedLine;
-	mux->lastLockedFn=fnName;
-	mux->lastLockedLine=line;
-	uint32_t owner = mux->owner;
-	if (owner != portMUX_FREE_VAL && owner != CORE_ID_PRO && owner != CORE_ID_APP) {
-		ets_printf("ERROR: vPortCPUReleaseMutex: mux %p is invalid (0x%x)!\n", mux, mux->owner);
-	}
-#endif
+            #if !CONFIG_FREERTOS_UNICORE
+                portBASE_TYPE coreID;
+                #ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
+                    const char * lastLockedFn = mux->lastLockedFn;
+                    int lastLockedLine = mux->lastLockedLine;
+                    mux->lastLockedFn = fnName;
+                    mux->lastLockedLine = line;
+                    uint32_t owner = mux->owner;
 
-#if CONFIG_FREERTOS_PORTMUX_DEBUG || !defined(NDEBUG)
-	RSR(PRID, coreID);
-#endif
+                    if( ( owner != portMUX_FREE_VAL ) && ( owner != CORE_ID_PRO ) && ( owner != CORE_ID_APP ) )
+                    {
+                        ets_printf( "ERROR: vPortCPUReleaseMutex: mux %p is invalid (0x%x)!\n", mux, mux->owner );
+                    }
+                #endif /* ifdef CONFIG_FREERTOS_PORTMUX_DEBUG */
 
-#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
-	if (coreID != mux->owner) {
-		ets_printf("ERROR: vPortCPUReleaseMutex: mux %p was already unlocked!\n", mux);
-		ets_printf("Last non-recursive unlock %s line %d, curr unlock %s line %d\n", lastLockedFn, lastLockedLine, fnName, line);
-	}
-#endif
+                #if CONFIG_FREERTOS_PORTMUX_DEBUG || !defined( NDEBUG )
+                    RSR( PRID, coreID );
+                #endif
 
-	assert(coreID == mux->owner); // This is a mutex we didn't lock, or it's corrupt
+                #ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
+                    if( coreID != mux->owner )
+                    {
+                        ets_printf( "ERROR: vPortCPUReleaseMutex: mux %p was already unlocked!\n", mux );
+                        ets_printf( "Last non-recursive unlock %s line %d, curr unlock %s line %d\n", lastLockedFn, lastLockedLine, fnName, line );
+                    }
+                #endif
 
-	mux->count--;
-	if(mux->count == 0) {
-		mux->owner = portMUX_FREE_VAL;
-	} else {
-		assert(mux->count < 0x100); // Indicates memory corruption
-#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG_RECURSIVE
-		ets_printf("Recursive unlock: count=%d last locked %s line %d, curr %s line %d\n", mux->count, lastLockedFn, lastLockedLine, fnName, line);
-#endif
-	}
-#endif //!CONFIG_FREERTOS_UNICORE
-}
+                assert( coreID == mux->owner ); /* This is a mutex we didn't lock, or it's corrupt */
+
+                mux->count--;
+
+                if( mux->count == 0 )
+                {
+                    mux->owner = portMUX_FREE_VAL;
+                }
+                else
+                {
+                    assert( mux->count < 0x100 ); /* Indicates memory corruption */
+                    #ifdef CONFIG_FREERTOS_PORTMUX_DEBUG_RECURSIVE
+                        ets_printf( "Recursive unlock: count=%d last locked %s line %d, curr %s line %d\n", mux->count, lastLockedFn, lastLockedLine, fnName, line );
+                    #endif
+                }
+            #endif //!CONFIG_FREERTOS_UNICORE
+        }
diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_init.c b/portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_init.c
index 6533bd469..6aaea0b09 100644
--- a/portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_init.c
+++ b/portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_init.c
@@ -1,36 +1,36 @@
 /*******************************************************************************
-// Copyright (c) 2003-2015 Cadence Design Systems, Inc.
-//
-// Permission is hereby granted, free of charge, to any person obtaining
-// a copy of this software and associated documentation files (the
-// "Software"), to deal in the Software without restriction, including
-// without limitation the rights to use, copy, modify, merge, publish,
-// distribute, sublicense, and/or sell copies of the Software, and to
-// permit persons to whom the Software is furnished to do so, subject to
-// the following conditions:
-//
-// The above copyright notice and this permission notice shall be included
-// in all copies or substantial portions of the Software.
-//
-// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
-// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
-// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
-// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
-// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
---------------------------------------------------------------------------------
-
-        XTENSA INITIALIZATION ROUTINES CODED IN C
-
-This file contains miscellaneous Xtensa RTOS-generic initialization functions
-that are implemented in C.
-
+*  // Copyright (c) 2003-2015 Cadence Design Systems, Inc.
+*  //
+*  // Permission is hereby granted, free of charge, to any person obtaining
+*  // a copy of this software and associated documentation files (the
+*  // "Software"), to deal in the Software without restriction, including
+*  // without limitation the rights to use, copy, modify, merge, publish,
+*  // distribute, sublicense, and/or sell copies of the Software, and to
+*  // permit persons to whom the Software is furnished to do so, subject to
+*  // the following conditions:
+*  //
+*  // The above copyright notice and this permission notice shall be included
+*  // in all copies or substantial portions of the Software.
+*  //
+*  // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+*  // EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+*  // MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+*  // IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+*  // CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+*  // TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+*  // SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*  --------------------------------------------------------------------------------
+*
+*       XTENSA INITIALIZATION ROUTINES CODED IN C
+*
+*  This file contains miscellaneous Xtensa RTOS-generic initialization functions
+*  that are implemented in C.
+*
 *******************************************************************************/
 
 
 #ifdef XT_BOARD
-#include    
+    #include    
 #endif
 
 #include    "xtensa_rtos.h"
@@ -38,18 +38,17 @@ that are implemented in C.
 
 #ifdef XT_RTOS_TIMER_INT
 
-unsigned _xt_tick_divisor = 0;  /* cached number of cycles per tick */
+    unsigned _xt_tick_divisor = 0; /* cached number of cycles per tick */
 
-void _xt_tick_divisor_init(void)
-{
-    _xt_tick_divisor = esp_clk_cpu_freq() / XT_TICK_PER_SEC;
-}
+    void _xt_tick_divisor_init( void )
+    {
+        _xt_tick_divisor = esp_clk_cpu_freq() / XT_TICK_PER_SEC;
+    }
 
 /* Deprecated, to be removed */
-int xt_clock_freq(void)
-{
-    return esp_clk_cpu_freq();
-}
+    int xt_clock_freq( void )
+    {
+        return esp_clk_cpu_freq();
+    }
 
 #endif /* XT_RTOS_TIMER_INT */
-
diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_intr.c b/portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_intr.c
index 071ba902d..6d05ae5f9 100644
--- a/portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_intr.c
+++ b/portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_intr.c
@@ -1,29 +1,29 @@
 /*******************************************************************************
-Copyright (c) 2006-2015 Cadence Design Systems Inc.
-
-Permission is hereby granted, free of charge, to any person obtaining
-a copy of this software and associated documentation files (the
-"Software"), to deal in the Software without restriction, including
-without limitation the rights to use, copy, modify, merge, publish,
-distribute, sublicense, and/or sell copies of the Software, and to
-permit persons to whom the Software is furnished to do so, subject to
-the following conditions:
-
-The above copyright notice and this permission notice shall be included
-in all copies or substantial portions of the Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
-IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
-CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
-TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
-SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-******************************************************************************/
+ * Copyright (c) 2006-2015 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ ******************************************************************************/
 
 /******************************************************************************
-  Xtensa-specific interrupt and exception functions for RTOS ports.
-  Also see xtensa_intr_asm.S.
+*  Xtensa-specific interrupt and exception functions for RTOS ports.
+*  Also see xtensa_intr_asm.S.
 ******************************************************************************/
 
 #include 
@@ -40,119 +40,135 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 /* Handler table is in xtensa_intr_asm.S */
 
-extern xt_exc_handler _xt_exception_table[XCHAL_EXCCAUSE_NUM*portNUM_PROCESSORS];
+    extern xt_exc_handler _xt_exception_table[ XCHAL_EXCCAUSE_NUM * portNUM_PROCESSORS ];
 
 
 /*
-  Default handler for unhandled exceptions.
-  CHANGED: We do this in panic.c now
-*/
+ * Default handler for unhandled exceptions.
+ * CHANGED: We do this in panic.c now
+ */
 
-//void xt_unhandled_exception(XtExcFrame *frame)
-//{
-    //exit(-1);
-//}
-extern void xt_unhandled_exception(XtExcFrame *frame);
+/*void xt_unhandled_exception(XtExcFrame *frame) */
+/*{ */
+    /*exit(-1); */
+/*} */
+    extern void xt_unhandled_exception( XtExcFrame * frame );
 
 
 /*
-  This function registers a handler for the specified exception.
-  The function returns the address of the previous handler.
-  On error, it returns 0.
-*/
-xt_exc_handler xt_set_exception_handler(int n, xt_exc_handler f)
-{
-    xt_exc_handler old;
+ * This function registers a handler for the specified exception.
+ * The function returns the address of the previous handler.
+ * On error, it returns 0.
+ */
+    xt_exc_handler xt_set_exception_handler( int n,
+                                             xt_exc_handler f )
+    {
+        xt_exc_handler old;
 
-    if( n < 0 || n >= XCHAL_EXCCAUSE_NUM )
-        return 0;       /* invalid exception number */
+        if( ( n < 0 ) || ( n >= XCHAL_EXCCAUSE_NUM ) )
+        {
+            return 0; /* invalid exception number */
+        }
 
-    /* Convert exception number to _xt_exception_table name */
-    n = n * portNUM_PROCESSORS + xPortGetCoreID();
-    old = _xt_exception_table[n];
+        /* Convert exception number to _xt_exception_table name */
+        n = n * portNUM_PROCESSORS + xPortGetCoreID();
+        old = _xt_exception_table[ n ];
 
-    if (f) {
-        _xt_exception_table[n] = f;
-    }
-    else {
-        _xt_exception_table[n] = &xt_unhandled_exception;
+        if( f )
+        {
+            _xt_exception_table[ n ] = f;
+        }
+        else
+        {
+            _xt_exception_table[ n ] = &xt_unhandled_exception;
+        }
+
+        return( ( old == &xt_unhandled_exception ) ? 0 : old );
     }
 
-    return ((old == &xt_unhandled_exception) ? 0 : old);
-}
-
-#endif
+#endif /* if XCHAL_HAVE_EXCEPTIONS */
 
 #if XCHAL_HAVE_INTERRUPTS
 
 /* Handler table is in xtensa_intr_asm.S */
 
-typedef struct xt_handler_table_entry {
-    void * handler;
-    void * arg;
-} xt_handler_table_entry;
+    typedef struct xt_handler_table_entry
+    {
+        void * handler;
+        void * arg;
+    } xt_handler_table_entry;
 
-extern xt_handler_table_entry _xt_interrupt_table[XCHAL_NUM_INTERRUPTS*portNUM_PROCESSORS];
+    extern xt_handler_table_entry _xt_interrupt_table[ XCHAL_NUM_INTERRUPTS * portNUM_PROCESSORS ];
 
 
 /*
-  Default handler for unhandled interrupts.
-*/
-void xt_unhandled_interrupt(void * arg)
-{
-	ets_printf("Unhandled interrupt %d on cpu %d!\n", (int)arg, xPortGetCoreID());
-}
+ * Default handler for unhandled interrupts.
+ */
+    void xt_unhandled_interrupt( void * arg )
+    {
+        ets_printf( "Unhandled interrupt %d on cpu %d!\n", ( int ) arg, xPortGetCoreID() );
+    }
 
 
 /*
-  This function registers a handler for the specified interrupt. The "arg"
-  parameter specifies the argument to be passed to the handler when it is
-  invoked. The function returns the address of the previous handler.
-  On error, it returns 0.
-*/
-xt_handler xt_set_interrupt_handler(int n, xt_handler f, void * arg)
-{
-    xt_handler_table_entry * entry;
-    xt_handler               old;
+ * This function registers a handler for the specified interrupt. The "arg"
+ * parameter specifies the argument to be passed to the handler when it is
+ * invoked. The function returns the address of the previous handler.
+ * On error, it returns 0.
+ */
+    xt_handler xt_set_interrupt_handler( int n,
+                                         xt_handler f,
+                                         void * arg )
+    {
+        xt_handler_table_entry * entry;
+        xt_handler old;
 
-    if( n < 0 || n >= XCHAL_NUM_INTERRUPTS )
-        return 0;       /* invalid interrupt number */
-    if( Xthal_intlevel[n] > XCHAL_EXCM_LEVEL )
-        return 0;       /* priority level too high to safely handle in C */
+        if( ( n < 0 ) || ( n >= XCHAL_NUM_INTERRUPTS ) )
+        {
+            return 0; /* invalid interrupt number */
+        }
 
-    /* Convert exception number to _xt_exception_table name */
-    n = n * portNUM_PROCESSORS + xPortGetCoreID();
+        if( Xthal_intlevel[ n ] > XCHAL_EXCM_LEVEL )
+        {
+            return 0; /* priority level too high to safely handle in C */
+        }
 
-    entry = _xt_interrupt_table + n;
-    old   = entry->handler;
+        /* Convert exception number to _xt_exception_table name */
+        n = n * portNUM_PROCESSORS + xPortGetCoreID();
 
-    if (f) {
-        entry->handler = f;
-        entry->arg     = arg;
-    }
-    else {
-        entry->handler = &xt_unhandled_interrupt;
-        entry->arg     = (void*)n;
+        entry = _xt_interrupt_table + n;
+        old = entry->handler;
+
+        if( f )
+        {
+            entry->handler = f;
+            entry->arg = arg;
+        }
+        else
+        {
+            entry->handler = &xt_unhandled_interrupt;
+            entry->arg = ( void * ) n;
+        }
+
+        return( ( old == &xt_unhandled_interrupt ) ? 0 : old );
     }
 
-    return ((old == &xt_unhandled_interrupt) ? 0 : old);
-}
+    #if CONFIG_SYSVIEW_ENABLE
+        void * xt_get_interrupt_handler_arg( int n )
+        {
+            xt_handler_table_entry * entry;
 
-#if CONFIG_SYSVIEW_ENABLE
-void * xt_get_interrupt_handler_arg(int n)
-{
-    xt_handler_table_entry * entry;
+            if( ( n < 0 ) || ( n >= XCHAL_NUM_INTERRUPTS ) )
+            {
+                return 0; /* invalid interrupt number */
+            }
 
-    if( n < 0 || n >= XCHAL_NUM_INTERRUPTS )
-        return 0;       /* invalid interrupt number */
+            /* Convert exception number to _xt_exception_table name */
+            n = n * portNUM_PROCESSORS + xPortGetCoreID();
 
-    /* Convert exception number to _xt_exception_table name */
-    n = n * portNUM_PROCESSORS + xPortGetCoreID();
-
-    entry = _xt_interrupt_table + n;
-    return entry->arg;
-}
-#endif
+            entry = _xt_interrupt_table + n;
+            return entry->arg;
+        }
+    #endif /* if CONFIG_SYSVIEW_ENABLE */
 
 #endif /* XCHAL_HAVE_INTERRUPTS */
-
diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_overlay_os_hook.c b/portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_overlay_os_hook.c
index 80e2428a6..ef893a7f0 100644
--- a/portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_overlay_os_hook.c
+++ b/portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_overlay_os_hook.c
@@ -1,25 +1,25 @@
-// xtensa_overlay_os_hook.c -- Overlay manager OS hooks for FreeRTOS.
+/* xtensa_overlay_os_hook.c -- Overlay manager OS hooks for FreeRTOS. */
 
-// Copyright (c) 2015-2015 Cadence Design Systems Inc.
-//
-// Permission is hereby granted, free of charge, to any person obtaining
-// a copy of this software and associated documentation files (the
-// "Software"), to deal in the Software without restriction, including
-// without limitation the rights to use, copy, modify, merge, publish,
-// distribute, sublicense, and/or sell copies of the Software, and to
-// permit persons to whom the Software is furnished to do so, subject to
-// the following conditions:
-//
-// The above copyright notice and this permission notice shall be included
-// in all copies or substantial portions of the Software.
-//
-// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
-// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
-// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
-// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
-// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+/* Copyright (c) 2015-2015 Cadence Design Systems Inc. */
+/* */
+/* Permission is hereby granted, free of charge, to any person obtaining */
+/* a copy of this software and associated documentation files (the */
+/* "Software"), to deal in the Software without restriction, including */
+/* without limitation the rights to use, copy, modify, merge, publish, */
+/* distribute, sublicense, and/or sell copies of the Software, and to */
+/* permit persons to whom the Software is furnished to do so, subject to */
+/* the following conditions: */
+/* */
+/* The above copyright notice and this permission notice shall be included */
+/* in all copies or substantial portions of the Software. */
+/* */
+/* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, */
+/* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF */
+/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. */
+/* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY */
+/* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, */
+/* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE */
+/* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
 
 
 #include "FreeRTOS.h"
@@ -30,7 +30,7 @@
 /* Mutex object that controls access to the overlay. Currently only one
  * overlay region is supported so one mutex suffices.
  */
-static SemaphoreHandle_t xt_overlay_mutex;
+    static SemaphoreHandle_t xt_overlay_mutex;
 
 
 /* This function should be overridden to provide OS specific init such
@@ -38,30 +38,30 @@ static SemaphoreHandle_t xt_overlay_mutex;
  * Typically this mutex would be set up with priority inheritance. See
  * overlay manager documentation for more details.
  */
-void xt_overlay_init_os(void)
-{
-    /* Create the mutex for overlay access. Priority inheritance is
-     * required.
-     */
-    xt_overlay_mutex = xSemaphoreCreateMutex();
-}
+    void xt_overlay_init_os( void )
+    {
+        /* Create the mutex for overlay access. Priority inheritance is
+         * required.
+         */
+        xt_overlay_mutex = xSemaphoreCreateMutex();
+    }
 
 
 /* This function locks access to shared overlay resources, typically
  * by acquiring a mutex.
  */
-void xt_overlay_lock(void)
-{
-    xSemaphoreTake(xt_overlay_mutex, 0);
-}
+    void xt_overlay_lock( void )
+    {
+        xSemaphoreTake( xt_overlay_mutex, 0 );
+    }
 
 
 /* This function releases access to shared overlay resources, typically
  * by unlocking a mutex.
  */
-void xt_overlay_unlock(void)
-{
-    xSemaphoreGive(xt_overlay_mutex);
-}
+    void xt_overlay_unlock( void )
+    {
+        xSemaphoreGive( xt_overlay_mutex );
+    }
 
-#endif
+#endif /* if configUSE_MUTEX */
diff --git a/portable/ThirdParty/XCC/Xtensa/port.c b/portable/ThirdParty/XCC/Xtensa/port.c
index c16dfedfd..8c304ca96 100644
--- a/portable/ThirdParty/XCC/Xtensa/port.c
+++ b/portable/ThirdParty/XCC/Xtensa/port.c
@@ -1,6 +1,6 @@
 
 /*
- * FreeRTOS Kernel V10.0.0
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -21,8 +21,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/ThirdParty/XCC/Xtensa/portmacro.h b/portable/ThirdParty/XCC/Xtensa/portmacro.h
index edf48aa72..93f86ef58 100644
--- a/portable/ThirdParty/XCC/Xtensa/portmacro.h
+++ b/portable/ThirdParty/XCC/Xtensa/portmacro.h
@@ -1,6 +1,6 @@
 
 /*
- * FreeRTOS Kernel V10.0.0
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -21,8 +21,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/WizC/PIC18/Drivers/Tick/Tick.c b/portable/WizC/PIC18/Drivers/Tick/Tick.c
index 28902c758..5373f725f 100644
--- a/portable/WizC/PIC18/Drivers/Tick/Tick.c
+++ b/portable/WizC/PIC18/Drivers/Tick/Tick.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/WizC/PIC18/Drivers/Tick/isrTick.c b/portable/WizC/PIC18/Drivers/Tick/isrTick.c
index e5eee6ddb..65a07134c 100644
--- a/portable/WizC/PIC18/Drivers/Tick/isrTick.c
+++ b/portable/WizC/PIC18/Drivers/Tick/isrTick.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/WizC/PIC18/addFreeRTOS.h b/portable/WizC/PIC18/addFreeRTOS.h
index 8b2e7a5f0..deabc744f 100644
--- a/portable/WizC/PIC18/addFreeRTOS.h
+++ b/portable/WizC/PIC18/addFreeRTOS.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/WizC/PIC18/port.c b/portable/WizC/PIC18/port.c
index a52fe73ab..6cba911eb 100644
--- a/portable/WizC/PIC18/port.c
+++ b/portable/WizC/PIC18/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/WizC/PIC18/portmacro.h b/portable/WizC/PIC18/portmacro.h
index 871fcd261..2a76bb93c 100644
--- a/portable/WizC/PIC18/portmacro.h
+++ b/portable/WizC/PIC18/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/oWatcom/16BitDOS/Flsh186/port.c b/portable/oWatcom/16BitDOS/Flsh186/port.c
index e419958a8..4cc17f456 100644
--- a/portable/oWatcom/16BitDOS/Flsh186/port.c
+++ b/portable/oWatcom/16BitDOS/Flsh186/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/oWatcom/16BitDOS/Flsh186/portmacro.h b/portable/oWatcom/16BitDOS/Flsh186/portmacro.h
index 75dbff0bf..c1d845f15 100644
--- a/portable/oWatcom/16BitDOS/Flsh186/portmacro.h
+++ b/portable/oWatcom/16BitDOS/Flsh186/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/oWatcom/16BitDOS/PC/port.c b/portable/oWatcom/16BitDOS/PC/port.c
index c20ad7c64..649470e9c 100644
--- a/portable/oWatcom/16BitDOS/PC/port.c
+++ b/portable/oWatcom/16BitDOS/PC/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/oWatcom/16BitDOS/PC/portmacro.h b/portable/oWatcom/16BitDOS/PC/portmacro.h
index d65ed36b0..888afe8ec 100644
--- a/portable/oWatcom/16BitDOS/PC/portmacro.h
+++ b/portable/oWatcom/16BitDOS/PC/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/oWatcom/16BitDOS/common/portasm.h b/portable/oWatcom/16BitDOS/common/portasm.h
index 5a3f25050..ed29e90ab 100644
--- a/portable/oWatcom/16BitDOS/common/portasm.h
+++ b/portable/oWatcom/16BitDOS/common/portasm.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/oWatcom/16BitDOS/common/portcomn.c b/portable/oWatcom/16BitDOS/common/portcomn.c
index 5abca63e0..0ed946e86 100644
--- a/portable/oWatcom/16BitDOS/common/portcomn.c
+++ b/portable/oWatcom/16BitDOS/common/portcomn.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,8 +19,8 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
  * 1 tab == 4 spaces!
  */
diff --git a/portable/readme.txt b/portable/readme.txt
index b22b36bf1..af93a4b6a 100644
--- a/portable/readme.txt
+++ b/portable/readme.txt
@@ -4,7 +4,7 @@ specific to a particular microcontroller and/or compiler.
 
 
 + The FreeRTOS/Source/Portable/MemMang directory contains the five sample
-memory allocators as described on the http://www.FreeRTOS.org WEB site.
+memory allocators as described on the https://www.FreeRTOS.org WEB site.
 
 + The other directories each contain files specific to a particular
 microcontroller or compiler, where the directory name denotes the compiler
diff --git a/queue.c b/queue.c
index 14ad01ec9..5c9002dc9 100644
--- a/queue.c
+++ b/queue.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,18 +19,17 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #include 
 #include 
 
 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
-all the API functions to use the MPU wrappers.  That should only be done when
-task.h is included from an application file. */
+ * all the API functions to use the MPU wrappers.  That should only be done when
+ * task.h is included from an application file. */
 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
 #include "FreeRTOS.h"
@@ -38,100 +37,101 @@ task.h is included from an application file. */
 #include "queue.h"
 
 #if ( configUSE_CO_ROUTINES == 1 )
-	#include "croutine.h"
+    #include "croutine.h"
 #endif
 
 /* Lint e9021, e961 and e750 are suppressed as a MISRA exception justified
-because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined
-for the header files above, but not in this file, in order to generate the
-correct privileged Vs unprivileged linkage and placement. */
+ * because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined
+ * for the header files above, but not in this file, in order to generate the
+ * correct privileged Vs unprivileged linkage and placement. */
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750 !e9021. */
 
 
 /* Constants used with the cRxLock and cTxLock structure members. */
-#define queueUNLOCKED					( ( int8_t ) -1 )
-#define queueLOCKED_UNMODIFIED			( ( int8_t ) 0 )
+#define queueUNLOCKED             ( ( int8_t ) -1 )
+#define queueLOCKED_UNMODIFIED    ( ( int8_t ) 0 )
+#define queueINT8_MAX             ( ( int8_t ) 127 )
 
 /* When the Queue_t structure is used to represent a base queue its pcHead and
-pcTail members are used as pointers into the queue storage area.  When the
-Queue_t structure is used to represent a mutex pcHead and pcTail pointers are
-not necessary, and the pcHead pointer is set to NULL to indicate that the
-structure instead holds a pointer to the mutex holder (if any).  Map alternative
-names to the pcHead and structure member to ensure the readability of the code
-is maintained.  The QueuePointers_t and SemaphoreData_t types are used to form
-a union as their usage is mutually exclusive dependent on what the queue is
-being used for. */
-#define uxQueueType						pcHead
-#define queueQUEUE_IS_MUTEX				NULL
+ * pcTail members are used as pointers into the queue storage area.  When the
+ * Queue_t structure is used to represent a mutex pcHead and pcTail pointers are
+ * not necessary, and the pcHead pointer is set to NULL to indicate that the
+ * structure instead holds a pointer to the mutex holder (if any).  Map alternative
+ * names to the pcHead and structure member to ensure the readability of the code
+ * is maintained.  The QueuePointers_t and SemaphoreData_t types are used to form
+ * a union as their usage is mutually exclusive dependent on what the queue is
+ * being used for. */
+#define uxQueueType               pcHead
+#define queueQUEUE_IS_MUTEX       NULL
 
 typedef struct QueuePointers
 {
-	int8_t *pcTail;					/*< Points to the byte at the end of the queue storage area.  Once more byte is allocated than necessary to store the queue items, this is used as a marker. */
-	int8_t *pcReadFrom;				/*< Points to the last place that a queued item was read from when the structure is used as a queue. */
+    int8_t * pcTail;     /*< Points to the byte at the end of the queue storage area.  Once more byte is allocated than necessary to store the queue items, this is used as a marker. */
+    int8_t * pcReadFrom; /*< Points to the last place that a queued item was read from when the structure is used as a queue. */
 } QueuePointers_t;
 
 typedef struct SemaphoreData
 {
-	TaskHandle_t xMutexHolder;		 /*< The handle of the task that holds the mutex. */
-	UBaseType_t uxRecursiveCallCount;/*< Maintains a count of the number of times a recursive mutex has been recursively 'taken' when the structure is used as a mutex. */
+    TaskHandle_t xMutexHolder;        /*< The handle of the task that holds the mutex. */
+    UBaseType_t uxRecursiveCallCount; /*< Maintains a count of the number of times a recursive mutex has been recursively 'taken' when the structure is used as a mutex. */
 } SemaphoreData_t;
 
 /* Semaphores do not actually store or copy data, so have an item size of
-zero. */
-#define queueSEMAPHORE_QUEUE_ITEM_LENGTH ( ( UBaseType_t ) 0 )
-#define queueMUTEX_GIVE_BLOCK_TIME		 ( ( TickType_t ) 0U )
+ * zero. */
+#define queueSEMAPHORE_QUEUE_ITEM_LENGTH    ( ( UBaseType_t ) 0 )
+#define queueMUTEX_GIVE_BLOCK_TIME          ( ( TickType_t ) 0U )
 
-#if( configUSE_PREEMPTION == 0 )
-	/* If the cooperative scheduler is being used then a yield should not be
-	performed just because a higher priority task has been woken. */
-	#define queueYIELD_IF_USING_PREEMPTION()
+#if ( configUSE_PREEMPTION == 0 )
+
+/* If the cooperative scheduler is being used then a yield should not be
+ * performed just because a higher priority task has been woken. */
+    #define queueYIELD_IF_USING_PREEMPTION()
 #else
-	#define queueYIELD_IF_USING_PREEMPTION() portYIELD_WITHIN_API()
+    #define queueYIELD_IF_USING_PREEMPTION()    portYIELD_WITHIN_API()
 #endif
 
 /*
  * Definition of the queue used by the scheduler.
  * Items are queued by copy, not reference.  See the following link for the
- * rationale: https://www.freertos.org/Embedded-RTOS-Queues.html
+ * rationale: https://www.FreeRTOS.org/Embedded-RTOS-Queues.html
  */
-typedef struct QueueDefinition 		/* The old naming convention is used to prevent breaking kernel aware debuggers. */
+typedef struct QueueDefinition /* The old naming convention is used to prevent breaking kernel aware debuggers. */
 {
-	int8_t *pcHead;					/*< Points to the beginning of the queue storage area. */
-	int8_t *pcWriteTo;				/*< Points to the free next place in the storage area. */
+    int8_t * pcHead;           /*< Points to the beginning of the queue storage area. */
+    int8_t * pcWriteTo;        /*< Points to the free next place in the storage area. */
 
-	union
-	{
-		QueuePointers_t xQueue;		/*< Data required exclusively when this structure is used as a queue. */
-		SemaphoreData_t xSemaphore; /*< Data required exclusively when this structure is used as a semaphore. */
-	} u;
+    union
+    {
+        QueuePointers_t xQueue;     /*< Data required exclusively when this structure is used as a queue. */
+        SemaphoreData_t xSemaphore; /*< Data required exclusively when this structure is used as a semaphore. */
+    } u;
 
-	List_t xTasksWaitingToSend;		/*< List of tasks that are blocked waiting to post onto this queue.  Stored in priority order. */
-	List_t xTasksWaitingToReceive;	/*< List of tasks that are blocked waiting to read from this queue.  Stored in priority order. */
+    List_t xTasksWaitingToSend;             /*< List of tasks that are blocked waiting to post onto this queue.  Stored in priority order. */
+    List_t xTasksWaitingToReceive;          /*< List of tasks that are blocked waiting to read from this queue.  Stored in priority order. */
 
-	volatile UBaseType_t uxMessagesWaiting;/*< The number of items currently in the queue. */
-	UBaseType_t uxLength;			/*< The length of the queue defined as the number of items it will hold, not the number of bytes. */
-	UBaseType_t uxItemSize;			/*< The size of each items that the queue will hold. */
+    volatile UBaseType_t uxMessagesWaiting; /*< The number of items currently in the queue. */
+    UBaseType_t uxLength;                   /*< The length of the queue defined as the number of items it will hold, not the number of bytes. */
+    UBaseType_t uxItemSize;                 /*< The size of each items that the queue will hold. */
 
-	volatile int8_t cRxLock;		/*< Stores the number of items received from the queue (removed from the queue) while the queue was locked.  Set to queueUNLOCKED when the queue is not locked. */
-	volatile int8_t cTxLock;		/*< Stores the number of items transmitted to the queue (added to the queue) while the queue was locked.  Set to queueUNLOCKED when the queue is not locked. */
+    volatile int8_t cRxLock;                /*< Stores the number of items received from the queue (removed from the queue) while the queue was locked.  Set to queueUNLOCKED when the queue is not locked. */
+    volatile int8_t cTxLock;                /*< Stores the number of items transmitted to the queue (added to the queue) while the queue was locked.  Set to queueUNLOCKED when the queue is not locked. */
 
-	#if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
-		uint8_t ucStaticallyAllocated;	/*< Set to pdTRUE if the memory used by the queue was statically allocated to ensure no attempt is made to free the memory. */
-	#endif
+    #if ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
+        uint8_t ucStaticallyAllocated; /*< Set to pdTRUE if the memory used by the queue was statically allocated to ensure no attempt is made to free the memory. */
+    #endif
 
-	#if ( configUSE_QUEUE_SETS == 1 )
-		struct QueueDefinition *pxQueueSetContainer;
-	#endif
-
-	#if ( configUSE_TRACE_FACILITY == 1 )
-		UBaseType_t uxQueueNumber;
-		uint8_t ucQueueType;
-	#endif
+    #if ( configUSE_QUEUE_SETS == 1 )
+        struct QueueDefinition * pxQueueSetContainer;
+    #endif
 
+    #if ( configUSE_TRACE_FACILITY == 1 )
+        UBaseType_t uxQueueNumber;
+        uint8_t ucQueueType;
+    #endif
 } xQUEUE;
 
 /* The old xQUEUE name is maintained above then typedefed to the new Queue_t
-name below to enable the use of older kernel aware debuggers. */
+ * name below to enable the use of older kernel aware debuggers. */
 typedef xQUEUE Queue_t;
 
 /*-----------------------------------------------------------*/
@@ -142,24 +142,24 @@ typedef xQUEUE Queue_t;
  */
 #if ( configQUEUE_REGISTRY_SIZE > 0 )
 
-	/* The type stored within the queue registry array.  This allows a name
-	to be assigned to each queue making kernel aware debugging a little
-	more user friendly. */
-	typedef struct QUEUE_REGISTRY_ITEM
-	{
-		const char *pcQueueName; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-		QueueHandle_t xHandle;
-	} xQueueRegistryItem;
+/* The type stored within the queue registry array.  This allows a name
+ * to be assigned to each queue making kernel aware debugging a little
+ * more user friendly. */
+    typedef struct QUEUE_REGISTRY_ITEM
+    {
+        const char * pcQueueName; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+        QueueHandle_t xHandle;
+    } xQueueRegistryItem;
 
-	/* The old xQueueRegistryItem name is maintained above then typedefed to the
-	new xQueueRegistryItem name below to enable the use of older kernel aware
-	debuggers. */
-	typedef xQueueRegistryItem QueueRegistryItem_t;
+/* The old xQueueRegistryItem name is maintained above then typedefed to the
+ * new xQueueRegistryItem name below to enable the use of older kernel aware
+ * debuggers. */
+    typedef xQueueRegistryItem QueueRegistryItem_t;
 
-	/* The queue registry is simply an array of QueueRegistryItem_t structures.
-	The pcQueueName member of a structure being NULL is indicative of the
-	array position being vacant. */
-	PRIVILEGED_DATA QueueRegistryItem_t xQueueRegistry[ configQUEUE_REGISTRY_SIZE ];
+/* The queue registry is simply an array of QueueRegistryItem_t structures.
+ * The pcQueueName member of a structure being NULL is indicative of the
+ * array position being vacant. */
+    PRIVILEGED_DATA QueueRegistryItem_t xQueueRegistry[ configQUEUE_REGISTRY_SIZE ];
 
 #endif /* configQUEUE_REGISTRY_SIZE */
 
@@ -178,58 +178,67 @@ static void prvUnlockQueue( Queue_t * const pxQueue ) PRIVILEGED_FUNCTION;
  *
  * @return pdTRUE if the queue contains no items, otherwise pdFALSE.
  */
-static BaseType_t prvIsQueueEmpty( const Queue_t *pxQueue ) PRIVILEGED_FUNCTION;
+static BaseType_t prvIsQueueEmpty( const Queue_t * pxQueue ) PRIVILEGED_FUNCTION;
 
 /*
  * Uses a critical section to determine if there is any space in a queue.
  *
  * @return pdTRUE if there is no space, otherwise pdFALSE;
  */
-static BaseType_t prvIsQueueFull( const Queue_t *pxQueue ) PRIVILEGED_FUNCTION;
+static BaseType_t prvIsQueueFull( const Queue_t * pxQueue ) PRIVILEGED_FUNCTION;
 
 /*
  * Copies an item into the queue, either at the front of the queue or the
  * back of the queue.
  */
-static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition ) PRIVILEGED_FUNCTION;
+static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue,
+                                      const void * pvItemToQueue,
+                                      const BaseType_t xPosition ) PRIVILEGED_FUNCTION;
 
 /*
  * Copies an item out of a queue.
  */
-static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer ) PRIVILEGED_FUNCTION;
+static void prvCopyDataFromQueue( Queue_t * const pxQueue,
+                                  void * const pvBuffer ) PRIVILEGED_FUNCTION;
 
 #if ( configUSE_QUEUE_SETS == 1 )
-	/*
-	 * Checks to see if a queue is a member of a queue set, and if so, notifies
-	 * the queue set that the queue contains data.
-	 */
-	static BaseType_t prvNotifyQueueSetContainer( const Queue_t * const pxQueue ) PRIVILEGED_FUNCTION;
+
+/*
+ * Checks to see if a queue is a member of a queue set, and if so, notifies
+ * the queue set that the queue contains data.
+ */
+    static BaseType_t prvNotifyQueueSetContainer( const Queue_t * const pxQueue ) PRIVILEGED_FUNCTION;
 #endif
 
 /*
  * Called after a Queue_t structure has been allocated either statically or
  * dynamically to fill in the structure's members.
  */
-static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, const uint8_t ucQueueType, Queue_t *pxNewQueue ) PRIVILEGED_FUNCTION;
+static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength,
+                                   const UBaseType_t uxItemSize,
+                                   uint8_t * pucQueueStorage,
+                                   const uint8_t ucQueueType,
+                                   Queue_t * pxNewQueue ) PRIVILEGED_FUNCTION;
 
 /*
  * Mutexes are a special type of queue.  When a mutex is created, first the
  * queue is created, then prvInitialiseMutex() is called to configure the queue
  * as a mutex.
  */
-#if( configUSE_MUTEXES == 1 )
-	static void prvInitialiseMutex( Queue_t *pxNewQueue ) PRIVILEGED_FUNCTION;
+#if ( configUSE_MUTEXES == 1 )
+    static void prvInitialiseMutex( Queue_t * pxNewQueue ) PRIVILEGED_FUNCTION;
 #endif
 
-#if( configUSE_MUTEXES == 1 )
-	/*
-	 * If a task waiting for a mutex causes the mutex holder to inherit a
-	 * priority, but the waiting task times out, then the holder should
-	 * disinherit the priority - but only down to the highest priority of any
-	 * other tasks that are waiting for the same mutex.  This function returns
-	 * that priority.
-	 */
-	static UBaseType_t prvGetDisinheritPriorityAfterTimeout( const Queue_t * const pxQueue ) PRIVILEGED_FUNCTION;
+#if ( configUSE_MUTEXES == 1 )
+
+/*
+ * If a task waiting for a mutex causes the mutex holder to inherit a
+ * priority, but the waiting task times out, then the holder should
+ * disinherit the priority - but only down to the highest priority of any
+ * other tasks that are waiting for the same mutex.  This function returns
+ * that priority.
+ */
+    static UBaseType_t prvGetDisinheritPriorityAfterTimeout( const Queue_t * const pxQueue ) PRIVILEGED_FUNCTION;
 #endif
 /*-----------------------------------------------------------*/
 
@@ -237,2709 +246,2768 @@ static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, const UBaseT
  * Macro to mark a queue as locked.  Locking a queue prevents an ISR from
  * accessing the queue event lists.
  */
-#define prvLockQueue( pxQueue )								\
-	taskENTER_CRITICAL();									\
-	{														\
-		if( ( pxQueue )->cRxLock == queueUNLOCKED )			\
-		{													\
-			( pxQueue )->cRxLock = queueLOCKED_UNMODIFIED;	\
-		}													\
-		if( ( pxQueue )->cTxLock == queueUNLOCKED )			\
-		{													\
-			( pxQueue )->cTxLock = queueLOCKED_UNMODIFIED;	\
-		}													\
-	}														\
-	taskEXIT_CRITICAL()
+#define prvLockQueue( pxQueue )                            \
+    taskENTER_CRITICAL();                                  \
+    {                                                      \
+        if( ( pxQueue )->cRxLock == queueUNLOCKED )        \
+        {                                                  \
+            ( pxQueue )->cRxLock = queueLOCKED_UNMODIFIED; \
+        }                                                  \
+        if( ( pxQueue )->cTxLock == queueUNLOCKED )        \
+        {                                                  \
+            ( pxQueue )->cTxLock = queueLOCKED_UNMODIFIED; \
+        }                                                  \
+    }                                                      \
+    taskEXIT_CRITICAL()
 /*-----------------------------------------------------------*/
 
-BaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue )
+BaseType_t xQueueGenericReset( QueueHandle_t xQueue,
+                               BaseType_t xNewQueue )
 {
-Queue_t * const pxQueue = xQueue;
+    Queue_t * const pxQueue = xQueue;
 
-	configASSERT( pxQueue );
+    configASSERT( pxQueue );
 
-	taskENTER_CRITICAL();
-	{
-		pxQueue->u.xQueue.pcTail = pxQueue->pcHead + ( pxQueue->uxLength * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
-		pxQueue->uxMessagesWaiting = ( UBaseType_t ) 0U;
-		pxQueue->pcWriteTo = pxQueue->pcHead;
-		pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead + ( ( pxQueue->uxLength - 1U ) * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
-		pxQueue->cRxLock = queueUNLOCKED;
-		pxQueue->cTxLock = queueUNLOCKED;
+    taskENTER_CRITICAL();
+    {
+        pxQueue->u.xQueue.pcTail = pxQueue->pcHead + ( pxQueue->uxLength * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
+        pxQueue->uxMessagesWaiting = ( UBaseType_t ) 0U;
+        pxQueue->pcWriteTo = pxQueue->pcHead;
+        pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead + ( ( pxQueue->uxLength - 1U ) * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
+        pxQueue->cRxLock = queueUNLOCKED;
+        pxQueue->cTxLock = queueUNLOCKED;
 
-		if( xNewQueue == pdFALSE )
-		{
-			/* If there are tasks blocked waiting to read from the queue, then
-			the tasks will remain blocked as after this function exits the queue
-			will still be empty.  If there are tasks blocked waiting to write to
-			the queue, then one should be unblocked as after this function exits
-			it will be possible to write to it. */
-			if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
-			{
-				if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
-				{
-					queueYIELD_IF_USING_PREEMPTION();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			/* Ensure the event queues start in the correct state. */
-			vListInitialise( &( pxQueue->xTasksWaitingToSend ) );
-			vListInitialise( &( pxQueue->xTasksWaitingToReceive ) );
-		}
-	}
-	taskEXIT_CRITICAL();
+        if( xNewQueue == pdFALSE )
+        {
+            /* If there are tasks blocked waiting to read from the queue, then
+             * the tasks will remain blocked as after this function exits the queue
+             * will still be empty.  If there are tasks blocked waiting to write to
+             * the queue, then one should be unblocked as after this function exits
+             * it will be possible to write to it. */
+            if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
+            {
+                if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
+                {
+                    queueYIELD_IF_USING_PREEMPTION();
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            /* Ensure the event queues start in the correct state. */
+            vListInitialise( &( pxQueue->xTasksWaitingToSend ) );
+            vListInitialise( &( pxQueue->xTasksWaitingToReceive ) );
+        }
+    }
+    taskEXIT_CRITICAL();
 
-	/* A value is returned for calling semantic consistency with previous
-	versions. */
-	return pdPASS;
+    /* A value is returned for calling semantic consistency with previous
+     * versions. */
+    return pdPASS;
 }
 /*-----------------------------------------------------------*/
 
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
-	QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType )
-	{
-	Queue_t *pxNewQueue;
+    QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength,
+                                             const UBaseType_t uxItemSize,
+                                             uint8_t * pucQueueStorage,
+                                             StaticQueue_t * pxStaticQueue,
+                                             const uint8_t ucQueueType )
+    {
+        Queue_t * pxNewQueue;
 
-		configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
+        configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
 
-		/* The StaticQueue_t structure and the queue storage area must be
-		supplied. */
-		configASSERT( pxStaticQueue != NULL );
+        /* The StaticQueue_t structure and the queue storage area must be
+         * supplied. */
+        configASSERT( pxStaticQueue != NULL );
 
-		/* A queue storage area should be provided if the item size is not 0, and
-		should not be provided if the item size is 0. */
-		configASSERT( !( ( pucQueueStorage != NULL ) && ( uxItemSize == 0 ) ) );
-		configASSERT( !( ( pucQueueStorage == NULL ) && ( uxItemSize != 0 ) ) );
+        /* A queue storage area should be provided if the item size is not 0, and
+         * should not be provided if the item size is 0. */
+        configASSERT( !( ( pucQueueStorage != NULL ) && ( uxItemSize == 0 ) ) );
+        configASSERT( !( ( pucQueueStorage == NULL ) && ( uxItemSize != 0 ) ) );
 
-		#if( configASSERT_DEFINED == 1 )
-		{
-			/* Sanity check that the size of the structure used to declare a
-			variable of type StaticQueue_t or StaticSemaphore_t equals the size of
-			the real queue and semaphore structures. */
-			volatile size_t xSize = sizeof( StaticQueue_t );
-			configASSERT( xSize == sizeof( Queue_t ) );
-			( void ) xSize; /* Keeps lint quiet when configASSERT() is not defined. */
-		}
-		#endif /* configASSERT_DEFINED */
+        #if ( configASSERT_DEFINED == 1 )
+            {
+                /* Sanity check that the size of the structure used to declare a
+                 * variable of type StaticQueue_t or StaticSemaphore_t equals the size of
+                 * the real queue and semaphore structures. */
+                volatile size_t xSize = sizeof( StaticQueue_t );
+                configASSERT( xSize == sizeof( Queue_t ) );
+                ( void ) xSize; /* Keeps lint quiet when configASSERT() is not defined. */
+            }
+        #endif /* configASSERT_DEFINED */
 
-		/* The address of a statically allocated queue was passed in, use it.
-		The address of a statically allocated storage area was also passed in
-		but is already set. */
-		pxNewQueue = ( Queue_t * ) pxStaticQueue; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
+        /* The address of a statically allocated queue was passed in, use it.
+         * The address of a statically allocated storage area was also passed in
+         * but is already set. */
+        pxNewQueue = ( Queue_t * ) pxStaticQueue; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
 
-		if( pxNewQueue != NULL )
-		{
-			#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-			{
-				/* Queues can be allocated wither statically or dynamically, so
-				note this queue was allocated statically in case the queue is
-				later deleted. */
-				pxNewQueue->ucStaticallyAllocated = pdTRUE;
-			}
-			#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
+        if( pxNewQueue != NULL )
+        {
+            #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+                {
+                    /* Queues can be allocated wither statically or dynamically, so
+                     * note this queue was allocated statically in case the queue is
+                     * later deleted. */
+                    pxNewQueue->ucStaticallyAllocated = pdTRUE;
+                }
+            #endif /* configSUPPORT_DYNAMIC_ALLOCATION */
 
-			prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
-		}
-		else
-		{
-			traceQUEUE_CREATE_FAILED( ucQueueType );
-			mtCOVERAGE_TEST_MARKER();
-		}
+            prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
+        }
+        else
+        {
+            traceQUEUE_CREATE_FAILED( ucQueueType );
+            mtCOVERAGE_TEST_MARKER();
+        }
 
-		return pxNewQueue;
-	}
+        return pxNewQueue;
+    }
 
 #endif /* configSUPPORT_STATIC_ALLOCATION */
 /*-----------------------------------------------------------*/
 
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
 
-	QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType )
-	{
-	Queue_t *pxNewQueue;
-	size_t xQueueSizeInBytes;
-	uint8_t *pucQueueStorage;
+    QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength,
+                                       const UBaseType_t uxItemSize,
+                                       const uint8_t ucQueueType )
+    {
+        Queue_t * pxNewQueue;
+        size_t xQueueSizeInBytes;
+        uint8_t * pucQueueStorage;
 
-		configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
+        configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
 
-		/* Allocate enough space to hold the maximum number of items that
-		can be in the queue at any time.  It is valid for uxItemSize to be
-		zero in the case the queue is used as a semaphore. */
-		xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+        /* Allocate enough space to hold the maximum number of items that
+         * can be in the queue at any time.  It is valid for uxItemSize to be
+         * zero in the case the queue is used as a semaphore. */
+        xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 
-		/* Allocate the queue and storage area.  Justification for MISRA
-		deviation as follows:  pvPortMalloc() always ensures returned memory
-		blocks are aligned per the requirements of the MCU stack.  In this case
-		pvPortMalloc() must return a pointer that is guaranteed to meet the
-		alignment requirements of the Queue_t structure - which in this case
-		is an int8_t *.  Therefore, whenever the stack alignment requirements
-		are greater than or equal to the pointer to char requirements the cast
-		is safe.  In other cases alignment requirements are not strict (one or
-		two bytes). */
-		pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes ); /*lint !e9087 !e9079 see comment above. */
+        /* Check for multiplication overflow. */
+        configASSERT( ( uxItemSize == 0 ) || ( uxQueueLength == ( xQueueSizeInBytes / uxItemSize ) ) );
 
-		if( pxNewQueue != NULL )
-		{
-			/* Jump past the queue structure to find the location of the queue
-			storage area. */
-			pucQueueStorage = ( uint8_t * ) pxNewQueue;
-			pucQueueStorage += sizeof( Queue_t ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
+        /* Allocate the queue and storage area.  Justification for MISRA
+         * deviation as follows:  pvPortMalloc() always ensures returned memory
+         * blocks are aligned per the requirements of the MCU stack.  In this case
+         * pvPortMalloc() must return a pointer that is guaranteed to meet the
+         * alignment requirements of the Queue_t structure - which in this case
+         * is an int8_t *.  Therefore, whenever the stack alignment requirements
+         * are greater than or equal to the pointer to char requirements the cast
+         * is safe.  In other cases alignment requirements are not strict (one or
+         * two bytes). */
+        pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes ); /*lint !e9087 !e9079 see comment above. */
 
-			#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-			{
-				/* Queues can be created either statically or dynamically, so
-				note this task was created dynamically in case it is later
-				deleted. */
-				pxNewQueue->ucStaticallyAllocated = pdFALSE;
-			}
-			#endif /* configSUPPORT_STATIC_ALLOCATION */
+        if( pxNewQueue != NULL )
+        {
+            /* Jump past the queue structure to find the location of the queue
+             * storage area. */
+            pucQueueStorage = ( uint8_t * ) pxNewQueue;
+            pucQueueStorage += sizeof( Queue_t ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
 
-			prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
-		}
-		else
-		{
-			traceQUEUE_CREATE_FAILED( ucQueueType );
-			mtCOVERAGE_TEST_MARKER();
-		}
+            #if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+                {
+                    /* Queues can be created either statically or dynamically, so
+                     * note this task was created dynamically in case it is later
+                     * deleted. */
+                    pxNewQueue->ucStaticallyAllocated = pdFALSE;
+                }
+            #endif /* configSUPPORT_STATIC_ALLOCATION */
 
-		return pxNewQueue;
-	}
+            prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
+        }
+        else
+        {
+            traceQUEUE_CREATE_FAILED( ucQueueType );
+            mtCOVERAGE_TEST_MARKER();
+        }
+
+        return pxNewQueue;
+    }
 
 #endif /* configSUPPORT_STATIC_ALLOCATION */
 /*-----------------------------------------------------------*/
 
-static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, const uint8_t ucQueueType, Queue_t *pxNewQueue )
+static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength,
+                                   const UBaseType_t uxItemSize,
+                                   uint8_t * pucQueueStorage,
+                                   const uint8_t ucQueueType,
+                                   Queue_t * pxNewQueue )
 {
-	/* Remove compiler warnings about unused parameters should
-	configUSE_TRACE_FACILITY not be set to 1. */
-	( void ) ucQueueType;
+    /* Remove compiler warnings about unused parameters should
+     * configUSE_TRACE_FACILITY not be set to 1. */
+    ( void ) ucQueueType;
 
-	if( uxItemSize == ( UBaseType_t ) 0 )
-	{
-		/* No RAM was allocated for the queue storage area, but PC head cannot
-		be set to NULL because NULL is used as a key to say the queue is used as
-		a mutex.  Therefore just set pcHead to point to the queue as a benign
-		value that is known to be within the memory map. */
-		pxNewQueue->pcHead = ( int8_t * ) pxNewQueue;
-	}
-	else
-	{
-		/* Set the head to the start of the queue storage area. */
-		pxNewQueue->pcHead = ( int8_t * ) pucQueueStorage;
-	}
+    if( uxItemSize == ( UBaseType_t ) 0 )
+    {
+        /* No RAM was allocated for the queue storage area, but PC head cannot
+         * be set to NULL because NULL is used as a key to say the queue is used as
+         * a mutex.  Therefore just set pcHead to point to the queue as a benign
+         * value that is known to be within the memory map. */
+        pxNewQueue->pcHead = ( int8_t * ) pxNewQueue;
+    }
+    else
+    {
+        /* Set the head to the start of the queue storage area. */
+        pxNewQueue->pcHead = ( int8_t * ) pucQueueStorage;
+    }
 
-	/* Initialise the queue members as described where the queue type is
-	defined. */
-	pxNewQueue->uxLength = uxQueueLength;
-	pxNewQueue->uxItemSize = uxItemSize;
-	( void ) xQueueGenericReset( pxNewQueue, pdTRUE );
+    /* Initialise the queue members as described where the queue type is
+     * defined. */
+    pxNewQueue->uxLength = uxQueueLength;
+    pxNewQueue->uxItemSize = uxItemSize;
+    ( void ) xQueueGenericReset( pxNewQueue, pdTRUE );
 
-	#if ( configUSE_TRACE_FACILITY == 1 )
-	{
-		pxNewQueue->ucQueueType = ucQueueType;
-	}
-	#endif /* configUSE_TRACE_FACILITY */
+    #if ( configUSE_TRACE_FACILITY == 1 )
+        {
+            pxNewQueue->ucQueueType = ucQueueType;
+        }
+    #endif /* configUSE_TRACE_FACILITY */
 
-	#if( configUSE_QUEUE_SETS == 1 )
-	{
-		pxNewQueue->pxQueueSetContainer = NULL;
-	}
-	#endif /* configUSE_QUEUE_SETS */
+    #if ( configUSE_QUEUE_SETS == 1 )
+        {
+            pxNewQueue->pxQueueSetContainer = NULL;
+        }
+    #endif /* configUSE_QUEUE_SETS */
 
-	traceQUEUE_CREATE( pxNewQueue );
+    traceQUEUE_CREATE( pxNewQueue );
 }
 /*-----------------------------------------------------------*/
 
-#if( configUSE_MUTEXES == 1 )
+#if ( configUSE_MUTEXES == 1 )
 
-	static void prvInitialiseMutex( Queue_t *pxNewQueue )
-	{
-		if( pxNewQueue != NULL )
-		{
-			/* The queue create function will set all the queue structure members
-			correctly for a generic queue, but this function is creating a
-			mutex.  Overwrite those members that need to be set differently -
-			in particular the information required for priority inheritance. */
-			pxNewQueue->u.xSemaphore.xMutexHolder = NULL;
-			pxNewQueue->uxQueueType = queueQUEUE_IS_MUTEX;
+    static void prvInitialiseMutex( Queue_t * pxNewQueue )
+    {
+        if( pxNewQueue != NULL )
+        {
+            /* The queue create function will set all the queue structure members
+            * correctly for a generic queue, but this function is creating a
+            * mutex.  Overwrite those members that need to be set differently -
+            * in particular the information required for priority inheritance. */
+            pxNewQueue->u.xSemaphore.xMutexHolder = NULL;
+            pxNewQueue->uxQueueType = queueQUEUE_IS_MUTEX;
 
-			/* In case this is a recursive mutex. */
-			pxNewQueue->u.xSemaphore.uxRecursiveCallCount = 0;
+            /* In case this is a recursive mutex. */
+            pxNewQueue->u.xSemaphore.uxRecursiveCallCount = 0;
 
-			traceCREATE_MUTEX( pxNewQueue );
+            traceCREATE_MUTEX( pxNewQueue );
 
-			/* Start with the semaphore in the expected state. */
-			( void ) xQueueGenericSend( pxNewQueue, NULL, ( TickType_t ) 0U, queueSEND_TO_BACK );
-		}
-		else
-		{
-			traceCREATE_MUTEX_FAILED();
-		}
-	}
+            /* Start with the semaphore in the expected state. */
+            ( void ) xQueueGenericSend( pxNewQueue, NULL, ( TickType_t ) 0U, queueSEND_TO_BACK );
+        }
+        else
+        {
+            traceCREATE_MUTEX_FAILED();
+        }
+    }
 
 #endif /* configUSE_MUTEXES */
 /*-----------------------------------------------------------*/
 
-#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
+#if ( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
 
-	QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType )
-	{
-	QueueHandle_t xNewQueue;
-	const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
+    QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType )
+    {
+        QueueHandle_t xNewQueue;
+        const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
 
-		xNewQueue = xQueueGenericCreate( uxMutexLength, uxMutexSize, ucQueueType );
-		prvInitialiseMutex( ( Queue_t * ) xNewQueue );
+        xNewQueue = xQueueGenericCreate( uxMutexLength, uxMutexSize, ucQueueType );
+        prvInitialiseMutex( ( Queue_t * ) xNewQueue );
 
-		return xNewQueue;
-	}
+        return xNewQueue;
+    }
 
 #endif /* configUSE_MUTEXES */
 /*-----------------------------------------------------------*/
 
-#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
+#if ( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
 
-	QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue )
-	{
-	QueueHandle_t xNewQueue;
-	const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
+    QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType,
+                                           StaticQueue_t * pxStaticQueue )
+    {
+        QueueHandle_t xNewQueue;
+        const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
 
-		/* Prevent compiler warnings about unused parameters if
-		configUSE_TRACE_FACILITY does not equal 1. */
-		( void ) ucQueueType;
+        /* Prevent compiler warnings about unused parameters if
+         * configUSE_TRACE_FACILITY does not equal 1. */
+        ( void ) ucQueueType;
 
-		xNewQueue = xQueueGenericCreateStatic( uxMutexLength, uxMutexSize, NULL, pxStaticQueue, ucQueueType );
-		prvInitialiseMutex( ( Queue_t * ) xNewQueue );
+        xNewQueue = xQueueGenericCreateStatic( uxMutexLength, uxMutexSize, NULL, pxStaticQueue, ucQueueType );
+        prvInitialiseMutex( ( Queue_t * ) xNewQueue );
 
-		return xNewQueue;
-	}
+        return xNewQueue;
+    }
 
 #endif /* configUSE_MUTEXES */
 /*-----------------------------------------------------------*/
 
 #if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) )
 
-	TaskHandle_t xQueueGetMutexHolder( QueueHandle_t xSemaphore )
-	{
-	TaskHandle_t pxReturn;
-	Queue_t * const pxSemaphore = ( Queue_t * ) xSemaphore;
+    TaskHandle_t xQueueGetMutexHolder( QueueHandle_t xSemaphore )
+    {
+        TaskHandle_t pxReturn;
+        Queue_t * const pxSemaphore = ( Queue_t * ) xSemaphore;
 
-		/* This function is called by xSemaphoreGetMutexHolder(), and should not
-		be called directly.  Note:  This is a good way of determining if the
-		calling task is the mutex holder, but not a good way of determining the
-		identity of the mutex holder, as the holder may change between the
-		following critical section exiting and the function returning. */
-		taskENTER_CRITICAL();
-		{
-			if( pxSemaphore->uxQueueType == queueQUEUE_IS_MUTEX )
-			{
-				pxReturn = pxSemaphore->u.xSemaphore.xMutexHolder;
-			}
-			else
-			{
-				pxReturn = NULL;
-			}
-		}
-		taskEXIT_CRITICAL();
+        /* This function is called by xSemaphoreGetMutexHolder(), and should not
+         * be called directly.  Note:  This is a good way of determining if the
+         * calling task is the mutex holder, but not a good way of determining the
+         * identity of the mutex holder, as the holder may change between the
+         * following critical section exiting and the function returning. */
+        taskENTER_CRITICAL();
+        {
+            if( pxSemaphore->uxQueueType == queueQUEUE_IS_MUTEX )
+            {
+                pxReturn = pxSemaphore->u.xSemaphore.xMutexHolder;
+            }
+            else
+            {
+                pxReturn = NULL;
+            }
+        }
+        taskEXIT_CRITICAL();
 
-		return pxReturn;
-	} /*lint !e818 xSemaphore cannot be a pointer to const because it is a typedef. */
+        return pxReturn;
+    } /*lint !e818 xSemaphore cannot be a pointer to const because it is a typedef. */
 
-#endif
+#endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */
 /*-----------------------------------------------------------*/
 
 #if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) )
 
-	TaskHandle_t xQueueGetMutexHolderFromISR( QueueHandle_t xSemaphore )
-	{
-	TaskHandle_t pxReturn;
+    TaskHandle_t xQueueGetMutexHolderFromISR( QueueHandle_t xSemaphore )
+    {
+        TaskHandle_t pxReturn;
 
-		configASSERT( xSemaphore );
+        configASSERT( xSemaphore );
 
-		/* Mutexes cannot be used in interrupt service routines, so the mutex
-		holder should not change in an ISR, and therefore a critical section is
-		not required here. */
-		if( ( ( Queue_t * ) xSemaphore )->uxQueueType == queueQUEUE_IS_MUTEX )
-		{
-			pxReturn = ( ( Queue_t * ) xSemaphore )->u.xSemaphore.xMutexHolder;
-		}
-		else
-		{
-			pxReturn = NULL;
-		}
+        /* Mutexes cannot be used in interrupt service routines, so the mutex
+         * holder should not change in an ISR, and therefore a critical section is
+         * not required here. */
+        if( ( ( Queue_t * ) xSemaphore )->uxQueueType == queueQUEUE_IS_MUTEX )
+        {
+            pxReturn = ( ( Queue_t * ) xSemaphore )->u.xSemaphore.xMutexHolder;
+        }
+        else
+        {
+            pxReturn = NULL;
+        }
 
-		return pxReturn;
-	} /*lint !e818 xSemaphore cannot be a pointer to const because it is a typedef. */
+        return pxReturn;
+    } /*lint !e818 xSemaphore cannot be a pointer to const because it is a typedef. */
 
-#endif
+#endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_RECURSIVE_MUTEXES == 1 )
 
-	BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex )
-	{
-	BaseType_t xReturn;
-	Queue_t * const pxMutex = ( Queue_t * ) xMutex;
+    BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex )
+    {
+        BaseType_t xReturn;
+        Queue_t * const pxMutex = ( Queue_t * ) xMutex;
 
-		configASSERT( pxMutex );
+        configASSERT( pxMutex );
 
-		/* If this is the task that holds the mutex then xMutexHolder will not
-		change outside of this task.  If this task does not hold the mutex then
-		pxMutexHolder can never coincidentally equal the tasks handle, and as
-		this is the only condition we are interested in it does not matter if
-		pxMutexHolder is accessed simultaneously by another task.  Therefore no
-		mutual exclusion is required to test the pxMutexHolder variable. */
-		if( pxMutex->u.xSemaphore.xMutexHolder == xTaskGetCurrentTaskHandle() )
-		{
-			traceGIVE_MUTEX_RECURSIVE( pxMutex );
+        /* If this is the task that holds the mutex then xMutexHolder will not
+         * change outside of this task.  If this task does not hold the mutex then
+         * pxMutexHolder can never coincidentally equal the tasks handle, and as
+         * this is the only condition we are interested in it does not matter if
+         * pxMutexHolder is accessed simultaneously by another task.  Therefore no
+         * mutual exclusion is required to test the pxMutexHolder variable. */
+        if( pxMutex->u.xSemaphore.xMutexHolder == xTaskGetCurrentTaskHandle() )
+        {
+            traceGIVE_MUTEX_RECURSIVE( pxMutex );
 
-			/* uxRecursiveCallCount cannot be zero if xMutexHolder is equal to
-			the task handle, therefore no underflow check is required.  Also,
-			uxRecursiveCallCount is only modified by the mutex holder, and as
-			there can only be one, no mutual exclusion is required to modify the
-			uxRecursiveCallCount member. */
-			( pxMutex->u.xSemaphore.uxRecursiveCallCount )--;
+            /* uxRecursiveCallCount cannot be zero if xMutexHolder is equal to
+             * the task handle, therefore no underflow check is required.  Also,
+             * uxRecursiveCallCount is only modified by the mutex holder, and as
+             * there can only be one, no mutual exclusion is required to modify the
+             * uxRecursiveCallCount member. */
+            ( pxMutex->u.xSemaphore.uxRecursiveCallCount )--;
 
-			/* Has the recursive call count unwound to 0? */
-			if( pxMutex->u.xSemaphore.uxRecursiveCallCount == ( UBaseType_t ) 0 )
-			{
-				/* Return the mutex.  This will automatically unblock any other
-				task that might be waiting to access the mutex. */
-				( void ) xQueueGenericSend( pxMutex, NULL, queueMUTEX_GIVE_BLOCK_TIME, queueSEND_TO_BACK );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
+            /* Has the recursive call count unwound to 0? */
+            if( pxMutex->u.xSemaphore.uxRecursiveCallCount == ( UBaseType_t ) 0 )
+            {
+                /* Return the mutex.  This will automatically unblock any other
+                 * task that might be waiting to access the mutex. */
+                ( void ) xQueueGenericSend( pxMutex, NULL, queueMUTEX_GIVE_BLOCK_TIME, queueSEND_TO_BACK );
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
 
-			xReturn = pdPASS;
-		}
-		else
-		{
-			/* The mutex cannot be given because the calling task is not the
-			holder. */
-			xReturn = pdFAIL;
+            xReturn = pdPASS;
+        }
+        else
+        {
+            /* The mutex cannot be given because the calling task is not the
+             * holder. */
+            xReturn = pdFAIL;
 
-			traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex );
-		}
+            traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex );
+        }
 
-		return xReturn;
-	}
+        return xReturn;
+    }
 
 #endif /* configUSE_RECURSIVE_MUTEXES */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_RECURSIVE_MUTEXES == 1 )
 
-	BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait )
-	{
-	BaseType_t xReturn;
-	Queue_t * const pxMutex = ( Queue_t * ) xMutex;
+    BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex,
+                                         TickType_t xTicksToWait )
+    {
+        BaseType_t xReturn;
+        Queue_t * const pxMutex = ( Queue_t * ) xMutex;
 
-		configASSERT( pxMutex );
+        configASSERT( pxMutex );
 
-		/* Comments regarding mutual exclusion as per those within
-		xQueueGiveMutexRecursive(). */
+        /* Comments regarding mutual exclusion as per those within
+         * xQueueGiveMutexRecursive(). */
 
-		traceTAKE_MUTEX_RECURSIVE( pxMutex );
+        traceTAKE_MUTEX_RECURSIVE( pxMutex );
 
-		if( pxMutex->u.xSemaphore.xMutexHolder == xTaskGetCurrentTaskHandle() )
-		{
-			( pxMutex->u.xSemaphore.uxRecursiveCallCount )++;
-			xReturn = pdPASS;
-		}
-		else
-		{
-			xReturn = xQueueSemaphoreTake( pxMutex, xTicksToWait );
+        if( pxMutex->u.xSemaphore.xMutexHolder == xTaskGetCurrentTaskHandle() )
+        {
+            ( pxMutex->u.xSemaphore.uxRecursiveCallCount )++;
+            xReturn = pdPASS;
+        }
+        else
+        {
+            xReturn = xQueueSemaphoreTake( pxMutex, xTicksToWait );
 
-			/* pdPASS will only be returned if the mutex was successfully
-			obtained.  The calling task may have entered the Blocked state
-			before reaching here. */
-			if( xReturn != pdFAIL )
-			{
-				( pxMutex->u.xSemaphore.uxRecursiveCallCount )++;
-			}
-			else
-			{
-				traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex );
-			}
-		}
+            /* pdPASS will only be returned if the mutex was successfully
+             * obtained.  The calling task may have entered the Blocked state
+             * before reaching here. */
+            if( xReturn != pdFAIL )
+            {
+                ( pxMutex->u.xSemaphore.uxRecursiveCallCount )++;
+            }
+            else
+            {
+                traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex );
+            }
+        }
 
-		return xReturn;
-	}
+        return xReturn;
+    }
 
 #endif /* configUSE_RECURSIVE_MUTEXES */
 /*-----------------------------------------------------------*/
 
-#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
+#if ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
 
-	QueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue )
-	{
-	QueueHandle_t xHandle;
+    QueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount,
+                                                       const UBaseType_t uxInitialCount,
+                                                       StaticQueue_t * pxStaticQueue )
+    {
+        QueueHandle_t xHandle;
 
-		configASSERT( uxMaxCount != 0 );
-		configASSERT( uxInitialCount <= uxMaxCount );
+        configASSERT( uxMaxCount != 0 );
+        configASSERT( uxInitialCount <= uxMaxCount );
 
-		xHandle = xQueueGenericCreateStatic( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticQueue, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
+        xHandle = xQueueGenericCreateStatic( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticQueue, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
 
-		if( xHandle != NULL )
-		{
-			( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
+        if( xHandle != NULL )
+        {
+            ( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
 
-			traceCREATE_COUNTING_SEMAPHORE();
-		}
-		else
-		{
-			traceCREATE_COUNTING_SEMAPHORE_FAILED();
-		}
+            traceCREATE_COUNTING_SEMAPHORE();
+        }
+        else
+        {
+            traceCREATE_COUNTING_SEMAPHORE_FAILED();
+        }
 
-		return xHandle;
-	}
+        return xHandle;
+    }
 
 #endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */
 /*-----------------------------------------------------------*/
 
-#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
+#if ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
 
-	QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount )
-	{
-	QueueHandle_t xHandle;
+    QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount,
+                                                 const UBaseType_t uxInitialCount )
+    {
+        QueueHandle_t xHandle;
 
-		configASSERT( uxMaxCount != 0 );
-		configASSERT( uxInitialCount <= uxMaxCount );
+        configASSERT( uxMaxCount != 0 );
+        configASSERT( uxInitialCount <= uxMaxCount );
 
-		xHandle = xQueueGenericCreate( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
+        xHandle = xQueueGenericCreate( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
 
-		if( xHandle != NULL )
-		{
-			( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
+        if( xHandle != NULL )
+        {
+            ( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
 
-			traceCREATE_COUNTING_SEMAPHORE();
-		}
-		else
-		{
-			traceCREATE_COUNTING_SEMAPHORE_FAILED();
-		}
+            traceCREATE_COUNTING_SEMAPHORE();
+        }
+        else
+        {
+            traceCREATE_COUNTING_SEMAPHORE_FAILED();
+        }
 
-		return xHandle;
-	}
+        return xHandle;
+    }
 
 #endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */
 /*-----------------------------------------------------------*/
 
-BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition )
+BaseType_t xQueueGenericSend( QueueHandle_t xQueue,
+                              const void * const pvItemToQueue,
+                              TickType_t xTicksToWait,
+                              const BaseType_t xCopyPosition )
 {
-BaseType_t xEntryTimeSet = pdFALSE, xYieldRequired;
-TimeOut_t xTimeOut;
-Queue_t * const pxQueue = xQueue;
+    BaseType_t xEntryTimeSet = pdFALSE, xYieldRequired;
+    TimeOut_t xTimeOut;
+    Queue_t * const pxQueue = xQueue;
 
-	configASSERT( pxQueue );
-	configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
-	configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
-	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
-	{
-		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
-	}
-	#endif
+    configASSERT( pxQueue );
+    configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
+    configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
+    #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
+        {
+            configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
+        }
+    #endif
 
+    /*lint -save -e904 This function relaxes the coding standard somewhat to
+     * allow return statements within the function itself.  This is done in the
+     * interest of execution time efficiency. */
+    for( ; ; )
+    {
+        taskENTER_CRITICAL();
+        {
+            /* Is there room on the queue now?  The running task must be the
+             * highest priority task wanting to access the queue.  If the head item
+             * in the queue is to be overwritten then it does not matter if the
+             * queue is full. */
+            if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
+            {
+                traceQUEUE_SEND( pxQueue );
 
-	/*lint -save -e904 This function relaxes the coding standard somewhat to
-	allow return statements within the function itself.  This is done in the
-	interest of execution time efficiency. */
-	for( ;; )
-	{
-		taskENTER_CRITICAL();
-		{
-			/* Is there room on the queue now?  The running task must be the
-			highest priority task wanting to access the queue.  If the head item
-			in the queue is to be overwritten then it does not matter if the
-			queue is full. */
-			if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
-			{
-				traceQUEUE_SEND( pxQueue );
+                #if ( configUSE_QUEUE_SETS == 1 )
+                    {
+                        const UBaseType_t uxPreviousMessagesWaiting = pxQueue->uxMessagesWaiting;
 
-				#if ( configUSE_QUEUE_SETS == 1 )
-				{
-				const UBaseType_t uxPreviousMessagesWaiting = pxQueue->uxMessagesWaiting;
+                        xYieldRequired = prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
 
-					xYieldRequired = prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
+                        if( pxQueue->pxQueueSetContainer != NULL )
+                        {
+                            if( ( xCopyPosition == queueOVERWRITE ) && ( uxPreviousMessagesWaiting != ( UBaseType_t ) 0 ) )
+                            {
+                                /* Do not notify the queue set as an existing item
+                                 * was overwritten in the queue so the number of items
+                                 * in the queue has not changed. */
+                                mtCOVERAGE_TEST_MARKER();
+                            }
+                            else if( prvNotifyQueueSetContainer( pxQueue ) != pdFALSE )
+                            {
+                                /* The queue is a member of a queue set, and posting
+                                 * to the queue set caused a higher priority task to
+                                 * unblock. A context switch is required. */
+                                queueYIELD_IF_USING_PREEMPTION();
+                            }
+                            else
+                            {
+                                mtCOVERAGE_TEST_MARKER();
+                            }
+                        }
+                        else
+                        {
+                            /* If there was a task waiting for data to arrive on the
+                             * queue then unblock it now. */
+                            if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+                            {
+                                if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+                                {
+                                    /* The unblocked task has a priority higher than
+                                     * our own so yield immediately.  Yes it is ok to
+                                     * do this from within the critical section - the
+                                     * kernel takes care of that. */
+                                    queueYIELD_IF_USING_PREEMPTION();
+                                }
+                                else
+                                {
+                                    mtCOVERAGE_TEST_MARKER();
+                                }
+                            }
+                            else if( xYieldRequired != pdFALSE )
+                            {
+                                /* This path is a special case that will only get
+                                 * executed if the task was holding multiple mutexes
+                                 * and the mutexes were given back in an order that is
+                                 * different to that in which they were taken. */
+                                queueYIELD_IF_USING_PREEMPTION();
+                            }
+                            else
+                            {
+                                mtCOVERAGE_TEST_MARKER();
+                            }
+                        }
+                    }
+                #else /* configUSE_QUEUE_SETS */
+                    {
+                        xYieldRequired = prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
 
-					if( pxQueue->pxQueueSetContainer != NULL )
-					{
-						if( ( xCopyPosition == queueOVERWRITE ) && ( uxPreviousMessagesWaiting != ( UBaseType_t ) 0 ) )
-						{
-							/* Do not notify the queue set as an existing item
-							was overwritten in the queue so the number of items
-							in the queue has not changed. */
-							mtCOVERAGE_TEST_MARKER();
-						}
-						else if( prvNotifyQueueSetContainer( pxQueue ) != pdFALSE )
-						{
-							/* The queue is a member of a queue set, and posting
-							to the queue set caused a higher priority task to
-							unblock. A context switch is required. */
-							queueYIELD_IF_USING_PREEMPTION();
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						/* If there was a task waiting for data to arrive on the
-						queue then unblock it now. */
-						if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-						{
-							if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-							{
-								/* The unblocked task has a priority higher than
-								our own so yield immediately.  Yes it is ok to
-								do this from within the critical section - the
-								kernel takes care of that. */
-								queueYIELD_IF_USING_PREEMPTION();
-							}
-							else
-							{
-								mtCOVERAGE_TEST_MARKER();
-							}
-						}
-						else if( xYieldRequired != pdFALSE )
-						{
-							/* This path is a special case that will only get
-							executed if the task was holding multiple mutexes
-							and the mutexes were given back in an order that is
-							different to that in which they were taken. */
-							queueYIELD_IF_USING_PREEMPTION();
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-				}
-				#else /* configUSE_QUEUE_SETS */
-				{
-					xYieldRequired = prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
+                        /* If there was a task waiting for data to arrive on the
+                         * queue then unblock it now. */
+                        if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+                        {
+                            if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+                            {
+                                /* The unblocked task has a priority higher than
+                                 * our own so yield immediately.  Yes it is ok to do
+                                 * this from within the critical section - the kernel
+                                 * takes care of that. */
+                                queueYIELD_IF_USING_PREEMPTION();
+                            }
+                            else
+                            {
+                                mtCOVERAGE_TEST_MARKER();
+                            }
+                        }
+                        else if( xYieldRequired != pdFALSE )
+                        {
+                            /* This path is a special case that will only get
+                             * executed if the task was holding multiple mutexes and
+                             * the mutexes were given back in an order that is
+                             * different to that in which they were taken. */
+                            queueYIELD_IF_USING_PREEMPTION();
+                        }
+                        else
+                        {
+                            mtCOVERAGE_TEST_MARKER();
+                        }
+                    }
+                #endif /* configUSE_QUEUE_SETS */
 
-					/* If there was a task waiting for data to arrive on the
-					queue then unblock it now. */
-					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-					{
-						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-						{
-							/* The unblocked task has a priority higher than
-							our own so yield immediately.  Yes it is ok to do
-							this from within the critical section - the kernel
-							takes care of that. */
-							queueYIELD_IF_USING_PREEMPTION();
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else if( xYieldRequired != pdFALSE )
-					{
-						/* This path is a special case that will only get
-						executed if the task was holding multiple mutexes and
-						the mutexes were given back in an order that is
-						different to that in which they were taken. */
-						queueYIELD_IF_USING_PREEMPTION();
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				#endif /* configUSE_QUEUE_SETS */
+                taskEXIT_CRITICAL();
+                return pdPASS;
+            }
+            else
+            {
+                if( xTicksToWait == ( TickType_t ) 0 )
+                {
+                    /* The queue was full and no block time is specified (or
+                     * the block time has expired) so leave now. */
+                    taskEXIT_CRITICAL();
 
-				taskEXIT_CRITICAL();
-				return pdPASS;
-			}
-			else
-			{
-				if( xTicksToWait == ( TickType_t ) 0 )
-				{
-					/* The queue was full and no block time is specified (or
-					the block time has expired) so leave now. */
-					taskEXIT_CRITICAL();
+                    /* Return to the original privilege level before exiting
+                     * the function. */
+                    traceQUEUE_SEND_FAILED( pxQueue );
+                    return errQUEUE_FULL;
+                }
+                else if( xEntryTimeSet == pdFALSE )
+                {
+                    /* The queue was full and a block time was specified so
+                     * configure the timeout structure. */
+                    vTaskInternalSetTimeOutState( &xTimeOut );
+                    xEntryTimeSet = pdTRUE;
+                }
+                else
+                {
+                    /* Entry time was already set. */
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+        }
+        taskEXIT_CRITICAL();
 
-					/* Return to the original privilege level before exiting
-					the function. */
-					traceQUEUE_SEND_FAILED( pxQueue );
-					return errQUEUE_FULL;
-				}
-				else if( xEntryTimeSet == pdFALSE )
-				{
-					/* The queue was full and a block time was specified so
-					configure the timeout structure. */
-					vTaskInternalSetTimeOutState( &xTimeOut );
-					xEntryTimeSet = pdTRUE;
-				}
-				else
-				{
-					/* Entry time was already set. */
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-		}
-		taskEXIT_CRITICAL();
+        /* Interrupts and other tasks can send to and receive from the queue
+         * now the critical section has been exited. */
 
-		/* Interrupts and other tasks can send to and receive from the queue
-		now the critical section has been exited. */
+        vTaskSuspendAll();
+        prvLockQueue( pxQueue );
 
-		vTaskSuspendAll();
-		prvLockQueue( pxQueue );
+        /* Update the timeout state to see if it has expired yet. */
+        if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
+        {
+            if( prvIsQueueFull( pxQueue ) != pdFALSE )
+            {
+                traceBLOCKING_ON_QUEUE_SEND( pxQueue );
+                vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait );
 
-		/* Update the timeout state to see if it has expired yet. */
-		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
-		{
-			if( prvIsQueueFull( pxQueue ) != pdFALSE )
-			{
-				traceBLOCKING_ON_QUEUE_SEND( pxQueue );
-				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait );
+                /* Unlocking the queue means queue events can effect the
+                 * event list.  It is possible that interrupts occurring now
+                 * remove this task from the event list again - but as the
+                 * scheduler is suspended the task will go onto the pending
+                 * ready last instead of the actual ready list. */
+                prvUnlockQueue( pxQueue );
 
-				/* Unlocking the queue means queue events can effect the
-				event list.  It is possible that interrupts occurring now
-				remove this task from the event list again - but as the
-				scheduler is suspended the task will go onto the pending
-				ready last instead of the actual ready list. */
-				prvUnlockQueue( pxQueue );
+                /* Resuming the scheduler will move tasks from the pending
+                 * ready list into the ready list - so it is feasible that this
+                 * task is already in a ready list before it yields - in which
+                 * case the yield will not cause a context switch unless there
+                 * is also a higher priority task in the pending ready list. */
+                if( xTaskResumeAll() == pdFALSE )
+                {
+                    portYIELD_WITHIN_API();
+                }
+            }
+            else
+            {
+                /* Try again. */
+                prvUnlockQueue( pxQueue );
+                ( void ) xTaskResumeAll();
+            }
+        }
+        else
+        {
+            /* The timeout has expired. */
+            prvUnlockQueue( pxQueue );
+            ( void ) xTaskResumeAll();
 
-				/* Resuming the scheduler will move tasks from the pending
-				ready list into the ready list - so it is feasible that this
-				task is already in a ready list before it yields - in which
-				case the yield will not cause a context switch unless there
-				is also a higher priority task in the pending ready list. */
-				if( xTaskResumeAll() == pdFALSE )
-				{
-					portYIELD_WITHIN_API();
-				}
-			}
-			else
-			{
-				/* Try again. */
-				prvUnlockQueue( pxQueue );
-				( void ) xTaskResumeAll();
-			}
-		}
-		else
-		{
-			/* The timeout has expired. */
-			prvUnlockQueue( pxQueue );
-			( void ) xTaskResumeAll();
-
-			traceQUEUE_SEND_FAILED( pxQueue );
-			return errQUEUE_FULL;
-		}
-	} /*lint -restore */
+            traceQUEUE_SEND_FAILED( pxQueue );
+            return errQUEUE_FULL;
+        }
+    } /*lint -restore */
 }
 /*-----------------------------------------------------------*/
 
-BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, const void * const pvItemToQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition )
+BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue,
+                                     const void * const pvItemToQueue,
+                                     BaseType_t * const pxHigherPriorityTaskWoken,
+                                     const BaseType_t xCopyPosition )
 {
-BaseType_t xReturn;
-UBaseType_t uxSavedInterruptStatus;
-Queue_t * const pxQueue = xQueue;
+    BaseType_t xReturn;
+    UBaseType_t uxSavedInterruptStatus;
+    Queue_t * const pxQueue = xQueue;
 
-	configASSERT( pxQueue );
-	configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
-	configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
+    configASSERT( pxQueue );
+    configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
+    configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
 
-	/* RTOS ports that support interrupt nesting have the concept of a maximum
-	system call (or maximum API call) interrupt priority.  Interrupts that are
-	above the maximum system call priority are kept permanently enabled, even
-	when the RTOS kernel is in a critical section, but cannot make any calls to
-	FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
-	then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-	failure if a FreeRTOS API function is called from an interrupt that has been
-	assigned a priority above the configured maximum system call priority.
-	Only FreeRTOS functions that end in FromISR can be called from interrupts
-	that have been assigned a priority at or (logically) below the maximum
-	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
-	safe API to ensure interrupt entry is as fast and as simple as possible.
-	More information (albeit Cortex-M specific) is provided on the following
-	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
-	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+    /* RTOS ports that support interrupt nesting have the concept of a maximum
+     * system call (or maximum API call) interrupt priority.  Interrupts that are
+     * above the maximum system call priority are kept permanently enabled, even
+     * when the RTOS kernel is in a critical section, but cannot make any calls to
+     * FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
+     * then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
+     * failure if a FreeRTOS API function is called from an interrupt that has been
+     * assigned a priority above the configured maximum system call priority.
+     * Only FreeRTOS functions that end in FromISR can be called from interrupts
+     * that have been assigned a priority at or (logically) below the maximum
+     * system call interrupt priority.  FreeRTOS maintains a separate interrupt
+     * safe API to ensure interrupt entry is as fast and as simple as possible.
+     * More information (albeit Cortex-M specific) is provided on the following
+     * link: https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
+    portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 
-	/* Similar to xQueueGenericSend, except without blocking if there is no room
-	in the queue.  Also don't directly wake a task that was blocked on a queue
-	read, instead return a flag to say whether a context switch is required or
-	not (i.e. has a task with a higher priority than us been woken by this
-	post). */
-	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
-		{
-			const int8_t cTxLock = pxQueue->cTxLock;
-			const UBaseType_t uxPreviousMessagesWaiting = pxQueue->uxMessagesWaiting;
+    /* Similar to xQueueGenericSend, except without blocking if there is no room
+     * in the queue.  Also don't directly wake a task that was blocked on a queue
+     * read, instead return a flag to say whether a context switch is required or
+     * not (i.e. has a task with a higher priority than us been woken by this
+     * post). */
+    uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
+    {
+        if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
+        {
+            const int8_t cTxLock = pxQueue->cTxLock;
+            const UBaseType_t uxPreviousMessagesWaiting = pxQueue->uxMessagesWaiting;
 
-			traceQUEUE_SEND_FROM_ISR( pxQueue );
+            traceQUEUE_SEND_FROM_ISR( pxQueue );
 
-			/* Semaphores use xQueueGiveFromISR(), so pxQueue will not be a
-			semaphore or mutex.  That means prvCopyDataToQueue() cannot result
-			in a task disinheriting a priority and prvCopyDataToQueue() can be
-			called here even though the disinherit function does not check if
-			the scheduler is suspended before accessing the ready lists. */
-			( void ) prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
+            /* Semaphores use xQueueGiveFromISR(), so pxQueue will not be a
+             *  semaphore or mutex.  That means prvCopyDataToQueue() cannot result
+             *  in a task disinheriting a priority and prvCopyDataToQueue() can be
+             *  called here even though the disinherit function does not check if
+             *  the scheduler is suspended before accessing the ready lists. */
+            ( void ) prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
 
-			/* The event list is not altered if the queue is locked.  This will
-			be done when the queue is unlocked later. */
-			if( cTxLock == queueUNLOCKED )
-			{
-				#if ( configUSE_QUEUE_SETS == 1 )
-				{
-					if( pxQueue->pxQueueSetContainer != NULL )
-					{
-						if( ( xCopyPosition == queueOVERWRITE ) && ( uxPreviousMessagesWaiting != ( UBaseType_t ) 0 ) )
-						{
-							/* Do not notify the queue set as an existing item
-							was overwritten in the queue so the number of items
-							in the queue has not changed. */
-							mtCOVERAGE_TEST_MARKER();
-						}
-						else if( prvNotifyQueueSetContainer( pxQueue ) != pdFALSE )
-						{
-							/* The queue is a member of a queue set, and posting
-							to the queue set caused a higher priority task to
-							unblock.  A context switch is required. */
-							if( pxHigherPriorityTaskWoken != NULL )
-							{
-								*pxHigherPriorityTaskWoken = pdTRUE;
-							}
-							else
-							{
-								mtCOVERAGE_TEST_MARKER();
-							}
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-						{
-							if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-							{
-								/* The task waiting has a higher priority so
-								record that a context switch is required. */
-								if( pxHigherPriorityTaskWoken != NULL )
-								{
-									*pxHigherPriorityTaskWoken = pdTRUE;
-								}
-								else
-								{
-									mtCOVERAGE_TEST_MARKER();
-								}
-							}
-							else
-							{
-								mtCOVERAGE_TEST_MARKER();
-							}
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-				}
-				#else /* configUSE_QUEUE_SETS */
-				{
-					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-					{
-						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-						{
-							/* The task waiting has a higher priority so record that a
-							context	switch is required. */
-							if( pxHigherPriorityTaskWoken != NULL )
-							{
-								*pxHigherPriorityTaskWoken = pdTRUE;
-							}
-							else
-							{
-								mtCOVERAGE_TEST_MARKER();
-							}
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-					
-					/* Not used in this path. */
-					( void ) uxPreviousMessagesWaiting;
-				}
-				#endif /* configUSE_QUEUE_SETS */
-			}
-			else
-			{
-				/* Increment the lock count so the task that unlocks the queue
-				knows that data was posted while it was locked. */
-				pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
-			}
+            /* The event list is not altered if the queue is locked.  This will
+             * be done when the queue is unlocked later. */
+            if( cTxLock == queueUNLOCKED )
+            {
+                #if ( configUSE_QUEUE_SETS == 1 )
+                    {
+                        if( pxQueue->pxQueueSetContainer != NULL )
+                        {
+                            if( ( xCopyPosition == queueOVERWRITE ) && ( uxPreviousMessagesWaiting != ( UBaseType_t ) 0 ) )
+                            {
+                                /* Do not notify the queue set as an existing item
+                                 * was overwritten in the queue so the number of items
+                                 * in the queue has not changed. */
+                                mtCOVERAGE_TEST_MARKER();
+                            }
+                            else if( prvNotifyQueueSetContainer( pxQueue ) != pdFALSE )
+                            {
+                                /* The queue is a member of a queue set, and posting
+                                 * to the queue set caused a higher priority task to
+                                 * unblock.  A context switch is required. */
+                                if( pxHigherPriorityTaskWoken != NULL )
+                                {
+                                    *pxHigherPriorityTaskWoken = pdTRUE;
+                                }
+                                else
+                                {
+                                    mtCOVERAGE_TEST_MARKER();
+                                }
+                            }
+                            else
+                            {
+                                mtCOVERAGE_TEST_MARKER();
+                            }
+                        }
+                        else
+                        {
+                            if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+                            {
+                                if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+                                {
+                                    /* The task waiting has a higher priority so
+                                     *  record that a context switch is required. */
+                                    if( pxHigherPriorityTaskWoken != NULL )
+                                    {
+                                        *pxHigherPriorityTaskWoken = pdTRUE;
+                                    }
+                                    else
+                                    {
+                                        mtCOVERAGE_TEST_MARKER();
+                                    }
+                                }
+                                else
+                                {
+                                    mtCOVERAGE_TEST_MARKER();
+                                }
+                            }
+                            else
+                            {
+                                mtCOVERAGE_TEST_MARKER();
+                            }
+                        }
+                    }
+                #else /* configUSE_QUEUE_SETS */
+                    {
+                        if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+                        {
+                            if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+                            {
+                                /* The task waiting has a higher priority so record that a
+                                 * context switch is required. */
+                                if( pxHigherPriorityTaskWoken != NULL )
+                                {
+                                    *pxHigherPriorityTaskWoken = pdTRUE;
+                                }
+                                else
+                                {
+                                    mtCOVERAGE_TEST_MARKER();
+                                }
+                            }
+                            else
+                            {
+                                mtCOVERAGE_TEST_MARKER();
+                            }
+                        }
+                        else
+                        {
+                            mtCOVERAGE_TEST_MARKER();
+                        }
 
-			xReturn = pdPASS;
-		}
-		else
-		{
-			traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
-			xReturn = errQUEUE_FULL;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+                        /* Not used in this path. */
+                        ( void ) uxPreviousMessagesWaiting;
+                    }
+                #endif /* configUSE_QUEUE_SETS */
+            }
+            else
+            {
+                /* Increment the lock count so the task that unlocks the queue
+                 * knows that data was posted while it was locked. */
+                configASSERT( cTxLock != queueINT8_MAX );
 
-	return xReturn;
+                pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
+            }
+
+            xReturn = pdPASS;
+        }
+        else
+        {
+            traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
+            xReturn = errQUEUE_FULL;
+        }
+    }
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
-BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue, BaseType_t * const pxHigherPriorityTaskWoken )
+BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue,
+                              BaseType_t * const pxHigherPriorityTaskWoken )
 {
-BaseType_t xReturn;
-UBaseType_t uxSavedInterruptStatus;
-Queue_t * const pxQueue = xQueue;
+    BaseType_t xReturn;
+    UBaseType_t uxSavedInterruptStatus;
+    Queue_t * const pxQueue = xQueue;
 
-	/* Similar to xQueueGenericSendFromISR() but used with semaphores where the
-	item size is 0.  Don't directly wake a task that was blocked on a queue
-	read, instead return a flag to say whether a context switch is required or
-	not (i.e. has a task with a higher priority than us been woken by this
-	post). */
+    /* Similar to xQueueGenericSendFromISR() but used with semaphores where the
+     * item size is 0.  Don't directly wake a task that was blocked on a queue
+     * read, instead return a flag to say whether a context switch is required or
+     * not (i.e. has a task with a higher priority than us been woken by this
+     * post). */
 
-	configASSERT( pxQueue );
+    configASSERT( pxQueue );
 
-	/* xQueueGenericSendFromISR() should be used instead of xQueueGiveFromISR()
-	if the item size is not 0. */
-	configASSERT( pxQueue->uxItemSize == 0 );
+    /* xQueueGenericSendFromISR() should be used instead of xQueueGiveFromISR()
+     * if the item size is not 0. */
+    configASSERT( pxQueue->uxItemSize == 0 );
 
-	/* Normally a mutex would not be given from an interrupt, especially if
-	there is a mutex holder, as priority inheritance makes no sense for an
-	interrupts, only tasks. */
-	configASSERT( !( ( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) && ( pxQueue->u.xSemaphore.xMutexHolder != NULL ) ) );
+    /* Normally a mutex would not be given from an interrupt, especially if
+     * there is a mutex holder, as priority inheritance makes no sense for an
+     * interrupts, only tasks. */
+    configASSERT( !( ( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) && ( pxQueue->u.xSemaphore.xMutexHolder != NULL ) ) );
 
-	/* RTOS ports that support interrupt nesting have the concept of a maximum
-	system call (or maximum API call) interrupt priority.  Interrupts that are
-	above the maximum system call priority are kept permanently enabled, even
-	when the RTOS kernel is in a critical section, but cannot make any calls to
-	FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
-	then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-	failure if a FreeRTOS API function is called from an interrupt that has been
-	assigned a priority above the configured maximum system call priority.
-	Only FreeRTOS functions that end in FromISR can be called from interrupts
-	that have been assigned a priority at or (logically) below the maximum
-	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
-	safe API to ensure interrupt entry is as fast and as simple as possible.
-	More information (albeit Cortex-M specific) is provided on the following
-	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
-	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+    /* RTOS ports that support interrupt nesting have the concept of a maximum
+     * system call (or maximum API call) interrupt priority.  Interrupts that are
+     * above the maximum system call priority are kept permanently enabled, even
+     * when the RTOS kernel is in a critical section, but cannot make any calls to
+     * FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
+     * then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
+     * failure if a FreeRTOS API function is called from an interrupt that has been
+     * assigned a priority above the configured maximum system call priority.
+     * Only FreeRTOS functions that end in FromISR can be called from interrupts
+     * that have been assigned a priority at or (logically) below the maximum
+     * system call interrupt priority.  FreeRTOS maintains a separate interrupt
+     * safe API to ensure interrupt entry is as fast and as simple as possible.
+     * More information (albeit Cortex-M specific) is provided on the following
+     * link: https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
+    portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 
-	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
+    uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
+    {
+        const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 
-		/* When the queue is used to implement a semaphore no data is ever
-		moved through the queue but it is still valid to see if the queue 'has
-		space'. */
-		if( uxMessagesWaiting < pxQueue->uxLength )
-		{
-			const int8_t cTxLock = pxQueue->cTxLock;
+        /* When the queue is used to implement a semaphore no data is ever
+         * moved through the queue but it is still valid to see if the queue 'has
+         * space'. */
+        if( uxMessagesWaiting < pxQueue->uxLength )
+        {
+            const int8_t cTxLock = pxQueue->cTxLock;
 
-			traceQUEUE_SEND_FROM_ISR( pxQueue );
+            traceQUEUE_SEND_FROM_ISR( pxQueue );
 
-			/* A task can only have an inherited priority if it is a mutex
-			holder - and if there is a mutex holder then the mutex cannot be
-			given from an ISR.  As this is the ISR version of the function it
-			can be assumed there is no mutex holder and no need to determine if
-			priority disinheritance is needed.  Simply increase the count of
-			messages (semaphores) available. */
-			pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
+            /* A task can only have an inherited priority if it is a mutex
+             * holder - and if there is a mutex holder then the mutex cannot be
+             * given from an ISR.  As this is the ISR version of the function it
+             * can be assumed there is no mutex holder and no need to determine if
+             * priority disinheritance is needed.  Simply increase the count of
+             * messages (semaphores) available. */
+            pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
 
-			/* The event list is not altered if the queue is locked.  This will
-			be done when the queue is unlocked later. */
-			if( cTxLock == queueUNLOCKED )
-			{
-				#if ( configUSE_QUEUE_SETS == 1 )
-				{
-					if( pxQueue->pxQueueSetContainer != NULL )
-					{
-						if( prvNotifyQueueSetContainer( pxQueue ) != pdFALSE )
-						{
-							/* The semaphore is a member of a queue set, and
-							posting	to the queue set caused a higher priority
-							task to	unblock.  A context switch is required. */
-							if( pxHigherPriorityTaskWoken != NULL )
-							{
-								*pxHigherPriorityTaskWoken = pdTRUE;
-							}
-							else
-							{
-								mtCOVERAGE_TEST_MARKER();
-							}
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-						{
-							if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-							{
-								/* The task waiting has a higher priority so
-								record that a context switch is required. */
-								if( pxHigherPriorityTaskWoken != NULL )
-								{
-									*pxHigherPriorityTaskWoken = pdTRUE;
-								}
-								else
-								{
-									mtCOVERAGE_TEST_MARKER();
-								}
-							}
-							else
-							{
-								mtCOVERAGE_TEST_MARKER();
-							}
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-				}
-				#else /* configUSE_QUEUE_SETS */
-				{
-					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-					{
-						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-						{
-							/* The task waiting has a higher priority so record that a
-							context	switch is required. */
-							if( pxHigherPriorityTaskWoken != NULL )
-							{
-								*pxHigherPriorityTaskWoken = pdTRUE;
-							}
-							else
-							{
-								mtCOVERAGE_TEST_MARKER();
-							}
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				#endif /* configUSE_QUEUE_SETS */
-			}
-			else
-			{
-				/* Increment the lock count so the task that unlocks the queue
-				knows that data was posted while it was locked. */
-				pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
-			}
+            /* The event list is not altered if the queue is locked.  This will
+             * be done when the queue is unlocked later. */
+            if( cTxLock == queueUNLOCKED )
+            {
+                #if ( configUSE_QUEUE_SETS == 1 )
+                    {
+                        if( pxQueue->pxQueueSetContainer != NULL )
+                        {
+                            if( prvNotifyQueueSetContainer( pxQueue ) != pdFALSE )
+                            {
+                                /* The semaphore is a member of a queue set, and
+                                 * posting to the queue set caused a higher priority
+                                 * task to unblock.  A context switch is required. */
+                                if( pxHigherPriorityTaskWoken != NULL )
+                                {
+                                    *pxHigherPriorityTaskWoken = pdTRUE;
+                                }
+                                else
+                                {
+                                    mtCOVERAGE_TEST_MARKER();
+                                }
+                            }
+                            else
+                            {
+                                mtCOVERAGE_TEST_MARKER();
+                            }
+                        }
+                        else
+                        {
+                            if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+                            {
+                                if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+                                {
+                                    /* The task waiting has a higher priority so
+                                     *  record that a context switch is required. */
+                                    if( pxHigherPriorityTaskWoken != NULL )
+                                    {
+                                        *pxHigherPriorityTaskWoken = pdTRUE;
+                                    }
+                                    else
+                                    {
+                                        mtCOVERAGE_TEST_MARKER();
+                                    }
+                                }
+                                else
+                                {
+                                    mtCOVERAGE_TEST_MARKER();
+                                }
+                            }
+                            else
+                            {
+                                mtCOVERAGE_TEST_MARKER();
+                            }
+                        }
+                    }
+                #else /* configUSE_QUEUE_SETS */
+                    {
+                        if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+                        {
+                            if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+                            {
+                                /* The task waiting has a higher priority so record that a
+                                 * context switch is required. */
+                                if( pxHigherPriorityTaskWoken != NULL )
+                                {
+                                    *pxHigherPriorityTaskWoken = pdTRUE;
+                                }
+                                else
+                                {
+                                    mtCOVERAGE_TEST_MARKER();
+                                }
+                            }
+                            else
+                            {
+                                mtCOVERAGE_TEST_MARKER();
+                            }
+                        }
+                        else
+                        {
+                            mtCOVERAGE_TEST_MARKER();
+                        }
+                    }
+                #endif /* configUSE_QUEUE_SETS */
+            }
+            else
+            {
+                /* Increment the lock count so the task that unlocks the queue
+                 * knows that data was posted while it was locked. */
+                configASSERT( cTxLock != queueINT8_MAX );
 
-			xReturn = pdPASS;
-		}
-		else
-		{
-			traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
-			xReturn = errQUEUE_FULL;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+                pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
+            }
 
-	return xReturn;
+            xReturn = pdPASS;
+        }
+        else
+        {
+            traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
+            xReturn = errQUEUE_FULL;
+        }
+    }
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
-BaseType_t xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait )
+BaseType_t xQueueReceive( QueueHandle_t xQueue,
+                          void * const pvBuffer,
+                          TickType_t xTicksToWait )
 {
-BaseType_t xEntryTimeSet = pdFALSE;
-TimeOut_t xTimeOut;
-Queue_t * const pxQueue = xQueue;
+    BaseType_t xEntryTimeSet = pdFALSE;
+    TimeOut_t xTimeOut;
+    Queue_t * const pxQueue = xQueue;
 
-	/* Check the pointer is not NULL. */
-	configASSERT( ( pxQueue ) );
+    /* Check the pointer is not NULL. */
+    configASSERT( ( pxQueue ) );
 
-	/* The buffer into which data is received can only be NULL if the data size
-	is zero (so no data is copied into the buffer). */
-	configASSERT( !( ( ( pvBuffer ) == NULL ) && ( ( pxQueue )->uxItemSize != ( UBaseType_t ) 0U ) ) );
+    /* The buffer into which data is received can only be NULL if the data size
+     * is zero (so no data is copied into the buffer). */
+    configASSERT( !( ( ( pvBuffer ) == NULL ) && ( ( pxQueue )->uxItemSize != ( UBaseType_t ) 0U ) ) );
 
-	/* Cannot block if the scheduler is suspended. */
-	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
-	{
-		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
-	}
-	#endif
+    /* Cannot block if the scheduler is suspended. */
+    #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
+        {
+            configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
+        }
+    #endif
 
+    /*lint -save -e904  This function relaxes the coding standard somewhat to
+     * allow return statements within the function itself.  This is done in the
+     * interest of execution time efficiency. */
+    for( ; ; )
+    {
+        taskENTER_CRITICAL();
+        {
+            const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 
-	/*lint -save -e904  This function relaxes the coding standard somewhat to
-	allow return statements within the function itself.  This is done in the
-	interest of execution time efficiency. */
-	for( ;; )
-	{
-		taskENTER_CRITICAL();
-		{
-			const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
+            /* Is there data in the queue now?  To be running the calling task
+             * must be the highest priority task wanting to access the queue. */
+            if( uxMessagesWaiting > ( UBaseType_t ) 0 )
+            {
+                /* Data available, remove one item. */
+                prvCopyDataFromQueue( pxQueue, pvBuffer );
+                traceQUEUE_RECEIVE( pxQueue );
+                pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
 
-			/* Is there data in the queue now?  To be running the calling task
-			must be the highest priority task wanting to access the queue. */
-			if( uxMessagesWaiting > ( UBaseType_t ) 0 )
-			{
-				/* Data available, remove one item. */
-				prvCopyDataFromQueue( pxQueue, pvBuffer );
-				traceQUEUE_RECEIVE( pxQueue );
-				pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
+                /* There is now space in the queue, were any tasks waiting to
+                 * post to the queue?  If so, unblock the highest priority waiting
+                 * task. */
+                if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
+                {
+                    if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
+                    {
+                        queueYIELD_IF_USING_PREEMPTION();
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
 
-				/* There is now space in the queue, were any tasks waiting to
-				post to the queue?  If so, unblock the highest priority waiting
-				task. */
-				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
-				{
-					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
-					{
-						queueYIELD_IF_USING_PREEMPTION();
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
+                taskEXIT_CRITICAL();
+                return pdPASS;
+            }
+            else
+            {
+                if( xTicksToWait == ( TickType_t ) 0 )
+                {
+                    /* The queue was empty and no block time is specified (or
+                     * the block time has expired) so leave now. */
+                    taskEXIT_CRITICAL();
+                    traceQUEUE_RECEIVE_FAILED( pxQueue );
+                    return errQUEUE_EMPTY;
+                }
+                else if( xEntryTimeSet == pdFALSE )
+                {
+                    /* The queue was empty and a block time was specified so
+                     * configure the timeout structure. */
+                    vTaskInternalSetTimeOutState( &xTimeOut );
+                    xEntryTimeSet = pdTRUE;
+                }
+                else
+                {
+                    /* Entry time was already set. */
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+        }
+        taskEXIT_CRITICAL();
 
-				taskEXIT_CRITICAL();
-				return pdPASS;
-			}
-			else
-			{
-				if( xTicksToWait == ( TickType_t ) 0 )
-				{
-					/* The queue was empty and no block time is specified (or
-					the block time has expired) so leave now. */
-					taskEXIT_CRITICAL();
-					traceQUEUE_RECEIVE_FAILED( pxQueue );
-					return errQUEUE_EMPTY;
-				}
-				else if( xEntryTimeSet == pdFALSE )
-				{
-					/* The queue was empty and a block time was specified so
-					configure the timeout structure. */
-					vTaskInternalSetTimeOutState( &xTimeOut );
-					xEntryTimeSet = pdTRUE;
-				}
-				else
-				{
-					/* Entry time was already set. */
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-		}
-		taskEXIT_CRITICAL();
+        /* Interrupts and other tasks can send to and receive from the queue
+         * now the critical section has been exited. */
 
-		/* Interrupts and other tasks can send to and receive from the queue
-		now the critical section has been exited. */
+        vTaskSuspendAll();
+        prvLockQueue( pxQueue );
 
-		vTaskSuspendAll();
-		prvLockQueue( pxQueue );
+        /* Update the timeout state to see if it has expired yet. */
+        if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
+        {
+            /* The timeout has not expired.  If the queue is still empty place
+             * the task on the list of tasks waiting to receive from the queue. */
+            if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
+            {
+                traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );
+                vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
+                prvUnlockQueue( pxQueue );
 
-		/* Update the timeout state to see if it has expired yet. */
-		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
-		{
-			/* The timeout has not expired.  If the queue is still empty place
-			the task on the list of tasks waiting to receive from the queue. */
-			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
-			{
-				traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );
-				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
-				prvUnlockQueue( pxQueue );
-				if( xTaskResumeAll() == pdFALSE )
-				{
-					portYIELD_WITHIN_API();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				/* The queue contains data again.  Loop back to try and read the
-				data. */
-				prvUnlockQueue( pxQueue );
-				( void ) xTaskResumeAll();
-			}
-		}
-		else
-		{
-			/* Timed out.  If there is no data in the queue exit, otherwise loop
-			back and attempt to read the data. */
-			prvUnlockQueue( pxQueue );
-			( void ) xTaskResumeAll();
+                if( xTaskResumeAll() == pdFALSE )
+                {
+                    portYIELD_WITHIN_API();
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+            else
+            {
+                /* The queue contains data again.  Loop back to try and read the
+                 * data. */
+                prvUnlockQueue( pxQueue );
+                ( void ) xTaskResumeAll();
+            }
+        }
+        else
+        {
+            /* Timed out.  If there is no data in the queue exit, otherwise loop
+             * back and attempt to read the data. */
+            prvUnlockQueue( pxQueue );
+            ( void ) xTaskResumeAll();
 
-			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
-			{
-				traceQUEUE_RECEIVE_FAILED( pxQueue );
-				return errQUEUE_EMPTY;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-	} /*lint -restore */
+            if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
+            {
+                traceQUEUE_RECEIVE_FAILED( pxQueue );
+                return errQUEUE_EMPTY;
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+    } /*lint -restore */
 }
 /*-----------------------------------------------------------*/
 
-BaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait )
+BaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue,
+                                TickType_t xTicksToWait )
 {
-BaseType_t xEntryTimeSet = pdFALSE;
-TimeOut_t xTimeOut;
-Queue_t * const pxQueue = xQueue;
+    BaseType_t xEntryTimeSet = pdFALSE;
+    TimeOut_t xTimeOut;
+    Queue_t * const pxQueue = xQueue;
 
-#if( configUSE_MUTEXES == 1 )
-	BaseType_t xInheritanceOccurred = pdFALSE;
-#endif
+    #if ( configUSE_MUTEXES == 1 )
+        BaseType_t xInheritanceOccurred = pdFALSE;
+    #endif
 
-	/* Check the queue pointer is not NULL. */
-	configASSERT( ( pxQueue ) );
+    /* Check the queue pointer is not NULL. */
+    configASSERT( ( pxQueue ) );
 
-	/* Check this really is a semaphore, in which case the item size will be
-	0. */
-	configASSERT( pxQueue->uxItemSize == 0 );
+    /* Check this really is a semaphore, in which case the item size will be
+     * 0. */
+    configASSERT( pxQueue->uxItemSize == 0 );
 
-	/* Cannot block if the scheduler is suspended. */
-	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
-	{
-		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
-	}
-	#endif
+    /* Cannot block if the scheduler is suspended. */
+    #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
+        {
+            configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
+        }
+    #endif
 
+    /*lint -save -e904 This function relaxes the coding standard somewhat to allow return
+     * statements within the function itself.  This is done in the interest
+     * of execution time efficiency. */
+    for( ; ; )
+    {
+        taskENTER_CRITICAL();
+        {
+            /* Semaphores are queues with an item size of 0, and where the
+             * number of messages in the queue is the semaphore's count value. */
+            const UBaseType_t uxSemaphoreCount = pxQueue->uxMessagesWaiting;
 
-	/*lint -save -e904 This function relaxes the coding standard somewhat to allow return
-	statements within the function itself.  This is done in the interest
-	of execution time efficiency. */
-	for( ;; )
-	{
-		taskENTER_CRITICAL();
-		{
-			/* Semaphores are queues with an item size of 0, and where the
-			number of messages in the queue is the semaphore's count value. */
-			const UBaseType_t uxSemaphoreCount = pxQueue->uxMessagesWaiting;
+            /* Is there data in the queue now?  To be running the calling task
+             * must be the highest priority task wanting to access the queue. */
+            if( uxSemaphoreCount > ( UBaseType_t ) 0 )
+            {
+                traceQUEUE_RECEIVE( pxQueue );
 
-			/* Is there data in the queue now?  To be running the calling task
-			must be the highest priority task wanting to access the queue. */
-			if( uxSemaphoreCount > ( UBaseType_t ) 0 )
-			{
-				traceQUEUE_RECEIVE( pxQueue );
+                /* Semaphores are queues with a data size of zero and where the
+                 * messages waiting is the semaphore's count.  Reduce the count. */
+                pxQueue->uxMessagesWaiting = uxSemaphoreCount - ( UBaseType_t ) 1;
 
-				/* Semaphores are queues with a data size of zero and where the
-				messages waiting is the semaphore's count.  Reduce the count. */
-				pxQueue->uxMessagesWaiting = uxSemaphoreCount - ( UBaseType_t ) 1;
+                #if ( configUSE_MUTEXES == 1 )
+                    {
+                        if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
+                        {
+                            /* Record the information required to implement
+                             * priority inheritance should it become necessary. */
+                            pxQueue->u.xSemaphore.xMutexHolder = pvTaskIncrementMutexHeldCount();
+                        }
+                        else
+                        {
+                            mtCOVERAGE_TEST_MARKER();
+                        }
+                    }
+                #endif /* configUSE_MUTEXES */
 
-				#if ( configUSE_MUTEXES == 1 )
-				{
-					if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
-					{
-						/* Record the information required to implement
-						priority inheritance should it become necessary. */
-						pxQueue->u.xSemaphore.xMutexHolder = pvTaskIncrementMutexHeldCount();
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				#endif /* configUSE_MUTEXES */
+                /* Check to see if other tasks are blocked waiting to give the
+                 * semaphore, and if so, unblock the highest priority such task. */
+                if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
+                {
+                    if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
+                    {
+                        queueYIELD_IF_USING_PREEMPTION();
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
 
-				/* Check to see if other tasks are blocked waiting to give the
-				semaphore, and if so, unblock the highest priority such task. */
-				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
-				{
-					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
-					{
-						queueYIELD_IF_USING_PREEMPTION();
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
+                taskEXIT_CRITICAL();
+                return pdPASS;
+            }
+            else
+            {
+                if( xTicksToWait == ( TickType_t ) 0 )
+                {
+                    /* For inheritance to have occurred there must have been an
+                     * initial timeout, and an adjusted timeout cannot become 0, as
+                     * if it were 0 the function would have exited. */
+                    #if ( configUSE_MUTEXES == 1 )
+                        {
+                            configASSERT( xInheritanceOccurred == pdFALSE );
+                        }
+                    #endif /* configUSE_MUTEXES */
 
-				taskEXIT_CRITICAL();
-				return pdPASS;
-			}
-			else
-			{
-				if( xTicksToWait == ( TickType_t ) 0 )
-				{
-					/* For inheritance to have occurred there must have been an
-					initial timeout, and an adjusted timeout cannot become 0, as
-					if it were 0 the function would have exited. */
-					#if( configUSE_MUTEXES == 1 )
-					{
-						configASSERT( xInheritanceOccurred == pdFALSE );
-					}
-					#endif /* configUSE_MUTEXES */
+                    /* The semaphore count was 0 and no block time is specified
+                     * (or the block time has expired) so exit now. */
+                    taskEXIT_CRITICAL();
+                    traceQUEUE_RECEIVE_FAILED( pxQueue );
+                    return errQUEUE_EMPTY;
+                }
+                else if( xEntryTimeSet == pdFALSE )
+                {
+                    /* The semaphore count was 0 and a block time was specified
+                     * so configure the timeout structure ready to block. */
+                    vTaskInternalSetTimeOutState( &xTimeOut );
+                    xEntryTimeSet = pdTRUE;
+                }
+                else
+                {
+                    /* Entry time was already set. */
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+        }
+        taskEXIT_CRITICAL();
 
-					/* The semaphore count was 0 and no block time is specified
-					(or the block time has expired) so exit now. */
-					taskEXIT_CRITICAL();
-					traceQUEUE_RECEIVE_FAILED( pxQueue );
-					return errQUEUE_EMPTY;
-				}
-				else if( xEntryTimeSet == pdFALSE )
-				{
-					/* The semaphore count was 0 and a block time was specified
-					so configure the timeout structure ready to block. */
-					vTaskInternalSetTimeOutState( &xTimeOut );
-					xEntryTimeSet = pdTRUE;
-				}
-				else
-				{
-					/* Entry time was already set. */
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-		}
-		taskEXIT_CRITICAL();
+        /* Interrupts and other tasks can give to and take from the semaphore
+         * now the critical section has been exited. */
 
-		/* Interrupts and other tasks can give to and take from the semaphore
-		now the critical section has been exited. */
+        vTaskSuspendAll();
+        prvLockQueue( pxQueue );
 
-		vTaskSuspendAll();
-		prvLockQueue( pxQueue );
+        /* Update the timeout state to see if it has expired yet. */
+        if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
+        {
+            /* A block time is specified and not expired.  If the semaphore
+             * count is 0 then enter the Blocked state to wait for a semaphore to
+             * become available.  As semaphores are implemented with queues the
+             * queue being empty is equivalent to the semaphore count being 0. */
+            if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
+            {
+                traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );
 
-		/* Update the timeout state to see if it has expired yet. */
-		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
-		{
-			/* A block time is specified and not expired.  If the semaphore
-			count is 0 then enter the Blocked state to wait for a semaphore to
-			become available.  As semaphores are implemented with queues the
-			queue being empty is equivalent to the semaphore count being 0. */
-			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
-			{
-				traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );
+                #if ( configUSE_MUTEXES == 1 )
+                    {
+                        if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
+                        {
+                            taskENTER_CRITICAL();
+                            {
+                                xInheritanceOccurred = xTaskPriorityInherit( pxQueue->u.xSemaphore.xMutexHolder );
+                            }
+                            taskEXIT_CRITICAL();
+                        }
+                        else
+                        {
+                            mtCOVERAGE_TEST_MARKER();
+                        }
+                    }
+                #endif /* if ( configUSE_MUTEXES == 1 ) */
 
-				#if ( configUSE_MUTEXES == 1 )
-				{
-					if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
-					{
-						taskENTER_CRITICAL();
-						{
-							xInheritanceOccurred = xTaskPriorityInherit( pxQueue->u.xSemaphore.xMutexHolder );
-						}
-						taskEXIT_CRITICAL();
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				#endif
+                vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
+                prvUnlockQueue( pxQueue );
 
-				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
-				prvUnlockQueue( pxQueue );
-				if( xTaskResumeAll() == pdFALSE )
-				{
-					portYIELD_WITHIN_API();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				/* There was no timeout and the semaphore count was not 0, so
-				attempt to take the semaphore again. */
-				prvUnlockQueue( pxQueue );
-				( void ) xTaskResumeAll();
-			}
-		}
-		else
-		{
-			/* Timed out. */
-			prvUnlockQueue( pxQueue );
-			( void ) xTaskResumeAll();
+                if( xTaskResumeAll() == pdFALSE )
+                {
+                    portYIELD_WITHIN_API();
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+            else
+            {
+                /* There was no timeout and the semaphore count was not 0, so
+                 * attempt to take the semaphore again. */
+                prvUnlockQueue( pxQueue );
+                ( void ) xTaskResumeAll();
+            }
+        }
+        else
+        {
+            /* Timed out. */
+            prvUnlockQueue( pxQueue );
+            ( void ) xTaskResumeAll();
 
-			/* If the semaphore count is 0 exit now as the timeout has
-			expired.  Otherwise return to attempt to take the semaphore that is
-			known to be available.  As semaphores are implemented by queues the
-			queue being empty is equivalent to the semaphore count being 0. */
-			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
-			{
-				#if ( configUSE_MUTEXES == 1 )
-				{
-					/* xInheritanceOccurred could only have be set if
-					pxQueue->uxQueueType == queueQUEUE_IS_MUTEX so no need to
-					test the mutex type again to check it is actually a mutex. */
-					if( xInheritanceOccurred != pdFALSE )
-					{
-						taskENTER_CRITICAL();
-						{
-							UBaseType_t uxHighestWaitingPriority;
+            /* If the semaphore count is 0 exit now as the timeout has
+             * expired.  Otherwise return to attempt to take the semaphore that is
+             * known to be available.  As semaphores are implemented by queues the
+             * queue being empty is equivalent to the semaphore count being 0. */
+            if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
+            {
+                #if ( configUSE_MUTEXES == 1 )
+                    {
+                        /* xInheritanceOccurred could only have be set if
+                         * pxQueue->uxQueueType == queueQUEUE_IS_MUTEX so no need to
+                         * test the mutex type again to check it is actually a mutex. */
+                        if( xInheritanceOccurred != pdFALSE )
+                        {
+                            taskENTER_CRITICAL();
+                            {
+                                UBaseType_t uxHighestWaitingPriority;
 
-							/* This task blocking on the mutex caused another
-							task to inherit this task's priority.  Now this task
-							has timed out the priority should be disinherited
-							again, but only as low as the next highest priority
-							task that is waiting for the same mutex. */
-							uxHighestWaitingPriority = prvGetDisinheritPriorityAfterTimeout( pxQueue );
-							vTaskPriorityDisinheritAfterTimeout( pxQueue->u.xSemaphore.xMutexHolder, uxHighestWaitingPriority );
-						}
-						taskEXIT_CRITICAL();
-					}
-				}
-				#endif /* configUSE_MUTEXES */
+                                /* This task blocking on the mutex caused another
+                                 * task to inherit this task's priority.  Now this task
+                                 * has timed out the priority should be disinherited
+                                 * again, but only as low as the next highest priority
+                                 * task that is waiting for the same mutex. */
+                                uxHighestWaitingPriority = prvGetDisinheritPriorityAfterTimeout( pxQueue );
+                                vTaskPriorityDisinheritAfterTimeout( pxQueue->u.xSemaphore.xMutexHolder, uxHighestWaitingPriority );
+                            }
+                            taskEXIT_CRITICAL();
+                        }
+                    }
+                #endif /* configUSE_MUTEXES */
 
-				traceQUEUE_RECEIVE_FAILED( pxQueue );
-				return errQUEUE_EMPTY;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-	} /*lint -restore */
+                traceQUEUE_RECEIVE_FAILED( pxQueue );
+                return errQUEUE_EMPTY;
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+    } /*lint -restore */
 }
 /*-----------------------------------------------------------*/
 
-BaseType_t xQueuePeek( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait )
+BaseType_t xQueuePeek( QueueHandle_t xQueue,
+                       void * const pvBuffer,
+                       TickType_t xTicksToWait )
 {
-BaseType_t xEntryTimeSet = pdFALSE;
-TimeOut_t xTimeOut;
-int8_t *pcOriginalReadPosition;
-Queue_t * const pxQueue = xQueue;
+    BaseType_t xEntryTimeSet = pdFALSE;
+    TimeOut_t xTimeOut;
+    int8_t * pcOriginalReadPosition;
+    Queue_t * const pxQueue = xQueue;
 
-	/* Check the pointer is not NULL. */
-	configASSERT( ( pxQueue ) );
+    /* Check the pointer is not NULL. */
+    configASSERT( ( pxQueue ) );
 
-	/* The buffer into which data is received can only be NULL if the data size
-	is zero (so no data is copied into the buffer. */
-	configASSERT( !( ( ( pvBuffer ) == NULL ) && ( ( pxQueue )->uxItemSize != ( UBaseType_t ) 0U ) ) );
+    /* The buffer into which data is received can only be NULL if the data size
+     * is zero (so no data is copied into the buffer. */
+    configASSERT( !( ( ( pvBuffer ) == NULL ) && ( ( pxQueue )->uxItemSize != ( UBaseType_t ) 0U ) ) );
 
-	/* Cannot block if the scheduler is suspended. */
-	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
-	{
-		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
-	}
-	#endif
+    /* Cannot block if the scheduler is suspended. */
+    #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
+        {
+            configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
+        }
+    #endif
 
+    /*lint -save -e904  This function relaxes the coding standard somewhat to
+     * allow return statements within the function itself.  This is done in the
+     * interest of execution time efficiency. */
+    for( ; ; )
+    {
+        taskENTER_CRITICAL();
+        {
+            const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 
-	/*lint -save -e904  This function relaxes the coding standard somewhat to
-	allow return statements within the function itself.  This is done in the
-	interest of execution time efficiency. */
-	for( ;; )
-	{
-		taskENTER_CRITICAL();
-		{
-			const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
+            /* Is there data in the queue now?  To be running the calling task
+             * must be the highest priority task wanting to access the queue. */
+            if( uxMessagesWaiting > ( UBaseType_t ) 0 )
+            {
+                /* Remember the read position so it can be reset after the data
+                 * is read from the queue as this function is only peeking the
+                 * data, not removing it. */
+                pcOriginalReadPosition = pxQueue->u.xQueue.pcReadFrom;
 
-			/* Is there data in the queue now?  To be running the calling task
-			must be the highest priority task wanting to access the queue. */
-			if( uxMessagesWaiting > ( UBaseType_t ) 0 )
-			{
-				/* Remember the read position so it can be reset after the data
-				is read from the queue as this function is only peeking the
-				data, not removing it. */
-				pcOriginalReadPosition = pxQueue->u.xQueue.pcReadFrom;
+                prvCopyDataFromQueue( pxQueue, pvBuffer );
+                traceQUEUE_PEEK( pxQueue );
 
-				prvCopyDataFromQueue( pxQueue, pvBuffer );
-				traceQUEUE_PEEK( pxQueue );
+                /* The data is not being removed, so reset the read pointer. */
+                pxQueue->u.xQueue.pcReadFrom = pcOriginalReadPosition;
 
-				/* The data is not being removed, so reset the read pointer. */
-				pxQueue->u.xQueue.pcReadFrom = pcOriginalReadPosition;
+                /* The data is being left in the queue, so see if there are
+                 * any other tasks waiting for the data. */
+                if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+                {
+                    if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+                    {
+                        /* The task waiting has a higher priority than this task. */
+                        queueYIELD_IF_USING_PREEMPTION();
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
 
-				/* The data is being left in the queue, so see if there are
-				any other tasks waiting for the data. */
-				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-				{
-					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-					{
-						/* The task waiting has a higher priority than this task. */
-						queueYIELD_IF_USING_PREEMPTION();
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
+                taskEXIT_CRITICAL();
+                return pdPASS;
+            }
+            else
+            {
+                if( xTicksToWait == ( TickType_t ) 0 )
+                {
+                    /* The queue was empty and no block time is specified (or
+                     * the block time has expired) so leave now. */
+                    taskEXIT_CRITICAL();
+                    traceQUEUE_PEEK_FAILED( pxQueue );
+                    return errQUEUE_EMPTY;
+                }
+                else if( xEntryTimeSet == pdFALSE )
+                {
+                    /* The queue was empty and a block time was specified so
+                     * configure the timeout structure ready to enter the blocked
+                     * state. */
+                    vTaskInternalSetTimeOutState( &xTimeOut );
+                    xEntryTimeSet = pdTRUE;
+                }
+                else
+                {
+                    /* Entry time was already set. */
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+        }
+        taskEXIT_CRITICAL();
 
-				taskEXIT_CRITICAL();
-				return pdPASS;
-			}
-			else
-			{
-				if( xTicksToWait == ( TickType_t ) 0 )
-				{
-					/* The queue was empty and no block time is specified (or
-					the block time has expired) so leave now. */
-					taskEXIT_CRITICAL();
-					traceQUEUE_PEEK_FAILED( pxQueue );
-					return errQUEUE_EMPTY;
-				}
-				else if( xEntryTimeSet == pdFALSE )
-				{
-					/* The queue was empty and a block time was specified so
-					configure the timeout structure ready to enter the blocked
-					state. */
-					vTaskInternalSetTimeOutState( &xTimeOut );
-					xEntryTimeSet = pdTRUE;
-				}
-				else
-				{
-					/* Entry time was already set. */
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-		}
-		taskEXIT_CRITICAL();
+        /* Interrupts and other tasks can send to and receive from the queue
+         * now the critical section has been exited. */
 
-		/* Interrupts and other tasks can send to and receive from the queue
-		now the critical section has been exited. */
+        vTaskSuspendAll();
+        prvLockQueue( pxQueue );
 
-		vTaskSuspendAll();
-		prvLockQueue( pxQueue );
+        /* Update the timeout state to see if it has expired yet. */
+        if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
+        {
+            /* Timeout has not expired yet, check to see if there is data in the
+            * queue now, and if not enter the Blocked state to wait for data. */
+            if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
+            {
+                traceBLOCKING_ON_QUEUE_PEEK( pxQueue );
+                vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
+                prvUnlockQueue( pxQueue );
 
-		/* Update the timeout state to see if it has expired yet. */
-		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
-		{
-			/* Timeout has not expired yet, check to see if there is data in the
-			queue now, and if not enter the Blocked state to wait for data. */
-			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
-			{
-				traceBLOCKING_ON_QUEUE_PEEK( pxQueue );
-				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
-				prvUnlockQueue( pxQueue );
-				if( xTaskResumeAll() == pdFALSE )
-				{
-					portYIELD_WITHIN_API();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				/* There is data in the queue now, so don't enter the blocked
-				state, instead return to try and obtain the data. */
-				prvUnlockQueue( pxQueue );
-				( void ) xTaskResumeAll();
-			}
-		}
-		else
-		{
-			/* The timeout has expired.  If there is still no data in the queue
-			exit, otherwise go back and try to read the data again. */
-			prvUnlockQueue( pxQueue );
-			( void ) xTaskResumeAll();
+                if( xTaskResumeAll() == pdFALSE )
+                {
+                    portYIELD_WITHIN_API();
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+            else
+            {
+                /* There is data in the queue now, so don't enter the blocked
+                 * state, instead return to try and obtain the data. */
+                prvUnlockQueue( pxQueue );
+                ( void ) xTaskResumeAll();
+            }
+        }
+        else
+        {
+            /* The timeout has expired.  If there is still no data in the queue
+             * exit, otherwise go back and try to read the data again. */
+            prvUnlockQueue( pxQueue );
+            ( void ) xTaskResumeAll();
 
-			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
-			{
-				traceQUEUE_PEEK_FAILED( pxQueue );
-				return errQUEUE_EMPTY;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-	} /*lint -restore */
+            if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
+            {
+                traceQUEUE_PEEK_FAILED( pxQueue );
+                return errQUEUE_EMPTY;
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+    } /*lint -restore */
 }
 /*-----------------------------------------------------------*/
 
-BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, void * const pvBuffer, BaseType_t * const pxHigherPriorityTaskWoken )
+BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue,
+                                 void * const pvBuffer,
+                                 BaseType_t * const pxHigherPriorityTaskWoken )
 {
-BaseType_t xReturn;
-UBaseType_t uxSavedInterruptStatus;
-Queue_t * const pxQueue = xQueue;
+    BaseType_t xReturn;
+    UBaseType_t uxSavedInterruptStatus;
+    Queue_t * const pxQueue = xQueue;
 
-	configASSERT( pxQueue );
-	configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
+    configASSERT( pxQueue );
+    configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
 
-	/* RTOS ports that support interrupt nesting have the concept of a maximum
-	system call (or maximum API call) interrupt priority.  Interrupts that are
-	above the maximum system call priority are kept permanently enabled, even
-	when the RTOS kernel is in a critical section, but cannot make any calls to
-	FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
-	then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-	failure if a FreeRTOS API function is called from an interrupt that has been
-	assigned a priority above the configured maximum system call priority.
-	Only FreeRTOS functions that end in FromISR can be called from interrupts
-	that have been assigned a priority at or (logically) below the maximum
-	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
-	safe API to ensure interrupt entry is as fast and as simple as possible.
-	More information (albeit Cortex-M specific) is provided on the following
-	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
-	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+    /* RTOS ports that support interrupt nesting have the concept of a maximum
+     * system call (or maximum API call) interrupt priority.  Interrupts that are
+     * above the maximum system call priority are kept permanently enabled, even
+     * when the RTOS kernel is in a critical section, but cannot make any calls to
+     * FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
+     * then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
+     * failure if a FreeRTOS API function is called from an interrupt that has been
+     * assigned a priority above the configured maximum system call priority.
+     * Only FreeRTOS functions that end in FromISR can be called from interrupts
+     * that have been assigned a priority at or (logically) below the maximum
+     * system call interrupt priority.  FreeRTOS maintains a separate interrupt
+     * safe API to ensure interrupt entry is as fast and as simple as possible.
+     * More information (albeit Cortex-M specific) is provided on the following
+     * link: https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
+    portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 
-	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
+    uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
+    {
+        const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 
-		/* Cannot block in an ISR, so check there is data available. */
-		if( uxMessagesWaiting > ( UBaseType_t ) 0 )
-		{
-			const int8_t cRxLock = pxQueue->cRxLock;
+        /* Cannot block in an ISR, so check there is data available. */
+        if( uxMessagesWaiting > ( UBaseType_t ) 0 )
+        {
+            const int8_t cRxLock = pxQueue->cRxLock;
 
-			traceQUEUE_RECEIVE_FROM_ISR( pxQueue );
+            traceQUEUE_RECEIVE_FROM_ISR( pxQueue );
 
-			prvCopyDataFromQueue( pxQueue, pvBuffer );
-			pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
+            prvCopyDataFromQueue( pxQueue, pvBuffer );
+            pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
 
-			/* If the queue is locked the event list will not be modified.
-			Instead update the lock count so the task that unlocks the queue
-			will know that an ISR has removed data while the queue was
-			locked. */
-			if( cRxLock == queueUNLOCKED )
-			{
-				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
-				{
-					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
-					{
-						/* The task waiting has a higher priority than us so
-						force a context switch. */
-						if( pxHigherPriorityTaskWoken != NULL )
-						{
-							*pxHigherPriorityTaskWoken = pdTRUE;
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				/* Increment the lock count so the task that unlocks the queue
-				knows that data was removed while it was locked. */
-				pxQueue->cRxLock = ( int8_t ) ( cRxLock + 1 );
-			}
+            /* If the queue is locked the event list will not be modified.
+             * Instead update the lock count so the task that unlocks the queue
+             * will know that an ISR has removed data while the queue was
+             * locked. */
+            if( cRxLock == queueUNLOCKED )
+            {
+                if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
+                {
+                    if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
+                    {
+                        /* The task waiting has a higher priority than us so
+                         * force a context switch. */
+                        if( pxHigherPriorityTaskWoken != NULL )
+                        {
+                            *pxHigherPriorityTaskWoken = pdTRUE;
+                        }
+                        else
+                        {
+                            mtCOVERAGE_TEST_MARKER();
+                        }
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+            else
+            {
+                /* Increment the lock count so the task that unlocks the queue
+                 * knows that data was removed while it was locked. */
+                configASSERT( cRxLock != queueINT8_MAX );
 
-			xReturn = pdPASS;
-		}
-		else
-		{
-			xReturn = pdFAIL;
-			traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue );
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+                pxQueue->cRxLock = ( int8_t ) ( cRxLock + 1 );
+            }
 
-	return xReturn;
+            xReturn = pdPASS;
+        }
+        else
+        {
+            xReturn = pdFAIL;
+            traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue );
+        }
+    }
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
-BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue,  void * const pvBuffer )
+BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue,
+                              void * const pvBuffer )
 {
-BaseType_t xReturn;
-UBaseType_t uxSavedInterruptStatus;
-int8_t *pcOriginalReadPosition;
-Queue_t * const pxQueue = xQueue;
+    BaseType_t xReturn;
+    UBaseType_t uxSavedInterruptStatus;
+    int8_t * pcOriginalReadPosition;
+    Queue_t * const pxQueue = xQueue;
 
-	configASSERT( pxQueue );
-	configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
-	configASSERT( pxQueue->uxItemSize != 0 ); /* Can't peek a semaphore. */
+    configASSERT( pxQueue );
+    configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
+    configASSERT( pxQueue->uxItemSize != 0 ); /* Can't peek a semaphore. */
 
-	/* RTOS ports that support interrupt nesting have the concept of a maximum
-	system call (or maximum API call) interrupt priority.  Interrupts that are
-	above the maximum system call priority are kept permanently enabled, even
-	when the RTOS kernel is in a critical section, but cannot make any calls to
-	FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
-	then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-	failure if a FreeRTOS API function is called from an interrupt that has been
-	assigned a priority above the configured maximum system call priority.
-	Only FreeRTOS functions that end in FromISR can be called from interrupts
-	that have been assigned a priority at or (logically) below the maximum
-	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
-	safe API to ensure interrupt entry is as fast and as simple as possible.
-	More information (albeit Cortex-M specific) is provided on the following
-	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
-	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+    /* RTOS ports that support interrupt nesting have the concept of a maximum
+     * system call (or maximum API call) interrupt priority.  Interrupts that are
+     * above the maximum system call priority are kept permanently enabled, even
+     * when the RTOS kernel is in a critical section, but cannot make any calls to
+     * FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
+     * then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
+     * failure if a FreeRTOS API function is called from an interrupt that has been
+     * assigned a priority above the configured maximum system call priority.
+     * Only FreeRTOS functions that end in FromISR can be called from interrupts
+     * that have been assigned a priority at or (logically) below the maximum
+     * system call interrupt priority.  FreeRTOS maintains a separate interrupt
+     * safe API to ensure interrupt entry is as fast and as simple as possible.
+     * More information (albeit Cortex-M specific) is provided on the following
+     * link: https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
+    portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 
-	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		/* Cannot block in an ISR, so check there is data available. */
-		if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )
-		{
-			traceQUEUE_PEEK_FROM_ISR( pxQueue );
+    uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
+    {
+        /* Cannot block in an ISR, so check there is data available. */
+        if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )
+        {
+            traceQUEUE_PEEK_FROM_ISR( pxQueue );
 
-			/* Remember the read position so it can be reset as nothing is
-			actually being removed from the queue. */
-			pcOriginalReadPosition = pxQueue->u.xQueue.pcReadFrom;
-			prvCopyDataFromQueue( pxQueue, pvBuffer );
-			pxQueue->u.xQueue.pcReadFrom = pcOriginalReadPosition;
+            /* Remember the read position so it can be reset as nothing is
+             * actually being removed from the queue. */
+            pcOriginalReadPosition = pxQueue->u.xQueue.pcReadFrom;
+            prvCopyDataFromQueue( pxQueue, pvBuffer );
+            pxQueue->u.xQueue.pcReadFrom = pcOriginalReadPosition;
 
-			xReturn = pdPASS;
-		}
-		else
-		{
-			xReturn = pdFAIL;
-			traceQUEUE_PEEK_FROM_ISR_FAILED( pxQueue );
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+            xReturn = pdPASS;
+        }
+        else
+        {
+            xReturn = pdFAIL;
+            traceQUEUE_PEEK_FROM_ISR_FAILED( pxQueue );
+        }
+    }
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
 UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue )
 {
-UBaseType_t uxReturn;
+    UBaseType_t uxReturn;
 
-	configASSERT( xQueue );
+    configASSERT( xQueue );
 
-	taskENTER_CRITICAL();
-	{
-		uxReturn = ( ( Queue_t * ) xQueue )->uxMessagesWaiting;
-	}
-	taskEXIT_CRITICAL();
+    taskENTER_CRITICAL();
+    {
+        uxReturn = ( ( Queue_t * ) xQueue )->uxMessagesWaiting;
+    }
+    taskEXIT_CRITICAL();
 
-	return uxReturn;
+    return uxReturn;
 } /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
 /*-----------------------------------------------------------*/
 
 UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue )
 {
-UBaseType_t uxReturn;
-Queue_t * const pxQueue = xQueue;
+    UBaseType_t uxReturn;
+    Queue_t * const pxQueue = xQueue;
 
-	configASSERT( pxQueue );
+    configASSERT( pxQueue );
 
-	taskENTER_CRITICAL();
-	{
-		uxReturn = pxQueue->uxLength - pxQueue->uxMessagesWaiting;
-	}
-	taskEXIT_CRITICAL();
+    taskENTER_CRITICAL();
+    {
+        uxReturn = pxQueue->uxLength - pxQueue->uxMessagesWaiting;
+    }
+    taskEXIT_CRITICAL();
 
-	return uxReturn;
+    return uxReturn;
 } /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
 /*-----------------------------------------------------------*/
 
 UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue )
 {
-UBaseType_t uxReturn;
-Queue_t * const pxQueue = xQueue;
+    UBaseType_t uxReturn;
+    Queue_t * const pxQueue = xQueue;
 
-	configASSERT( pxQueue );
-	uxReturn = pxQueue->uxMessagesWaiting;
+    configASSERT( pxQueue );
+    uxReturn = pxQueue->uxMessagesWaiting;
 
-	return uxReturn;
+    return uxReturn;
 } /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
 /*-----------------------------------------------------------*/
 
 void vQueueDelete( QueueHandle_t xQueue )
 {
-Queue_t * const pxQueue = xQueue;
+    Queue_t * const pxQueue = xQueue;
 
-	configASSERT( pxQueue );
-	traceQUEUE_DELETE( pxQueue );
+    configASSERT( pxQueue );
+    traceQUEUE_DELETE( pxQueue );
 
-	#if ( configQUEUE_REGISTRY_SIZE > 0 )
-	{
-		vQueueUnregisterQueue( pxQueue );
-	}
-	#endif
+    #if ( configQUEUE_REGISTRY_SIZE > 0 )
+        {
+            vQueueUnregisterQueue( pxQueue );
+        }
+    #endif
 
-	#if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) )
-	{
-		/* The queue can only have been allocated dynamically - free it
-		again. */
-		vPortFree( pxQueue );
-	}
-	#elif( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
-	{
-		/* The queue could have been allocated statically or dynamically, so
-		check before attempting to free the memory. */
-		if( pxQueue->ucStaticallyAllocated == ( uint8_t ) pdFALSE )
-		{
-			vPortFree( pxQueue );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	#else
-	{
-		/* The queue must have been statically allocated, so is not going to be
-		deleted.  Avoid compiler warnings about the unused parameter. */
-		( void ) pxQueue;
-	}
-	#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
+    #if ( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) )
+        {
+            /* The queue can only have been allocated dynamically - free it
+             * again. */
+            vPortFree( pxQueue );
+        }
+    #elif ( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
+        {
+            /* The queue could have been allocated statically or dynamically, so
+             * check before attempting to free the memory. */
+            if( pxQueue->ucStaticallyAllocated == ( uint8_t ) pdFALSE )
+            {
+                vPortFree( pxQueue );
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+    #else /* if ( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) ) */
+        {
+            /* The queue must have been statically allocated, so is not going to be
+             * deleted.  Avoid compiler warnings about the unused parameter. */
+            ( void ) pxQueue;
+        }
+    #endif /* configSUPPORT_DYNAMIC_ALLOCATION */
 }
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_TRACE_FACILITY == 1 )
 
-	UBaseType_t uxQueueGetQueueNumber( QueueHandle_t xQueue )
-	{
-		return ( ( Queue_t * ) xQueue )->uxQueueNumber;
-	}
+    UBaseType_t uxQueueGetQueueNumber( QueueHandle_t xQueue )
+    {
+        return ( ( Queue_t * ) xQueue )->uxQueueNumber;
+    }
 
 #endif /* configUSE_TRACE_FACILITY */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_TRACE_FACILITY == 1 )
 
-	void vQueueSetQueueNumber( QueueHandle_t xQueue, UBaseType_t uxQueueNumber )
-	{
-		( ( Queue_t * ) xQueue )->uxQueueNumber = uxQueueNumber;
-	}
+    void vQueueSetQueueNumber( QueueHandle_t xQueue,
+                               UBaseType_t uxQueueNumber )
+    {
+        ( ( Queue_t * ) xQueue )->uxQueueNumber = uxQueueNumber;
+    }
 
 #endif /* configUSE_TRACE_FACILITY */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_TRACE_FACILITY == 1 )
 
-	uint8_t ucQueueGetQueueType( QueueHandle_t xQueue )
-	{
-		return ( ( Queue_t * ) xQueue )->ucQueueType;
-	}
+    uint8_t ucQueueGetQueueType( QueueHandle_t xQueue )
+    {
+        return ( ( Queue_t * ) xQueue )->ucQueueType;
+    }
 
 #endif /* configUSE_TRACE_FACILITY */
 /*-----------------------------------------------------------*/
 
-#if( configUSE_MUTEXES == 1 )
+#if ( configUSE_MUTEXES == 1 )
 
-	static UBaseType_t prvGetDisinheritPriorityAfterTimeout( const Queue_t * const pxQueue )
-	{
-	UBaseType_t uxHighestPriorityOfWaitingTasks;
+    static UBaseType_t prvGetDisinheritPriorityAfterTimeout( const Queue_t * const pxQueue )
+    {
+        UBaseType_t uxHighestPriorityOfWaitingTasks;
 
-		/* If a task waiting for a mutex causes the mutex holder to inherit a
-		priority, but the waiting task times out, then the holder should
-		disinherit the priority - but only down to the highest priority of any
-		other tasks that are waiting for the same mutex.  For this purpose,
-		return the priority of the highest priority task that is waiting for the
-		mutex. */
-		if( listCURRENT_LIST_LENGTH( &( pxQueue->xTasksWaitingToReceive ) ) > 0U )
-		{
-			uxHighestPriorityOfWaitingTasks = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) listGET_ITEM_VALUE_OF_HEAD_ENTRY( &( pxQueue->xTasksWaitingToReceive ) );
-		}
-		else
-		{
-			uxHighestPriorityOfWaitingTasks = tskIDLE_PRIORITY;
-		}
+        /* If a task waiting for a mutex causes the mutex holder to inherit a
+         * priority, but the waiting task times out, then the holder should
+         * disinherit the priority - but only down to the highest priority of any
+         * other tasks that are waiting for the same mutex.  For this purpose,
+         * return the priority of the highest priority task that is waiting for the
+         * mutex. */
+        if( listCURRENT_LIST_LENGTH( &( pxQueue->xTasksWaitingToReceive ) ) > 0U )
+        {
+            uxHighestPriorityOfWaitingTasks = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) listGET_ITEM_VALUE_OF_HEAD_ENTRY( &( pxQueue->xTasksWaitingToReceive ) );
+        }
+        else
+        {
+            uxHighestPriorityOfWaitingTasks = tskIDLE_PRIORITY;
+        }
 
-		return uxHighestPriorityOfWaitingTasks;
-	}
+        return uxHighestPriorityOfWaitingTasks;
+    }
 
 #endif /* configUSE_MUTEXES */
 /*-----------------------------------------------------------*/
 
-static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition )
+static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue,
+                                      const void * pvItemToQueue,
+                                      const BaseType_t xPosition )
 {
-BaseType_t xReturn = pdFALSE;
-UBaseType_t uxMessagesWaiting;
+    BaseType_t xReturn = pdFALSE;
+    UBaseType_t uxMessagesWaiting;
 
-	/* This function is called from a critical section. */
+    /* This function is called from a critical section. */
 
-	uxMessagesWaiting = pxQueue->uxMessagesWaiting;
+    uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 
-	if( pxQueue->uxItemSize == ( UBaseType_t ) 0 )
-	{
-		#if ( configUSE_MUTEXES == 1 )
-		{
-			if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
-			{
-				/* The mutex is no longer being held. */
-				xReturn = xTaskPriorityDisinherit( pxQueue->u.xSemaphore.xMutexHolder );
-				pxQueue->u.xSemaphore.xMutexHolder = NULL;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		#endif /* configUSE_MUTEXES */
-	}
-	else if( xPosition == queueSEND_TO_BACK )
-	{
-		( void ) memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports, plus previous logic ensures a null pointer can only be passed to memcpy() if the copy size is 0.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
-		pxQueue->pcWriteTo += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
-		if( pxQueue->pcWriteTo >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
-		{
-			pxQueue->pcWriteTo = pxQueue->pcHead;
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	else
-	{
-		( void ) memcpy( ( void * ) pxQueue->u.xQueue.pcReadFrom, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e9087 !e418 MISRA exception as the casts are only redundant for some ports.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes.  Assert checks null pointer only used when length is 0. */
-		pxQueue->u.xQueue.pcReadFrom -= pxQueue->uxItemSize;
-		if( pxQueue->u.xQueue.pcReadFrom < pxQueue->pcHead ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
-		{
-			pxQueue->u.xQueue.pcReadFrom = ( pxQueue->u.xQueue.pcTail - pxQueue->uxItemSize );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
+    if( pxQueue->uxItemSize == ( UBaseType_t ) 0 )
+    {
+        #if ( configUSE_MUTEXES == 1 )
+            {
+                if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
+                {
+                    /* The mutex is no longer being held. */
+                    xReturn = xTaskPriorityDisinherit( pxQueue->u.xSemaphore.xMutexHolder );
+                    pxQueue->u.xSemaphore.xMutexHolder = NULL;
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+        #endif /* configUSE_MUTEXES */
+    }
+    else if( xPosition == queueSEND_TO_BACK )
+    {
+        ( void ) memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports, plus previous logic ensures a null pointer can only be passed to memcpy() if the copy size is 0.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
+        pxQueue->pcWriteTo += pxQueue->uxItemSize;                                                       /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
 
-		if( xPosition == queueOVERWRITE )
-		{
-			if( uxMessagesWaiting > ( UBaseType_t ) 0 )
-			{
-				/* An item is not being added but overwritten, so subtract
-				one from the recorded number of items in the queue so when
-				one is added again below the number of recorded items remains
-				correct. */
-				--uxMessagesWaiting;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
+        if( pxQueue->pcWriteTo >= pxQueue->u.xQueue.pcTail )                                             /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
+        {
+            pxQueue->pcWriteTo = pxQueue->pcHead;
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
+    else
+    {
+        ( void ) memcpy( ( void * ) pxQueue->u.xQueue.pcReadFrom, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e9087 !e418 MISRA exception as the casts are only redundant for some ports.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes.  Assert checks null pointer only used when length is 0. */
+        pxQueue->u.xQueue.pcReadFrom -= pxQueue->uxItemSize;
 
-	pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
+        if( pxQueue->u.xQueue.pcReadFrom < pxQueue->pcHead ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
+        {
+            pxQueue->u.xQueue.pcReadFrom = ( pxQueue->u.xQueue.pcTail - pxQueue->uxItemSize );
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
 
-	return xReturn;
+        if( xPosition == queueOVERWRITE )
+        {
+            if( uxMessagesWaiting > ( UBaseType_t ) 0 )
+            {
+                /* An item is not being added but overwritten, so subtract
+                 * one from the recorded number of items in the queue so when
+                 * one is added again below the number of recorded items remains
+                 * correct. */
+                --uxMessagesWaiting;
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
+
+    pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
+
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
-static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer )
+static void prvCopyDataFromQueue( Queue_t * const pxQueue,
+                                  void * const pvBuffer )
 {
-	if( pxQueue->uxItemSize != ( UBaseType_t ) 0 )
-	{
-		pxQueue->u.xQueue.pcReadFrom += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
-		if( pxQueue->u.xQueue.pcReadFrom >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as use of the relational operator is the cleanest solutions. */
-		{
-			pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead;
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-		( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.xQueue.pcReadFrom, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports.  Also previous logic ensures a null pointer can only be passed to memcpy() when the count is 0.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
-	}
+    if( pxQueue->uxItemSize != ( UBaseType_t ) 0 )
+    {
+        pxQueue->u.xQueue.pcReadFrom += pxQueue->uxItemSize;           /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
+
+        if( pxQueue->u.xQueue.pcReadFrom >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as use of the relational operator is the cleanest solutions. */
+        {
+            pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead;
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+
+        ( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.xQueue.pcReadFrom, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports.  Also previous logic ensures a null pointer can only be passed to memcpy() when the count is 0.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
+    }
 }
 /*-----------------------------------------------------------*/
 
 static void prvUnlockQueue( Queue_t * const pxQueue )
 {
-	/* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED. */
+    /* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED. */
 
-	/* The lock counts contains the number of extra data items placed or
-	removed from the queue while the queue was locked.  When a queue is
-	locked items can be added or removed, but the event lists cannot be
-	updated. */
-	taskENTER_CRITICAL();
-	{
-		int8_t cTxLock = pxQueue->cTxLock;
+    /* The lock counts contains the number of extra data items placed or
+     * removed from the queue while the queue was locked.  When a queue is
+     * locked items can be added or removed, but the event lists cannot be
+     * updated. */
+    taskENTER_CRITICAL();
+    {
+        int8_t cTxLock = pxQueue->cTxLock;
 
-		/* See if data was added to the queue while it was locked. */
-		while( cTxLock > queueLOCKED_UNMODIFIED )
-		{
-			/* Data was posted while the queue was locked.  Are any tasks
-			blocked waiting for data to become available? */
-			#if ( configUSE_QUEUE_SETS == 1 )
-			{
-				if( pxQueue->pxQueueSetContainer != NULL )
-				{
-					if( prvNotifyQueueSetContainer( pxQueue ) != pdFALSE )
-					{
-						/* The queue is a member of a queue set, and posting to
-						the queue set caused a higher priority task to unblock.
-						A context switch is required. */
-						vTaskMissedYield();
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					/* Tasks that are removed from the event list will get
-					added to the pending ready list as the scheduler is still
-					suspended. */
-					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-					{
-						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-						{
-							/* The task waiting has a higher priority so record that a
-							context	switch is required. */
-							vTaskMissedYield();
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						break;
-					}
-				}
-			}
-			#else /* configUSE_QUEUE_SETS */
-			{
-				/* Tasks that are removed from the event list will get added to
-				the pending ready list as the scheduler is still suspended. */
-				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-				{
-					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-					{
-						/* The task waiting has a higher priority so record that
-						a context switch is required. */
-						vTaskMissedYield();
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					break;
-				}
-			}
-			#endif /* configUSE_QUEUE_SETS */
+        /* See if data was added to the queue while it was locked. */
+        while( cTxLock > queueLOCKED_UNMODIFIED )
+        {
+            /* Data was posted while the queue was locked.  Are any tasks
+             * blocked waiting for data to become available? */
+            #if ( configUSE_QUEUE_SETS == 1 )
+                {
+                    if( pxQueue->pxQueueSetContainer != NULL )
+                    {
+                        if( prvNotifyQueueSetContainer( pxQueue ) != pdFALSE )
+                        {
+                            /* The queue is a member of a queue set, and posting to
+                             * the queue set caused a higher priority task to unblock.
+                             * A context switch is required. */
+                            vTaskMissedYield();
+                        }
+                        else
+                        {
+                            mtCOVERAGE_TEST_MARKER();
+                        }
+                    }
+                    else
+                    {
+                        /* Tasks that are removed from the event list will get
+                         * added to the pending ready list as the scheduler is still
+                         * suspended. */
+                        if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+                        {
+                            if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+                            {
+                                /* The task waiting has a higher priority so record that a
+                                 * context switch is required. */
+                                vTaskMissedYield();
+                            }
+                            else
+                            {
+                                mtCOVERAGE_TEST_MARKER();
+                            }
+                        }
+                        else
+                        {
+                            break;
+                        }
+                    }
+                }
+            #else /* configUSE_QUEUE_SETS */
+                {
+                    /* Tasks that are removed from the event list will get added to
+                     * the pending ready list as the scheduler is still suspended. */
+                    if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+                    {
+                        if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+                        {
+                            /* The task waiting has a higher priority so record that
+                             * a context switch is required. */
+                            vTaskMissedYield();
+                        }
+                        else
+                        {
+                            mtCOVERAGE_TEST_MARKER();
+                        }
+                    }
+                    else
+                    {
+                        break;
+                    }
+                }
+            #endif /* configUSE_QUEUE_SETS */
 
-			--cTxLock;
-		}
+            --cTxLock;
+        }
 
-		pxQueue->cTxLock = queueUNLOCKED;
-	}
-	taskEXIT_CRITICAL();
+        pxQueue->cTxLock = queueUNLOCKED;
+    }
+    taskEXIT_CRITICAL();
 
-	/* Do the same for the Rx lock. */
-	taskENTER_CRITICAL();
-	{
-		int8_t cRxLock = pxQueue->cRxLock;
+    /* Do the same for the Rx lock. */
+    taskENTER_CRITICAL();
+    {
+        int8_t cRxLock = pxQueue->cRxLock;
 
-		while( cRxLock > queueLOCKED_UNMODIFIED )
-		{
-			if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
-			{
-				if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
-				{
-					vTaskMissedYield();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
+        while( cRxLock > queueLOCKED_UNMODIFIED )
+        {
+            if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
+            {
+                if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
+                {
+                    vTaskMissedYield();
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
 
-				--cRxLock;
-			}
-			else
-			{
-				break;
-			}
-		}
+                --cRxLock;
+            }
+            else
+            {
+                break;
+            }
+        }
 
-		pxQueue->cRxLock = queueUNLOCKED;
-	}
-	taskEXIT_CRITICAL();
+        pxQueue->cRxLock = queueUNLOCKED;
+    }
+    taskEXIT_CRITICAL();
 }
 /*-----------------------------------------------------------*/
 
-static BaseType_t prvIsQueueEmpty( const Queue_t *pxQueue )
+static BaseType_t prvIsQueueEmpty( const Queue_t * pxQueue )
 {
-BaseType_t xReturn;
+    BaseType_t xReturn;
 
-	taskENTER_CRITICAL();
-	{
-		if( pxQueue->uxMessagesWaiting == ( UBaseType_t )  0 )
-		{
-			xReturn = pdTRUE;
-		}
-		else
-		{
-			xReturn = pdFALSE;
-		}
-	}
-	taskEXIT_CRITICAL();
+    taskENTER_CRITICAL();
+    {
+        if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0 )
+        {
+            xReturn = pdTRUE;
+        }
+        else
+        {
+            xReturn = pdFALSE;
+        }
+    }
+    taskEXIT_CRITICAL();
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xQueueIsQueueEmptyFromISR( const QueueHandle_t xQueue )
 {
-BaseType_t xReturn;
-Queue_t * const pxQueue = xQueue;
+    BaseType_t xReturn;
+    Queue_t * const pxQueue = xQueue;
 
-	configASSERT( pxQueue );
-	if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0 )
-	{
-		xReturn = pdTRUE;
-	}
-	else
-	{
-		xReturn = pdFALSE;
-	}
+    configASSERT( pxQueue );
 
-	return xReturn;
+    if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0 )
+    {
+        xReturn = pdTRUE;
+    }
+    else
+    {
+        xReturn = pdFALSE;
+    }
+
+    return xReturn;
 } /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
 /*-----------------------------------------------------------*/
 
-static BaseType_t prvIsQueueFull( const Queue_t *pxQueue )
+static BaseType_t prvIsQueueFull( const Queue_t * pxQueue )
 {
-BaseType_t xReturn;
+    BaseType_t xReturn;
 
-	taskENTER_CRITICAL();
-	{
-		if( pxQueue->uxMessagesWaiting == pxQueue->uxLength )
-		{
-			xReturn = pdTRUE;
-		}
-		else
-		{
-			xReturn = pdFALSE;
-		}
-	}
-	taskEXIT_CRITICAL();
+    taskENTER_CRITICAL();
+    {
+        if( pxQueue->uxMessagesWaiting == pxQueue->uxLength )
+        {
+            xReturn = pdTRUE;
+        }
+        else
+        {
+            xReturn = pdFALSE;
+        }
+    }
+    taskEXIT_CRITICAL();
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue )
 {
-BaseType_t xReturn;
-Queue_t * const pxQueue = xQueue;
+    BaseType_t xReturn;
+    Queue_t * const pxQueue = xQueue;
 
-	configASSERT( pxQueue );
-	if( pxQueue->uxMessagesWaiting == pxQueue->uxLength )
-	{
-		xReturn = pdTRUE;
-	}
-	else
-	{
-		xReturn = pdFALSE;
-	}
+    configASSERT( pxQueue );
 
-	return xReturn;
+    if( pxQueue->uxMessagesWaiting == pxQueue->uxLength )
+    {
+        xReturn = pdTRUE;
+    }
+    else
+    {
+        xReturn = pdFALSE;
+    }
+
+    return xReturn;
 } /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_CO_ROUTINES == 1 )
 
-	BaseType_t xQueueCRSend( QueueHandle_t xQueue, const void *pvItemToQueue, TickType_t xTicksToWait )
-	{
-	BaseType_t xReturn;
-	Queue_t * const pxQueue = xQueue;
+    BaseType_t xQueueCRSend( QueueHandle_t xQueue,
+                             const void * pvItemToQueue,
+                             TickType_t xTicksToWait )
+    {
+        BaseType_t xReturn;
+        Queue_t * const pxQueue = xQueue;
 
-		/* If the queue is already full we may have to block.  A critical section
-		is required to prevent an interrupt removing something from the queue
-		between the check to see if the queue is full and blocking on the queue. */
-		portDISABLE_INTERRUPTS();
-		{
-			if( prvIsQueueFull( pxQueue ) != pdFALSE )
-			{
-				/* The queue is full - do we want to block or just leave without
-				posting? */
-				if( xTicksToWait > ( TickType_t ) 0 )
-				{
-					/* As this is called from a coroutine we cannot block directly, but
-					return indicating that we need to block. */
-					vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToSend ) );
-					portENABLE_INTERRUPTS();
-					return errQUEUE_BLOCKED;
-				}
-				else
-				{
-					portENABLE_INTERRUPTS();
-					return errQUEUE_FULL;
-				}
-			}
-		}
-		portENABLE_INTERRUPTS();
+        /* If the queue is already full we may have to block.  A critical section
+         * is required to prevent an interrupt removing something from the queue
+         * between the check to see if the queue is full and blocking on the queue. */
+        portDISABLE_INTERRUPTS();
+        {
+            if( prvIsQueueFull( pxQueue ) != pdFALSE )
+            {
+                /* The queue is full - do we want to block or just leave without
+                 * posting? */
+                if( xTicksToWait > ( TickType_t ) 0 )
+                {
+                    /* As this is called from a coroutine we cannot block directly, but
+                     * return indicating that we need to block. */
+                    vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToSend ) );
+                    portENABLE_INTERRUPTS();
+                    return errQUEUE_BLOCKED;
+                }
+                else
+                {
+                    portENABLE_INTERRUPTS();
+                    return errQUEUE_FULL;
+                }
+            }
+        }
+        portENABLE_INTERRUPTS();
 
-		portDISABLE_INTERRUPTS();
-		{
-			if( pxQueue->uxMessagesWaiting < pxQueue->uxLength )
-			{
-				/* There is room in the queue, copy the data into the queue. */
-				prvCopyDataToQueue( pxQueue, pvItemToQueue, queueSEND_TO_BACK );
-				xReturn = pdPASS;
+        portDISABLE_INTERRUPTS();
+        {
+            if( pxQueue->uxMessagesWaiting < pxQueue->uxLength )
+            {
+                /* There is room in the queue, copy the data into the queue. */
+                prvCopyDataToQueue( pxQueue, pvItemToQueue, queueSEND_TO_BACK );
+                xReturn = pdPASS;
 
-				/* Were any co-routines waiting for data to become available? */
-				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-				{
-					/* In this instance the co-routine could be placed directly
-					into the ready list as we are within a critical section.
-					Instead the same pending ready list mechanism is used as if
-					the event were caused from within an interrupt. */
-					if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-					{
-						/* The co-routine waiting has a higher priority so record
-						that a yield might be appropriate. */
-						xReturn = errQUEUE_YIELD;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				xReturn = errQUEUE_FULL;
-			}
-		}
-		portENABLE_INTERRUPTS();
+                /* Were any co-routines waiting for data to become available? */
+                if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+                {
+                    /* In this instance the co-routine could be placed directly
+                     * into the ready list as we are within a critical section.
+                     * Instead the same pending ready list mechanism is used as if
+                     * the event were caused from within an interrupt. */
+                    if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+                    {
+                        /* The co-routine waiting has a higher priority so record
+                         * that a yield might be appropriate. */
+                        xReturn = errQUEUE_YIELD;
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+            else
+            {
+                xReturn = errQUEUE_FULL;
+            }
+        }
+        portENABLE_INTERRUPTS();
 
-		return xReturn;
-	}
+        return xReturn;
+    }
 
 #endif /* configUSE_CO_ROUTINES */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_CO_ROUTINES == 1 )
 
-	BaseType_t xQueueCRReceive( QueueHandle_t xQueue, void *pvBuffer, TickType_t xTicksToWait )
-	{
-	BaseType_t xReturn;
-	Queue_t * const pxQueue = xQueue;
+    BaseType_t xQueueCRReceive( QueueHandle_t xQueue,
+                                void * pvBuffer,
+                                TickType_t xTicksToWait )
+    {
+        BaseType_t xReturn;
+        Queue_t * const pxQueue = xQueue;
 
-		/* If the queue is already empty we may have to block.  A critical section
-		is required to prevent an interrupt adding something to the queue
-		between the check to see if the queue is empty and blocking on the queue. */
-		portDISABLE_INTERRUPTS();
-		{
-			if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0 )
-			{
-				/* There are no messages in the queue, do we want to block or just
-				leave with nothing? */
-				if( xTicksToWait > ( TickType_t ) 0 )
-				{
-					/* As this is a co-routine we cannot block directly, but return
-					indicating that we need to block. */
-					vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToReceive ) );
-					portENABLE_INTERRUPTS();
-					return errQUEUE_BLOCKED;
-				}
-				else
-				{
-					portENABLE_INTERRUPTS();
-					return errQUEUE_FULL;
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		portENABLE_INTERRUPTS();
+        /* If the queue is already empty we may have to block.  A critical section
+         * is required to prevent an interrupt adding something to the queue
+         * between the check to see if the queue is empty and blocking on the queue. */
+        portDISABLE_INTERRUPTS();
+        {
+            if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0 )
+            {
+                /* There are no messages in the queue, do we want to block or just
+                 * leave with nothing? */
+                if( xTicksToWait > ( TickType_t ) 0 )
+                {
+                    /* As this is a co-routine we cannot block directly, but return
+                     * indicating that we need to block. */
+                    vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToReceive ) );
+                    portENABLE_INTERRUPTS();
+                    return errQUEUE_BLOCKED;
+                }
+                else
+                {
+                    portENABLE_INTERRUPTS();
+                    return errQUEUE_FULL;
+                }
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        portENABLE_INTERRUPTS();
 
-		portDISABLE_INTERRUPTS();
-		{
-			if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )
-			{
-				/* Data is available from the queue. */
-				pxQueue->u.xQueue.pcReadFrom += pxQueue->uxItemSize;
-				if( pxQueue->u.xQueue.pcReadFrom >= pxQueue->u.xQueue.pcTail )
-				{
-					pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-				--( pxQueue->uxMessagesWaiting );
-				( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.xQueue.pcReadFrom, ( unsigned ) pxQueue->uxItemSize );
+        portDISABLE_INTERRUPTS();
+        {
+            if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )
+            {
+                /* Data is available from the queue. */
+                pxQueue->u.xQueue.pcReadFrom += pxQueue->uxItemSize;
 
-				xReturn = pdPASS;
+                if( pxQueue->u.xQueue.pcReadFrom >= pxQueue->u.xQueue.pcTail )
+                {
+                    pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead;
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
 
-				/* Were any co-routines waiting for space to become available? */
-				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
-				{
-					/* In this instance the co-routine could be placed directly
-					into the ready list as we are within a critical section.
-					Instead the same pending ready list mechanism is used as if
-					the event were caused from within an interrupt. */
-					if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
-					{
-						xReturn = errQUEUE_YIELD;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				xReturn = pdFAIL;
-			}
-		}
-		portENABLE_INTERRUPTS();
+                --( pxQueue->uxMessagesWaiting );
+                ( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.xQueue.pcReadFrom, ( unsigned ) pxQueue->uxItemSize );
 
-		return xReturn;
-	}
+                xReturn = pdPASS;
+
+                /* Were any co-routines waiting for space to become available? */
+                if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
+                {
+                    /* In this instance the co-routine could be placed directly
+                     * into the ready list as we are within a critical section.
+                     * Instead the same pending ready list mechanism is used as if
+                     * the event were caused from within an interrupt. */
+                    if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
+                    {
+                        xReturn = errQUEUE_YIELD;
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+            else
+            {
+                xReturn = pdFAIL;
+            }
+        }
+        portENABLE_INTERRUPTS();
+
+        return xReturn;
+    }
 
 #endif /* configUSE_CO_ROUTINES */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_CO_ROUTINES == 1 )
 
-	BaseType_t xQueueCRSendFromISR( QueueHandle_t xQueue, const void *pvItemToQueue, BaseType_t xCoRoutinePreviouslyWoken )
-	{
-	Queue_t * const pxQueue = xQueue;
+    BaseType_t xQueueCRSendFromISR( QueueHandle_t xQueue,
+                                    const void * pvItemToQueue,
+                                    BaseType_t xCoRoutinePreviouslyWoken )
+    {
+        Queue_t * const pxQueue = xQueue;
 
-		/* Cannot block within an ISR so if there is no space on the queue then
-		exit without doing anything. */
-		if( pxQueue->uxMessagesWaiting < pxQueue->uxLength )
-		{
-			prvCopyDataToQueue( pxQueue, pvItemToQueue, queueSEND_TO_BACK );
+        /* Cannot block within an ISR so if there is no space on the queue then
+         * exit without doing anything. */
+        if( pxQueue->uxMessagesWaiting < pxQueue->uxLength )
+        {
+            prvCopyDataToQueue( pxQueue, pvItemToQueue, queueSEND_TO_BACK );
 
-			/* We only want to wake one co-routine per ISR, so check that a
-			co-routine has not already been woken. */
-			if( xCoRoutinePreviouslyWoken == pdFALSE )
-			{
-				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-				{
-					if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-					{
-						return pdTRUE;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
+            /* We only want to wake one co-routine per ISR, so check that a
+             * co-routine has not already been woken. */
+            if( xCoRoutinePreviouslyWoken == pdFALSE )
+            {
+                if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+                {
+                    if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+                    {
+                        return pdTRUE;
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
 
-		return xCoRoutinePreviouslyWoken;
-	}
+        return xCoRoutinePreviouslyWoken;
+    }
 
 #endif /* configUSE_CO_ROUTINES */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_CO_ROUTINES == 1 )
 
-	BaseType_t xQueueCRReceiveFromISR( QueueHandle_t xQueue, void *pvBuffer, BaseType_t *pxCoRoutineWoken )
-	{
-	BaseType_t xReturn;
-	Queue_t * const pxQueue = xQueue;
+    BaseType_t xQueueCRReceiveFromISR( QueueHandle_t xQueue,
+                                       void * pvBuffer,
+                                       BaseType_t * pxCoRoutineWoken )
+    {
+        BaseType_t xReturn;
+        Queue_t * const pxQueue = xQueue;
 
-		/* We cannot block from an ISR, so check there is data available. If
-		not then just leave without doing anything. */
-		if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )
-		{
-			/* Copy the data from the queue. */
-			pxQueue->u.xQueue.pcReadFrom += pxQueue->uxItemSize;
-			if( pxQueue->u.xQueue.pcReadFrom >= pxQueue->u.xQueue.pcTail )
-			{
-				pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-			--( pxQueue->uxMessagesWaiting );
-			( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.xQueue.pcReadFrom, ( unsigned ) pxQueue->uxItemSize );
+        /* We cannot block from an ISR, so check there is data available. If
+         * not then just leave without doing anything. */
+        if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )
+        {
+            /* Copy the data from the queue. */
+            pxQueue->u.xQueue.pcReadFrom += pxQueue->uxItemSize;
 
-			if( ( *pxCoRoutineWoken ) == pdFALSE )
-			{
-				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
-				{
-					if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
-					{
-						*pxCoRoutineWoken = pdTRUE;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
+            if( pxQueue->u.xQueue.pcReadFrom >= pxQueue->u.xQueue.pcTail )
+            {
+                pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead;
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
 
-			xReturn = pdPASS;
-		}
-		else
-		{
-			xReturn = pdFAIL;
-		}
+            --( pxQueue->uxMessagesWaiting );
+            ( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.xQueue.pcReadFrom, ( unsigned ) pxQueue->uxItemSize );
 
-		return xReturn;
-	}
+            if( ( *pxCoRoutineWoken ) == pdFALSE )
+            {
+                if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
+                {
+                    if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
+                    {
+                        *pxCoRoutineWoken = pdTRUE;
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+
+            xReturn = pdPASS;
+        }
+        else
+        {
+            xReturn = pdFAIL;
+        }
+
+        return xReturn;
+    }
 
 #endif /* configUSE_CO_ROUTINES */
 /*-----------------------------------------------------------*/
 
 #if ( configQUEUE_REGISTRY_SIZE > 0 )
 
-	void vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcQueueName ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-	{
-	UBaseType_t ux;
+    void vQueueAddToRegistry( QueueHandle_t xQueue,
+                              const char * pcQueueName ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+    {
+        UBaseType_t ux;
 
-		/* See if there is an empty space in the registry.  A NULL name denotes
-		a free slot. */
-		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
-		{
-			if( xQueueRegistry[ ux ].pcQueueName == NULL )
-			{
-				/* Store the information on this queue. */
-				xQueueRegistry[ ux ].pcQueueName = pcQueueName;
-				xQueueRegistry[ ux ].xHandle = xQueue;
+        /* See if there is an empty space in the registry.  A NULL name denotes
+         * a free slot. */
+        for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
+        {
+            if( xQueueRegistry[ ux ].pcQueueName == NULL )
+            {
+                /* Store the information on this queue. */
+                xQueueRegistry[ ux ].pcQueueName = pcQueueName;
+                xQueueRegistry[ ux ].xHandle = xQueue;
 
-				traceQUEUE_REGISTRY_ADD( xQueue, pcQueueName );
-				break;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-	}
+                traceQUEUE_REGISTRY_ADD( xQueue, pcQueueName );
+                break;
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+    }
 
 #endif /* configQUEUE_REGISTRY_SIZE */
 /*-----------------------------------------------------------*/
 
 #if ( configQUEUE_REGISTRY_SIZE > 0 )
 
-	const char *pcQueueGetName( QueueHandle_t xQueue ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-	{
-	UBaseType_t ux;
-	const char *pcReturn = NULL; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+    const char * pcQueueGetName( QueueHandle_t xQueue ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+    {
+        UBaseType_t ux;
+        const char * pcReturn = NULL; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
-		/* Note there is nothing here to protect against another task adding or
-		removing entries from the registry while it is being searched. */
-		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
-		{
-			if( xQueueRegistry[ ux ].xHandle == xQueue )
-			{
-				pcReturn = xQueueRegistry[ ux ].pcQueueName;
-				break;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
+        /* Note there is nothing here to protect against another task adding or
+         * removing entries from the registry while it is being searched. */
 
-		return pcReturn;
-	} /*lint !e818 xQueue cannot be a pointer to const because it is a typedef. */
+        for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
+        {
+            if( xQueueRegistry[ ux ].xHandle == xQueue )
+            {
+                pcReturn = xQueueRegistry[ ux ].pcQueueName;
+                break;
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+
+        return pcReturn;
+    } /*lint !e818 xQueue cannot be a pointer to const because it is a typedef. */
 
 #endif /* configQUEUE_REGISTRY_SIZE */
 /*-----------------------------------------------------------*/
 
 #if ( configQUEUE_REGISTRY_SIZE > 0 )
 
-	void vQueueUnregisterQueue( QueueHandle_t xQueue )
-	{
-	UBaseType_t ux;
+    void vQueueUnregisterQueue( QueueHandle_t xQueue )
+    {
+        UBaseType_t ux;
 
-		/* See if the handle of the queue being unregistered in actually in the
-		registry. */
-		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
-		{
-			if( xQueueRegistry[ ux ].xHandle == xQueue )
-			{
-				/* Set the name to NULL to show that this slot if free again. */
-				xQueueRegistry[ ux ].pcQueueName = NULL;
+        /* See if the handle of the queue being unregistered in actually in the
+         * registry. */
+        for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
+        {
+            if( xQueueRegistry[ ux ].xHandle == xQueue )
+            {
+                /* Set the name to NULL to show that this slot if free again. */
+                xQueueRegistry[ ux ].pcQueueName = NULL;
 
-				/* Set the handle to NULL to ensure the same queue handle cannot
-				appear in the registry twice if it is added, removed, then
-				added again. */
-				xQueueRegistry[ ux ].xHandle = ( QueueHandle_t ) 0;
-				break;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-
-	} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
+                /* Set the handle to NULL to ensure the same queue handle cannot
+                 * appear in the registry twice if it is added, removed, then
+                 * added again. */
+                xQueueRegistry[ ux ].xHandle = ( QueueHandle_t ) 0;
+                break;
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+    } /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
 
 #endif /* configQUEUE_REGISTRY_SIZE */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_TIMERS == 1 )
 
-	void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
-	{
-	Queue_t * const pxQueue = xQueue;
+    void vQueueWaitForMessageRestricted( QueueHandle_t xQueue,
+                                         TickType_t xTicksToWait,
+                                         const BaseType_t xWaitIndefinitely )
+    {
+        Queue_t * const pxQueue = xQueue;
 
-		/* This function should not be called by application code hence the
-		'Restricted' in its name.  It is not part of the public API.  It is
-		designed for use by kernel code, and has special calling requirements.
-		It can result in vListInsert() being called on a list that can only
-		possibly ever have one item in it, so the list will be fast, but even
-		so it should be called with the scheduler locked and not from a critical
-		section. */
+        /* This function should not be called by application code hence the
+         * 'Restricted' in its name.  It is not part of the public API.  It is
+         * designed for use by kernel code, and has special calling requirements.
+         * It can result in vListInsert() being called on a list that can only
+         * possibly ever have one item in it, so the list will be fast, but even
+         * so it should be called with the scheduler locked and not from a critical
+         * section. */
 
-		/* Only do anything if there are no messages in the queue.  This function
-		will not actually cause the task to block, just place it on a blocked
-		list.  It will not block until the scheduler is unlocked - at which
-		time a yield will be performed.  If an item is added to the queue while
-		the queue is locked, and the calling task blocks on the queue, then the
-		calling task will be immediately unblocked when the queue is unlocked. */
-		prvLockQueue( pxQueue );
-		if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0U )
-		{
-			/* There is nothing in the queue, block for the specified period. */
-			vTaskPlaceOnEventListRestricted( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait, xWaitIndefinitely );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-		prvUnlockQueue( pxQueue );
-	}
+        /* Only do anything if there are no messages in the queue.  This function
+         *  will not actually cause the task to block, just place it on a blocked
+         *  list.  It will not block until the scheduler is unlocked - at which
+         *  time a yield will be performed.  If an item is added to the queue while
+         *  the queue is locked, and the calling task blocks on the queue, then the
+         *  calling task will be immediately unblocked when the queue is unlocked. */
+        prvLockQueue( pxQueue );
+
+        if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0U )
+        {
+            /* There is nothing in the queue, block for the specified period. */
+            vTaskPlaceOnEventListRestricted( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait, xWaitIndefinitely );
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+
+        prvUnlockQueue( pxQueue );
+    }
 
 #endif /* configUSE_TIMERS */
 /*-----------------------------------------------------------*/
 
-#if( ( configUSE_QUEUE_SETS == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
+#if ( ( configUSE_QUEUE_SETS == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
 
-	QueueSetHandle_t xQueueCreateSet( const UBaseType_t uxEventQueueLength )
-	{
-	QueueSetHandle_t pxQueue;
+    QueueSetHandle_t xQueueCreateSet( const UBaseType_t uxEventQueueLength )
+    {
+        QueueSetHandle_t pxQueue;
 
-		pxQueue = xQueueGenericCreate( uxEventQueueLength, ( UBaseType_t ) sizeof( Queue_t * ), queueQUEUE_TYPE_SET );
+        pxQueue = xQueueGenericCreate( uxEventQueueLength, ( UBaseType_t ) sizeof( Queue_t * ), queueQUEUE_TYPE_SET );
 
-		return pxQueue;
-	}
+        return pxQueue;
+    }
 
 #endif /* configUSE_QUEUE_SETS */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_QUEUE_SETS == 1 )
 
-	BaseType_t xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet )
-	{
-	BaseType_t xReturn;
+    BaseType_t xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore,
+                               QueueSetHandle_t xQueueSet )
+    {
+        BaseType_t xReturn;
 
-		taskENTER_CRITICAL();
-		{
-			if( ( ( Queue_t * ) xQueueOrSemaphore )->pxQueueSetContainer != NULL )
-			{
-				/* Cannot add a queue/semaphore to more than one queue set. */
-				xReturn = pdFAIL;
-			}
-			else if( ( ( Queue_t * ) xQueueOrSemaphore )->uxMessagesWaiting != ( UBaseType_t ) 0 )
-			{
-				/* Cannot add a queue/semaphore to a queue set if there are already
-				items in the queue/semaphore. */
-				xReturn = pdFAIL;
-			}
-			else
-			{
-				( ( Queue_t * ) xQueueOrSemaphore )->pxQueueSetContainer = xQueueSet;
-				xReturn = pdPASS;
-			}
-		}
-		taskEXIT_CRITICAL();
+        taskENTER_CRITICAL();
+        {
+            if( ( ( Queue_t * ) xQueueOrSemaphore )->pxQueueSetContainer != NULL )
+            {
+                /* Cannot add a queue/semaphore to more than one queue set. */
+                xReturn = pdFAIL;
+            }
+            else if( ( ( Queue_t * ) xQueueOrSemaphore )->uxMessagesWaiting != ( UBaseType_t ) 0 )
+            {
+                /* Cannot add a queue/semaphore to a queue set if there are already
+                 * items in the queue/semaphore. */
+                xReturn = pdFAIL;
+            }
+            else
+            {
+                ( ( Queue_t * ) xQueueOrSemaphore )->pxQueueSetContainer = xQueueSet;
+                xReturn = pdPASS;
+            }
+        }
+        taskEXIT_CRITICAL();
 
-		return xReturn;
-	}
+        return xReturn;
+    }
 
 #endif /* configUSE_QUEUE_SETS */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_QUEUE_SETS == 1 )
 
-	BaseType_t xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet )
-	{
-	BaseType_t xReturn;
-	Queue_t * const pxQueueOrSemaphore = ( Queue_t * ) xQueueOrSemaphore;
+    BaseType_t xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore,
+                                    QueueSetHandle_t xQueueSet )
+    {
+        BaseType_t xReturn;
+        Queue_t * const pxQueueOrSemaphore = ( Queue_t * ) xQueueOrSemaphore;
 
-		if( pxQueueOrSemaphore->pxQueueSetContainer != xQueueSet )
-		{
-			/* The queue was not a member of the set. */
-			xReturn = pdFAIL;
-		}
-		else if( pxQueueOrSemaphore->uxMessagesWaiting != ( UBaseType_t ) 0 )
-		{
-			/* It is dangerous to remove a queue from a set when the queue is
-			not empty because the queue set will still hold pending events for
-			the queue. */
-			xReturn = pdFAIL;
-		}
-		else
-		{
-			taskENTER_CRITICAL();
-			{
-				/* The queue is no longer contained in the set. */
-				pxQueueOrSemaphore->pxQueueSetContainer = NULL;
-			}
-			taskEXIT_CRITICAL();
-			xReturn = pdPASS;
-		}
+        if( pxQueueOrSemaphore->pxQueueSetContainer != xQueueSet )
+        {
+            /* The queue was not a member of the set. */
+            xReturn = pdFAIL;
+        }
+        else if( pxQueueOrSemaphore->uxMessagesWaiting != ( UBaseType_t ) 0 )
+        {
+            /* It is dangerous to remove a queue from a set when the queue is
+             * not empty because the queue set will still hold pending events for
+             * the queue. */
+            xReturn = pdFAIL;
+        }
+        else
+        {
+            taskENTER_CRITICAL();
+            {
+                /* The queue is no longer contained in the set. */
+                pxQueueOrSemaphore->pxQueueSetContainer = NULL;
+            }
+            taskEXIT_CRITICAL();
+            xReturn = pdPASS;
+        }
 
-		return xReturn;
-	} /*lint !e818 xQueueSet could not be declared as pointing to const as it is a typedef. */
+        return xReturn;
+    } /*lint !e818 xQueueSet could not be declared as pointing to const as it is a typedef. */
 
 #endif /* configUSE_QUEUE_SETS */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_QUEUE_SETS == 1 )
 
-	QueueSetMemberHandle_t xQueueSelectFromSet( QueueSetHandle_t xQueueSet, TickType_t const xTicksToWait )
-	{
-	QueueSetMemberHandle_t xReturn = NULL;
+    QueueSetMemberHandle_t xQueueSelectFromSet( QueueSetHandle_t xQueueSet,
+                                                TickType_t const xTicksToWait )
+    {
+        QueueSetMemberHandle_t xReturn = NULL;
 
-		( void ) xQueueReceive( ( QueueHandle_t ) xQueueSet, &xReturn, xTicksToWait ); /*lint !e961 Casting from one typedef to another is not redundant. */
-		return xReturn;
-	}
+        ( void ) xQueueReceive( ( QueueHandle_t ) xQueueSet, &xReturn, xTicksToWait ); /*lint !e961 Casting from one typedef to another is not redundant. */
+        return xReturn;
+    }
 
 #endif /* configUSE_QUEUE_SETS */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_QUEUE_SETS == 1 )
 
-	QueueSetMemberHandle_t xQueueSelectFromSetFromISR( QueueSetHandle_t xQueueSet )
-	{
-	QueueSetMemberHandle_t xReturn = NULL;
+    QueueSetMemberHandle_t xQueueSelectFromSetFromISR( QueueSetHandle_t xQueueSet )
+    {
+        QueueSetMemberHandle_t xReturn = NULL;
 
-		( void ) xQueueReceiveFromISR( ( QueueHandle_t ) xQueueSet, &xReturn, NULL ); /*lint !e961 Casting from one typedef to another is not redundant. */
-		return xReturn;
-	}
+        ( void ) xQueueReceiveFromISR( ( QueueHandle_t ) xQueueSet, &xReturn, NULL ); /*lint !e961 Casting from one typedef to another is not redundant. */
+        return xReturn;
+    }
 
 #endif /* configUSE_QUEUE_SETS */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_QUEUE_SETS == 1 )
 
-	static BaseType_t prvNotifyQueueSetContainer( const Queue_t * const pxQueue )
-	{
-	Queue_t *pxQueueSetContainer = pxQueue->pxQueueSetContainer;
-	BaseType_t xReturn = pdFALSE;
+    static BaseType_t prvNotifyQueueSetContainer( const Queue_t * const pxQueue )
+    {
+        Queue_t * pxQueueSetContainer = pxQueue->pxQueueSetContainer;
+        BaseType_t xReturn = pdFALSE;
 
-		/* This function must be called form a critical section. */
+        /* This function must be called form a critical section. */
 
-		configASSERT( pxQueueSetContainer );
-		configASSERT( pxQueueSetContainer->uxMessagesWaiting < pxQueueSetContainer->uxLength );
+        configASSERT( pxQueueSetContainer );
+        configASSERT( pxQueueSetContainer->uxMessagesWaiting < pxQueueSetContainer->uxLength );
 
-		if( pxQueueSetContainer->uxMessagesWaiting < pxQueueSetContainer->uxLength )
-		{
-			const int8_t cTxLock = pxQueueSetContainer->cTxLock;
+        if( pxQueueSetContainer->uxMessagesWaiting < pxQueueSetContainer->uxLength )
+        {
+            const int8_t cTxLock = pxQueueSetContainer->cTxLock;
 
-			traceQUEUE_SEND( pxQueueSetContainer );
+            traceQUEUE_SET_SEND( pxQueueSetContainer );
 
-			/* The data copied is the handle of the queue that contains data. */
-			xReturn = prvCopyDataToQueue( pxQueueSetContainer, &pxQueue, queueSEND_TO_BACK );
+            /* The data copied is the handle of the queue that contains data. */
+            xReturn = prvCopyDataToQueue( pxQueueSetContainer, &pxQueue, queueSEND_TO_BACK );
 
-			if( cTxLock == queueUNLOCKED )
-			{
-				if( listLIST_IS_EMPTY( &( pxQueueSetContainer->xTasksWaitingToReceive ) ) == pdFALSE )
-				{
-					if( xTaskRemoveFromEventList( &( pxQueueSetContainer->xTasksWaitingToReceive ) ) != pdFALSE )
-					{
-						/* The task waiting has a higher priority. */
-						xReturn = pdTRUE;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				pxQueueSetContainer->cTxLock = ( int8_t ) ( cTxLock + 1 );
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
+            if( cTxLock == queueUNLOCKED )
+            {
+                if( listLIST_IS_EMPTY( &( pxQueueSetContainer->xTasksWaitingToReceive ) ) == pdFALSE )
+                {
+                    if( xTaskRemoveFromEventList( &( pxQueueSetContainer->xTasksWaitingToReceive ) ) != pdFALSE )
+                    {
+                        /* The task waiting has a higher priority. */
+                        xReturn = pdTRUE;
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+            else
+            {
+                configASSERT( cTxLock != queueINT8_MAX );
 
-		return xReturn;
-	}
+                pxQueueSetContainer->cTxLock = ( int8_t ) ( cTxLock + 1 );
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+
+        return xReturn;
+    }
 
 #endif /* configUSE_QUEUE_SETS */
-
-
-
-
-
-
-
-
-
-
-
-
diff --git a/stream_buffer.c b/stream_buffer.c
index c88e4ea19..8482e68fe 100644
--- a/stream_buffer.c
+++ b/stream_buffer.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,10 +19,9 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /* Standard includes. */
@@ -30,8 +29,8 @@
 #include 
 
 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
-all the API functions to use the MPU wrappers.  That should only be done when
-task.h is included from an application file. */
+ * all the API functions to use the MPU wrappers.  That should only be done when
+ * task.h is included from an application file. */
 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
 /* FreeRTOS includes. */
@@ -39,119 +38,119 @@ task.h is included from an application file. */
 #include "task.h"
 #include "stream_buffer.h"
 
-#if( configUSE_TASK_NOTIFICATIONS != 1 )
-	#error configUSE_TASK_NOTIFICATIONS must be set to 1 to build stream_buffer.c
+#if ( configUSE_TASK_NOTIFICATIONS != 1 )
+    #error configUSE_TASK_NOTIFICATIONS must be set to 1 to build stream_buffer.c
 #endif
 
 /* Lint e961, e9021 and e750 are suppressed as a MISRA exception justified
-because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined
-for the header files above, but not in this file, in order to generate the
-correct privileged Vs unprivileged linkage and placement. */
+ * because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined
+ * for the header files above, but not in this file, in order to generate the
+ * correct privileged Vs unprivileged linkage and placement. */
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750 !e9021. */
 
 /* If the user has not provided application specific Rx notification macros,
-or #defined the notification macros away, them provide default implementations
-that uses task notifications. */
-/*lint -save -e9026 Function like macros allowed and needed here so they can be overidden. */
+ * or #defined the notification macros away, them provide default implementations
+ * that uses task notifications. */
+/*lint -save -e9026 Function like macros allowed and needed here so they can be overridden. */
 #ifndef sbRECEIVE_COMPLETED
-	#define sbRECEIVE_COMPLETED( pxStreamBuffer )										\
-		vTaskSuspendAll();																\
-		{																				\
-			if( ( pxStreamBuffer )->xTaskWaitingToSend != NULL )						\
-			{																			\
-				( void ) xTaskNotify( ( pxStreamBuffer )->xTaskWaitingToSend,			\
-									  ( uint32_t ) 0,									\
-									  eNoAction );										\
-				( pxStreamBuffer )->xTaskWaitingToSend = NULL;							\
-			}																			\
-		}																				\
-		( void ) xTaskResumeAll();
+    #define sbRECEIVE_COMPLETED( pxStreamBuffer )                         \
+    vTaskSuspendAll();                                                    \
+    {                                                                     \
+        if( ( pxStreamBuffer )->xTaskWaitingToSend != NULL )              \
+        {                                                                 \
+            ( void ) xTaskNotify( ( pxStreamBuffer )->xTaskWaitingToSend, \
+                                  ( uint32_t ) 0,                         \
+                                  eNoAction );                            \
+            ( pxStreamBuffer )->xTaskWaitingToSend = NULL;                \
+        }                                                                 \
+    }                                                                     \
+    ( void ) xTaskResumeAll();
 #endif /* sbRECEIVE_COMPLETED */
 
 #ifndef sbRECEIVE_COMPLETED_FROM_ISR
-	#define sbRECEIVE_COMPLETED_FROM_ISR( pxStreamBuffer,								\
-										  pxHigherPriorityTaskWoken )					\
-	{																					\
-	UBaseType_t uxSavedInterruptStatus;													\
-																						\
-		uxSavedInterruptStatus = ( UBaseType_t ) portSET_INTERRUPT_MASK_FROM_ISR();		\
-		{																				\
-			if( ( pxStreamBuffer )->xTaskWaitingToSend != NULL )						\
-			{																			\
-				( void ) xTaskNotifyFromISR( ( pxStreamBuffer )->xTaskWaitingToSend,	\
-											 ( uint32_t ) 0,							\
-											 eNoAction,									\
-											 pxHigherPriorityTaskWoken );				\
-				( pxStreamBuffer )->xTaskWaitingToSend = NULL;							\
-			}																			\
-		}																				\
-		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );					\
-	}
+    #define sbRECEIVE_COMPLETED_FROM_ISR( pxStreamBuffer,                            \
+                                          pxHigherPriorityTaskWoken )                \
+    {                                                                                \
+        UBaseType_t uxSavedInterruptStatus;                                          \
+                                                                                     \
+        uxSavedInterruptStatus = ( UBaseType_t ) portSET_INTERRUPT_MASK_FROM_ISR();  \
+        {                                                                            \
+            if( ( pxStreamBuffer )->xTaskWaitingToSend != NULL )                     \
+            {                                                                        \
+                ( void ) xTaskNotifyFromISR( ( pxStreamBuffer )->xTaskWaitingToSend, \
+                                             ( uint32_t ) 0,                         \
+                                             eNoAction,                              \
+                                             pxHigherPriorityTaskWoken );            \
+                ( pxStreamBuffer )->xTaskWaitingToSend = NULL;                       \
+            }                                                                        \
+        }                                                                            \
+        portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );                 \
+    }
 #endif /* sbRECEIVE_COMPLETED_FROM_ISR */
 
 /* If the user has not provided an application specific Tx notification macro,
-or #defined the notification macro away, them provide a default implementation
-that uses task notifications. */
+ * or #defined the notification macro away, them provide a default implementation
+ * that uses task notifications. */
 #ifndef sbSEND_COMPLETED
-	#define sbSEND_COMPLETED( pxStreamBuffer )											\
-		vTaskSuspendAll();																\
-		{																				\
-			if( ( pxStreamBuffer )->xTaskWaitingToReceive != NULL )						\
-			{																			\
-				( void ) xTaskNotify( ( pxStreamBuffer )->xTaskWaitingToReceive,		\
-									  ( uint32_t ) 0,									\
-									  eNoAction );										\
-				( pxStreamBuffer )->xTaskWaitingToReceive = NULL;						\
-			}																			\
-		}																				\
-		( void ) xTaskResumeAll();
+    #define sbSEND_COMPLETED( pxStreamBuffer )                               \
+    vTaskSuspendAll();                                                       \
+    {                                                                        \
+        if( ( pxStreamBuffer )->xTaskWaitingToReceive != NULL )              \
+        {                                                                    \
+            ( void ) xTaskNotify( ( pxStreamBuffer )->xTaskWaitingToReceive, \
+                                  ( uint32_t ) 0,                            \
+                                  eNoAction );                               \
+            ( pxStreamBuffer )->xTaskWaitingToReceive = NULL;                \
+        }                                                                    \
+    }                                                                        \
+    ( void ) xTaskResumeAll();
 #endif /* sbSEND_COMPLETED */
 
 #ifndef sbSEND_COMPLETE_FROM_ISR
-	#define sbSEND_COMPLETE_FROM_ISR( pxStreamBuffer, pxHigherPriorityTaskWoken )		\
-	{																					\
-	UBaseType_t uxSavedInterruptStatus;													\
-																						\
-		uxSavedInterruptStatus = ( UBaseType_t ) portSET_INTERRUPT_MASK_FROM_ISR();		\
-		{																				\
-			if( ( pxStreamBuffer )->xTaskWaitingToReceive != NULL )						\
-			{																			\
-				( void ) xTaskNotifyFromISR( ( pxStreamBuffer )->xTaskWaitingToReceive,	\
-											 ( uint32_t ) 0,							\
-											 eNoAction,									\
-											 pxHigherPriorityTaskWoken );				\
-				( pxStreamBuffer )->xTaskWaitingToReceive = NULL;						\
-			}																			\
-		}																				\
-		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );					\
-	}
+    #define sbSEND_COMPLETE_FROM_ISR( pxStreamBuffer, pxHigherPriorityTaskWoken )       \
+    {                                                                                   \
+        UBaseType_t uxSavedInterruptStatus;                                             \
+                                                                                        \
+        uxSavedInterruptStatus = ( UBaseType_t ) portSET_INTERRUPT_MASK_FROM_ISR();     \
+        {                                                                               \
+            if( ( pxStreamBuffer )->xTaskWaitingToReceive != NULL )                     \
+            {                                                                           \
+                ( void ) xTaskNotifyFromISR( ( pxStreamBuffer )->xTaskWaitingToReceive, \
+                                             ( uint32_t ) 0,                            \
+                                             eNoAction,                                 \
+                                             pxHigherPriorityTaskWoken );               \
+                ( pxStreamBuffer )->xTaskWaitingToReceive = NULL;                       \
+            }                                                                           \
+        }                                                                               \
+        portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );                    \
+    }
 #endif /* sbSEND_COMPLETE_FROM_ISR */
 /*lint -restore (9026) */
 
 /* The number of bytes used to hold the length of a message in the buffer. */
-#define sbBYTES_TO_STORE_MESSAGE_LENGTH ( sizeof( configMESSAGE_BUFFER_LENGTH_TYPE ) )
+#define sbBYTES_TO_STORE_MESSAGE_LENGTH    ( sizeof( configMESSAGE_BUFFER_LENGTH_TYPE ) )
 
 /* Bits stored in the ucFlags field of the stream buffer. */
-#define sbFLAGS_IS_MESSAGE_BUFFER		( ( uint8_t ) 1 ) /* Set if the stream buffer was created as a message buffer, in which case it holds discrete messages rather than a stream. */
-#define sbFLAGS_IS_STATICALLY_ALLOCATED ( ( uint8_t ) 2 ) /* Set if the stream buffer was created using statically allocated memory. */
+#define sbFLAGS_IS_MESSAGE_BUFFER          ( ( uint8_t ) 1 ) /* Set if the stream buffer was created as a message buffer, in which case it holds discrete messages rather than a stream. */
+#define sbFLAGS_IS_STATICALLY_ALLOCATED    ( ( uint8_t ) 2 ) /* Set if the stream buffer was created using statically allocated memory. */
 
 /*-----------------------------------------------------------*/
 
 /* Structure that hold state information on the buffer. */
-typedef struct StreamBufferDef_t /*lint !e9058 Style convention uses tag. */
+typedef struct StreamBufferDef_t                 /*lint !e9058 Style convention uses tag. */
 {
-	volatile size_t xTail;				/* Index to the next item to read within the buffer. */
-	volatile size_t xHead;				/* Index to the next item to write within the buffer. */
-	size_t xLength;						/* The length of the buffer pointed to by pucBuffer. */
-	size_t xTriggerLevelBytes;			/* The number of bytes that must be in the stream buffer before a task that is waiting for data is unblocked. */
-	volatile TaskHandle_t xTaskWaitingToReceive; /* Holds the handle of a task waiting for data, or NULL if no tasks are waiting. */
-	volatile TaskHandle_t xTaskWaitingToSend;	/* Holds the handle of a task waiting to send data to a message buffer that is full. */
-	uint8_t *pucBuffer;					/* Points to the buffer itself - that is - the RAM that stores the data passed through the buffer. */
-	uint8_t ucFlags;
+    volatile size_t xTail;                       /* Index to the next item to read within the buffer. */
+    volatile size_t xHead;                       /* Index to the next item to write within the buffer. */
+    size_t xLength;                              /* The length of the buffer pointed to by pucBuffer. */
+    size_t xTriggerLevelBytes;                   /* The number of bytes that must be in the stream buffer before a task that is waiting for data is unblocked. */
+    volatile TaskHandle_t xTaskWaitingToReceive; /* Holds the handle of a task waiting for data, or NULL if no tasks are waiting. */
+    volatile TaskHandle_t xTaskWaitingToSend;    /* Holds the handle of a task waiting to send data to a message buffer that is full. */
+    uint8_t * pucBuffer;                         /* Points to the buffer itself - that is - the RAM that stores the data passed through the buffer. */
+    uint8_t ucFlags;
 
-	#if ( configUSE_TRACE_FACILITY == 1 )
-		UBaseType_t uxStreamBufferNumber;		/* Used for tracing purposes. */
-	#endif
+    #if ( configUSE_TRACE_FACILITY == 1 )
+        UBaseType_t uxStreamBufferNumber; /* Used for tracing purposes. */
+    #endif
 } StreamBuffer_t;
 
 /*
@@ -165,7 +164,9 @@ static size_t prvBytesInBuffer( const StreamBuffer_t * const pxStreamBuffer ) PR
  * success case, or 0 if there was not enough space in the buffer (in which case
  * no data is written into the buffer).
  */
-static size_t prvWriteBytesToBuffer( StreamBuffer_t * const pxStreamBuffer, const uint8_t *pucData, size_t xCount ) PRIVILEGED_FUNCTION;
+static size_t prvWriteBytesToBuffer( StreamBuffer_t * const pxStreamBuffer,
+                                     const uint8_t * pucData,
+                                     size_t xCount ) PRIVILEGED_FUNCTION;
 
 /*
  * If the stream buffer is being used as a message buffer, then reads an entire
@@ -174,11 +175,11 @@ static size_t prvWriteBytesToBuffer( StreamBuffer_t * const pxStreamBuffer, cons
  * prvReadBytesFromBuffer() is called to actually extract the bytes from the
  * buffer's data storage area.
  */
-static size_t prvReadMessageFromBuffer( StreamBuffer_t *pxStreamBuffer,
-										void *pvRxData,
-										size_t xBufferLengthBytes,
-										size_t xBytesAvailable,
-										size_t xBytesToStoreMessageLength ) PRIVILEGED_FUNCTION;
+static size_t prvReadMessageFromBuffer( StreamBuffer_t * pxStreamBuffer,
+                                        void * pvRxData,
+                                        size_t xBufferLengthBytes,
+                                        size_t xBytesAvailable,
+                                        size_t xBytesToStoreMessageLength ) PRIVILEGED_FUNCTION;
 
 /*
  * If the stream buffer is being used as a message buffer, then writes an entire
@@ -187,1077 +188,1139 @@ static size_t prvReadMessageFromBuffer( StreamBuffer_t *pxStreamBuffer,
  * prvWriteBytestoBuffer() is called to actually send the bytes to the buffer's
  * data storage area.
  */
-static size_t prvWriteMessageToBuffer(  StreamBuffer_t * const pxStreamBuffer,
-										const void * pvTxData,
-										size_t xDataLengthBytes,
-										size_t xSpace,
-										size_t xRequiredSpace ) PRIVILEGED_FUNCTION;
+static size_t prvWriteMessageToBuffer( StreamBuffer_t * const pxStreamBuffer,
+                                       const void * pvTxData,
+                                       size_t xDataLengthBytes,
+                                       size_t xSpace,
+                                       size_t xRequiredSpace ) PRIVILEGED_FUNCTION;
 
 /*
  * Read xMaxCount bytes from the pxStreamBuffer message buffer and write them
  * to pucData.
  */
-static size_t prvReadBytesFromBuffer( StreamBuffer_t *pxStreamBuffer,
-									  uint8_t *pucData,
-									  size_t xMaxCount,
-									  size_t xBytesAvailable ) PRIVILEGED_FUNCTION;
+static size_t prvReadBytesFromBuffer( StreamBuffer_t * pxStreamBuffer,
+                                      uint8_t * pucData,
+                                      size_t xMaxCount,
+                                      size_t xBytesAvailable ) PRIVILEGED_FUNCTION;
 
 /*
  * Called by both pxStreamBufferCreate() and pxStreamBufferCreateStatic() to
  * initialise the members of the newly created stream buffer structure.
  */
 static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer,
-										  uint8_t * const pucBuffer,
-										  size_t xBufferSizeBytes,
-										  size_t xTriggerLevelBytes,
-										  uint8_t ucFlags ) PRIVILEGED_FUNCTION;
+                                          uint8_t * const pucBuffer,
+                                          size_t xBufferSizeBytes,
+                                          size_t xTriggerLevelBytes,
+                                          uint8_t ucFlags ) PRIVILEGED_FUNCTION;
 
 /*-----------------------------------------------------------*/
 
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
 
-	StreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer )
-	{
-	uint8_t *pucAllocatedMemory;
-	uint8_t ucFlags;
+    StreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes,
+                                                     size_t xTriggerLevelBytes,
+                                                     BaseType_t xIsMessageBuffer )
+    {
+        uint8_t * pucAllocatedMemory;
+        uint8_t ucFlags;
 
-		/* In case the stream buffer is going to be used as a message buffer
-		(that is, it will hold discrete messages with a little meta data that
-		says how big the next message is) check the buffer will be large enough
-		to hold at least one message. */
-		if( xIsMessageBuffer == pdTRUE )
-		{
-			/* Is a message buffer but not statically allocated. */
-			ucFlags = sbFLAGS_IS_MESSAGE_BUFFER;
-			configASSERT( xBufferSizeBytes > sbBYTES_TO_STORE_MESSAGE_LENGTH );
-		}
-		else
-		{
-			/* Not a message buffer and not statically allocated. */
-			ucFlags = 0;
-			configASSERT( xBufferSizeBytes > 0 );
-		}
-		configASSERT( xTriggerLevelBytes <= xBufferSizeBytes );
+        /* In case the stream buffer is going to be used as a message buffer
+         * (that is, it will hold discrete messages with a little meta data that
+         * says how big the next message is) check the buffer will be large enough
+         * to hold at least one message. */
+        if( xIsMessageBuffer == pdTRUE )
+        {
+            /* Is a message buffer but not statically allocated. */
+            ucFlags = sbFLAGS_IS_MESSAGE_BUFFER;
+            configASSERT( xBufferSizeBytes > sbBYTES_TO_STORE_MESSAGE_LENGTH );
+        }
+        else
+        {
+            /* Not a message buffer and not statically allocated. */
+            ucFlags = 0;
+            configASSERT( xBufferSizeBytes > 0 );
+        }
 
-		/* A trigger level of 0 would cause a waiting task to unblock even when
-		the buffer was empty. */
-		if( xTriggerLevelBytes == ( size_t ) 0 )
-		{
-			xTriggerLevelBytes = ( size_t ) 1;
-		}
+        configASSERT( xTriggerLevelBytes <= xBufferSizeBytes );
 
-		/* A stream buffer requires a StreamBuffer_t structure and a buffer.
-		Both are allocated in a single call to pvPortMalloc().  The
-		StreamBuffer_t structure is placed at the start of the allocated memory
-		and the buffer follows immediately after.  The requested size is
-		incremented so the free space is returned as the user would expect -
-		this is a quirk of the implementation that means otherwise the free
-		space would be reported as one byte smaller than would be logically
-		expected. */
-		xBufferSizeBytes++;
-		pucAllocatedMemory = ( uint8_t * ) pvPortMalloc( xBufferSizeBytes + sizeof( StreamBuffer_t ) ); /*lint !e9079 malloc() only returns void*. */
+        /* A trigger level of 0 would cause a waiting task to unblock even when
+         * the buffer was empty. */
+        if( xTriggerLevelBytes == ( size_t ) 0 )
+        {
+            xTriggerLevelBytes = ( size_t ) 1;
+        }
 
-		if( pucAllocatedMemory != NULL )
-		{
-			prvInitialiseNewStreamBuffer( ( StreamBuffer_t * ) pucAllocatedMemory, /* Structure at the start of the allocated memory. */ /*lint !e9087 Safe cast as allocated memory is aligned. */ /*lint !e826 Area is not too small and alignment is guaranteed provided malloc() behaves as expected and returns aligned buffer. */
-										   pucAllocatedMemory + sizeof( StreamBuffer_t ),  /* Storage area follows. */ /*lint !e9016 Indexing past structure valid for uint8_t pointer, also storage area has no alignment requirement. */
-										   xBufferSizeBytes,
-										   xTriggerLevelBytes,
-										   ucFlags );
+        /* A stream buffer requires a StreamBuffer_t structure and a buffer.
+         * Both are allocated in a single call to pvPortMalloc().  The
+         * StreamBuffer_t structure is placed at the start of the allocated memory
+         * and the buffer follows immediately after.  The requested size is
+         * incremented so the free space is returned as the user would expect -
+         * this is a quirk of the implementation that means otherwise the free
+         * space would be reported as one byte smaller than would be logically
+         * expected. */
+        xBufferSizeBytes++;
+        pucAllocatedMemory = ( uint8_t * ) pvPortMalloc( xBufferSizeBytes + sizeof( StreamBuffer_t ) ); /*lint !e9079 malloc() only returns void*. */
 
-			traceSTREAM_BUFFER_CREATE( ( ( StreamBuffer_t * ) pucAllocatedMemory ), xIsMessageBuffer );
-		}
-		else
-		{
-			traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer );
-		}
+        if( pucAllocatedMemory != NULL )
+        {
+            prvInitialiseNewStreamBuffer( ( StreamBuffer_t * ) pucAllocatedMemory,       /* Structure at the start of the allocated memory. */ /*lint !e9087 Safe cast as allocated memory is aligned. */ /*lint !e826 Area is not too small and alignment is guaranteed provided malloc() behaves as expected and returns aligned buffer. */
+                                          pucAllocatedMemory + sizeof( StreamBuffer_t ), /* Storage area follows. */ /*lint !e9016 Indexing past structure valid for uint8_t pointer, also storage area has no alignment requirement. */
+                                          xBufferSizeBytes,
+                                          xTriggerLevelBytes,
+                                          ucFlags );
 
-		return ( StreamBufferHandle_t ) pucAllocatedMemory; /*lint !e9087 !e826 Safe cast as allocated memory is aligned. */
-	}
+            traceSTREAM_BUFFER_CREATE( ( ( StreamBuffer_t * ) pucAllocatedMemory ), xIsMessageBuffer );
+        }
+        else
+        {
+            traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer );
+        }
+
+        return ( StreamBufferHandle_t ) pucAllocatedMemory; /*lint !e9087 !e826 Safe cast as allocated memory is aligned. */
+    }
 
 #endif /* configSUPPORT_DYNAMIC_ALLOCATION */
 /*-----------------------------------------------------------*/
 
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
-	StreamBufferHandle_t xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
-														   size_t xTriggerLevelBytes,
-														   BaseType_t xIsMessageBuffer,
-														   uint8_t * const pucStreamBufferStorageArea,
-														   StaticStreamBuffer_t * const pxStaticStreamBuffer )
-	{
-	StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) pxStaticStreamBuffer; /*lint !e740 !e9087 Safe cast as StaticStreamBuffer_t is opaque Streambuffer_t. */
-	StreamBufferHandle_t xReturn;
-	uint8_t ucFlags;
+    StreamBufferHandle_t xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
+                                                           size_t xTriggerLevelBytes,
+                                                           BaseType_t xIsMessageBuffer,
+                                                           uint8_t * const pucStreamBufferStorageArea,
+                                                           StaticStreamBuffer_t * const pxStaticStreamBuffer )
+    {
+        StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) pxStaticStreamBuffer; /*lint !e740 !e9087 Safe cast as StaticStreamBuffer_t is opaque Streambuffer_t. */
+        StreamBufferHandle_t xReturn;
+        uint8_t ucFlags;
 
-		configASSERT( pucStreamBufferStorageArea );
-		configASSERT( pxStaticStreamBuffer );
-		configASSERT( xTriggerLevelBytes <= xBufferSizeBytes );
+        configASSERT( pucStreamBufferStorageArea );
+        configASSERT( pxStaticStreamBuffer );
+        configASSERT( xTriggerLevelBytes <= xBufferSizeBytes );
 
-		/* A trigger level of 0 would cause a waiting task to unblock even when
-		the buffer was empty. */
-		if( xTriggerLevelBytes == ( size_t ) 0 )
-		{
-			xTriggerLevelBytes = ( size_t ) 1;
-		}
+        /* A trigger level of 0 would cause a waiting task to unblock even when
+         * the buffer was empty. */
+        if( xTriggerLevelBytes == ( size_t ) 0 )
+        {
+            xTriggerLevelBytes = ( size_t ) 1;
+        }
 
-		if( xIsMessageBuffer != pdFALSE )
-		{
-			/* Statically allocated message buffer. */
-			ucFlags = sbFLAGS_IS_MESSAGE_BUFFER | sbFLAGS_IS_STATICALLY_ALLOCATED;
-		}
-		else
-		{
-			/* Statically allocated stream buffer. */
-			ucFlags = sbFLAGS_IS_STATICALLY_ALLOCATED;
-		}
+        if( xIsMessageBuffer != pdFALSE )
+        {
+            /* Statically allocated message buffer. */
+            ucFlags = sbFLAGS_IS_MESSAGE_BUFFER | sbFLAGS_IS_STATICALLY_ALLOCATED;
+        }
+        else
+        {
+            /* Statically allocated stream buffer. */
+            ucFlags = sbFLAGS_IS_STATICALLY_ALLOCATED;
+        }
 
-		/* In case the stream buffer is going to be used as a message buffer
-		(that is, it will hold discrete messages with a little meta data that
-		says how big the next message is) check the buffer will be large enough
-		to hold at least one message. */
-		configASSERT( xBufferSizeBytes > sbBYTES_TO_STORE_MESSAGE_LENGTH );
+        /* In case the stream buffer is going to be used as a message buffer
+         * (that is, it will hold discrete messages with a little meta data that
+         * says how big the next message is) check the buffer will be large enough
+         * to hold at least one message. */
+        configASSERT( xBufferSizeBytes > sbBYTES_TO_STORE_MESSAGE_LENGTH );
 
-		#if( configASSERT_DEFINED == 1 )
-		{
-			/* Sanity check that the size of the structure used to declare a
-			variable of type StaticStreamBuffer_t equals the size of the real
-			message buffer structure. */
-			volatile size_t xSize = sizeof( StaticStreamBuffer_t );
-			configASSERT( xSize == sizeof( StreamBuffer_t ) );
-		} /*lint !e529 xSize is referenced is configASSERT() is defined. */
-		#endif /* configASSERT_DEFINED */
+        #if ( configASSERT_DEFINED == 1 )
+            {
+                /* Sanity check that the size of the structure used to declare a
+                 * variable of type StaticStreamBuffer_t equals the size of the real
+                 * message buffer structure. */
+                volatile size_t xSize = sizeof( StaticStreamBuffer_t );
+                configASSERT( xSize == sizeof( StreamBuffer_t ) );
+            } /*lint !e529 xSize is referenced is configASSERT() is defined. */
+        #endif /* configASSERT_DEFINED */
 
-		if( ( pucStreamBufferStorageArea != NULL ) && ( pxStaticStreamBuffer != NULL ) )
-		{
-			prvInitialiseNewStreamBuffer( pxStreamBuffer,
-										  pucStreamBufferStorageArea,
-										  xBufferSizeBytes,
-										  xTriggerLevelBytes,
-										  ucFlags );
+        if( ( pucStreamBufferStorageArea != NULL ) && ( pxStaticStreamBuffer != NULL ) )
+        {
+            prvInitialiseNewStreamBuffer( pxStreamBuffer,
+                                          pucStreamBufferStorageArea,
+                                          xBufferSizeBytes,
+                                          xTriggerLevelBytes,
+                                          ucFlags );
 
-			/* Remember this was statically allocated in case it is ever deleted
-			again. */
-			pxStreamBuffer->ucFlags |= sbFLAGS_IS_STATICALLY_ALLOCATED;
+            /* Remember this was statically allocated in case it is ever deleted
+             * again. */
+            pxStreamBuffer->ucFlags |= sbFLAGS_IS_STATICALLY_ALLOCATED;
 
-			traceSTREAM_BUFFER_CREATE( pxStreamBuffer, xIsMessageBuffer );
+            traceSTREAM_BUFFER_CREATE( pxStreamBuffer, xIsMessageBuffer );
 
-			xReturn = ( StreamBufferHandle_t ) pxStaticStreamBuffer; /*lint !e9087 Data hiding requires cast to opaque type. */
-		}
-		else
-		{
-			xReturn = NULL;
-			traceSTREAM_BUFFER_CREATE_STATIC_FAILED( xReturn, xIsMessageBuffer );
-		}
+            xReturn = ( StreamBufferHandle_t ) pxStaticStreamBuffer; /*lint !e9087 Data hiding requires cast to opaque type. */
+        }
+        else
+        {
+            xReturn = NULL;
+            traceSTREAM_BUFFER_CREATE_STATIC_FAILED( xReturn, xIsMessageBuffer );
+        }
 
-		return xReturn;
-	}
+        return xReturn;
+    }
 
 #endif /* ( configSUPPORT_STATIC_ALLOCATION == 1 ) */
 /*-----------------------------------------------------------*/
 
 void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer )
 {
-StreamBuffer_t * pxStreamBuffer = xStreamBuffer;
+    StreamBuffer_t * pxStreamBuffer = xStreamBuffer;
 
-	configASSERT( pxStreamBuffer );
+    configASSERT( pxStreamBuffer );
 
-	traceSTREAM_BUFFER_DELETE( xStreamBuffer );
+    traceSTREAM_BUFFER_DELETE( xStreamBuffer );
 
-	if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_STATICALLY_ALLOCATED ) == ( uint8_t ) pdFALSE )
-	{
-		#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-		{
-			/* Both the structure and the buffer were allocated using a single call
-			to pvPortMalloc(), hence only one call to vPortFree() is required. */
-			vPortFree( ( void * ) pxStreamBuffer ); /*lint !e9087 Standard free() semantics require void *, plus pxStreamBuffer was allocated by pvPortMalloc(). */
-		}
-		#else
-		{
-			/* Should not be possible to get here, ucFlags must be corrupt.
-			Force an assert. */
-			configASSERT( xStreamBuffer == ( StreamBufferHandle_t ) ~0 );
-		}
-		#endif
-	}
-	else
-	{
-		/* The structure and buffer were not allocated dynamically and cannot be
-		freed - just scrub the structure so future use will assert. */
-		( void ) memset( pxStreamBuffer, 0x00, sizeof( StreamBuffer_t ) );
-	}
+    if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_STATICALLY_ALLOCATED ) == ( uint8_t ) pdFALSE )
+    {
+        #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+            {
+                /* Both the structure and the buffer were allocated using a single call
+                * to pvPortMalloc(), hence only one call to vPortFree() is required. */
+                vPortFree( ( void * ) pxStreamBuffer ); /*lint !e9087 Standard free() semantics require void *, plus pxStreamBuffer was allocated by pvPortMalloc(). */
+            }
+        #else
+            {
+                /* Should not be possible to get here, ucFlags must be corrupt.
+                 * Force an assert. */
+                configASSERT( xStreamBuffer == ( StreamBufferHandle_t ) ~0 );
+            }
+        #endif
+    }
+    else
+    {
+        /* The structure and buffer were not allocated dynamically and cannot be
+         * freed - just scrub the structure so future use will assert. */
+        ( void ) memset( pxStreamBuffer, 0x00, sizeof( StreamBuffer_t ) );
+    }
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer )
 {
-StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
-BaseType_t xReturn = pdFAIL;
+    StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+    BaseType_t xReturn = pdFAIL;
 
-#if( configUSE_TRACE_FACILITY == 1 )
-	UBaseType_t uxStreamBufferNumber;
-#endif
+    #if ( configUSE_TRACE_FACILITY == 1 )
+        UBaseType_t uxStreamBufferNumber;
+    #endif
 
-	configASSERT( pxStreamBuffer );
+    configASSERT( pxStreamBuffer );
 
-	#if( configUSE_TRACE_FACILITY == 1 )
-	{
-		/* Store the stream buffer number so it can be restored after the
-		reset. */
-		uxStreamBufferNumber = pxStreamBuffer->uxStreamBufferNumber;
-	}
-	#endif
+    #if ( configUSE_TRACE_FACILITY == 1 )
+        {
+            /* Store the stream buffer number so it can be restored after the
+             * reset. */
+            uxStreamBufferNumber = pxStreamBuffer->uxStreamBufferNumber;
+        }
+    #endif
 
-	/* Can only reset a message buffer if there are no tasks blocked on it. */
-	taskENTER_CRITICAL();
-	{
-		if( pxStreamBuffer->xTaskWaitingToReceive == NULL )
-		{
-			if( pxStreamBuffer->xTaskWaitingToSend == NULL )
-			{
-				prvInitialiseNewStreamBuffer( pxStreamBuffer,
-											  pxStreamBuffer->pucBuffer,
-											  pxStreamBuffer->xLength,
-											  pxStreamBuffer->xTriggerLevelBytes,
-											  pxStreamBuffer->ucFlags );
-				xReturn = pdPASS;
+    /* Can only reset a message buffer if there are no tasks blocked on it. */
+    taskENTER_CRITICAL();
+    {
+        if( pxStreamBuffer->xTaskWaitingToReceive == NULL )
+        {
+            if( pxStreamBuffer->xTaskWaitingToSend == NULL )
+            {
+                prvInitialiseNewStreamBuffer( pxStreamBuffer,
+                                              pxStreamBuffer->pucBuffer,
+                                              pxStreamBuffer->xLength,
+                                              pxStreamBuffer->xTriggerLevelBytes,
+                                              pxStreamBuffer->ucFlags );
+                xReturn = pdPASS;
 
-				#if( configUSE_TRACE_FACILITY == 1 )
-				{
-					pxStreamBuffer->uxStreamBufferNumber = uxStreamBufferNumber;
-				}
-				#endif
+                #if ( configUSE_TRACE_FACILITY == 1 )
+                    {
+                        pxStreamBuffer->uxStreamBufferNumber = uxStreamBufferNumber;
+                    }
+                #endif
 
-				traceSTREAM_BUFFER_RESET( xStreamBuffer );
-			}
-		}
-	}
-	taskEXIT_CRITICAL();
+                traceSTREAM_BUFFER_RESET( xStreamBuffer );
+            }
+        }
+    }
+    taskEXIT_CRITICAL();
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
-BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel )
+BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer,
+                                         size_t xTriggerLevel )
 {
-StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
-BaseType_t xReturn;
+    StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+    BaseType_t xReturn;
 
-	configASSERT( pxStreamBuffer );
+    configASSERT( pxStreamBuffer );
 
-	/* It is not valid for the trigger level to be 0. */
-	if( xTriggerLevel == ( size_t ) 0 )
-	{
-		xTriggerLevel = ( size_t ) 1;
-	}
+    /* It is not valid for the trigger level to be 0. */
+    if( xTriggerLevel == ( size_t ) 0 )
+    {
+        xTriggerLevel = ( size_t ) 1;
+    }
 
-	/* The trigger level is the number of bytes that must be in the stream
-	buffer before a task that is waiting for data is unblocked. */
-	if( xTriggerLevel <= pxStreamBuffer->xLength )
-	{
-		pxStreamBuffer->xTriggerLevelBytes = xTriggerLevel;
-		xReturn = pdPASS;
-	}
-	else
-	{
-		xReturn = pdFALSE;
-	}
+    /* The trigger level is the number of bytes that must be in the stream
+     * buffer before a task that is waiting for data is unblocked. */
+    if( xTriggerLevel <= pxStreamBuffer->xLength )
+    {
+        pxStreamBuffer->xTriggerLevelBytes = xTriggerLevel;
+        xReturn = pdPASS;
+    }
+    else
+    {
+        xReturn = pdFALSE;
+    }
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
 size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer )
 {
-const StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
-size_t xSpace;
+    const StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+    size_t xSpace;
 
-	configASSERT( pxStreamBuffer );
+    configASSERT( pxStreamBuffer );
 
-	xSpace = pxStreamBuffer->xLength + pxStreamBuffer->xTail;
-	xSpace -= pxStreamBuffer->xHead;
-	xSpace -= ( size_t ) 1;
+    xSpace = pxStreamBuffer->xLength + pxStreamBuffer->xTail;
+    xSpace -= pxStreamBuffer->xHead;
+    xSpace -= ( size_t ) 1;
 
-	if( xSpace >= pxStreamBuffer->xLength )
-	{
-		xSpace -= pxStreamBuffer->xLength;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    if( xSpace >= pxStreamBuffer->xLength )
+    {
+        xSpace -= pxStreamBuffer->xLength;
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	return xSpace;
+    return xSpace;
 }
 /*-----------------------------------------------------------*/
 
 size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer )
 {
-const StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
-size_t xReturn;
+    const StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+    size_t xReturn;
 
-	configASSERT( pxStreamBuffer );
+    configASSERT( pxStreamBuffer );
 
-	xReturn = prvBytesInBuffer( pxStreamBuffer );
-	return xReturn;
+    xReturn = prvBytesInBuffer( pxStreamBuffer );
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
 size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
-						  const void *pvTxData,
-						  size_t xDataLengthBytes,
-						  TickType_t xTicksToWait )
+                          const void * pvTxData,
+                          size_t xDataLengthBytes,
+                          TickType_t xTicksToWait )
 {
-StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
-size_t xReturn, xSpace = 0;
-size_t xRequiredSpace = xDataLengthBytes;
-TimeOut_t xTimeOut;
+    StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+    size_t xReturn, xSpace = 0;
+    size_t xRequiredSpace = xDataLengthBytes;
+    TimeOut_t xTimeOut;
 
-	configASSERT( pvTxData );
-	configASSERT( pxStreamBuffer );
+    /* Having a 'isFeasible' variable allows to respect the convention that there is only a return statement at the end. Othewise, return
+     * could be done as soon as we realise the send cannot happen. We will let the call to 'prvWriteMessageToBuffer' dealing with this scenario. */
+    BaseType_t xIsFeasible;
 
-	/* This send function is used to write to both message buffers and stream
-	buffers.  If this is a message buffer then the space needed must be
-	increased by the amount of bytes needed to store the length of the
-	message. */
-	if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
-	{
-		xRequiredSpace += sbBYTES_TO_STORE_MESSAGE_LENGTH;
+    configASSERT( pvTxData );
+    configASSERT( pxStreamBuffer );
 
-		/* Overflow? */
-		configASSERT( xRequiredSpace > xDataLengthBytes );
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    /* This send function is used to write to both message buffers and stream
+     * buffers.  If this is a message buffer then the space needed must be
+     * increased by the amount of bytes needed to store the length of the
+     * message. */
+    if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
+    {
+        xRequiredSpace += sbBYTES_TO_STORE_MESSAGE_LENGTH;
 
-	if( xTicksToWait != ( TickType_t ) 0 )
-	{
-		vTaskSetTimeOutState( &xTimeOut );
+        /* Overflow? */
+        configASSERT( xRequiredSpace > xDataLengthBytes );
 
-		do
-		{
-			/* Wait until the required number of bytes are free in the message
-			buffer. */
-			taskENTER_CRITICAL();
-			{
-				xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
+        /* In the case of the message buffer, one has to be able to write the complete message as opposed to
+         * a stream buffer for semantic reasons. Check if it is physically possible to write the message given
+         * the length of the buffer. */
+        if( xRequiredSpace > pxStreamBuffer->xLength )
+        {
+            /* The message could never be written because it is greater than the buffer length.
+             * By setting xIsFeasable to FALSE, we skip over the following do..while loop, thus avoiding
+             * a deadlock. The call to 'prvWriteMessageToBuffer' toward the end of this function with
+             * xRequiredSpace greater than xSpace will suffice in not writing anything to the internal buffer.
+             * Now, the function will return 0 because the message could not be written. Should an error code be
+             * returned instead ??? In my opinion, probably.. But the return type doesn't allow for negative
+             * values to be returned. A confusion could exist to the caller. Returning 0 because a timeout occurred
+             * and a subsequent send attempts could eventually succeed, and returning 0 because a write could never
+             * happen because of the size are two scenarios to me :/ */
+            xIsFeasible = pdFALSE;
+        }
+        else
+        {
+            /* It is possible to write the message completely in the buffer. This is the intended route.
+             * Let's continue with the regular timeout logic. */
+            xIsFeasible = pdTRUE;
+        }
+    }
+    else
+    {
+        /* In the case of the stream buffer, not being able to completely write the message in the buffer
+         * is an acceptable scenario, but it has to be dealt with properly */
+        if( xRequiredSpace > pxStreamBuffer->xLength )
+        {
+            /* Not enough buffer space. We will attempt to write as much as we can in this run
+             * so that the caller can send the remaining in subsequent calls. We avoid a deadlock by
+             * offering the possibility to take the 'else' branch in the  'if( xSpace < xRequiredSpace )'
+             * condition inside the following do..while loop */
+            xRequiredSpace = pxStreamBuffer->xLength;
 
-				if( xSpace < xRequiredSpace )
-				{
-					/* Clear notification state as going to wait for space. */
-					( void ) xTaskNotifyStateClear( NULL );
+            /* TODO FIXME: Is there a check we should do with the xTriggerLevelBytes value ? */
 
-					/* Should only be one writer. */
-					configASSERT( pxStreamBuffer->xTaskWaitingToSend == NULL );
-					pxStreamBuffer->xTaskWaitingToSend = xTaskGetCurrentTaskHandle();
-				}
-				else
-				{
-					taskEXIT_CRITICAL();
-					break;
-				}
-			}
-			taskEXIT_CRITICAL();
+            /* With the adjustment to 'xRequiredSpace', the deadlock is avoided, thus it's now feasible. */
+            xIsFeasible = pdTRUE;
+        }
+        else
+        {
+            /* It is possible to write the message completely in the buffer. */
+            xIsFeasible = pdTRUE;
+        }
+    }
 
-			traceBLOCKING_ON_STREAM_BUFFER_SEND( xStreamBuffer );
-			( void ) xTaskNotifyWait( ( uint32_t ) 0, ( uint32_t ) 0, NULL, xTicksToWait );
-			pxStreamBuffer->xTaskWaitingToSend = NULL;
+    /* Added check against xIsFeasible. If it's not feasible, don't even wait for notification, let the call to 'prvWriteMessageToBuffer' do nothing and return 0 */
+    if( ( xTicksToWait != ( TickType_t ) 0 ) && ( xIsFeasible == pdTRUE ) )
+    {
+        vTaskSetTimeOutState( &xTimeOut );
 
-		} while( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE );
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+        do
+        {
+            /* Wait until the required number of bytes are free in the message
+             * buffer. */
+            taskENTER_CRITICAL();
+            {
+                xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
 
-	if( xSpace == ( size_t ) 0 )
-	{
-		xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+                if( xSpace < xRequiredSpace )
+                {
+                    /* Clear notification state as going to wait for space. */
+                    ( void ) xTaskNotifyStateClear( NULL );
 
-	xReturn = prvWriteMessageToBuffer( pxStreamBuffer, pvTxData, xDataLengthBytes, xSpace, xRequiredSpace );
+                    /* Should only be one writer. */
+                    configASSERT( pxStreamBuffer->xTaskWaitingToSend == NULL );
+                    pxStreamBuffer->xTaskWaitingToSend = xTaskGetCurrentTaskHandle();
+                }
+                else
+                {
+                    taskEXIT_CRITICAL();
+                    break;
+                }
+            }
+            taskEXIT_CRITICAL();
 
-	if( xReturn > ( size_t ) 0 )
-	{
-		traceSTREAM_BUFFER_SEND( xStreamBuffer, xReturn );
+            traceBLOCKING_ON_STREAM_BUFFER_SEND( xStreamBuffer );
+            ( void ) xTaskNotifyWait( ( uint32_t ) 0, ( uint32_t ) 0, NULL, xTicksToWait );
+            pxStreamBuffer->xTaskWaitingToSend = NULL;
+        } while( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE );
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-		/* Was a task waiting for the data? */
-		if( prvBytesInBuffer( pxStreamBuffer ) >= pxStreamBuffer->xTriggerLevelBytes )
-		{
-			sbSEND_COMPLETED( pxStreamBuffer );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-		traceSTREAM_BUFFER_SEND_FAILED( xStreamBuffer );
-	}
+    if( xSpace == ( size_t ) 0 )
+    {
+        xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	return xReturn;
+    xReturn = prvWriteMessageToBuffer( pxStreamBuffer, pvTxData, xDataLengthBytes, xSpace, xRequiredSpace );
+
+    if( xReturn > ( size_t ) 0 )
+    {
+        traceSTREAM_BUFFER_SEND( xStreamBuffer, xReturn );
+
+        /* Was a task waiting for the data? */
+        if( prvBytesInBuffer( pxStreamBuffer ) >= pxStreamBuffer->xTriggerLevelBytes )
+        {
+            sbSEND_COMPLETED( pxStreamBuffer );
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+        traceSTREAM_BUFFER_SEND_FAILED( xStreamBuffer );
+    }
+
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
 size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
-								 const void *pvTxData,
-								 size_t xDataLengthBytes,
-								 BaseType_t * const pxHigherPriorityTaskWoken )
+                                 const void * pvTxData,
+                                 size_t xDataLengthBytes,
+                                 BaseType_t * const pxHigherPriorityTaskWoken )
 {
-StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
-size_t xReturn, xSpace;
-size_t xRequiredSpace = xDataLengthBytes;
+    StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+    size_t xReturn, xSpace;
+    size_t xRequiredSpace = xDataLengthBytes;
 
-	configASSERT( pvTxData );
-	configASSERT( pxStreamBuffer );
+    configASSERT( pvTxData );
+    configASSERT( pxStreamBuffer );
 
-	/* This send function is used to write to both message buffers and stream
-	buffers.  If this is a message buffer then the space needed must be
-	increased by the amount of bytes needed to store the length of the
-	message. */
-	if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
-	{
-		xRequiredSpace += sbBYTES_TO_STORE_MESSAGE_LENGTH;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    /* This send function is used to write to both message buffers and stream
+     * buffers.  If this is a message buffer then the space needed must be
+     * increased by the amount of bytes needed to store the length of the
+     * message. */
+    if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
+    {
+        xRequiredSpace += sbBYTES_TO_STORE_MESSAGE_LENGTH;
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
-	xReturn = prvWriteMessageToBuffer( pxStreamBuffer, pvTxData, xDataLengthBytes, xSpace, xRequiredSpace );
+    xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
+    xReturn = prvWriteMessageToBuffer( pxStreamBuffer, pvTxData, xDataLengthBytes, xSpace, xRequiredSpace );
 
-	if( xReturn > ( size_t ) 0 )
-	{
-		/* Was a task waiting for the data? */
-		if( prvBytesInBuffer( pxStreamBuffer ) >= pxStreamBuffer->xTriggerLevelBytes )
-		{
-			sbSEND_COMPLETE_FROM_ISR( pxStreamBuffer, pxHigherPriorityTaskWoken );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    if( xReturn > ( size_t ) 0 )
+    {
+        /* Was a task waiting for the data? */
+        if( prvBytesInBuffer( pxStreamBuffer ) >= pxStreamBuffer->xTriggerLevelBytes )
+        {
+            sbSEND_COMPLETE_FROM_ISR( pxStreamBuffer, pxHigherPriorityTaskWoken );
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	traceSTREAM_BUFFER_SEND_FROM_ISR( xStreamBuffer, xReturn );
+    traceSTREAM_BUFFER_SEND_FROM_ISR( xStreamBuffer, xReturn );
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
 static size_t prvWriteMessageToBuffer( StreamBuffer_t * const pxStreamBuffer,
-									   const void * pvTxData,
-									   size_t xDataLengthBytes,
-									   size_t xSpace,
-									   size_t xRequiredSpace )
+                                       const void * pvTxData,
+                                       size_t xDataLengthBytes,
+                                       size_t xSpace,
+                                       size_t xRequiredSpace )
 {
-	BaseType_t xShouldWrite;
-	size_t xReturn;
+    BaseType_t xShouldWrite;
+    size_t xReturn;
 
-	if( xSpace == ( size_t ) 0 )
-	{
-		/* Doesn't matter if this is a stream buffer or a message buffer, there
-		is no space to write. */
-		xShouldWrite = pdFALSE;
-	}
-	else if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) == ( uint8_t ) 0 )
-	{
-		/* This is a stream buffer, as opposed to a message buffer, so writing a
-		stream of bytes rather than discrete messages.  Write as many bytes as
-		possible. */
-		xShouldWrite = pdTRUE;
-		xDataLengthBytes = configMIN( xDataLengthBytes, xSpace );
-	}
-	else if( xSpace >= xRequiredSpace )
-	{
-		/* This is a message buffer, as opposed to a stream buffer, and there
-		is enough space to write both the message length and the message itself
-		into the buffer.  Start by writing the length of the data, the data
-		itself will be written later in this function. */
-		xShouldWrite = pdTRUE;
-		( void ) prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) &( xDataLengthBytes ), sbBYTES_TO_STORE_MESSAGE_LENGTH );
-	}
-	else
-	{
-		/* There is space available, but not enough space. */
-		xShouldWrite = pdFALSE;
-	}
+    if( xSpace == ( size_t ) 0 )
+    {
+        /* Doesn't matter if this is a stream buffer or a message buffer, there
+         * is no space to write. */
+        xShouldWrite = pdFALSE;
+    }
+    else if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) == ( uint8_t ) 0 )
+    {
+        /* This is a stream buffer, as opposed to a message buffer, so writing a
+         * stream of bytes rather than discrete messages.  Write as many bytes as
+         * possible. */
+        xShouldWrite = pdTRUE;
+        xDataLengthBytes = configMIN( xDataLengthBytes, xSpace );
+    }
+    else if( xSpace >= xRequiredSpace )
+    {
+        /* This is a message buffer, as opposed to a stream buffer, and there
+         * is enough space to write both the message length and the message itself
+         * into the buffer.  Start by writing the length of the data, the data
+         * itself will be written later in this function. */
+        xShouldWrite = pdTRUE;
+        ( void ) prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) &( xDataLengthBytes ), sbBYTES_TO_STORE_MESSAGE_LENGTH );
+    }
+    else
+    {
+        /* There is space available, but not enough space. */
+        xShouldWrite = pdFALSE;
+    }
 
-	if( xShouldWrite != pdFALSE )
-	{
-		/* Writes the data itself. */
-		xReturn = prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) pvTxData, xDataLengthBytes ); /*lint !e9079 Storage buffer is implemented as uint8_t for ease of sizing, alighment and access. */
-	}
-	else
-	{
-		xReturn = 0;
-	}
+    if( xShouldWrite != pdFALSE )
+    {
+        /* Writes the data itself. */
+        xReturn = prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) pvTxData, xDataLengthBytes ); /*lint !e9079 Storage buffer is implemented as uint8_t for ease of sizing, alignment and access. */
+    }
+    else
+    {
+        xReturn = 0;
+    }
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
 size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
-							 void *pvRxData,
-							 size_t xBufferLengthBytes,
-							 TickType_t xTicksToWait )
+                             void * pvRxData,
+                             size_t xBufferLengthBytes,
+                             TickType_t xTicksToWait )
 {
-StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
-size_t xReceivedLength = 0, xBytesAvailable, xBytesToStoreMessageLength;
+    StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+    size_t xReceivedLength = 0, xBytesAvailable, xBytesToStoreMessageLength;
 
-	configASSERT( pvRxData );
-	configASSERT( pxStreamBuffer );
+    configASSERT( pvRxData );
+    configASSERT( pxStreamBuffer );
 
-	/* This receive function is used by both message buffers, which store
-	discrete messages, and stream buffers, which store a continuous stream of
-	bytes.  Discrete messages include an additional
-	sbBYTES_TO_STORE_MESSAGE_LENGTH bytes that hold the length of the
-	message. */
-	if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
-	{
-		xBytesToStoreMessageLength = sbBYTES_TO_STORE_MESSAGE_LENGTH;
-	}
-	else
-	{
-		xBytesToStoreMessageLength = 0;
-	}
+    /* This receive function is used by both message buffers, which store
+     * discrete messages, and stream buffers, which store a continuous stream of
+     * bytes.  Discrete messages include an additional
+     * sbBYTES_TO_STORE_MESSAGE_LENGTH bytes that hold the length of the
+     * message. */
+    if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
+    {
+        xBytesToStoreMessageLength = sbBYTES_TO_STORE_MESSAGE_LENGTH;
+    }
+    else
+    {
+        xBytesToStoreMessageLength = 0;
+    }
 
-	if( xTicksToWait != ( TickType_t ) 0 )
-	{
-		/* Checking if there is data and clearing the notification state must be
-		performed atomically. */
-		taskENTER_CRITICAL();
-		{
-			xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
+    if( xTicksToWait != ( TickType_t ) 0 )
+    {
+        /* Checking if there is data and clearing the notification state must be
+         * performed atomically. */
+        taskENTER_CRITICAL();
+        {
+            xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
 
-			/* If this function was invoked by a message buffer read then
-			xBytesToStoreMessageLength holds the number of bytes used to hold
-			the length of the next discrete message.  If this function was
-			invoked by a stream buffer read then xBytesToStoreMessageLength will
-			be 0. */
-			if( xBytesAvailable <= xBytesToStoreMessageLength )
-			{
-				/* Clear notification state as going to wait for data. */
-				( void ) xTaskNotifyStateClear( NULL );
+            /* If this function was invoked by a message buffer read then
+             * xBytesToStoreMessageLength holds the number of bytes used to hold
+             * the length of the next discrete message.  If this function was
+             * invoked by a stream buffer read then xBytesToStoreMessageLength will
+             * be 0. */
+            if( xBytesAvailable <= xBytesToStoreMessageLength )
+            {
+                /* Clear notification state as going to wait for data. */
+                ( void ) xTaskNotifyStateClear( NULL );
 
-				/* Should only be one reader. */
-				configASSERT( pxStreamBuffer->xTaskWaitingToReceive == NULL );
-				pxStreamBuffer->xTaskWaitingToReceive = xTaskGetCurrentTaskHandle();
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		taskEXIT_CRITICAL();
+                /* Should only be one reader. */
+                configASSERT( pxStreamBuffer->xTaskWaitingToReceive == NULL );
+                pxStreamBuffer->xTaskWaitingToReceive = xTaskGetCurrentTaskHandle();
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        taskEXIT_CRITICAL();
 
-		if( xBytesAvailable <= xBytesToStoreMessageLength )
-		{
-			/* Wait for data to be available. */
-			traceBLOCKING_ON_STREAM_BUFFER_RECEIVE( xStreamBuffer );
-			( void ) xTaskNotifyWait( ( uint32_t ) 0, ( uint32_t ) 0, NULL, xTicksToWait );
-			pxStreamBuffer->xTaskWaitingToReceive = NULL;
+        if( xBytesAvailable <= xBytesToStoreMessageLength )
+        {
+            /* Wait for data to be available. */
+            traceBLOCKING_ON_STREAM_BUFFER_RECEIVE( xStreamBuffer );
+            ( void ) xTaskNotifyWait( ( uint32_t ) 0, ( uint32_t ) 0, NULL, xTicksToWait );
+            pxStreamBuffer->xTaskWaitingToReceive = NULL;
 
-			/* Recheck the data available after blocking. */
-			xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	else
-	{
-		xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
-	}
+            /* Recheck the data available after blocking. */
+            xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
+    else
+    {
+        xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
+    }
 
-	/* Whether receiving a discrete message (where xBytesToStoreMessageLength
-	holds the number of bytes used to store the message length) or a stream of
-	bytes (where xBytesToStoreMessageLength is zero), the number of bytes
-	available must be greater than xBytesToStoreMessageLength to be able to
-	read bytes from the buffer. */
-	if( xBytesAvailable > xBytesToStoreMessageLength )
-	{
-		xReceivedLength = prvReadMessageFromBuffer( pxStreamBuffer, pvRxData, xBufferLengthBytes, xBytesAvailable, xBytesToStoreMessageLength );
+    /* Whether receiving a discrete message (where xBytesToStoreMessageLength
+     * holds the number of bytes used to store the message length) or a stream of
+     * bytes (where xBytesToStoreMessageLength is zero), the number of bytes
+     * available must be greater than xBytesToStoreMessageLength to be able to
+     * read bytes from the buffer. */
+    if( xBytesAvailable > xBytesToStoreMessageLength )
+    {
+        xReceivedLength = prvReadMessageFromBuffer( pxStreamBuffer, pvRxData, xBufferLengthBytes, xBytesAvailable, xBytesToStoreMessageLength );
 
-		/* Was a task waiting for space in the buffer? */
-		if( xReceivedLength != ( size_t ) 0 )
-		{
-			traceSTREAM_BUFFER_RECEIVE( xStreamBuffer, xReceivedLength );
-			sbRECEIVE_COMPLETED( pxStreamBuffer );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	else
-	{
-		traceSTREAM_BUFFER_RECEIVE_FAILED( xStreamBuffer );
-		mtCOVERAGE_TEST_MARKER();
-	}
+        /* Was a task waiting for space in the buffer? */
+        if( xReceivedLength != ( size_t ) 0 )
+        {
+            traceSTREAM_BUFFER_RECEIVE( xStreamBuffer, xReceivedLength );
+            sbRECEIVE_COMPLETED( pxStreamBuffer );
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
+    else
+    {
+        traceSTREAM_BUFFER_RECEIVE_FAILED( xStreamBuffer );
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	return xReceivedLength;
+    return xReceivedLength;
 }
 /*-----------------------------------------------------------*/
 
 size_t xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer )
 {
-StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
-size_t xReturn, xBytesAvailable, xOriginalTail;
-configMESSAGE_BUFFER_LENGTH_TYPE xTempReturn;
+    StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+    size_t xReturn, xBytesAvailable, xOriginalTail;
+    configMESSAGE_BUFFER_LENGTH_TYPE xTempReturn;
 
-	configASSERT( pxStreamBuffer );
+    configASSERT( pxStreamBuffer );
 
-	/* Ensure the stream buffer is being used as a message buffer. */
-	if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
-	{
-		xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
-		if( xBytesAvailable > sbBYTES_TO_STORE_MESSAGE_LENGTH )
-		{
-			/* The number of bytes available is greater than the number of bytes
-			required to hold the length of the next message, so another message
-			is available.  Return its length without removing the length bytes
-			from the buffer.  A copy of the tail is stored so the buffer can be
-			returned to its prior state as the message is not actually being
-			removed from the buffer. */
-			xOriginalTail = pxStreamBuffer->xTail;
-			( void ) prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) &xTempReturn, sbBYTES_TO_STORE_MESSAGE_LENGTH, xBytesAvailable );
-			xReturn = ( size_t ) xTempReturn;
-			pxStreamBuffer->xTail = xOriginalTail;
-		}
-		else
-		{
-			/* The minimum amount of bytes in a message buffer is
-			( sbBYTES_TO_STORE_MESSAGE_LENGTH + 1 ), so if xBytesAvailable is
-			less than sbBYTES_TO_STORE_MESSAGE_LENGTH the only other valid
-			value is 0. */
-			configASSERT( xBytesAvailable == 0 );
-			xReturn = 0;
-		}
-	}
-	else
-	{
-		xReturn = 0;
-	}
+    /* Ensure the stream buffer is being used as a message buffer. */
+    if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
+    {
+        xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
 
-	return xReturn;
+        if( xBytesAvailable > sbBYTES_TO_STORE_MESSAGE_LENGTH )
+        {
+            /* The number of bytes available is greater than the number of bytes
+             * required to hold the length of the next message, so another message
+             * is available.  Return its length without removing the length bytes
+             * from the buffer.  A copy of the tail is stored so the buffer can be
+             * returned to its prior state as the message is not actually being
+             * removed from the buffer. */
+            xOriginalTail = pxStreamBuffer->xTail;
+            ( void ) prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) &xTempReturn, sbBYTES_TO_STORE_MESSAGE_LENGTH, xBytesAvailable );
+            xReturn = ( size_t ) xTempReturn;
+            pxStreamBuffer->xTail = xOriginalTail;
+        }
+        else
+        {
+            /* The minimum amount of bytes in a message buffer is
+             * ( sbBYTES_TO_STORE_MESSAGE_LENGTH + 1 ), so if xBytesAvailable is
+             * less than sbBYTES_TO_STORE_MESSAGE_LENGTH the only other valid
+             * value is 0. */
+            configASSERT( xBytesAvailable == 0 );
+            xReturn = 0;
+        }
+    }
+    else
+    {
+        xReturn = 0;
+    }
+
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
 size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
-									void *pvRxData,
-									size_t xBufferLengthBytes,
-									BaseType_t * const pxHigherPriorityTaskWoken )
+                                    void * pvRxData,
+                                    size_t xBufferLengthBytes,
+                                    BaseType_t * const pxHigherPriorityTaskWoken )
 {
-StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
-size_t xReceivedLength = 0, xBytesAvailable, xBytesToStoreMessageLength;
+    StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+    size_t xReceivedLength = 0, xBytesAvailable, xBytesToStoreMessageLength;
 
-	configASSERT( pvRxData );
-	configASSERT( pxStreamBuffer );
+    configASSERT( pvRxData );
+    configASSERT( pxStreamBuffer );
 
-	/* This receive function is used by both message buffers, which store
-	discrete messages, and stream buffers, which store a continuous stream of
-	bytes.  Discrete messages include an additional
-	sbBYTES_TO_STORE_MESSAGE_LENGTH bytes that hold the length of the
-	message. */
-	if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
-	{
-		xBytesToStoreMessageLength = sbBYTES_TO_STORE_MESSAGE_LENGTH;
-	}
-	else
-	{
-		xBytesToStoreMessageLength = 0;
-	}
+    /* This receive function is used by both message buffers, which store
+     * discrete messages, and stream buffers, which store a continuous stream of
+     * bytes.  Discrete messages include an additional
+     * sbBYTES_TO_STORE_MESSAGE_LENGTH bytes that hold the length of the
+     * message. */
+    if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
+    {
+        xBytesToStoreMessageLength = sbBYTES_TO_STORE_MESSAGE_LENGTH;
+    }
+    else
+    {
+        xBytesToStoreMessageLength = 0;
+    }
 
-	xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
+    xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
 
-	/* Whether receiving a discrete message (where xBytesToStoreMessageLength
-	holds the number of bytes used to store the message length) or a stream of
-	bytes (where xBytesToStoreMessageLength is zero), the number of bytes
-	available must be greater than xBytesToStoreMessageLength to be able to
-	read bytes from the buffer. */
-	if( xBytesAvailable > xBytesToStoreMessageLength )
-	{
-		xReceivedLength = prvReadMessageFromBuffer( pxStreamBuffer, pvRxData, xBufferLengthBytes, xBytesAvailable, xBytesToStoreMessageLength );
+    /* Whether receiving a discrete message (where xBytesToStoreMessageLength
+     * holds the number of bytes used to store the message length) or a stream of
+     * bytes (where xBytesToStoreMessageLength is zero), the number of bytes
+     * available must be greater than xBytesToStoreMessageLength to be able to
+     * read bytes from the buffer. */
+    if( xBytesAvailable > xBytesToStoreMessageLength )
+    {
+        xReceivedLength = prvReadMessageFromBuffer( pxStreamBuffer, pvRxData, xBufferLengthBytes, xBytesAvailable, xBytesToStoreMessageLength );
 
-		/* Was a task waiting for space in the buffer? */
-		if( xReceivedLength != ( size_t ) 0 )
-		{
-			sbRECEIVE_COMPLETED_FROM_ISR( pxStreamBuffer, pxHigherPriorityTaskWoken );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+        /* Was a task waiting for space in the buffer? */
+        if( xReceivedLength != ( size_t ) 0 )
+        {
+            sbRECEIVE_COMPLETED_FROM_ISR( pxStreamBuffer, pxHigherPriorityTaskWoken );
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	traceSTREAM_BUFFER_RECEIVE_FROM_ISR( xStreamBuffer, xReceivedLength );
+    traceSTREAM_BUFFER_RECEIVE_FROM_ISR( xStreamBuffer, xReceivedLength );
 
-	return xReceivedLength;
+    return xReceivedLength;
 }
 /*-----------------------------------------------------------*/
 
-static size_t prvReadMessageFromBuffer( StreamBuffer_t *pxStreamBuffer,
-										void *pvRxData,
-										size_t xBufferLengthBytes,
-										size_t xBytesAvailable,
-										size_t xBytesToStoreMessageLength )
+static size_t prvReadMessageFromBuffer( StreamBuffer_t * pxStreamBuffer,
+                                        void * pvRxData,
+                                        size_t xBufferLengthBytes,
+                                        size_t xBytesAvailable,
+                                        size_t xBytesToStoreMessageLength )
 {
-size_t xOriginalTail, xReceivedLength, xNextMessageLength;
-configMESSAGE_BUFFER_LENGTH_TYPE xTempNextMessageLength;
+    size_t xOriginalTail, xReceivedLength, xNextMessageLength;
+    configMESSAGE_BUFFER_LENGTH_TYPE xTempNextMessageLength;
 
-	if( xBytesToStoreMessageLength != ( size_t ) 0 )
-	{
-		/* A discrete message is being received.  First receive the length
-		of the message.  A copy of the tail is stored so the buffer can be
-		returned to its prior state if the length of the message is too
-		large for the provided buffer. */
-		xOriginalTail = pxStreamBuffer->xTail;
-		( void ) prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) &xTempNextMessageLength, xBytesToStoreMessageLength, xBytesAvailable );
-		xNextMessageLength = ( size_t ) xTempNextMessageLength;
+    if( xBytesToStoreMessageLength != ( size_t ) 0 )
+    {
+        /* A discrete message is being received.  First receive the length
+         * of the message.  A copy of the tail is stored so the buffer can be
+         * returned to its prior state if the length of the message is too
+         * large for the provided buffer. */
+        xOriginalTail = pxStreamBuffer->xTail;
+        ( void ) prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) &xTempNextMessageLength, xBytesToStoreMessageLength, xBytesAvailable );
+        xNextMessageLength = ( size_t ) xTempNextMessageLength;
 
-		/* Reduce the number of bytes available by the number of bytes just
-		read out. */
-		xBytesAvailable -= xBytesToStoreMessageLength;
+        /* Reduce the number of bytes available by the number of bytes just
+         * read out. */
+        xBytesAvailable -= xBytesToStoreMessageLength;
 
-		/* Check there is enough space in the buffer provided by the
-		user. */
-		if( xNextMessageLength > xBufferLengthBytes )
-		{
-			/* The user has provided insufficient space to read the message
-			so return the buffer to its previous state (so the length of
-			the message is in the buffer again). */
-			pxStreamBuffer->xTail = xOriginalTail;
-			xNextMessageLength = 0;
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	else
-	{
-		/* A stream of bytes is being received (as opposed to a discrete
-		message), so read as many bytes as possible. */
-		xNextMessageLength = xBufferLengthBytes;
-	}
+        /* Check there is enough space in the buffer provided by the
+         * user. */
+        if( xNextMessageLength > xBufferLengthBytes )
+        {
+            /* The user has provided insufficient space to read the message
+             * so return the buffer to its previous state (so the length of
+             * the message is in the buffer again). */
+            pxStreamBuffer->xTail = xOriginalTail;
+            xNextMessageLength = 0;
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
+    else
+    {
+        /* A stream of bytes is being received (as opposed to a discrete
+         * message), so read as many bytes as possible. */
+        xNextMessageLength = xBufferLengthBytes;
+    }
 
-	/* Read the actual data. */
-	xReceivedLength = prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) pvRxData, xNextMessageLength, xBytesAvailable ); /*lint !e9079 Data storage area is implemented as uint8_t array for ease of sizing, indexing and alignment. */
+    /* Read the actual data. */
+    xReceivedLength = prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) pvRxData, xNextMessageLength, xBytesAvailable ); /*lint !e9079 Data storage area is implemented as uint8_t array for ease of sizing, indexing and alignment. */
 
-	return xReceivedLength;
+    return xReceivedLength;
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer )
 {
-const StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
-BaseType_t xReturn;
-size_t xTail;
+    const StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+    BaseType_t xReturn;
+    size_t xTail;
 
-	configASSERT( pxStreamBuffer );
+    configASSERT( pxStreamBuffer );
 
-	/* True if no bytes are available. */
-	xTail = pxStreamBuffer->xTail;
-	if( pxStreamBuffer->xHead == xTail )
-	{
-		xReturn = pdTRUE;
-	}
-	else
-	{
-		xReturn = pdFALSE;
-	}
+    /* True if no bytes are available. */
+    xTail = pxStreamBuffer->xTail;
 
-	return xReturn;
+    if( pxStreamBuffer->xHead == xTail )
+    {
+        xReturn = pdTRUE;
+    }
+    else
+    {
+        xReturn = pdFALSE;
+    }
+
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer )
 {
-BaseType_t xReturn;
-size_t xBytesToStoreMessageLength;
-const StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+    BaseType_t xReturn;
+    size_t xBytesToStoreMessageLength;
+    const StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 
-	configASSERT( pxStreamBuffer );
+    configASSERT( pxStreamBuffer );
 
-	/* This generic version of the receive function is used by both message
-	buffers, which store discrete messages, and stream buffers, which store a
-	continuous stream of bytes.  Discrete messages include an additional
-	sbBYTES_TO_STORE_MESSAGE_LENGTH bytes that hold the length of the message. */
-	if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
-	{
-		xBytesToStoreMessageLength = sbBYTES_TO_STORE_MESSAGE_LENGTH;
-	}
-	else
-	{
-		xBytesToStoreMessageLength = 0;
-	}
+    /* This generic version of the receive function is used by both message
+     * buffers, which store discrete messages, and stream buffers, which store a
+     * continuous stream of bytes.  Discrete messages include an additional
+     * sbBYTES_TO_STORE_MESSAGE_LENGTH bytes that hold the length of the message. */
+    if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
+    {
+        xBytesToStoreMessageLength = sbBYTES_TO_STORE_MESSAGE_LENGTH;
+    }
+    else
+    {
+        xBytesToStoreMessageLength = 0;
+    }
 
-	/* True if the available space equals zero. */
-	if( xStreamBufferSpacesAvailable( xStreamBuffer ) <= xBytesToStoreMessageLength )
-	{
-		xReturn = pdTRUE;
-	}
-	else
-	{
-		xReturn = pdFALSE;
-	}
+    /* True if the available space equals zero. */
+    if( xStreamBufferSpacesAvailable( xStreamBuffer ) <= xBytesToStoreMessageLength )
+    {
+        xReturn = pdTRUE;
+    }
+    else
+    {
+        xReturn = pdFALSE;
+    }
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
-BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken )
+BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer,
+                                              BaseType_t * pxHigherPriorityTaskWoken )
 {
-StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
-BaseType_t xReturn;
-UBaseType_t uxSavedInterruptStatus;
+    StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+    BaseType_t xReturn;
+    UBaseType_t uxSavedInterruptStatus;
 
-	configASSERT( pxStreamBuffer );
+    configASSERT( pxStreamBuffer );
 
-	uxSavedInterruptStatus = ( UBaseType_t ) portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		if( ( pxStreamBuffer )->xTaskWaitingToReceive != NULL )
-		{
-			( void ) xTaskNotifyFromISR( ( pxStreamBuffer )->xTaskWaitingToReceive,
-										 ( uint32_t ) 0,
-										 eNoAction,
-										 pxHigherPriorityTaskWoken );
-			( pxStreamBuffer )->xTaskWaitingToReceive = NULL;
-			xReturn = pdTRUE;
-		}
-		else
-		{
-			xReturn = pdFALSE;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+    uxSavedInterruptStatus = ( UBaseType_t ) portSET_INTERRUPT_MASK_FROM_ISR();
+    {
+        if( ( pxStreamBuffer )->xTaskWaitingToReceive != NULL )
+        {
+            ( void ) xTaskNotifyFromISR( ( pxStreamBuffer )->xTaskWaitingToReceive,
+                                         ( uint32_t ) 0,
+                                         eNoAction,
+                                         pxHigherPriorityTaskWoken );
+            ( pxStreamBuffer )->xTaskWaitingToReceive = NULL;
+            xReturn = pdTRUE;
+        }
+        else
+        {
+            xReturn = pdFALSE;
+        }
+    }
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
-BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken )
+BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer,
+                                                 BaseType_t * pxHigherPriorityTaskWoken )
 {
-StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
-BaseType_t xReturn;
-UBaseType_t uxSavedInterruptStatus;
+    StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+    BaseType_t xReturn;
+    UBaseType_t uxSavedInterruptStatus;
 
-	configASSERT( pxStreamBuffer );
+    configASSERT( pxStreamBuffer );
 
-	uxSavedInterruptStatus = ( UBaseType_t ) portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		if( ( pxStreamBuffer )->xTaskWaitingToSend != NULL )
-		{
-			( void ) xTaskNotifyFromISR( ( pxStreamBuffer )->xTaskWaitingToSend,
-										 ( uint32_t ) 0,
-										 eNoAction,
-										 pxHigherPriorityTaskWoken );
-			( pxStreamBuffer )->xTaskWaitingToSend = NULL;
-			xReturn = pdTRUE;
-		}
-		else
-		{
-			xReturn = pdFALSE;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+    uxSavedInterruptStatus = ( UBaseType_t ) portSET_INTERRUPT_MASK_FROM_ISR();
+    {
+        if( ( pxStreamBuffer )->xTaskWaitingToSend != NULL )
+        {
+            ( void ) xTaskNotifyFromISR( ( pxStreamBuffer )->xTaskWaitingToSend,
+                                         ( uint32_t ) 0,
+                                         eNoAction,
+                                         pxHigherPriorityTaskWoken );
+            ( pxStreamBuffer )->xTaskWaitingToSend = NULL;
+            xReturn = pdTRUE;
+        }
+        else
+        {
+            xReturn = pdFALSE;
+        }
+    }
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
-static size_t prvWriteBytesToBuffer( StreamBuffer_t * const pxStreamBuffer, const uint8_t *pucData, size_t xCount )
+static size_t prvWriteBytesToBuffer( StreamBuffer_t * const pxStreamBuffer,
+                                     const uint8_t * pucData,
+                                     size_t xCount )
 {
-size_t xNextHead, xFirstLength;
+    size_t xNextHead, xFirstLength;
 
-	configASSERT( xCount > ( size_t ) 0 );
+    configASSERT( xCount > ( size_t ) 0 );
 
-	xNextHead = pxStreamBuffer->xHead;
+    xNextHead = pxStreamBuffer->xHead;
 
-	/* Calculate the number of bytes that can be added in the first write -
-	which may be less than the total number of bytes that need to be added if
-	the buffer will wrap back to the beginning. */
-	xFirstLength = configMIN( pxStreamBuffer->xLength - xNextHead, xCount );
+    /* Calculate the number of bytes that can be added in the first write -
+     * which may be less than the total number of bytes that need to be added if
+     * the buffer will wrap back to the beginning. */
+    xFirstLength = configMIN( pxStreamBuffer->xLength - xNextHead, xCount );
 
-	/* Write as many bytes as can be written in the first write. */
-	configASSERT( ( xNextHead + xFirstLength ) <= pxStreamBuffer->xLength );
-	( void ) memcpy( ( void* ) ( &( pxStreamBuffer->pucBuffer[ xNextHead ] ) ), ( const void * ) pucData, xFirstLength ); /*lint !e9087 memcpy() requires void *. */
+    /* Write as many bytes as can be written in the first write. */
+    configASSERT( ( xNextHead + xFirstLength ) <= pxStreamBuffer->xLength );
+    ( void ) memcpy( ( void * ) ( &( pxStreamBuffer->pucBuffer[ xNextHead ] ) ), ( const void * ) pucData, xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 
-	/* If the number of bytes written was less than the number that could be
-	written in the first write... */
-	if( xCount > xFirstLength )
-	{
-		/* ...then write the remaining bytes to the start of the buffer. */
-		configASSERT( ( xCount - xFirstLength ) <= pxStreamBuffer->xLength );
-		( void ) memcpy( ( void * ) pxStreamBuffer->pucBuffer, ( const void * ) &( pucData[ xFirstLength ] ), xCount - xFirstLength ); /*lint !e9087 memcpy() requires void *. */
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    /* If the number of bytes written was less than the number that could be
+     * written in the first write... */
+    if( xCount > xFirstLength )
+    {
+        /* ...then write the remaining bytes to the start of the buffer. */
+        configASSERT( ( xCount - xFirstLength ) <= pxStreamBuffer->xLength );
+        ( void ) memcpy( ( void * ) pxStreamBuffer->pucBuffer, ( const void * ) &( pucData[ xFirstLength ] ), xCount - xFirstLength ); /*lint !e9087 memcpy() requires void *. */
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	xNextHead += xCount;
-	if( xNextHead >= pxStreamBuffer->xLength )
-	{
-		xNextHead -= pxStreamBuffer->xLength;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    xNextHead += xCount;
 
-	pxStreamBuffer->xHead = xNextHead;
+    if( xNextHead >= pxStreamBuffer->xLength )
+    {
+        xNextHead -= pxStreamBuffer->xLength;
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	return xCount;
+    pxStreamBuffer->xHead = xNextHead;
+
+    return xCount;
 }
 /*-----------------------------------------------------------*/
 
-static size_t prvReadBytesFromBuffer( StreamBuffer_t *pxStreamBuffer, uint8_t *pucData, size_t xMaxCount, size_t xBytesAvailable )
+static size_t prvReadBytesFromBuffer( StreamBuffer_t * pxStreamBuffer,
+                                      uint8_t * pucData,
+                                      size_t xMaxCount,
+                                      size_t xBytesAvailable )
 {
-size_t xCount, xFirstLength, xNextTail;
+    size_t xCount, xFirstLength, xNextTail;
 
-	/* Use the minimum of the wanted bytes and the available bytes. */
-	xCount = configMIN( xBytesAvailable, xMaxCount );
+    /* Use the minimum of the wanted bytes and the available bytes. */
+    xCount = configMIN( xBytesAvailable, xMaxCount );
 
-	if( xCount > ( size_t ) 0 )
-	{
-		xNextTail = pxStreamBuffer->xTail;
+    if( xCount > ( size_t ) 0 )
+    {
+        xNextTail = pxStreamBuffer->xTail;
 
-		/* Calculate the number of bytes that can be read - which may be
-		less than the number wanted if the data wraps around to the start of
-		the buffer. */
-		xFirstLength = configMIN( pxStreamBuffer->xLength - xNextTail, xCount );
+        /* Calculate the number of bytes that can be read - which may be
+         * less than the number wanted if the data wraps around to the start of
+         * the buffer. */
+        xFirstLength = configMIN( pxStreamBuffer->xLength - xNextTail, xCount );
 
-		/* Obtain the number of bytes it is possible to obtain in the first
-		read.  Asserts check bounds of read and write. */
-		configASSERT( xFirstLength <= xMaxCount );
-		configASSERT( ( xNextTail + xFirstLength ) <= pxStreamBuffer->xLength );
-		( void ) memcpy( ( void * ) pucData, ( const void * ) &( pxStreamBuffer->pucBuffer[ xNextTail ] ), xFirstLength ); /*lint !e9087 memcpy() requires void *. */
+        /* Obtain the number of bytes it is possible to obtain in the first
+         * read.  Asserts check bounds of read and write. */
+        configASSERT( xFirstLength <= xMaxCount );
+        configASSERT( ( xNextTail + xFirstLength ) <= pxStreamBuffer->xLength );
+        ( void ) memcpy( ( void * ) pucData, ( const void * ) &( pxStreamBuffer->pucBuffer[ xNextTail ] ), xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 
-		/* If the total number of wanted bytes is greater than the number
-		that could be read in the first read... */
-		if( xCount > xFirstLength )
-		{
-			/*...then read the remaining bytes from the start of the buffer. */
-			configASSERT( xCount <= xMaxCount );
-			( void ) memcpy( ( void * ) &( pucData[ xFirstLength ] ), ( void * ) ( pxStreamBuffer->pucBuffer ), xCount - xFirstLength ); /*lint !e9087 memcpy() requires void *. */
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
+        /* If the total number of wanted bytes is greater than the number
+         * that could be read in the first read... */
+        if( xCount > xFirstLength )
+        {
+            /*...then read the remaining bytes from the start of the buffer. */
+            configASSERT( xCount <= xMaxCount );
+            ( void ) memcpy( ( void * ) &( pucData[ xFirstLength ] ), ( void * ) ( pxStreamBuffer->pucBuffer ), xCount - xFirstLength ); /*lint !e9087 memcpy() requires void *. */
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
 
-		/* Move the tail pointer to effectively remove the data read from
-		the buffer. */
-		xNextTail += xCount;
+        /* Move the tail pointer to effectively remove the data read from
+         * the buffer. */
+        xNextTail += xCount;
 
-		if( xNextTail >= pxStreamBuffer->xLength )
-		{
-			xNextTail -= pxStreamBuffer->xLength;
-		}
+        if( xNextTail >= pxStreamBuffer->xLength )
+        {
+            xNextTail -= pxStreamBuffer->xLength;
+        }
 
-		pxStreamBuffer->xTail = xNextTail;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+        pxStreamBuffer->xTail = xNextTail;
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	return xCount;
+    return xCount;
 }
 /*-----------------------------------------------------------*/
 
 static size_t prvBytesInBuffer( const StreamBuffer_t * const pxStreamBuffer )
 {
 /* Returns the distance between xTail and xHead. */
-size_t xCount;
+    size_t xCount;
 
-	xCount = pxStreamBuffer->xLength + pxStreamBuffer->xHead;
-	xCount -= pxStreamBuffer->xTail;
-	if ( xCount >= pxStreamBuffer->xLength )
-	{
-		xCount -= pxStreamBuffer->xLength;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    xCount = pxStreamBuffer->xLength + pxStreamBuffer->xHead;
+    xCount -= pxStreamBuffer->xTail;
 
-	return xCount;
+    if( xCount >= pxStreamBuffer->xLength )
+    {
+        xCount -= pxStreamBuffer->xLength;
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
+
+    return xCount;
 }
 /*-----------------------------------------------------------*/
 
 static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer,
-										  uint8_t * const pucBuffer,
-										  size_t xBufferSizeBytes,
-										  size_t xTriggerLevelBytes,
-										  uint8_t ucFlags )
+                                          uint8_t * const pucBuffer,
+                                          size_t xBufferSizeBytes,
+                                          size_t xTriggerLevelBytes,
+                                          uint8_t ucFlags )
 {
-	/* Assert here is deliberately writing to the entire buffer to ensure it can
-	be written to without generating exceptions, and is setting the buffer to a
-	known value to assist in development/debugging. */
-	#if( configASSERT_DEFINED == 1 )
-	{
-		/* The value written just has to be identifiable when looking at the
-		memory.  Don't use 0xA5 as that is the stack fill value and could
-		result in confusion as to what is actually being observed. */
-		const BaseType_t xWriteValue = 0x55;
-		configASSERT( memset( pucBuffer, ( int ) xWriteValue, xBufferSizeBytes ) == pucBuffer );
-	} /*lint !e529 !e438 xWriteValue is only used if configASSERT() is defined. */
-	#endif
+    /* Assert here is deliberately writing to the entire buffer to ensure it can
+     * be written to without generating exceptions, and is setting the buffer to a
+     * known value to assist in development/debugging. */
+    #if ( configASSERT_DEFINED == 1 )
+        {
+            /* The value written just has to be identifiable when looking at the
+             * memory.  Don't use 0xA5 as that is the stack fill value and could
+             * result in confusion as to what is actually being observed. */
+            const BaseType_t xWriteValue = 0x55;
+            configASSERT( memset( pucBuffer, ( int ) xWriteValue, xBufferSizeBytes ) == pucBuffer );
+        } /*lint !e529 !e438 xWriteValue is only used if configASSERT() is defined. */
+    #endif
 
-	( void ) memset( ( void * ) pxStreamBuffer, 0x00, sizeof( StreamBuffer_t ) ); /*lint !e9087 memset() requires void *. */
-	pxStreamBuffer->pucBuffer = pucBuffer;
-	pxStreamBuffer->xLength = xBufferSizeBytes;
-	pxStreamBuffer->xTriggerLevelBytes = xTriggerLevelBytes;
-	pxStreamBuffer->ucFlags = ucFlags;
+    ( void ) memset( ( void * ) pxStreamBuffer, 0x00, sizeof( StreamBuffer_t ) ); /*lint !e9087 memset() requires void *. */
+    pxStreamBuffer->pucBuffer = pucBuffer;
+    pxStreamBuffer->xLength = xBufferSizeBytes;
+    pxStreamBuffer->xTriggerLevelBytes = xTriggerLevelBytes;
+    pxStreamBuffer->ucFlags = ucFlags;
 }
 
 #if ( configUSE_TRACE_FACILITY == 1 )
 
-	UBaseType_t uxStreamBufferGetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer )
-	{
-		return xStreamBuffer->uxStreamBufferNumber;
-	}
+    UBaseType_t uxStreamBufferGetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer )
+    {
+        return xStreamBuffer->uxStreamBufferNumber;
+    }
 
 #endif /* configUSE_TRACE_FACILITY */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_TRACE_FACILITY == 1 )
 
-	void vStreamBufferSetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer, UBaseType_t uxStreamBufferNumber )
-	{
-		xStreamBuffer->uxStreamBufferNumber = uxStreamBufferNumber;
-	}
+    void vStreamBufferSetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer,
+                                             UBaseType_t uxStreamBufferNumber )
+    {
+        xStreamBuffer->uxStreamBufferNumber = uxStreamBufferNumber;
+    }
 
 #endif /* configUSE_TRACE_FACILITY */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_TRACE_FACILITY == 1 )
 
-	uint8_t ucStreamBufferGetStreamBufferType( StreamBufferHandle_t xStreamBuffer )
-	{
-		return ( xStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER );
-	}
+    uint8_t ucStreamBufferGetStreamBufferType( StreamBufferHandle_t xStreamBuffer )
+    {
+        return( xStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER );
+    }
 
 #endif /* configUSE_TRACE_FACILITY */
 /*-----------------------------------------------------------*/
diff --git a/tasks.c b/tasks.c
index d63f6ccfd..038a2b4cc 100644
--- a/tasks.c
+++ b/tasks.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,10 +19,9 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /* Standard includes. */
@@ -30,8 +29,8 @@
 #include 
 
 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
-all the API functions to use the MPU wrappers.  That should only be done when
-task.h is included from an application file. */
+ * all the API functions to use the MPU wrappers.  That should only be done when
+ * task.h is included from an application file. */
 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
 /* FreeRTOS includes. */
@@ -41,173 +40,175 @@ task.h is included from an application file. */
 #include "stack_macros.h"
 
 /* Lint e9021, e961 and e750 are suppressed as a MISRA exception justified
-because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined
-for the header files above, but not in this file, in order to generate the
-correct privileged Vs unprivileged linkage and placement. */
+ * because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined
+ * for the header files above, but not in this file, in order to generate the
+ * correct privileged Vs unprivileged linkage and placement. */
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750 !e9021. */
 
 /* Set configUSE_STATS_FORMATTING_FUNCTIONS to 2 to include the stats formatting
-functions but without including stdio.h here. */
+ * functions but without including stdio.h here. */
 #if ( configUSE_STATS_FORMATTING_FUNCTIONS == 1 )
-	/* At the bottom of this file are two optional functions that can be used
-	to generate human readable text from the raw data generated by the
-	uxTaskGetSystemState() function.  Note the formatting functions are provided
-	for convenience only, and are NOT considered part of the kernel. */
-	#include 
+
+/* At the bottom of this file are two optional functions that can be used
+ * to generate human readable text from the raw data generated by the
+ * uxTaskGetSystemState() function.  Note the formatting functions are provided
+ * for convenience only, and are NOT considered part of the kernel. */
+    #include 
 #endif /* configUSE_STATS_FORMATTING_FUNCTIONS == 1 ) */
 
-#if( configUSE_PREEMPTION == 0 )
-	/* If the cooperative scheduler is being used then a yield should not be
-	performed just because a higher priority task has been woken. */
-	#define taskYIELD_IF_USING_PREEMPTION()
+#if ( configUSE_PREEMPTION == 0 )
+
+/* If the cooperative scheduler is being used then a yield should not be
+ * performed just because a higher priority task has been woken. */
+    #define taskYIELD_IF_USING_PREEMPTION()
 #else
-	#define taskYIELD_IF_USING_PREEMPTION() portYIELD_WITHIN_API()
+    #define taskYIELD_IF_USING_PREEMPTION()    portYIELD_WITHIN_API()
 #endif
 
 /* Values that can be assigned to the ucNotifyState member of the TCB. */
-#define taskNOT_WAITING_NOTIFICATION	( ( uint8_t ) 0 )
-#define taskWAITING_NOTIFICATION		( ( uint8_t ) 1 )
-#define taskNOTIFICATION_RECEIVED		( ( uint8_t ) 2 )
+#define taskNOT_WAITING_NOTIFICATION              ( ( uint8_t ) 0 ) /* Must be zero as it is the initialised value. */
+#define taskWAITING_NOTIFICATION                  ( ( uint8_t ) 1 )
+#define taskNOTIFICATION_RECEIVED                 ( ( uint8_t ) 2 )
 
 /*
  * The value used to fill the stack of a task when the task is created.  This
  * is used purely for checking the high water mark for tasks.
  */
-#define tskSTACK_FILL_BYTE	( 0xa5U )
+#define tskSTACK_FILL_BYTE                        ( 0xa5U )
 
 /* Bits used to recored how a task's stack and TCB were allocated. */
-#define tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB 		( ( uint8_t ) 0 )
-#define tskSTATICALLY_ALLOCATED_STACK_ONLY 			( ( uint8_t ) 1 )
-#define tskSTATICALLY_ALLOCATED_STACK_AND_TCB		( ( uint8_t ) 2 )
+#define tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB    ( ( uint8_t ) 0 )
+#define tskSTATICALLY_ALLOCATED_STACK_ONLY        ( ( uint8_t ) 1 )
+#define tskSTATICALLY_ALLOCATED_STACK_AND_TCB     ( ( uint8_t ) 2 )
 
 /* If any of the following are set then task stacks are filled with a known
-value so the high water mark can be determined.  If none of the following are
-set then don't fill the stack so there is no unnecessary dependency on memset. */
-#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) || ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) )
-	#define tskSET_NEW_STACKS_TO_KNOWN_VALUE	1
+ * value so the high water mark can be determined.  If none of the following are
+ * set then don't fill the stack so there is no unnecessary dependency on memset. */
+#if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) || ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) )
+    #define tskSET_NEW_STACKS_TO_KNOWN_VALUE    1
 #else
-	#define tskSET_NEW_STACKS_TO_KNOWN_VALUE	0
+    #define tskSET_NEW_STACKS_TO_KNOWN_VALUE    0
 #endif
 
 /*
  * Macros used by vListTask to indicate which state a task is in.
  */
-#define tskRUNNING_CHAR		( 'X' )
-#define tskBLOCKED_CHAR		( 'B' )
-#define tskREADY_CHAR		( 'R' )
-#define tskDELETED_CHAR		( 'D' )
-#define tskSUSPENDED_CHAR	( 'S' )
+#define tskRUNNING_CHAR      ( 'X' )
+#define tskBLOCKED_CHAR      ( 'B' )
+#define tskREADY_CHAR        ( 'R' )
+#define tskDELETED_CHAR      ( 'D' )
+#define tskSUSPENDED_CHAR    ( 'S' )
 
 /*
  * Some kernel aware debuggers require the data the debugger needs access to be
  * global, rather than file scope.
  */
 #ifdef portREMOVE_STATIC_QUALIFIER
-	#define static
+    #define static
 #endif
 
 /* The name allocated to the Idle task.  This can be overridden by defining
-configIDLE_TASK_NAME in FreeRTOSConfig.h. */
+ * configIDLE_TASK_NAME in FreeRTOSConfig.h. */
 #ifndef configIDLE_TASK_NAME
-	#define configIDLE_TASK_NAME "IDLE"
+    #define configIDLE_TASK_NAME    "IDLE"
 #endif
 
 #if ( configUSE_PORT_OPTIMISED_TASK_SELECTION == 0 )
 
-	/* If configUSE_PORT_OPTIMISED_TASK_SELECTION is 0 then task selection is
-	performed in a generic way that is not optimised to any particular
-	microcontroller architecture. */
+/* If configUSE_PORT_OPTIMISED_TASK_SELECTION is 0 then task selection is
+ * performed in a generic way that is not optimised to any particular
+ * microcontroller architecture. */
 
-	/* uxTopReadyPriority holds the priority of the highest priority ready
-	state task. */
-	#define taskRECORD_READY_PRIORITY( uxPriority )														\
-	{																									\
-		if( ( uxPriority ) > uxTopReadyPriority )														\
-		{																								\
-			uxTopReadyPriority = ( uxPriority );														\
-		}																								\
-	} /* taskRECORD_READY_PRIORITY */
+/* uxTopReadyPriority holds the priority of the highest priority ready
+ * state task. */
+    #define taskRECORD_READY_PRIORITY( uxPriority ) \
+    {                                               \
+        if( ( uxPriority ) > uxTopReadyPriority )   \
+        {                                           \
+            uxTopReadyPriority = ( uxPriority );    \
+        }                                           \
+    } /* taskRECORD_READY_PRIORITY */
 
-	/*-----------------------------------------------------------*/
+/*-----------------------------------------------------------*/
 
-	#define taskSELECT_HIGHEST_PRIORITY_TASK()															\
-	{																									\
-	UBaseType_t uxTopPriority = uxTopReadyPriority;														\
-																										\
-		/* Find the highest priority queue that contains ready tasks. */								\
-		while( listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxTopPriority ] ) ) )							\
-		{																								\
-			configASSERT( uxTopPriority );																\
-			--uxTopPriority;																			\
-		}																								\
-																										\
-		/* listGET_OWNER_OF_NEXT_ENTRY indexes through the list, so the tasks of						\
-		the	same priority get an equal share of the processor time. */									\
-		listGET_OWNER_OF_NEXT_ENTRY( pxCurrentTCB, &( pxReadyTasksLists[ uxTopPriority ] ) );			\
-		uxTopReadyPriority = uxTopPriority;																\
-	} /* taskSELECT_HIGHEST_PRIORITY_TASK */
+    #define taskSELECT_HIGHEST_PRIORITY_TASK()                                \
+    {                                                                         \
+        UBaseType_t uxTopPriority = uxTopReadyPriority;                       \
+                                                                              \
+        /* Find the highest priority queue that contains ready tasks. */      \
+        while( listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxTopPriority ] ) ) ) \
+        {                                                                     \
+            configASSERT( uxTopPriority );                                    \
+            --uxTopPriority;                                                  \
+        }                                                                     \
+                                                                              \
+        /* listGET_OWNER_OF_NEXT_ENTRY indexes through the list, so the tasks of \
+         * the  same priority get an equal share of the processor time. */                    \
+        listGET_OWNER_OF_NEXT_ENTRY( pxCurrentTCB, &( pxReadyTasksLists[ uxTopPriority ] ) ); \
+        uxTopReadyPriority = uxTopPriority;                                                   \
+    } /* taskSELECT_HIGHEST_PRIORITY_TASK */
 
-	/*-----------------------------------------------------------*/
+/*-----------------------------------------------------------*/
 
-	/* Define away taskRESET_READY_PRIORITY() and portRESET_READY_PRIORITY() as
-	they are only required when a port optimised method of task selection is
-	being used. */
-	#define taskRESET_READY_PRIORITY( uxPriority )
-	#define portRESET_READY_PRIORITY( uxPriority, uxTopReadyPriority )
+/* Define away taskRESET_READY_PRIORITY() and portRESET_READY_PRIORITY() as
+ * they are only required when a port optimised method of task selection is
+ * being used. */
+    #define taskRESET_READY_PRIORITY( uxPriority )
+    #define portRESET_READY_PRIORITY( uxPriority, uxTopReadyPriority )
 
 #else /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
 
-	/* If configUSE_PORT_OPTIMISED_TASK_SELECTION is 1 then task selection is
-	performed in a way that is tailored to the particular microcontroller
-	architecture being used. */
+/* If configUSE_PORT_OPTIMISED_TASK_SELECTION is 1 then task selection is
+ * performed in a way that is tailored to the particular microcontroller
+ * architecture being used. */
 
-	/* A port optimised version is provided.  Call the port defined macros. */
-	#define taskRECORD_READY_PRIORITY( uxPriority )	portRECORD_READY_PRIORITY( uxPriority, uxTopReadyPriority )
+/* A port optimised version is provided.  Call the port defined macros. */
+    #define taskRECORD_READY_PRIORITY( uxPriority )    portRECORD_READY_PRIORITY( uxPriority, uxTopReadyPriority )
 
-	/*-----------------------------------------------------------*/
+/*-----------------------------------------------------------*/
 
-	#define taskSELECT_HIGHEST_PRIORITY_TASK()														\
-	{																								\
-	UBaseType_t uxTopPriority;																		\
-																									\
-		/* Find the highest priority list that contains ready tasks. */								\
-		portGET_HIGHEST_PRIORITY( uxTopPriority, uxTopReadyPriority );								\
-		configASSERT( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ uxTopPriority ] ) ) > 0 );		\
-		listGET_OWNER_OF_NEXT_ENTRY( pxCurrentTCB, &( pxReadyTasksLists[ uxTopPriority ] ) );		\
-	} /* taskSELECT_HIGHEST_PRIORITY_TASK() */
+    #define taskSELECT_HIGHEST_PRIORITY_TASK()                                                  \
+    {                                                                                           \
+        UBaseType_t uxTopPriority;                                                              \
+                                                                                                \
+        /* Find the highest priority list that contains ready tasks. */                         \
+        portGET_HIGHEST_PRIORITY( uxTopPriority, uxTopReadyPriority );                          \
+        configASSERT( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ uxTopPriority ] ) ) > 0 ); \
+        listGET_OWNER_OF_NEXT_ENTRY( pxCurrentTCB, &( pxReadyTasksLists[ uxTopPriority ] ) );   \
+    } /* taskSELECT_HIGHEST_PRIORITY_TASK() */
 
-	/*-----------------------------------------------------------*/
+/*-----------------------------------------------------------*/
 
-	/* A port optimised version is provided, call it only if the TCB being reset
-	is being referenced from a ready list.  If it is referenced from a delayed
-	or suspended list then it won't be in a ready list. */
-	#define taskRESET_READY_PRIORITY( uxPriority )														\
-	{																									\
-		if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ ( uxPriority ) ] ) ) == ( UBaseType_t ) 0 )	\
-		{																								\
-			portRESET_READY_PRIORITY( ( uxPriority ), ( uxTopReadyPriority ) );							\
-		}																								\
-	}
+/* A port optimised version is provided, call it only if the TCB being reset
+ * is being referenced from a ready list.  If it is referenced from a delayed
+ * or suspended list then it won't be in a ready list. */
+    #define taskRESET_READY_PRIORITY( uxPriority )                                                     \
+    {                                                                                                  \
+        if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ ( uxPriority ) ] ) ) == ( UBaseType_t ) 0 ) \
+        {                                                                                              \
+            portRESET_READY_PRIORITY( ( uxPriority ), ( uxTopReadyPriority ) );                        \
+        }                                                                                              \
+    }
 
 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
 
 /*-----------------------------------------------------------*/
 
 /* pxDelayedTaskList and pxOverflowDelayedTaskList are switched when the tick
-count overflows. */
-#define taskSWITCH_DELAYED_LISTS()																	\
-{																									\
-	List_t *pxTemp;																					\
-																									\
-	/* The delayed tasks list should be empty when the lists are switched. */						\
-	configASSERT( ( listLIST_IS_EMPTY( pxDelayedTaskList ) ) );										\
-																									\
-	pxTemp = pxDelayedTaskList;																		\
-	pxDelayedTaskList = pxOverflowDelayedTaskList;													\
-	pxOverflowDelayedTaskList = pxTemp;																\
-	xNumOfOverflows++;																				\
-	prvResetNextTaskUnblockTime();																	\
-}
+ * count overflows. */
+#define taskSWITCH_DELAYED_LISTS()                                                \
+    {                                                                             \
+        List_t * pxTemp;                                                          \
+                                                                                  \
+        /* The delayed tasks list should be empty when the lists are switched. */ \
+        configASSERT( ( listLIST_IS_EMPTY( pxDelayedTaskList ) ) );               \
+                                                                                  \
+        pxTemp = pxDelayedTaskList;                                               \
+        pxDelayedTaskList = pxOverflowDelayedTaskList;                            \
+        pxOverflowDelayedTaskList = pxTemp;                                       \
+        xNumOfOverflows++;                                                        \
+        prvResetNextTaskUnblockTime();                                            \
+    }
 
 /*-----------------------------------------------------------*/
 
@@ -215,11 +216,11 @@ count overflows. */
  * Place the task represented by pxTCB into the appropriate ready list for
  * the task.  It is inserted at the end of the list.
  */
-#define prvAddTaskToReadyList( pxTCB )																\
-	traceMOVED_TASK_TO_READY_STATE( pxTCB );														\
-	taskRECORD_READY_PRIORITY( ( pxTCB )->uxPriority );												\
-	vListInsertEnd( &( pxReadyTasksLists[ ( pxTCB )->uxPriority ] ), &( ( pxTCB )->xStateListItem ) ); \
-	tracePOST_MOVED_TASK_TO_READY_STATE( pxTCB )
+#define prvAddTaskToReadyList( pxTCB )                                                                 \
+    traceMOVED_TASK_TO_READY_STATE( pxTCB );                                                           \
+    taskRECORD_READY_PRIORITY( ( pxTCB )->uxPriority );                                                \
+    vListInsertEnd( &( pxReadyTasksLists[ ( pxTCB )->uxPriority ] ), &( ( pxTCB )->xStateListItem ) ); \
+    tracePOST_MOVED_TASK_TO_READY_STATE( pxTCB )
 /*-----------------------------------------------------------*/
 
 /*
@@ -228,20 +229,20 @@ count overflows. */
  * task should be used in place of the parameter.  This macro simply checks to
  * see if the parameter is NULL and returns a pointer to the appropriate TCB.
  */
-#define prvGetTCBFromHandle( pxHandle ) ( ( ( pxHandle ) == NULL ) ? pxCurrentTCB : ( pxHandle ) )
+#define prvGetTCBFromHandle( pxHandle )    ( ( ( pxHandle ) == NULL ) ? pxCurrentTCB : ( pxHandle ) )
 
 /* The item value of the event list item is normally used to hold the priority
-of the task to which it belongs (coded to allow it to be held in reverse
-priority order).  However, it is occasionally borrowed for other purposes.  It
-is important its value is not updated due to a task priority change while it is
-being used for another purpose.  The following bit definition is used to inform
-the scheduler that the value should not be changed - in which case it is the
-responsibility of whichever module is using the value to ensure it gets set back
-to its original value when it is released. */
-#if( configUSE_16_BIT_TICKS == 1 )
-	#define taskEVENT_LIST_ITEM_VALUE_IN_USE	0x8000U
+ * of the task to which it belongs (coded to allow it to be held in reverse
+ * priority order).  However, it is occasionally borrowed for other purposes.  It
+ * is important its value is not updated due to a task priority change while it is
+ * being used for another purpose.  The following bit definition is used to inform
+ * the scheduler that the value should not be changed - in which case it is the
+ * responsibility of whichever module is using the value to ensure it gets set back
+ * to its original value when it is released. */
+#if ( configUSE_16_BIT_TICKS == 1 )
+    #define taskEVENT_LIST_ITEM_VALUE_IN_USE    0x8000U
 #else
-	#define taskEVENT_LIST_ITEM_VALUE_IN_USE	0x80000000UL
+    #define taskEVENT_LIST_ITEM_VALUE_IN_USE    0x80000000UL
 #endif
 
 /*
@@ -249,151 +250,151 @@ to its original value when it is released. */
  * and stores task state information, including a pointer to the task's context
  * (the task's run time environment, including register values)
  */
-typedef struct tskTaskControlBlock 			/* The old naming convention is used to prevent breaking kernel aware debuggers. */
+typedef struct tskTaskControlBlock       /* The old naming convention is used to prevent breaking kernel aware debuggers. */
 {
-	volatile StackType_t	*pxTopOfStack;	/*< Points to the location of the last item placed on the tasks stack.  THIS MUST BE THE FIRST MEMBER OF THE TCB STRUCT. */
+    volatile StackType_t * pxTopOfStack; /*< Points to the location of the last item placed on the tasks stack.  THIS MUST BE THE FIRST MEMBER OF THE TCB STRUCT. */
 
-	#if ( portUSING_MPU_WRAPPERS == 1 )
-		xMPU_SETTINGS	xMPUSettings;		/*< The MPU settings are defined as part of the port layer.  THIS MUST BE THE SECOND MEMBER OF THE TCB STRUCT. */
-	#endif
+    #if ( portUSING_MPU_WRAPPERS == 1 )
+        xMPU_SETTINGS xMPUSettings; /*< The MPU settings are defined as part of the port layer.  THIS MUST BE THE SECOND MEMBER OF THE TCB STRUCT. */
+    #endif
 
-	ListItem_t			xStateListItem;	/*< The list that the state list item of a task is reference from denotes the state of that task (Ready, Blocked, Suspended ). */
-	ListItem_t			xEventListItem;		/*< Used to reference a task from an event list. */
-	UBaseType_t			uxPriority;			/*< The priority of the task.  0 is the lowest priority. */
-	StackType_t			*pxStack;			/*< Points to the start of the stack. */
-	char				pcTaskName[ configMAX_TASK_NAME_LEN ];/*< Descriptive name given to the task when created.  Facilitates debugging only. */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+    ListItem_t xStateListItem;                  /*< The list that the state list item of a task is reference from denotes the state of that task (Ready, Blocked, Suspended ). */
+    ListItem_t xEventListItem;                  /*< Used to reference a task from an event list. */
+    UBaseType_t uxPriority;                     /*< The priority of the task.  0 is the lowest priority. */
+    StackType_t * pxStack;                      /*< Points to the start of the stack. */
+    char pcTaskName[ configMAX_TASK_NAME_LEN ]; /*< Descriptive name given to the task when created.  Facilitates debugging only. */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
-	#if ( ( portSTACK_GROWTH > 0 ) || ( configRECORD_STACK_HIGH_ADDRESS == 1 ) )
-		StackType_t		*pxEndOfStack;		/*< Points to the highest valid address for the stack. */
-	#endif
+    #if ( ( portSTACK_GROWTH > 0 ) || ( configRECORD_STACK_HIGH_ADDRESS == 1 ) )
+        StackType_t * pxEndOfStack; /*< Points to the highest valid address for the stack. */
+    #endif
 
-	#if ( portCRITICAL_NESTING_IN_TCB == 1 )
-		UBaseType_t		uxCriticalNesting;	/*< Holds the critical section nesting depth for ports that do not maintain their own count in the port layer. */
-	#endif
+    #if ( portCRITICAL_NESTING_IN_TCB == 1 )
+        UBaseType_t uxCriticalNesting; /*< Holds the critical section nesting depth for ports that do not maintain their own count in the port layer. */
+    #endif
 
-	#if ( configUSE_TRACE_FACILITY == 1 )
-		UBaseType_t		uxTCBNumber;		/*< Stores a number that increments each time a TCB is created.  It allows debuggers to determine when a task has been deleted and then recreated. */
-		UBaseType_t		uxTaskNumber;		/*< Stores a number specifically for use by third party trace code. */
-	#endif
+    #if ( configUSE_TRACE_FACILITY == 1 )
+        UBaseType_t uxTCBNumber;  /*< Stores a number that increments each time a TCB is created.  It allows debuggers to determine when a task has been deleted and then recreated. */
+        UBaseType_t uxTaskNumber; /*< Stores a number specifically for use by third party trace code. */
+    #endif
 
-	#if ( configUSE_MUTEXES == 1 )
-		UBaseType_t		uxBasePriority;		/*< The priority last assigned to the task - used by the priority inheritance mechanism. */
-		UBaseType_t		uxMutexesHeld;
-	#endif
+    #if ( configUSE_MUTEXES == 1 )
+        UBaseType_t uxBasePriority; /*< The priority last assigned to the task - used by the priority inheritance mechanism. */
+        UBaseType_t uxMutexesHeld;
+    #endif
 
-	#if ( configUSE_APPLICATION_TASK_TAG == 1 )
-		TaskHookFunction_t pxTaskTag;
-	#endif
+    #if ( configUSE_APPLICATION_TASK_TAG == 1 )
+        TaskHookFunction_t pxTaskTag;
+    #endif
 
-	#if( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 )
-		void			*pvThreadLocalStoragePointers[ configNUM_THREAD_LOCAL_STORAGE_POINTERS ];
-	#endif
+    #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 )
+        void * pvThreadLocalStoragePointers[ configNUM_THREAD_LOCAL_STORAGE_POINTERS ];
+    #endif
 
-	#if( configGENERATE_RUN_TIME_STATS == 1 )
-		uint32_t		ulRunTimeCounter;	/*< Stores the amount of time the task has spent in the Running state. */
-	#endif
+    #if ( configGENERATE_RUN_TIME_STATS == 1 )
+        uint32_t ulRunTimeCounter; /*< Stores the amount of time the task has spent in the Running state. */
+    #endif
 
-	#if ( configUSE_NEWLIB_REENTRANT == 1 )
-		/* Allocate a Newlib reent structure that is specific to this task.
-		Note Newlib support has been included by popular demand, but is not
-		used by the FreeRTOS maintainers themselves.  FreeRTOS is not
-		responsible for resulting newlib operation.  User must be familiar with
-		newlib and must provide system-wide implementations of the necessary
-		stubs. Be warned that (at the time of writing) the current newlib design
-		implements a system-wide malloc() that must be provided with locks.
+    #if ( configUSE_NEWLIB_REENTRANT == 1 )
 
-		See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
-		for additional information. */
-		struct	_reent xNewLib_reent;
-	#endif
+        /* Allocate a Newlib reent structure that is specific to this task.
+         * Note Newlib support has been included by popular demand, but is not
+         * used by the FreeRTOS maintainers themselves.  FreeRTOS is not
+         * responsible for resulting newlib operation.  User must be familiar with
+         * newlib and must provide system-wide implementations of the necessary
+         * stubs. Be warned that (at the time of writing) the current newlib design
+         * implements a system-wide malloc() that must be provided with locks.
+         *
+         * See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
+         * for additional information. */
+        struct  _reent xNewLib_reent;
+    #endif
 
-	#if( configUSE_TASK_NOTIFICATIONS == 1 )
-		volatile uint32_t ulNotifiedValue;
-		volatile uint8_t ucNotifyState;
-	#endif
+    #if ( configUSE_TASK_NOTIFICATIONS == 1 )
+        volatile uint32_t ulNotifiedValue[ configTASK_NOTIFICATION_ARRAY_ENTRIES ];
+        volatile uint8_t ucNotifyState[ configTASK_NOTIFICATION_ARRAY_ENTRIES ];
+    #endif
 
-	/* See the comments in FreeRTOS.h with the definition of
-	tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE. */
-	#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
-		uint8_t	ucStaticallyAllocated; 		/*< Set to pdTRUE if the task is a statically allocated to ensure no attempt is made to free the memory. */
-	#endif
+    /* See the comments in FreeRTOS.h with the definition of
+     * tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE. */
+    #if ( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
+        uint8_t ucStaticallyAllocated;                     /*< Set to pdTRUE if the task is a statically allocated to ensure no attempt is made to free the memory. */
+    #endif
 
-	#if( INCLUDE_xTaskAbortDelay == 1 )
-		uint8_t ucDelayAborted;
-	#endif
-
-	#if( configUSE_POSIX_ERRNO == 1 )
-		int iTaskErrno;
-	#endif
+    #if ( INCLUDE_xTaskAbortDelay == 1 )
+        uint8_t ucDelayAborted;
+    #endif
 
+    #if ( configUSE_POSIX_ERRNO == 1 )
+        int iTaskErrno;
+    #endif
 } tskTCB;
 
 /* The old tskTCB name is maintained above then typedefed to the new TCB_t name
-below to enable the use of older kernel aware debuggers. */
+ * below to enable the use of older kernel aware debuggers. */
 typedef tskTCB TCB_t;
 
 /*lint -save -e956 A manual analysis and inspection has been used to determine
-which static variables must be declared volatile. */
+ * which static variables must be declared volatile. */
 PRIVILEGED_DATA TCB_t * volatile pxCurrentTCB = NULL;
 
 /* Lists for ready and blocked tasks. --------------------
-xDelayedTaskList1 and xDelayedTaskList2 could be move to function scople but
-doing so breaks some kernel aware debuggers and debuggers that rely on removing
-the static qualifier. */
-PRIVILEGED_DATA static List_t pxReadyTasksLists[ configMAX_PRIORITIES ];/*< Prioritised ready tasks. */
-PRIVILEGED_DATA static List_t xDelayedTaskList1;						/*< Delayed tasks. */
-PRIVILEGED_DATA static List_t xDelayedTaskList2;						/*< Delayed tasks (two lists are used - one for delays that have overflowed the current tick count. */
-PRIVILEGED_DATA static List_t * volatile pxDelayedTaskList;				/*< Points to the delayed task list currently being used. */
-PRIVILEGED_DATA static List_t * volatile pxOverflowDelayedTaskList;		/*< Points to the delayed task list currently being used to hold tasks that have overflowed the current tick count. */
-PRIVILEGED_DATA static List_t xPendingReadyList;						/*< Tasks that have been readied while the scheduler was suspended.  They will be moved to the ready list when the scheduler is resumed. */
+ * xDelayedTaskList1 and xDelayedTaskList2 could be move to function scople but
+ * doing so breaks some kernel aware debuggers and debuggers that rely on removing
+ * the static qualifier. */
+PRIVILEGED_DATA static List_t pxReadyTasksLists[ configMAX_PRIORITIES ]; /*< Prioritised ready tasks. */
+PRIVILEGED_DATA static List_t xDelayedTaskList1;                         /*< Delayed tasks. */
+PRIVILEGED_DATA static List_t xDelayedTaskList2;                         /*< Delayed tasks (two lists are used - one for delays that have overflowed the current tick count. */
+PRIVILEGED_DATA static List_t * volatile pxDelayedTaskList;              /*< Points to the delayed task list currently being used. */
+PRIVILEGED_DATA static List_t * volatile pxOverflowDelayedTaskList;      /*< Points to the delayed task list currently being used to hold tasks that have overflowed the current tick count. */
+PRIVILEGED_DATA static List_t xPendingReadyList;                         /*< Tasks that have been readied while the scheduler was suspended.  They will be moved to the ready list when the scheduler is resumed. */
 
-#if( INCLUDE_vTaskDelete == 1 )
+#if ( INCLUDE_vTaskDelete == 1 )
 
-	PRIVILEGED_DATA static List_t xTasksWaitingTermination;				/*< Tasks that have been deleted - but their memory not yet freed. */
-	PRIVILEGED_DATA static volatile UBaseType_t uxDeletedTasksWaitingCleanUp = ( UBaseType_t ) 0U;
+    PRIVILEGED_DATA static List_t xTasksWaitingTermination; /*< Tasks that have been deleted - but their memory not yet freed. */
+    PRIVILEGED_DATA static volatile UBaseType_t uxDeletedTasksWaitingCleanUp = ( UBaseType_t ) 0U;
 
 #endif
 
 #if ( INCLUDE_vTaskSuspend == 1 )
 
-	PRIVILEGED_DATA static List_t xSuspendedTaskList;					/*< Tasks that are currently suspended. */
+    PRIVILEGED_DATA static List_t xSuspendedTaskList; /*< Tasks that are currently suspended. */
 
 #endif
 
 /* Global POSIX errno. Its value is changed upon context switching to match
-the errno of the currently running task. */
+ * the errno of the currently running task. */
 #if ( configUSE_POSIX_ERRNO == 1 )
-	int FreeRTOS_errno = 0;
+    int FreeRTOS_errno = 0;
 #endif
 
 /* Other file private variables. --------------------------------*/
-PRIVILEGED_DATA static volatile UBaseType_t uxCurrentNumberOfTasks 	= ( UBaseType_t ) 0U;
-PRIVILEGED_DATA static volatile TickType_t xTickCount 				= ( TickType_t ) configINITIAL_TICK_COUNT;
-PRIVILEGED_DATA static volatile UBaseType_t uxTopReadyPriority 		= tskIDLE_PRIORITY;
-PRIVILEGED_DATA static volatile BaseType_t xSchedulerRunning 		= pdFALSE;
-PRIVILEGED_DATA static volatile TickType_t xPendedTicks 			= ( TickType_t ) 0U;
-PRIVILEGED_DATA static volatile BaseType_t xYieldPending 			= pdFALSE;
-PRIVILEGED_DATA static volatile BaseType_t xNumOfOverflows 			= ( BaseType_t ) 0;
-PRIVILEGED_DATA static UBaseType_t uxTaskNumber 					= ( UBaseType_t ) 0U;
-PRIVILEGED_DATA static volatile TickType_t xNextTaskUnblockTime		= ( TickType_t ) 0U; /* Initialised to portMAX_DELAY before the scheduler starts. */
-PRIVILEGED_DATA static TaskHandle_t xIdleTaskHandle					= NULL;			/*< Holds the handle of the idle task.  The idle task is created automatically when the scheduler is started. */
+PRIVILEGED_DATA static volatile UBaseType_t uxCurrentNumberOfTasks = ( UBaseType_t ) 0U;
+PRIVILEGED_DATA static volatile TickType_t xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT;
+PRIVILEGED_DATA static volatile UBaseType_t uxTopReadyPriority = tskIDLE_PRIORITY;
+PRIVILEGED_DATA static volatile BaseType_t xSchedulerRunning = pdFALSE;
+PRIVILEGED_DATA static volatile TickType_t xPendedTicks = ( TickType_t ) 0U;
+PRIVILEGED_DATA static volatile BaseType_t xYieldPending = pdFALSE;
+PRIVILEGED_DATA static volatile BaseType_t xNumOfOverflows = ( BaseType_t ) 0;
+PRIVILEGED_DATA static UBaseType_t uxTaskNumber = ( UBaseType_t ) 0U;
+PRIVILEGED_DATA static volatile TickType_t xNextTaskUnblockTime = ( TickType_t ) 0U; /* Initialised to portMAX_DELAY before the scheduler starts. */
+PRIVILEGED_DATA static TaskHandle_t xIdleTaskHandle = NULL;                          /*< Holds the handle of the idle task.  The idle task is created automatically when the scheduler is started. */
 
 /* Context switches are held pending while the scheduler is suspended.  Also,
-interrupts must not manipulate the xStateListItem of a TCB, or any of the
-lists the xStateListItem can be referenced from, if the scheduler is suspended.
-If an interrupt needs to unblock a task while the scheduler is suspended then it
-moves the task's event list item into the xPendingReadyList, ready for the
-kernel to move the task from the pending ready list into the real ready list
-when the scheduler is unsuspended.  The pending ready list itself can only be
-accessed from a critical section. */
-PRIVILEGED_DATA static volatile UBaseType_t uxSchedulerSuspended	= ( UBaseType_t ) pdFALSE;
+ * interrupts must not manipulate the xStateListItem of a TCB, or any of the
+ * lists the xStateListItem can be referenced from, if the scheduler is suspended.
+ * If an interrupt needs to unblock a task while the scheduler is suspended then it
+ * moves the task's event list item into the xPendingReadyList, ready for the
+ * kernel to move the task from the pending ready list into the real ready list
+ * when the scheduler is unsuspended.  The pending ready list itself can only be
+ * accessed from a critical section. */
+PRIVILEGED_DATA static volatile UBaseType_t uxSchedulerSuspended = ( UBaseType_t ) pdFALSE;
 
 #if ( configGENERATE_RUN_TIME_STATS == 1 )
 
-	/* Do not move these variables to function scope as doing so prevents the
-	code working with debuggers that need to remove the static qualifier. */
-	PRIVILEGED_DATA static uint32_t ulTaskSwitchedInTime = 0UL;	/*< Holds the value of a timer/counter the last time a task was switched in. */
-	PRIVILEGED_DATA static uint32_t ulTotalRunTime = 0UL;		/*< Holds the total amount of execution time as defined by the run time counter clock. */
+/* Do not move these variables to function scope as doing so prevents the
+ * code working with debuggers that need to remove the static qualifier. */
+    PRIVILEGED_DATA static uint32_t ulTaskSwitchedInTime = 0UL;    /*< Holds the value of a timer/counter the last time a task was switched in. */
+    PRIVILEGED_DATA static volatile uint32_t ulTotalRunTime = 0UL; /*< Holds the total amount of execution time as defined by the run time counter clock. */
 
 #endif
 
@@ -401,25 +402,6 @@ PRIVILEGED_DATA static volatile UBaseType_t uxSchedulerSuspended	= ( UBaseType_t
 
 /*-----------------------------------------------------------*/
 
-/* Callback function prototypes. --------------------------*/
-#if(  configCHECK_FOR_STACK_OVERFLOW > 0 )
-
-	extern void vApplicationStackOverflowHook( TaskHandle_t xTask, char *pcTaskName );
-
-#endif
-
-#if( configUSE_TICK_HOOK > 0 )
-
-	extern void vApplicationTickHook( void ); /*lint !e526 Symbol not defined as it is an application callback. */
-
-#endif
-
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-
-	extern void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize ); /*lint !e526 Symbol not defined as it is an application callback. */
-
-#endif
-
 /* File private functions. --------------------------------*/
 
 /**
@@ -429,7 +411,7 @@ PRIVILEGED_DATA static volatile UBaseType_t uxSchedulerSuspended	= ( UBaseType_t
  */
 #if ( INCLUDE_vTaskSuspend == 1 )
 
-	static BaseType_t prvTaskIsTaskSuspended( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+    static BaseType_t prvTaskIsTaskSuspended( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
 
 #endif /* INCLUDE_vTaskSuspend */
 
@@ -450,7 +432,7 @@ static void prvInitialiseTaskLists( void ) PRIVILEGED_FUNCTION;
  * void prvIdleTask( void *pvParameters );
  *
  */
-static portTASK_FUNCTION_PROTO( prvIdleTask, pvParameters );
+static portTASK_FUNCTION_PROTO( prvIdleTask, pvParameters ) PRIVILEGED_FUNCTION;
 
 /*
  * Utility to free all memory allocated by the scheduler to hold a TCB,
@@ -461,7 +443,7 @@ static portTASK_FUNCTION_PROTO( prvIdleTask, pvParameters );
  */
 #if ( INCLUDE_vTaskDelete == 1 )
 
-	static void prvDeleteTCB( TCB_t *pxTCB ) PRIVILEGED_FUNCTION;
+    static void prvDeleteTCB( TCB_t * pxTCB ) PRIVILEGED_FUNCTION;
 
 #endif
 
@@ -476,7 +458,8 @@ static void prvCheckTasksWaitingTermination( void ) PRIVILEGED_FUNCTION;
  * The currently executing task is entering the Blocked state.  Add the task to
  * either the current or the overflow delayed task list.
  */
-static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely ) PRIVILEGED_FUNCTION;
+static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait,
+                                            const BaseType_t xCanBlockIndefinitely ) PRIVILEGED_FUNCTION;
 
 /*
  * Fills an TaskStatus_t structure with information on each task that is
@@ -488,7 +471,9 @@ static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseT
  */
 #if ( configUSE_TRACE_FACILITY == 1 )
 
-	static UBaseType_t prvListTasksWithinSingleList( TaskStatus_t *pxTaskStatusArray, List_t *pxList, eTaskState eState ) PRIVILEGED_FUNCTION;
+    static UBaseType_t prvListTasksWithinSingleList( TaskStatus_t * pxTaskStatusArray,
+                                                     List_t * pxList,
+                                                     eTaskState eState ) PRIVILEGED_FUNCTION;
 
 #endif
 
@@ -498,7 +483,8 @@ static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseT
  */
 #if ( INCLUDE_xTaskGetHandle == 1 )
 
-	static TCB_t *prvSearchForNameWithinSingleList( List_t *pxList, const char pcNameToQuery[] ) PRIVILEGED_FUNCTION;
+    static TCB_t * prvSearchForNameWithinSingleList( List_t * pxList,
+                                                     const char pcNameToQuery[] ) PRIVILEGED_FUNCTION;
 
 #endif
 
@@ -509,7 +495,7 @@ static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseT
  */
 #if ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) )
 
-	static configSTACK_DEPTH_TYPE prvTaskCheckFreeStackSpace( const uint8_t * pucStackByte ) PRIVILEGED_FUNCTION;
+    static configSTACK_DEPTH_TYPE prvTaskCheckFreeStackSpace( const uint8_t * pucStackByte ) PRIVILEGED_FUNCTION;
 
 #endif
 
@@ -524,7 +510,7 @@ static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseT
  */
 #if ( configUSE_TICKLESS_IDLE != 0 )
 
-	static TickType_t prvGetExpectedIdleTime( void ) PRIVILEGED_FUNCTION;
+    static TickType_t prvGetExpectedIdleTime( void ) PRIVILEGED_FUNCTION;
 
 #endif
 
@@ -532,15 +518,16 @@ static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseT
  * Set xNextTaskUnblockTime to the time at which the next Blocked state task
  * will exit the Blocked state.
  */
-static void prvResetNextTaskUnblockTime( void );
+static void prvResetNextTaskUnblockTime( void ) PRIVILEGED_FUNCTION;
 
 #if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) )
 
-	/*
-	 * Helper function used to pad task names with spaces when printing out
-	 * human readable tables of task information.
-	 */
-	static char *prvWriteNameToBuffer( char *pcBuffer, const char *pcTaskName ) PRIVILEGED_FUNCTION;
+/*
+ * Helper function used to pad task names with spaces when printing out
+ * human readable tables of task information.
+ */
+    static char * prvWriteNameToBuffer( char * pcBuffer,
+                                        const char * pcTaskName ) PRIVILEGED_FUNCTION;
 
 #endif
 
@@ -548,20 +535,20 @@ static void prvResetNextTaskUnblockTime( void );
  * Called after a Task_t structure has been allocated either statically or
  * dynamically to fill in the structure's members.
  */
-static void prvInitialiseNewTask( 	TaskFunction_t pxTaskCode,
-									const char * const pcName, 		/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-									const uint32_t ulStackDepth,
-									void * const pvParameters,
-									UBaseType_t uxPriority,
-									TaskHandle_t * const pxCreatedTask,
-									TCB_t *pxNewTCB,
-									const MemoryRegion_t * const xRegions ) PRIVILEGED_FUNCTION;
+static void prvInitialiseNewTask( TaskFunction_t pxTaskCode,
+                                  const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+                                  const uint32_t ulStackDepth,
+                                  void * const pvParameters,
+                                  UBaseType_t uxPriority,
+                                  TaskHandle_t * const pxCreatedTask,
+                                  TCB_t * pxNewTCB,
+                                  const MemoryRegion_t * const xRegions ) PRIVILEGED_FUNCTION;
 
 /*
  * Called after a new task has been created and initialised to place the task
  * under the control of the scheduler.
  */
-static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB ) PRIVILEGED_FUNCTION;
+static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) PRIVILEGED_FUNCTION;
 
 /*
  * freertos_tasks_c_additions_init() should only be called if the user definable
@@ -570,1331 +557,1344 @@ static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB ) PRIVILEGED_FUNCTION;
  */
 #ifdef FREERTOS_TASKS_C_ADDITIONS_INIT
 
-	static void freertos_tasks_c_additions_init( void ) PRIVILEGED_FUNCTION;
+    static void freertos_tasks_c_additions_init( void ) PRIVILEGED_FUNCTION;
 
 #endif
 
 /*-----------------------------------------------------------*/
 
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
-	TaskHandle_t xTaskCreateStatic(	TaskFunction_t pxTaskCode,
-									const char * const pcName,		/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-									const uint32_t ulStackDepth,
-									void * const pvParameters,
-									UBaseType_t uxPriority,
-									StackType_t * const puxStackBuffer,
-									StaticTask_t * const pxTaskBuffer )
-	{
-	TCB_t *pxNewTCB;
-	TaskHandle_t xReturn;
+    TaskHandle_t xTaskCreateStatic( TaskFunction_t pxTaskCode,
+                                    const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+                                    const uint32_t ulStackDepth,
+                                    void * const pvParameters,
+                                    UBaseType_t uxPriority,
+                                    StackType_t * const puxStackBuffer,
+                                    StaticTask_t * const pxTaskBuffer )
+    {
+        TCB_t * pxNewTCB;
+        TaskHandle_t xReturn;
 
-		configASSERT( puxStackBuffer != NULL );
-		configASSERT( pxTaskBuffer != NULL );
+        configASSERT( puxStackBuffer != NULL );
+        configASSERT( pxTaskBuffer != NULL );
 
-		#if( configASSERT_DEFINED == 1 )
-		{
-			/* Sanity check that the size of the structure used to declare a
-			variable of type StaticTask_t equals the size of the real task
-			structure. */
-			volatile size_t xSize = sizeof( StaticTask_t );
-			configASSERT( xSize == sizeof( TCB_t ) );
-			( void ) xSize; /* Prevent lint warning when configASSERT() is not used. */
-		}
-		#endif /* configASSERT_DEFINED */
+        #if ( configASSERT_DEFINED == 1 )
+            {
+                /* Sanity check that the size of the structure used to declare a
+                 * variable of type StaticTask_t equals the size of the real task
+                 * structure. */
+                volatile size_t xSize = sizeof( StaticTask_t );
+                configASSERT( xSize == sizeof( TCB_t ) );
+                ( void ) xSize; /* Prevent lint warning when configASSERT() is not used. */
+            }
+        #endif /* configASSERT_DEFINED */
 
+        if( ( pxTaskBuffer != NULL ) && ( puxStackBuffer != NULL ) )
+        {
+            /* The memory used for the task's TCB and stack are passed into this
+             * function - use them. */
+            pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
+            pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer;
 
-		if( ( pxTaskBuffer != NULL ) && ( puxStackBuffer != NULL ) )
-		{
-			/* The memory used for the task's TCB and stack are passed into this
-			function - use them. */
-			pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
-			pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer;
+            #if ( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
+                {
+                    /* Tasks can be created statically or dynamically, so note this
+                     * task was created statically in case the task is later deleted. */
+                    pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB;
+                }
+            #endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
 
-			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
-			{
-				/* Tasks can be created statically or dynamically, so note this
-				task was created statically in case the task is later deleted. */
-				pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB;
-			}
-			#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
+            prvInitialiseNewTask( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, &xReturn, pxNewTCB, NULL );
+            prvAddNewTaskToReadyList( pxNewTCB );
+        }
+        else
+        {
+            xReturn = NULL;
+        }
 
-			prvInitialiseNewTask( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, &xReturn, pxNewTCB, NULL );
-			prvAddNewTaskToReadyList( pxNewTCB );
-		}
-		else
-		{
-			xReturn = NULL;
-		}
-
-		return xReturn;
-	}
+        return xReturn;
+    }
 
 #endif /* SUPPORT_STATIC_ALLOCATION */
 /*-----------------------------------------------------------*/
 
-#if( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
+#if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
 
-	BaseType_t xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask )
-	{
-	TCB_t *pxNewTCB;
-	BaseType_t xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
+    BaseType_t xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition,
+                                            TaskHandle_t * pxCreatedTask )
+    {
+        TCB_t * pxNewTCB;
+        BaseType_t xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
 
-		configASSERT( pxTaskDefinition->puxStackBuffer != NULL );
-		configASSERT( pxTaskDefinition->pxTaskBuffer != NULL );
+        configASSERT( pxTaskDefinition->puxStackBuffer != NULL );
+        configASSERT( pxTaskDefinition->pxTaskBuffer != NULL );
 
-		if( ( pxTaskDefinition->puxStackBuffer != NULL ) && ( pxTaskDefinition->pxTaskBuffer != NULL ) )
-		{
-			/* Allocate space for the TCB.  Where the memory comes from depends
-			on the implementation of the port malloc function and whether or
-			not static allocation is being used. */
-			pxNewTCB = ( TCB_t * ) pxTaskDefinition->pxTaskBuffer;
+        if( ( pxTaskDefinition->puxStackBuffer != NULL ) && ( pxTaskDefinition->pxTaskBuffer != NULL ) )
+        {
+            /* Allocate space for the TCB.  Where the memory comes from depends
+             * on the implementation of the port malloc function and whether or
+             * not static allocation is being used. */
+            pxNewTCB = ( TCB_t * ) pxTaskDefinition->pxTaskBuffer;
 
-			/* Store the stack location in the TCB. */
-			pxNewTCB->pxStack = pxTaskDefinition->puxStackBuffer;
+            /* Store the stack location in the TCB. */
+            pxNewTCB->pxStack = pxTaskDefinition->puxStackBuffer;
 
-			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 )
-			{
-				/* Tasks can be created statically or dynamically, so note this
-				task was created statically in case the task is later deleted. */
-				pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB;
-			}
-			#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
+            #if ( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 )
+                {
+                    /* Tasks can be created statically or dynamically, so note this
+                     * task was created statically in case the task is later deleted. */
+                    pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB;
+                }
+            #endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
 
-			prvInitialiseNewTask(	pxTaskDefinition->pvTaskCode,
-									pxTaskDefinition->pcName,
-									( uint32_t ) pxTaskDefinition->usStackDepth,
-									pxTaskDefinition->pvParameters,
-									pxTaskDefinition->uxPriority,
-									pxCreatedTask, pxNewTCB,
-									pxTaskDefinition->xRegions );
+            prvInitialiseNewTask( pxTaskDefinition->pvTaskCode,
+                                  pxTaskDefinition->pcName,
+                                  ( uint32_t ) pxTaskDefinition->usStackDepth,
+                                  pxTaskDefinition->pvParameters,
+                                  pxTaskDefinition->uxPriority,
+                                  pxCreatedTask, pxNewTCB,
+                                  pxTaskDefinition->xRegions );
 
-			prvAddNewTaskToReadyList( pxNewTCB );
-			xReturn = pdPASS;
-		}
+            prvAddNewTaskToReadyList( pxNewTCB );
+            xReturn = pdPASS;
+        }
 
-		return xReturn;
-	}
+        return xReturn;
+    }
 
 #endif /* ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) */
 /*-----------------------------------------------------------*/
 
-#if( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
+#if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
 
-	BaseType_t xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask )
-	{
-	TCB_t *pxNewTCB;
-	BaseType_t xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
+    BaseType_t xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition,
+                                      TaskHandle_t * pxCreatedTask )
+    {
+        TCB_t * pxNewTCB;
+        BaseType_t xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
 
-		configASSERT( pxTaskDefinition->puxStackBuffer );
+        configASSERT( pxTaskDefinition->puxStackBuffer );
 
-		if( pxTaskDefinition->puxStackBuffer != NULL )
-		{
-			/* Allocate space for the TCB.  Where the memory comes from depends
-			on the implementation of the port malloc function and whether or
-			not static allocation is being used. */
-			pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) );
+        if( pxTaskDefinition->puxStackBuffer != NULL )
+        {
+            /* Allocate space for the TCB.  Where the memory comes from depends
+             * on the implementation of the port malloc function and whether or
+             * not static allocation is being used. */
+            pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) );
 
-			if( pxNewTCB != NULL )
-			{
-				/* Store the stack location in the TCB. */
-				pxNewTCB->pxStack = pxTaskDefinition->puxStackBuffer;
+            if( pxNewTCB != NULL )
+            {
+                /* Store the stack location in the TCB. */
+                pxNewTCB->pxStack = pxTaskDefinition->puxStackBuffer;
 
-				#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 )
-				{
-					/* Tasks can be created statically or dynamically, so note
-					this task had a statically allocated stack in case it is
-					later deleted.  The TCB was allocated dynamically. */
-					pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_ONLY;
-				}
-				#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
+                #if ( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 )
+                    {
+                        /* Tasks can be created statically or dynamically, so note
+                         * this task had a statically allocated stack in case it is
+                         * later deleted.  The TCB was allocated dynamically. */
+                        pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_ONLY;
+                    }
+                #endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
 
-				prvInitialiseNewTask(	pxTaskDefinition->pvTaskCode,
-										pxTaskDefinition->pcName,
-										( uint32_t ) pxTaskDefinition->usStackDepth,
-										pxTaskDefinition->pvParameters,
-										pxTaskDefinition->uxPriority,
-										pxCreatedTask, pxNewTCB,
-										pxTaskDefinition->xRegions );
+                prvInitialiseNewTask( pxTaskDefinition->pvTaskCode,
+                                      pxTaskDefinition->pcName,
+                                      ( uint32_t ) pxTaskDefinition->usStackDepth,
+                                      pxTaskDefinition->pvParameters,
+                                      pxTaskDefinition->uxPriority,
+                                      pxCreatedTask, pxNewTCB,
+                                      pxTaskDefinition->xRegions );
 
-				prvAddNewTaskToReadyList( pxNewTCB );
-				xReturn = pdPASS;
-			}
-		}
+                prvAddNewTaskToReadyList( pxNewTCB );
+                xReturn = pdPASS;
+            }
+        }
 
-		return xReturn;
-	}
+        return xReturn;
+    }
 
 #endif /* portUSING_MPU_WRAPPERS */
 /*-----------------------------------------------------------*/
 
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
 
-	BaseType_t xTaskCreate(	TaskFunction_t pxTaskCode,
-							const char * const pcName,		/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-							const configSTACK_DEPTH_TYPE usStackDepth,
-							void * const pvParameters,
-							UBaseType_t uxPriority,
-							TaskHandle_t * const pxCreatedTask )
-	{
-	TCB_t *pxNewTCB;
-	BaseType_t xReturn;
+    BaseType_t xTaskCreate( TaskFunction_t pxTaskCode,
+                            const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+                            const configSTACK_DEPTH_TYPE usStackDepth,
+                            void * const pvParameters,
+                            UBaseType_t uxPriority,
+                            TaskHandle_t * const pxCreatedTask )
+    {
+        TCB_t * pxNewTCB;
+        BaseType_t xReturn;
 
-		/* If the stack grows down then allocate the stack then the TCB so the stack
-		does not grow into the TCB.  Likewise if the stack grows up then allocate
-		the TCB then the stack. */
-		#if( portSTACK_GROWTH > 0 )
-		{
-			/* Allocate space for the TCB.  Where the memory comes from depends on
-			the implementation of the port malloc function and whether or not static
-			allocation is being used. */
-			pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) );
+        /* If the stack grows down then allocate the stack then the TCB so the stack
+         * does not grow into the TCB.  Likewise if the stack grows up then allocate
+         * the TCB then the stack. */
+        #if ( portSTACK_GROWTH > 0 )
+            {
+                /* Allocate space for the TCB.  Where the memory comes from depends on
+                 * the implementation of the port malloc function and whether or not static
+                 * allocation is being used. */
+                pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) );
 
-			if( pxNewTCB != NULL )
-			{
-				/* Allocate space for the stack used by the task being created.
-				The base of the stack memory stored in the TCB so the task can
-				be deleted later if required. */
-				pxNewTCB->pxStack = ( StackType_t * ) pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+                if( pxNewTCB != NULL )
+                {
+                    /* Allocate space for the stack used by the task being created.
+                     * The base of the stack memory stored in the TCB so the task can
+                     * be deleted later if required. */
+                    pxNewTCB->pxStack = ( StackType_t * ) pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 
-				if( pxNewTCB->pxStack == NULL )
-				{
-					/* Could not allocate the stack.  Delete the allocated TCB. */
-					vPortFree( pxNewTCB );
-					pxNewTCB = NULL;
-				}
-			}
-		}
-		#else /* portSTACK_GROWTH */
-		{
-		StackType_t *pxStack;
+                    if( pxNewTCB->pxStack == NULL )
+                    {
+                        /* Could not allocate the stack.  Delete the allocated TCB. */
+                        vPortFree( pxNewTCB );
+                        pxNewTCB = NULL;
+                    }
+                }
+            }
+        #else /* portSTACK_GROWTH */
+            {
+                StackType_t * pxStack;
 
-			/* Allocate space for the stack used by the task being created. */
-			pxStack = pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation is the stack. */
+                /* Allocate space for the stack used by the task being created. */
+                pxStack = pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation is the stack. */
 
-			if( pxStack != NULL )
-			{
-				/* Allocate space for the TCB. */
-				pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of TCB_t is always a pointer to the task's stack. */
+                if( pxStack != NULL )
+                {
+                    /* Allocate space for the TCB. */
+                    pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of TCB_t is always a pointer to the task's stack. */
 
-				if( pxNewTCB != NULL )
-				{
-					/* Store the stack location in the TCB. */
-					pxNewTCB->pxStack = pxStack;
-				}
-				else
-				{
-					/* The stack cannot be used as the TCB was not created.  Free
-					it again. */
-					vPortFree( pxStack );
-				}
-			}
-			else
-			{
-				pxNewTCB = NULL;
-			}
-		}
-		#endif /* portSTACK_GROWTH */
+                    if( pxNewTCB != NULL )
+                    {
+                        /* Store the stack location in the TCB. */
+                        pxNewTCB->pxStack = pxStack;
+                    }
+                    else
+                    {
+                        /* The stack cannot be used as the TCB was not created.  Free
+                         * it again. */
+                        vPortFree( pxStack );
+                    }
+                }
+                else
+                {
+                    pxNewTCB = NULL;
+                }
+            }
+        #endif /* portSTACK_GROWTH */
 
-		if( pxNewTCB != NULL )
-		{
-			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e9029 !e731 Macro has been consolidated for readability reasons. */
-			{
-				/* Tasks can be created statically or dynamically, so note this
-				task was created dynamically in case it is later deleted. */
-				pxNewTCB->ucStaticallyAllocated = tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB;
-			}
-			#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
+        if( pxNewTCB != NULL )
+        {
+            #if ( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e9029 !e731 Macro has been consolidated for readability reasons. */
+                {
+                    /* Tasks can be created statically or dynamically, so note this
+                     * task was created dynamically in case it is later deleted. */
+                    pxNewTCB->ucStaticallyAllocated = tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB;
+                }
+            #endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
 
-			prvInitialiseNewTask( pxTaskCode, pcName, ( uint32_t ) usStackDepth, pvParameters, uxPriority, pxCreatedTask, pxNewTCB, NULL );
-			prvAddNewTaskToReadyList( pxNewTCB );
-			xReturn = pdPASS;
-		}
-		else
-		{
-			xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
-		}
+            prvInitialiseNewTask( pxTaskCode, pcName, ( uint32_t ) usStackDepth, pvParameters, uxPriority, pxCreatedTask, pxNewTCB, NULL );
+            prvAddNewTaskToReadyList( pxNewTCB );
+            xReturn = pdPASS;
+        }
+        else
+        {
+            xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
+        }
 
-		return xReturn;
-	}
+        return xReturn;
+    }
 
 #endif /* configSUPPORT_DYNAMIC_ALLOCATION */
 /*-----------------------------------------------------------*/
 
-static void prvInitialiseNewTask( 	TaskFunction_t pxTaskCode,
-									const char * const pcName,		/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-									const uint32_t ulStackDepth,
-									void * const pvParameters,
-									UBaseType_t uxPriority,
-									TaskHandle_t * const pxCreatedTask,
-									TCB_t *pxNewTCB,
-									const MemoryRegion_t * const xRegions )
+static void prvInitialiseNewTask( TaskFunction_t pxTaskCode,
+                                  const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+                                  const uint32_t ulStackDepth,
+                                  void * const pvParameters,
+                                  UBaseType_t uxPriority,
+                                  TaskHandle_t * const pxCreatedTask,
+                                  TCB_t * pxNewTCB,
+                                  const MemoryRegion_t * const xRegions )
 {
-StackType_t *pxTopOfStack;
-UBaseType_t x;
+    StackType_t * pxTopOfStack;
+    UBaseType_t x;
 
-	#if( portUSING_MPU_WRAPPERS == 1 )
-		/* Should the task be created in privileged mode? */
-		BaseType_t xRunPrivileged;
-		if( ( uxPriority & portPRIVILEGE_BIT ) != 0U )
-		{
-			xRunPrivileged = pdTRUE;
-		}
-		else
-		{
-			xRunPrivileged = pdFALSE;
-		}
-		uxPriority &= ~portPRIVILEGE_BIT;
-	#endif /* portUSING_MPU_WRAPPERS == 1 */
+    #if ( portUSING_MPU_WRAPPERS == 1 )
+        /* Should the task be created in privileged mode? */
+        BaseType_t xRunPrivileged;
 
-	/* Avoid dependency on memset() if it is not required. */
-	#if( tskSET_NEW_STACKS_TO_KNOWN_VALUE == 1 )
-	{
-		/* Fill the stack with a known value to assist debugging. */
-		( void ) memset( pxNewTCB->pxStack, ( int ) tskSTACK_FILL_BYTE, ( size_t ) ulStackDepth * sizeof( StackType_t ) );
-	}
-	#endif /* tskSET_NEW_STACKS_TO_KNOWN_VALUE */
+        if( ( uxPriority & portPRIVILEGE_BIT ) != 0U )
+        {
+            xRunPrivileged = pdTRUE;
+        }
+        else
+        {
+            xRunPrivileged = pdFALSE;
+        }
+        uxPriority &= ~portPRIVILEGE_BIT;
+    #endif /* portUSING_MPU_WRAPPERS == 1 */
 
-	/* Calculate the top of stack address.  This depends on whether the stack
-	grows from high memory to low (as per the 80x86) or vice versa.
-	portSTACK_GROWTH is used to make the result positive or negative as required
-	by the port. */
-	#if( portSTACK_GROWTH < 0 )
-	{
-		pxTopOfStack = &( pxNewTCB->pxStack[ ulStackDepth - ( uint32_t ) 1 ] );
-		pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 !e9033 !e9078 MISRA exception.  Avoiding casts between pointers and integers is not practical.  Size differences accounted for using portPOINTER_SIZE_TYPE type.  Checked by assert(). */
+    /* Avoid dependency on memset() if it is not required. */
+    #if ( tskSET_NEW_STACKS_TO_KNOWN_VALUE == 1 )
+        {
+            /* Fill the stack with a known value to assist debugging. */
+            ( void ) memset( pxNewTCB->pxStack, ( int ) tskSTACK_FILL_BYTE, ( size_t ) ulStackDepth * sizeof( StackType_t ) );
+        }
+    #endif /* tskSET_NEW_STACKS_TO_KNOWN_VALUE */
 
-		/* Check the alignment of the calculated top of stack is correct. */
-		configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
+    /* Calculate the top of stack address.  This depends on whether the stack
+     * grows from high memory to low (as per the 80x86) or vice versa.
+     * portSTACK_GROWTH is used to make the result positive or negative as required
+     * by the port. */
+    #if ( portSTACK_GROWTH < 0 )
+        {
+            pxTopOfStack = &( pxNewTCB->pxStack[ ulStackDepth - ( uint32_t ) 1 ] );
+            pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 !e9033 !e9078 MISRA exception.  Avoiding casts between pointers and integers is not practical.  Size differences accounted for using portPOINTER_SIZE_TYPE type.  Checked by assert(). */
 
-		#if( configRECORD_STACK_HIGH_ADDRESS == 1 )
-		{
-			/* Also record the stack's high address, which may assist
-			debugging. */
-			pxNewTCB->pxEndOfStack = pxTopOfStack;
-		}
-		#endif /* configRECORD_STACK_HIGH_ADDRESS */
-	}
-	#else /* portSTACK_GROWTH */
-	{
-		pxTopOfStack = pxNewTCB->pxStack;
+            /* Check the alignment of the calculated top of stack is correct. */
+            configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
 
-		/* Check the alignment of the stack buffer is correct. */
-		configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxNewTCB->pxStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
+            #if ( configRECORD_STACK_HIGH_ADDRESS == 1 )
+                {
+                    /* Also record the stack's high address, which may assist
+                     * debugging. */
+                    pxNewTCB->pxEndOfStack = pxTopOfStack;
+                }
+            #endif /* configRECORD_STACK_HIGH_ADDRESS */
+        }
+    #else /* portSTACK_GROWTH */
+        {
+            pxTopOfStack = pxNewTCB->pxStack;
 
-		/* The other extreme of the stack space is required if stack checking is
-		performed. */
-		pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 );
-	}
-	#endif /* portSTACK_GROWTH */
+            /* Check the alignment of the stack buffer is correct. */
+            configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxNewTCB->pxStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
 
-	/* Store the task name in the TCB. */
-	if( pcName != NULL )
-	{
-		for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
-		{
-			pxNewTCB->pcTaskName[ x ] = pcName[ x ];
+            /* The other extreme of the stack space is required if stack checking is
+             * performed. */
+            pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 );
+        }
+    #endif /* portSTACK_GROWTH */
 
-			/* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than
-			configMAX_TASK_NAME_LEN characters just in case the memory after the
-			string is not accessible (extremely unlikely). */
-			if( pcName[ x ] == ( char ) 0x00 )
-			{
-				break;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
+    /* Store the task name in the TCB. */
+    if( pcName != NULL )
+    {
+        for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
+        {
+            pxNewTCB->pcTaskName[ x ] = pcName[ x ];
 
-		/* Ensure the name string is terminated in the case that the string length
-		was greater or equal to configMAX_TASK_NAME_LEN. */
-		pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0';
-	}
-	else
-	{
-		/* The task has not been given a name, so just ensure there is a NULL
-		terminator when it is read out. */
-		pxNewTCB->pcTaskName[ 0 ] = 0x00;
-	}
+            /* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than
+             * configMAX_TASK_NAME_LEN characters just in case the memory after the
+             * string is not accessible (extremely unlikely). */
+            if( pcName[ x ] == ( char ) 0x00 )
+            {
+                break;
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
 
-	/* This is used as an array index so must ensure it's not too large.  First
-	remove the privilege bit if one is present. */
-	if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
-	{
-		uxPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+        /* Ensure the name string is terminated in the case that the string length
+         * was greater or equal to configMAX_TASK_NAME_LEN. */
+        pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0';
+    }
+    else
+    {
+        /* The task has not been given a name, so just ensure there is a NULL
+         * terminator when it is read out. */
+        pxNewTCB->pcTaskName[ 0 ] = 0x00;
+    }
 
-	pxNewTCB->uxPriority = uxPriority;
-	#if ( configUSE_MUTEXES == 1 )
-	{
-		pxNewTCB->uxBasePriority = uxPriority;
-		pxNewTCB->uxMutexesHeld = 0;
-	}
-	#endif /* configUSE_MUTEXES */
+    /* This is used as an array index so must ensure it's not too large.  First
+     * remove the privilege bit if one is present. */
+    if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
+    {
+        uxPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	vListInitialiseItem( &( pxNewTCB->xStateListItem ) );
-	vListInitialiseItem( &( pxNewTCB->xEventListItem ) );
+    pxNewTCB->uxPriority = uxPriority;
+    #if ( configUSE_MUTEXES == 1 )
+        {
+            pxNewTCB->uxBasePriority = uxPriority;
+            pxNewTCB->uxMutexesHeld = 0;
+        }
+    #endif /* configUSE_MUTEXES */
 
-	/* Set the pxNewTCB as a link back from the ListItem_t.  This is so we can get
-	back to	the containing TCB from a generic item in a list. */
-	listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB );
+    vListInitialiseItem( &( pxNewTCB->xStateListItem ) );
+    vListInitialiseItem( &( pxNewTCB->xEventListItem ) );
 
-	/* Event lists are always in priority order. */
-	listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-	listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB );
+    /* Set the pxNewTCB as a link back from the ListItem_t.  This is so we can get
+     * back to  the containing TCB from a generic item in a list. */
+    listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB );
 
-	#if ( portCRITICAL_NESTING_IN_TCB == 1 )
-	{
-		pxNewTCB->uxCriticalNesting = ( UBaseType_t ) 0U;
-	}
-	#endif /* portCRITICAL_NESTING_IN_TCB */
+    /* Event lists are always in priority order. */
+    listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+    listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB );
 
-	#if ( configUSE_APPLICATION_TASK_TAG == 1 )
-	{
-		pxNewTCB->pxTaskTag = NULL;
-	}
-	#endif /* configUSE_APPLICATION_TASK_TAG */
+    #if ( portCRITICAL_NESTING_IN_TCB == 1 )
+        {
+            pxNewTCB->uxCriticalNesting = ( UBaseType_t ) 0U;
+        }
+    #endif /* portCRITICAL_NESTING_IN_TCB */
 
-	#if ( configGENERATE_RUN_TIME_STATS == 1 )
-	{
-		pxNewTCB->ulRunTimeCounter = 0UL;
-	}
-	#endif /* configGENERATE_RUN_TIME_STATS */
+    #if ( configUSE_APPLICATION_TASK_TAG == 1 )
+        {
+            pxNewTCB->pxTaskTag = NULL;
+        }
+    #endif /* configUSE_APPLICATION_TASK_TAG */
 
-	#if ( portUSING_MPU_WRAPPERS == 1 )
-	{
-		vPortStoreTaskMPUSettings( &( pxNewTCB->xMPUSettings ), xRegions, pxNewTCB->pxStack, ulStackDepth );
-	}
-	#else
-	{
-		/* Avoid compiler warning about unreferenced parameter. */
-		( void ) xRegions;
-	}
-	#endif
+    #if ( configGENERATE_RUN_TIME_STATS == 1 )
+        {
+            pxNewTCB->ulRunTimeCounter = 0UL;
+        }
+    #endif /* configGENERATE_RUN_TIME_STATS */
 
-	#if( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 )
-	{
-		for( x = 0; x < ( UBaseType_t ) configNUM_THREAD_LOCAL_STORAGE_POINTERS; x++ )
-		{
-			pxNewTCB->pvThreadLocalStoragePointers[ x ] = NULL;
-		}
-	}
-	#endif
+    #if ( portUSING_MPU_WRAPPERS == 1 )
+        {
+            vPortStoreTaskMPUSettings( &( pxNewTCB->xMPUSettings ), xRegions, pxNewTCB->pxStack, ulStackDepth );
+        }
+    #else
+        {
+            /* Avoid compiler warning about unreferenced parameter. */
+            ( void ) xRegions;
+        }
+    #endif
 
-	#if ( configUSE_TASK_NOTIFICATIONS == 1 )
-	{
-		pxNewTCB->ulNotifiedValue = 0;
-		pxNewTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
-	}
-	#endif
+    #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 )
+        {
+            memset( ( void * ) &( pxNewTCB->pvThreadLocalStoragePointers[ 0 ] ), 0x00, sizeof( pxNewTCB->pvThreadLocalStoragePointers ) );
+        }
+    #endif
 
-	#if ( configUSE_NEWLIB_REENTRANT == 1 )
-	{
-		/* Initialise this task's Newlib reent structure.
-		See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
-		for additional information. */
-		_REENT_INIT_PTR( ( &( pxNewTCB->xNewLib_reent ) ) );
-	}
-	#endif
+    #if ( configUSE_TASK_NOTIFICATIONS == 1 )
+        {
+            memset( ( void * ) &( pxNewTCB->ulNotifiedValue[ 0 ] ), 0x00, sizeof( pxNewTCB->ulNotifiedValue ) );
+            memset( ( void * ) &( pxNewTCB->ucNotifyState[ 0 ] ), 0x00, sizeof( pxNewTCB->ucNotifyState ) );
+        }
+    #endif
 
-	#if( INCLUDE_xTaskAbortDelay == 1 )
-	{
-		pxNewTCB->ucDelayAborted = pdFALSE;
-	}
-	#endif
+    #if ( configUSE_NEWLIB_REENTRANT == 1 )
+        {
+            /* Initialise this task's Newlib reent structure.
+             * See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
+             * for additional information. */
+            _REENT_INIT_PTR( ( &( pxNewTCB->xNewLib_reent ) ) );
+        }
+    #endif
 
-	/* Initialize the TCB stack to look as if the task was already running,
-	but had been interrupted by the scheduler.  The return address is set
-	to the start of the task function. Once the stack has been initialised
-	the top of stack variable is updated. */
-	#if( portUSING_MPU_WRAPPERS == 1 )
-	{
-		/* If the port has capability to detect stack overflow,
-		pass the stack end address to the stack initialization
-		function as well. */
-		#if( portHAS_STACK_OVERFLOW_CHECKING == 1 )
-		{
-			#if( portSTACK_GROWTH < 0 )
-			{
-				pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxNewTCB->pxStack, pxTaskCode, pvParameters, xRunPrivileged );
-			}
-			#else /* portSTACK_GROWTH */
-			{
-				pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxNewTCB->pxEndOfStack, pxTaskCode, pvParameters, xRunPrivileged );
-			}
-			#endif /* portSTACK_GROWTH */
-		}
-		#else /* portHAS_STACK_OVERFLOW_CHECKING */
-		{
-			pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters, xRunPrivileged );
-		}
-		#endif /* portHAS_STACK_OVERFLOW_CHECKING */
-	}
-	#else /* portUSING_MPU_WRAPPERS */
-	{
-		/* If the port has capability to detect stack overflow,
-		pass the stack end address to the stack initialization
-		function as well. */
-		#if( portHAS_STACK_OVERFLOW_CHECKING == 1 )
-		{
-			#if( portSTACK_GROWTH < 0 )
-			{
-				pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxNewTCB->pxStack, pxTaskCode, pvParameters );
-			}
-			#else /* portSTACK_GROWTH */
-			{
-				pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxNewTCB->pxEndOfStack, pxTaskCode, pvParameters );
-			}
-			#endif /* portSTACK_GROWTH */
-		}
-		#else /* portHAS_STACK_OVERFLOW_CHECKING */
-		{
-			pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters );
-		}
-		#endif /* portHAS_STACK_OVERFLOW_CHECKING */
-	}
-	#endif /* portUSING_MPU_WRAPPERS */
+    #if ( INCLUDE_xTaskAbortDelay == 1 )
+        {
+            pxNewTCB->ucDelayAborted = pdFALSE;
+        }
+    #endif
 
-	if( pxCreatedTask != NULL )
-	{
-		/* Pass the handle out in an anonymous way.  The handle can be used to
-		change the created task's priority, delete the created task, etc.*/
-		*pxCreatedTask = ( TaskHandle_t ) pxNewTCB;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    /* Initialize the TCB stack to look as if the task was already running,
+     * but had been interrupted by the scheduler.  The return address is set
+     * to the start of the task function. Once the stack has been initialised
+     * the top of stack variable is updated. */
+    #if ( portUSING_MPU_WRAPPERS == 1 )
+        {
+            /* If the port has capability to detect stack overflow,
+             * pass the stack end address to the stack initialization
+             * function as well. */
+            #if ( portHAS_STACK_OVERFLOW_CHECKING == 1 )
+                {
+                    #if ( portSTACK_GROWTH < 0 )
+                        {
+                            pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxNewTCB->pxStack, pxTaskCode, pvParameters, xRunPrivileged );
+                        }
+                    #else /* portSTACK_GROWTH */
+                        {
+                            pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxNewTCB->pxEndOfStack, pxTaskCode, pvParameters, xRunPrivileged );
+                        }
+                    #endif /* portSTACK_GROWTH */
+                }
+            #else /* portHAS_STACK_OVERFLOW_CHECKING */
+                {
+                    pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters, xRunPrivileged );
+                }
+            #endif /* portHAS_STACK_OVERFLOW_CHECKING */
+        }
+    #else /* portUSING_MPU_WRAPPERS */
+        {
+            /* If the port has capability to detect stack overflow,
+             * pass the stack end address to the stack initialization
+             * function as well. */
+            #if ( portHAS_STACK_OVERFLOW_CHECKING == 1 )
+                {
+                    #if ( portSTACK_GROWTH < 0 )
+                        {
+                            pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxNewTCB->pxStack, pxTaskCode, pvParameters );
+                        }
+                    #else /* portSTACK_GROWTH */
+                        {
+                            pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxNewTCB->pxEndOfStack, pxTaskCode, pvParameters );
+                        }
+                    #endif /* portSTACK_GROWTH */
+                }
+            #else /* portHAS_STACK_OVERFLOW_CHECKING */
+                {
+                    pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters );
+                }
+            #endif /* portHAS_STACK_OVERFLOW_CHECKING */
+        }
+    #endif /* portUSING_MPU_WRAPPERS */
+
+    if( pxCreatedTask != NULL )
+    {
+        /* Pass the handle out in an anonymous way.  The handle can be used to
+         * change the created task's priority, delete the created task, etc.*/
+        *pxCreatedTask = ( TaskHandle_t ) pxNewTCB;
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 }
 /*-----------------------------------------------------------*/
 
-static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB )
+static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB )
 {
-	/* Ensure interrupts don't access the task lists while the lists are being
-	updated. */
-	taskENTER_CRITICAL();
-	{
-		uxCurrentNumberOfTasks++;
-		if( pxCurrentTCB == NULL )
-		{
-			/* There are no other tasks, or all the other tasks are in
-			the suspended state - make this the current task. */
-			pxCurrentTCB = pxNewTCB;
+    /* Ensure interrupts don't access the task lists while the lists are being
+     * updated. */
+    taskENTER_CRITICAL();
+    {
+        uxCurrentNumberOfTasks++;
 
-			if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 )
-			{
-				/* This is the first task to be created so do the preliminary
-				initialisation required.  We will not recover if this call
-				fails, but we will report the failure. */
-				prvInitialiseTaskLists();
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			/* If the scheduler is not already running, make this task the
-			current task if it is the highest priority task to be created
-			so far. */
-			if( xSchedulerRunning == pdFALSE )
-			{
-				if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority )
-				{
-					pxCurrentTCB = pxNewTCB;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
+        if( pxCurrentTCB == NULL )
+        {
+            /* There are no other tasks, or all the other tasks are in
+             * the suspended state - make this the current task. */
+            pxCurrentTCB = pxNewTCB;
 
-		uxTaskNumber++;
+            if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 )
+            {
+                /* This is the first task to be created so do the preliminary
+                 * initialisation required.  We will not recover if this call
+                 * fails, but we will report the failure. */
+                prvInitialiseTaskLists();
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            /* If the scheduler is not already running, make this task the
+             * current task if it is the highest priority task to be created
+             * so far. */
+            if( xSchedulerRunning == pdFALSE )
+            {
+                if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority )
+                {
+                    pxCurrentTCB = pxNewTCB;
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
 
-		#if ( configUSE_TRACE_FACILITY == 1 )
-		{
-			/* Add a counter into the TCB for tracing only. */
-			pxNewTCB->uxTCBNumber = uxTaskNumber;
-		}
-		#endif /* configUSE_TRACE_FACILITY */
-		traceTASK_CREATE( pxNewTCB );
+        uxTaskNumber++;
 
-		prvAddTaskToReadyList( pxNewTCB );
+        #if ( configUSE_TRACE_FACILITY == 1 )
+            {
+                /* Add a counter into the TCB for tracing only. */
+                pxNewTCB->uxTCBNumber = uxTaskNumber;
+            }
+        #endif /* configUSE_TRACE_FACILITY */
+        traceTASK_CREATE( pxNewTCB );
 
-		portSETUP_TCB( pxNewTCB );
-	}
-	taskEXIT_CRITICAL();
+        prvAddTaskToReadyList( pxNewTCB );
 
-	if( xSchedulerRunning != pdFALSE )
-	{
-		/* If the created task is of a higher priority than the current task
-		then it should run now. */
-		if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority )
-		{
-			taskYIELD_IF_USING_PREEMPTION();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+        portSETUP_TCB( pxNewTCB );
+    }
+    taskEXIT_CRITICAL();
+
+    if( xSchedulerRunning != pdFALSE )
+    {
+        /* If the created task is of a higher priority than the current task
+         * then it should run now. */
+        if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority )
+        {
+            taskYIELD_IF_USING_PREEMPTION();
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 }
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_vTaskDelete == 1 )
 
-	void vTaskDelete( TaskHandle_t xTaskToDelete )
-	{
-	TCB_t *pxTCB;
+    void vTaskDelete( TaskHandle_t xTaskToDelete )
+    {
+        TCB_t * pxTCB;
 
-		taskENTER_CRITICAL();
-		{
-			/* If null is passed in here then it is the calling task that is
-			being deleted. */
-			pxTCB = prvGetTCBFromHandle( xTaskToDelete );
+        taskENTER_CRITICAL();
+        {
+            /* If null is passed in here then it is the calling task that is
+             * being deleted. */
+            pxTCB = prvGetTCBFromHandle( xTaskToDelete );
 
-			/* Remove task from the ready/delayed list. */
-			if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
-			{
-				taskRESET_READY_PRIORITY( pxTCB->uxPriority );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
+            /* Remove task from the ready/delayed list. */
+            if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
+            {
+                taskRESET_READY_PRIORITY( pxTCB->uxPriority );
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
 
-			/* Is the task waiting on an event also? */
-			if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
-			{
-				( void ) uxListRemove( &( pxTCB->xEventListItem ) );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
+            /* Is the task waiting on an event also? */
+            if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
+            {
+                ( void ) uxListRemove( &( pxTCB->xEventListItem ) );
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
 
-			/* Increment the uxTaskNumber also so kernel aware debuggers can
-			detect that the task lists need re-generating.  This is done before
-			portPRE_TASK_DELETE_HOOK() as in the Windows port that macro will
-			not return. */
-			uxTaskNumber++;
+            /* Increment the uxTaskNumber also so kernel aware debuggers can
+             * detect that the task lists need re-generating.  This is done before
+             * portPRE_TASK_DELETE_HOOK() as in the Windows port that macro will
+             * not return. */
+            uxTaskNumber++;
 
-			if( pxTCB == pxCurrentTCB )
-			{
-				/* A task is deleting itself.  This cannot complete within the
-				task itself, as a context switch to another task is required.
-				Place the task in the termination list.  The idle task will
-				check the termination list and free up any memory allocated by
-				the scheduler for the TCB and stack of the deleted task. */
-				vListInsertEnd( &xTasksWaitingTermination, &( pxTCB->xStateListItem ) );
+            if( pxTCB == pxCurrentTCB )
+            {
+                /* A task is deleting itself.  This cannot complete within the
+                 * task itself, as a context switch to another task is required.
+                 * Place the task in the termination list.  The idle task will
+                 * check the termination list and free up any memory allocated by
+                 * the scheduler for the TCB and stack of the deleted task. */
+                vListInsertEnd( &xTasksWaitingTermination, &( pxTCB->xStateListItem ) );
 
-				/* Increment the ucTasksDeleted variable so the idle task knows
-				there is a task that has been deleted and that it should therefore
-				check the xTasksWaitingTermination list. */
-				++uxDeletedTasksWaitingCleanUp;
+                /* Increment the ucTasksDeleted variable so the idle task knows
+                 * there is a task that has been deleted and that it should therefore
+                 * check the xTasksWaitingTermination list. */
+                ++uxDeletedTasksWaitingCleanUp;
 
-				/* Call the delete hook before portPRE_TASK_DELETE_HOOK() as
-				portPRE_TASK_DELETE_HOOK() does not return in the Win32 port. */
-				traceTASK_DELETE( pxTCB );
+                /* Call the delete hook before portPRE_TASK_DELETE_HOOK() as
+                 * portPRE_TASK_DELETE_HOOK() does not return in the Win32 port. */
+                traceTASK_DELETE( pxTCB );
 
-				/* The pre-delete hook is primarily for the Windows simulator,
-				in which Windows specific clean up operations are performed,
-				after which it is not possible to yield away from this task -
-				hence xYieldPending is used to latch that a context switch is
-				required. */
-				portPRE_TASK_DELETE_HOOK( pxTCB, &xYieldPending );
-			}
-			else
-			{
-				--uxCurrentNumberOfTasks;
-				traceTASK_DELETE( pxTCB );
-				prvDeleteTCB( pxTCB );
+                /* The pre-delete hook is primarily for the Windows simulator,
+                 * in which Windows specific clean up operations are performed,
+                 * after which it is not possible to yield away from this task -
+                 * hence xYieldPending is used to latch that a context switch is
+                 * required. */
+                portPRE_TASK_DELETE_HOOK( pxTCB, &xYieldPending );
+            }
+            else
+            {
+                --uxCurrentNumberOfTasks;
+                traceTASK_DELETE( pxTCB );
+                prvDeleteTCB( pxTCB );
 
-				/* Reset the next expected unblock time in case it referred to
-				the task that has just been deleted. */
-				prvResetNextTaskUnblockTime();
-			}
-		}
-		taskEXIT_CRITICAL();
+                /* Reset the next expected unblock time in case it referred to
+                 * the task that has just been deleted. */
+                prvResetNextTaskUnblockTime();
+            }
+        }
+        taskEXIT_CRITICAL();
 
-		/* Force a reschedule if it is the currently running task that has just
-		been deleted. */
-		if( xSchedulerRunning != pdFALSE )
-		{
-			if( pxTCB == pxCurrentTCB )
-			{
-				configASSERT( uxSchedulerSuspended == 0 );
-				portYIELD_WITHIN_API();
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-	}
+        /* Force a reschedule if it is the currently running task that has just
+         * been deleted. */
+        if( xSchedulerRunning != pdFALSE )
+        {
+            if( pxTCB == pxCurrentTCB )
+            {
+                configASSERT( uxSchedulerSuspended == 0 );
+                portYIELD_WITHIN_API();
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+    }
 
 #endif /* INCLUDE_vTaskDelete */
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_vTaskDelayUntil == 1 )
 
-	void vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, const TickType_t xTimeIncrement )
-	{
-	TickType_t xTimeToWake;
-	BaseType_t xAlreadyYielded, xShouldDelay = pdFALSE;
+    void vTaskDelayUntil( TickType_t * const pxPreviousWakeTime,
+                          const TickType_t xTimeIncrement )
+    {
+        TickType_t xTimeToWake;
+        BaseType_t xAlreadyYielded, xShouldDelay = pdFALSE;
 
-		configASSERT( pxPreviousWakeTime );
-		configASSERT( ( xTimeIncrement > 0U ) );
-		configASSERT( uxSchedulerSuspended == 0 );
+        configASSERT( pxPreviousWakeTime );
+        configASSERT( ( xTimeIncrement > 0U ) );
+        configASSERT( uxSchedulerSuspended == 0 );
 
-		vTaskSuspendAll();
-		{
-			/* Minor optimisation.  The tick count cannot change in this
-			block. */
-			const TickType_t xConstTickCount = xTickCount;
+        vTaskSuspendAll();
+        {
+            /* Minor optimisation.  The tick count cannot change in this
+             * block. */
+            const TickType_t xConstTickCount = xTickCount;
 
-			/* Generate the tick time at which the task wants to wake. */
-			xTimeToWake = *pxPreviousWakeTime + xTimeIncrement;
+            /* Generate the tick time at which the task wants to wake. */
+            xTimeToWake = *pxPreviousWakeTime + xTimeIncrement;
 
-			if( xConstTickCount < *pxPreviousWakeTime )
-			{
-				/* The tick count has overflowed since this function was
-				lasted called.  In this case the only time we should ever
-				actually delay is if the wake time has also	overflowed,
-				and the wake time is greater than the tick time.  When this
-				is the case it is as if neither time had overflowed. */
-				if( ( xTimeToWake < *pxPreviousWakeTime ) && ( xTimeToWake > xConstTickCount ) )
-				{
-					xShouldDelay = pdTRUE;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				/* The tick time has not overflowed.  In this case we will
-				delay if either the wake time has overflowed, and/or the
-				tick time is less than the wake time. */
-				if( ( xTimeToWake < *pxPreviousWakeTime ) || ( xTimeToWake > xConstTickCount ) )
-				{
-					xShouldDelay = pdTRUE;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
+            if( xConstTickCount < *pxPreviousWakeTime )
+            {
+                /* The tick count has overflowed since this function was
+                 * lasted called.  In this case the only time we should ever
+                 * actually delay is if the wake time has also  overflowed,
+                 * and the wake time is greater than the tick time.  When this
+                 * is the case it is as if neither time had overflowed. */
+                if( ( xTimeToWake < *pxPreviousWakeTime ) && ( xTimeToWake > xConstTickCount ) )
+                {
+                    xShouldDelay = pdTRUE;
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+            else
+            {
+                /* The tick time has not overflowed.  In this case we will
+                 * delay if either the wake time has overflowed, and/or the
+                 * tick time is less than the wake time. */
+                if( ( xTimeToWake < *pxPreviousWakeTime ) || ( xTimeToWake > xConstTickCount ) )
+                {
+                    xShouldDelay = pdTRUE;
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
 
-			/* Update the wake time ready for the next call. */
-			*pxPreviousWakeTime = xTimeToWake;
+            /* Update the wake time ready for the next call. */
+            *pxPreviousWakeTime = xTimeToWake;
 
-			if( xShouldDelay != pdFALSE )
-			{
-				traceTASK_DELAY_UNTIL( xTimeToWake );
+            if( xShouldDelay != pdFALSE )
+            {
+                traceTASK_DELAY_UNTIL( xTimeToWake );
 
-				/* prvAddCurrentTaskToDelayedList() needs the block time, not
-				the time to wake, so subtract the current tick count. */
-				prvAddCurrentTaskToDelayedList( xTimeToWake - xConstTickCount, pdFALSE );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		xAlreadyYielded = xTaskResumeAll();
+                /* prvAddCurrentTaskToDelayedList() needs the block time, not
+                 * the time to wake, so subtract the current tick count. */
+                prvAddCurrentTaskToDelayedList( xTimeToWake - xConstTickCount, pdFALSE );
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        xAlreadyYielded = xTaskResumeAll();
 
-		/* Force a reschedule if xTaskResumeAll has not already done so, we may
-		have put ourselves to sleep. */
-		if( xAlreadyYielded == pdFALSE )
-		{
-			portYIELD_WITHIN_API();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
+        /* Force a reschedule if xTaskResumeAll has not already done so, we may
+         * have put ourselves to sleep. */
+        if( xAlreadyYielded == pdFALSE )
+        {
+            portYIELD_WITHIN_API();
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
 
 #endif /* INCLUDE_vTaskDelayUntil */
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_vTaskDelay == 1 )
 
-	void vTaskDelay( const TickType_t xTicksToDelay )
-	{
-	BaseType_t xAlreadyYielded = pdFALSE;
+    void vTaskDelay( const TickType_t xTicksToDelay )
+    {
+        BaseType_t xAlreadyYielded = pdFALSE;
 
-		/* A delay time of zero just forces a reschedule. */
-		if( xTicksToDelay > ( TickType_t ) 0U )
-		{
-			configASSERT( uxSchedulerSuspended == 0 );
-			vTaskSuspendAll();
-			{
-				traceTASK_DELAY();
+        /* A delay time of zero just forces a reschedule. */
+        if( xTicksToDelay > ( TickType_t ) 0U )
+        {
+            configASSERT( uxSchedulerSuspended == 0 );
+            vTaskSuspendAll();
+            {
+                traceTASK_DELAY();
 
-				/* A task that is removed from the event list while the
-				scheduler is suspended will not get placed in the ready
-				list or removed from the blocked list until the scheduler
-				is resumed.
+                /* A task that is removed from the event list while the
+                 * scheduler is suspended will not get placed in the ready
+                 * list or removed from the blocked list until the scheduler
+                 * is resumed.
+                 *
+                 * This task cannot be in an event list as it is the currently
+                 * executing task. */
+                prvAddCurrentTaskToDelayedList( xTicksToDelay, pdFALSE );
+            }
+            xAlreadyYielded = xTaskResumeAll();
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
 
-				This task cannot be in an event list as it is the currently
-				executing task. */
-				prvAddCurrentTaskToDelayedList( xTicksToDelay, pdFALSE );
-			}
-			xAlreadyYielded = xTaskResumeAll();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		/* Force a reschedule if xTaskResumeAll has not already done so, we may
-		have put ourselves to sleep. */
-		if( xAlreadyYielded == pdFALSE )
-		{
-			portYIELD_WITHIN_API();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
+        /* Force a reschedule if xTaskResumeAll has not already done so, we may
+         * have put ourselves to sleep. */
+        if( xAlreadyYielded == pdFALSE )
+        {
+            portYIELD_WITHIN_API();
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
 
 #endif /* INCLUDE_vTaskDelay */
 /*-----------------------------------------------------------*/
 
-#if( ( INCLUDE_eTaskGetState == 1 ) || ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_xTaskAbortDelay == 1 ) )
+#if ( ( INCLUDE_eTaskGetState == 1 ) || ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_xTaskAbortDelay == 1 ) )
 
-	eTaskState eTaskGetState( TaskHandle_t xTask )
-	{
-	eTaskState eReturn;
-	List_t const * pxStateList, *pxDelayedList, *pxOverflowedDelayedList;
-	const TCB_t * const pxTCB = xTask;
+    eTaskState eTaskGetState( TaskHandle_t xTask )
+    {
+        eTaskState eReturn;
+        List_t const * pxStateList, * pxDelayedList, * pxOverflowedDelayedList;
+        const TCB_t * const pxTCB = xTask;
 
-		configASSERT( pxTCB );
+        configASSERT( pxTCB );
 
-		if( pxTCB == pxCurrentTCB )
-		{
-			/* The task calling this function is querying its own state. */
-			eReturn = eRunning;
-		}
-		else
-		{
-			taskENTER_CRITICAL();
-			{
-				pxStateList = listLIST_ITEM_CONTAINER( &( pxTCB->xStateListItem ) );
-				pxDelayedList = pxDelayedTaskList;
-				pxOverflowedDelayedList = pxOverflowDelayedTaskList;
-			}
-			taskEXIT_CRITICAL();
+        if( pxTCB == pxCurrentTCB )
+        {
+            /* The task calling this function is querying its own state. */
+            eReturn = eRunning;
+        }
+        else
+        {
+            taskENTER_CRITICAL();
+            {
+                pxStateList = listLIST_ITEM_CONTAINER( &( pxTCB->xStateListItem ) );
+                pxDelayedList = pxDelayedTaskList;
+                pxOverflowedDelayedList = pxOverflowDelayedTaskList;
+            }
+            taskEXIT_CRITICAL();
 
-			if( ( pxStateList == pxDelayedList ) || ( pxStateList == pxOverflowedDelayedList ) )
-			{
-				/* The task being queried is referenced from one of the Blocked
-				lists. */
-				eReturn = eBlocked;
-			}
+            if( ( pxStateList == pxDelayedList ) || ( pxStateList == pxOverflowedDelayedList ) )
+            {
+                /* The task being queried is referenced from one of the Blocked
+                 * lists. */
+                eReturn = eBlocked;
+            }
 
-			#if ( INCLUDE_vTaskSuspend == 1 )
-				else if( pxStateList == &xSuspendedTaskList )
-				{
-					/* The task being queried is referenced from the suspended
-					list.  Is it genuinely suspended or is it blocked
-					indefinitely? */
-					if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL )
-					{
-						#if( configUSE_TASK_NOTIFICATIONS == 1 )
-						{
-							/* The task does not appear on the event list item of
-							and of the RTOS objects, but could still be in the
-							blocked state if it is waiting on its notification
-							rather than waiting on an object. */
-							if( pxTCB->ucNotifyState == taskWAITING_NOTIFICATION )
-							{
-								eReturn = eBlocked;
-							}
-							else
-							{
-								eReturn = eSuspended;
-							}
-						}
-						#else
-						{
-							eReturn = eSuspended;
-						}
-						#endif
-					}
-					else
-					{
-						eReturn = eBlocked;
-					}
-				}
-			#endif
+            #if ( INCLUDE_vTaskSuspend == 1 )
+                else if( pxStateList == &xSuspendedTaskList )
+                {
+                    /* The task being queried is referenced from the suspended
+                     * list.  Is it genuinely suspended or is it blocked
+                     * indefinitely? */
+                    if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL )
+                    {
+                        #if ( configUSE_TASK_NOTIFICATIONS == 1 )
+                            {
+                                BaseType_t x;
 
-			#if ( INCLUDE_vTaskDelete == 1 )
-				else if( ( pxStateList == &xTasksWaitingTermination ) || ( pxStateList == NULL ) )
-				{
-					/* The task being queried is referenced from the deleted
-					tasks list, or it is not referenced from any lists at
-					all. */
-					eReturn = eDeleted;
-				}
-			#endif
+                                /* The task does not appear on the event list item of
+                                 * and of the RTOS objects, but could still be in the
+                                 * blocked state if it is waiting on its notification
+                                 * rather than waiting on an object.  If not, is
+                                 * suspended. */
+                                eReturn = eSuspended;
 
-			else /*lint !e525 Negative indentation is intended to make use of pre-processor clearer. */
-			{
-				/* If the task is not in any other state, it must be in the
-				Ready (including pending ready) state. */
-				eReturn = eReady;
-			}
-		}
+                                for( x = 0; x < configTASK_NOTIFICATION_ARRAY_ENTRIES; x++ )
+                                {
+                                    if( pxTCB->ucNotifyState[ x ] == taskWAITING_NOTIFICATION )
+                                    {
+                                        eReturn = eBlocked;
+                                        break;
+                                    }
+                                }
+                            }
+                        #else /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */
+                            {
+                                eReturn = eSuspended;
+                            }
+                        #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */
+                    }
+                    else
+                    {
+                        eReturn = eBlocked;
+                    }
+                }
+            #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */
 
-		return eReturn;
-	} /*lint !e818 xTask cannot be a pointer to const because it is a typedef. */
+            #if ( INCLUDE_vTaskDelete == 1 )
+                else if( ( pxStateList == &xTasksWaitingTermination ) || ( pxStateList == NULL ) )
+                {
+                    /* The task being queried is referenced from the deleted
+                     * tasks list, or it is not referenced from any lists at
+                     * all. */
+                    eReturn = eDeleted;
+                }
+            #endif
+
+            else /*lint !e525 Negative indentation is intended to make use of pre-processor clearer. */
+            {
+                /* If the task is not in any other state, it must be in the
+                 * Ready (including pending ready) state. */
+                eReturn = eReady;
+            }
+        }
+
+        return eReturn;
+    } /*lint !e818 xTask cannot be a pointer to const because it is a typedef. */
 
 #endif /* INCLUDE_eTaskGetState */
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_uxTaskPriorityGet == 1 )
 
-	UBaseType_t uxTaskPriorityGet( const TaskHandle_t xTask )
-	{
-	TCB_t const *pxTCB;
-	UBaseType_t uxReturn;
+    UBaseType_t uxTaskPriorityGet( const TaskHandle_t xTask )
+    {
+        TCB_t const * pxTCB;
+        UBaseType_t uxReturn;
 
-		taskENTER_CRITICAL();
-		{
-			/* If null is passed in here then it is the priority of the task
-			that called uxTaskPriorityGet() that is being queried. */
-			pxTCB = prvGetTCBFromHandle( xTask );
-			uxReturn = pxTCB->uxPriority;
-		}
-		taskEXIT_CRITICAL();
+        taskENTER_CRITICAL();
+        {
+            /* If null is passed in here then it is the priority of the task
+             * that called uxTaskPriorityGet() that is being queried. */
+            pxTCB = prvGetTCBFromHandle( xTask );
+            uxReturn = pxTCB->uxPriority;
+        }
+        taskEXIT_CRITICAL();
 
-		return uxReturn;
-	}
+        return uxReturn;
+    }
 
 #endif /* INCLUDE_uxTaskPriorityGet */
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_uxTaskPriorityGet == 1 )
 
-	UBaseType_t uxTaskPriorityGetFromISR( const TaskHandle_t xTask )
-	{
-	TCB_t const *pxTCB;
-	UBaseType_t uxReturn, uxSavedInterruptState;
+    UBaseType_t uxTaskPriorityGetFromISR( const TaskHandle_t xTask )
+    {
+        TCB_t const * pxTCB;
+        UBaseType_t uxReturn, uxSavedInterruptState;
 
-		/* RTOS ports that support interrupt nesting have the concept of a
-		maximum	system call (or maximum API call) interrupt priority.
-		Interrupts that are	above the maximum system call priority are keep
-		permanently enabled, even when the RTOS kernel is in a critical section,
-		but cannot make any calls to FreeRTOS API functions.  If configASSERT()
-		is defined in FreeRTOSConfig.h then
-		portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-		failure if a FreeRTOS API function is called from an interrupt that has
-		been assigned a priority above the configured maximum system call
-		priority.  Only FreeRTOS functions that end in FromISR can be called
-		from interrupts	that have been assigned a priority at or (logically)
-		below the maximum system call interrupt priority.  FreeRTOS maintains a
-		separate interrupt safe API to ensure interrupt entry is as fast and as
-		simple as possible.  More information (albeit Cortex-M specific) is
-		provided on the following link:
-		https://www.freertos.org/RTOS-Cortex-M3-M4.html */
-		portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+        /* RTOS ports that support interrupt nesting have the concept of a
+         * maximum  system call (or maximum API call) interrupt priority.
+         * Interrupts that are  above the maximum system call priority are keep
+         * permanently enabled, even when the RTOS kernel is in a critical section,
+         * but cannot make any calls to FreeRTOS API functions.  If configASSERT()
+         * is defined in FreeRTOSConfig.h then
+         * portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
+         * failure if a FreeRTOS API function is called from an interrupt that has
+         * been assigned a priority above the configured maximum system call
+         * priority.  Only FreeRTOS functions that end in FromISR can be called
+         * from interrupts  that have been assigned a priority at or (logically)
+         * below the maximum system call interrupt priority.  FreeRTOS maintains a
+         * separate interrupt safe API to ensure interrupt entry is as fast and as
+         * simple as possible.  More information (albeit Cortex-M specific) is
+         * provided on the following link:
+         * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
+        portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 
-		uxSavedInterruptState = portSET_INTERRUPT_MASK_FROM_ISR();
-		{
-			/* If null is passed in here then it is the priority of the calling
-			task that is being queried. */
-			pxTCB = prvGetTCBFromHandle( xTask );
-			uxReturn = pxTCB->uxPriority;
-		}
-		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptState );
+        uxSavedInterruptState = portSET_INTERRUPT_MASK_FROM_ISR();
+        {
+            /* If null is passed in here then it is the priority of the calling
+             * task that is being queried. */
+            pxTCB = prvGetTCBFromHandle( xTask );
+            uxReturn = pxTCB->uxPriority;
+        }
+        portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptState );
 
-		return uxReturn;
-	}
+        return uxReturn;
+    }
 
 #endif /* INCLUDE_uxTaskPriorityGet */
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_vTaskPrioritySet == 1 )
 
-	void vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority )
-	{
-	TCB_t *pxTCB;
-	UBaseType_t uxCurrentBasePriority, uxPriorityUsedOnEntry;
-	BaseType_t xYieldRequired = pdFALSE;
+    void vTaskPrioritySet( TaskHandle_t xTask,
+                           UBaseType_t uxNewPriority )
+    {
+        TCB_t * pxTCB;
+        UBaseType_t uxCurrentBasePriority, uxPriorityUsedOnEntry;
+        BaseType_t xYieldRequired = pdFALSE;
 
-		configASSERT( ( uxNewPriority < configMAX_PRIORITIES ) );
+        configASSERT( ( uxNewPriority < configMAX_PRIORITIES ) );
 
-		/* Ensure the new priority is valid. */
-		if( uxNewPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
-		{
-			uxNewPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
+        /* Ensure the new priority is valid. */
+        if( uxNewPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
+        {
+            uxNewPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
 
-		taskENTER_CRITICAL();
-		{
-			/* If null is passed in here then it is the priority of the calling
-			task that is being changed. */
-			pxTCB = prvGetTCBFromHandle( xTask );
+        taskENTER_CRITICAL();
+        {
+            /* If null is passed in here then it is the priority of the calling
+             * task that is being changed. */
+            pxTCB = prvGetTCBFromHandle( xTask );
 
-			traceTASK_PRIORITY_SET( pxTCB, uxNewPriority );
+            traceTASK_PRIORITY_SET( pxTCB, uxNewPriority );
 
-			#if ( configUSE_MUTEXES == 1 )
-			{
-				uxCurrentBasePriority = pxTCB->uxBasePriority;
-			}
-			#else
-			{
-				uxCurrentBasePriority = pxTCB->uxPriority;
-			}
-			#endif
+            #if ( configUSE_MUTEXES == 1 )
+                {
+                    uxCurrentBasePriority = pxTCB->uxBasePriority;
+                }
+            #else
+                {
+                    uxCurrentBasePriority = pxTCB->uxPriority;
+                }
+            #endif
 
-			if( uxCurrentBasePriority != uxNewPriority )
-			{
-				/* The priority change may have readied a task of higher
-				priority than the calling task. */
-				if( uxNewPriority > uxCurrentBasePriority )
-				{
-					if( pxTCB != pxCurrentTCB )
-					{
-						/* The priority of a task other than the currently
-						running task is being raised.  Is the priority being
-						raised above that of the running task? */
-						if( uxNewPriority >= pxCurrentTCB->uxPriority )
-						{
-							xYieldRequired = pdTRUE;
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						/* The priority of the running task is being raised,
-						but the running task must already be the highest
-						priority task able to run so no yield is required. */
-					}
-				}
-				else if( pxTCB == pxCurrentTCB )
-				{
-					/* Setting the priority of the running task down means
-					there may now be another task of higher priority that
-					is ready to execute. */
-					xYieldRequired = pdTRUE;
-				}
-				else
-				{
-					/* Setting the priority of any other task down does not
-					require a yield as the running task must be above the
-					new priority of the task being modified. */
-				}
+            if( uxCurrentBasePriority != uxNewPriority )
+            {
+                /* The priority change may have readied a task of higher
+                 * priority than the calling task. */
+                if( uxNewPriority > uxCurrentBasePriority )
+                {
+                    if( pxTCB != pxCurrentTCB )
+                    {
+                        /* The priority of a task other than the currently
+                         * running task is being raised.  Is the priority being
+                         * raised above that of the running task? */
+                        if( uxNewPriority >= pxCurrentTCB->uxPriority )
+                        {
+                            xYieldRequired = pdTRUE;
+                        }
+                        else
+                        {
+                            mtCOVERAGE_TEST_MARKER();
+                        }
+                    }
+                    else
+                    {
+                        /* The priority of the running task is being raised,
+                         * but the running task must already be the highest
+                         * priority task able to run so no yield is required. */
+                    }
+                }
+                else if( pxTCB == pxCurrentTCB )
+                {
+                    /* Setting the priority of the running task down means
+                     * there may now be another task of higher priority that
+                     * is ready to execute. */
+                    xYieldRequired = pdTRUE;
+                }
+                else
+                {
+                    /* Setting the priority of any other task down does not
+                     * require a yield as the running task must be above the
+                     * new priority of the task being modified. */
+                }
 
-				/* Remember the ready list the task might be referenced from
-				before its uxPriority member is changed so the
-				taskRESET_READY_PRIORITY() macro can function correctly. */
-				uxPriorityUsedOnEntry = pxTCB->uxPriority;
+                /* Remember the ready list the task might be referenced from
+                 * before its uxPriority member is changed so the
+                 * taskRESET_READY_PRIORITY() macro can function correctly. */
+                uxPriorityUsedOnEntry = pxTCB->uxPriority;
 
-				#if ( configUSE_MUTEXES == 1 )
-				{
-					/* Only change the priority being used if the task is not
-					currently using an inherited priority. */
-					if( pxTCB->uxBasePriority == pxTCB->uxPriority )
-					{
-						pxTCB->uxPriority = uxNewPriority;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
+                #if ( configUSE_MUTEXES == 1 )
+                    {
+                        /* Only change the priority being used if the task is not
+                         * currently using an inherited priority. */
+                        if( pxTCB->uxBasePriority == pxTCB->uxPriority )
+                        {
+                            pxTCB->uxPriority = uxNewPriority;
+                        }
+                        else
+                        {
+                            mtCOVERAGE_TEST_MARKER();
+                        }
 
-					/* The base priority gets set whatever. */
-					pxTCB->uxBasePriority = uxNewPriority;
-				}
-				#else
-				{
-					pxTCB->uxPriority = uxNewPriority;
-				}
-				#endif
+                        /* The base priority gets set whatever. */
+                        pxTCB->uxBasePriority = uxNewPriority;
+                    }
+                #else /* if ( configUSE_MUTEXES == 1 ) */
+                    {
+                        pxTCB->uxPriority = uxNewPriority;
+                    }
+                #endif /* if ( configUSE_MUTEXES == 1 ) */
 
-				/* Only reset the event list item value if the value is not
-				being used for anything else. */
-				if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
-				{
-					listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxNewPriority ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
+                /* Only reset the event list item value if the value is not
+                 * being used for anything else. */
+                if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
+                {
+                    listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxNewPriority ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
 
-				/* If the task is in the blocked or suspended list we need do
-				nothing more than change its priority variable. However, if
-				the task is in a ready list it needs to be removed and placed
-				in the list appropriate to its new priority. */
-				if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxPriorityUsedOnEntry ] ), &( pxTCB->xStateListItem ) ) != pdFALSE )
-				{
-					/* The task is currently in its ready list - remove before
-					adding it to it's new ready list.  As we are in a critical
-					section we can do this even if the scheduler is suspended. */
-					if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
-					{
-						/* It is known that the task is in its ready list so
-						there is no need to check again and the port level
-						reset macro can be called directly. */
-						portRESET_READY_PRIORITY( uxPriorityUsedOnEntry, uxTopReadyPriority );
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-					prvAddTaskToReadyList( pxTCB );
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
+                /* If the task is in the blocked or suspended list we need do
+                 * nothing more than change its priority variable. However, if
+                 * the task is in a ready list it needs to be removed and placed
+                 * in the list appropriate to its new priority. */
+                if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxPriorityUsedOnEntry ] ), &( pxTCB->xStateListItem ) ) != pdFALSE )
+                {
+                    /* The task is currently in its ready list - remove before
+                     * adding it to it's new ready list.  As we are in a critical
+                     * section we can do this even if the scheduler is suspended. */
+                    if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
+                    {
+                        /* It is known that the task is in its ready list so
+                         * there is no need to check again and the port level
+                         * reset macro can be called directly. */
+                        portRESET_READY_PRIORITY( uxPriorityUsedOnEntry, uxTopReadyPriority );
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
 
-				if( xYieldRequired != pdFALSE )
-				{
-					taskYIELD_IF_USING_PREEMPTION();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
+                    prvAddTaskToReadyList( pxTCB );
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
 
-				/* Remove compiler warning about unused variables when the port
-				optimised task selection is not being used. */
-				( void ) uxPriorityUsedOnEntry;
-			}
-		}
-		taskEXIT_CRITICAL();
-	}
+                if( xYieldRequired != pdFALSE )
+                {
+                    taskYIELD_IF_USING_PREEMPTION();
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+
+                /* Remove compiler warning about unused variables when the port
+                 * optimised task selection is not being used. */
+                ( void ) uxPriorityUsedOnEntry;
+            }
+        }
+        taskEXIT_CRITICAL();
+    }
 
 #endif /* INCLUDE_vTaskPrioritySet */
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_vTaskSuspend == 1 )
 
-	void vTaskSuspend( TaskHandle_t xTaskToSuspend )
-	{
-	TCB_t *pxTCB;
+    void vTaskSuspend( TaskHandle_t xTaskToSuspend )
+    {
+        TCB_t * pxTCB;
 
-		taskENTER_CRITICAL();
-		{
-			/* If null is passed in here then it is the running task that is
-			being suspended. */
-			pxTCB = prvGetTCBFromHandle( xTaskToSuspend );
+        taskENTER_CRITICAL();
+        {
+            /* If null is passed in here then it is the running task that is
+             * being suspended. */
+            pxTCB = prvGetTCBFromHandle( xTaskToSuspend );
 
-			traceTASK_SUSPEND( pxTCB );
+            traceTASK_SUSPEND( pxTCB );
 
-			/* Remove task from the ready/delayed list and place in the
-			suspended list. */
-			if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
-			{
-				taskRESET_READY_PRIORITY( pxTCB->uxPriority );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
+            /* Remove task from the ready/delayed list and place in the
+             * suspended list. */
+            if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
+            {
+                taskRESET_READY_PRIORITY( pxTCB->uxPriority );
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
 
-			/* Is the task waiting on an event also? */
-			if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
-			{
-				( void ) uxListRemove( &( pxTCB->xEventListItem ) );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
+            /* Is the task waiting on an event also? */
+            if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
+            {
+                ( void ) uxListRemove( &( pxTCB->xEventListItem ) );
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
 
-			vListInsertEnd( &xSuspendedTaskList, &( pxTCB->xStateListItem ) );
+            vListInsertEnd( &xSuspendedTaskList, &( pxTCB->xStateListItem ) );
 
-			#if( configUSE_TASK_NOTIFICATIONS == 1 )
-			{
-				if( pxTCB->ucNotifyState == taskWAITING_NOTIFICATION )
-				{
-					/* The task was blocked to wait for a notification, but is
-					now suspended, so no notification was received. */
-					pxTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
-				}
-			}
-			#endif
-		}
-		taskEXIT_CRITICAL();
+            #if ( configUSE_TASK_NOTIFICATIONS == 1 )
+                {
+                    BaseType_t x;
 
-		if( xSchedulerRunning != pdFALSE )
-		{
-			/* Reset the next expected unblock time in case it referred to the
-			task that is now in the Suspended state. */
-			taskENTER_CRITICAL();
-			{
-				prvResetNextTaskUnblockTime();
-			}
-			taskEXIT_CRITICAL();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
+                    for( x = 0; x < configTASK_NOTIFICATION_ARRAY_ENTRIES; x++ )
+                    {
+                        if( pxTCB->ucNotifyState[ x ] == taskWAITING_NOTIFICATION )
+                        {
+                            /* The task was blocked to wait for a notification, but is
+                             * now suspended, so no notification was received. */
+                            pxTCB->ucNotifyState[ x ] = taskNOT_WAITING_NOTIFICATION;
+                        }
+                    }
+                }
+            #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */
+        }
+        taskEXIT_CRITICAL();
 
-		if( pxTCB == pxCurrentTCB )
-		{
-			if( xSchedulerRunning != pdFALSE )
-			{
-				/* The current task has just been suspended. */
-				configASSERT( uxSchedulerSuspended == 0 );
-				portYIELD_WITHIN_API();
-			}
-			else
-			{
-				/* The scheduler is not running, but the task that was pointed
-				to by pxCurrentTCB has just been suspended and pxCurrentTCB
-				must be adjusted to point to a different task. */
-				if( listCURRENT_LIST_LENGTH( &xSuspendedTaskList ) == uxCurrentNumberOfTasks ) /*lint !e931 Right has no side effect, just volatile. */
-				{
-					/* No other tasks are ready, so set pxCurrentTCB back to
-					NULL so when the next task is created pxCurrentTCB will
-					be set to point to it no matter what its relative priority
-					is. */
-					pxCurrentTCB = NULL;
-				}
-				else
-				{
-					vTaskSwitchContext();
-				}
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
+        if( xSchedulerRunning != pdFALSE )
+        {
+            /* Reset the next expected unblock time in case it referred to the
+             * task that is now in the Suspended state. */
+            taskENTER_CRITICAL();
+            {
+                prvResetNextTaskUnblockTime();
+            }
+            taskEXIT_CRITICAL();
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+
+        if( pxTCB == pxCurrentTCB )
+        {
+            if( xSchedulerRunning != pdFALSE )
+            {
+                /* The current task has just been suspended. */
+                configASSERT( uxSchedulerSuspended == 0 );
+                portYIELD_WITHIN_API();
+            }
+            else
+            {
+                /* The scheduler is not running, but the task that was pointed
+                 * to by pxCurrentTCB has just been suspended and pxCurrentTCB
+                 * must be adjusted to point to a different task. */
+                if( listCURRENT_LIST_LENGTH( &xSuspendedTaskList ) == uxCurrentNumberOfTasks ) /*lint !e931 Right has no side effect, just volatile. */
+                {
+                    /* No other tasks are ready, so set pxCurrentTCB back to
+                     * NULL so when the next task is created pxCurrentTCB will
+                     * be set to point to it no matter what its relative priority
+                     * is. */
+                    pxCurrentTCB = NULL;
+                }
+                else
+                {
+                    vTaskSwitchContext();
+                }
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
 
 #endif /* INCLUDE_vTaskSuspend */
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_vTaskSuspend == 1 )
 
-	static BaseType_t prvTaskIsTaskSuspended( const TaskHandle_t xTask )
-	{
-	BaseType_t xReturn = pdFALSE;
-	const TCB_t * const pxTCB = xTask;
+    static BaseType_t prvTaskIsTaskSuspended( const TaskHandle_t xTask )
+    {
+        BaseType_t xReturn = pdFALSE;
+        const TCB_t * const pxTCB = xTask;
 
-		/* Accesses xPendingReadyList so must be called from a critical
-		section. */
+        /* Accesses xPendingReadyList so must be called from a critical
+         * section. */
 
-		/* It does not make sense to check if the calling task is suspended. */
-		configASSERT( xTask );
+        /* It does not make sense to check if the calling task is suspended. */
+        configASSERT( xTask );
 
-		/* Is the task being resumed actually in the suspended list? */
-		if( listIS_CONTAINED_WITHIN( &xSuspendedTaskList, &( pxTCB->xStateListItem ) ) != pdFALSE )
-		{
-			/* Has the task already been resumed from within an ISR? */
-			if( listIS_CONTAINED_WITHIN( &xPendingReadyList, &( pxTCB->xEventListItem ) ) == pdFALSE )
-			{
-				/* Is it in the suspended list because it is in the	Suspended
-				state, or because is is blocked with no timeout? */
-				if( listIS_CONTAINED_WITHIN( NULL, &( pxTCB->xEventListItem ) ) != pdFALSE ) /*lint !e961.  The cast is only redundant when NULL is used. */
-				{
-					xReturn = pdTRUE;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
+        /* Is the task being resumed actually in the suspended list? */
+        if( listIS_CONTAINED_WITHIN( &xSuspendedTaskList, &( pxTCB->xStateListItem ) ) != pdFALSE )
+        {
+            /* Has the task already been resumed from within an ISR? */
+            if( listIS_CONTAINED_WITHIN( &xPendingReadyList, &( pxTCB->xEventListItem ) ) == pdFALSE )
+            {
+                /* Is it in the suspended list because it is in the Suspended
+                 * state, or because is is blocked with no timeout? */
+                if( listIS_CONTAINED_WITHIN( NULL, &( pxTCB->xEventListItem ) ) != pdFALSE ) /*lint !e961.  The cast is only redundant when NULL is used. */
+                {
+                    xReturn = pdTRUE;
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
 
-		return xReturn;
-	} /*lint !e818 xTask cannot be a pointer to const because it is a typedef. */
+        return xReturn;
+    } /*lint !e818 xTask cannot be a pointer to const because it is a typedef. */
 
 #endif /* INCLUDE_vTaskSuspend */
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_vTaskSuspend == 1 )
 
-	void vTaskResume( TaskHandle_t xTaskToResume )
-	{
-	TCB_t * const pxTCB = xTaskToResume;
+    void vTaskResume( TaskHandle_t xTaskToResume )
+    {
+        TCB_t * const pxTCB = xTaskToResume;
 
-		/* It does not make sense to resume the calling task. */
-		configASSERT( xTaskToResume );
+        /* It does not make sense to resume the calling task. */
+        configASSERT( xTaskToResume );
 
-		/* The parameter cannot be NULL as it is impossible to resume the
-		currently executing task. */
-		if( ( pxTCB != pxCurrentTCB ) && ( pxTCB != NULL ) )
-		{
-			taskENTER_CRITICAL();
-			{
-				if( prvTaskIsTaskSuspended( pxTCB ) != pdFALSE )
-				{
-					traceTASK_RESUME( pxTCB );
+        /* The parameter cannot be NULL as it is impossible to resume the
+         * currently executing task. */
+        if( ( pxTCB != pxCurrentTCB ) && ( pxTCB != NULL ) )
+        {
+            taskENTER_CRITICAL();
+            {
+                if( prvTaskIsTaskSuspended( pxTCB ) != pdFALSE )
+                {
+                    traceTASK_RESUME( pxTCB );
 
-					/* The ready list can be accessed even if the scheduler is
-					suspended because this is inside a critical section. */
-					( void ) uxListRemove(  &( pxTCB->xStateListItem ) );
-					prvAddTaskToReadyList( pxTCB );
+                    /* The ready list can be accessed even if the scheduler is
+                     * suspended because this is inside a critical section. */
+                    ( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+                    prvAddTaskToReadyList( pxTCB );
 
-					/* A higher priority task may have just been resumed. */
-					if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
-					{
-						/* This yield may not cause the task just resumed to run,
-						but will leave the lists in the correct state for the
-						next yield. */
-						taskYIELD_IF_USING_PREEMPTION();
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			taskEXIT_CRITICAL();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
+                    /* A higher priority task may have just been resumed. */
+                    if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
+                    {
+                        /* This yield may not cause the task just resumed to run,
+                         * but will leave the lists in the correct state for the
+                         * next yield. */
+                        taskYIELD_IF_USING_PREEMPTION();
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+            taskEXIT_CRITICAL();
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
 
 #endif /* INCLUDE_vTaskSuspend */
 
@@ -1902,1479 +1902,1494 @@ static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB )
 
 #if ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) )
 
-	BaseType_t xTaskResumeFromISR( TaskHandle_t xTaskToResume )
-	{
-	BaseType_t xYieldRequired = pdFALSE;
-	TCB_t * const pxTCB = xTaskToResume;
-	UBaseType_t uxSavedInterruptStatus;
+    BaseType_t xTaskResumeFromISR( TaskHandle_t xTaskToResume )
+    {
+        BaseType_t xYieldRequired = pdFALSE;
+        TCB_t * const pxTCB = xTaskToResume;
+        UBaseType_t uxSavedInterruptStatus;
 
-		configASSERT( xTaskToResume );
+        configASSERT( xTaskToResume );
 
-		/* RTOS ports that support interrupt nesting have the concept of a
-		maximum	system call (or maximum API call) interrupt priority.
-		Interrupts that are	above the maximum system call priority are keep
-		permanently enabled, even when the RTOS kernel is in a critical section,
-		but cannot make any calls to FreeRTOS API functions.  If configASSERT()
-		is defined in FreeRTOSConfig.h then
-		portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-		failure if a FreeRTOS API function is called from an interrupt that has
-		been assigned a priority above the configured maximum system call
-		priority.  Only FreeRTOS functions that end in FromISR can be called
-		from interrupts	that have been assigned a priority at or (logically)
-		below the maximum system call interrupt priority.  FreeRTOS maintains a
-		separate interrupt safe API to ensure interrupt entry is as fast and as
-		simple as possible.  More information (albeit Cortex-M specific) is
-		provided on the following link:
-		https://www.freertos.org/RTOS-Cortex-M3-M4.html */
-		portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+        /* RTOS ports that support interrupt nesting have the concept of a
+         * maximum  system call (or maximum API call) interrupt priority.
+         * Interrupts that are  above the maximum system call priority are keep
+         * permanently enabled, even when the RTOS kernel is in a critical section,
+         * but cannot make any calls to FreeRTOS API functions.  If configASSERT()
+         * is defined in FreeRTOSConfig.h then
+         * portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
+         * failure if a FreeRTOS API function is called from an interrupt that has
+         * been assigned a priority above the configured maximum system call
+         * priority.  Only FreeRTOS functions that end in FromISR can be called
+         * from interrupts  that have been assigned a priority at or (logically)
+         * below the maximum system call interrupt priority.  FreeRTOS maintains a
+         * separate interrupt safe API to ensure interrupt entry is as fast and as
+         * simple as possible.  More information (albeit Cortex-M specific) is
+         * provided on the following link:
+         * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
+        portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 
-		uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
-		{
-			if( prvTaskIsTaskSuspended( pxTCB ) != pdFALSE )
-			{
-				traceTASK_RESUME_FROM_ISR( pxTCB );
+        uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
+        {
+            if( prvTaskIsTaskSuspended( pxTCB ) != pdFALSE )
+            {
+                traceTASK_RESUME_FROM_ISR( pxTCB );
 
-				/* Check the ready lists can be accessed. */
-				if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
-				{
-					/* Ready lists can be accessed so move the task from the
-					suspended list to the ready list directly. */
-					if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
-					{
-						xYieldRequired = pdTRUE;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
+                /* Check the ready lists can be accessed. */
+                if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+                {
+                    /* Ready lists can be accessed so move the task from the
+                     * suspended list to the ready list directly. */
+                    if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
+                    {
+                        xYieldRequired = pdTRUE;
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
 
-					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
-					prvAddTaskToReadyList( pxTCB );
-				}
-				else
-				{
-					/* The delayed or ready lists cannot be accessed so the task
-					is held in the pending ready list until the scheduler is
-					unsuspended. */
-					vListInsertEnd( &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+                    ( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+                    prvAddTaskToReadyList( pxTCB );
+                }
+                else
+                {
+                    /* The delayed or ready lists cannot be accessed so the task
+                     * is held in the pending ready list until the scheduler is
+                     * unsuspended. */
+                    vListInsertEnd( &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
+                }
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
 
-		return xYieldRequired;
-	}
+        return xYieldRequired;
+    }
 
 #endif /* ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) */
 /*-----------------------------------------------------------*/
 
 void vTaskStartScheduler( void )
 {
-BaseType_t xReturn;
+    BaseType_t xReturn;
 
-	/* Add the idle task at the lowest priority. */
-	#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-	{
-		StaticTask_t *pxIdleTaskTCBBuffer = NULL;
-		StackType_t *pxIdleTaskStackBuffer = NULL;
-		uint32_t ulIdleTaskStackSize;
+    /* Add the idle task at the lowest priority. */
+    #if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+        {
+            StaticTask_t * pxIdleTaskTCBBuffer = NULL;
+            StackType_t * pxIdleTaskStackBuffer = NULL;
+            uint32_t ulIdleTaskStackSize;
 
-		/* The Idle task is created using user provided RAM - obtain the
-		address of the RAM then create the idle task. */
-		vApplicationGetIdleTaskMemory( &pxIdleTaskTCBBuffer, &pxIdleTaskStackBuffer, &ulIdleTaskStackSize );
-		xIdleTaskHandle = xTaskCreateStatic(	prvIdleTask,
-												configIDLE_TASK_NAME,
-												ulIdleTaskStackSize,
-												( void * ) NULL, /*lint !e961.  The cast is not redundant for all compilers. */
-												portPRIVILEGE_BIT, /* In effect ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), but tskIDLE_PRIORITY is zero. */
-												pxIdleTaskStackBuffer,
-												pxIdleTaskTCBBuffer ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */
+            /* The Idle task is created using user provided RAM - obtain the
+             * address of the RAM then create the idle task. */
+            vApplicationGetIdleTaskMemory( &pxIdleTaskTCBBuffer, &pxIdleTaskStackBuffer, &ulIdleTaskStackSize );
+            xIdleTaskHandle = xTaskCreateStatic( prvIdleTask,
+                                                 configIDLE_TASK_NAME,
+                                                 ulIdleTaskStackSize,
+                                                 ( void * ) NULL,       /*lint !e961.  The cast is not redundant for all compilers. */
+                                                 portPRIVILEGE_BIT,     /* In effect ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), but tskIDLE_PRIORITY is zero. */
+                                                 pxIdleTaskStackBuffer,
+                                                 pxIdleTaskTCBBuffer ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */
 
-		if( xIdleTaskHandle != NULL )
-		{
-			xReturn = pdPASS;
-		}
-		else
-		{
-			xReturn = pdFAIL;
-		}
-	}
-	#else
-	{
-		/* The Idle task is being created using dynamically allocated RAM. */
-		xReturn = xTaskCreate(	prvIdleTask,
-								configIDLE_TASK_NAME,
-								configMINIMAL_STACK_SIZE,
-								( void * ) NULL,
-								portPRIVILEGE_BIT, /* In effect ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), but tskIDLE_PRIORITY is zero. */
-								&xIdleTaskHandle ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */
-	}
-	#endif /* configSUPPORT_STATIC_ALLOCATION */
+            if( xIdleTaskHandle != NULL )
+            {
+                xReturn = pdPASS;
+            }
+            else
+            {
+                xReturn = pdFAIL;
+            }
+        }
+    #else /* if ( configSUPPORT_STATIC_ALLOCATION == 1 ) */
+        {
+            /* The Idle task is being created using dynamically allocated RAM. */
+            xReturn = xTaskCreate( prvIdleTask,
+                                   configIDLE_TASK_NAME,
+                                   configMINIMAL_STACK_SIZE,
+                                   ( void * ) NULL,
+                                   portPRIVILEGE_BIT,  /* In effect ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), but tskIDLE_PRIORITY is zero. */
+                                   &xIdleTaskHandle ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */
+        }
+    #endif /* configSUPPORT_STATIC_ALLOCATION */
 
-	#if ( configUSE_TIMERS == 1 )
-	{
-		if( xReturn == pdPASS )
-		{
-			xReturn = xTimerCreateTimerTask();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	#endif /* configUSE_TIMERS */
+    #if ( configUSE_TIMERS == 1 )
+        {
+            if( xReturn == pdPASS )
+            {
+                xReturn = xTimerCreateTimerTask();
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+    #endif /* configUSE_TIMERS */
 
-	if( xReturn == pdPASS )
-	{
-		/* freertos_tasks_c_additions_init() should only be called if the user
-		definable macro FREERTOS_TASKS_C_ADDITIONS_INIT() is defined, as that is
-		the only macro called by the function. */
-		#ifdef FREERTOS_TASKS_C_ADDITIONS_INIT
-		{
-			freertos_tasks_c_additions_init();
-		}
-		#endif
+    if( xReturn == pdPASS )
+    {
+        /* freertos_tasks_c_additions_init() should only be called if the user
+         * definable macro FREERTOS_TASKS_C_ADDITIONS_INIT() is defined, as that is
+         * the only macro called by the function. */
+        #ifdef FREERTOS_TASKS_C_ADDITIONS_INIT
+            {
+                freertos_tasks_c_additions_init();
+            }
+        #endif
 
-		/* Interrupts are turned off here, to ensure a tick does not occur
-		before or during the call to xPortStartScheduler().  The stacks of
-		the created tasks contain a status word with interrupts switched on
-		so interrupts will automatically get re-enabled when the first task
-		starts to run. */
-		portDISABLE_INTERRUPTS();
+        /* Interrupts are turned off here, to ensure a tick does not occur
+         * before or during the call to xPortStartScheduler().  The stacks of
+         * the created tasks contain a status word with interrupts switched on
+         * so interrupts will automatically get re-enabled when the first task
+         * starts to run. */
+        portDISABLE_INTERRUPTS();
 
-		#if ( configUSE_NEWLIB_REENTRANT == 1 )
-		{
-			/* Switch Newlib's _impure_ptr variable to point to the _reent
-			structure specific to the task that will run first.
-			See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
-			for additional information. */
-			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
-		}
-		#endif /* configUSE_NEWLIB_REENTRANT */
+        #if ( configUSE_NEWLIB_REENTRANT == 1 )
+            {
+                /* Switch Newlib's _impure_ptr variable to point to the _reent
+                 * structure specific to the task that will run first.
+                 * See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
+                 * for additional information. */
+                _impure_ptr = &( pxCurrentTCB->xNewLib_reent );
+            }
+        #endif /* configUSE_NEWLIB_REENTRANT */
 
-		xNextTaskUnblockTime = portMAX_DELAY;
-		xSchedulerRunning = pdTRUE;
-		xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT;
+        xNextTaskUnblockTime = portMAX_DELAY;
+        xSchedulerRunning = pdTRUE;
+        xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT;
 
-		/* If configGENERATE_RUN_TIME_STATS is defined then the following
-		macro must be defined to configure the timer/counter used to generate
-		the run time counter time base.   NOTE:  If configGENERATE_RUN_TIME_STATS
-		is set to 0 and the following line fails to build then ensure you do not
-		have portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() defined in your
-		FreeRTOSConfig.h file. */
-		portCONFIGURE_TIMER_FOR_RUN_TIME_STATS();
+        /* If configGENERATE_RUN_TIME_STATS is defined then the following
+         * macro must be defined to configure the timer/counter used to generate
+         * the run time counter time base.   NOTE:  If configGENERATE_RUN_TIME_STATS
+         * is set to 0 and the following line fails to build then ensure you do not
+         * have portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() defined in your
+         * FreeRTOSConfig.h file. */
+        portCONFIGURE_TIMER_FOR_RUN_TIME_STATS();
 
-		traceTASK_SWITCHED_IN();
+        traceTASK_SWITCHED_IN();
 
-		/* Setting up the timer tick is hardware specific and thus in the
-		portable interface. */
-		if( xPortStartScheduler() != pdFALSE )
-		{
-			/* Should not reach here as if the scheduler is running the
-			function will not return. */
-		}
-		else
-		{
-			/* Should only reach here if a task calls xTaskEndScheduler(). */
-		}
-	}
-	else
-	{
-		/* This line will only be reached if the kernel could not be started,
-		because there was not enough FreeRTOS heap to create the idle task
-		or the timer task. */
-		configASSERT( xReturn != errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY );
-	}
+        /* Setting up the timer tick is hardware specific and thus in the
+         * portable interface. */
+        if( xPortStartScheduler() != pdFALSE )
+        {
+            /* Should not reach here as if the scheduler is running the
+             * function will not return. */
+        }
+        else
+        {
+            /* Should only reach here if a task calls xTaskEndScheduler(). */
+        }
+    }
+    else
+    {
+        /* This line will only be reached if the kernel could not be started,
+         * because there was not enough FreeRTOS heap to create the idle task
+         * or the timer task. */
+        configASSERT( xReturn != errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY );
+    }
 
-	/* Prevent compiler warnings if INCLUDE_xTaskGetIdleTaskHandle is set to 0,
-	meaning xIdleTaskHandle is not used anywhere else. */
-	( void ) xIdleTaskHandle;
+    /* Prevent compiler warnings if INCLUDE_xTaskGetIdleTaskHandle is set to 0,
+     * meaning xIdleTaskHandle is not used anywhere else. */
+    ( void ) xIdleTaskHandle;
 }
 /*-----------------------------------------------------------*/
 
 void vTaskEndScheduler( void )
 {
-	/* Stop the scheduler interrupts and call the portable scheduler end
-	routine so the original ISRs can be restored if necessary.  The port
-	layer must ensure interrupts enable	bit is left in the correct state. */
-	portDISABLE_INTERRUPTS();
-	xSchedulerRunning = pdFALSE;
-	vPortEndScheduler();
+    /* Stop the scheduler interrupts and call the portable scheduler end
+     * routine so the original ISRs can be restored if necessary.  The port
+     * layer must ensure interrupts enable  bit is left in the correct state. */
+    portDISABLE_INTERRUPTS();
+    xSchedulerRunning = pdFALSE;
+    vPortEndScheduler();
 }
 /*----------------------------------------------------------*/
 
 void vTaskSuspendAll( void )
 {
-	/* A critical section is not required as the variable is of type
-	BaseType_t.  Please read Richard Barry's reply in the following link to a
-	post in the FreeRTOS support forum before reporting this as a bug! -
-	http://goo.gl/wu4acr */
+    /* A critical section is not required as the variable is of type
+     * BaseType_t.  Please read Richard Barry's reply in the following link to a
+     * post in the FreeRTOS support forum before reporting this as a bug! -
+     * https://goo.gl/wu4acr */
 
-	/* portSOFRWARE_BARRIER() is only implemented for emulated/simulated ports that
-	do not otherwise exhibit real time behaviour. */
-	portSOFTWARE_BARRIER();
+    /* portSOFRWARE_BARRIER() is only implemented for emulated/simulated ports that
+     * do not otherwise exhibit real time behaviour. */
+    portSOFTWARE_BARRIER();
 
-	/* The scheduler is suspended if uxSchedulerSuspended is non-zero.  An increment
-	is used to allow calls to vTaskSuspendAll() to nest. */
-	++uxSchedulerSuspended;
+    /* The scheduler is suspended if uxSchedulerSuspended is non-zero.  An increment
+     * is used to allow calls to vTaskSuspendAll() to nest. */
+    ++uxSchedulerSuspended;
 
-	/* Enforces ordering for ports and optimised compilers that may otherwise place
-	the above increment elsewhere. */
-	portMEMORY_BARRIER();
+    /* Enforces ordering for ports and optimised compilers that may otherwise place
+     * the above increment elsewhere. */
+    portMEMORY_BARRIER();
 }
 /*----------------------------------------------------------*/
 
 #if ( configUSE_TICKLESS_IDLE != 0 )
 
-	static TickType_t prvGetExpectedIdleTime( void )
-	{
-	TickType_t xReturn;
-	UBaseType_t uxHigherPriorityReadyTasks = pdFALSE;
+    static TickType_t prvGetExpectedIdleTime( void )
+    {
+        TickType_t xReturn;
+        UBaseType_t uxHigherPriorityReadyTasks = pdFALSE;
 
-		/* uxHigherPriorityReadyTasks takes care of the case where
-		configUSE_PREEMPTION is 0, so there may be tasks above the idle priority
-		task that are in the Ready state, even though the idle task is
-		running. */
-		#if( configUSE_PORT_OPTIMISED_TASK_SELECTION == 0 )
-		{
-			if( uxTopReadyPriority > tskIDLE_PRIORITY )
-			{
-				uxHigherPriorityReadyTasks = pdTRUE;
-			}
-		}
-		#else
-		{
-			const UBaseType_t uxLeastSignificantBit = ( UBaseType_t ) 0x01;
+        /* uxHigherPriorityReadyTasks takes care of the case where
+         * configUSE_PREEMPTION is 0, so there may be tasks above the idle priority
+         * task that are in the Ready state, even though the idle task is
+         * running. */
+        #if ( configUSE_PORT_OPTIMISED_TASK_SELECTION == 0 )
+            {
+                if( uxTopReadyPriority > tskIDLE_PRIORITY )
+                {
+                    uxHigherPriorityReadyTasks = pdTRUE;
+                }
+            }
+        #else
+            {
+                const UBaseType_t uxLeastSignificantBit = ( UBaseType_t ) 0x01;
 
-			/* When port optimised task selection is used the uxTopReadyPriority
-			variable is used as a bit map.  If bits other than the least
-			significant bit are set then there are tasks that have a priority
-			above the idle priority that are in the Ready state.  This takes
-			care of the case where the co-operative scheduler is in use. */
-			if( uxTopReadyPriority > uxLeastSignificantBit )
-			{
-				uxHigherPriorityReadyTasks = pdTRUE;
-			}
-		}
-		#endif
+                /* When port optimised task selection is used the uxTopReadyPriority
+                 * variable is used as a bit map.  If bits other than the least
+                 * significant bit are set then there are tasks that have a priority
+                 * above the idle priority that are in the Ready state.  This takes
+                 * care of the case where the co-operative scheduler is in use. */
+                if( uxTopReadyPriority > uxLeastSignificantBit )
+                {
+                    uxHigherPriorityReadyTasks = pdTRUE;
+                }
+            }
+        #endif /* if ( configUSE_PORT_OPTIMISED_TASK_SELECTION == 0 ) */
 
-		if( pxCurrentTCB->uxPriority > tskIDLE_PRIORITY )
-		{
-			xReturn = 0;
-		}
-		else if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > 1 )
-		{
-			/* There are other idle priority tasks in the ready state.  If
-			time slicing is used then the very next tick interrupt must be
-			processed. */
-			xReturn = 0;
-		}
-		else if( uxHigherPriorityReadyTasks != pdFALSE )
-		{
-			/* There are tasks in the Ready state that have a priority above the
-			idle priority.  This path can only be reached if
-			configUSE_PREEMPTION is 0. */
-			xReturn = 0;
-		}
-		else
-		{
-			xReturn = xNextTaskUnblockTime - xTickCount;
-		}
+        if( pxCurrentTCB->uxPriority > tskIDLE_PRIORITY )
+        {
+            xReturn = 0;
+        }
+        else if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > 1 )
+        {
+            /* There are other idle priority tasks in the ready state.  If
+             * time slicing is used then the very next tick interrupt must be
+             * processed. */
+            xReturn = 0;
+        }
+        else if( uxHigherPriorityReadyTasks != pdFALSE )
+        {
+            /* There are tasks in the Ready state that have a priority above the
+             * idle priority.  This path can only be reached if
+             * configUSE_PREEMPTION is 0. */
+            xReturn = 0;
+        }
+        else
+        {
+            xReturn = xNextTaskUnblockTime - xTickCount;
+        }
 
-		return xReturn;
-	}
+        return xReturn;
+    }
 
 #endif /* configUSE_TICKLESS_IDLE */
 /*----------------------------------------------------------*/
 
 BaseType_t xTaskResumeAll( void )
 {
-TCB_t *pxTCB = NULL;
-BaseType_t xAlreadyYielded = pdFALSE;
+    TCB_t * pxTCB = NULL;
+    BaseType_t xAlreadyYielded = pdFALSE;
 
-	/* If uxSchedulerSuspended is zero then this function does not match a
-	previous call to vTaskSuspendAll(). */
-	configASSERT( uxSchedulerSuspended );
+    /* If uxSchedulerSuspended is zero then this function does not match a
+     * previous call to vTaskSuspendAll(). */
+    configASSERT( uxSchedulerSuspended );
 
-	/* It is possible that an ISR caused a task to be removed from an event
-	list while the scheduler was suspended.  If this was the case then the
-	removed task will have been added to the xPendingReadyList.  Once the
-	scheduler has been resumed it is safe to move all the pending ready
-	tasks from this list into their appropriate ready list. */
-	taskENTER_CRITICAL();
-	{
-		--uxSchedulerSuspended;
+    /* It is possible that an ISR caused a task to be removed from an event
+     * list while the scheduler was suspended.  If this was the case then the
+     * removed task will have been added to the xPendingReadyList.  Once the
+     * scheduler has been resumed it is safe to move all the pending ready
+     * tasks from this list into their appropriate ready list. */
+    taskENTER_CRITICAL();
+    {
+        --uxSchedulerSuspended;
 
-		if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
-		{
-			if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U )
-			{
-				/* Move any readied tasks from the pending list into the
-				appropriate ready list. */
-				while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
-				{
-					pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
-					( void ) uxListRemove( &( pxTCB->xEventListItem ) );
-					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
-					prvAddTaskToReadyList( pxTCB );
+        if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+        {
+            if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U )
+            {
+                /* Move any readied tasks from the pending list into the
+                 * appropriate ready list. */
+                while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
+                {
+                    pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+                    ( void ) uxListRemove( &( pxTCB->xEventListItem ) );
+                    ( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+                    prvAddTaskToReadyList( pxTCB );
 
-					/* If the moved task has a priority higher than the current
-					task then a yield must be performed. */
-					if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
-					{
-						xYieldPending = pdTRUE;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
+                    /* If the moved task has a priority higher than the current
+                     * task then a yield must be performed. */
+                    if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
+                    {
+                        xYieldPending = pdTRUE;
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
+                }
 
-				if( pxTCB != NULL )
-				{
-					/* A task was unblocked while the scheduler was suspended,
-					which may have prevented the next unblock time from being
-					re-calculated, in which case re-calculate it now.  Mainly
-					important for low power tickless implementations, where
-					this can prevent an unnecessary exit from low power
-					state. */
-					prvResetNextTaskUnblockTime();
-				}
+                if( pxTCB != NULL )
+                {
+                    /* A task was unblocked while the scheduler was suspended,
+                     * which may have prevented the next unblock time from being
+                     * re-calculated, in which case re-calculate it now.  Mainly
+                     * important for low power tickless implementations, where
+                     * this can prevent an unnecessary exit from low power
+                     * state. */
+                    prvResetNextTaskUnblockTime();
+                }
 
-				/* If any ticks occurred while the scheduler was suspended then
-				they should be processed now.  This ensures the tick count does
-				not	slip, and that any delayed tasks are resumed at the correct
-				time. */
-				{
-					TickType_t xPendedCounts = xPendedTicks; /* Non-volatile copy. */
+                /* If any ticks occurred while the scheduler was suspended then
+                 * they should be processed now.  This ensures the tick count does
+                 * not  slip, and that any delayed tasks are resumed at the correct
+                 * time. */
+                {
+                    TickType_t xPendedCounts = xPendedTicks; /* Non-volatile copy. */
 
-					if( xPendedCounts > ( TickType_t ) 0U )
-					{
-						do
-						{
-							if( xTaskIncrementTick() != pdFALSE )
-							{
-								xYieldPending = pdTRUE;
-							}
-							else
-							{
-								mtCOVERAGE_TEST_MARKER();
-							}
-							--xPendedCounts;
-						} while( xPendedCounts > ( TickType_t ) 0U );
+                    if( xPendedCounts > ( TickType_t ) 0U )
+                    {
+                        do
+                        {
+                            if( xTaskIncrementTick() != pdFALSE )
+                            {
+                                xYieldPending = pdTRUE;
+                            }
+                            else
+                            {
+                                mtCOVERAGE_TEST_MARKER();
+                            }
 
-						xPendedTicks = 0;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
+                            --xPendedCounts;
+                        } while( xPendedCounts > ( TickType_t ) 0U );
 
-				if( xYieldPending != pdFALSE )
-				{
-					#if( configUSE_PREEMPTION != 0 )
-					{
-						xAlreadyYielded = pdTRUE;
-					}
-					#endif
-					taskYIELD_IF_USING_PREEMPTION();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	taskEXIT_CRITICAL();
+                        xPendedTicks = 0;
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
+                }
 
-	return xAlreadyYielded;
+                if( xYieldPending != pdFALSE )
+                {
+                    #if ( configUSE_PREEMPTION != 0 )
+                        {
+                            xAlreadyYielded = pdTRUE;
+                        }
+                    #endif
+                    taskYIELD_IF_USING_PREEMPTION();
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
+    taskEXIT_CRITICAL();
+
+    return xAlreadyYielded;
 }
 /*-----------------------------------------------------------*/
 
 TickType_t xTaskGetTickCount( void )
 {
-TickType_t xTicks;
+    TickType_t xTicks;
 
-	/* Critical section required if running on a 16 bit processor. */
-	portTICK_TYPE_ENTER_CRITICAL();
-	{
-		xTicks = xTickCount;
-	}
-	portTICK_TYPE_EXIT_CRITICAL();
+    /* Critical section required if running on a 16 bit processor. */
+    portTICK_TYPE_ENTER_CRITICAL();
+    {
+        xTicks = xTickCount;
+    }
+    portTICK_TYPE_EXIT_CRITICAL();
 
-	return xTicks;
+    return xTicks;
 }
 /*-----------------------------------------------------------*/
 
 TickType_t xTaskGetTickCountFromISR( void )
 {
-TickType_t xReturn;
-UBaseType_t uxSavedInterruptStatus;
+    TickType_t xReturn;
+    UBaseType_t uxSavedInterruptStatus;
 
-	/* RTOS ports that support interrupt nesting have the concept of a maximum
-	system call (or maximum API call) interrupt priority.  Interrupts that are
-	above the maximum system call priority are kept permanently enabled, even
-	when the RTOS kernel is in a critical section, but cannot make any calls to
-	FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
-	then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-	failure if a FreeRTOS API function is called from an interrupt that has been
-	assigned a priority above the configured maximum system call priority.
-	Only FreeRTOS functions that end in FromISR can be called from interrupts
-	that have been assigned a priority at or (logically) below the maximum
-	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
-	safe API to ensure interrupt entry is as fast and as simple as possible.
-	More information (albeit Cortex-M specific) is provided on the following
-	link: https://www.freertos.org/RTOS-Cortex-M3-M4.html */
-	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+    /* RTOS ports that support interrupt nesting have the concept of a maximum
+     * system call (or maximum API call) interrupt priority.  Interrupts that are
+     * above the maximum system call priority are kept permanently enabled, even
+     * when the RTOS kernel is in a critical section, but cannot make any calls to
+     * FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
+     * then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
+     * failure if a FreeRTOS API function is called from an interrupt that has been
+     * assigned a priority above the configured maximum system call priority.
+     * Only FreeRTOS functions that end in FromISR can be called from interrupts
+     * that have been assigned a priority at or (logically) below the maximum
+     * system call  interrupt priority.  FreeRTOS maintains a separate interrupt
+     * safe API to ensure interrupt entry is as fast and as simple as possible.
+     * More information (albeit Cortex-M specific) is provided on the following
+     * link: https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
+    portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 
-	uxSavedInterruptStatus = portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR();
-	{
-		xReturn = xTickCount;
-	}
-	portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+    uxSavedInterruptStatus = portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR();
+    {
+        xReturn = xTickCount;
+    }
+    portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
 UBaseType_t uxTaskGetNumberOfTasks( void )
 {
-	/* A critical section is not required because the variables are of type
-	BaseType_t. */
-	return uxCurrentNumberOfTasks;
+    /* A critical section is not required because the variables are of type
+     * BaseType_t. */
+    return uxCurrentNumberOfTasks;
 }
 /*-----------------------------------------------------------*/
 
-char *pcTaskGetName( TaskHandle_t xTaskToQuery ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+char * pcTaskGetName( TaskHandle_t xTaskToQuery ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 {
-TCB_t *pxTCB;
+    TCB_t * pxTCB;
 
-	/* If null is passed in here then the name of the calling task is being
-	queried. */
-	pxTCB = prvGetTCBFromHandle( xTaskToQuery );
-	configASSERT( pxTCB );
-	return &( pxTCB->pcTaskName[ 0 ] );
+    /* If null is passed in here then the name of the calling task is being
+     * queried. */
+    pxTCB = prvGetTCBFromHandle( xTaskToQuery );
+    configASSERT( pxTCB );
+    return &( pxTCB->pcTaskName[ 0 ] );
 }
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_xTaskGetHandle == 1 )
 
-	static TCB_t *prvSearchForNameWithinSingleList( List_t *pxList, const char pcNameToQuery[] )
-	{
-	TCB_t *pxNextTCB, *pxFirstTCB, *pxReturn = NULL;
-	UBaseType_t x;
-	char cNextChar;
-	BaseType_t xBreakLoop;
+    static TCB_t * prvSearchForNameWithinSingleList( List_t * pxList,
+                                                     const char pcNameToQuery[] )
+    {
+        TCB_t * pxNextTCB, * pxFirstTCB, * pxReturn = NULL;
+        UBaseType_t x;
+        char cNextChar;
+        BaseType_t xBreakLoop;
 
-		/* This function is called with the scheduler suspended. */
+        /* This function is called with the scheduler suspended. */
 
-		if( listCURRENT_LIST_LENGTH( pxList ) > ( UBaseType_t ) 0 )
-		{
-			listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList );  /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+        if( listCURRENT_LIST_LENGTH( pxList ) > ( UBaseType_t ) 0 )
+        {
+            listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 
-			do
-			{
-				listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+            do
+            {
+                listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 
-				/* Check each character in the name looking for a match or
-				mismatch. */
-				xBreakLoop = pdFALSE;
-				for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
-				{
-					cNextChar = pxNextTCB->pcTaskName[ x ];
+                /* Check each character in the name looking for a match or
+                 * mismatch. */
+                xBreakLoop = pdFALSE;
 
-					if( cNextChar != pcNameToQuery[ x ] )
-					{
-						/* Characters didn't match. */
-						xBreakLoop = pdTRUE;
-					}
-					else if( cNextChar == ( char ) 0x00 )
-					{
-						/* Both strings terminated, a match must have been
-						found. */
-						pxReturn = pxNextTCB;
-						xBreakLoop = pdTRUE;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
+                for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
+                {
+                    cNextChar = pxNextTCB->pcTaskName[ x ];
 
-					if( xBreakLoop != pdFALSE )
-					{
-						break;
-					}
-				}
+                    if( cNextChar != pcNameToQuery[ x ] )
+                    {
+                        /* Characters didn't match. */
+                        xBreakLoop = pdTRUE;
+                    }
+                    else if( cNextChar == ( char ) 0x00 )
+                    {
+                        /* Both strings terminated, a match must have been
+                         * found. */
+                        pxReturn = pxNextTCB;
+                        xBreakLoop = pdTRUE;
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
 
-				if( pxReturn != NULL )
-				{
-					/* The handle has been found. */
-					break;
-				}
+                    if( xBreakLoop != pdFALSE )
+                    {
+                        break;
+                    }
+                }
 
-			} while( pxNextTCB != pxFirstTCB );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
+                if( pxReturn != NULL )
+                {
+                    /* The handle has been found. */
+                    break;
+                }
+            } while( pxNextTCB != pxFirstTCB );
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
 
-		return pxReturn;
-	}
+        return pxReturn;
+    }
 
 #endif /* INCLUDE_xTaskGetHandle */
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_xTaskGetHandle == 1 )
 
-	TaskHandle_t xTaskGetHandle( const char *pcNameToQuery ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-	{
-	UBaseType_t uxQueue = configMAX_PRIORITIES;
-	TCB_t* pxTCB;
+    TaskHandle_t xTaskGetHandle( const char * pcNameToQuery ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+    {
+        UBaseType_t uxQueue = configMAX_PRIORITIES;
+        TCB_t * pxTCB;
 
-		/* Task names will be truncated to configMAX_TASK_NAME_LEN - 1 bytes. */
-		configASSERT( strlen( pcNameToQuery ) < configMAX_TASK_NAME_LEN );
+        /* Task names will be truncated to configMAX_TASK_NAME_LEN - 1 bytes. */
+        configASSERT( strlen( pcNameToQuery ) < configMAX_TASK_NAME_LEN );
 
-		vTaskSuspendAll();
-		{
-			/* Search the ready lists. */
-			do
-			{
-				uxQueue--;
-				pxTCB = prvSearchForNameWithinSingleList( ( List_t * ) &( pxReadyTasksLists[ uxQueue ] ), pcNameToQuery );
+        vTaskSuspendAll();
+        {
+            /* Search the ready lists. */
+            do
+            {
+                uxQueue--;
+                pxTCB = prvSearchForNameWithinSingleList( ( List_t * ) &( pxReadyTasksLists[ uxQueue ] ), pcNameToQuery );
 
-				if( pxTCB != NULL )
-				{
-					/* Found the handle. */
-					break;
-				}
+                if( pxTCB != NULL )
+                {
+                    /* Found the handle. */
+                    break;
+                }
+            } while( uxQueue > ( UBaseType_t ) tskIDLE_PRIORITY ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 
-			} while( uxQueue > ( UBaseType_t ) tskIDLE_PRIORITY ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+            /* Search the delayed lists. */
+            if( pxTCB == NULL )
+            {
+                pxTCB = prvSearchForNameWithinSingleList( ( List_t * ) pxDelayedTaskList, pcNameToQuery );
+            }
 
-			/* Search the delayed lists. */
-			if( pxTCB == NULL )
-			{
-				pxTCB = prvSearchForNameWithinSingleList( ( List_t * ) pxDelayedTaskList, pcNameToQuery );
-			}
+            if( pxTCB == NULL )
+            {
+                pxTCB = prvSearchForNameWithinSingleList( ( List_t * ) pxOverflowDelayedTaskList, pcNameToQuery );
+            }
 
-			if( pxTCB == NULL )
-			{
-				pxTCB = prvSearchForNameWithinSingleList( ( List_t * ) pxOverflowDelayedTaskList, pcNameToQuery );
-			}
+            #if ( INCLUDE_vTaskSuspend == 1 )
+                {
+                    if( pxTCB == NULL )
+                    {
+                        /* Search the suspended list. */
+                        pxTCB = prvSearchForNameWithinSingleList( &xSuspendedTaskList, pcNameToQuery );
+                    }
+                }
+            #endif
 
-			#if ( INCLUDE_vTaskSuspend == 1 )
-			{
-				if( pxTCB == NULL )
-				{
-					/* Search the suspended list. */
-					pxTCB = prvSearchForNameWithinSingleList( &xSuspendedTaskList, pcNameToQuery );
-				}
-			}
-			#endif
+            #if ( INCLUDE_vTaskDelete == 1 )
+                {
+                    if( pxTCB == NULL )
+                    {
+                        /* Search the deleted list. */
+                        pxTCB = prvSearchForNameWithinSingleList( &xTasksWaitingTermination, pcNameToQuery );
+                    }
+                }
+            #endif
+        }
+        ( void ) xTaskResumeAll();
 
-			#if( INCLUDE_vTaskDelete == 1 )
-			{
-				if( pxTCB == NULL )
-				{
-					/* Search the deleted list. */
-					pxTCB = prvSearchForNameWithinSingleList( &xTasksWaitingTermination, pcNameToQuery );
-				}
-			}
-			#endif
-		}
-		( void ) xTaskResumeAll();
-
-		return pxTCB;
-	}
+        return pxTCB;
+    }
 
 #endif /* INCLUDE_xTaskGetHandle */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_TRACE_FACILITY == 1 )
 
-	UBaseType_t uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, const UBaseType_t uxArraySize, uint32_t * const pulTotalRunTime )
-	{
-	UBaseType_t uxTask = 0, uxQueue = configMAX_PRIORITIES;
+    UBaseType_t uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray,
+                                      const UBaseType_t uxArraySize,
+                                      uint32_t * const pulTotalRunTime )
+    {
+        UBaseType_t uxTask = 0, uxQueue = configMAX_PRIORITIES;
 
-		vTaskSuspendAll();
-		{
-			/* Is there a space in the array for each task in the system? */
-			if( uxArraySize >= uxCurrentNumberOfTasks )
-			{
-				/* Fill in an TaskStatus_t structure with information on each
-				task in the Ready state. */
-				do
-				{
-					uxQueue--;
-					uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), &( pxReadyTasksLists[ uxQueue ] ), eReady );
+        vTaskSuspendAll();
+        {
+            /* Is there a space in the array for each task in the system? */
+            if( uxArraySize >= uxCurrentNumberOfTasks )
+            {
+                /* Fill in an TaskStatus_t structure with information on each
+                 * task in the Ready state. */
+                do
+                {
+                    uxQueue--;
+                    uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), &( pxReadyTasksLists[ uxQueue ] ), eReady );
+                } while( uxQueue > ( UBaseType_t ) tskIDLE_PRIORITY ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 
-				} while( uxQueue > ( UBaseType_t ) tskIDLE_PRIORITY ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+                /* Fill in an TaskStatus_t structure with information on each
+                 * task in the Blocked state. */
+                uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), ( List_t * ) pxDelayedTaskList, eBlocked );
+                uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), ( List_t * ) pxOverflowDelayedTaskList, eBlocked );
 
-				/* Fill in an TaskStatus_t structure with information on each
-				task in the Blocked state. */
-				uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), ( List_t * ) pxDelayedTaskList, eBlocked );
-				uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), ( List_t * ) pxOverflowDelayedTaskList, eBlocked );
+                #if ( INCLUDE_vTaskDelete == 1 )
+                    {
+                        /* Fill in an TaskStatus_t structure with information on
+                         * each task that has been deleted but not yet cleaned up. */
+                        uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), &xTasksWaitingTermination, eDeleted );
+                    }
+                #endif
 
-				#if( INCLUDE_vTaskDelete == 1 )
-				{
-					/* Fill in an TaskStatus_t structure with information on
-					each task that has been deleted but not yet cleaned up. */
-					uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), &xTasksWaitingTermination, eDeleted );
-				}
-				#endif
+                #if ( INCLUDE_vTaskSuspend == 1 )
+                    {
+                        /* Fill in an TaskStatus_t structure with information on
+                         * each task in the Suspended state. */
+                        uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), &xSuspendedTaskList, eSuspended );
+                    }
+                #endif
 
-				#if ( INCLUDE_vTaskSuspend == 1 )
-				{
-					/* Fill in an TaskStatus_t structure with information on
-					each task in the Suspended state. */
-					uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), &xSuspendedTaskList, eSuspended );
-				}
-				#endif
+                #if ( configGENERATE_RUN_TIME_STATS == 1 )
+                    {
+                        if( pulTotalRunTime != NULL )
+                        {
+                            #ifdef portALT_GET_RUN_TIME_COUNTER_VALUE
+                                portALT_GET_RUN_TIME_COUNTER_VALUE( ( *pulTotalRunTime ) );
+                            #else
+                                *pulTotalRunTime = portGET_RUN_TIME_COUNTER_VALUE();
+                            #endif
+                        }
+                    }
+                #else /* if ( configGENERATE_RUN_TIME_STATS == 1 ) */
+                    {
+                        if( pulTotalRunTime != NULL )
+                        {
+                            *pulTotalRunTime = 0;
+                        }
+                    }
+                #endif /* if ( configGENERATE_RUN_TIME_STATS == 1 ) */
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        ( void ) xTaskResumeAll();
 
-				#if ( configGENERATE_RUN_TIME_STATS == 1)
-				{
-					if( pulTotalRunTime != NULL )
-					{
-						#ifdef portALT_GET_RUN_TIME_COUNTER_VALUE
-							portALT_GET_RUN_TIME_COUNTER_VALUE( ( *pulTotalRunTime ) );
-						#else
-							*pulTotalRunTime = portGET_RUN_TIME_COUNTER_VALUE();
-						#endif
-					}
-				}
-				#else
-				{
-					if( pulTotalRunTime != NULL )
-					{
-						*pulTotalRunTime = 0;
-					}
-				}
-				#endif
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		( void ) xTaskResumeAll();
-
-		return uxTask;
-	}
+        return uxTask;
+    }
 
 #endif /* configUSE_TRACE_FACILITY */
 /*----------------------------------------------------------*/
 
 #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 )
 
-	TaskHandle_t xTaskGetIdleTaskHandle( void )
-	{
-		/* If xTaskGetIdleTaskHandle() is called before the scheduler has been
-		started, then xIdleTaskHandle will be NULL. */
-		configASSERT( ( xIdleTaskHandle != NULL ) );
-		return xIdleTaskHandle;
-	}
+    TaskHandle_t xTaskGetIdleTaskHandle( void )
+    {
+        /* If xTaskGetIdleTaskHandle() is called before the scheduler has been
+         * started, then xIdleTaskHandle will be NULL. */
+        configASSERT( ( xIdleTaskHandle != NULL ) );
+        return xIdleTaskHandle;
+    }
 
 #endif /* INCLUDE_xTaskGetIdleTaskHandle */
 /*----------------------------------------------------------*/
 
 /* This conditional compilation should use inequality to 0, not equality to 1.
-This is to ensure vTaskStepTick() is available when user defined low power mode
-implementations require configUSE_TICKLESS_IDLE to be set to a value other than
-1. */
+ * This is to ensure vTaskStepTick() is available when user defined low power mode
+ * implementations require configUSE_TICKLESS_IDLE to be set to a value other than
+ * 1. */
 #if ( configUSE_TICKLESS_IDLE != 0 )
 
-	void vTaskStepTick( const TickType_t xTicksToJump )
-	{
-		/* Correct the tick count value after a period during which the tick
-		was suppressed.  Note this does *not* call the tick hook function for
-		each stepped tick. */
-		configASSERT( ( xTickCount + xTicksToJump ) <= xNextTaskUnblockTime );
-		xTickCount += xTicksToJump;
-		traceINCREASE_TICK_COUNT( xTicksToJump );
-	}
+    void vTaskStepTick( const TickType_t xTicksToJump )
+    {
+        /* Correct the tick count value after a period during which the tick
+         * was suppressed.  Note this does *not* call the tick hook function for
+         * each stepped tick. */
+        configASSERT( ( xTickCount + xTicksToJump ) <= xNextTaskUnblockTime );
+        xTickCount += xTicksToJump;
+        traceINCREASE_TICK_COUNT( xTicksToJump );
+    }
 
 #endif /* configUSE_TICKLESS_IDLE */
 /*----------------------------------------------------------*/
 
 BaseType_t xTaskCatchUpTicks( TickType_t xTicksToCatchUp )
 {
-BaseType_t xYieldOccurred;
+    BaseType_t xYieldOccurred;
 
-	/* Must not be called with the scheduler suspended as the implementation
-	relies on xPendedTicks being wound down to 0 in xTaskResumeAll(). */
-	configASSERT( uxSchedulerSuspended == 0 );
+    /* Must not be called with the scheduler suspended as the implementation
+     * relies on xPendedTicks being wound down to 0 in xTaskResumeAll(). */
+    configASSERT( uxSchedulerSuspended == 0 );
 
-	/* Use xPendedTicks to mimic xTicksToCatchUp number of ticks occurring when
-	the scheduler is suspended so the ticks are executed in xTaskResumeAll(). */
-	vTaskSuspendAll();
-	xPendedTicks += xTicksToCatchUp;
-	xYieldOccurred = xTaskResumeAll();
+    /* Use xPendedTicks to mimic xTicksToCatchUp number of ticks occurring when
+     * the scheduler is suspended so the ticks are executed in xTaskResumeAll(). */
+    vTaskSuspendAll();
+    xPendedTicks += xTicksToCatchUp;
+    xYieldOccurred = xTaskResumeAll();
 
-	return xYieldOccurred;
+    return xYieldOccurred;
 }
 /*----------------------------------------------------------*/
 
 #if ( INCLUDE_xTaskAbortDelay == 1 )
 
-	BaseType_t xTaskAbortDelay( TaskHandle_t xTask )
-	{
-	TCB_t *pxTCB = xTask;
-	BaseType_t xReturn;
+    BaseType_t xTaskAbortDelay( TaskHandle_t xTask )
+    {
+        TCB_t * pxTCB = xTask;
+        BaseType_t xReturn;
 
-		configASSERT( pxTCB );
+        configASSERT( pxTCB );
 
-		vTaskSuspendAll();
-		{
-			/* A task can only be prematurely removed from the Blocked state if
-			it is actually in the Blocked state. */
-			if( eTaskGetState( xTask ) == eBlocked )
-			{
-				xReturn = pdPASS;
+        vTaskSuspendAll();
+        {
+            /* A task can only be prematurely removed from the Blocked state if
+             * it is actually in the Blocked state. */
+            if( eTaskGetState( xTask ) == eBlocked )
+            {
+                xReturn = pdPASS;
 
-				/* Remove the reference to the task from the blocked list.  An
-				interrupt won't touch the xStateListItem because the
-				scheduler is suspended. */
-				( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+                /* Remove the reference to the task from the blocked list.  An
+                 * interrupt won't touch the xStateListItem because the
+                 * scheduler is suspended. */
+                ( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 
-				/* Is the task waiting on an event also?  If so remove it from
-				the event list too.  Interrupts can touch the event list item,
-				even though the scheduler is suspended, so a critical section
-				is used. */
-				taskENTER_CRITICAL();
-				{
-					if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
-					{
-						( void ) uxListRemove( &( pxTCB->xEventListItem ) );
+                /* Is the task waiting on an event also?  If so remove it from
+                 * the event list too.  Interrupts can touch the event list item,
+                 * even though the scheduler is suspended, so a critical section
+                 * is used. */
+                taskENTER_CRITICAL();
+                {
+                    if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
+                    {
+                        ( void ) uxListRemove( &( pxTCB->xEventListItem ) );
 
-						/* This lets the task know it was forcibly removed from the
-						blocked state so it should not re-evaluate its block time and
-						then block again. */
-						pxTCB->ucDelayAborted = pdTRUE;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				taskEXIT_CRITICAL();
+                        /* This lets the task know it was forcibly removed from the
+                         * blocked state so it should not re-evaluate its block time and
+                         * then block again. */
+                        pxTCB->ucDelayAborted = pdTRUE;
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
+                }
+                taskEXIT_CRITICAL();
 
-				/* Place the unblocked task into the appropriate ready list. */
-				prvAddTaskToReadyList( pxTCB );
+                /* Place the unblocked task into the appropriate ready list. */
+                prvAddTaskToReadyList( pxTCB );
 
-				/* A task being unblocked cannot cause an immediate context
-				switch if preemption is turned off. */
-				#if (  configUSE_PREEMPTION == 1 )
-				{
-					/* Preemption is on, but a context switch should only be
-					performed if the unblocked task has a priority that is
-					equal to or higher than the currently executing task. */
-					if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
-					{
-						/* Pend the yield to be performed when the scheduler
-						is unsuspended. */
-						xYieldPending = pdTRUE;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				#endif /* configUSE_PREEMPTION */
-			}
-			else
-			{
-				xReturn = pdFAIL;
-			}
-		}
-		( void ) xTaskResumeAll();
+                /* A task being unblocked cannot cause an immediate context
+                 * switch if preemption is turned off. */
+                #if ( configUSE_PREEMPTION == 1 )
+                    {
+                        /* Preemption is on, but a context switch should only be
+                         *  performed if the unblocked task has a priority that is
+                         *  equal to or higher than the currently executing task. */
+                        if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
+                        {
+                            /* Pend the yield to be performed when the scheduler
+                             * is unsuspended. */
+                            xYieldPending = pdTRUE;
+                        }
+                        else
+                        {
+                            mtCOVERAGE_TEST_MARKER();
+                        }
+                    }
+                #endif /* configUSE_PREEMPTION */
+            }
+            else
+            {
+                xReturn = pdFAIL;
+            }
+        }
+        ( void ) xTaskResumeAll();
 
-		return xReturn;
-	}
+        return xReturn;
+    }
 
 #endif /* INCLUDE_xTaskAbortDelay */
 /*----------------------------------------------------------*/
 
 BaseType_t xTaskIncrementTick( void )
 {
-TCB_t * pxTCB;
-TickType_t xItemValue;
-BaseType_t xSwitchRequired = pdFALSE;
+    TCB_t * pxTCB;
+    TickType_t xItemValue;
+    BaseType_t xSwitchRequired = pdFALSE;
 
-	/* Called by the portable layer each time a tick interrupt occurs.
-	Increments the tick then checks to see if the new tick value will cause any
-	tasks to be unblocked. */
-	traceTASK_INCREMENT_TICK( xTickCount );
-	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
-	{
-		/* Minor optimisation.  The tick count cannot change in this
-		block. */
-		const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
+    /* Called by the portable layer each time a tick interrupt occurs.
+     * Increments the tick then checks to see if the new tick value will cause any
+     * tasks to be unblocked. */
+    traceTASK_INCREMENT_TICK( xTickCount );
 
-		/* Increment the RTOS tick, switching the delayed and overflowed
-		delayed lists if it wraps to 0. */
-		xTickCount = xConstTickCount;
+    if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+    {
+        /* Minor optimisation.  The tick count cannot change in this
+         * block. */
+        const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
 
-		if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */
-		{
-			taskSWITCH_DELAYED_LISTS();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
+        /* Increment the RTOS tick, switching the delayed and overflowed
+         * delayed lists if it wraps to 0. */
+        xTickCount = xConstTickCount;
 
-		/* See if this tick has made a timeout expire.  Tasks are stored in
-		the	queue in the order of their wake time - meaning once one task
-		has been found whose block time has not expired there is no need to
-		look any further down the list. */
-		if( xConstTickCount >= xNextTaskUnblockTime )
-		{
-			for( ;; )
-			{
-				if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
-				{
-					/* The delayed list is empty.  Set xNextTaskUnblockTime
-					to the maximum possible value so it is extremely
-					unlikely that the
-					if( xTickCount >= xNextTaskUnblockTime ) test will pass
-					next time through. */
-					xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-					break;
-				}
-				else
-				{
-					/* The delayed list is not empty, get the value of the
-					item at the head of the delayed list.  This is the time
-					at which the task at the head of the delayed list must
-					be removed from the Blocked state. */
-					pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
-					xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) );
+        if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */
+        {
+            taskSWITCH_DELAYED_LISTS();
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
 
-					if( xConstTickCount < xItemValue )
-					{
-						/* It is not time to unblock this item yet, but the
-						item value is the time at which the task at the head
-						of the blocked list must be removed from the Blocked
-						state -	so record the item value in
-						xNextTaskUnblockTime. */
-						xNextTaskUnblockTime = xItemValue;
-						break; /*lint !e9011 Code structure here is deedmed easier to understand with multiple breaks. */
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
+        /* See if this tick has made a timeout expire.  Tasks are stored in
+         * the  queue in the order of their wake time - meaning once one task
+         * has been found whose block time has not expired there is no need to
+         * look any further down the list. */
+        if( xConstTickCount >= xNextTaskUnblockTime )
+        {
+            for( ; ; )
+            {
+                if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
+                {
+                    /* The delayed list is empty.  Set xNextTaskUnblockTime
+                     * to the maximum possible value so it is extremely
+                     * unlikely that the
+                     * if( xTickCount >= xNextTaskUnblockTime ) test will pass
+                     * next time through. */
+                    xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+                    break;
+                }
+                else
+                {
+                    /* The delayed list is not empty, get the value of the
+                     * item at the head of the delayed list.  This is the time
+                     * at which the task at the head of the delayed list must
+                     * be removed from the Blocked state. */
+                    pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+                    xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) );
 
-					/* It is time to remove the item from the Blocked state. */
-					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+                    if( xConstTickCount < xItemValue )
+                    {
+                        /* It is not time to unblock this item yet, but the
+                         * item value is the time at which the task at the head
+                         * of the blocked list must be removed from the Blocked
+                         * state -  so record the item value in
+                         * xNextTaskUnblockTime. */
+                        xNextTaskUnblockTime = xItemValue;
+                        break; /*lint !e9011 Code structure here is deedmed easier to understand with multiple breaks. */
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
 
-					/* Is the task waiting on an event also?  If so remove
-					it from the event list. */
-					if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
-					{
-						( void ) uxListRemove( &( pxTCB->xEventListItem ) );
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
+                    /* It is time to remove the item from the Blocked state. */
+                    ( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 
-					/* Place the unblocked task into the appropriate ready
-					list. */
-					prvAddTaskToReadyList( pxTCB );
+                    /* Is the task waiting on an event also?  If so remove
+                     * it from the event list. */
+                    if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
+                    {
+                        ( void ) uxListRemove( &( pxTCB->xEventListItem ) );
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
 
-					/* A task being unblocked cannot cause an immediate
-					context switch if preemption is turned off. */
-					#if (  configUSE_PREEMPTION == 1 )
-					{
-						/* Preemption is on, but a context switch should
-						only be performed if the unblocked task has a
-						priority that is equal to or higher than the
-						currently executing task. */
-						if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
-						{
-							xSwitchRequired = pdTRUE;
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					#endif /* configUSE_PREEMPTION */
-				}
-			}
-		}
+                    /* Place the unblocked task into the appropriate ready
+                     * list. */
+                    prvAddTaskToReadyList( pxTCB );
 
-		/* Tasks of equal priority to the currently running task will share
-		processing time (time slice) if preemption is on, and the application
-		writer has not explicitly turned time slicing off. */
-		#if ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) )
-		{
-			if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 )
-			{
-				xSwitchRequired = pdTRUE;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		#endif /* ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) ) */
+                    /* A task being unblocked cannot cause an immediate
+                     * context switch if preemption is turned off. */
+                    #if ( configUSE_PREEMPTION == 1 )
+                        {
+                            /* Preemption is on, but a context switch should
+                             * only be performed if the unblocked task has a
+                             * priority that is equal to or higher than the
+                             * currently executing task. */
+                            if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
+                            {
+                                xSwitchRequired = pdTRUE;
+                            }
+                            else
+                            {
+                                mtCOVERAGE_TEST_MARKER();
+                            }
+                        }
+                    #endif /* configUSE_PREEMPTION */
+                }
+            }
+        }
 
-		#if ( configUSE_TICK_HOOK == 1 )
-		{
-			/* Guard against the tick hook being called when the pended tick
-			count is being unwound (when the scheduler is being unlocked). */
-			if( xPendedTicks == ( TickType_t ) 0 )
-			{
-				vApplicationTickHook();
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		#endif /* configUSE_TICK_HOOK */
+        /* Tasks of equal priority to the currently running task will share
+         * processing time (time slice) if preemption is on, and the application
+         * writer has not explicitly turned time slicing off. */
+        #if ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) )
+            {
+                if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 )
+                {
+                    xSwitchRequired = pdTRUE;
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+        #endif /* ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) ) */
 
-		#if ( configUSE_PREEMPTION == 1 )
-		{
-			if( xYieldPending != pdFALSE )
-			{
-				xSwitchRequired = pdTRUE;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		#endif /* configUSE_PREEMPTION */
-	}
-	else
-	{
-		++xPendedTicks;
+        #if ( configUSE_TICK_HOOK == 1 )
+            {
+                /* Guard against the tick hook being called when the pended tick
+                 * count is being unwound (when the scheduler is being unlocked). */
+                if( xPendedTicks == ( TickType_t ) 0 )
+                {
+                    vApplicationTickHook();
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+        #endif /* configUSE_TICK_HOOK */
 
-		/* The tick hook gets called at regular intervals, even if the
-		scheduler is locked. */
-		#if ( configUSE_TICK_HOOK == 1 )
-		{
-			vApplicationTickHook();
-		}
-		#endif
-	}
+        #if ( configUSE_PREEMPTION == 1 )
+            {
+                if( xYieldPending != pdFALSE )
+                {
+                    xSwitchRequired = pdTRUE;
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+        #endif /* configUSE_PREEMPTION */
+    }
+    else
+    {
+        ++xPendedTicks;
 
-	return xSwitchRequired;
+        /* The tick hook gets called at regular intervals, even if the
+         * scheduler is locked. */
+        #if ( configUSE_TICK_HOOK == 1 )
+            {
+                vApplicationTickHook();
+            }
+        #endif
+    }
+
+    return xSwitchRequired;
 }
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
 
-	void vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction )
-	{
-	TCB_t *xTCB;
+    void vTaskSetApplicationTaskTag( TaskHandle_t xTask,
+                                     TaskHookFunction_t pxHookFunction )
+    {
+        TCB_t * xTCB;
 
-		/* If xTask is NULL then it is the task hook of the calling task that is
-		getting set. */
-		if( xTask == NULL )
-		{
-			xTCB = ( TCB_t * ) pxCurrentTCB;
-		}
-		else
-		{
-			xTCB = xTask;
-		}
+        /* If xTask is NULL then it is the task hook of the calling task that is
+         * getting set. */
+        if( xTask == NULL )
+        {
+            xTCB = ( TCB_t * ) pxCurrentTCB;
+        }
+        else
+        {
+            xTCB = xTask;
+        }
 
-		/* Save the hook function in the TCB.  A critical section is required as
-		the value can be accessed from an interrupt. */
-		taskENTER_CRITICAL();
-		{
-			xTCB->pxTaskTag = pxHookFunction;
-		}
-		taskEXIT_CRITICAL();
-	}
+        /* Save the hook function in the TCB.  A critical section is required as
+         * the value can be accessed from an interrupt. */
+        taskENTER_CRITICAL();
+        {
+            xTCB->pxTaskTag = pxHookFunction;
+        }
+        taskEXIT_CRITICAL();
+    }
 
 #endif /* configUSE_APPLICATION_TASK_TAG */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
 
-	TaskHookFunction_t xTaskGetApplicationTaskTag( TaskHandle_t xTask )
-	{
-	TCB_t *pxTCB;
-	TaskHookFunction_t xReturn;
+    TaskHookFunction_t xTaskGetApplicationTaskTag( TaskHandle_t xTask )
+    {
+        TCB_t * pxTCB;
+        TaskHookFunction_t xReturn;
 
-		/* If xTask is NULL then set the calling task's hook. */
-		pxTCB = prvGetTCBFromHandle( xTask );
+        /* If xTask is NULL then set the calling task's hook. */
+        pxTCB = prvGetTCBFromHandle( xTask );
 
-		/* Save the hook function in the TCB.  A critical section is required as
-		the value can be accessed from an interrupt. */
-		taskENTER_CRITICAL();
-		{
-			xReturn = pxTCB->pxTaskTag;
-		}
-		taskEXIT_CRITICAL();
+        /* Save the hook function in the TCB.  A critical section is required as
+         * the value can be accessed from an interrupt. */
+        taskENTER_CRITICAL();
+        {
+            xReturn = pxTCB->pxTaskTag;
+        }
+        taskEXIT_CRITICAL();
 
-		return xReturn;
-	}
+        return xReturn;
+    }
 
 #endif /* configUSE_APPLICATION_TASK_TAG */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
 
-	TaskHookFunction_t xTaskGetApplicationTaskTagFromISR( TaskHandle_t xTask )
-	{
-	TCB_t *pxTCB;
-	TaskHookFunction_t xReturn;
-	UBaseType_t uxSavedInterruptStatus;
+    TaskHookFunction_t xTaskGetApplicationTaskTagFromISR( TaskHandle_t xTask )
+    {
+        TCB_t * pxTCB;
+        TaskHookFunction_t xReturn;
+        UBaseType_t uxSavedInterruptStatus;
 
-		/* If xTask is NULL then set the calling task's hook. */
-		pxTCB = prvGetTCBFromHandle( xTask );
+        /* If xTask is NULL then set the calling task's hook. */
+        pxTCB = prvGetTCBFromHandle( xTask );
 
-		/* Save the hook function in the TCB.  A critical section is required as
-		the value can be accessed from an interrupt. */
-		uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
-		{
-			xReturn = pxTCB->pxTaskTag;
-		}
-		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+        /* Save the hook function in the TCB.  A critical section is required as
+         * the value can be accessed from an interrupt. */
+        uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
+        {
+            xReturn = pxTCB->pxTaskTag;
+        }
+        portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
 
-		return xReturn;
-	}
+        return xReturn;
+    }
 
 #endif /* configUSE_APPLICATION_TASK_TAG */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
 
-	BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter )
-	{
-	TCB_t *xTCB;
-	BaseType_t xReturn;
+    BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask,
+                                             void * pvParameter )
+    {
+        TCB_t * xTCB;
+        BaseType_t xReturn;
 
-		/* If xTask is NULL then we are calling our own task hook. */
-		if( xTask == NULL )
-		{
-			xTCB = pxCurrentTCB;
-		}
-		else
-		{
-			xTCB = xTask;
-		}
+        /* If xTask is NULL then we are calling our own task hook. */
+        if( xTask == NULL )
+        {
+            xTCB = pxCurrentTCB;
+        }
+        else
+        {
+            xTCB = xTask;
+        }
 
-		if( xTCB->pxTaskTag != NULL )
-		{
-			xReturn = xTCB->pxTaskTag( pvParameter );
-		}
-		else
-		{
-			xReturn = pdFAIL;
-		}
+        if( xTCB->pxTaskTag != NULL )
+        {
+            xReturn = xTCB->pxTaskTag( pvParameter );
+        }
+        else
+        {
+            xReturn = pdFAIL;
+        }
 
-		return xReturn;
-	}
+        return xReturn;
+    }
 
 #endif /* configUSE_APPLICATION_TASK_TAG */
 /*-----------------------------------------------------------*/
 
 void vTaskSwitchContext( void )
 {
-	if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE )
-	{
-		/* The scheduler is currently suspended - do not allow a context
-		switch. */
-		xYieldPending = pdTRUE;
-	}
-	else
-	{
-		xYieldPending = pdFALSE;
-		traceTASK_SWITCHED_OUT();
+    if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE )
+    {
+        /* The scheduler is currently suspended - do not allow a context
+         * switch. */
+        xYieldPending = pdTRUE;
+    }
+    else
+    {
+        xYieldPending = pdFALSE;
+        traceTASK_SWITCHED_OUT();
 
-		#if ( configGENERATE_RUN_TIME_STATS == 1 )
-		{
-			#ifdef portALT_GET_RUN_TIME_COUNTER_VALUE
-				portALT_GET_RUN_TIME_COUNTER_VALUE( ulTotalRunTime );
-			#else
-				ulTotalRunTime = portGET_RUN_TIME_COUNTER_VALUE();
-			#endif
+        #if ( configGENERATE_RUN_TIME_STATS == 1 )
+            {
+                #ifdef portALT_GET_RUN_TIME_COUNTER_VALUE
+                    portALT_GET_RUN_TIME_COUNTER_VALUE( ulTotalRunTime );
+                #else
+                    ulTotalRunTime = portGET_RUN_TIME_COUNTER_VALUE();
+                #endif
 
-			/* Add the amount of time the task has been running to the
-			accumulated time so far.  The time the task started running was
-			stored in ulTaskSwitchedInTime.  Note that there is no overflow
-			protection here so count values are only valid until the timer
-			overflows.  The guard against negative values is to protect
-			against suspect run time stat counter implementations - which
-			are provided by the application, not the kernel. */
-			if( ulTotalRunTime > ulTaskSwitchedInTime )
-			{
-				pxCurrentTCB->ulRunTimeCounter += ( ulTotalRunTime - ulTaskSwitchedInTime );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-			ulTaskSwitchedInTime = ulTotalRunTime;
-		}
-		#endif /* configGENERATE_RUN_TIME_STATS */
+                /* Add the amount of time the task has been running to the
+                 * accumulated time so far.  The time the task started running was
+                 * stored in ulTaskSwitchedInTime.  Note that there is no overflow
+                 * protection here so count values are only valid until the timer
+                 * overflows.  The guard against negative values is to protect
+                 * against suspect run time stat counter implementations - which
+                 * are provided by the application, not the kernel. */
+                if( ulTotalRunTime > ulTaskSwitchedInTime )
+                {
+                    pxCurrentTCB->ulRunTimeCounter += ( ulTotalRunTime - ulTaskSwitchedInTime );
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
 
-		/* Check for stack overflow, if configured. */
-		taskCHECK_FOR_STACK_OVERFLOW();
+                ulTaskSwitchedInTime = ulTotalRunTime;
+            }
+        #endif /* configGENERATE_RUN_TIME_STATS */
 
-		/* Before the currently running task is switched out, save its errno. */
-		#if( configUSE_POSIX_ERRNO == 1 )
-		{
-			pxCurrentTCB->iTaskErrno = FreeRTOS_errno;
-		}
-		#endif
+        /* Check for stack overflow, if configured. */
+        taskCHECK_FOR_STACK_OVERFLOW();
 
-		/* Select a new task to run using either the generic C or port
-		optimised asm code. */
-		taskSELECT_HIGHEST_PRIORITY_TASK(); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
-		traceTASK_SWITCHED_IN();
+        /* Before the currently running task is switched out, save its errno. */
+        #if ( configUSE_POSIX_ERRNO == 1 )
+            {
+                pxCurrentTCB->iTaskErrno = FreeRTOS_errno;
+            }
+        #endif
 
-		/* After the new task is switched in, update the global errno. */
-		#if( configUSE_POSIX_ERRNO == 1 )
-		{
-			FreeRTOS_errno = pxCurrentTCB->iTaskErrno;
-		}
-		#endif
+        /* Select a new task to run using either the generic C or port
+         * optimised asm code. */
+        taskSELECT_HIGHEST_PRIORITY_TASK(); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+        traceTASK_SWITCHED_IN();
 
-		#if ( configUSE_NEWLIB_REENTRANT == 1 )
-		{
-			/* Switch Newlib's _impure_ptr variable to point to the _reent
-			structure specific to this task.
-			See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
-			for additional information. */
-			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
-		}
-		#endif /* configUSE_NEWLIB_REENTRANT */
-	}
+        /* After the new task is switched in, update the global errno. */
+        #if ( configUSE_POSIX_ERRNO == 1 )
+            {
+                FreeRTOS_errno = pxCurrentTCB->iTaskErrno;
+            }
+        #endif
+
+        #if ( configUSE_NEWLIB_REENTRANT == 1 )
+            {
+                /* Switch Newlib's _impure_ptr variable to point to the _reent
+                 * structure specific to this task.
+                 * See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
+                 * for additional information. */
+                _impure_ptr = &( pxCurrentTCB->xNewLib_reent );
+            }
+        #endif /* configUSE_NEWLIB_REENTRANT */
+    }
 }
 /*-----------------------------------------------------------*/
 
-void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait )
+void vTaskPlaceOnEventList( List_t * const pxEventList,
+                            const TickType_t xTicksToWait )
 {
-	configASSERT( pxEventList );
+    configASSERT( pxEventList );
 
-	/* THIS FUNCTION MUST BE CALLED WITH EITHER INTERRUPTS DISABLED OR THE
-	SCHEDULER SUSPENDED AND THE QUEUE BEING ACCESSED LOCKED. */
+    /* THIS FUNCTION MUST BE CALLED WITH EITHER INTERRUPTS DISABLED OR THE
+     * SCHEDULER SUSPENDED AND THE QUEUE BEING ACCESSED LOCKED. */
 
-	/* Place the event list item of the TCB in the appropriate event list.
-	This is placed in the list in priority order so the highest priority task
-	is the first to be woken by the event.  The queue that contains the event
-	list is locked, preventing simultaneous access from interrupts. */
-	vListInsert( pxEventList, &( pxCurrentTCB->xEventListItem ) );
+    /* Place the event list item of the TCB in the appropriate event list.
+     * This is placed in the list in priority order so the highest priority task
+     * is the first to be woken by the event.  The queue that contains the event
+     * list is locked, preventing simultaneous access from interrupts. */
+    vListInsert( pxEventList, &( pxCurrentTCB->xEventListItem ) );
 
-	prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
+    prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
 }
 /*-----------------------------------------------------------*/
 
-void vTaskPlaceOnUnorderedEventList( List_t * pxEventList, const TickType_t xItemValue, const TickType_t xTicksToWait )
+void vTaskPlaceOnUnorderedEventList( List_t * pxEventList,
+                                     const TickType_t xItemValue,
+                                     const TickType_t xTicksToWait )
 {
-	configASSERT( pxEventList );
+    configASSERT( pxEventList );
 
-	/* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED.  It is used by
-	the event groups implementation. */
-	configASSERT( uxSchedulerSuspended != 0 );
+    /* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED.  It is used by
+     * the event groups implementation. */
+    configASSERT( uxSchedulerSuspended != 0 );
 
-	/* Store the item value in the event list item.  It is safe to access the
-	event list item here as interrupts won't access the event list item of a
-	task that is not in the Blocked state. */
-	listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xEventListItem ), xItemValue | taskEVENT_LIST_ITEM_VALUE_IN_USE );
+    /* Store the item value in the event list item.  It is safe to access the
+     * event list item here as interrupts won't access the event list item of a
+     * task that is not in the Blocked state. */
+    listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xEventListItem ), xItemValue | taskEVENT_LIST_ITEM_VALUE_IN_USE );
 
-	/* Place the event list item of the TCB at the end of the appropriate event
-	list.  It is safe to access the event list here because it is part of an
-	event group implementation - and interrupts don't access event groups
-	directly (instead they access them indirectly by pending function calls to
-	the task level). */
-	vListInsertEnd( pxEventList, &( pxCurrentTCB->xEventListItem ) );
+    /* Place the event list item of the TCB at the end of the appropriate event
+     * list.  It is safe to access the event list here because it is part of an
+     * event group implementation - and interrupts don't access event groups
+     * directly (instead they access them indirectly by pending function calls to
+     * the task level). */
+    vListInsertEnd( pxEventList, &( pxCurrentTCB->xEventListItem ) );
 
-	prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
+    prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
 }
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TIMERS == 1 )
+#if ( configUSE_TIMERS == 1 )
 
-	void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
-	{
-		configASSERT( pxEventList );
+    void vTaskPlaceOnEventListRestricted( List_t * const pxEventList,
+                                          TickType_t xTicksToWait,
+                                          const BaseType_t xWaitIndefinitely )
+    {
+        configASSERT( pxEventList );
 
-		/* This function should not be called by application code hence the
-		'Restricted' in its name.  It is not part of the public API.  It is
-		designed for use by kernel code, and has special calling requirements -
-		it should be called with the scheduler suspended. */
+        /* This function should not be called by application code hence the
+         * 'Restricted' in its name.  It is not part of the public API.  It is
+         * designed for use by kernel code, and has special calling requirements -
+         * it should be called with the scheduler suspended. */
 
 
-		/* Place the event list item of the TCB in the appropriate event list.
-		In this case it is assume that this is the only task that is going to
-		be waiting on this event list, so the faster vListInsertEnd() function
-		can be used in place of vListInsert. */
-		vListInsertEnd( pxEventList, &( pxCurrentTCB->xEventListItem ) );
+        /* Place the event list item of the TCB in the appropriate event list.
+         * In this case it is assume that this is the only task that is going to
+         * be waiting on this event list, so the faster vListInsertEnd() function
+         * can be used in place of vListInsert. */
+        vListInsertEnd( pxEventList, &( pxCurrentTCB->xEventListItem ) );
 
-		/* If the task should block indefinitely then set the block time to a
-		value that will be recognised as an indefinite delay inside the
-		prvAddCurrentTaskToDelayedList() function. */
-		if( xWaitIndefinitely != pdFALSE )
-		{
-			xTicksToWait = portMAX_DELAY;
-		}
+        /* If the task should block indefinitely then set the block time to a
+         * value that will be recognised as an indefinite delay inside the
+         * prvAddCurrentTaskToDelayedList() function. */
+        if( xWaitIndefinitely != pdFALSE )
+        {
+            xTicksToWait = portMAX_DELAY;
+        }
 
-		traceTASK_DELAY_UNTIL( ( xTickCount + xTicksToWait ) );
-		prvAddCurrentTaskToDelayedList( xTicksToWait, xWaitIndefinitely );
-	}
+        traceTASK_DELAY_UNTIL( ( xTickCount + xTicksToWait ) );
+        prvAddCurrentTaskToDelayedList( xTicksToWait, xWaitIndefinitely );
+    }
 
 #endif /* configUSE_TIMERS */
 /*-----------------------------------------------------------*/
 
 BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList )
 {
-TCB_t *pxUnblockedTCB;
-BaseType_t xReturn;
+    TCB_t * pxUnblockedTCB;
+    BaseType_t xReturn;
 
-	/* THIS FUNCTION MUST BE CALLED FROM A CRITICAL SECTION.  It can also be
-	called from a critical section within an ISR. */
+    /* THIS FUNCTION MUST BE CALLED FROM A CRITICAL SECTION.  It can also be
+     * called from a critical section within an ISR. */
 
-	/* The event list is sorted in priority order, so the first in the list can
-	be removed as it is known to be the highest priority.  Remove the TCB from
-	the delayed list, and add it to the ready list.
+    /* The event list is sorted in priority order, so the first in the list can
+     * be removed as it is known to be the highest priority.  Remove the TCB from
+     * the delayed list, and add it to the ready list.
+     *
+     * If an event is for a queue that is locked then this function will never
+     * get called - the lock count on the queue will get modified instead.  This
+     * means exclusive access to the event list is guaranteed here.
+     *
+     * This function assumes that a check has already been made to ensure that
+     * pxEventList is not empty. */
+    pxUnblockedTCB = listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+    configASSERT( pxUnblockedTCB );
+    ( void ) uxListRemove( &( pxUnblockedTCB->xEventListItem ) );
 
-	If an event is for a queue that is locked then this function will never
-	get called - the lock count on the queue will get modified instead.  This
-	means exclusive access to the event list is guaranteed here.
+    if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+    {
+        ( void ) uxListRemove( &( pxUnblockedTCB->xStateListItem ) );
+        prvAddTaskToReadyList( pxUnblockedTCB );
 
-	This function assumes that a check has already been made to ensure that
-	pxEventList is not empty. */
-	pxUnblockedTCB = listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
-	configASSERT( pxUnblockedTCB );
-	( void ) uxListRemove( &( pxUnblockedTCB->xEventListItem ) );
+        #if ( configUSE_TICKLESS_IDLE != 0 )
+            {
+                /* If a task is blocked on a kernel object then xNextTaskUnblockTime
+                 * might be set to the blocked task's time out time.  If the task is
+                 * unblocked for a reason other than a timeout xNextTaskUnblockTime is
+                 * normally left unchanged, because it is automatically reset to a new
+                 * value when the tick count equals xNextTaskUnblockTime.  However if
+                 * tickless idling is used it might be more important to enter sleep mode
+                 * at the earliest possible time - so reset xNextTaskUnblockTime here to
+                 * ensure it is updated at the earliest possible time. */
+                prvResetNextTaskUnblockTime();
+            }
+        #endif
+    }
+    else
+    {
+        /* The delayed and ready lists cannot be accessed, so hold this task
+         * pending until the scheduler is resumed. */
+        vListInsertEnd( &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) );
+    }
 
-	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
-	{
-		( void ) uxListRemove( &( pxUnblockedTCB->xStateListItem ) );
-		prvAddTaskToReadyList( pxUnblockedTCB );
+    if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority )
+    {
+        /* Return true if the task removed from the event list has a higher
+         * priority than the calling task.  This allows the calling task to know if
+         * it should force a context switch now. */
+        xReturn = pdTRUE;
 
-		#if( configUSE_TICKLESS_IDLE != 0 )
-		{
-			/* If a task is blocked on a kernel object then xNextTaskUnblockTime
-			might be set to the blocked task's time out time.  If the task is
-			unblocked for a reason other than a timeout xNextTaskUnblockTime is
-			normally left unchanged, because it is automatically reset to a new
-			value when the tick count equals xNextTaskUnblockTime.  However if
-			tickless idling is used it might be more important to enter sleep mode
-			at the earliest possible time - so reset xNextTaskUnblockTime here to
-			ensure it is updated at the earliest possible time. */
-			prvResetNextTaskUnblockTime();
-		}
-		#endif
-	}
-	else
-	{
-		/* The delayed and ready lists cannot be accessed, so hold this task
-		pending until the scheduler is resumed. */
-		vListInsertEnd( &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) );
-	}
+        /* Mark that a yield is pending in case the user is not using the
+         * "xHigherPriorityTaskWoken" parameter to an ISR safe FreeRTOS function. */
+        xYieldPending = pdTRUE;
+    }
+    else
+    {
+        xReturn = pdFALSE;
+    }
 
-	if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority )
-	{
-		/* Return true if the task removed from the event list has a higher
-		priority than the calling task.  This allows the calling task to know if
-		it should force a context switch now. */
-		xReturn = pdTRUE;
-
-		/* Mark that a yield is pending in case the user is not using the
-		"xHigherPriorityTaskWoken" parameter to an ISR safe FreeRTOS function. */
-		xYieldPending = pdTRUE;
-	}
-	else
-	{
-		xReturn = pdFALSE;
-	}
-
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
-void vTaskRemoveFromUnorderedEventList( ListItem_t * pxEventListItem, const TickType_t xItemValue )
+void vTaskRemoveFromUnorderedEventList( ListItem_t * pxEventListItem,
+                                        const TickType_t xItemValue )
 {
-TCB_t *pxUnblockedTCB;
+    TCB_t * pxUnblockedTCB;
 
-	/* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED.  It is used by
-	the event flags implementation. */
-	configASSERT( uxSchedulerSuspended != pdFALSE );
+    /* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED.  It is used by
+     * the event flags implementation. */
+    configASSERT( uxSchedulerSuspended != pdFALSE );
 
-	/* Store the new item value in the event list. */
-	listSET_LIST_ITEM_VALUE( pxEventListItem, xItemValue | taskEVENT_LIST_ITEM_VALUE_IN_USE );
+    /* Store the new item value in the event list. */
+    listSET_LIST_ITEM_VALUE( pxEventListItem, xItemValue | taskEVENT_LIST_ITEM_VALUE_IN_USE );
 
-	/* Remove the event list form the event flag.  Interrupts do not access
-	event flags. */
-	pxUnblockedTCB = listGET_LIST_ITEM_OWNER( pxEventListItem ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
-	configASSERT( pxUnblockedTCB );
-	( void ) uxListRemove( pxEventListItem );
+    /* Remove the event list form the event flag.  Interrupts do not access
+     * event flags. */
+    pxUnblockedTCB = listGET_LIST_ITEM_OWNER( pxEventListItem ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+    configASSERT( pxUnblockedTCB );
+    ( void ) uxListRemove( pxEventListItem );
 
-	#if( configUSE_TICKLESS_IDLE != 0 )
-	{
-		/* If a task is blocked on a kernel object then xNextTaskUnblockTime
-		might be set to the blocked task's time out time.  If the task is
-		unblocked for a reason other than a timeout xNextTaskUnblockTime is
-		normally left unchanged, because it is automatically reset to a new
-		value when the tick count equals xNextTaskUnblockTime.  However if
-		tickless idling is used it might be more important to enter sleep mode
-		at the earliest possible time - so reset xNextTaskUnblockTime here to
-		ensure it is updated at the earliest possible time. */
-		prvResetNextTaskUnblockTime();
-	}
-	#endif
+    #if ( configUSE_TICKLESS_IDLE != 0 )
+        {
+            /* If a task is blocked on a kernel object then xNextTaskUnblockTime
+             * might be set to the blocked task's time out time.  If the task is
+             * unblocked for a reason other than a timeout xNextTaskUnblockTime is
+             * normally left unchanged, because it is automatically reset to a new
+             * value when the tick count equals xNextTaskUnblockTime.  However if
+             * tickless idling is used it might be more important to enter sleep mode
+             * at the earliest possible time - so reset xNextTaskUnblockTime here to
+             * ensure it is updated at the earliest possible time. */
+            prvResetNextTaskUnblockTime();
+        }
+    #endif
 
-	/* Remove the task from the delayed list and add it to the ready list.  The
-	scheduler is suspended so interrupts will not be accessing the ready
-	lists. */
-	( void ) uxListRemove( &( pxUnblockedTCB->xStateListItem ) );
-	prvAddTaskToReadyList( pxUnblockedTCB );
+    /* Remove the task from the delayed list and add it to the ready list.  The
+     * scheduler is suspended so interrupts will not be accessing the ready
+     * lists. */
+    ( void ) uxListRemove( &( pxUnblockedTCB->xStateListItem ) );
+    prvAddTaskToReadyList( pxUnblockedTCB );
 
-	if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority )
-	{
-		/* The unblocked task has a priority above that of the calling task, so
-		a context switch is required.  This function is called with the
-		scheduler suspended so xYieldPending is set so the context switch
-		occurs immediately that the scheduler is resumed (unsuspended). */
-		xYieldPending = pdTRUE;
-	}
+    if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority )
+    {
+        /* The unblocked task has a priority above that of the calling task, so
+         * a context switch is required.  This function is called with the
+         * scheduler suspended so xYieldPending is set so the context switch
+         * occurs immediately that the scheduler is resumed (unsuspended). */
+        xYieldPending = pdTRUE;
+    }
 }
 /*-----------------------------------------------------------*/
 
 void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut )
 {
-	configASSERT( pxTimeOut );
-	taskENTER_CRITICAL();
-	{
-		pxTimeOut->xOverflowCount = xNumOfOverflows;
-		pxTimeOut->xTimeOnEntering = xTickCount;
-	}
-	taskEXIT_CRITICAL();
+    configASSERT( pxTimeOut );
+    taskENTER_CRITICAL();
+    {
+        pxTimeOut->xOverflowCount = xNumOfOverflows;
+        pxTimeOut->xTimeOnEntering = xTickCount;
+    }
+    taskEXIT_CRITICAL();
 }
 /*-----------------------------------------------------------*/
 
 void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut )
 {
-	/* For internal use only as it does not use a critical section. */
-	pxTimeOut->xOverflowCount = xNumOfOverflows;
-	pxTimeOut->xTimeOnEntering = xTickCount;
+    /* For internal use only as it does not use a critical section. */
+    pxTimeOut->xOverflowCount = xNumOfOverflows;
+    pxTimeOut->xTimeOnEntering = xTickCount;
 }
 /*-----------------------------------------------------------*/
 
-BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait )
+BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut,
+                                 TickType_t * const pxTicksToWait )
 {
-BaseType_t xReturn;
+    BaseType_t xReturn;
 
-	configASSERT( pxTimeOut );
-	configASSERT( pxTicksToWait );
+    configASSERT( pxTimeOut );
+    configASSERT( pxTicksToWait );
 
-	taskENTER_CRITICAL();
-	{
-		/* Minor optimisation.  The tick count cannot change in this block. */
-		const TickType_t xConstTickCount = xTickCount;
-		const TickType_t xElapsedTime = xConstTickCount - pxTimeOut->xTimeOnEntering;
+    taskENTER_CRITICAL();
+    {
+        /* Minor optimisation.  The tick count cannot change in this block. */
+        const TickType_t xConstTickCount = xTickCount;
+        const TickType_t xElapsedTime = xConstTickCount - pxTimeOut->xTimeOnEntering;
 
-		#if( INCLUDE_xTaskAbortDelay == 1 )
-			if( pxCurrentTCB->ucDelayAborted != ( uint8_t ) pdFALSE )
-			{
-				/* The delay was aborted, which is not the same as a time out,
-				but has the same result. */
-				pxCurrentTCB->ucDelayAborted = pdFALSE;
-				xReturn = pdTRUE;
-			}
-			else
-		#endif
+        #if ( INCLUDE_xTaskAbortDelay == 1 )
+            if( pxCurrentTCB->ucDelayAborted != ( uint8_t ) pdFALSE )
+            {
+                /* The delay was aborted, which is not the same as a time out,
+                 * but has the same result. */
+                pxCurrentTCB->ucDelayAborted = pdFALSE;
+                xReturn = pdTRUE;
+            }
+            else
+        #endif
 
-		#if ( INCLUDE_vTaskSuspend == 1 )
-			if( *pxTicksToWait == portMAX_DELAY )
-			{
-				/* If INCLUDE_vTaskSuspend is set to 1 and the block time
-				specified is the maximum block time then the task should block
-				indefinitely, and therefore never time out. */
-				xReturn = pdFALSE;
-			}
-			else
-		#endif
+        #if ( INCLUDE_vTaskSuspend == 1 )
+            if( *pxTicksToWait == portMAX_DELAY )
+            {
+                /* If INCLUDE_vTaskSuspend is set to 1 and the block time
+                 * specified is the maximum block time then the task should block
+                 * indefinitely, and therefore never time out. */
+                xReturn = pdFALSE;
+            }
+            else
+        #endif
 
-		if( ( xNumOfOverflows != pxTimeOut->xOverflowCount ) && ( xConstTickCount >= pxTimeOut->xTimeOnEntering ) ) /*lint !e525 Indentation preferred as is to make code within pre-processor directives clearer. */
-		{
-			/* The tick count is greater than the time at which
-			vTaskSetTimeout() was called, but has also overflowed since
-			vTaskSetTimeOut() was called.  It must have wrapped all the way
-			around and gone past again. This passed since vTaskSetTimeout()
-			was called. */
-			xReturn = pdTRUE;
-		}
-		else if( xElapsedTime < *pxTicksToWait ) /*lint !e961 Explicit casting is only redundant with some compilers, whereas others require it to prevent integer conversion errors. */
-		{
-			/* Not a genuine timeout. Adjust parameters for time remaining. */
-			*pxTicksToWait -= xElapsedTime;
-			vTaskInternalSetTimeOutState( pxTimeOut );
-			xReturn = pdFALSE;
-		}
-		else
-		{
-			*pxTicksToWait = 0;
-			xReturn = pdTRUE;
-		}
-	}
-	taskEXIT_CRITICAL();
+        if( ( xNumOfOverflows != pxTimeOut->xOverflowCount ) && ( xConstTickCount >= pxTimeOut->xTimeOnEntering ) ) /*lint !e525 Indentation preferred as is to make code within pre-processor directives clearer. */
+        {
+            /* The tick count is greater than the time at which
+             * vTaskSetTimeout() was called, but has also overflowed since
+             * vTaskSetTimeOut() was called.  It must have wrapped all the way
+             * around and gone past again. This passed since vTaskSetTimeout()
+             * was called. */
+            xReturn = pdTRUE;
+            *pxTicksToWait = ( TickType_t ) 0;
+        }
+        else if( xElapsedTime < *pxTicksToWait ) /*lint !e961 Explicit casting is only redundant with some compilers, whereas others require it to prevent integer conversion errors. */
+        {
+            /* Not a genuine timeout. Adjust parameters for time remaining. */
+            *pxTicksToWait -= xElapsedTime;
+            vTaskInternalSetTimeOutState( pxTimeOut );
+            xReturn = pdFALSE;
+        }
+        else
+        {
+            *pxTicksToWait = ( TickType_t ) 0;
+            xReturn = pdTRUE;
+        }
+    }
+    taskEXIT_CRITICAL();
 
-	return xReturn;
+    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
 void vTaskMissedYield( void )
 {
-	xYieldPending = pdTRUE;
+    xYieldPending = pdTRUE;
 }
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_TRACE_FACILITY == 1 )
 
-	UBaseType_t uxTaskGetTaskNumber( TaskHandle_t xTask )
-	{
-	UBaseType_t uxReturn;
-	TCB_t const *pxTCB;
+    UBaseType_t uxTaskGetTaskNumber( TaskHandle_t xTask )
+    {
+        UBaseType_t uxReturn;
+        TCB_t const * pxTCB;
 
-		if( xTask != NULL )
-		{
-			pxTCB = xTask;
-			uxReturn = pxTCB->uxTaskNumber;
-		}
-		else
-		{
-			uxReturn = 0U;
-		}
+        if( xTask != NULL )
+        {
+            pxTCB = xTask;
+            uxReturn = pxTCB->uxTaskNumber;
+        }
+        else
+        {
+            uxReturn = 0U;
+        }
 
-		return uxReturn;
-	}
+        return uxReturn;
+    }
 
 #endif /* configUSE_TRACE_FACILITY */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_TRACE_FACILITY == 1 )
 
-	void vTaskSetTaskNumber( TaskHandle_t xTask, const UBaseType_t uxHandle )
-	{
-	TCB_t * pxTCB;
+    void vTaskSetTaskNumber( TaskHandle_t xTask,
+                             const UBaseType_t uxHandle )
+    {
+        TCB_t * pxTCB;
 
-		if( xTask != NULL )
-		{
-			pxTCB = xTask;
-			pxTCB->uxTaskNumber = uxHandle;
-		}
-	}
+        if( xTask != NULL )
+        {
+            pxTCB = xTask;
+            pxTCB->uxTaskNumber = uxHandle;
+        }
+    }
 
 #endif /* configUSE_TRACE_FACILITY */
 
@@ -3391,1923 +3406,1974 @@ void vTaskMissedYield( void )
  */
 static portTASK_FUNCTION( prvIdleTask, pvParameters )
 {
-	/* Stop warnings. */
-	( void ) pvParameters;
+    /* Stop warnings. */
+    ( void ) pvParameters;
 
-	/** THIS IS THE RTOS IDLE TASK - WHICH IS CREATED AUTOMATICALLY WHEN THE
-	SCHEDULER IS STARTED. **/
+    /** THIS IS THE RTOS IDLE TASK - WHICH IS CREATED AUTOMATICALLY WHEN THE
+     * SCHEDULER IS STARTED. **/
 
-	/* In case a task that has a secure context deletes itself, in which case
-	the idle task is responsible for deleting the task's secure context, if
-	any. */
-	portALLOCATE_SECURE_CONTEXT( configMINIMAL_SECURE_STACK_SIZE );
+    /* In case a task that has a secure context deletes itself, in which case
+     * the idle task is responsible for deleting the task's secure context, if
+     * any. */
+    portALLOCATE_SECURE_CONTEXT( configMINIMAL_SECURE_STACK_SIZE );
 
-	for( ;; )
-	{
-		/* See if any tasks have deleted themselves - if so then the idle task
-		is responsible for freeing the deleted task's TCB and stack. */
-		prvCheckTasksWaitingTermination();
+    for( ; ; )
+    {
+        /* See if any tasks have deleted themselves - if so then the idle task
+         * is responsible for freeing the deleted task's TCB and stack. */
+        prvCheckTasksWaitingTermination();
 
-		#if ( configUSE_PREEMPTION == 0 )
-		{
-			/* If we are not using preemption we keep forcing a task switch to
-			see if any other task has become available.  If we are using
-			preemption we don't need to do this as any task becoming available
-			will automatically get the processor anyway. */
-			taskYIELD();
-		}
-		#endif /* configUSE_PREEMPTION */
+        #if ( configUSE_PREEMPTION == 0 )
+            {
+                /* If we are not using preemption we keep forcing a task switch to
+                 * see if any other task has become available.  If we are using
+                 * preemption we don't need to do this as any task becoming available
+                 * will automatically get the processor anyway. */
+                taskYIELD();
+            }
+        #endif /* configUSE_PREEMPTION */
 
-		#if ( ( configUSE_PREEMPTION == 1 ) && ( configIDLE_SHOULD_YIELD == 1 ) )
-		{
-			/* When using preemption tasks of equal priority will be
-			timesliced.  If a task that is sharing the idle priority is ready
-			to run then the idle task should yield before the end of the
-			timeslice.
+        #if ( ( configUSE_PREEMPTION == 1 ) && ( configIDLE_SHOULD_YIELD == 1 ) )
+            {
+                /* When using preemption tasks of equal priority will be
+                 * timesliced.  If a task that is sharing the idle priority is ready
+                 * to run then the idle task should yield before the end of the
+                 * timeslice.
+                 *
+                 * A critical region is not required here as we are just reading from
+                 * the list, and an occasional incorrect value will not matter.  If
+                 * the ready list at the idle priority contains more than one task
+                 * then a task other than the idle task is ready to execute. */
+                if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( UBaseType_t ) 1 )
+                {
+                    taskYIELD();
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+        #endif /* ( ( configUSE_PREEMPTION == 1 ) && ( configIDLE_SHOULD_YIELD == 1 ) ) */
 
-			A critical region is not required here as we are just reading from
-			the list, and an occasional incorrect value will not matter.  If
-			the ready list at the idle priority contains more than one task
-			then a task other than the idle task is ready to execute. */
-			if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( UBaseType_t ) 1 )
-			{
-				taskYIELD();
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		#endif /* ( ( configUSE_PREEMPTION == 1 ) && ( configIDLE_SHOULD_YIELD == 1 ) ) */
+        #if ( configUSE_IDLE_HOOK == 1 )
+            {
+                extern void vApplicationIdleHook( void );
 
-		#if ( configUSE_IDLE_HOOK == 1 )
-		{
-			extern void vApplicationIdleHook( void );
+                /* Call the user defined function from within the idle task.  This
+                 * allows the application designer to add background functionality
+                 * without the overhead of a separate task.
+                 * NOTE: vApplicationIdleHook() MUST NOT, UNDER ANY CIRCUMSTANCES,
+                 * CALL A FUNCTION THAT MIGHT BLOCK. */
+                vApplicationIdleHook();
+            }
+        #endif /* configUSE_IDLE_HOOK */
 
-			/* Call the user defined function from within the idle task.  This
-			allows the application designer to add background functionality
-			without the overhead of a separate task.
-			NOTE: vApplicationIdleHook() MUST NOT, UNDER ANY CIRCUMSTANCES,
-			CALL A FUNCTION THAT MIGHT BLOCK. */
-			vApplicationIdleHook();
-		}
-		#endif /* configUSE_IDLE_HOOK */
+        /* This conditional compilation should use inequality to 0, not equality
+         * to 1.  This is to ensure portSUPPRESS_TICKS_AND_SLEEP() is called when
+         * user defined low power mode  implementations require
+         * configUSE_TICKLESS_IDLE to be set to a value other than 1. */
+        #if ( configUSE_TICKLESS_IDLE != 0 )
+            {
+                TickType_t xExpectedIdleTime;
 
-		/* This conditional compilation should use inequality to 0, not equality
-		to 1.  This is to ensure portSUPPRESS_TICKS_AND_SLEEP() is called when
-		user defined low power mode	implementations require
-		configUSE_TICKLESS_IDLE to be set to a value other than 1. */
-		#if ( configUSE_TICKLESS_IDLE != 0 )
-		{
-		TickType_t xExpectedIdleTime;
+                /* It is not desirable to suspend then resume the scheduler on
+                 * each iteration of the idle task.  Therefore, a preliminary
+                 * test of the expected idle time is performed without the
+                 * scheduler suspended.  The result here is not necessarily
+                 * valid. */
+                xExpectedIdleTime = prvGetExpectedIdleTime();
 
-			/* It is not desirable to suspend then resume the scheduler on
-			each iteration of the idle task.  Therefore, a preliminary
-			test of the expected idle time is performed without the
-			scheduler suspended.  The result here is not necessarily
-			valid. */
-			xExpectedIdleTime = prvGetExpectedIdleTime();
+                if( xExpectedIdleTime >= configEXPECTED_IDLE_TIME_BEFORE_SLEEP )
+                {
+                    vTaskSuspendAll();
+                    {
+                        /* Now the scheduler is suspended, the expected idle
+                         * time can be sampled again, and this time its value can
+                         * be used. */
+                        configASSERT( xNextTaskUnblockTime >= xTickCount );
+                        xExpectedIdleTime = prvGetExpectedIdleTime();
 
-			if( xExpectedIdleTime >= configEXPECTED_IDLE_TIME_BEFORE_SLEEP )
-			{
-				vTaskSuspendAll();
-				{
-					/* Now the scheduler is suspended, the expected idle
-					time can be sampled again, and this time its value can
-					be used. */
-					configASSERT( xNextTaskUnblockTime >= xTickCount );
-					xExpectedIdleTime = prvGetExpectedIdleTime();
+                        /* Define the following macro to set xExpectedIdleTime to 0
+                         * if the application does not want
+                         * portSUPPRESS_TICKS_AND_SLEEP() to be called. */
+                        configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING( xExpectedIdleTime );
 
-					/* Define the following macro to set xExpectedIdleTime to 0
-					if the application does not want
-					portSUPPRESS_TICKS_AND_SLEEP() to be called. */
-					configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING( xExpectedIdleTime );
-
-					if( xExpectedIdleTime >= configEXPECTED_IDLE_TIME_BEFORE_SLEEP )
-					{
-						traceLOW_POWER_IDLE_BEGIN();
-						portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime );
-						traceLOW_POWER_IDLE_END();
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				( void ) xTaskResumeAll();
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		#endif /* configUSE_TICKLESS_IDLE */
-	}
+                        if( xExpectedIdleTime >= configEXPECTED_IDLE_TIME_BEFORE_SLEEP )
+                        {
+                            traceLOW_POWER_IDLE_BEGIN();
+                            portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime );
+                            traceLOW_POWER_IDLE_END();
+                        }
+                        else
+                        {
+                            mtCOVERAGE_TEST_MARKER();
+                        }
+                    }
+                    ( void ) xTaskResumeAll();
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+        #endif /* configUSE_TICKLESS_IDLE */
+    }
 }
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TICKLESS_IDLE != 0 )
+#if ( configUSE_TICKLESS_IDLE != 0 )
 
-	eSleepModeStatus eTaskConfirmSleepModeStatus( void )
-	{
-	/* The idle task exists in addition to the application tasks. */
-	const UBaseType_t uxNonApplicationTasks = 1;
-	eSleepModeStatus eReturn = eStandardSleep;
+    eSleepModeStatus eTaskConfirmSleepModeStatus( void )
+    {
+        /* The idle task exists in addition to the application tasks. */
+        const UBaseType_t uxNonApplicationTasks = 1;
+        eSleepModeStatus eReturn = eStandardSleep;
 
-		/* This function must be called from a critical section. */
+        /* This function must be called from a critical section. */
 
-		if( listCURRENT_LIST_LENGTH( &xPendingReadyList ) != 0 )
-		{
-			/* A task was made ready while the scheduler was suspended. */
-			eReturn = eAbortSleep;
-		}
-		else if( xYieldPending != pdFALSE )
-		{
-			/* A yield was pended while the scheduler was suspended. */
-			eReturn = eAbortSleep;
-		}
-		else if( xPendedTicks != 0 )
-		{
-			/* A tick interrupt has already occurred but was held pending
-			because the scheduler is suspended. */
-			eReturn = eAbortSleep;
-		}
-		else
-		{
-			/* If all the tasks are in the suspended list (which might mean they
-			have an infinite block time rather than actually being suspended)
-			then it is safe to turn all clocks off and just wait for external
-			interrupts. */
-			if( listCURRENT_LIST_LENGTH( &xSuspendedTaskList ) == ( uxCurrentNumberOfTasks - uxNonApplicationTasks ) )
-			{
-				eReturn = eNoTasksWaitingTimeout;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
+        if( listCURRENT_LIST_LENGTH( &xPendingReadyList ) != 0 )
+        {
+            /* A task was made ready while the scheduler was suspended. */
+            eReturn = eAbortSleep;
+        }
+        else if( xYieldPending != pdFALSE )
+        {
+            /* A yield was pended while the scheduler was suspended. */
+            eReturn = eAbortSleep;
+        }
+        else if( xPendedTicks != 0 )
+        {
+            /* A tick interrupt has already occurred but was held pending
+             * because the scheduler is suspended. */
+            eReturn = eAbortSleep;
+        }
+        else
+        {
+            /* If all the tasks are in the suspended list (which might mean they
+             * have an infinite block time rather than actually being suspended)
+             * then it is safe to turn all clocks off and just wait for external
+             * interrupts. */
+            if( listCURRENT_LIST_LENGTH( &xSuspendedTaskList ) == ( uxCurrentNumberOfTasks - uxNonApplicationTasks ) )
+            {
+                eReturn = eNoTasksWaitingTimeout;
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
 
-		return eReturn;
-	}
+        return eReturn;
+    }
 
 #endif /* configUSE_TICKLESS_IDLE */
 /*-----------------------------------------------------------*/
 
 #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 )
 
-	void vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue )
-	{
-	TCB_t *pxTCB;
+    void vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet,
+                                            BaseType_t xIndex,
+                                            void * pvValue )
+    {
+        TCB_t * pxTCB;
 
-		if( xIndex < configNUM_THREAD_LOCAL_STORAGE_POINTERS )
-		{
-			pxTCB = prvGetTCBFromHandle( xTaskToSet );
-			configASSERT( pxTCB != NULL );
-			pxTCB->pvThreadLocalStoragePointers[ xIndex ] = pvValue;
-		}
-	}
+        if( xIndex < configNUM_THREAD_LOCAL_STORAGE_POINTERS )
+        {
+            pxTCB = prvGetTCBFromHandle( xTaskToSet );
+            configASSERT( pxTCB != NULL );
+            pxTCB->pvThreadLocalStoragePointers[ xIndex ] = pvValue;
+        }
+    }
 
 #endif /* configNUM_THREAD_LOCAL_STORAGE_POINTERS */
 /*-----------------------------------------------------------*/
 
 #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 )
 
-	void *pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex )
-	{
-	void *pvReturn = NULL;
-	TCB_t *pxTCB;
+    void * pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery,
+                                               BaseType_t xIndex )
+    {
+        void * pvReturn = NULL;
+        TCB_t * pxTCB;
 
-		if( xIndex < configNUM_THREAD_LOCAL_STORAGE_POINTERS )
-		{
-			pxTCB = prvGetTCBFromHandle( xTaskToQuery );
-			pvReturn = pxTCB->pvThreadLocalStoragePointers[ xIndex ];
-		}
-		else
-		{
-			pvReturn = NULL;
-		}
+        if( xIndex < configNUM_THREAD_LOCAL_STORAGE_POINTERS )
+        {
+            pxTCB = prvGetTCBFromHandle( xTaskToQuery );
+            pvReturn = pxTCB->pvThreadLocalStoragePointers[ xIndex ];
+        }
+        else
+        {
+            pvReturn = NULL;
+        }
 
-		return pvReturn;
-	}
+        return pvReturn;
+    }
 
 #endif /* configNUM_THREAD_LOCAL_STORAGE_POINTERS */
 /*-----------------------------------------------------------*/
 
 #if ( portUSING_MPU_WRAPPERS == 1 )
 
-	void vTaskAllocateMPURegions( TaskHandle_t xTaskToModify, const MemoryRegion_t * const xRegions )
-	{
-	TCB_t *pxTCB;
+    void vTaskAllocateMPURegions( TaskHandle_t xTaskToModify,
+                                  const MemoryRegion_t * const xRegions )
+    {
+        TCB_t * pxTCB;
 
-		/* If null is passed in here then we are modifying the MPU settings of
-		the calling task. */
-		pxTCB = prvGetTCBFromHandle( xTaskToModify );
+        /* If null is passed in here then we are modifying the MPU settings of
+         * the calling task. */
+        pxTCB = prvGetTCBFromHandle( xTaskToModify );
 
-		vPortStoreTaskMPUSettings( &( pxTCB->xMPUSettings ), xRegions, NULL, 0 );
-	}
+        vPortStoreTaskMPUSettings( &( pxTCB->xMPUSettings ), xRegions, NULL, 0 );
+    }
 
 #endif /* portUSING_MPU_WRAPPERS */
 /*-----------------------------------------------------------*/
 
 static void prvInitialiseTaskLists( void )
 {
-UBaseType_t uxPriority;
+    UBaseType_t uxPriority;
 
-	for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
-	{
-		vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) );
-	}
+    for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
+    {
+        vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) );
+    }
 
-	vListInitialise( &xDelayedTaskList1 );
-	vListInitialise( &xDelayedTaskList2 );
-	vListInitialise( &xPendingReadyList );
+    vListInitialise( &xDelayedTaskList1 );
+    vListInitialise( &xDelayedTaskList2 );
+    vListInitialise( &xPendingReadyList );
 
-	#if ( INCLUDE_vTaskDelete == 1 )
-	{
-		vListInitialise( &xTasksWaitingTermination );
-	}
-	#endif /* INCLUDE_vTaskDelete */
+    #if ( INCLUDE_vTaskDelete == 1 )
+        {
+            vListInitialise( &xTasksWaitingTermination );
+        }
+    #endif /* INCLUDE_vTaskDelete */
 
-	#if ( INCLUDE_vTaskSuspend == 1 )
-	{
-		vListInitialise( &xSuspendedTaskList );
-	}
-	#endif /* INCLUDE_vTaskSuspend */
+    #if ( INCLUDE_vTaskSuspend == 1 )
+        {
+            vListInitialise( &xSuspendedTaskList );
+        }
+    #endif /* INCLUDE_vTaskSuspend */
 
-	/* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList
-	using list2. */
-	pxDelayedTaskList = &xDelayedTaskList1;
-	pxOverflowDelayedTaskList = &xDelayedTaskList2;
+    /* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList
+     * using list2. */
+    pxDelayedTaskList = &xDelayedTaskList1;
+    pxOverflowDelayedTaskList = &xDelayedTaskList2;
 }
 /*-----------------------------------------------------------*/
 
 static void prvCheckTasksWaitingTermination( void )
 {
+    /** THIS FUNCTION IS CALLED FROM THE RTOS IDLE TASK **/
 
-	/** THIS FUNCTION IS CALLED FROM THE RTOS IDLE TASK **/
+    #if ( INCLUDE_vTaskDelete == 1 )
+        {
+            TCB_t * pxTCB;
 
-	#if ( INCLUDE_vTaskDelete == 1 )
-	{
-		TCB_t *pxTCB;
+            /* uxDeletedTasksWaitingCleanUp is used to prevent taskENTER_CRITICAL()
+             * being called too often in the idle task. */
+            while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
+            {
+                taskENTER_CRITICAL();
+                {
+                    pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+                    ( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+                    --uxCurrentNumberOfTasks;
+                    --uxDeletedTasksWaitingCleanUp;
+                }
+                taskEXIT_CRITICAL();
 
-		/* uxDeletedTasksWaitingCleanUp is used to prevent taskENTER_CRITICAL()
-		being called too often in the idle task. */
-		while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
-		{
-			taskENTER_CRITICAL();
-			{
-				pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
-				( void ) uxListRemove( &( pxTCB->xStateListItem ) );
-				--uxCurrentNumberOfTasks;
-				--uxDeletedTasksWaitingCleanUp;
-			}
-			taskEXIT_CRITICAL();
-
-			prvDeleteTCB( pxTCB );
-		}
-	}
-	#endif /* INCLUDE_vTaskDelete */
+                prvDeleteTCB( pxTCB );
+            }
+        }
+    #endif /* INCLUDE_vTaskDelete */
 }
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TRACE_FACILITY == 1 )
+#if ( configUSE_TRACE_FACILITY == 1 )
 
-	void vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState )
-	{
-	TCB_t *pxTCB;
+    void vTaskGetInfo( TaskHandle_t xTask,
+                       TaskStatus_t * pxTaskStatus,
+                       BaseType_t xGetFreeStackSpace,
+                       eTaskState eState )
+    {
+        TCB_t * pxTCB;
 
-		/* xTask is NULL then get the state of the calling task. */
-		pxTCB = prvGetTCBFromHandle( xTask );
+        /* xTask is NULL then get the state of the calling task. */
+        pxTCB = prvGetTCBFromHandle( xTask );
 
-		pxTaskStatus->xHandle = ( TaskHandle_t ) pxTCB;
-		pxTaskStatus->pcTaskName = ( const char * ) &( pxTCB->pcTaskName [ 0 ] );
-		pxTaskStatus->uxCurrentPriority = pxTCB->uxPriority;
-		pxTaskStatus->pxStackBase = pxTCB->pxStack;
-		pxTaskStatus->xTaskNumber = pxTCB->uxTCBNumber;
+        pxTaskStatus->xHandle = ( TaskHandle_t ) pxTCB;
+        pxTaskStatus->pcTaskName = ( const char * ) &( pxTCB->pcTaskName[ 0 ] );
+        pxTaskStatus->uxCurrentPriority = pxTCB->uxPriority;
+        pxTaskStatus->pxStackBase = pxTCB->pxStack;
+        pxTaskStatus->xTaskNumber = pxTCB->uxTCBNumber;
 
-		#if ( configUSE_MUTEXES == 1 )
-		{
-			pxTaskStatus->uxBasePriority = pxTCB->uxBasePriority;
-		}
-		#else
-		{
-			pxTaskStatus->uxBasePriority = 0;
-		}
-		#endif
+        #if ( configUSE_MUTEXES == 1 )
+            {
+                pxTaskStatus->uxBasePriority = pxTCB->uxBasePriority;
+            }
+        #else
+            {
+                pxTaskStatus->uxBasePriority = 0;
+            }
+        #endif
 
-		#if ( configGENERATE_RUN_TIME_STATS == 1 )
-		{
-			pxTaskStatus->ulRunTimeCounter = pxTCB->ulRunTimeCounter;
-		}
-		#else
-		{
-			pxTaskStatus->ulRunTimeCounter = 0;
-		}
-		#endif
+        #if ( configGENERATE_RUN_TIME_STATS == 1 )
+            {
+                pxTaskStatus->ulRunTimeCounter = pxTCB->ulRunTimeCounter;
+            }
+        #else
+            {
+                pxTaskStatus->ulRunTimeCounter = 0;
+            }
+        #endif
 
-		/* Obtaining the task state is a little fiddly, so is only done if the
-		value of eState passed into this function is eInvalid - otherwise the
-		state is just set to whatever is passed in. */
-		if( eState != eInvalid )
-		{
-			if( pxTCB == pxCurrentTCB )
-			{
-				pxTaskStatus->eCurrentState = eRunning;
-			}
-			else
-			{
-				pxTaskStatus->eCurrentState = eState;
+        /* Obtaining the task state is a little fiddly, so is only done if the
+         * value of eState passed into this function is eInvalid - otherwise the
+         * state is just set to whatever is passed in. */
+        if( eState != eInvalid )
+        {
+            if( pxTCB == pxCurrentTCB )
+            {
+                pxTaskStatus->eCurrentState = eRunning;
+            }
+            else
+            {
+                pxTaskStatus->eCurrentState = eState;
 
-				#if ( INCLUDE_vTaskSuspend == 1 )
-				{
-					/* If the task is in the suspended list then there is a
-					chance it is actually just blocked indefinitely - so really
-					it should be reported as being in the Blocked state. */
-					if( eState == eSuspended )
-					{
-						vTaskSuspendAll();
-						{
-							if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
-							{
-								pxTaskStatus->eCurrentState = eBlocked;
-							}
-						}
-						( void ) xTaskResumeAll();
-					}
-				}
-				#endif /* INCLUDE_vTaskSuspend */
-			}
-		}
-		else
-		{
-			pxTaskStatus->eCurrentState = eTaskGetState( pxTCB );
-		}
+                #if ( INCLUDE_vTaskSuspend == 1 )
+                    {
+                        /* If the task is in the suspended list then there is a
+                         *  chance it is actually just blocked indefinitely - so really
+                         *  it should be reported as being in the Blocked state. */
+                        if( eState == eSuspended )
+                        {
+                            vTaskSuspendAll();
+                            {
+                                if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
+                                {
+                                    pxTaskStatus->eCurrentState = eBlocked;
+                                }
+                            }
+                            ( void ) xTaskResumeAll();
+                        }
+                    }
+                #endif /* INCLUDE_vTaskSuspend */
+            }
+        }
+        else
+        {
+            pxTaskStatus->eCurrentState = eTaskGetState( pxTCB );
+        }
 
-		/* Obtaining the stack space takes some time, so the xGetFreeStackSpace
-		parameter is provided to allow it to be skipped. */
-		if( xGetFreeStackSpace != pdFALSE )
-		{
-			#if ( portSTACK_GROWTH > 0 )
-			{
-				pxTaskStatus->usStackHighWaterMark = prvTaskCheckFreeStackSpace( ( uint8_t * ) pxTCB->pxEndOfStack );
-			}
-			#else
-			{
-				pxTaskStatus->usStackHighWaterMark = prvTaskCheckFreeStackSpace( ( uint8_t * ) pxTCB->pxStack );
-			}
-			#endif
-		}
-		else
-		{
-			pxTaskStatus->usStackHighWaterMark = 0;
-		}
-	}
+        /* Obtaining the stack space takes some time, so the xGetFreeStackSpace
+         * parameter is provided to allow it to be skipped. */
+        if( xGetFreeStackSpace != pdFALSE )
+        {
+            #if ( portSTACK_GROWTH > 0 )
+                {
+                    pxTaskStatus->usStackHighWaterMark = prvTaskCheckFreeStackSpace( ( uint8_t * ) pxTCB->pxEndOfStack );
+                }
+            #else
+                {
+                    pxTaskStatus->usStackHighWaterMark = prvTaskCheckFreeStackSpace( ( uint8_t * ) pxTCB->pxStack );
+                }
+            #endif
+        }
+        else
+        {
+            pxTaskStatus->usStackHighWaterMark = 0;
+        }
+    }
 
 #endif /* configUSE_TRACE_FACILITY */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_TRACE_FACILITY == 1 )
 
-	static UBaseType_t prvListTasksWithinSingleList( TaskStatus_t *pxTaskStatusArray, List_t *pxList, eTaskState eState )
-	{
-	configLIST_VOLATILE TCB_t *pxNextTCB, *pxFirstTCB;
-	UBaseType_t uxTask = 0;
+    static UBaseType_t prvListTasksWithinSingleList( TaskStatus_t * pxTaskStatusArray,
+                                                     List_t * pxList,
+                                                     eTaskState eState )
+    {
+        configLIST_VOLATILE TCB_t * pxNextTCB, * pxFirstTCB;
+        UBaseType_t uxTask = 0;
 
-		if( listCURRENT_LIST_LENGTH( pxList ) > ( UBaseType_t ) 0 )
-		{
-			listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+        if( listCURRENT_LIST_LENGTH( pxList ) > ( UBaseType_t ) 0 )
+        {
+            listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 
-			/* Populate an TaskStatus_t structure within the
-			pxTaskStatusArray array for each task that is referenced from
-			pxList.  See the definition of TaskStatus_t in task.h for the
-			meaning of each TaskStatus_t structure member. */
-			do
-			{
-				listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
-				vTaskGetInfo( ( TaskHandle_t ) pxNextTCB, &( pxTaskStatusArray[ uxTask ] ), pdTRUE, eState );
-				uxTask++;
-			} while( pxNextTCB != pxFirstTCB );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
+            /* Populate an TaskStatus_t structure within the
+             * pxTaskStatusArray array for each task that is referenced from
+             * pxList.  See the definition of TaskStatus_t in task.h for the
+             * meaning of each TaskStatus_t structure member. */
+            do
+            {
+                listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+                vTaskGetInfo( ( TaskHandle_t ) pxNextTCB, &( pxTaskStatusArray[ uxTask ] ), pdTRUE, eState );
+                uxTask++;
+            } while( pxNextTCB != pxFirstTCB );
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
 
-		return uxTask;
-	}
+        return uxTask;
+    }
 
 #endif /* configUSE_TRACE_FACILITY */
 /*-----------------------------------------------------------*/
 
 #if ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) )
 
-	static configSTACK_DEPTH_TYPE prvTaskCheckFreeStackSpace( const uint8_t * pucStackByte )
-	{
-	uint32_t ulCount = 0U;
+    static configSTACK_DEPTH_TYPE prvTaskCheckFreeStackSpace( const uint8_t * pucStackByte )
+    {
+        uint32_t ulCount = 0U;
 
-		while( *pucStackByte == ( uint8_t ) tskSTACK_FILL_BYTE )
-		{
-			pucStackByte -= portSTACK_GROWTH;
-			ulCount++;
-		}
+        while( *pucStackByte == ( uint8_t ) tskSTACK_FILL_BYTE )
+        {
+            pucStackByte -= portSTACK_GROWTH;
+            ulCount++;
+        }
 
-		ulCount /= ( uint32_t ) sizeof( StackType_t ); /*lint !e961 Casting is not redundant on smaller architectures. */
+        ulCount /= ( uint32_t ) sizeof( StackType_t ); /*lint !e961 Casting is not redundant on smaller architectures. */
 
-		return ( configSTACK_DEPTH_TYPE ) ulCount;
-	}
+        return ( configSTACK_DEPTH_TYPE ) ulCount;
+    }
 
 #endif /* ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) ) */
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 )
 
-	/* uxTaskGetStackHighWaterMark() and uxTaskGetStackHighWaterMark2() are the
-	same except for their return type.  Using configSTACK_DEPTH_TYPE allows the
-	user to determine the return type.  It gets around the problem of the value
-	overflowing on 8-bit types without breaking backward compatibility for
-	applications that expect an 8-bit return type. */
-	configSTACK_DEPTH_TYPE uxTaskGetStackHighWaterMark2( TaskHandle_t xTask )
-	{
-	TCB_t *pxTCB;
-	uint8_t *pucEndOfStack;
-	configSTACK_DEPTH_TYPE uxReturn;
+/* uxTaskGetStackHighWaterMark() and uxTaskGetStackHighWaterMark2() are the
+ * same except for their return type.  Using configSTACK_DEPTH_TYPE allows the
+ * user to determine the return type.  It gets around the problem of the value
+ * overflowing on 8-bit types without breaking backward compatibility for
+ * applications that expect an 8-bit return type. */
+    configSTACK_DEPTH_TYPE uxTaskGetStackHighWaterMark2( TaskHandle_t xTask )
+    {
+        TCB_t * pxTCB;
+        uint8_t * pucEndOfStack;
+        configSTACK_DEPTH_TYPE uxReturn;
 
-		/* uxTaskGetStackHighWaterMark() and uxTaskGetStackHighWaterMark2() are
-		the same except for their return type.  Using configSTACK_DEPTH_TYPE
-		allows the user to determine the return type.  It gets around the
-		problem of the value overflowing on 8-bit types without breaking
-		backward compatibility for applications that expect an 8-bit return
-		type. */
+        /* uxTaskGetStackHighWaterMark() and uxTaskGetStackHighWaterMark2() are
+         * the same except for their return type.  Using configSTACK_DEPTH_TYPE
+         * allows the user to determine the return type.  It gets around the
+         * problem of the value overflowing on 8-bit types without breaking
+         * backward compatibility for applications that expect an 8-bit return
+         * type. */
 
-		pxTCB = prvGetTCBFromHandle( xTask );
+        pxTCB = prvGetTCBFromHandle( xTask );
 
-		#if portSTACK_GROWTH < 0
-		{
-			pucEndOfStack = ( uint8_t * ) pxTCB->pxStack;
-		}
-		#else
-		{
-			pucEndOfStack = ( uint8_t * ) pxTCB->pxEndOfStack;
-		}
-		#endif
+        #if portSTACK_GROWTH < 0
+            {
+                pucEndOfStack = ( uint8_t * ) pxTCB->pxStack;
+            }
+        #else
+            {
+                pucEndOfStack = ( uint8_t * ) pxTCB->pxEndOfStack;
+            }
+        #endif
 
-		uxReturn = prvTaskCheckFreeStackSpace( pucEndOfStack );
+        uxReturn = prvTaskCheckFreeStackSpace( pucEndOfStack );
 
-		return uxReturn;
-	}
+        return uxReturn;
+    }
 
 #endif /* INCLUDE_uxTaskGetStackHighWaterMark2 */
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )
 
-	UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask )
-	{
-	TCB_t *pxTCB;
-	uint8_t *pucEndOfStack;
-	UBaseType_t uxReturn;
+    UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask )
+    {
+        TCB_t * pxTCB;
+        uint8_t * pucEndOfStack;
+        UBaseType_t uxReturn;
 
-		pxTCB = prvGetTCBFromHandle( xTask );
+        pxTCB = prvGetTCBFromHandle( xTask );
 
-		#if portSTACK_GROWTH < 0
-		{
-			pucEndOfStack = ( uint8_t * ) pxTCB->pxStack;
-		}
-		#else
-		{
-			pucEndOfStack = ( uint8_t * ) pxTCB->pxEndOfStack;
-		}
-		#endif
+        #if portSTACK_GROWTH < 0
+            {
+                pucEndOfStack = ( uint8_t * ) pxTCB->pxStack;
+            }
+        #else
+            {
+                pucEndOfStack = ( uint8_t * ) pxTCB->pxEndOfStack;
+            }
+        #endif
 
-		uxReturn = ( UBaseType_t ) prvTaskCheckFreeStackSpace( pucEndOfStack );
+        uxReturn = ( UBaseType_t ) prvTaskCheckFreeStackSpace( pucEndOfStack );
 
-		return uxReturn;
-	}
+        return uxReturn;
+    }
 
 #endif /* INCLUDE_uxTaskGetStackHighWaterMark */
 /*-----------------------------------------------------------*/
 
 #if ( INCLUDE_vTaskDelete == 1 )
 
-	static void prvDeleteTCB( TCB_t *pxTCB )
-	{
-		/* This call is required specifically for the TriCore port.  It must be
-		above the vPortFree() calls.  The call is also used by ports/demos that
-		want to allocate and clean RAM statically. */
-		portCLEAN_UP_TCB( pxTCB );
+    static void prvDeleteTCB( TCB_t * pxTCB )
+    {
+        /* This call is required specifically for the TriCore port.  It must be
+         * above the vPortFree() calls.  The call is also used by ports/demos that
+         * want to allocate and clean RAM statically. */
+        portCLEAN_UP_TCB( pxTCB );
 
-		/* Free up the memory allocated by the scheduler for the task.  It is up
-		to the task to free any memory allocated at the application level.
-		See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
-		for additional information. */
-		#if ( configUSE_NEWLIB_REENTRANT == 1 )
-		{
-			_reclaim_reent( &( pxTCB->xNewLib_reent ) );
-		}
-		#endif /* configUSE_NEWLIB_REENTRANT */
+        /* Free up the memory allocated by the scheduler for the task.  It is up
+         * to the task to free any memory allocated at the application level.
+         * See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
+         * for additional information. */
+        #if ( configUSE_NEWLIB_REENTRANT == 1 )
+            {
+                _reclaim_reent( &( pxTCB->xNewLib_reent ) );
+            }
+        #endif /* configUSE_NEWLIB_REENTRANT */
 
-		#if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) && ( portUSING_MPU_WRAPPERS == 0 ) )
-		{
-			/* The task can only have been allocated dynamically - free both
-			the stack and TCB. */
-			vPortFree( pxTCB->pxStack );
-			vPortFree( pxTCB );
-		}
-		#elif( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
-		{
-			/* The task could have been allocated statically or dynamically, so
-			check what was statically allocated before trying to free the
-			memory. */
-			if( pxTCB->ucStaticallyAllocated == tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB )
-			{
-				/* Both the stack and TCB were allocated dynamically, so both
-				must be freed. */
-				vPortFree( pxTCB->pxStack );
-				vPortFree( pxTCB );
-			}
-			else if( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_ONLY )
-			{
-				/* Only the stack was statically allocated, so the TCB is the
-				only memory that must be freed. */
-				vPortFree( pxTCB );
-			}
-			else
-			{
-				/* Neither the stack nor the TCB were allocated dynamically, so
-				nothing needs to be freed. */
-				configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB	);
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
-	}
+        #if ( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) && ( portUSING_MPU_WRAPPERS == 0 ) )
+            {
+                /* The task can only have been allocated dynamically - free both
+                 * the stack and TCB. */
+                vPortFree( pxTCB->pxStack );
+                vPortFree( pxTCB );
+            }
+        #elif ( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
+            {
+                /* The task could have been allocated statically or dynamically, so
+                 * check what was statically allocated before trying to free the
+                 * memory. */
+                if( pxTCB->ucStaticallyAllocated == tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB )
+                {
+                    /* Both the stack and TCB were allocated dynamically, so both
+                     * must be freed. */
+                    vPortFree( pxTCB->pxStack );
+                    vPortFree( pxTCB );
+                }
+                else if( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_ONLY )
+                {
+                    /* Only the stack was statically allocated, so the TCB is the
+                     * only memory that must be freed. */
+                    vPortFree( pxTCB );
+                }
+                else
+                {
+                    /* Neither the stack nor the TCB were allocated dynamically, so
+                     * nothing needs to be freed. */
+                    configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB );
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+        #endif /* configSUPPORT_DYNAMIC_ALLOCATION */
+    }
 
 #endif /* INCLUDE_vTaskDelete */
 /*-----------------------------------------------------------*/
 
 static void prvResetNextTaskUnblockTime( void )
 {
-	if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
-	{
-		/* The new current delayed list is empty.  Set xNextTaskUnblockTime to
-		the maximum possible value so it is	extremely unlikely that the
-		if( xTickCount >= xNextTaskUnblockTime ) test will pass until
-		there is an item in the delayed list. */
-		xNextTaskUnblockTime = portMAX_DELAY;
-	}
-	else
-	{
-		/* The new current delayed list is not empty, get the value of
-		the item at the head of the delayed list.  This is the time at
-		which the task at the head of the delayed list should be removed
-		from the Blocked state. */
-		xNextTaskUnblockTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxDelayedTaskList );
-	}
+    if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
+    {
+        /* The new current delayed list is empty.  Set xNextTaskUnblockTime to
+         * the maximum possible value so it is  extremely unlikely that the
+         * if( xTickCount >= xNextTaskUnblockTime ) test will pass until
+         * there is an item in the delayed list. */
+        xNextTaskUnblockTime = portMAX_DELAY;
+    }
+    else
+    {
+        /* The new current delayed list is not empty, get the value of
+         * the item at the head of the delayed list.  This is the time at
+         * which the task at the head of the delayed list should be removed
+         * from the Blocked state. */
+        xNextTaskUnblockTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxDelayedTaskList );
+    }
 }
 /*-----------------------------------------------------------*/
 
 #if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) )
 
-	TaskHandle_t xTaskGetCurrentTaskHandle( void )
-	{
-	TaskHandle_t xReturn;
+    TaskHandle_t xTaskGetCurrentTaskHandle( void )
+    {
+        TaskHandle_t xReturn;
 
-		/* A critical section is not required as this is not called from
-		an interrupt and the current TCB will always be the same for any
-		individual execution thread. */
-		xReturn = pxCurrentTCB;
+        /* A critical section is not required as this is not called from
+         * an interrupt and the current TCB will always be the same for any
+         * individual execution thread. */
+        xReturn = pxCurrentTCB;
 
-		return xReturn;
-	}
+        return xReturn;
+    }
 
 #endif /* ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */
 /*-----------------------------------------------------------*/
 
 #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
 
-	BaseType_t xTaskGetSchedulerState( void )
-	{
-	BaseType_t xReturn;
+    BaseType_t xTaskGetSchedulerState( void )
+    {
+        BaseType_t xReturn;
 
-		if( xSchedulerRunning == pdFALSE )
-		{
-			xReturn = taskSCHEDULER_NOT_STARTED;
-		}
-		else
-		{
-			if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
-			{
-				xReturn = taskSCHEDULER_RUNNING;
-			}
-			else
-			{
-				xReturn = taskSCHEDULER_SUSPENDED;
-			}
-		}
+        if( xSchedulerRunning == pdFALSE )
+        {
+            xReturn = taskSCHEDULER_NOT_STARTED;
+        }
+        else
+        {
+            if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+            {
+                xReturn = taskSCHEDULER_RUNNING;
+            }
+            else
+            {
+                xReturn = taskSCHEDULER_SUSPENDED;
+            }
+        }
 
-		return xReturn;
-	}
+        return xReturn;
+    }
 
 #endif /* ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_MUTEXES == 1 )
 
-	BaseType_t xTaskPriorityInherit( TaskHandle_t const pxMutexHolder )
-	{
-	TCB_t * const pxMutexHolderTCB = pxMutexHolder;
-	BaseType_t xReturn = pdFALSE;
+    BaseType_t xTaskPriorityInherit( TaskHandle_t const pxMutexHolder )
+    {
+        TCB_t * const pxMutexHolderTCB = pxMutexHolder;
+        BaseType_t xReturn = pdFALSE;
 
-		/* If the mutex was given back by an interrupt while the queue was
-		locked then the mutex holder might now be NULL.  _RB_ Is this still
-		needed as interrupts can no longer use mutexes? */
-		if( pxMutexHolder != NULL )
-		{
-			/* If the holder of the mutex has a priority below the priority of
-			the task attempting to obtain the mutex then it will temporarily
-			inherit the priority of the task attempting to obtain the mutex. */
-			if( pxMutexHolderTCB->uxPriority < pxCurrentTCB->uxPriority )
-			{
-				/* Adjust the mutex holder state to account for its new
-				priority.  Only reset the event list item value if the value is
-				not being used for anything else. */
-				if( ( listGET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
-				{
-					listSET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxCurrentTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
+        /* If the mutex was given back by an interrupt while the queue was
+         * locked then the mutex holder might now be NULL.  _RB_ Is this still
+         * needed as interrupts can no longer use mutexes? */
+        if( pxMutexHolder != NULL )
+        {
+            /* If the holder of the mutex has a priority below the priority of
+             * the task attempting to obtain the mutex then it will temporarily
+             * inherit the priority of the task attempting to obtain the mutex. */
+            if( pxMutexHolderTCB->uxPriority < pxCurrentTCB->uxPriority )
+            {
+                /* Adjust the mutex holder state to account for its new
+                 * priority.  Only reset the event list item value if the value is
+                 * not being used for anything else. */
+                if( ( listGET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
+                {
+                    listSET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxCurrentTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
 
-				/* If the task being modified is in the ready state it will need
-				to be moved into a new list. */
-				if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ pxMutexHolderTCB->uxPriority ] ), &( pxMutexHolderTCB->xStateListItem ) ) != pdFALSE )
-				{
-					if( uxListRemove( &( pxMutexHolderTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
-					{
-						/* It is known that the task is in its ready list so
-						there is no need to check again and the port level
-						reset macro can be called directly. */
-						portRESET_READY_PRIORITY( pxMutexHolderTCB->uxPriority, uxTopReadyPriority );
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
+                /* If the task being modified is in the ready state it will need
+                 * to be moved into a new list. */
+                if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ pxMutexHolderTCB->uxPriority ] ), &( pxMutexHolderTCB->xStateListItem ) ) != pdFALSE )
+                {
+                    if( uxListRemove( &( pxMutexHolderTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
+                    {
+                        /* It is known that the task is in its ready list so
+                         * there is no need to check again and the port level
+                         * reset macro can be called directly. */
+                        portRESET_READY_PRIORITY( pxMutexHolderTCB->uxPriority, uxTopReadyPriority );
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
 
-					/* Inherit the priority before being moved into the new list. */
-					pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
-					prvAddTaskToReadyList( pxMutexHolderTCB );
-				}
-				else
-				{
-					/* Just inherit the priority. */
-					pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
-				}
+                    /* Inherit the priority before being moved into the new list. */
+                    pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
+                    prvAddTaskToReadyList( pxMutexHolderTCB );
+                }
+                else
+                {
+                    /* Just inherit the priority. */
+                    pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
+                }
 
-				traceTASK_PRIORITY_INHERIT( pxMutexHolderTCB, pxCurrentTCB->uxPriority );
+                traceTASK_PRIORITY_INHERIT( pxMutexHolderTCB, pxCurrentTCB->uxPriority );
 
-				/* Inheritance occurred. */
-				xReturn = pdTRUE;
-			}
-			else
-			{
-				if( pxMutexHolderTCB->uxBasePriority < pxCurrentTCB->uxPriority )
-				{
-					/* The base priority of the mutex holder is lower than the
-					priority of the task attempting to take the mutex, but the
-					current priority of the mutex holder is not lower than the
-					priority of the task attempting to take the mutex.
-					Therefore the mutex holder must have already inherited a
-					priority, but inheritance would have occurred if that had
-					not been the case. */
-					xReturn = pdTRUE;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
+                /* Inheritance occurred. */
+                xReturn = pdTRUE;
+            }
+            else
+            {
+                if( pxMutexHolderTCB->uxBasePriority < pxCurrentTCB->uxPriority )
+                {
+                    /* The base priority of the mutex holder is lower than the
+                     * priority of the task attempting to take the mutex, but the
+                     * current priority of the mutex holder is not lower than the
+                     * priority of the task attempting to take the mutex.
+                     * Therefore the mutex holder must have already inherited a
+                     * priority, but inheritance would have occurred if that had
+                     * not been the case. */
+                    xReturn = pdTRUE;
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
 
-		return xReturn;
-	}
+        return xReturn;
+    }
 
 #endif /* configUSE_MUTEXES */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_MUTEXES == 1 )
 
-	BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder )
-	{
-	TCB_t * const pxTCB = pxMutexHolder;
-	BaseType_t xReturn = pdFALSE;
+    BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder )
+    {
+        TCB_t * const pxTCB = pxMutexHolder;
+        BaseType_t xReturn = pdFALSE;
 
-		if( pxMutexHolder != NULL )
-		{
-			/* A task can only have an inherited priority if it holds the mutex.
-			If the mutex is held by a task then it cannot be given from an
-			interrupt, and if a mutex is given by the holding task then it must
-			be the running state task. */
-			configASSERT( pxTCB == pxCurrentTCB );
-			configASSERT( pxTCB->uxMutexesHeld );
-			( pxTCB->uxMutexesHeld )--;
+        if( pxMutexHolder != NULL )
+        {
+            /* A task can only have an inherited priority if it holds the mutex.
+             * If the mutex is held by a task then it cannot be given from an
+             * interrupt, and if a mutex is given by the holding task then it must
+             * be the running state task. */
+            configASSERT( pxTCB == pxCurrentTCB );
+            configASSERT( pxTCB->uxMutexesHeld );
+            ( pxTCB->uxMutexesHeld )--;
 
-			/* Has the holder of the mutex inherited the priority of another
-			task? */
-			if( pxTCB->uxPriority != pxTCB->uxBasePriority )
-			{
-				/* Only disinherit if no other mutexes are held. */
-				if( pxTCB->uxMutexesHeld == ( UBaseType_t ) 0 )
-				{
-					/* A task can only have an inherited priority if it holds
-					the mutex.  If the mutex is held by a task then it cannot be
-					given from an interrupt, and if a mutex is given by the
-					holding task then it must be the running state task.  Remove
-					the holding task from the ready list. */
-					if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
-					{
-						portRESET_READY_PRIORITY( pxTCB->uxPriority, uxTopReadyPriority );
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
+            /* Has the holder of the mutex inherited the priority of another
+             * task? */
+            if( pxTCB->uxPriority != pxTCB->uxBasePriority )
+            {
+                /* Only disinherit if no other mutexes are held. */
+                if( pxTCB->uxMutexesHeld == ( UBaseType_t ) 0 )
+                {
+                    /* A task can only have an inherited priority if it holds
+                     * the mutex.  If the mutex is held by a task then it cannot be
+                     * given from an interrupt, and if a mutex is given by the
+                     * holding task then it must be the running state task.  Remove
+                     * the holding task from the ready list. */
+                    if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
+                    {
+                        portRESET_READY_PRIORITY( pxTCB->uxPriority, uxTopReadyPriority );
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
 
-					/* Disinherit the priority before adding the task into the
-					new	ready list. */
-					traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
-					pxTCB->uxPriority = pxTCB->uxBasePriority;
+                    /* Disinherit the priority before adding the task into the
+                     * new  ready list. */
+                    traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
+                    pxTCB->uxPriority = pxTCB->uxBasePriority;
 
-					/* Reset the event list item value.  It cannot be in use for
-					any other purpose if this task is running, and it must be
-					running to give back the mutex. */
-					listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-					prvAddTaskToReadyList( pxTCB );
+                    /* Reset the event list item value.  It cannot be in use for
+                     * any other purpose if this task is running, and it must be
+                     * running to give back the mutex. */
+                    listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+                    prvAddTaskToReadyList( pxTCB );
 
-					/* Return true to indicate that a context switch is required.
-					This is only actually required in the corner case whereby
-					multiple mutexes were held and the mutexes were given back
-					in an order different to that in which they were taken.
-					If a context switch did not occur when the first mutex was
-					returned, even if a task was waiting on it, then a context
-					switch should occur when the last mutex is returned whether
-					a task is waiting on it or not. */
-					xReturn = pdTRUE;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
+                    /* Return true to indicate that a context switch is required.
+                     * This is only actually required in the corner case whereby
+                     * multiple mutexes were held and the mutexes were given back
+                     * in an order different to that in which they were taken.
+                     * If a context switch did not occur when the first mutex was
+                     * returned, even if a task was waiting on it, then a context
+                     * switch should occur when the last mutex is returned whether
+                     * a task is waiting on it or not. */
+                    xReturn = pdTRUE;
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
 
-		return xReturn;
-	}
+        return xReturn;
+    }
 
 #endif /* configUSE_MUTEXES */
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_MUTEXES == 1 )
 
-	void vTaskPriorityDisinheritAfterTimeout( TaskHandle_t const pxMutexHolder, UBaseType_t uxHighestPriorityWaitingTask )
-	{
-	TCB_t * const pxTCB = pxMutexHolder;
-	UBaseType_t uxPriorityUsedOnEntry, uxPriorityToUse;
-	const UBaseType_t uxOnlyOneMutexHeld = ( UBaseType_t ) 1;
+    void vTaskPriorityDisinheritAfterTimeout( TaskHandle_t const pxMutexHolder,
+                                              UBaseType_t uxHighestPriorityWaitingTask )
+    {
+        TCB_t * const pxTCB = pxMutexHolder;
+        UBaseType_t uxPriorityUsedOnEntry, uxPriorityToUse;
+        const UBaseType_t uxOnlyOneMutexHeld = ( UBaseType_t ) 1;
 
-		if( pxMutexHolder != NULL )
-		{
-			/* If pxMutexHolder is not NULL then the holder must hold at least
-			one mutex. */
-			configASSERT( pxTCB->uxMutexesHeld );
+        if( pxMutexHolder != NULL )
+        {
+            /* If pxMutexHolder is not NULL then the holder must hold at least
+             * one mutex. */
+            configASSERT( pxTCB->uxMutexesHeld );
 
-			/* Determine the priority to which the priority of the task that
-			holds the mutex should be set.  This will be the greater of the
-			holding task's base priority and the priority of the highest
-			priority task that is waiting to obtain the mutex. */
-			if( pxTCB->uxBasePriority < uxHighestPriorityWaitingTask )
-			{
-				uxPriorityToUse = uxHighestPriorityWaitingTask;
-			}
-			else
-			{
-				uxPriorityToUse = pxTCB->uxBasePriority;
-			}
+            /* Determine the priority to which the priority of the task that
+             * holds the mutex should be set.  This will be the greater of the
+             * holding task's base priority and the priority of the highest
+             * priority task that is waiting to obtain the mutex. */
+            if( pxTCB->uxBasePriority < uxHighestPriorityWaitingTask )
+            {
+                uxPriorityToUse = uxHighestPriorityWaitingTask;
+            }
+            else
+            {
+                uxPriorityToUse = pxTCB->uxBasePriority;
+            }
 
-			/* Does the priority need to change? */
-			if( pxTCB->uxPriority != uxPriorityToUse )
-			{
-				/* Only disinherit if no other mutexes are held.  This is a
-				simplification in the priority inheritance implementation.  If
-				the task that holds the mutex is also holding other mutexes then
-				the other mutexes may have caused the priority inheritance. */
-				if( pxTCB->uxMutexesHeld == uxOnlyOneMutexHeld )
-				{
-					/* If a task has timed out because it already holds the
-					mutex it was trying to obtain then it cannot of inherited
-					its own priority. */
-					configASSERT( pxTCB != pxCurrentTCB );
+            /* Does the priority need to change? */
+            if( pxTCB->uxPriority != uxPriorityToUse )
+            {
+                /* Only disinherit if no other mutexes are held.  This is a
+                 * simplification in the priority inheritance implementation.  If
+                 * the task that holds the mutex is also holding other mutexes then
+                 * the other mutexes may have caused the priority inheritance. */
+                if( pxTCB->uxMutexesHeld == uxOnlyOneMutexHeld )
+                {
+                    /* If a task has timed out because it already holds the
+                     * mutex it was trying to obtain then it cannot of inherited
+                     * its own priority. */
+                    configASSERT( pxTCB != pxCurrentTCB );
 
-					/* Disinherit the priority, remembering the previous
-					priority to facilitate determining the subject task's
-					state. */
-					traceTASK_PRIORITY_DISINHERIT( pxTCB, uxPriorityToUse );
-					uxPriorityUsedOnEntry = pxTCB->uxPriority;
-					pxTCB->uxPriority = uxPriorityToUse;
+                    /* Disinherit the priority, remembering the previous
+                     * priority to facilitate determining the subject task's
+                     * state. */
+                    traceTASK_PRIORITY_DISINHERIT( pxTCB, uxPriorityToUse );
+                    uxPriorityUsedOnEntry = pxTCB->uxPriority;
+                    pxTCB->uxPriority = uxPriorityToUse;
 
-					/* Only reset the event list item value if the value is not
-					being used for anything else. */
-					if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
-					{
-						listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriorityToUse ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
+                    /* Only reset the event list item value if the value is not
+                     * being used for anything else. */
+                    if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
+                    {
+                        listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriorityToUse ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
 
-					/* If the running task is not the task that holds the mutex
-					then the task that holds the mutex could be in either the
-					Ready, Blocked or Suspended states.  Only remove the task
-					from its current state list if it is in the Ready state as
-					the task's priority is going to change and there is one
-					Ready list per priority. */
-					if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxPriorityUsedOnEntry ] ), &( pxTCB->xStateListItem ) ) != pdFALSE )
-					{
-						if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
-						{
-							/* It is known that the task is in its ready list so
-							there is no need to check again and the port level
-							reset macro can be called directly. */
-							portRESET_READY_PRIORITY( pxTCB->uxPriority, uxTopReadyPriority );
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
+                    /* If the running task is not the task that holds the mutex
+                     * then the task that holds the mutex could be in either the
+                     * Ready, Blocked or Suspended states.  Only remove the task
+                     * from its current state list if it is in the Ready state as
+                     * the task's priority is going to change and there is one
+                     * Ready list per priority. */
+                    if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxPriorityUsedOnEntry ] ), &( pxTCB->xStateListItem ) ) != pdFALSE )
+                    {
+                        if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
+                        {
+                            /* It is known that the task is in its ready list so
+                             * there is no need to check again and the port level
+                             * reset macro can be called directly. */
+                            portRESET_READY_PRIORITY( pxTCB->uxPriority, uxTopReadyPriority );
+                        }
+                        else
+                        {
+                            mtCOVERAGE_TEST_MARKER();
+                        }
 
-						prvAddTaskToReadyList( pxTCB );
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
+                        prvAddTaskToReadyList( pxTCB );
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
 
 #endif /* configUSE_MUTEXES */
 /*-----------------------------------------------------------*/
 
 #if ( portCRITICAL_NESTING_IN_TCB == 1 )
 
-	void vTaskEnterCritical( void )
-	{
-		portDISABLE_INTERRUPTS();
+    void vTaskEnterCritical( void )
+    {
+        portDISABLE_INTERRUPTS();
 
-		if( xSchedulerRunning != pdFALSE )
-		{
-			( pxCurrentTCB->uxCriticalNesting )++;
+        if( xSchedulerRunning != pdFALSE )
+        {
+            ( pxCurrentTCB->uxCriticalNesting )++;
 
-			/* This is not the interrupt safe version of the enter critical
-			function so	assert() if it is being called from an interrupt
-			context.  Only API functions that end in "FromISR" can be used in an
-			interrupt.  Only assert if the critical nesting count is 1 to
-			protect against recursive calls if the assert function also uses a
-			critical section. */
-			if( pxCurrentTCB->uxCriticalNesting == 1 )
-			{
-				portASSERT_IF_IN_ISR();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
+            /* This is not the interrupt safe version of the enter critical
+             * function so  assert() if it is being called from an interrupt
+             * context.  Only API functions that end in "FromISR" can be used in an
+             * interrupt.  Only assert if the critical nesting count is 1 to
+             * protect against recursive calls if the assert function also uses a
+             * critical section. */
+            if( pxCurrentTCB->uxCriticalNesting == 1 )
+            {
+                portASSERT_IF_IN_ISR();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
 
 #endif /* portCRITICAL_NESTING_IN_TCB */
 /*-----------------------------------------------------------*/
 
 #if ( portCRITICAL_NESTING_IN_TCB == 1 )
 
-	void vTaskExitCritical( void )
-	{
-		if( xSchedulerRunning != pdFALSE )
-		{
-			if( pxCurrentTCB->uxCriticalNesting > 0U )
-			{
-				( pxCurrentTCB->uxCriticalNesting )--;
+    void vTaskExitCritical( void )
+    {
+        if( xSchedulerRunning != pdFALSE )
+        {
+            if( pxCurrentTCB->uxCriticalNesting > 0U )
+            {
+                ( pxCurrentTCB->uxCriticalNesting )--;
 
-				if( pxCurrentTCB->uxCriticalNesting == 0U )
-				{
-					portENABLE_INTERRUPTS();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
+                if( pxCurrentTCB->uxCriticalNesting == 0U )
+                {
+                    portENABLE_INTERRUPTS();
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
 
 #endif /* portCRITICAL_NESTING_IN_TCB */
 /*-----------------------------------------------------------*/
 
 #if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) )
 
-	static char *prvWriteNameToBuffer( char *pcBuffer, const char *pcTaskName )
-	{
-	size_t x;
+    static char * prvWriteNameToBuffer( char * pcBuffer,
+                                        const char * pcTaskName )
+    {
+        size_t x;
 
-		/* Start by copying the entire string. */
-		strcpy( pcBuffer, pcTaskName );
+        /* Start by copying the entire string. */
+        strcpy( pcBuffer, pcTaskName );
 
-		/* Pad the end of the string with spaces to ensure columns line up when
-		printed out. */
-		for( x = strlen( pcBuffer ); x < ( size_t ) ( configMAX_TASK_NAME_LEN - 1 ); x++ )
-		{
-			pcBuffer[ x ] = ' ';
-		}
+        /* Pad the end of the string with spaces to ensure columns line up when
+         * printed out. */
+        for( x = strlen( pcBuffer ); x < ( size_t ) ( configMAX_TASK_NAME_LEN - 1 ); x++ )
+        {
+            pcBuffer[ x ] = ' ';
+        }
 
-		/* Terminate. */
-		pcBuffer[ x ] = ( char ) 0x00;
+        /* Terminate. */
+        pcBuffer[ x ] = ( char ) 0x00;
 
-		/* Return the new end of string. */
-		return &( pcBuffer[ x ] );
-	}
+        /* Return the new end of string. */
+        return &( pcBuffer[ x ] );
+    }
 
 #endif /* ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) */
 /*-----------------------------------------------------------*/
 
 #if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
 
-	void vTaskList( char * pcWriteBuffer )
-	{
-	TaskStatus_t *pxTaskStatusArray;
-	UBaseType_t uxArraySize, x;
-	char cStatus;
+    void vTaskList( char * pcWriteBuffer )
+    {
+        TaskStatus_t * pxTaskStatusArray;
+        UBaseType_t uxArraySize, x;
+        char cStatus;
 
-		/*
-		 * PLEASE NOTE:
-		 *
-		 * This function is provided for convenience only, and is used by many
-		 * of the demo applications.  Do not consider it to be part of the
-		 * scheduler.
-		 *
-		 * vTaskList() calls uxTaskGetSystemState(), then formats part of the
-		 * uxTaskGetSystemState() output into a human readable table that
-		 * displays task names, states and stack usage.
-		 *
-		 * vTaskList() has a dependency on the sprintf() C library function that
-		 * might bloat the code size, use a lot of stack, and provide different
-		 * results on different platforms.  An alternative, tiny, third party,
-		 * and limited functionality implementation of sprintf() is provided in
-		 * many of the FreeRTOS/Demo sub-directories in a file called
-		 * printf-stdarg.c (note printf-stdarg.c does not provide a full
-		 * snprintf() implementation!).
-		 *
-		 * It is recommended that production systems call uxTaskGetSystemState()
-		 * directly to get access to raw stats data, rather than indirectly
-		 * through a call to vTaskList().
-		 */
+        /*
+         * PLEASE NOTE:
+         *
+         * This function is provided for convenience only, and is used by many
+         * of the demo applications.  Do not consider it to be part of the
+         * scheduler.
+         *
+         * vTaskList() calls uxTaskGetSystemState(), then formats part of the
+         * uxTaskGetSystemState() output into a human readable table that
+         * displays task names, states and stack usage.
+         *
+         * vTaskList() has a dependency on the sprintf() C library function that
+         * might bloat the code size, use a lot of stack, and provide different
+         * results on different platforms.  An alternative, tiny, third party,
+         * and limited functionality implementation of sprintf() is provided in
+         * many of the FreeRTOS/Demo sub-directories in a file called
+         * printf-stdarg.c (note printf-stdarg.c does not provide a full
+         * snprintf() implementation!).
+         *
+         * It is recommended that production systems call uxTaskGetSystemState()
+         * directly to get access to raw stats data, rather than indirectly
+         * through a call to vTaskList().
+         */
 
 
-		/* Make sure the write buffer does not contain a string. */
-		*pcWriteBuffer = ( char ) 0x00;
+        /* Make sure the write buffer does not contain a string. */
+        *pcWriteBuffer = ( char ) 0x00;
 
-		/* Take a snapshot of the number of tasks in case it changes while this
-		function is executing. */
-		uxArraySize = uxCurrentNumberOfTasks;
+        /* Take a snapshot of the number of tasks in case it changes while this
+         * function is executing. */
+        uxArraySize = uxCurrentNumberOfTasks;
 
-		/* Allocate an array index for each task.  NOTE!  if
-		configSUPPORT_DYNAMIC_ALLOCATION is set to 0 then pvPortMalloc() will
-		equate to NULL. */
-		pxTaskStatusArray = pvPortMalloc( uxCurrentNumberOfTasks * sizeof( TaskStatus_t ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation allocates a struct that has the alignment requirements of a pointer. */
+        /* Allocate an array index for each task.  NOTE!  if
+         * configSUPPORT_DYNAMIC_ALLOCATION is set to 0 then pvPortMalloc() will
+         * equate to NULL. */
+        pxTaskStatusArray = pvPortMalloc( uxCurrentNumberOfTasks * sizeof( TaskStatus_t ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation allocates a struct that has the alignment requirements of a pointer. */
 
-		if( pxTaskStatusArray != NULL )
-		{
-			/* Generate the (binary) data. */
-			uxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, NULL );
+        if( pxTaskStatusArray != NULL )
+        {
+            /* Generate the (binary) data. */
+            uxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, NULL );
 
-			/* Create a human readable table from the binary data. */
-			for( x = 0; x < uxArraySize; x++ )
-			{
-				switch( pxTaskStatusArray[ x ].eCurrentState )
-				{
-					case eRunning:		cStatus = tskRUNNING_CHAR;
-										break;
+            /* Create a human readable table from the binary data. */
+            for( x = 0; x < uxArraySize; x++ )
+            {
+                switch( pxTaskStatusArray[ x ].eCurrentState )
+                {
+                    case eRunning:
+                        cStatus = tskRUNNING_CHAR;
+                        break;
 
-					case eReady:		cStatus = tskREADY_CHAR;
-										break;
+                    case eReady:
+                        cStatus = tskREADY_CHAR;
+                        break;
 
-					case eBlocked:		cStatus = tskBLOCKED_CHAR;
-										break;
+                    case eBlocked:
+                        cStatus = tskBLOCKED_CHAR;
+                        break;
 
-					case eSuspended:	cStatus = tskSUSPENDED_CHAR;
-										break;
+                    case eSuspended:
+                        cStatus = tskSUSPENDED_CHAR;
+                        break;
 
-					case eDeleted:		cStatus = tskDELETED_CHAR;
-										break;
+                    case eDeleted:
+                        cStatus = tskDELETED_CHAR;
+                        break;
 
-					case eInvalid:		/* Fall through. */
-					default:			/* Should not get here, but it is included
-										to prevent static checking errors. */
-										cStatus = ( char ) 0x00;
-										break;
-				}
+                    case eInvalid: /* Fall through. */
+                    default:       /* Should not get here, but it is included
+                                    * to prevent static checking errors. */
+                        cStatus = ( char ) 0x00;
+                        break;
+                }
 
-				/* Write the task name to the string, padding with spaces so it
-				can be printed in tabular form more easily. */
-				pcWriteBuffer = prvWriteNameToBuffer( pcWriteBuffer, pxTaskStatusArray[ x ].pcTaskName );
+                /* Write the task name to the string, padding with spaces so it
+                 * can be printed in tabular form more easily. */
+                pcWriteBuffer = prvWriteNameToBuffer( pcWriteBuffer, pxTaskStatusArray[ x ].pcTaskName );
 
-				/* Write the rest of the string. */
-				sprintf( pcWriteBuffer, "\t%c\t%u\t%u\t%u\r\n", cStatus, ( unsigned int ) pxTaskStatusArray[ x ].uxCurrentPriority, ( unsigned int ) pxTaskStatusArray[ x ].usStackHighWaterMark, ( unsigned int ) pxTaskStatusArray[ x ].xTaskNumber ); /*lint !e586 sprintf() allowed as this is compiled with many compilers and this is a utility function only - not part of the core kernel implementation. */
-				pcWriteBuffer += strlen( pcWriteBuffer ); /*lint !e9016 Pointer arithmetic ok on char pointers especially as in this case where it best denotes the intent of the code. */
-			}
+                /* Write the rest of the string. */
+                sprintf( pcWriteBuffer, "\t%c\t%u\t%u\t%u\r\n", cStatus, ( unsigned int ) pxTaskStatusArray[ x ].uxCurrentPriority, ( unsigned int ) pxTaskStatusArray[ x ].usStackHighWaterMark, ( unsigned int ) pxTaskStatusArray[ x ].xTaskNumber ); /*lint !e586 sprintf() allowed as this is compiled with many compilers and this is a utility function only - not part of the core kernel implementation. */
+                pcWriteBuffer += strlen( pcWriteBuffer );                                                                                                                                                                                                /*lint !e9016 Pointer arithmetic ok on char pointers especially as in this case where it best denotes the intent of the code. */
+            }
 
-			/* Free the array again.  NOTE!  If configSUPPORT_DYNAMIC_ALLOCATION
-			is 0 then vPortFree() will be #defined to nothing. */
-			vPortFree( pxTaskStatusArray );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
+            /* Free the array again.  NOTE!  If configSUPPORT_DYNAMIC_ALLOCATION
+             * is 0 then vPortFree() will be #defined to nothing. */
+            vPortFree( pxTaskStatusArray );
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
 
 #endif /* ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */
 /*----------------------------------------------------------*/
 
 #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
 
-	void vTaskGetRunTimeStats( char *pcWriteBuffer )
-	{
-	TaskStatus_t *pxTaskStatusArray;
-	UBaseType_t uxArraySize, x;
-	uint32_t ulTotalTime, ulStatsAsPercentage;
+    void vTaskGetRunTimeStats( char * pcWriteBuffer )
+    {
+        TaskStatus_t * pxTaskStatusArray;
+        UBaseType_t uxArraySize, x;
+        uint32_t ulTotalTime, ulStatsAsPercentage;
 
-		#if( configUSE_TRACE_FACILITY != 1 )
-		{
-			#error configUSE_TRACE_FACILITY must also be set to 1 in FreeRTOSConfig.h to use vTaskGetRunTimeStats().
-		}
-		#endif
+        #if ( configUSE_TRACE_FACILITY != 1 )
+            {
+                #error configUSE_TRACE_FACILITY must also be set to 1 in FreeRTOSConfig.h to use vTaskGetRunTimeStats().
+            }
+        #endif
 
-		/*
-		 * PLEASE NOTE:
-		 *
-		 * This function is provided for convenience only, and is used by many
-		 * of the demo applications.  Do not consider it to be part of the
-		 * scheduler.
-		 *
-		 * vTaskGetRunTimeStats() calls uxTaskGetSystemState(), then formats part
-		 * of the uxTaskGetSystemState() output into a human readable table that
-		 * displays the amount of time each task has spent in the Running state
-		 * in both absolute and percentage terms.
-		 *
-		 * vTaskGetRunTimeStats() has a dependency on the sprintf() C library
-		 * function that might bloat the code size, use a lot of stack, and
-		 * provide different results on different platforms.  An alternative,
-		 * tiny, third party, and limited functionality implementation of
-		 * sprintf() is provided in many of the FreeRTOS/Demo sub-directories in
-		 * a file called printf-stdarg.c (note printf-stdarg.c does not provide
-		 * a full snprintf() implementation!).
-		 *
-		 * It is recommended that production systems call uxTaskGetSystemState()
-		 * directly to get access to raw stats data, rather than indirectly
-		 * through a call to vTaskGetRunTimeStats().
-		 */
+        /*
+         * PLEASE NOTE:
+         *
+         * This function is provided for convenience only, and is used by many
+         * of the demo applications.  Do not consider it to be part of the
+         * scheduler.
+         *
+         * vTaskGetRunTimeStats() calls uxTaskGetSystemState(), then formats part
+         * of the uxTaskGetSystemState() output into a human readable table that
+         * displays the amount of time each task has spent in the Running state
+         * in both absolute and percentage terms.
+         *
+         * vTaskGetRunTimeStats() has a dependency on the sprintf() C library
+         * function that might bloat the code size, use a lot of stack, and
+         * provide different results on different platforms.  An alternative,
+         * tiny, third party, and limited functionality implementation of
+         * sprintf() is provided in many of the FreeRTOS/Demo sub-directories in
+         * a file called printf-stdarg.c (note printf-stdarg.c does not provide
+         * a full snprintf() implementation!).
+         *
+         * It is recommended that production systems call uxTaskGetSystemState()
+         * directly to get access to raw stats data, rather than indirectly
+         * through a call to vTaskGetRunTimeStats().
+         */
 
-		/* Make sure the write buffer does not contain a string. */
-		*pcWriteBuffer = ( char ) 0x00;
+        /* Make sure the write buffer does not contain a string. */
+        *pcWriteBuffer = ( char ) 0x00;
 
-		/* Take a snapshot of the number of tasks in case it changes while this
-		function is executing. */
-		uxArraySize = uxCurrentNumberOfTasks;
+        /* Take a snapshot of the number of tasks in case it changes while this
+         * function is executing. */
+        uxArraySize = uxCurrentNumberOfTasks;
 
-		/* Allocate an array index for each task.  NOTE!  If
-		configSUPPORT_DYNAMIC_ALLOCATION is set to 0 then pvPortMalloc() will
-		equate to NULL. */
-		pxTaskStatusArray = pvPortMalloc( uxCurrentNumberOfTasks * sizeof( TaskStatus_t ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation allocates a struct that has the alignment requirements of a pointer. */
+        /* Allocate an array index for each task.  NOTE!  If
+         * configSUPPORT_DYNAMIC_ALLOCATION is set to 0 then pvPortMalloc() will
+         * equate to NULL. */
+        pxTaskStatusArray = pvPortMalloc( uxCurrentNumberOfTasks * sizeof( TaskStatus_t ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation allocates a struct that has the alignment requirements of a pointer. */
 
-		if( pxTaskStatusArray != NULL )
-		{
-			/* Generate the (binary) data. */
-			uxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, &ulTotalTime );
+        if( pxTaskStatusArray != NULL )
+        {
+            /* Generate the (binary) data. */
+            uxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, &ulTotalTime );
 
-			/* For percentage calculations. */
-			ulTotalTime /= 100UL;
+            /* For percentage calculations. */
+            ulTotalTime /= 100UL;
 
-			/* Avoid divide by zero errors. */
-			if( ulTotalTime > 0UL )
-			{
-				/* Create a human readable table from the binary data. */
-				for( x = 0; x < uxArraySize; x++ )
-				{
-					/* What percentage of the total run time has the task used?
-					This will always be rounded down to the nearest integer.
-					ulTotalRunTimeDiv100 has already been divided by 100. */
-					ulStatsAsPercentage = pxTaskStatusArray[ x ].ulRunTimeCounter / ulTotalTime;
+            /* Avoid divide by zero errors. */
+            if( ulTotalTime > 0UL )
+            {
+                /* Create a human readable table from the binary data. */
+                for( x = 0; x < uxArraySize; x++ )
+                {
+                    /* What percentage of the total run time has the task used?
+                     * This will always be rounded down to the nearest integer.
+                     * ulTotalRunTimeDiv100 has already been divided by 100. */
+                    ulStatsAsPercentage = pxTaskStatusArray[ x ].ulRunTimeCounter / ulTotalTime;
 
-					/* Write the task name to the string, padding with
-					spaces so it can be printed in tabular form more
-					easily. */
-					pcWriteBuffer = prvWriteNameToBuffer( pcWriteBuffer, pxTaskStatusArray[ x ].pcTaskName );
+                    /* Write the task name to the string, padding with
+                     * spaces so it can be printed in tabular form more
+                     * easily. */
+                    pcWriteBuffer = prvWriteNameToBuffer( pcWriteBuffer, pxTaskStatusArray[ x ].pcTaskName );
 
-					if( ulStatsAsPercentage > 0UL )
-					{
-						#ifdef portLU_PRINTF_SPECIFIER_REQUIRED
-						{
-							sprintf( pcWriteBuffer, "\t%lu\t\t%lu%%\r\n", pxTaskStatusArray[ x ].ulRunTimeCounter, ulStatsAsPercentage );
-						}
-						#else
-						{
-							/* sizeof( int ) == sizeof( long ) so a smaller
-							printf() library can be used. */
-							sprintf( pcWriteBuffer, "\t%u\t\t%u%%\r\n", ( unsigned int ) pxTaskStatusArray[ x ].ulRunTimeCounter, ( unsigned int ) ulStatsAsPercentage ); /*lint !e586 sprintf() allowed as this is compiled with many compilers and this is a utility function only - not part of the core kernel implementation. */
-						}
-						#endif
-					}
-					else
-					{
-						/* If the percentage is zero here then the task has
-						consumed less than 1% of the total run time. */
-						#ifdef portLU_PRINTF_SPECIFIER_REQUIRED
-						{
-							sprintf( pcWriteBuffer, "\t%lu\t\t<1%%\r\n", pxTaskStatusArray[ x ].ulRunTimeCounter );
-						}
-						#else
-						{
-							/* sizeof( int ) == sizeof( long ) so a smaller
-							printf() library can be used. */
-							sprintf( pcWriteBuffer, "\t%u\t\t<1%%\r\n", ( unsigned int ) pxTaskStatusArray[ x ].ulRunTimeCounter ); /*lint !e586 sprintf() allowed as this is compiled with many compilers and this is a utility function only - not part of the core kernel implementation. */
-						}
-						#endif
-					}
+                    if( ulStatsAsPercentage > 0UL )
+                    {
+                        #ifdef portLU_PRINTF_SPECIFIER_REQUIRED
+                            {
+                                sprintf( pcWriteBuffer, "\t%lu\t\t%lu%%\r\n", pxTaskStatusArray[ x ].ulRunTimeCounter, ulStatsAsPercentage );
+                            }
+                        #else
+                            {
+                                /* sizeof( int ) == sizeof( long ) so a smaller
+                                 * printf() library can be used. */
+                                sprintf( pcWriteBuffer, "\t%u\t\t%u%%\r\n", ( unsigned int ) pxTaskStatusArray[ x ].ulRunTimeCounter, ( unsigned int ) ulStatsAsPercentage ); /*lint !e586 sprintf() allowed as this is compiled with many compilers and this is a utility function only - not part of the core kernel implementation. */
+                            }
+                        #endif
+                    }
+                    else
+                    {
+                        /* If the percentage is zero here then the task has
+                         * consumed less than 1% of the total run time. */
+                        #ifdef portLU_PRINTF_SPECIFIER_REQUIRED
+                            {
+                                sprintf( pcWriteBuffer, "\t%lu\t\t<1%%\r\n", pxTaskStatusArray[ x ].ulRunTimeCounter );
+                            }
+                        #else
+                            {
+                                /* sizeof( int ) == sizeof( long ) so a smaller
+                                 * printf() library can be used. */
+                                sprintf( pcWriteBuffer, "\t%u\t\t<1%%\r\n", ( unsigned int ) pxTaskStatusArray[ x ].ulRunTimeCounter ); /*lint !e586 sprintf() allowed as this is compiled with many compilers and this is a utility function only - not part of the core kernel implementation. */
+                            }
+                        #endif
+                    }
 
-					pcWriteBuffer += strlen( pcWriteBuffer ); /*lint !e9016 Pointer arithmetic ok on char pointers especially as in this case where it best denotes the intent of the code. */
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
+                    pcWriteBuffer += strlen( pcWriteBuffer ); /*lint !e9016 Pointer arithmetic ok on char pointers especially as in this case where it best denotes the intent of the code. */
+                }
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
 
-			/* Free the array again.  NOTE!  If configSUPPORT_DYNAMIC_ALLOCATION
-			is 0 then vPortFree() will be #defined to nothing. */
-			vPortFree( pxTaskStatusArray );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
+            /* Free the array again.  NOTE!  If configSUPPORT_DYNAMIC_ALLOCATION
+             * is 0 then vPortFree() will be #defined to nothing. */
+            vPortFree( pxTaskStatusArray );
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
 
 #endif /* ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) */
 /*-----------------------------------------------------------*/
 
 TickType_t uxTaskResetEventItemValue( void )
 {
-TickType_t uxReturn;
+    TickType_t uxReturn;
 
-	uxReturn = listGET_LIST_ITEM_VALUE( &( pxCurrentTCB->xEventListItem ) );
+    uxReturn = listGET_LIST_ITEM_VALUE( &( pxCurrentTCB->xEventListItem ) );
 
-	/* Reset the event list item to its normal value - so it can be used with
-	queues and semaphores. */
-	listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xEventListItem ), ( ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxCurrentTCB->uxPriority ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+    /* Reset the event list item to its normal value - so it can be used with
+     * queues and semaphores. */
+    listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xEventListItem ), ( ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxCurrentTCB->uxPriority ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 
-	return uxReturn;
+    return uxReturn;
 }
 /*-----------------------------------------------------------*/
 
 #if ( configUSE_MUTEXES == 1 )
 
-	TaskHandle_t pvTaskIncrementMutexHeldCount( void )
-	{
-		/* If xSemaphoreCreateMutex() is called before any tasks have been created
-		then pxCurrentTCB will be NULL. */
-		if( pxCurrentTCB != NULL )
-		{
-			( pxCurrentTCB->uxMutexesHeld )++;
-		}
+    TaskHandle_t pvTaskIncrementMutexHeldCount( void )
+    {
+        /* If xSemaphoreCreateMutex() is called before any tasks have been created
+         * then pxCurrentTCB will be NULL. */
+        if( pxCurrentTCB != NULL )
+        {
+            ( pxCurrentTCB->uxMutexesHeld )++;
+        }
 
-		return pxCurrentTCB;
-	}
+        return pxCurrentTCB;
+    }
 
 #endif /* configUSE_MUTEXES */
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TASK_NOTIFICATIONS == 1 )
+#if ( configUSE_TASK_NOTIFICATIONS == 1 )
 
-	uint32_t ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait )
-	{
-	uint32_t ulReturn;
+    uint32_t ulTaskGenericNotifyTake( UBaseType_t uxIndexToWait,
+                                      BaseType_t xClearCountOnExit,
+                                      TickType_t xTicksToWait )
+    {
+        uint32_t ulReturn;
 
-		taskENTER_CRITICAL();
-		{
-			/* Only block if the notification count is not already non-zero. */
-			if( pxCurrentTCB->ulNotifiedValue == 0UL )
-			{
-				/* Mark this task as waiting for a notification. */
-				pxCurrentTCB->ucNotifyState = taskWAITING_NOTIFICATION;
+        configASSERT( uxIndexToWait < configTASK_NOTIFICATION_ARRAY_ENTRIES );
 
-				if( xTicksToWait > ( TickType_t ) 0 )
-				{
-					prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
-					traceTASK_NOTIFY_TAKE_BLOCK();
+        taskENTER_CRITICAL();
+        {
+            /* Only block if the notification count is not already non-zero. */
+            if( pxCurrentTCB->ulNotifiedValue[ uxIndexToWait ] == 0UL )
+            {
+                /* Mark this task as waiting for a notification. */
+                pxCurrentTCB->ucNotifyState[ uxIndexToWait ] = taskWAITING_NOTIFICATION;
 
-					/* All ports are written to allow a yield in a critical
-					section (some will yield immediately, others wait until the
-					critical section exits) - but it is not something that
-					application code should ever do. */
-					portYIELD_WITHIN_API();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		taskEXIT_CRITICAL();
+                if( xTicksToWait > ( TickType_t ) 0 )
+                {
+                    prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
+                    traceTASK_NOTIFY_TAKE_BLOCK( uxIndexToWait );
 
-		taskENTER_CRITICAL();
-		{
-			traceTASK_NOTIFY_TAKE();
-			ulReturn = pxCurrentTCB->ulNotifiedValue;
+                    /* All ports are written to allow a yield in a critical
+                     * section (some will yield immediately, others wait until the
+                     * critical section exits) - but it is not something that
+                     * application code should ever do. */
+                    portYIELD_WITHIN_API();
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        taskEXIT_CRITICAL();
 
-			if( ulReturn != 0UL )
-			{
-				if( xClearCountOnExit != pdFALSE )
-				{
-					pxCurrentTCB->ulNotifiedValue = 0UL;
-				}
-				else
-				{
-					pxCurrentTCB->ulNotifiedValue = ulReturn - ( uint32_t ) 1;
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
+        taskENTER_CRITICAL();
+        {
+            traceTASK_NOTIFY_TAKE( uxIndexToWait );
+            ulReturn = pxCurrentTCB->ulNotifiedValue[ uxIndexToWait ];
 
-			pxCurrentTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
-		}
-		taskEXIT_CRITICAL();
+            if( ulReturn != 0UL )
+            {
+                if( xClearCountOnExit != pdFALSE )
+                {
+                    pxCurrentTCB->ulNotifiedValue[ uxIndexToWait ] = 0UL;
+                }
+                else
+                {
+                    pxCurrentTCB->ulNotifiedValue[ uxIndexToWait ] = ulReturn - ( uint32_t ) 1;
+                }
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
 
-		return ulReturn;
-	}
+            pxCurrentTCB->ucNotifyState[ uxIndexToWait ] = taskNOT_WAITING_NOTIFICATION;
+        }
+        taskEXIT_CRITICAL();
+
+        return ulReturn;
+    }
 
 #endif /* configUSE_TASK_NOTIFICATIONS */
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TASK_NOTIFICATIONS == 1 )
+#if ( configUSE_TASK_NOTIFICATIONS == 1 )
 
-	BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait )
-	{
-	BaseType_t xReturn;
+    BaseType_t xTaskGenericNotifyWait( UBaseType_t uxIndexToWait,
+                                       uint32_t ulBitsToClearOnEntry,
+                                       uint32_t ulBitsToClearOnExit,
+                                       uint32_t * pulNotificationValue,
+                                       TickType_t xTicksToWait )
+    {
+        BaseType_t xReturn;
 
-		taskENTER_CRITICAL();
-		{
-			/* Only block if a notification is not already pending. */
-			if( pxCurrentTCB->ucNotifyState != taskNOTIFICATION_RECEIVED )
-			{
-				/* Clear bits in the task's notification value as bits may get
-				set	by the notifying task or interrupt.  This can be used to
-				clear the value to zero. */
-				pxCurrentTCB->ulNotifiedValue &= ~ulBitsToClearOnEntry;
+        configASSERT( uxIndexToWait < configTASK_NOTIFICATION_ARRAY_ENTRIES );
 
-				/* Mark this task as waiting for a notification. */
-				pxCurrentTCB->ucNotifyState = taskWAITING_NOTIFICATION;
+        taskENTER_CRITICAL();
+        {
+            /* Only block if a notification is not already pending. */
+            if( pxCurrentTCB->ucNotifyState[ uxIndexToWait ] != taskNOTIFICATION_RECEIVED )
+            {
+                /* Clear bits in the task's notification value as bits may get
+                 * set  by the notifying task or interrupt.  This can be used to
+                 * clear the value to zero. */
+                pxCurrentTCB->ulNotifiedValue[ uxIndexToWait ] &= ~ulBitsToClearOnEntry;
 
-				if( xTicksToWait > ( TickType_t ) 0 )
-				{
-					prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
-					traceTASK_NOTIFY_WAIT_BLOCK();
+                /* Mark this task as waiting for a notification. */
+                pxCurrentTCB->ucNotifyState[ uxIndexToWait ] = taskWAITING_NOTIFICATION;
 
-					/* All ports are written to allow a yield in a critical
-					section (some will yield immediately, others wait until the
-					critical section exits) - but it is not something that
-					application code should ever do. */
-					portYIELD_WITHIN_API();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		taskEXIT_CRITICAL();
+                if( xTicksToWait > ( TickType_t ) 0 )
+                {
+                    prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
+                    traceTASK_NOTIFY_WAIT_BLOCK( uxIndexToWait );
 
-		taskENTER_CRITICAL();
-		{
-			traceTASK_NOTIFY_WAIT();
+                    /* All ports are written to allow a yield in a critical
+                     * section (some will yield immediately, others wait until the
+                     * critical section exits) - but it is not something that
+                     * application code should ever do. */
+                    portYIELD_WITHIN_API();
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        taskEXIT_CRITICAL();
 
-			if( pulNotificationValue != NULL )
-			{
-				/* Output the current notification value, which may or may not
-				have changed. */
-				*pulNotificationValue = pxCurrentTCB->ulNotifiedValue;
-			}
+        taskENTER_CRITICAL();
+        {
+            traceTASK_NOTIFY_WAIT( uxIndexToWait );
 
-			/* If ucNotifyValue is set then either the task never entered the
-			blocked state (because a notification was already pending) or the
-			task unblocked because of a notification.  Otherwise the task
-			unblocked because of a timeout. */
-			if( pxCurrentTCB->ucNotifyState != taskNOTIFICATION_RECEIVED )
-			{
-				/* A notification was not received. */
-				xReturn = pdFALSE;
-			}
-			else
-			{
-				/* A notification was already pending or a notification was
-				received while the task was waiting. */
-				pxCurrentTCB->ulNotifiedValue &= ~ulBitsToClearOnExit;
-				xReturn = pdTRUE;
-			}
+            if( pulNotificationValue != NULL )
+            {
+                /* Output the current notification value, which may or may not
+                 * have changed. */
+                *pulNotificationValue = pxCurrentTCB->ulNotifiedValue[ uxIndexToWait ];
+            }
 
-			pxCurrentTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
-		}
-		taskEXIT_CRITICAL();
+            /* If ucNotifyValue is set then either the task never entered the
+             * blocked state (because a notification was already pending) or the
+             * task unblocked because of a notification.  Otherwise the task
+             * unblocked because of a timeout. */
+            if( pxCurrentTCB->ucNotifyState[ uxIndexToWait ] != taskNOTIFICATION_RECEIVED )
+            {
+                /* A notification was not received. */
+                xReturn = pdFALSE;
+            }
+            else
+            {
+                /* A notification was already pending or a notification was
+                 * received while the task was waiting. */
+                pxCurrentTCB->ulNotifiedValue[ uxIndexToWait ] &= ~ulBitsToClearOnExit;
+                xReturn = pdTRUE;
+            }
 
-		return xReturn;
-	}
+            pxCurrentTCB->ucNotifyState[ uxIndexToWait ] = taskNOT_WAITING_NOTIFICATION;
+        }
+        taskEXIT_CRITICAL();
+
+        return xReturn;
+    }
 
 #endif /* configUSE_TASK_NOTIFICATIONS */
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TASK_NOTIFICATIONS == 1 )
+#if ( configUSE_TASK_NOTIFICATIONS == 1 )
 
-	BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue )
-	{
-	TCB_t * pxTCB;
-	BaseType_t xReturn = pdPASS;
-	uint8_t ucOriginalNotifyState;
+    BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify,
+                                   UBaseType_t uxIndexToNotify,
+                                   uint32_t ulValue,
+                                   eNotifyAction eAction,
+                                   uint32_t * pulPreviousNotificationValue )
+    {
+        TCB_t * pxTCB;
+        BaseType_t xReturn = pdPASS;
+        uint8_t ucOriginalNotifyState;
 
-		configASSERT( xTaskToNotify );
-		pxTCB = xTaskToNotify;
+        configASSERT( uxIndexToNotify < configTASK_NOTIFICATION_ARRAY_ENTRIES );
+        configASSERT( xTaskToNotify );
+        pxTCB = xTaskToNotify;
 
-		taskENTER_CRITICAL();
-		{
-			if( pulPreviousNotificationValue != NULL )
-			{
-				*pulPreviousNotificationValue = pxTCB->ulNotifiedValue;
-			}
+        taskENTER_CRITICAL();
+        {
+            if( pulPreviousNotificationValue != NULL )
+            {
+                *pulPreviousNotificationValue = pxTCB->ulNotifiedValue[ uxIndexToNotify ];
+            }
 
-			ucOriginalNotifyState = pxTCB->ucNotifyState;
+            ucOriginalNotifyState = pxTCB->ucNotifyState[ uxIndexToNotify ];
 
-			pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
+            pxTCB->ucNotifyState[ uxIndexToNotify ] = taskNOTIFICATION_RECEIVED;
 
-			switch( eAction )
-			{
-				case eSetBits	:
-					pxTCB->ulNotifiedValue |= ulValue;
-					break;
+            switch( eAction )
+            {
+                case eSetBits:
+                    pxTCB->ulNotifiedValue[ uxIndexToNotify ] |= ulValue;
+                    break;
 
-				case eIncrement	:
-					( pxTCB->ulNotifiedValue )++;
-					break;
+                case eIncrement:
+                    ( pxTCB->ulNotifiedValue[ uxIndexToNotify ] )++;
+                    break;
 
-				case eSetValueWithOverwrite	:
-					pxTCB->ulNotifiedValue = ulValue;
-					break;
+                case eSetValueWithOverwrite:
+                    pxTCB->ulNotifiedValue[ uxIndexToNotify ] = ulValue;
+                    break;
 
-				case eSetValueWithoutOverwrite :
-					if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
-					{
-						pxTCB->ulNotifiedValue = ulValue;
-					}
-					else
-					{
-						/* The value could not be written to the task. */
-						xReturn = pdFAIL;
-					}
-					break;
+                case eSetValueWithoutOverwrite:
 
-				case eNoAction:
-					/* The task is being notified without its notify value being
-					updated. */
-					break;
+                    if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
+                    {
+                        pxTCB->ulNotifiedValue[ uxIndexToNotify ] = ulValue;
+                    }
+                    else
+                    {
+                        /* The value could not be written to the task. */
+                        xReturn = pdFAIL;
+                    }
 
-				default:
-					/* Should not get here if all enums are handled.
-					Artificially force an assert by testing a value the
-					compiler can't assume is const. */
-					configASSERT( pxTCB->ulNotifiedValue == ~0UL );
+                    break;
 
-					break;
-			}
+                case eNoAction:
 
-			traceTASK_NOTIFY();
+                    /* The task is being notified without its notify value being
+                     * updated. */
+                    break;
 
-			/* If the task is in the blocked state specifically to wait for a
-			notification then unblock it now. */
-			if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
-			{
-				( void ) uxListRemove( &( pxTCB->xStateListItem ) );
-				prvAddTaskToReadyList( pxTCB );
+                default:
 
-				/* The task should not have been on an event list. */
-				configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
+                    /* Should not get here if all enums are handled.
+                     * Artificially force an assert by testing a value the
+                     * compiler can't assume is const. */
+                    configASSERT( xTickCount == ( TickType_t ) 0 );
 
-				#if( configUSE_TICKLESS_IDLE != 0 )
-				{
-					/* If a task is blocked waiting for a notification then
-					xNextTaskUnblockTime might be set to the blocked task's time
-					out time.  If the task is unblocked for a reason other than
-					a timeout xNextTaskUnblockTime is normally left unchanged,
-					because it will automatically get reset to a new value when
-					the tick count equals xNextTaskUnblockTime.  However if
-					tickless idling is used it might be more important to enter
-					sleep mode at the earliest possible time - so reset
-					xNextTaskUnblockTime here to ensure it is updated at the
-					earliest possible time. */
-					prvResetNextTaskUnblockTime();
-				}
-				#endif
+                    break;
+            }
 
-				if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
-				{
-					/* The notified task has a priority above the currently
-					executing task so a yield is required. */
-					taskYIELD_IF_USING_PREEMPTION();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		taskEXIT_CRITICAL();
+            traceTASK_NOTIFY( uxIndexToNotify );
 
-		return xReturn;
-	}
+            /* If the task is in the blocked state specifically to wait for a
+             * notification then unblock it now. */
+            if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
+            {
+                ( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+                prvAddTaskToReadyList( pxTCB );
+
+                /* The task should not have been on an event list. */
+                configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
+
+                #if ( configUSE_TICKLESS_IDLE != 0 )
+                    {
+                        /* If a task is blocked waiting for a notification then
+                         * xNextTaskUnblockTime might be set to the blocked task's time
+                         * out time.  If the task is unblocked for a reason other than
+                         * a timeout xNextTaskUnblockTime is normally left unchanged,
+                         * because it will automatically get reset to a new value when
+                         * the tick count equals xNextTaskUnblockTime.  However if
+                         * tickless idling is used it might be more important to enter
+                         * sleep mode at the earliest possible time - so reset
+                         * xNextTaskUnblockTime here to ensure it is updated at the
+                         * earliest possible time. */
+                        prvResetNextTaskUnblockTime();
+                    }
+                #endif
+
+                if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
+                {
+                    /* The notified task has a priority above the currently
+                     * executing task so a yield is required. */
+                    taskYIELD_IF_USING_PREEMPTION();
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        taskEXIT_CRITICAL();
+
+        return xReturn;
+    }
 
 #endif /* configUSE_TASK_NOTIFICATIONS */
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TASK_NOTIFICATIONS == 1 )
+#if ( configUSE_TASK_NOTIFICATIONS == 1 )
 
-	BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken )
-	{
-	TCB_t * pxTCB;
-	uint8_t ucOriginalNotifyState;
-	BaseType_t xReturn = pdPASS;
-	UBaseType_t uxSavedInterruptStatus;
+    BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify,
+                                          UBaseType_t uxIndexToNotify,
+                                          uint32_t ulValue,
+                                          eNotifyAction eAction,
+                                          uint32_t * pulPreviousNotificationValue,
+                                          BaseType_t * pxHigherPriorityTaskWoken )
+    {
+        TCB_t * pxTCB;
+        uint8_t ucOriginalNotifyState;
+        BaseType_t xReturn = pdPASS;
+        UBaseType_t uxSavedInterruptStatus;
 
-		configASSERT( xTaskToNotify );
+        configASSERT( xTaskToNotify );
+        configASSERT( uxIndexToNotify < configTASK_NOTIFICATION_ARRAY_ENTRIES );
 
-		/* RTOS ports that support interrupt nesting have the concept of a
-		maximum	system call (or maximum API call) interrupt priority.
-		Interrupts that are	above the maximum system call priority are keep
-		permanently enabled, even when the RTOS kernel is in a critical section,
-		but cannot make any calls to FreeRTOS API functions.  If configASSERT()
-		is defined in FreeRTOSConfig.h then
-		portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-		failure if a FreeRTOS API function is called from an interrupt that has
-		been assigned a priority above the configured maximum system call
-		priority.  Only FreeRTOS functions that end in FromISR can be called
-		from interrupts	that have been assigned a priority at or (logically)
-		below the maximum system call interrupt priority.  FreeRTOS maintains a
-		separate interrupt safe API to ensure interrupt entry is as fast and as
-		simple as possible.  More information (albeit Cortex-M specific) is
-		provided on the following link:
-		http://www.freertos.org/RTOS-Cortex-M3-M4.html */
-		portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+        /* RTOS ports that support interrupt nesting have the concept of a
+         * maximum  system call (or maximum API call) interrupt priority.
+         * Interrupts that are  above the maximum system call priority are keep
+         * permanently enabled, even when the RTOS kernel is in a critical section,
+         * but cannot make any calls to FreeRTOS API functions.  If configASSERT()
+         * is defined in FreeRTOSConfig.h then
+         * portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
+         * failure if a FreeRTOS API function is called from an interrupt that has
+         * been assigned a priority above the configured maximum system call
+         * priority.  Only FreeRTOS functions that end in FromISR can be called
+         * from interrupts  that have been assigned a priority at or (logically)
+         * below the maximum system call interrupt priority.  FreeRTOS maintains a
+         * separate interrupt safe API to ensure interrupt entry is as fast and as
+         * simple as possible.  More information (albeit Cortex-M specific) is
+         * provided on the following link:
+         * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
+        portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 
-		pxTCB = xTaskToNotify;
+        pxTCB = xTaskToNotify;
 
-		uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
-		{
-			if( pulPreviousNotificationValue != NULL )
-			{
-				*pulPreviousNotificationValue = pxTCB->ulNotifiedValue;
-			}
+        uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
+        {
+            if( pulPreviousNotificationValue != NULL )
+            {
+                *pulPreviousNotificationValue = pxTCB->ulNotifiedValue[ uxIndexToNotify ];
+            }
 
-			ucOriginalNotifyState = pxTCB->ucNotifyState;
-			pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
+            ucOriginalNotifyState = pxTCB->ucNotifyState[ uxIndexToNotify ];
+            pxTCB->ucNotifyState[ uxIndexToNotify ] = taskNOTIFICATION_RECEIVED;
 
-			switch( eAction )
-			{
-				case eSetBits	:
-					pxTCB->ulNotifiedValue |= ulValue;
-					break;
+            switch( eAction )
+            {
+                case eSetBits:
+                    pxTCB->ulNotifiedValue[ uxIndexToNotify ] |= ulValue;
+                    break;
 
-				case eIncrement	:
-					( pxTCB->ulNotifiedValue )++;
-					break;
+                case eIncrement:
+                    ( pxTCB->ulNotifiedValue[ uxIndexToNotify ] )++;
+                    break;
 
-				case eSetValueWithOverwrite	:
-					pxTCB->ulNotifiedValue = ulValue;
-					break;
+                case eSetValueWithOverwrite:
+                    pxTCB->ulNotifiedValue[ uxIndexToNotify ] = ulValue;
+                    break;
 
-				case eSetValueWithoutOverwrite :
-					if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
-					{
-						pxTCB->ulNotifiedValue = ulValue;
-					}
-					else
-					{
-						/* The value could not be written to the task. */
-						xReturn = pdFAIL;
-					}
-					break;
+                case eSetValueWithoutOverwrite:
 
-				case eNoAction :
-					/* The task is being notified without its notify value being
-					updated. */
-					break;
+                    if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
+                    {
+                        pxTCB->ulNotifiedValue[ uxIndexToNotify ] = ulValue;
+                    }
+                    else
+                    {
+                        /* The value could not be written to the task. */
+                        xReturn = pdFAIL;
+                    }
 
-				default:
-					/* Should not get here if all enums are handled.
-					Artificially force an assert by testing a value the
-					compiler can't assume is const. */
-					configASSERT( pxTCB->ulNotifiedValue == ~0UL );
-					break;
-			}
+                    break;
 
-			traceTASK_NOTIFY_FROM_ISR();
+                case eNoAction:
 
-			/* If the task is in the blocked state specifically to wait for a
-			notification then unblock it now. */
-			if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
-			{
-				/* The task should not have been on an event list. */
-				configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
+                    /* The task is being notified without its notify value being
+                     * updated. */
+                    break;
 
-				if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
-				{
-					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
-					prvAddTaskToReadyList( pxTCB );
-				}
-				else
-				{
-					/* The delayed and ready lists cannot be accessed, so hold
-					this task pending until the scheduler is resumed. */
-					vListInsertEnd( &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
-				}
+                default:
 
-				if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
-				{
-					/* The notified task has a priority above the currently
-					executing task so a yield is required. */
-					if( pxHigherPriorityTaskWoken != NULL )
-					{
-						*pxHigherPriorityTaskWoken = pdTRUE;
-					}
+                    /* Should not get here if all enums are handled.
+                     * Artificially force an assert by testing a value the
+                     * compiler can't assume is const. */
+                    configASSERT( xTickCount == ( TickType_t ) 0 );
+                    break;
+            }
 
-					/* Mark that a yield is pending in case the user is not
-					using the "xHigherPriorityTaskWoken" parameter to an ISR
-					safe FreeRTOS function. */
-					xYieldPending = pdTRUE;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-		}
-		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+            traceTASK_NOTIFY_FROM_ISR( uxIndexToNotify );
 
-		return xReturn;
-	}
+            /* If the task is in the blocked state specifically to wait for a
+             * notification then unblock it now. */
+            if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
+            {
+                /* The task should not have been on an event list. */
+                configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
+
+                if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+                {
+                    ( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+                    prvAddTaskToReadyList( pxTCB );
+                }
+                else
+                {
+                    /* The delayed and ready lists cannot be accessed, so hold
+                     * this task pending until the scheduler is resumed. */
+                    vListInsertEnd( &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
+                }
+
+                if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
+                {
+                    /* The notified task has a priority above the currently
+                     * executing task so a yield is required. */
+                    if( pxHigherPriorityTaskWoken != NULL )
+                    {
+                        *pxHigherPriorityTaskWoken = pdTRUE;
+                    }
+
+                    /* Mark that a yield is pending in case the user is not
+                     * using the "xHigherPriorityTaskWoken" parameter to an ISR
+                     * safe FreeRTOS function. */
+                    xYieldPending = pdTRUE;
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+        }
+        portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+
+        return xReturn;
+    }
 
 #endif /* configUSE_TASK_NOTIFICATIONS */
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TASK_NOTIFICATIONS == 1 )
+#if ( configUSE_TASK_NOTIFICATIONS == 1 )
 
-	void vTaskNotifyGiveFromISR( TaskHandle_t xTaskToNotify, BaseType_t *pxHigherPriorityTaskWoken )
-	{
-	TCB_t * pxTCB;
-	uint8_t ucOriginalNotifyState;
-	UBaseType_t uxSavedInterruptStatus;
+    void vTaskGenericNotifyGiveFromISR( TaskHandle_t xTaskToNotify,
+                                        UBaseType_t uxIndexToNotify,
+                                        BaseType_t * pxHigherPriorityTaskWoken )
+    {
+        TCB_t * pxTCB;
+        uint8_t ucOriginalNotifyState;
+        UBaseType_t uxSavedInterruptStatus;
 
-		configASSERT( xTaskToNotify );
+        configASSERT( xTaskToNotify );
+        configASSERT( uxIndexToNotify < configTASK_NOTIFICATION_ARRAY_ENTRIES );
 
-		/* RTOS ports that support interrupt nesting have the concept of a
-		maximum	system call (or maximum API call) interrupt priority.
-		Interrupts that are	above the maximum system call priority are keep
-		permanently enabled, even when the RTOS kernel is in a critical section,
-		but cannot make any calls to FreeRTOS API functions.  If configASSERT()
-		is defined in FreeRTOSConfig.h then
-		portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-		failure if a FreeRTOS API function is called from an interrupt that has
-		been assigned a priority above the configured maximum system call
-		priority.  Only FreeRTOS functions that end in FromISR can be called
-		from interrupts	that have been assigned a priority at or (logically)
-		below the maximum system call interrupt priority.  FreeRTOS maintains a
-		separate interrupt safe API to ensure interrupt entry is as fast and as
-		simple as possible.  More information (albeit Cortex-M specific) is
-		provided on the following link:
-		http://www.freertos.org/RTOS-Cortex-M3-M4.html */
-		portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+        /* RTOS ports that support interrupt nesting have the concept of a
+         * maximum  system call (or maximum API call) interrupt priority.
+         * Interrupts that are  above the maximum system call priority are keep
+         * permanently enabled, even when the RTOS kernel is in a critical section,
+         * but cannot make any calls to FreeRTOS API functions.  If configASSERT()
+         * is defined in FreeRTOSConfig.h then
+         * portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
+         * failure if a FreeRTOS API function is called from an interrupt that has
+         * been assigned a priority above the configured maximum system call
+         * priority.  Only FreeRTOS functions that end in FromISR can be called
+         * from interrupts  that have been assigned a priority at or (logically)
+         * below the maximum system call interrupt priority.  FreeRTOS maintains a
+         * separate interrupt safe API to ensure interrupt entry is as fast and as
+         * simple as possible.  More information (albeit Cortex-M specific) is
+         * provided on the following link:
+         * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
+        portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 
-		pxTCB = xTaskToNotify;
+        pxTCB = xTaskToNotify;
 
-		uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
-		{
-			ucOriginalNotifyState = pxTCB->ucNotifyState;
-			pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
+        uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
+        {
+            ucOriginalNotifyState = pxTCB->ucNotifyState[ uxIndexToNotify ];
+            pxTCB->ucNotifyState[ uxIndexToNotify ] = taskNOTIFICATION_RECEIVED;
 
-			/* 'Giving' is equivalent to incrementing a count in a counting
-			semaphore. */
-			( pxTCB->ulNotifiedValue )++;
+            /* 'Giving' is equivalent to incrementing a count in a counting
+             * semaphore. */
+            ( pxTCB->ulNotifiedValue[ uxIndexToNotify ] )++;
 
-			traceTASK_NOTIFY_GIVE_FROM_ISR();
+            traceTASK_NOTIFY_GIVE_FROM_ISR( uxIndexToNotify );
 
-			/* If the task is in the blocked state specifically to wait for a
-			notification then unblock it now. */
-			if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
-			{
-				/* The task should not have been on an event list. */
-				configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
+            /* If the task is in the blocked state specifically to wait for a
+             * notification then unblock it now. */
+            if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
+            {
+                /* The task should not have been on an event list. */
+                configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
 
-				if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
-				{
-					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
-					prvAddTaskToReadyList( pxTCB );
-				}
-				else
-				{
-					/* The delayed and ready lists cannot be accessed, so hold
-					this task pending until the scheduler is resumed. */
-					vListInsertEnd( &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
-				}
+                if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+                {
+                    ( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+                    prvAddTaskToReadyList( pxTCB );
+                }
+                else
+                {
+                    /* The delayed and ready lists cannot be accessed, so hold
+                     * this task pending until the scheduler is resumed. */
+                    vListInsertEnd( &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
+                }
 
-				if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
-				{
-					/* The notified task has a priority above the currently
-					executing task so a yield is required. */
-					if( pxHigherPriorityTaskWoken != NULL )
-					{
-						*pxHigherPriorityTaskWoken = pdTRUE;
-					}
+                if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
+                {
+                    /* The notified task has a priority above the currently
+                     * executing task so a yield is required. */
+                    if( pxHigherPriorityTaskWoken != NULL )
+                    {
+                        *pxHigherPriorityTaskWoken = pdTRUE;
+                    }
 
-					/* Mark that a yield is pending in case the user is not
-					using the "xHigherPriorityTaskWoken" parameter in an ISR
-					safe FreeRTOS function. */
-					xYieldPending = pdTRUE;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-		}
-		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
-	}
+                    /* Mark that a yield is pending in case the user is not
+                     * using the "xHigherPriorityTaskWoken" parameter in an ISR
+                     * safe FreeRTOS function. */
+                    xYieldPending = pdTRUE;
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
+        }
+        portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+    }
 
 #endif /* configUSE_TASK_NOTIFICATIONS */
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TASK_NOTIFICATIONS == 1 )
+#if ( configUSE_TASK_NOTIFICATIONS == 1 )
 
-	BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask )
-	{
-	TCB_t *pxTCB;
-	BaseType_t xReturn;
+    BaseType_t xTaskGenericNotifyStateClear( TaskHandle_t xTask,
+                                             UBaseType_t uxIndexToClear )
+    {
+        TCB_t * pxTCB;
+        BaseType_t xReturn;
 
-		/* If null is passed in here then it is the calling task that is having
-		its notification state cleared. */
-		pxTCB = prvGetTCBFromHandle( xTask );
+        configASSERT( uxIndexToClear < configTASK_NOTIFICATION_ARRAY_ENTRIES );
 
-		taskENTER_CRITICAL();
-		{
-			if( pxTCB->ucNotifyState == taskNOTIFICATION_RECEIVED )
-			{
-				pxTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
-				xReturn = pdPASS;
-			}
-			else
-			{
-				xReturn = pdFAIL;
-			}
-		}
-		taskEXIT_CRITICAL();
+        /* If null is passed in here then it is the calling task that is having
+         * its notification state cleared. */
+        pxTCB = prvGetTCBFromHandle( xTask );
 
-		return xReturn;
-	}
+        taskENTER_CRITICAL();
+        {
+            if( pxTCB->ucNotifyState[ uxIndexToClear ] == taskNOTIFICATION_RECEIVED )
+            {
+                pxTCB->ucNotifyState[ uxIndexToClear ] = taskNOT_WAITING_NOTIFICATION;
+                xReturn = pdPASS;
+            }
+            else
+            {
+                xReturn = pdFAIL;
+            }
+        }
+        taskEXIT_CRITICAL();
+
+        return xReturn;
+    }
 
 #endif /* configUSE_TASK_NOTIFICATIONS */
 /*-----------------------------------------------------------*/
 
-#if( configUSE_TASK_NOTIFICATIONS == 1 )
+#if ( configUSE_TASK_NOTIFICATIONS == 1 )
 
-	uint32_t ulTaskNotifyValueClear( TaskHandle_t xTask, uint32_t ulBitsToClear )
-	{
-	TCB_t *pxTCB;
-	uint32_t ulReturn;
+    uint32_t ulTaskGenericNotifyValueClear( TaskHandle_t xTask,
+                                            UBaseType_t uxIndexToClear,
+                                            uint32_t ulBitsToClear )
+    {
+        TCB_t * pxTCB;
+        uint32_t ulReturn;
 
-		/* If null is passed in here then it is the calling task that is having
-		its notification state cleared. */
-		pxTCB = prvGetTCBFromHandle( xTask );
+        /* If null is passed in here then it is the calling task that is having
+         * its notification state cleared. */
+        pxTCB = prvGetTCBFromHandle( xTask );
 
-		taskENTER_CRITICAL();
-		{
-			/* Return the notification as it was before the bits were cleared,
-			then clear the bit mask. */
-			ulReturn = pxCurrentTCB->ulNotifiedValue;
-			pxTCB->ulNotifiedValue &= ~ulBitsToClear;
-		}
-		taskEXIT_CRITICAL();
+        taskENTER_CRITICAL();
+        {
+            /* Return the notification as it was before the bits were cleared,
+             * then clear the bit mask. */
+            ulReturn = pxTCB->ulNotifiedValue[ uxIndexToClear ];
+            pxTCB->ulNotifiedValue[ uxIndexToClear ] &= ~ulBitsToClear;
+        }
+        taskEXIT_CRITICAL();
 
-		return ulReturn;
-	}
+        return ulReturn;
+    }
 
 #endif /* configUSE_TASK_NOTIFICATIONS */
 /*-----------------------------------------------------------*/
 
-#if( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) )
+#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) )
 
-	uint32_t ulTaskGetIdleRunTimeCounter( void )
-	{
-		return xIdleTaskHandle->ulRunTimeCounter;
-	}
+    uint32_t ulTaskGetIdleRunTimeCounter( void )
+    {
+        return xIdleTaskHandle->ulRunTimeCounter;
+    }
 
 #endif
 /*-----------------------------------------------------------*/
 
-static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely )
+static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait,
+                                            const BaseType_t xCanBlockIndefinitely )
 {
-TickType_t xTimeToWake;
-const TickType_t xConstTickCount = xTickCount;
+    TickType_t xTimeToWake;
+    const TickType_t xConstTickCount = xTickCount;
 
-	#if( INCLUDE_xTaskAbortDelay == 1 )
-	{
-		/* About to enter a delayed list, so ensure the ucDelayAborted flag is
-		reset to pdFALSE so it can be detected as having been set to pdTRUE
-		when the task leaves the Blocked state. */
-		pxCurrentTCB->ucDelayAborted = pdFALSE;
-	}
-	#endif
+    #if ( INCLUDE_xTaskAbortDelay == 1 )
+        {
+            /* About to enter a delayed list, so ensure the ucDelayAborted flag is
+             * reset to pdFALSE so it can be detected as having been set to pdTRUE
+             * when the task leaves the Blocked state. */
+            pxCurrentTCB->ucDelayAborted = pdFALSE;
+        }
+    #endif
 
-	/* Remove the task from the ready list before adding it to the blocked list
-	as the same list item is used for both lists. */
-	if( uxListRemove( &( pxCurrentTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
-	{
-		/* The current task must be in a ready list, so there is no need to
-		check, and the port reset macro can be called directly. */
-		portRESET_READY_PRIORITY( pxCurrentTCB->uxPriority, uxTopReadyPriority ); /*lint !e931 pxCurrentTCB cannot change as it is the calling task.  pxCurrentTCB->uxPriority and uxTopReadyPriority cannot change as called with scheduler suspended or in a critical section. */
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+    /* Remove the task from the ready list before adding it to the blocked list
+     * as the same list item is used for both lists. */
+    if( uxListRemove( &( pxCurrentTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
+    {
+        /* The current task must be in a ready list, so there is no need to
+         * check, and the port reset macro can be called directly. */
+        portRESET_READY_PRIORITY( pxCurrentTCB->uxPriority, uxTopReadyPriority ); /*lint !e931 pxCurrentTCB cannot change as it is the calling task.  pxCurrentTCB->uxPriority and uxTopReadyPriority cannot change as called with scheduler suspended or in a critical section. */
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
 
-	#if ( INCLUDE_vTaskSuspend == 1 )
-	{
-		if( ( xTicksToWait == portMAX_DELAY ) && ( xCanBlockIndefinitely != pdFALSE ) )
-		{
-			/* Add the task to the suspended task list instead of a delayed task
-			list to ensure it is not woken by a timing event.  It will block
-			indefinitely. */
-			vListInsertEnd( &xSuspendedTaskList, &( pxCurrentTCB->xStateListItem ) );
-		}
-		else
-		{
-			/* Calculate the time at which the task should be woken if the event
-			does not occur.  This may overflow but this doesn't matter, the
-			kernel will manage it correctly. */
-			xTimeToWake = xConstTickCount + xTicksToWait;
+    #if ( INCLUDE_vTaskSuspend == 1 )
+        {
+            if( ( xTicksToWait == portMAX_DELAY ) && ( xCanBlockIndefinitely != pdFALSE ) )
+            {
+                /* Add the task to the suspended task list instead of a delayed task
+                 * list to ensure it is not woken by a timing event.  It will block
+                 * indefinitely. */
+                vListInsertEnd( &xSuspendedTaskList, &( pxCurrentTCB->xStateListItem ) );
+            }
+            else
+            {
+                /* Calculate the time at which the task should be woken if the event
+                 * does not occur.  This may overflow but this doesn't matter, the
+                 * kernel will manage it correctly. */
+                xTimeToWake = xConstTickCount + xTicksToWait;
 
-			/* The list item will be inserted in wake time order. */
-			listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
+                /* The list item will be inserted in wake time order. */
+                listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
 
-			if( xTimeToWake < xConstTickCount )
-			{
-				/* Wake time has overflowed.  Place this item in the overflow
-				list. */
-				vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
-			}
-			else
-			{
-				/* The wake time has not overflowed, so the current block list
-				is used. */
-				vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
+                if( xTimeToWake < xConstTickCount )
+                {
+                    /* Wake time has overflowed.  Place this item in the overflow
+                     * list. */
+                    vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
+                }
+                else
+                {
+                    /* The wake time has not overflowed, so the current block list
+                     * is used. */
+                    vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
 
-				/* If the task entering the blocked state was placed at the
-				head of the list of blocked tasks then xNextTaskUnblockTime
-				needs to be updated too. */
-				if( xTimeToWake < xNextTaskUnblockTime )
-				{
-					xNextTaskUnblockTime = xTimeToWake;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-		}
-	}
-	#else /* INCLUDE_vTaskSuspend */
-	{
-		/* Calculate the time at which the task should be woken if the event
-		does not occur.  This may overflow but this doesn't matter, the kernel
-		will manage it correctly. */
-		xTimeToWake = xConstTickCount + xTicksToWait;
+                    /* If the task entering the blocked state was placed at the
+                     * head of the list of blocked tasks then xNextTaskUnblockTime
+                     * needs to be updated too. */
+                    if( xTimeToWake < xNextTaskUnblockTime )
+                    {
+                        xNextTaskUnblockTime = xTimeToWake;
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
+                }
+            }
+        }
+    #else /* INCLUDE_vTaskSuspend */
+        {
+            /* Calculate the time at which the task should be woken if the event
+             * does not occur.  This may overflow but this doesn't matter, the kernel
+             * will manage it correctly. */
+            xTimeToWake = xConstTickCount + xTicksToWait;
 
-		/* The list item will be inserted in wake time order. */
-		listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
+            /* The list item will be inserted in wake time order. */
+            listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
 
-		if( xTimeToWake < xConstTickCount )
-		{
-			/* Wake time has overflowed.  Place this item in the overflow list. */
-			vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
-		}
-		else
-		{
-			/* The wake time has not overflowed, so the current block list is used. */
-			vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
+            if( xTimeToWake < xConstTickCount )
+            {
+                /* Wake time has overflowed.  Place this item in the overflow list. */
+                vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
+            }
+            else
+            {
+                /* The wake time has not overflowed, so the current block list is used. */
+                vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
 
-			/* If the task entering the blocked state was placed at the head of the
-			list of blocked tasks then xNextTaskUnblockTime needs to be updated
-			too. */
-			if( xTimeToWake < xNextTaskUnblockTime )
-			{
-				xNextTaskUnblockTime = xTimeToWake;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
+                /* If the task entering the blocked state was placed at the head of the
+                 * list of blocked tasks then xNextTaskUnblockTime needs to be updated
+                 * too. */
+                if( xTimeToWake < xNextTaskUnblockTime )
+                {
+                    xNextTaskUnblockTime = xTimeToWake;
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
+            }
 
-		/* Avoid compiler warning when INCLUDE_vTaskSuspend is not 1. */
-		( void ) xCanBlockIndefinitely;
-	}
-	#endif /* INCLUDE_vTaskSuspend */
+            /* Avoid compiler warning when INCLUDE_vTaskSuspend is not 1. */
+            ( void ) xCanBlockIndefinitely;
+        }
+    #endif /* INCLUDE_vTaskSuspend */
 }
 
 /* Code below here allows additional code to be inserted into this source file,
-especially where access to file scope functions and data is needed (for example
-when performing module tests). */
+ * especially where access to file scope functions and data is needed (for example
+ * when performing module tests). */
 
 #ifdef FREERTOS_MODULE_TEST
-	#include "tasks_test_access_functions.h"
+    #include "tasks_test_access_functions.h"
 #endif
 
 
-#if( configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H == 1 )
+#if ( configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H == 1 )
 
-	#include "freertos_tasks_c_additions.h"
-
-	#ifdef FREERTOS_TASKS_C_ADDITIONS_INIT
-		static void freertos_tasks_c_additions_init( void )
-		{
-			FREERTOS_TASKS_C_ADDITIONS_INIT();
-		}
-	#endif
-
-#endif
+    #include "freertos_tasks_c_additions.h"
 
+    #ifdef FREERTOS_TASKS_C_ADDITIONS_INIT
+        static void freertos_tasks_c_additions_init( void )
+        {
+            FREERTOS_TASKS_C_ADDITIONS_INIT();
+        }
+    #endif
 
+#endif /* if ( configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H == 1 ) */
diff --git a/timers.c b/timers.c
index d10c83208..d614602c2 100644
--- a/timers.c
+++ b/timers.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.3.1
+ * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -19,18 +19,17 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /* Standard includes. */
 #include 
 
 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
-all the API functions to use the MPU wrappers.  That should only be done when
-task.h is included from an application file. */
+ * all the API functions to use the MPU wrappers.  That should only be done when
+ * task.h is included from an application file. */
 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
 #include "FreeRTOS.h"
@@ -39,164 +38,158 @@ task.h is included from an application file. */
 #include "timers.h"
 
 #if ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 0 )
-	#error configUSE_TIMERS must be set to 1 to make the xTimerPendFunctionCall() function available.
+    #error configUSE_TIMERS must be set to 1 to make the xTimerPendFunctionCall() function available.
 #endif
 
 /* Lint e9021, e961 and e750 are suppressed as a MISRA exception justified
-because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined
-for the header files above, but not in this file, in order to generate the
-correct privileged Vs unprivileged linkage and placement. */
+ * because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined
+ * for the header files above, but not in this file, in order to generate the
+ * correct privileged Vs unprivileged linkage and placement. */
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e9021 !e961 !e750. */
 
 
 /* This entire source file will be skipped if the application is not configured
-to include software timer functionality.  This #if is closed at the very bottom
-of this file.  If you want to include software timer functionality then ensure
-configUSE_TIMERS is set to 1 in FreeRTOSConfig.h. */
+ * to include software timer functionality.  This #if is closed at the very bottom
+ * of this file.  If you want to include software timer functionality then ensure
+ * configUSE_TIMERS is set to 1 in FreeRTOSConfig.h. */
 #if ( configUSE_TIMERS == 1 )
 
 /* Misc definitions. */
-#define tmrNO_DELAY		( TickType_t ) 0U
+    #define tmrNO_DELAY    ( TickType_t ) 0U
 
 /* The name assigned to the timer service task.  This can be overridden by
-defining trmTIMER_SERVICE_TASK_NAME in FreeRTOSConfig.h. */
-#ifndef configTIMER_SERVICE_TASK_NAME
-	#define configTIMER_SERVICE_TASK_NAME "Tmr Svc"
-#endif
+ * defining trmTIMER_SERVICE_TASK_NAME in FreeRTOSConfig.h. */
+    #ifndef configTIMER_SERVICE_TASK_NAME
+        #define configTIMER_SERVICE_TASK_NAME    "Tmr Svc"
+    #endif
 
 /* Bit definitions used in the ucStatus member of a timer structure. */
-#define tmrSTATUS_IS_ACTIVE					( ( uint8_t ) 0x01 )
-#define tmrSTATUS_IS_STATICALLY_ALLOCATED	( ( uint8_t ) 0x02 )
-#define tmrSTATUS_IS_AUTORELOAD				( ( uint8_t ) 0x04 )
+    #define tmrSTATUS_IS_ACTIVE                  ( ( uint8_t ) 0x01 )
+    #define tmrSTATUS_IS_STATICALLY_ALLOCATED    ( ( uint8_t ) 0x02 )
+    #define tmrSTATUS_IS_AUTORELOAD              ( ( uint8_t ) 0x04 )
 
 /* The definition of the timers themselves. */
-typedef struct tmrTimerControl /* The old naming convention is used to prevent breaking kernel aware debuggers. */
-{
-	const char				*pcTimerName;		/*<< Text name.  This is not used by the kernel, it is included simply to make debugging easier. */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-	ListItem_t				xTimerListItem;		/*<< Standard linked list item as used by all kernel features for event management. */
-	TickType_t				xTimerPeriodInTicks;/*<< How quickly and often the timer expires. */
-	void 					*pvTimerID;			/*<< An ID to identify the timer.  This allows the timer to be identified when the same callback is used for multiple timers. */
-	TimerCallbackFunction_t	pxCallbackFunction;	/*<< The function that will be called when the timer expires. */
-	#if( configUSE_TRACE_FACILITY == 1 )
-		UBaseType_t			uxTimerNumber;		/*<< An ID assigned by trace tools such as FreeRTOS+Trace */
-	#endif
-	uint8_t 				ucStatus;			/*<< Holds bits to say if the timer was statically allocated or not, and if it is active or not. */
-} xTIMER;
+    typedef struct tmrTimerControl                  /* The old naming convention is used to prevent breaking kernel aware debuggers. */
+    {
+        const char * pcTimerName;                   /*<< Text name.  This is not used by the kernel, it is included simply to make debugging easier. */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+        ListItem_t xTimerListItem;                  /*<< Standard linked list item as used by all kernel features for event management. */
+        TickType_t xTimerPeriodInTicks;             /*<< How quickly and often the timer expires. */
+        void * pvTimerID;                           /*<< An ID to identify the timer.  This allows the timer to be identified when the same callback is used for multiple timers. */
+        TimerCallbackFunction_t pxCallbackFunction; /*<< The function that will be called when the timer expires. */
+        #if ( configUSE_TRACE_FACILITY == 1 )
+            UBaseType_t uxTimerNumber;              /*<< An ID assigned by trace tools such as FreeRTOS+Trace */
+        #endif
+        uint8_t ucStatus;                           /*<< Holds bits to say if the timer was statically allocated or not, and if it is active or not. */
+    } xTIMER;
 
 /* The old xTIMER name is maintained above then typedefed to the new Timer_t
-name below to enable the use of older kernel aware debuggers. */
-typedef xTIMER Timer_t;
+ * name below to enable the use of older kernel aware debuggers. */
+    typedef xTIMER Timer_t;
 
 /* The definition of messages that can be sent and received on the timer queue.
-Two types of message can be queued - messages that manipulate a software timer,
-and messages that request the execution of a non-timer related callback.  The
-two message types are defined in two separate structures, xTimerParametersType
-and xCallbackParametersType respectively. */
-typedef struct tmrTimerParameters
-{
-	TickType_t			xMessageValue;		/*<< An optional value used by a subset of commands, for example, when changing the period of a timer. */
-	Timer_t *			pxTimer;			/*<< The timer to which the command will be applied. */
-} TimerParameter_t;
+ * Two types of message can be queued - messages that manipulate a software timer,
+ * and messages that request the execution of a non-timer related callback.  The
+ * two message types are defined in two separate structures, xTimerParametersType
+ * and xCallbackParametersType respectively. */
+    typedef struct tmrTimerParameters
+    {
+        TickType_t xMessageValue; /*<< An optional value used by a subset of commands, for example, when changing the period of a timer. */
+        Timer_t * pxTimer;        /*<< The timer to which the command will be applied. */
+    } TimerParameter_t;
 
 
-typedef struct tmrCallbackParameters
-{
-	PendedFunction_t	pxCallbackFunction;	/* << The callback function to execute. */
-	void *pvParameter1;						/* << The value that will be used as the callback functions first parameter. */
-	uint32_t ulParameter2;					/* << The value that will be used as the callback functions second parameter. */
-} CallbackParameters_t;
+    typedef struct tmrCallbackParameters
+    {
+        PendedFunction_t pxCallbackFunction; /* << The callback function to execute. */
+        void * pvParameter1;                 /* << The value that will be used as the callback functions first parameter. */
+        uint32_t ulParameter2;               /* << The value that will be used as the callback functions second parameter. */
+    } CallbackParameters_t;
 
 /* The structure that contains the two message types, along with an identifier
-that is used to determine which message type is valid. */
-typedef struct tmrTimerQueueMessage
-{
-	BaseType_t			xMessageID;			/*<< The command being sent to the timer service task. */
-	union
-	{
-		TimerParameter_t xTimerParameters;
+ * that is used to determine which message type is valid. */
+    typedef struct tmrTimerQueueMessage
+    {
+        BaseType_t xMessageID; /*<< The command being sent to the timer service task. */
+        union
+        {
+            TimerParameter_t xTimerParameters;
 
-		/* Don't include xCallbackParameters if it is not going to be used as
-		it makes the structure (and therefore the timer queue) larger. */
-		#if ( INCLUDE_xTimerPendFunctionCall == 1 )
-			CallbackParameters_t xCallbackParameters;
-		#endif /* INCLUDE_xTimerPendFunctionCall */
-	} u;
-} DaemonTaskMessage_t;
+            /* Don't include xCallbackParameters if it is not going to be used as
+             * it makes the structure (and therefore the timer queue) larger. */
+            #if ( INCLUDE_xTimerPendFunctionCall == 1 )
+                CallbackParameters_t xCallbackParameters;
+            #endif /* INCLUDE_xTimerPendFunctionCall */
+        } u;
+    } DaemonTaskMessage_t;
 
 /*lint -save -e956 A manual analysis and inspection has been used to determine
-which static variables must be declared volatile. */
+ * which static variables must be declared volatile. */
 
 /* The list in which active timers are stored.  Timers are referenced in expire
-time order, with the nearest expiry time at the front of the list.  Only the
-timer service task is allowed to access these lists.
-xActiveTimerList1 and xActiveTimerList2 could be at function scope but that
-breaks some kernel aware debuggers, and debuggers that reply on removing the
-static qualifier. */
-PRIVILEGED_DATA static List_t xActiveTimerList1;
-PRIVILEGED_DATA static List_t xActiveTimerList2;
-PRIVILEGED_DATA static List_t *pxCurrentTimerList;
-PRIVILEGED_DATA static List_t *pxOverflowTimerList;
+ * time order, with the nearest expiry time at the front of the list.  Only the
+ * timer service task is allowed to access these lists.
+ * xActiveTimerList1 and xActiveTimerList2 could be at function scope but that
+ * breaks some kernel aware debuggers, and debuggers that reply on removing the
+ * static qualifier. */
+    PRIVILEGED_DATA static List_t xActiveTimerList1;
+    PRIVILEGED_DATA static List_t xActiveTimerList2;
+    PRIVILEGED_DATA static List_t * pxCurrentTimerList;
+    PRIVILEGED_DATA static List_t * pxOverflowTimerList;
 
 /* A queue that is used to send commands to the timer service task. */
-PRIVILEGED_DATA static QueueHandle_t xTimerQueue = NULL;
-PRIVILEGED_DATA static TaskHandle_t xTimerTaskHandle = NULL;
+    PRIVILEGED_DATA static QueueHandle_t xTimerQueue = NULL;
+    PRIVILEGED_DATA static TaskHandle_t xTimerTaskHandle = NULL;
 
 /*lint -restore */
 
 /*-----------------------------------------------------------*/
 
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-
-	/* If static allocation is supported then the application must provide the
-	following callback function - which enables the application to optionally
-	provide the memory that will be used by the timer task as the task's stack
-	and TCB. */
-	extern void vApplicationGetTimerTaskMemory( StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize );
-
-#endif
-
 /*
  * Initialise the infrastructure used by the timer service task if it has not
  * been initialised already.
  */
-static void prvCheckForValidListAndQueue( void ) PRIVILEGED_FUNCTION;
+    static void prvCheckForValidListAndQueue( void ) PRIVILEGED_FUNCTION;
 
 /*
  * The timer service task (daemon).  Timer functionality is controlled by this
  * task.  Other tasks communicate with the timer service task using the
  * xTimerQueue queue.
  */
-static portTASK_FUNCTION_PROTO( prvTimerTask, pvParameters ) PRIVILEGED_FUNCTION;
+    static portTASK_FUNCTION_PROTO( prvTimerTask, pvParameters ) PRIVILEGED_FUNCTION;
 
 /*
  * Called by the timer service task to interpret and process a command it
  * received on the timer queue.
  */
-static void prvProcessReceivedCommands( void ) PRIVILEGED_FUNCTION;
+    static void prvProcessReceivedCommands( void ) PRIVILEGED_FUNCTION;
 
 /*
  * Insert the timer into either xActiveTimerList1, or xActiveTimerList2,
  * depending on if the expire time causes a timer counter overflow.
  */
-static BaseType_t prvInsertTimerInActiveList( Timer_t * const pxTimer, const TickType_t xNextExpiryTime, const TickType_t xTimeNow, const TickType_t xCommandTime ) PRIVILEGED_FUNCTION;
+    static BaseType_t prvInsertTimerInActiveList( Timer_t * const pxTimer,
+                                                  const TickType_t xNextExpiryTime,
+                                                  const TickType_t xTimeNow,
+                                                  const TickType_t xCommandTime ) PRIVILEGED_FUNCTION;
 
 /*
  * An active timer has reached its expire time.  Reload the timer if it is an
  * auto-reload timer, then call its callback.
  */
-static void prvProcessExpiredTimer( const TickType_t xNextExpireTime, const TickType_t xTimeNow ) PRIVILEGED_FUNCTION;
+    static void prvProcessExpiredTimer( const TickType_t xNextExpireTime,
+                                        const TickType_t xTimeNow ) PRIVILEGED_FUNCTION;
 
 /*
  * The tick count has overflowed.  Switch the timer lists after ensuring the
  * current timer list does not still reference some timers.
  */
-static void prvSwitchTimerLists( void ) PRIVILEGED_FUNCTION;
+    static void prvSwitchTimerLists( void ) PRIVILEGED_FUNCTION;
 
 /*
  * Obtain the current tick count, setting *pxTimerListsWereSwitched to pdTRUE
  * if a tick count overflow occurred since prvSampleTimeNow() was last called.
  */
-static TickType_t prvSampleTimeNow( BaseType_t * const pxTimerListsWereSwitched ) PRIVILEGED_FUNCTION;
+    static TickType_t prvSampleTimeNow( BaseType_t * const pxTimerListsWereSwitched ) PRIVILEGED_FUNCTION;
 
 /*
  * If the timer list contains any active timers then return the expire time of
@@ -204,924 +197,948 @@ static TickType_t prvSampleTimeNow( BaseType_t * const pxTimerListsWereSwitched
  * timer list does not contain any timers then return 0 and set *pxListWasEmpty
  * to pdTRUE.
  */
-static TickType_t prvGetNextExpireTime( BaseType_t * const pxListWasEmpty ) PRIVILEGED_FUNCTION;
+    static TickType_t prvGetNextExpireTime( BaseType_t * const pxListWasEmpty ) PRIVILEGED_FUNCTION;
 
 /*
  * If a timer has expired, process it.  Otherwise, block the timer service task
  * until either a timer does expire or a command is received.
  */
-static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime, BaseType_t xListWasEmpty ) PRIVILEGED_FUNCTION;
+    static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime,
+                                            BaseType_t xListWasEmpty ) PRIVILEGED_FUNCTION;
 
 /*
  * Called after a Timer_t structure has been allocated either statically or
  * dynamically to fill in the structure's members.
  */
-static void prvInitialiseNewTimer(	const char * const pcTimerName,			/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-									const TickType_t xTimerPeriodInTicks,
-									const UBaseType_t uxAutoReload,
-									void * const pvTimerID,
-									TimerCallbackFunction_t pxCallbackFunction,
-									Timer_t *pxNewTimer ) PRIVILEGED_FUNCTION;
+    static void prvInitialiseNewTimer( const char * const pcTimerName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+                                       const TickType_t xTimerPeriodInTicks,
+                                       const UBaseType_t uxAutoReload,
+                                       void * const pvTimerID,
+                                       TimerCallbackFunction_t pxCallbackFunction,
+                                       Timer_t * pxNewTimer ) PRIVILEGED_FUNCTION;
 /*-----------------------------------------------------------*/
 
-BaseType_t xTimerCreateTimerTask( void )
-{
-BaseType_t xReturn = pdFAIL;
+    BaseType_t xTimerCreateTimerTask( void )
+    {
+        BaseType_t xReturn = pdFAIL;
 
-	/* This function is called when the scheduler is started if
-	configUSE_TIMERS is set to 1.  Check that the infrastructure used by the
-	timer service task has been created/initialised.  If timers have already
-	been created then the initialisation will already have been performed. */
-	prvCheckForValidListAndQueue();
+        /* This function is called when the scheduler is started if
+         * configUSE_TIMERS is set to 1.  Check that the infrastructure used by the
+         * timer service task has been created/initialised.  If timers have already
+         * been created then the initialisation will already have been performed. */
+        prvCheckForValidListAndQueue();
 
-	if( xTimerQueue != NULL )
-	{
-		#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-		{
-			StaticTask_t *pxTimerTaskTCBBuffer = NULL;
-			StackType_t *pxTimerTaskStackBuffer = NULL;
-			uint32_t ulTimerTaskStackSize;
+        if( xTimerQueue != NULL )
+        {
+            #if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+                {
+                    StaticTask_t * pxTimerTaskTCBBuffer = NULL;
+                    StackType_t * pxTimerTaskStackBuffer = NULL;
+                    uint32_t ulTimerTaskStackSize;
 
-			vApplicationGetTimerTaskMemory( &pxTimerTaskTCBBuffer, &pxTimerTaskStackBuffer, &ulTimerTaskStackSize );
-			xTimerTaskHandle = xTaskCreateStatic(	prvTimerTask,
-													configTIMER_SERVICE_TASK_NAME,
-													ulTimerTaskStackSize,
-													NULL,
-													( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT,
-													pxTimerTaskStackBuffer,
-													pxTimerTaskTCBBuffer );
+                    vApplicationGetTimerTaskMemory( &pxTimerTaskTCBBuffer, &pxTimerTaskStackBuffer, &ulTimerTaskStackSize );
+                    xTimerTaskHandle = xTaskCreateStatic( prvTimerTask,
+                                                          configTIMER_SERVICE_TASK_NAME,
+                                                          ulTimerTaskStackSize,
+                                                          NULL,
+                                                          ( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT,
+                                                          pxTimerTaskStackBuffer,
+                                                          pxTimerTaskTCBBuffer );
 
-			if( xTimerTaskHandle != NULL )
-			{
-				xReturn = pdPASS;
-			}
-		}
-		#else
-		{
-			xReturn = xTaskCreate(	prvTimerTask,
-									configTIMER_SERVICE_TASK_NAME,
-									configTIMER_TASK_STACK_DEPTH,
-									NULL,
-									( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT,
-									&xTimerTaskHandle );
-		}
-		#endif /* configSUPPORT_STATIC_ALLOCATION */
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+                    if( xTimerTaskHandle != NULL )
+                    {
+                        xReturn = pdPASS;
+                    }
+                }
+            #else /* if ( configSUPPORT_STATIC_ALLOCATION == 1 ) */
+                {
+                    xReturn = xTaskCreate( prvTimerTask,
+                                           configTIMER_SERVICE_TASK_NAME,
+                                           configTIMER_TASK_STACK_DEPTH,
+                                           NULL,
+                                           ( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT,
+                                           &xTimerTaskHandle );
+                }
+            #endif /* configSUPPORT_STATIC_ALLOCATION */
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
 
-	configASSERT( xReturn );
-	return xReturn;
-}
+        configASSERT( xReturn );
+        return xReturn;
+    }
 /*-----------------------------------------------------------*/
 
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+    #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
 
-	TimerHandle_t xTimerCreate(	const char * const pcTimerName,			/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-								const TickType_t xTimerPeriodInTicks,
-								const UBaseType_t uxAutoReload,
-								void * const pvTimerID,
-								TimerCallbackFunction_t pxCallbackFunction )
-	{
-	Timer_t *pxNewTimer;
+        TimerHandle_t xTimerCreate( const char * const pcTimerName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+                                    const TickType_t xTimerPeriodInTicks,
+                                    const UBaseType_t uxAutoReload,
+                                    void * const pvTimerID,
+                                    TimerCallbackFunction_t pxCallbackFunction )
+        {
+            Timer_t * pxNewTimer;
 
-		pxNewTimer = ( Timer_t * ) pvPortMalloc( sizeof( Timer_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of Timer_t is always a pointer to the timer's mame. */
+            pxNewTimer = ( Timer_t * ) pvPortMalloc( sizeof( Timer_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of Timer_t is always a pointer to the timer's mame. */
 
-		if( pxNewTimer != NULL )
-		{
-			/* Status is thus far zero as the timer is not created statically
-			and has not been started.  The auto-reload bit may get set in
-			prvInitialiseNewTimer. */
-			pxNewTimer->ucStatus = 0x00;
-			prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer );
-		}
+            if( pxNewTimer != NULL )
+            {
+                /* Status is thus far zero as the timer is not created statically
+                 * and has not been started.  The auto-reload bit may get set in
+                 * prvInitialiseNewTimer. */
+                pxNewTimer->ucStatus = 0x00;
+                prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer );
+            }
 
-		return pxNewTimer;
-	}
+            return pxNewTimer;
+        }
 
-#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
+    #endif /* configSUPPORT_DYNAMIC_ALLOCATION */
 /*-----------------------------------------------------------*/
 
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+    #if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
-	TimerHandle_t xTimerCreateStatic(	const char * const pcTimerName,		/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-										const TickType_t xTimerPeriodInTicks,
-										const UBaseType_t uxAutoReload,
-										void * const pvTimerID,
-										TimerCallbackFunction_t pxCallbackFunction,
-										StaticTimer_t *pxTimerBuffer )
-	{
-	Timer_t *pxNewTimer;
+        TimerHandle_t xTimerCreateStatic( const char * const pcTimerName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+                                          const TickType_t xTimerPeriodInTicks,
+                                          const UBaseType_t uxAutoReload,
+                                          void * const pvTimerID,
+                                          TimerCallbackFunction_t pxCallbackFunction,
+                                          StaticTimer_t * pxTimerBuffer )
+        {
+            Timer_t * pxNewTimer;
 
-		#if( configASSERT_DEFINED == 1 )
-		{
-			/* Sanity check that the size of the structure used to declare a
-			variable of type StaticTimer_t equals the size of the real timer
-			structure. */
-			volatile size_t xSize = sizeof( StaticTimer_t );
-			configASSERT( xSize == sizeof( Timer_t ) );
-			( void ) xSize; /* Keeps lint quiet when configASSERT() is not defined. */
-		}
-		#endif /* configASSERT_DEFINED */
+            #if ( configASSERT_DEFINED == 1 )
+                {
+                    /* Sanity check that the size of the structure used to declare a
+                     * variable of type StaticTimer_t equals the size of the real timer
+                     * structure. */
+                    volatile size_t xSize = sizeof( StaticTimer_t );
+                    configASSERT( xSize == sizeof( Timer_t ) );
+                    ( void ) xSize; /* Keeps lint quiet when configASSERT() is not defined. */
+                }
+            #endif /* configASSERT_DEFINED */
 
-		/* A pointer to a StaticTimer_t structure MUST be provided, use it. */
-		configASSERT( pxTimerBuffer );
-		pxNewTimer = ( Timer_t * ) pxTimerBuffer; /*lint !e740 !e9087 StaticTimer_t is a pointer to a Timer_t, so guaranteed to be aligned and sized correctly (checked by an assert()), so this is safe. */
+            /* A pointer to a StaticTimer_t structure MUST be provided, use it. */
+            configASSERT( pxTimerBuffer );
+            pxNewTimer = ( Timer_t * ) pxTimerBuffer; /*lint !e740 !e9087 StaticTimer_t is a pointer to a Timer_t, so guaranteed to be aligned and sized correctly (checked by an assert()), so this is safe. */
 
-		if( pxNewTimer != NULL )
-		{
-			/* Timers can be created statically or dynamically so note this
-			timer was created statically in case it is later deleted.  The
-			auto-reload bit may get set in prvInitialiseNewTimer(). */
-			pxNewTimer->ucStatus = tmrSTATUS_IS_STATICALLY_ALLOCATED;
+            if( pxNewTimer != NULL )
+            {
+                /* Timers can be created statically or dynamically so note this
+                 * timer was created statically in case it is later deleted.  The
+                 * auto-reload bit may get set in prvInitialiseNewTimer(). */
+                pxNewTimer->ucStatus = tmrSTATUS_IS_STATICALLY_ALLOCATED;
 
-			prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer );
-		}
+                prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer );
+            }
 
-		return pxNewTimer;
-	}
+            return pxNewTimer;
+        }
 
-#endif /* configSUPPORT_STATIC_ALLOCATION */
+    #endif /* configSUPPORT_STATIC_ALLOCATION */
 /*-----------------------------------------------------------*/
 
-static void prvInitialiseNewTimer(	const char * const pcTimerName,			/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-									const TickType_t xTimerPeriodInTicks,
-									const UBaseType_t uxAutoReload,
-									void * const pvTimerID,
-									TimerCallbackFunction_t pxCallbackFunction,
-									Timer_t *pxNewTimer )
-{
-	/* 0 is not a valid value for xTimerPeriodInTicks. */
-	configASSERT( ( xTimerPeriodInTicks > 0 ) );
+    static void prvInitialiseNewTimer( const char * const pcTimerName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+                                       const TickType_t xTimerPeriodInTicks,
+                                       const UBaseType_t uxAutoReload,
+                                       void * const pvTimerID,
+                                       TimerCallbackFunction_t pxCallbackFunction,
+                                       Timer_t * pxNewTimer )
+    {
+        /* 0 is not a valid value for xTimerPeriodInTicks. */
+        configASSERT( ( xTimerPeriodInTicks > 0 ) );
 
-	if( pxNewTimer != NULL )
-	{
-		/* Ensure the infrastructure used by the timer service task has been
-		created/initialised. */
-		prvCheckForValidListAndQueue();
+        if( pxNewTimer != NULL )
+        {
+            /* Ensure the infrastructure used by the timer service task has been
+             * created/initialised. */
+            prvCheckForValidListAndQueue();
 
-		/* Initialise the timer structure members using the function
-		parameters. */
-		pxNewTimer->pcTimerName = pcTimerName;
-		pxNewTimer->xTimerPeriodInTicks = xTimerPeriodInTicks;
-		pxNewTimer->pvTimerID = pvTimerID;
-		pxNewTimer->pxCallbackFunction = pxCallbackFunction;
-		vListInitialiseItem( &( pxNewTimer->xTimerListItem ) );
-		if( uxAutoReload != pdFALSE )
-		{
-			pxNewTimer->ucStatus |= tmrSTATUS_IS_AUTORELOAD;
-		}
-		traceTIMER_CREATE( pxNewTimer );
-	}
-}
+            /* Initialise the timer structure members using the function
+             * parameters. */
+            pxNewTimer->pcTimerName = pcTimerName;
+            pxNewTimer->xTimerPeriodInTicks = xTimerPeriodInTicks;
+            pxNewTimer->pvTimerID = pvTimerID;
+            pxNewTimer->pxCallbackFunction = pxCallbackFunction;
+            vListInitialiseItem( &( pxNewTimer->xTimerListItem ) );
+
+            if( uxAutoReload != pdFALSE )
+            {
+                pxNewTimer->ucStatus |= tmrSTATUS_IS_AUTORELOAD;
+            }
+
+            traceTIMER_CREATE( pxNewTimer );
+        }
+    }
 /*-----------------------------------------------------------*/
 
-BaseType_t xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait )
-{
-BaseType_t xReturn = pdFAIL;
-DaemonTaskMessage_t xMessage;
+    BaseType_t xTimerGenericCommand( TimerHandle_t xTimer,
+                                     const BaseType_t xCommandID,
+                                     const TickType_t xOptionalValue,
+                                     BaseType_t * const pxHigherPriorityTaskWoken,
+                                     const TickType_t xTicksToWait )
+    {
+        BaseType_t xReturn = pdFAIL;
+        DaemonTaskMessage_t xMessage;
 
-	configASSERT( xTimer );
+        configASSERT( xTimer );
 
-	/* Send a message to the timer service task to perform a particular action
-	on a particular timer definition. */
-	if( xTimerQueue != NULL )
-	{
-		/* Send a command to the timer service task to start the xTimer timer. */
-		xMessage.xMessageID = xCommandID;
-		xMessage.u.xTimerParameters.xMessageValue = xOptionalValue;
-		xMessage.u.xTimerParameters.pxTimer = xTimer;
+        /* Send a message to the timer service task to perform a particular action
+         * on a particular timer definition. */
+        if( xTimerQueue != NULL )
+        {
+            /* Send a command to the timer service task to start the xTimer timer. */
+            xMessage.xMessageID = xCommandID;
+            xMessage.u.xTimerParameters.xMessageValue = xOptionalValue;
+            xMessage.u.xTimerParameters.pxTimer = xTimer;
 
-		if( xCommandID < tmrFIRST_FROM_ISR_COMMAND )
-		{
-			if( xTaskGetSchedulerState() == taskSCHEDULER_RUNNING )
-			{
-				xReturn = xQueueSendToBack( xTimerQueue, &xMessage, xTicksToWait );
-			}
-			else
-			{
-				xReturn = xQueueSendToBack( xTimerQueue, &xMessage, tmrNO_DELAY );
-			}
-		}
-		else
-		{
-			xReturn = xQueueSendToBackFromISR( xTimerQueue, &xMessage, pxHigherPriorityTaskWoken );
-		}
+            if( xCommandID < tmrFIRST_FROM_ISR_COMMAND )
+            {
+                if( xTaskGetSchedulerState() == taskSCHEDULER_RUNNING )
+                {
+                    xReturn = xQueueSendToBack( xTimerQueue, &xMessage, xTicksToWait );
+                }
+                else
+                {
+                    xReturn = xQueueSendToBack( xTimerQueue, &xMessage, tmrNO_DELAY );
+                }
+            }
+            else
+            {
+                xReturn = xQueueSendToBackFromISR( xTimerQueue, &xMessage, pxHigherPriorityTaskWoken );
+            }
 
-		traceTIMER_COMMAND_SEND( xTimer, xCommandID, xOptionalValue, xReturn );
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
+            traceTIMER_COMMAND_SEND( xTimer, xCommandID, xOptionalValue, xReturn );
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
 
-	return xReturn;
-}
+        return xReturn;
+    }
 /*-----------------------------------------------------------*/
 
-TaskHandle_t xTimerGetTimerDaemonTaskHandle( void )
-{
-	/* If xTimerGetTimerDaemonTaskHandle() is called before the scheduler has been
-	started, then xTimerTaskHandle will be NULL. */
-	configASSERT( ( xTimerTaskHandle != NULL ) );
-	return xTimerTaskHandle;
-}
+    TaskHandle_t xTimerGetTimerDaemonTaskHandle( void )
+    {
+        /* If xTimerGetTimerDaemonTaskHandle() is called before the scheduler has been
+         * started, then xTimerTaskHandle will be NULL. */
+        configASSERT( ( xTimerTaskHandle != NULL ) );
+        return xTimerTaskHandle;
+    }
 /*-----------------------------------------------------------*/
 
-TickType_t xTimerGetPeriod( TimerHandle_t xTimer )
-{
-Timer_t *pxTimer = xTimer;
+    TickType_t xTimerGetPeriod( TimerHandle_t xTimer )
+    {
+        Timer_t * pxTimer = xTimer;
 
-	configASSERT( xTimer );
-	return pxTimer->xTimerPeriodInTicks;
-}
+        configASSERT( xTimer );
+        return pxTimer->xTimerPeriodInTicks;
+    }
 /*-----------------------------------------------------------*/
 
-void vTimerSetReloadMode( TimerHandle_t xTimer, const UBaseType_t uxAutoReload )
-{
-Timer_t * pxTimer =  xTimer;
+    void vTimerSetReloadMode( TimerHandle_t xTimer,
+                              const UBaseType_t uxAutoReload )
+    {
+        Timer_t * pxTimer = xTimer;
 
-	configASSERT( xTimer );
-	taskENTER_CRITICAL();
-	{
-		if( uxAutoReload != pdFALSE )
-		{
-			pxTimer->ucStatus |= tmrSTATUS_IS_AUTORELOAD;
-		}
-		else
-		{
-			pxTimer->ucStatus &= ~tmrSTATUS_IS_AUTORELOAD;
-		}
-	}
-	taskEXIT_CRITICAL();
-}
+        configASSERT( xTimer );
+        taskENTER_CRITICAL();
+        {
+            if( uxAutoReload != pdFALSE )
+            {
+                pxTimer->ucStatus |= tmrSTATUS_IS_AUTORELOAD;
+            }
+            else
+            {
+                pxTimer->ucStatus &= ~tmrSTATUS_IS_AUTORELOAD;
+            }
+        }
+        taskEXIT_CRITICAL();
+    }
 /*-----------------------------------------------------------*/
 
-UBaseType_t uxTimerGetReloadMode( TimerHandle_t xTimer )
-{
-Timer_t * pxTimer =  xTimer;
-UBaseType_t uxReturn;
+    UBaseType_t uxTimerGetReloadMode( TimerHandle_t xTimer )
+    {
+        Timer_t * pxTimer = xTimer;
+        UBaseType_t uxReturn;
 
-	configASSERT( xTimer );
-	taskENTER_CRITICAL();
-	{
-		if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) == 0 )
-		{
-			/* Not an auto-reload timer. */
-			uxReturn = ( UBaseType_t ) pdFALSE;
-		}
-		else
-		{
-			/* Is an auto-reload timer. */
-			uxReturn = ( UBaseType_t ) pdTRUE;
-		}
-	}
-	taskEXIT_CRITICAL();
+        configASSERT( xTimer );
+        taskENTER_CRITICAL();
+        {
+            if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) == 0 )
+            {
+                /* Not an auto-reload timer. */
+                uxReturn = ( UBaseType_t ) pdFALSE;
+            }
+            else
+            {
+                /* Is an auto-reload timer. */
+                uxReturn = ( UBaseType_t ) pdTRUE;
+            }
+        }
+        taskEXIT_CRITICAL();
 
-	return uxReturn;
-}
+        return uxReturn;
+    }
 /*-----------------------------------------------------------*/
 
-TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer )
-{
-Timer_t * pxTimer =  xTimer;
-TickType_t xReturn;
+    TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer )
+    {
+        Timer_t * pxTimer = xTimer;
+        TickType_t xReturn;
 
-	configASSERT( xTimer );
-	xReturn = listGET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ) );
-	return xReturn;
-}
+        configASSERT( xTimer );
+        xReturn = listGET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ) );
+        return xReturn;
+    }
 /*-----------------------------------------------------------*/
 
-const char * pcTimerGetName( TimerHandle_t xTimer ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-{
-Timer_t *pxTimer = xTimer;
+    const char * pcTimerGetName( TimerHandle_t xTimer ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+    {
+        Timer_t * pxTimer = xTimer;
 
-	configASSERT( xTimer );
-	return pxTimer->pcTimerName;
-}
+        configASSERT( xTimer );
+        return pxTimer->pcTimerName;
+    }
 /*-----------------------------------------------------------*/
 
-static void prvProcessExpiredTimer( const TickType_t xNextExpireTime, const TickType_t xTimeNow )
-{
-BaseType_t xResult;
-Timer_t * const pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+    static void prvProcessExpiredTimer( const TickType_t xNextExpireTime,
+                                        const TickType_t xTimeNow )
+    {
+        BaseType_t xResult;
+        Timer_t * const pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 
-	/* Remove the timer from the list of active timers.  A check has already
-	been performed to ensure the list is not empty. */
-	( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
-	traceTIMER_EXPIRED( pxTimer );
+        /* Remove the timer from the list of active timers.  A check has already
+         * been performed to ensure the list is not empty. */
 
-	/* If the timer is an auto-reload timer then calculate the next
-	expiry time and re-insert the timer in the list of active timers. */
-	if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
-	{
-		/* The timer is inserted into a list using a time relative to anything
-		other than the current time.  It will therefore be inserted into the
-		correct list relative to the time this task thinks it is now. */
-		if( prvInsertTimerInActiveList( pxTimer, ( xNextExpireTime + pxTimer->xTimerPeriodInTicks ), xTimeNow, xNextExpireTime ) != pdFALSE )
-		{
-			/* The timer expired before it was added to the active timer
-			list.  Reload it now.  */
-			xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
-			configASSERT( xResult );
-			( void ) xResult;
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	else
-	{
-		pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
-		mtCOVERAGE_TEST_MARKER();
-	}
+        ( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
+        traceTIMER_EXPIRED( pxTimer );
 
-	/* Call the timer callback. */
-	pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
-}
+        /* If the timer is an auto-reload timer then calculate the next
+         * expiry time and re-insert the timer in the list of active timers. */
+        if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
+        {
+            /* The timer is inserted into a list using a time relative to anything
+             * other than the current time.  It will therefore be inserted into the
+             * correct list relative to the time this task thinks it is now. */
+            if( prvInsertTimerInActiveList( pxTimer, ( xNextExpireTime + pxTimer->xTimerPeriodInTicks ), xTimeNow, xNextExpireTime ) != pdFALSE )
+            {
+                /* The timer expired before it was added to the active timer
+                 * list.  Reload it now.  */
+                xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
+                configASSERT( xResult );
+                ( void ) xResult;
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        else
+        {
+            pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
+            mtCOVERAGE_TEST_MARKER();
+        }
+
+        /* Call the timer callback. */
+        pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
+    }
 /*-----------------------------------------------------------*/
 
-static portTASK_FUNCTION( prvTimerTask, pvParameters )
-{
-TickType_t xNextExpireTime;
-BaseType_t xListWasEmpty;
+    static portTASK_FUNCTION( prvTimerTask, pvParameters )
+    {
+        TickType_t xNextExpireTime;
+        BaseType_t xListWasEmpty;
 
-	/* Just to avoid compiler warnings. */
-	( void ) pvParameters;
+        /* Just to avoid compiler warnings. */
+        ( void ) pvParameters;
 
-	#if( configUSE_DAEMON_TASK_STARTUP_HOOK == 1 )
-	{
-		extern void vApplicationDaemonTaskStartupHook( void );
+        #if ( configUSE_DAEMON_TASK_STARTUP_HOOK == 1 )
+            {
+                extern void vApplicationDaemonTaskStartupHook( void );
 
-		/* Allow the application writer to execute some code in the context of
-		this task at the point the task starts executing.  This is useful if the
-		application includes initialisation code that would benefit from
-		executing after the scheduler has been started. */
-		vApplicationDaemonTaskStartupHook();
-	}
-	#endif /* configUSE_DAEMON_TASK_STARTUP_HOOK */
+                /* Allow the application writer to execute some code in the context of
+                 * this task at the point the task starts executing.  This is useful if the
+                 * application includes initialisation code that would benefit from
+                 * executing after the scheduler has been started. */
+                vApplicationDaemonTaskStartupHook();
+            }
+        #endif /* configUSE_DAEMON_TASK_STARTUP_HOOK */
 
-	for( ;; )
-	{
-		/* Query the timers list to see if it contains any timers, and if so,
-		obtain the time at which the next timer will expire. */
-		xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty );
+        for( ; ; )
+        {
+            /* Query the timers list to see if it contains any timers, and if so,
+             * obtain the time at which the next timer will expire. */
+            xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty );
 
-		/* If a timer has expired, process it.  Otherwise, block this task
-		until either a timer does expire, or a command is received. */
-		prvProcessTimerOrBlockTask( xNextExpireTime, xListWasEmpty );
+            /* If a timer has expired, process it.  Otherwise, block this task
+             * until either a timer does expire, or a command is received. */
+            prvProcessTimerOrBlockTask( xNextExpireTime, xListWasEmpty );
 
-		/* Empty the command queue. */
-		prvProcessReceivedCommands();
-	}
-}
+            /* Empty the command queue. */
+            prvProcessReceivedCommands();
+        }
+    }
 /*-----------------------------------------------------------*/
 
-static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime, BaseType_t xListWasEmpty )
-{
-TickType_t xTimeNow;
-BaseType_t xTimerListsWereSwitched;
+    static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime,
+                                            BaseType_t xListWasEmpty )
+    {
+        TickType_t xTimeNow;
+        BaseType_t xTimerListsWereSwitched;
 
-	vTaskSuspendAll();
-	{
-		/* Obtain the time now to make an assessment as to whether the timer
-		has expired or not.  If obtaining the time causes the lists to switch
-		then don't process this timer as any timers that remained in the list
-		when the lists were switched will have been processed within the
-		prvSampleTimeNow() function. */
-		xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
-		if( xTimerListsWereSwitched == pdFALSE )
-		{
-			/* The tick count has not overflowed, has the timer expired? */
-			if( ( xListWasEmpty == pdFALSE ) && ( xNextExpireTime <= xTimeNow ) )
-			{
-				( void ) xTaskResumeAll();
-				prvProcessExpiredTimer( xNextExpireTime, xTimeNow );
-			}
-			else
-			{
-				/* The tick count has not overflowed, and the next expire
-				time has not been reached yet.  This task should therefore
-				block to wait for the next expire time or a command to be
-				received - whichever comes first.  The following line cannot
-				be reached unless xNextExpireTime > xTimeNow, except in the
-				case when the current timer list is empty. */
-				if( xListWasEmpty != pdFALSE )
-				{
-					/* The current timer list is empty - is the overflow list
-					also empty? */
-					xListWasEmpty = listLIST_IS_EMPTY( pxOverflowTimerList );
-				}
+        vTaskSuspendAll();
+        {
+            /* Obtain the time now to make an assessment as to whether the timer
+             * has expired or not.  If obtaining the time causes the lists to switch
+             * then don't process this timer as any timers that remained in the list
+             * when the lists were switched will have been processed within the
+             * prvSampleTimeNow() function. */
+            xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
 
-				vQueueWaitForMessageRestricted( xTimerQueue, ( xNextExpireTime - xTimeNow ), xListWasEmpty );
+            if( xTimerListsWereSwitched == pdFALSE )
+            {
+                /* The tick count has not overflowed, has the timer expired? */
+                if( ( xListWasEmpty == pdFALSE ) && ( xNextExpireTime <= xTimeNow ) )
+                {
+                    ( void ) xTaskResumeAll();
+                    prvProcessExpiredTimer( xNextExpireTime, xTimeNow );
+                }
+                else
+                {
+                    /* The tick count has not overflowed, and the next expire
+                     * time has not been reached yet.  This task should therefore
+                     * block to wait for the next expire time or a command to be
+                     * received - whichever comes first.  The following line cannot
+                     * be reached unless xNextExpireTime > xTimeNow, except in the
+                     * case when the current timer list is empty. */
+                    if( xListWasEmpty != pdFALSE )
+                    {
+                        /* The current timer list is empty - is the overflow list
+                         * also empty? */
+                        xListWasEmpty = listLIST_IS_EMPTY( pxOverflowTimerList );
+                    }
 
-				if( xTaskResumeAll() == pdFALSE )
-				{
-					/* Yield to wait for either a command to arrive, or the
-					block time to expire.  If a command arrived between the
-					critical section being exited and this yield then the yield
-					will not cause the task to block. */
-					portYIELD_WITHIN_API();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-		}
-		else
-		{
-			( void ) xTaskResumeAll();
-		}
-	}
-}
+                    vQueueWaitForMessageRestricted( xTimerQueue, ( xNextExpireTime - xTimeNow ), xListWasEmpty );
+
+                    if( xTaskResumeAll() == pdFALSE )
+                    {
+                        /* Yield to wait for either a command to arrive, or the
+                         * block time to expire.  If a command arrived between the
+                         * critical section being exited and this yield then the yield
+                         * will not cause the task to block. */
+                        portYIELD_WITHIN_API();
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
+                }
+            }
+            else
+            {
+                ( void ) xTaskResumeAll();
+            }
+        }
+    }
 /*-----------------------------------------------------------*/
 
-static TickType_t prvGetNextExpireTime( BaseType_t * const pxListWasEmpty )
-{
-TickType_t xNextExpireTime;
+    static TickType_t prvGetNextExpireTime( BaseType_t * const pxListWasEmpty )
+    {
+        TickType_t xNextExpireTime;
 
-	/* Timers are listed in expiry time order, with the head of the list
-	referencing the task that will expire first.  Obtain the time at which
-	the timer with the nearest expiry time will expire.  If there are no
-	active timers then just set the next expire time to 0.  That will cause
-	this task to unblock when the tick count overflows, at which point the
-	timer lists will be switched and the next expiry time can be
-	re-assessed.  */
-	*pxListWasEmpty = listLIST_IS_EMPTY( pxCurrentTimerList );
-	if( *pxListWasEmpty == pdFALSE )
-	{
-		xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
-	}
-	else
-	{
-		/* Ensure the task unblocks when the tick count rolls over. */
-		xNextExpireTime = ( TickType_t ) 0U;
-	}
+        /* Timers are listed in expiry time order, with the head of the list
+         * referencing the task that will expire first.  Obtain the time at which
+         * the timer with the nearest expiry time will expire.  If there are no
+         * active timers then just set the next expire time to 0.  That will cause
+         * this task to unblock when the tick count overflows, at which point the
+         * timer lists will be switched and the next expiry time can be
+         * re-assessed.  */
+        *pxListWasEmpty = listLIST_IS_EMPTY( pxCurrentTimerList );
 
-	return xNextExpireTime;
-}
+        if( *pxListWasEmpty == pdFALSE )
+        {
+            xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
+        }
+        else
+        {
+            /* Ensure the task unblocks when the tick count rolls over. */
+            xNextExpireTime = ( TickType_t ) 0U;
+        }
+
+        return xNextExpireTime;
+    }
 /*-----------------------------------------------------------*/
 
-static TickType_t prvSampleTimeNow( BaseType_t * const pxTimerListsWereSwitched )
-{
-TickType_t xTimeNow;
-PRIVILEGED_DATA static TickType_t xLastTime = ( TickType_t ) 0U; /*lint !e956 Variable is only accessible to one task. */
+    static TickType_t prvSampleTimeNow( BaseType_t * const pxTimerListsWereSwitched )
+    {
+        TickType_t xTimeNow;
+        PRIVILEGED_DATA static TickType_t xLastTime = ( TickType_t ) 0U; /*lint !e956 Variable is only accessible to one task. */
 
-	xTimeNow = xTaskGetTickCount();
+        xTimeNow = xTaskGetTickCount();
 
-	if( xTimeNow < xLastTime )
-	{
-		prvSwitchTimerLists();
-		*pxTimerListsWereSwitched = pdTRUE;
-	}
-	else
-	{
-		*pxTimerListsWereSwitched = pdFALSE;
-	}
+        if( xTimeNow < xLastTime )
+        {
+            prvSwitchTimerLists();
+            *pxTimerListsWereSwitched = pdTRUE;
+        }
+        else
+        {
+            *pxTimerListsWereSwitched = pdFALSE;
+        }
 
-	xLastTime = xTimeNow;
+        xLastTime = xTimeNow;
 
-	return xTimeNow;
-}
+        return xTimeNow;
+    }
 /*-----------------------------------------------------------*/
 
-static BaseType_t prvInsertTimerInActiveList( Timer_t * const pxTimer, const TickType_t xNextExpiryTime, const TickType_t xTimeNow, const TickType_t xCommandTime )
-{
-BaseType_t xProcessTimerNow = pdFALSE;
+    static BaseType_t prvInsertTimerInActiveList( Timer_t * const pxTimer,
+                                                  const TickType_t xNextExpiryTime,
+                                                  const TickType_t xTimeNow,
+                                                  const TickType_t xCommandTime )
+    {
+        BaseType_t xProcessTimerNow = pdFALSE;
 
-	listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xNextExpiryTime );
-	listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
+        listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xNextExpiryTime );
+        listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
 
-	if( xNextExpiryTime <= xTimeNow )
-	{
-		/* Has the expiry time elapsed between the command to start/reset a
-		timer was issued, and the time the command was processed? */
-		if( ( ( TickType_t ) ( xTimeNow - xCommandTime ) ) >= pxTimer->xTimerPeriodInTicks ) /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-		{
-			/* The time between a command being issued and the command being
-			processed actually exceeds the timers period.  */
-			xProcessTimerNow = pdTRUE;
-		}
-		else
-		{
-			vListInsert( pxOverflowTimerList, &( pxTimer->xTimerListItem ) );
-		}
-	}
-	else
-	{
-		if( ( xTimeNow < xCommandTime ) && ( xNextExpiryTime >= xCommandTime ) )
-		{
-			/* If, since the command was issued, the tick count has overflowed
-			but the expiry time has not, then the timer must have already passed
-			its expiry time and should be processed immediately. */
-			xProcessTimerNow = pdTRUE;
-		}
-		else
-		{
-			vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
-		}
-	}
+        if( xNextExpiryTime <= xTimeNow )
+        {
+            /* Has the expiry time elapsed between the command to start/reset a
+             * timer was issued, and the time the command was processed? */
+            if( ( ( TickType_t ) ( xTimeNow - xCommandTime ) ) >= pxTimer->xTimerPeriodInTicks ) /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+            {
+                /* The time between a command being issued and the command being
+                 * processed actually exceeds the timers period.  */
+                xProcessTimerNow = pdTRUE;
+            }
+            else
+            {
+                vListInsert( pxOverflowTimerList, &( pxTimer->xTimerListItem ) );
+            }
+        }
+        else
+        {
+            if( ( xTimeNow < xCommandTime ) && ( xNextExpiryTime >= xCommandTime ) )
+            {
+                /* If, since the command was issued, the tick count has overflowed
+                 * but the expiry time has not, then the timer must have already passed
+                 * its expiry time and should be processed immediately. */
+                xProcessTimerNow = pdTRUE;
+            }
+            else
+            {
+                vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
+            }
+        }
 
-	return xProcessTimerNow;
-}
+        return xProcessTimerNow;
+    }
 /*-----------------------------------------------------------*/
 
-static void	prvProcessReceivedCommands( void )
-{
-DaemonTaskMessage_t xMessage;
-Timer_t *pxTimer;
-BaseType_t xTimerListsWereSwitched, xResult;
-TickType_t xTimeNow;
+    static void prvProcessReceivedCommands( void )
+    {
+        DaemonTaskMessage_t xMessage;
+        Timer_t * pxTimer;
+        BaseType_t xTimerListsWereSwitched, xResult;
+        TickType_t xTimeNow;
 
-	while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */
-	{
-		#if ( INCLUDE_xTimerPendFunctionCall == 1 )
-		{
-			/* Negative commands are pended function calls rather than timer
-			commands. */
-			if( xMessage.xMessageID < ( BaseType_t ) 0 )
-			{
-				const CallbackParameters_t * const pxCallback = &( xMessage.u.xCallbackParameters );
+        while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */
+        {
+            #if ( INCLUDE_xTimerPendFunctionCall == 1 )
+                {
+                    /* Negative commands are pended function calls rather than timer
+                     * commands. */
+                    if( xMessage.xMessageID < ( BaseType_t ) 0 )
+                    {
+                        const CallbackParameters_t * const pxCallback = &( xMessage.u.xCallbackParameters );
 
-				/* The timer uses the xCallbackParameters member to request a
-				callback be executed.  Check the callback is not NULL. */
-				configASSERT( pxCallback );
+                        /* The timer uses the xCallbackParameters member to request a
+                         * callback be executed.  Check the callback is not NULL. */
+                        configASSERT( pxCallback );
 
-				/* Call the function. */
-				pxCallback->pxCallbackFunction( pxCallback->pvParameter1, pxCallback->ulParameter2 );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		#endif /* INCLUDE_xTimerPendFunctionCall */
+                        /* Call the function. */
+                        pxCallback->pxCallbackFunction( pxCallback->pvParameter1, pxCallback->ulParameter2 );
+                    }
+                    else
+                    {
+                        mtCOVERAGE_TEST_MARKER();
+                    }
+                }
+            #endif /* INCLUDE_xTimerPendFunctionCall */
 
-		/* Commands that are positive are timer commands rather than pended
-		function calls. */
-		if( xMessage.xMessageID >= ( BaseType_t ) 0 )
-		{
-			/* The messages uses the xTimerParameters member to work on a
-			software timer. */
-			pxTimer = xMessage.u.xTimerParameters.pxTimer;
+            /* Commands that are positive are timer commands rather than pended
+             * function calls. */
+            if( xMessage.xMessageID >= ( BaseType_t ) 0 )
+            {
+                /* The messages uses the xTimerParameters member to work on a
+                 * software timer. */
+                pxTimer = xMessage.u.xTimerParameters.pxTimer;
 
-			if( listIS_CONTAINED_WITHIN( NULL, &( pxTimer->xTimerListItem ) ) == pdFALSE ) /*lint !e961. The cast is only redundant when NULL is passed into the macro. */
-			{
-				/* The timer is in a list, remove it. */
-				( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
+                if( listIS_CONTAINED_WITHIN( NULL, &( pxTimer->xTimerListItem ) ) == pdFALSE ) /*lint !e961. The cast is only redundant when NULL is passed into the macro. */
+                {
+                    /* The timer is in a list, remove it. */
+                    ( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
+                }
+                else
+                {
+                    mtCOVERAGE_TEST_MARKER();
+                }
 
-			traceTIMER_COMMAND_RECEIVED( pxTimer, xMessage.xMessageID, xMessage.u.xTimerParameters.xMessageValue );
+                traceTIMER_COMMAND_RECEIVED( pxTimer, xMessage.xMessageID, xMessage.u.xTimerParameters.xMessageValue );
 
-			/* In this case the xTimerListsWereSwitched parameter is not used, but
-			it must be present in the function call.  prvSampleTimeNow() must be
-			called after the message is received from xTimerQueue so there is no
-			possibility of a higher priority task adding a message to the message
-			queue with a time that is ahead of the timer daemon task (because it
-			pre-empted the timer daemon task after the xTimeNow value was set). */
-			xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
+                /* In this case the xTimerListsWereSwitched parameter is not used, but
+                 *  it must be present in the function call.  prvSampleTimeNow() must be
+                 *  called after the message is received from xTimerQueue so there is no
+                 *  possibility of a higher priority task adding a message to the message
+                 *  queue with a time that is ahead of the timer daemon task (because it
+                 *  pre-empted the timer daemon task after the xTimeNow value was set). */
+                xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
 
-			switch( xMessage.xMessageID )
-			{
-				case tmrCOMMAND_START :
-				case tmrCOMMAND_START_FROM_ISR :
-				case tmrCOMMAND_RESET :
-				case tmrCOMMAND_RESET_FROM_ISR :
-				case tmrCOMMAND_START_DONT_TRACE :
-					/* Start or restart a timer. */
-					pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE;
-					if( prvInsertTimerInActiveList( pxTimer,  xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, xTimeNow, xMessage.u.xTimerParameters.xMessageValue ) != pdFALSE )
-					{
-						/* The timer expired before it was added to the active
-						timer list.  Process it now. */
-						pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
-						traceTIMER_EXPIRED( pxTimer );
+                switch( xMessage.xMessageID )
+                {
+                    case tmrCOMMAND_START:
+                    case tmrCOMMAND_START_FROM_ISR:
+                    case tmrCOMMAND_RESET:
+                    case tmrCOMMAND_RESET_FROM_ISR:
+                    case tmrCOMMAND_START_DONT_TRACE:
+                        /* Start or restart a timer. */
+                        pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE;
 
-						if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
-						{
-							xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, NULL, tmrNO_DELAY );
-							configASSERT( xResult );
-							( void ) xResult;
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-					break;
+                        if( prvInsertTimerInActiveList( pxTimer, xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, xTimeNow, xMessage.u.xTimerParameters.xMessageValue ) != pdFALSE )
+                        {
+                            /* The timer expired before it was added to the active
+                             * timer list.  Process it now. */
+                            pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
+                            traceTIMER_EXPIRED( pxTimer );
 
-				case tmrCOMMAND_STOP :
-				case tmrCOMMAND_STOP_FROM_ISR :
-					/* The timer has already been removed from the active list. */
-					pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
-					break;
+                            if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
+                            {
+                                xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, NULL, tmrNO_DELAY );
+                                configASSERT( xResult );
+                                ( void ) xResult;
+                            }
+                            else
+                            {
+                                mtCOVERAGE_TEST_MARKER();
+                            }
+                        }
+                        else
+                        {
+                            mtCOVERAGE_TEST_MARKER();
+                        }
 
-				case tmrCOMMAND_CHANGE_PERIOD :
-				case tmrCOMMAND_CHANGE_PERIOD_FROM_ISR :
-					pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE;
-					pxTimer->xTimerPeriodInTicks = xMessage.u.xTimerParameters.xMessageValue;
-					configASSERT( ( pxTimer->xTimerPeriodInTicks > 0 ) );
+                        break;
 
-					/* The new period does not really have a reference, and can
-					be longer or shorter than the old one.  The command time is
-					therefore set to the current time, and as the period cannot
-					be zero the next expiry time can only be in the future,
-					meaning (unlike for the xTimerStart() case above) there is
-					no fail case that needs to be handled here. */
-					( void ) prvInsertTimerInActiveList( pxTimer, ( xTimeNow + pxTimer->xTimerPeriodInTicks ), xTimeNow, xTimeNow );
-					break;
+                    case tmrCOMMAND_STOP:
+                    case tmrCOMMAND_STOP_FROM_ISR:
+                        /* The timer has already been removed from the active list. */
+                        pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
+                        break;
 
-				case tmrCOMMAND_DELETE :
-					#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-					{
-						/* The timer has already been removed from the active list,
-						just free up the memory if the memory was dynamically
-						allocated. */
-						if( ( pxTimer->ucStatus & tmrSTATUS_IS_STATICALLY_ALLOCATED ) == ( uint8_t ) 0 )
-						{
-							vPortFree( pxTimer );
-						}
-						else
-						{
-							pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
-						}
-					}
-					#else
-					{
-						/* If dynamic allocation is not enabled, the memory
-						could not have been dynamically allocated. So there is
-						no need to free the memory - just mark the timer as
-						"not active". */
-						pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
-					}
-					#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
-					break;
+                    case tmrCOMMAND_CHANGE_PERIOD:
+                    case tmrCOMMAND_CHANGE_PERIOD_FROM_ISR:
+                        pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE;
+                        pxTimer->xTimerPeriodInTicks = xMessage.u.xTimerParameters.xMessageValue;
+                        configASSERT( ( pxTimer->xTimerPeriodInTicks > 0 ) );
 
-				default	:
-					/* Don't expect to get here. */
-					break;
-			}
-		}
-	}
-}
+                        /* The new period does not really have a reference, and can
+                         * be longer or shorter than the old one.  The command time is
+                         * therefore set to the current time, and as the period cannot
+                         * be zero the next expiry time can only be in the future,
+                         * meaning (unlike for the xTimerStart() case above) there is
+                         * no fail case that needs to be handled here. */
+                        ( void ) prvInsertTimerInActiveList( pxTimer, ( xTimeNow + pxTimer->xTimerPeriodInTicks ), xTimeNow, xTimeNow );
+                        break;
+
+                    case tmrCOMMAND_DELETE:
+                        #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+                            {
+                                /* The timer has already been removed from the active list,
+                                 * just free up the memory if the memory was dynamically
+                                 * allocated. */
+                                if( ( pxTimer->ucStatus & tmrSTATUS_IS_STATICALLY_ALLOCATED ) == ( uint8_t ) 0 )
+                                {
+                                    vPortFree( pxTimer );
+                                }
+                                else
+                                {
+                                    pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
+                                }
+                            }
+                        #else /* if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) */
+                            {
+                                /* If dynamic allocation is not enabled, the memory
+                                 * could not have been dynamically allocated. So there is
+                                 * no need to free the memory - just mark the timer as
+                                 * "not active". */
+                                pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
+                            }
+                        #endif /* configSUPPORT_DYNAMIC_ALLOCATION */
+                        break;
+
+                    default:
+                        /* Don't expect to get here. */
+                        break;
+                }
+            }
+        }
+    }
 /*-----------------------------------------------------------*/
 
-static void prvSwitchTimerLists( void )
-{
-TickType_t xNextExpireTime, xReloadTime;
-List_t *pxTemp;
-Timer_t *pxTimer;
-BaseType_t xResult;
+    static void prvSwitchTimerLists( void )
+    {
+        TickType_t xNextExpireTime, xReloadTime;
+        List_t * pxTemp;
+        Timer_t * pxTimer;
+        BaseType_t xResult;
 
-	/* The tick count has overflowed.  The timer lists must be switched.
-	If there are any timers still referenced from the current timer list
-	then they must have expired and should be processed before the lists
-	are switched. */
-	while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE )
-	{
-		xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
+        /* The tick count has overflowed.  The timer lists must be switched.
+         * If there are any timers still referenced from the current timer list
+         * then they must have expired and should be processed before the lists
+         * are switched. */
+        while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE )
+        {
+            xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
 
-		/* Remove the timer from the list. */
-		pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
-		( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
-		traceTIMER_EXPIRED( pxTimer );
+            /* Remove the timer from the list. */
+            pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+            ( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
+            traceTIMER_EXPIRED( pxTimer );
 
-		/* Execute its callback, then send a command to restart the timer if
-		it is an auto-reload timer.  It cannot be restarted here as the lists
-		have not yet been switched. */
-		pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
+            /* Execute its callback, then send a command to restart the timer if
+             * it is an auto-reload timer.  It cannot be restarted here as the lists
+             * have not yet been switched. */
+            pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
 
-		if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
-		{
-			/* Calculate the reload value, and if the reload value results in
-			the timer going into the same timer list then it has already expired
-			and the timer should be re-inserted into the current list so it is
-			processed again within this loop.  Otherwise a command should be sent
-			to restart the timer to ensure it is only inserted into a list after
-			the lists have been swapped. */
-			xReloadTime = ( xNextExpireTime + pxTimer->xTimerPeriodInTicks );
-			if( xReloadTime > xNextExpireTime )
-			{
-				listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xReloadTime );
-				listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
-				vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
-			}
-			else
-			{
-				xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
-				configASSERT( xResult );
-				( void ) xResult;
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
+            if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
+            {
+                /* Calculate the reload value, and if the reload value results in
+                 * the timer going into the same timer list then it has already expired
+                 * and the timer should be re-inserted into the current list so it is
+                 * processed again within this loop.  Otherwise a command should be sent
+                 * to restart the timer to ensure it is only inserted into a list after
+                 * the lists have been swapped. */
+                xReloadTime = ( xNextExpireTime + pxTimer->xTimerPeriodInTicks );
 
-	pxTemp = pxCurrentTimerList;
-	pxCurrentTimerList = pxOverflowTimerList;
-	pxOverflowTimerList = pxTemp;
-}
+                if( xReloadTime > xNextExpireTime )
+                {
+                    listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xReloadTime );
+                    listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
+                    vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
+                }
+                else
+                {
+                    xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
+                    configASSERT( xResult );
+                    ( void ) xResult;
+                }
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+
+        pxTemp = pxCurrentTimerList;
+        pxCurrentTimerList = pxOverflowTimerList;
+        pxOverflowTimerList = pxTemp;
+    }
 /*-----------------------------------------------------------*/
 
-static void prvCheckForValidListAndQueue( void )
-{
-	/* Check that the list from which active timers are referenced, and the
-	queue used to communicate with the timer service, have been
-	initialised. */
-	taskENTER_CRITICAL();
-	{
-		if( xTimerQueue == NULL )
-		{
-			vListInitialise( &xActiveTimerList1 );
-			vListInitialise( &xActiveTimerList2 );
-			pxCurrentTimerList = &xActiveTimerList1;
-			pxOverflowTimerList = &xActiveTimerList2;
+    static void prvCheckForValidListAndQueue( void )
+    {
+        /* Check that the list from which active timers are referenced, and the
+         * queue used to communicate with the timer service, have been
+         * initialised. */
+        taskENTER_CRITICAL();
+        {
+            if( xTimerQueue == NULL )
+            {
+                vListInitialise( &xActiveTimerList1 );
+                vListInitialise( &xActiveTimerList2 );
+                pxCurrentTimerList = &xActiveTimerList1;
+                pxOverflowTimerList = &xActiveTimerList2;
 
-			#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-			{
-				/* The timer queue is allocated statically in case
-				configSUPPORT_DYNAMIC_ALLOCATION is 0. */
-				static StaticQueue_t xStaticTimerQueue; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */
-				static uint8_t ucStaticTimerQueueStorage[ ( size_t ) configTIMER_QUEUE_LENGTH * sizeof( DaemonTaskMessage_t ) ]; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */
+                #if ( configSUPPORT_STATIC_ALLOCATION == 1 )
+                    {
+                        /* The timer queue is allocated statically in case
+                         * configSUPPORT_DYNAMIC_ALLOCATION is 0. */
+                        PRIVILEGED_DATA static StaticQueue_t xStaticTimerQueue;                                                                          /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */
+                        PRIVILEGED_DATA static uint8_t ucStaticTimerQueueStorage[ ( size_t ) configTIMER_QUEUE_LENGTH * sizeof( DaemonTaskMessage_t ) ]; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */
 
-				xTimerQueue = xQueueCreateStatic( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, ( UBaseType_t ) sizeof( DaemonTaskMessage_t ), &( ucStaticTimerQueueStorage[ 0 ] ), &xStaticTimerQueue );
-			}
-			#else
-			{
-				xTimerQueue = xQueueCreate( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, sizeof( DaemonTaskMessage_t ) );
-			}
-			#endif
+                        xTimerQueue = xQueueCreateStatic( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, ( UBaseType_t ) sizeof( DaemonTaskMessage_t ), &( ucStaticTimerQueueStorage[ 0 ] ), &xStaticTimerQueue );
+                    }
+                #else
+                    {
+                        xTimerQueue = xQueueCreate( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, sizeof( DaemonTaskMessage_t ) );
+                    }
+                #endif /* if ( configSUPPORT_STATIC_ALLOCATION == 1 ) */
 
-			#if ( configQUEUE_REGISTRY_SIZE > 0 )
-			{
-				if( xTimerQueue != NULL )
-				{
-					vQueueAddToRegistry( xTimerQueue, "TmrQ" );
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			#endif /* configQUEUE_REGISTRY_SIZE */
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	taskEXIT_CRITICAL();
-}
+                #if ( configQUEUE_REGISTRY_SIZE > 0 )
+                    {
+                        if( xTimerQueue != NULL )
+                        {
+                            vQueueAddToRegistry( xTimerQueue, "TmrQ" );
+                        }
+                        else
+                        {
+                            mtCOVERAGE_TEST_MARKER();
+                        }
+                    }
+                #endif /* configQUEUE_REGISTRY_SIZE */
+            }
+            else
+            {
+                mtCOVERAGE_TEST_MARKER();
+            }
+        }
+        taskEXIT_CRITICAL();
+    }
 /*-----------------------------------------------------------*/
 
-BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer )
-{
-BaseType_t xReturn;
-Timer_t *pxTimer = xTimer;
+    BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer )
+    {
+        BaseType_t xReturn;
+        Timer_t * pxTimer = xTimer;
 
-	configASSERT( xTimer );
+        configASSERT( xTimer );
 
-	/* Is the timer in the list of active timers? */
-	taskENTER_CRITICAL();
-	{
-		if( ( pxTimer->ucStatus & tmrSTATUS_IS_ACTIVE ) == 0 )
-		{
-			xReturn = pdFALSE;
-		}
-		else
-		{
-			xReturn = pdTRUE;
-		}
-	}
-	taskEXIT_CRITICAL();
+        /* Is the timer in the list of active timers? */
+        taskENTER_CRITICAL();
+        {
+            if( ( pxTimer->ucStatus & tmrSTATUS_IS_ACTIVE ) == 0 )
+            {
+                xReturn = pdFALSE;
+            }
+            else
+            {
+                xReturn = pdTRUE;
+            }
+        }
+        taskEXIT_CRITICAL();
 
-	return xReturn;
-} /*lint !e818 Can't be pointer to const due to the typedef. */
+        return xReturn;
+    } /*lint !e818 Can't be pointer to const due to the typedef. */
 /*-----------------------------------------------------------*/
 
-void *pvTimerGetTimerID( const TimerHandle_t xTimer )
-{
-Timer_t * const pxTimer = xTimer;
-void *pvReturn;
+    void * pvTimerGetTimerID( const TimerHandle_t xTimer )
+    {
+        Timer_t * const pxTimer = xTimer;
+        void * pvReturn;
 
-	configASSERT( xTimer );
+        configASSERT( xTimer );
 
-	taskENTER_CRITICAL();
-	{
-		pvReturn = pxTimer->pvTimerID;
-	}
-	taskEXIT_CRITICAL();
+        taskENTER_CRITICAL();
+        {
+            pvReturn = pxTimer->pvTimerID;
+        }
+        taskEXIT_CRITICAL();
 
-	return pvReturn;
-}
+        return pvReturn;
+    }
 /*-----------------------------------------------------------*/
 
-void vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID )
-{
-Timer_t * const pxTimer = xTimer;
+    void vTimerSetTimerID( TimerHandle_t xTimer,
+                           void * pvNewID )
+    {
+        Timer_t * const pxTimer = xTimer;
 
-	configASSERT( xTimer );
+        configASSERT( xTimer );
 
-	taskENTER_CRITICAL();
-	{
-		pxTimer->pvTimerID = pvNewID;
-	}
-	taskEXIT_CRITICAL();
-}
+        taskENTER_CRITICAL();
+        {
+            pxTimer->pvTimerID = pvNewID;
+        }
+        taskEXIT_CRITICAL();
+    }
 /*-----------------------------------------------------------*/
 
-#if( INCLUDE_xTimerPendFunctionCall == 1 )
+    #if ( INCLUDE_xTimerPendFunctionCall == 1 )
 
-	BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, BaseType_t *pxHigherPriorityTaskWoken )
-	{
-	DaemonTaskMessage_t xMessage;
-	BaseType_t xReturn;
+        BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend,
+                                                  void * pvParameter1,
+                                                  uint32_t ulParameter2,
+                                                  BaseType_t * pxHigherPriorityTaskWoken )
+        {
+            DaemonTaskMessage_t xMessage;
+            BaseType_t xReturn;
 
-		/* Complete the message with the function parameters and post it to the
-		daemon task. */
-		xMessage.xMessageID = tmrCOMMAND_EXECUTE_CALLBACK_FROM_ISR;
-		xMessage.u.xCallbackParameters.pxCallbackFunction = xFunctionToPend;
-		xMessage.u.xCallbackParameters.pvParameter1 = pvParameter1;
-		xMessage.u.xCallbackParameters.ulParameter2 = ulParameter2;
+            /* Complete the message with the function parameters and post it to the
+             * daemon task. */
+            xMessage.xMessageID = tmrCOMMAND_EXECUTE_CALLBACK_FROM_ISR;
+            xMessage.u.xCallbackParameters.pxCallbackFunction = xFunctionToPend;
+            xMessage.u.xCallbackParameters.pvParameter1 = pvParameter1;
+            xMessage.u.xCallbackParameters.ulParameter2 = ulParameter2;
 
-		xReturn = xQueueSendFromISR( xTimerQueue, &xMessage, pxHigherPriorityTaskWoken );
+            xReturn = xQueueSendFromISR( xTimerQueue, &xMessage, pxHigherPriorityTaskWoken );
 
-		tracePEND_FUNC_CALL_FROM_ISR( xFunctionToPend, pvParameter1, ulParameter2, xReturn );
+            tracePEND_FUNC_CALL_FROM_ISR( xFunctionToPend, pvParameter1, ulParameter2, xReturn );
 
-		return xReturn;
-	}
+            return xReturn;
+        }
 
-#endif /* INCLUDE_xTimerPendFunctionCall */
+    #endif /* INCLUDE_xTimerPendFunctionCall */
 /*-----------------------------------------------------------*/
 
-#if( INCLUDE_xTimerPendFunctionCall == 1 )
+    #if ( INCLUDE_xTimerPendFunctionCall == 1 )
 
-	BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait )
-	{
-	DaemonTaskMessage_t xMessage;
-	BaseType_t xReturn;
+        BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend,
+                                           void * pvParameter1,
+                                           uint32_t ulParameter2,
+                                           TickType_t xTicksToWait )
+        {
+            DaemonTaskMessage_t xMessage;
+            BaseType_t xReturn;
 
-		/* This function can only be called after a timer has been created or
-		after the scheduler has been started because, until then, the timer
-		queue does not exist. */
-		configASSERT( xTimerQueue );
+            /* This function can only be called after a timer has been created or
+             * after the scheduler has been started because, until then, the timer
+             * queue does not exist. */
+            configASSERT( xTimerQueue );
 
-		/* Complete the message with the function parameters and post it to the
-		daemon task. */
-		xMessage.xMessageID = tmrCOMMAND_EXECUTE_CALLBACK;
-		xMessage.u.xCallbackParameters.pxCallbackFunction = xFunctionToPend;
-		xMessage.u.xCallbackParameters.pvParameter1 = pvParameter1;
-		xMessage.u.xCallbackParameters.ulParameter2 = ulParameter2;
+            /* Complete the message with the function parameters and post it to the
+             * daemon task. */
+            xMessage.xMessageID = tmrCOMMAND_EXECUTE_CALLBACK;
+            xMessage.u.xCallbackParameters.pxCallbackFunction = xFunctionToPend;
+            xMessage.u.xCallbackParameters.pvParameter1 = pvParameter1;
+            xMessage.u.xCallbackParameters.ulParameter2 = ulParameter2;
 
-		xReturn = xQueueSendToBack( xTimerQueue, &xMessage, xTicksToWait );
+            xReturn = xQueueSendToBack( xTimerQueue, &xMessage, xTicksToWait );
 
-		tracePEND_FUNC_CALL( xFunctionToPend, pvParameter1, ulParameter2, xReturn );
+            tracePEND_FUNC_CALL( xFunctionToPend, pvParameter1, ulParameter2, xReturn );
 
-		return xReturn;
-	}
+            return xReturn;
+        }
 
-#endif /* INCLUDE_xTimerPendFunctionCall */
+    #endif /* INCLUDE_xTimerPendFunctionCall */
 /*-----------------------------------------------------------*/
 
-#if ( configUSE_TRACE_FACILITY == 1 )
+    #if ( configUSE_TRACE_FACILITY == 1 )
 
-	UBaseType_t uxTimerGetTimerNumber( TimerHandle_t xTimer )
-	{
-		return ( ( Timer_t * ) xTimer )->uxTimerNumber;
-	}
+        UBaseType_t uxTimerGetTimerNumber( TimerHandle_t xTimer )
+        {
+            return ( ( Timer_t * ) xTimer )->uxTimerNumber;
+        }
 
-#endif /* configUSE_TRACE_FACILITY */
+    #endif /* configUSE_TRACE_FACILITY */
 /*-----------------------------------------------------------*/
 
-#if ( configUSE_TRACE_FACILITY == 1 )
+    #if ( configUSE_TRACE_FACILITY == 1 )
 
-	void vTimerSetTimerNumber( TimerHandle_t xTimer, UBaseType_t uxTimerNumber )
-	{
-		( ( Timer_t * ) xTimer )->uxTimerNumber = uxTimerNumber;
-	}
+        void vTimerSetTimerNumber( TimerHandle_t xTimer,
+                                   UBaseType_t uxTimerNumber )
+        {
+            ( ( Timer_t * ) xTimer )->uxTimerNumber = uxTimerNumber;
+        }
 
-#endif /* configUSE_TRACE_FACILITY */
+    #endif /* configUSE_TRACE_FACILITY */
 /*-----------------------------------------------------------*/
 
 /* This entire source file will be skipped if the application is not configured
-to include software timer functionality.  If you want to include software timer
-functionality then ensure configUSE_TIMERS is set to 1 in FreeRTOSConfig.h. */
+ * to include software timer functionality.  If you want to include software timer
+ * functionality then ensure configUSE_TIMERS is set to 1 in FreeRTOSConfig.h. */
 #endif /* configUSE_TIMERS == 1 */
-
-
-