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Update the demo directory to use the version 8 type naming conventions.

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This commit is contained in:
Richard Barry 2014-02-11 12:04:59 +00:00
parent c6d8892b0d
commit 5a2a8fc319
639 changed files with 3127 additions and 3470 deletions
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2
FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/FreeRTOSConfig.h
View file

@ -85,7 +85,7 @@
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( ( unsigned long ) 58982400 ) /* =14.7456MHz xtal multiplied by 4 using the PLL. */
#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
#define configTICK_RATE_HZ ( ( TickType_t ) 1000 )
#define configMAX_PRIORITIES ( 5 )
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 128 )
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 23 * 1024 ) )

4
FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/HTTP_Serv.c
View file

@ -75,8 +75,8 @@
#include "tcp.h"
/* Misc constants. */
#define tcpPOLL_DELAY ( ( portTickType ) 12 / portTICK_RATE_MS )
#define tcpCONNECTION_DELAY ( ( portTickType ) 8 / portTICK_RATE_MS )
#define tcpPOLL_DELAY ( ( TickType_t ) 12 / portTICK_PERIOD_MS )
#define tcpCONNECTION_DELAY ( ( TickType_t ) 8 / portTICK_PERIOD_MS )
/*-----------------------------------------------------------*/
/*

16
FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/TCP.c
View file

@ -127,12 +127,12 @@ device. */
#define tcpEINT0_VIC_ENABLE ( ( unsigned long ) 0x0020 )
/* Various delays used in the driver. */
#define tcpRESET_DELAY ( ( portTickType ) 16 / portTICK_RATE_MS )
#define tcpINIT_DELAY ( ( portTickType ) 500 / portTICK_RATE_MS )
#define tcpLONG_DELAY ( ( portTickType ) 500 / portTICK_RATE_MS )
#define tcpSHORT_DELAY ( ( portTickType ) 5 / portTICK_RATE_MS )
#define tcpCONNECTION_WAIT_DELAY ( ( portTickType ) 100 / portTICK_RATE_MS )
#define tcpNO_DELAY ( ( portTickType ) 0 )
#define tcpRESET_DELAY ( ( TickType_t ) 16 / portTICK_PERIOD_MS )
#define tcpINIT_DELAY ( ( TickType_t ) 500 / portTICK_PERIOD_MS )
#define tcpLONG_DELAY ( ( TickType_t ) 500 / portTICK_PERIOD_MS )
#define tcpSHORT_DELAY ( ( TickType_t ) 5 / portTICK_PERIOD_MS )
#define tcpCONNECTION_WAIT_DELAY ( ( TickType_t ) 100 / portTICK_PERIOD_MS )
#define tcpNO_DELAY ( ( TickType_t ) 0 )
/* Length of the data to read for various register reads. */
#define tcpSTATUS_READ_LEN ( ( unsigned long ) 1 )
@ -212,8 +212,8 @@ const unsigned char const ucDataEnableISR[] = { i2cCHANNEL_0_ISR_ENABLE };
const unsigned char const ucDataDisableISR[] = { i2cCHANNEL_0_ISR_DISABLE };
const unsigned char const ucDataClearInterrupt[] = { i2cCLEAR_ALL_INTERRUPTS };
static xSemaphoreHandle xMessageComplete = NULL;
xQueueHandle xTCPISRQueue = NULL;
static SemaphoreHandle_t xMessageComplete = NULL;
QueueHandle_t xTCPISRQueue = NULL;
/* Dynamically generate and send an html page. */
static void prvSendSamplePage( void );

2
FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/TCPISR.c
View file

@ -91,7 +91,7 @@ static long lDummyVariable;
*/
void vEINT0_ISR_Handler( void )
{
extern xQueueHandle xTCPISRQueue;
extern QueueHandle_t xTCPISRQueue;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* Just wake the TCP task so it knows an ISR has occurred. */

8
FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/i2c.c
View file

@ -92,7 +92,7 @@
#define i2cI2C_VIC_ENABLE ( ( unsigned long ) 0x0020 )
/* Misc constants. */
#define i2cNO_BLOCK ( ( portTickType ) 0 )
#define i2cNO_BLOCK ( ( TickType_t ) 0 )
#define i2cQUEUE_LENGTH ( ( unsigned char ) 5 )
#define i2cEXTRA_MESSAGES ( ( unsigned char ) 2 )
#define i2cREAD_TX_LEN ( ( unsigned long ) 2 )
@ -108,19 +108,19 @@ can be left free. */
static xI2CMessage xTxMessages[ i2cQUEUE_LENGTH + i2cEXTRA_MESSAGES ];
/* Function in the ARM part of the code used to create the queues. */
extern void vI2CISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxTxMessages, unsigned long **ppulBusFree );
extern void vI2CISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, QueueHandle_t *pxTxMessages, unsigned long **ppulBusFree );
/* Index to the next free message in the xTxMessages array. */
unsigned long ulNextFreeMessage = ( unsigned long ) 0;
/* Queue of messages that are waiting transmission. */
static xQueueHandle xMessagesForTx;
static QueueHandle_t xMessagesForTx;
/* Flag to indicate the state of the I2C ISR state machine. */
static unsigned long *pulBusFree;
/*-----------------------------------------------------------*/
void i2cMessage( const unsigned char * const pucMessage, long lMessageLength, unsigned char ucSlaveAddress, unsigned short usBufferAddress, unsigned long ulDirection, xSemaphoreHandle xMessageCompleteSemaphore, portTickType xBlockTime )
void i2cMessage( const unsigned char * const pucMessage, long lMessageLength, unsigned char ucSlaveAddress, unsigned short usBufferAddress, unsigned long ulDirection, SemaphoreHandle_t xMessageCompleteSemaphore, TickType_t xBlockTime )
{
extern volatile xI2CMessage *pxCurrentMessage;
xI2CMessage *pxNextFreeMessage;

4
FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/i2c.h
View file

@ -75,7 +75,7 @@ typedef struct AN_I2C_MESSAGE
unsigned char ucSlaveAddress; /*< The slave address of the WIZnet on the I2C bus. */
unsigned char ucBufferAddressLowByte; /*< The address within the WIZnet device to which data should be read from / written to. */
unsigned char ucBufferAddressHighByte; /*< As above, high byte. */
xSemaphoreHandle xMessageCompleteSemaphore; /*< Contains a reference to a semaphore if the application tasks wants notifying when the message has been transacted. */
SemaphoreHandle_t xMessageCompleteSemaphore; /*< Contains a reference to a semaphore if the application tasks wants notifying when the message has been transacted. */
unsigned char *pucBuffer; /*< Pointer to the buffer from where data will be read for transmission, or into which received data will be placed. */
} xI2CMessage;
@ -113,7 +113,7 @@ void i2cInit( void );
* become available should one not be available
* immediately.
*/
void i2cMessage( const unsigned char * const pucMessage, long lMessageLength, unsigned char ucSlaveAddress, unsigned short usBufferAddress, unsigned long ulDirection, xSemaphoreHandle xMessageCompleteSemaphore, portTickType xBlockTime );
void i2cMessage( const unsigned char * const pucMessage, long lMessageLength, unsigned char ucSlaveAddress, unsigned short usBufferAddress, unsigned long ulDirection, SemaphoreHandle_t xMessageCompleteSemaphore, TickType_t xBlockTime );
#endif

4
FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/i2cISR.c
View file

@ -125,7 +125,7 @@ typedef enum
volatile xI2CMessage *pxCurrentMessage = NULL;
/* The queue of messages waiting to be transmitted. */
static xQueueHandle xMessagesForTx;
static QueueHandle_t xMessagesForTx;
/* Flag used to indicate whether or not the ISR is amid sending a message. */
unsigned long ulBusFree = ( unsigned long ) pdTRUE;
@ -137,7 +137,7 @@ volatile long lTransactionCompleted = pdTRUE;
/*-----------------------------------------------------------*/
void vI2CISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxTxMessages, unsigned long **ppulBusFree )
void vI2CISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, QueueHandle_t *pxTxMessages, unsigned long **ppulBusFree )
{
/* Create the queues used to hold Rx and Tx characters. */
xMessagesForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( xI2CMessage * ) );

2
FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/main.c
View file

@ -303,7 +303,7 @@ unsigned long ulState;
static void prvErrorChecks( void *pvParameters )
{
portTickType xDelay = mainNO_ERROR_DELAY;
TickType_t xDelay = mainNO_ERROR_DELAY;
/* The parameters are not used. */
( void ) pvParameters;