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Preparing for maintenance release -

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Bug fix - issue introduced in V8.2.2 when the current timer list is empty and the overflow timer list is not empty.
Add PIC32MZ EF (floating point) support and update the MZ demo project to test the flop context switching.
Improve efficiency of the stack overflow checking.
Add CLI to RX71M demo.
General tidy up of new RZ and RX projects - including ensuring the UART driver copes with 0 length strings.
Add stack overflow checking to the [old] PIC24 demo.
This commit is contained in:
Richard Barry 2015-10-15 20:19:26 +00:00
parent 38cb08133d
commit 57cc3389a5
84 changed files with 4972 additions and 1813 deletions
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51
FreeRTOS/Source/portable/MPLAB/PIC32MZ/port.c
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@ -93,6 +93,8 @@
#define portIE_BIT ( 0x00000001 )
#define portEXL_BIT ( 0x00000002 )
#define portMX_BIT ( 0x01000000 ) /* Allow access to DSP instructions. */
#define portCU1_BIT ( 0x20000000 ) /* enable CP1 for parts with hardware. */
#define portFR_BIT ( 0x04000000 ) /* Enable 64 bit floating point registers. */
/* Bits within the CAUSE register. */
#define portCORE_SW_0 ( 0x00000100 )
@ -100,7 +102,16 @@
/* The EXL bit is set to ensure interrupts do not occur while the context of
the first task is being restored. */
#define portINITIAL_SR ( portIE_BIT | portEXL_BIT | portMX_BIT )
#if ( __mips_hard_float == 1 )
#define portINITIAL_SR ( portIE_BIT | portEXL_BIT | portMX_BIT | portFR_BIT | portCU1_BIT )
#else
#define portINITIAL_SR ( portIE_BIT | portEXL_BIT | portMX_BIT )
#endif
/* The initial value to store into the FPU status and control register. This is
only used on parts that support a hardware FPU. */
#define portINITIAL_FPSCR (0x1000000) /* High perf on denormal ops */
/*
By default port.c generates its tick interrupt from TIMER1. The user can
@ -184,6 +195,12 @@ StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 };
the callers stack, as some functions seem to want to do this. */
const StackType_t * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );
/* Saved as part of the task context. Set to pdFALSE if the task does not
require an FPU context. */
#if ( __mips_hard_float == 1 ) && ( configUSE_TASK_FPU_SUPPORT == 1 )
uint32_t ulTaskHasFPUContext = 0;
#endif
/*-----------------------------------------------------------*/
/*
@ -191,7 +208,8 @@ const StackType_t * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7
*/
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
{
/* Ensure byte alignment is maintained when leaving this function. */
/* Ensure 8 byte alignment is maintained when leaving this function. */
pxTopOfStack--;
pxTopOfStack--;
*pxTopOfStack = (StackType_t) 0xDEADBEEF;
@ -207,10 +225,10 @@ StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t px
pxTopOfStack--;
*pxTopOfStack = (StackType_t) pxCode; /* CP0_EPC */
pxTopOfStack -= 7; /* Includes space for AC1 - AC3. */
*pxTopOfStack = (StackType_t) 0x00000000; /* DSPControl */
pxTopOfStack--;
*pxTopOfStack = (StackType_t) 0x00000000; /* DSPControl */
pxTopOfStack -= 7; /* Includes space for AC1 - AC3. */
*pxTopOfStack = (StackType_t) portTASK_RETURN_ADDRESS; /* ra */
pxTopOfStack -= 15;
@ -218,6 +236,8 @@ StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t px
*pxTopOfStack = (StackType_t) pvParameters; /* Parameters to pass in. */
pxTopOfStack -= 15;
*pxTopOfStack = (StackType_t) pdFALSE; /*by default disable FPU context save on parts with FPU */
return pxTopOfStack;
}
/*-----------------------------------------------------------*/
@ -361,6 +381,27 @@ void vPortClearInterruptMaskFromISR( UBaseType_t uxSavedStatusRegister )
}
/*-----------------------------------------------------------*/
#if ( __mips_hard_float == 1 ) && ( configUSE_TASK_FPU_SUPPORT == 1 )
void vPortTaskUsesFPU(void)
{
extern void vPortInitialiseFPSCR( uint32_t uxFPSCRInit );
portENTER_CRITICAL();
/* Initialise the floating point status register. */
vPortInitialiseFPSCR(portINITIAL_FPSCR);
/* A task is registering the fact that it needs a FPU context. Set the
FPU flag (saved as part of the task context). */
ulTaskHasFPUContext = pdTRUE;
portEXIT_CRITICAL();
}
#endif /* __mips_hard_float == 1 */
/*-----------------------------------------------------------*/