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Remove coroutines (#874)

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* Remove co-routine centric CORTEX_LM3S102_Rowley demos.

Remove CORTEX_LM3S102_Rowley Demo2 and Demo3.
Update Demo1 to no longer use coroutines.

* Remove co-routines from MB91460_Softune demo

* FreeRTOS_96348hs_SK16FX100PMC: Remove co-routine usage.

Remove co-routine usage from FreeRTOS_96348hs_SK16FX100PMC demo.

* MB96350_Softune_Dice_Kit: Remove co-routine usage

Remove co-routines usage from MB96350_Softune_Dice_Kit demo

* AVR_Dx_IAR: Remove co-routine usage

* AVR_Dx_Atmel_Studio: Remove co-routine usage

* PIC24_MPLAB: Remove autogenerated files and add to .gitignore

* PIC24_MPLAB: Remove co-routine usage from demo

* AVR_ATMega323_IAR: Remove co-routine usage

* ColdFire_MCF52221_CodeWarrior: Remove coroutine usage

* AVR_ATMega4809_MPLAB.X: Remove co-routine usage

* AVR_ATMega4809_IAR: Remove co-routine usage

* AVR_ATMega4809_Atmel_Studio: Remove coroutine usage

* AVR_ATMega323_WinAVR: Remove coroutine usage

* AVR_Dx_MPLAB.X: Remove coroutine usage

* dsPIC_MPLAB: Remove coroutine usage

* CORTEX_LM3S102_GCC: Remove coroutines and coroutine centric demos

* CORTEX_LM3S102_GCC: Update makefile to discard unused symbols

Allows fitting in the limited ram/flash for this part.

* CORTEX_LM3S316_IAR: Remove coroutines

* Demos: Remove references to crflash.c, crhook.c, crflash.h, crhook.h

* Remove coroutine options from FreeRTOSConfig.h files

* Xilinx: Remove backup file generated by revup utility

* Demos: Remove Coroutine related config items and references

* Format CBMC FreeRTOSConfig.h

* Update URL from aws.amazon.com/freertos to github.com/FreeRTOS

* Fix copyright year and license text

* Fix license text in demo files

* Update header check excluded path list

* Add configBENCHMARK to lexicon
This commit is contained in:
Paul Bartell 2022-11-21 20:59:53 -08:00 • committed by GitHub
parent eb7fd55a49
commit 569c78fd8c
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1153 changed files with 4875 additions and 12450 deletions
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25
FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/FreeRTOSConfig.h
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@ -20,7 +20,7 @@
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://aws.amazon.com/freertos
* https://github.com/FreeRTOS
*
*/
@ -47,26 +47,26 @@
* signal which triggers a single interrupt with a fixed priority for all
* interrupt levels. Alternatively the signals can be disaggregated into unique
* interrupt events which can be vectored via a dispatch table to unique
* handlers for each interrupt source. This mechanism allows, for instance, a
* single interrupt handler for a large number of IO pins yet unique handlers
* handlers for each interrupt source. This mechanism allows, for instance, a
* single interrupt handler for a large number of IO pins yet unique handlers
* for timers and other signals.
*
*
* When operating in disaggregated mode certain restrictions apply. The
* interrupt event and status registers are shared between timers due to their
* proximity in the memory map. Similarly the software interrupt control
* registers are shared with other interrupt sources. The JTVIC maps interrupt
* levels into MIPs core interrupt levels consequently JTVIC priorities of 0, 1,
* 3, and 4 map to the MIPs core values of 1, 3, 5, and 7. The parameter
* configTIMERS_DISAGGREGATED_ISRS is used to control if the timers in register
* GIRQ23 are operating in disaggregated mode. Similarly
* levels into MIPs core interrupt levels consequently JTVIC priorities of 0, 1,
* 3, and 4 map to the MIPs core values of 1, 3, 5, and 7. The parameter
* configTIMERS_DISAGGREGATED_ISRS is used to control if the timers in register
* GIRQ23 are operating in disaggregated mode. Similarly
* configCPU_DISAGGREGATED_ISRS controls the mode for GIRQ24.
*
*
* Note:
* Disaggregated mode is the more natural manner in which to operate the ISRs
* and currently only this mode has been tested with the demo application. If
* you wish to use aggregated mode then an alternative interrupt handler scheme
* will need to be used that marshals all interrupts from a single GIRQ through
* a common handler function that tests which interrupt occurred and dispatches
* will need to be used that marshals all interrupts from a single GIRQ through
* a common handler function that tests which interrupt occurred and dispatches
* to the relevant handlers.
*/
#define configTIMERS_DISAGGREGATED_ISRS 1
@ -99,9 +99,6 @@
#define configUSE_COUNTING_SEMAPHORES 1
#define configGENERATE_RUN_TIME_STATS 0
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Software timer definitions. */
#define configUSE_TIMERS 1