mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-09-01 20:03:50 -04:00
Update ARM_CRx_No_GIC port (#1101)
This PR makes the following improvements to the ARM_CRx_No_GIC port-
1. Remove inline assembly and move all the assembly code to the portASM.S
file.
2. Add support for configUSE_TASK_FPU_SUPPORT -
- When configUSE_TASK_FPU_SUPPORT is defined to 1, tasks are created
without floating point context. Tasks that want to use floating point, need
to call portTASK_USES_FLOATING_POINT(). This is the current behavior.
- When configUSE_TASK_FPU_SUPPORT is defined to 2, each task is created
with a floating point context.
If left undefined, configUSE_TASK_FPU_SUPPORT defaults to 1 for backward compatibility.
3. The application writer can now implement vApplicationSVCHandler to handle the
SVC calls raised within the application. SVC 0 is used for the yield kernel operation
and the application can use all the SVC calls other than 0.
Signed-off-by: kar-rahul-aws <karahulx@amazon.com>
This commit is contained in:
Rahul Kar
GitHub
parent
0452603a94
commit
5588ae68c8
3 changed files with 308 additions and 148 deletions
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@ -28,14 +28,14 @@
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.text
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.arm
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.syntax unified
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.set SYS_MODE, 0x1f
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.set SVC_MODE, 0x13
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.set IRQ_MODE, 0x12
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.set SYS_MODE, 0x1f
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.set SVC_MODE, 0x13
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.set IRQ_MODE, 0x12
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.set CPSR_I_BIT, 0x80
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/* Variables and functions. */
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.extern ulMaxAPIPriorityMask
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.extern _freertos_vector_table
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.extern pxCurrentTCB
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.extern vTaskSwitchContext
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.extern vApplicationIRQHandler
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@ -47,29 +47,38 @@
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.global FreeRTOS_IRQ_Handler
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.global FreeRTOS_SVC_Handler
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.global vPortRestoreTaskContext
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.global vPortInitialiseFPSCR
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.global ulReadAPSR
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.global vPortYield
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.global vPortEnableInterrupts
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.global vPortDisableInterrupts
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.global ulPortSetInterruptMaskFromISR
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.global ulPortCountLeadingZeros
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.weak vApplicationSVCHandler
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/*-----------------------------------------------------------*/
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.macro portSAVE_CONTEXT
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/* Save the LR and SPSR onto the system mode stack before switching to
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system mode to save the remaining system mode registers. */
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SRSDB sp!, #SYS_MODE
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* system mode to save the remaining system mode registers. */
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SRSDB SP!, #SYS_MODE
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CPS #SYS_MODE
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PUSH {R0-R12, R14}
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/* Push the critical nesting count. */
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LDR R2, ulCriticalNestingConst
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LDR R2, =ulCriticalNesting
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LDR R1, [R2]
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PUSH {R1}
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/* Does the task have a floating point context that needs saving? If
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ulPortTaskHasFPUContext is 0 then no. */
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LDR R2, ulPortTaskHasFPUContextConst
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* ulPortTaskHasFPUContext is 0 then no. */
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LDR R2, =ulPortTaskHasFPUContext
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LDR R3, [R2]
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CMP R3, #0
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/* Save the floating point context, if any. */
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FMRXNE R1, FPSCR
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VMRSNE R1, FPSCR
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VPUSHNE {D0-D15}
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#if configFPU_D32 == 1
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VPUSHNE {D16-D31}
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@ -80,24 +89,24 @@
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PUSH {R3}
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/* Save the stack pointer in the TCB. */
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LDR R0, pxCurrentTCBConst
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LDR R0, =pxCurrentTCB
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LDR R1, [R0]
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STR SP, [R1]
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.endm
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; /**********************************************************************/
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/*-----------------------------------------------------------*/
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.macro portRESTORE_CONTEXT
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/* Set the SP to point to the stack of the task being restored. */
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LDR R0, pxCurrentTCBConst
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LDR R0, =pxCurrentTCB
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LDR R1, [R0]
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LDR SP, [R1]
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/* Is there a floating point context to restore? If the restored
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ulPortTaskHasFPUContext is zero then no. */
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LDR R0, ulPortTaskHasFPUContextConst
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* ulPortTaskHasFPUContext is zero then no. */
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LDR R0, =ulPortTaskHasFPUContext
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POP {R1}
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STR R1, [R0]
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CMP R1, #0
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@ -111,7 +120,7 @@
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VMSRNE FPSCR, R0
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/* Restore the critical section nesting depth. */
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LDR R0, ulCriticalNestingConst
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LDR R0, =ulCriticalNesting
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POP {R1}
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STR R1, [R0]
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@ -120,29 +129,17 @@
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POP {R0-R12, R14}
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/* Return to the task code, loading CPSR on the way. */
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RFEIA sp!
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RFEIA SP!
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.endm
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/*-----------------------------------------------------------*/
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/******************************************************************************
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* SVC handler is used to yield.
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*****************************************************************************/
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.align 4
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.type FreeRTOS_SVC_Handler, %function
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FreeRTOS_SVC_Handler:
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/* Save the context of the current task and select a new task to run. */
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portSAVE_CONTEXT
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LDR R0, vTaskSwitchContextConst
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BLX R0
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portRESTORE_CONTEXT
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/******************************************************************************
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/*
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* void vPortRestoreTaskContext( void );
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*
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* vPortRestoreTaskContext is used to start the scheduler.
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*****************************************************************************/
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*/
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.align 4
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.type vPortRestoreTaskContext, %function
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vPortRestoreTaskContext:
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@ -150,72 +147,212 @@ vPortRestoreTaskContext:
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CPS #SYS_MODE
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portRESTORE_CONTEXT
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/*-----------------------------------------------------------*/
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/*
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* void vPortInitialiseFPSCR( void );
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*
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* vPortInitialiseFPSCR is used to initialize the FPSCR register.
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*/
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.align 4
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.type vPortInitialiseFPSCR, %function
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vPortInitialiseFPSCR:
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MOV R0, #0
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VMSR FPSCR, R0
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BX LR
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/*-----------------------------------------------------------*/
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/*
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* uint32_t ulReadAPSR( void );
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*
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* ulReadAPSR is used to read the value of APSR context.
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*/
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.align 4
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.type ulReadAPSR, %function
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ulReadAPSR:
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MRS R0, APSR
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BX LR
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/*-----------------------------------------------------------*/
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/*
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* void vPortYield( void );
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*/
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.align 4
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.type vPortYield, %function
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vPortYield:
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SVC 0
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ISB
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BX LR
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/*-----------------------------------------------------------*/
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/*
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* void vPortEnableInterrupts( void );
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*/
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.align 4
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.type vPortEnableInterrupts, %function
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vPortEnableInterrupts:
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CPSIE I
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BX LR
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/*-----------------------------------------------------------*/
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/*
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* void vPortDisableInterrupts( void );
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*/
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.align 4
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.type vPortDisableInterrupts, %function
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vPortDisableInterrupts:
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CPSID I
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DSB
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ISB
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BX LR
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/*-----------------------------------------------------------*/
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/*
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* uint32_t ulPortSetInterruptMaskFromISR( void );
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*/
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.align 4
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.type ulPortSetInterruptMaskFromISR, %function
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ulPortSetInterruptMaskFromISR:
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MRS R0, CPSR
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AND R0, R0, #CPSR_I_BIT
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CPSID I
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DSB
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ISB
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BX LR
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/*-----------------------------------------------------------*/
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/*
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* void vApplicationSVCHandler( uint32_t ulSvcNumber );
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*/
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.align 4
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.type vApplicationSVCHandler, %function
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vApplicationSVCHandler:
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B vApplicationSVCHandler
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/*-----------------------------------------------------------*/
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/*
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* UBaseType_t ulPortCountLeadingZeros( UBaseType_t ulBitmap );
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*
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* According to the Procedure Call Standard for the ARM Architecture (AAPCS):
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* - Parameter ulBitmap is passed in R0.
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* - Return value must be in R0.
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*/
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.align 4
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.type ulPortCountLeadingZeros, %function
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ulPortCountLeadingZeros:
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CLZ R0, R0
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BX LR
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/*-----------------------------------------------------------*/
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/*
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* SVC handler is used to yield.
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*/
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.align 4
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.type FreeRTOS_SVC_Handler, %function
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FreeRTOS_SVC_Handler:
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PUSH { R0-R1 }
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/* ---------------------------- Get Caller SVC Number ---------------------------- */
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MRS R0, SPSR /* R0 = CPSR at the time of SVC. */
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TST R0, #0x20 /* Check Thumb bit (5) in CPSR. */
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LDRHNE R0, [LR, #-0x2] /* If Thumb, load halfword. */
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BICNE R0, R0, #0xFF00 /* And extract immidiate field (i.e. SVC number). */
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LDREQ R0, [LR, #-0x4] /* If ARM, load word. */
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BICEQ R0, R0, #0xFF000000 /* And extract immidiate field (i.e. SVC number). */
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/* --------------------------------- SVC Routing --------------------------------- */
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CMP R0, #0
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BEQ svcPortYield
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BNE svcApplicationCall
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svcPortYield:
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POP { R0-R1 }
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portSAVE_CONTEXT
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BLX vTaskSwitchContext
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portRESTORE_CONTEXT
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svcApplicationCall:
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POP { R0-R1 }
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portSAVE_CONTEXT
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BLX vApplicationSVCHandler
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portRESTORE_CONTEXT
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/*-----------------------------------------------------------*/
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.align 4
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.type FreeRTOS_IRQ_Handler, %function
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FreeRTOS_IRQ_Handler:
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/* Return to the interrupted instruction. */
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SUB lr, lr, #4
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SUB LR, LR, #4
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/* Push the return address and SPSR. */
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PUSH {lr}
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MRS lr, SPSR
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PUSH {lr}
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PUSH {LR}
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MRS LR, SPSR
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PUSH {LR}
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/* Change to supervisor mode to allow reentry. */
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CPS #0x13
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CPS #SVC_MODE
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/* Push used registers. */
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PUSH {r0-r3, r12}
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PUSH {R0-R3, R12}
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/* Increment nesting count. r3 holds the address of ulPortInterruptNesting
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for future use. r1 holds the original ulPortInterruptNesting value for
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future use. */
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LDR r3, ulPortInterruptNestingConst
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LDR r1, [r3]
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ADD r0, r1, #1
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STR r0, [r3]
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* for future use. r1 holds the original ulPortInterruptNesting value for
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* future use. */
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LDR R3, =ulPortInterruptNesting
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LDR R1, [R3]
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ADD R0, R1, #1
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STR R0, [R3]
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/* Ensure bit 2 of the stack pointer is clear. r2 holds the bit 2 value for
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future use. */
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MOV r0, sp
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AND r2, r0, #4
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SUB sp, sp, r2
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* future use. */
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MOV R0, SP
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AND R2, R0, #4
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SUB SP, SP, R2
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/* Call the interrupt handler. */
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PUSH {r0-r3, lr}
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LDR r1, vApplicationIRQHandlerConst
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BLX r1
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POP {r0-r3, lr}
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ADD sp, sp, r2
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PUSH {R0-R3, LR}
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BLX vApplicationIRQHandler
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POP {R0-R3, LR}
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ADD SP, SP, R2
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/* Disable IRQs incase vApplicationIRQHandler enabled them for re-entry. */
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CPSID i
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DSB
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ISB
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/* Write to the EOI register. */
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LDR r0, ulICCEOIRConst
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LDR r2, [r0]
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STR r0, [r2]
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LDR R0, =ulICCEOIR
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LDR R2, [R0]
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STR R0, [R2]
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/* Restore the old nesting count. */
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STR r1, [r3]
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STR R1, [R3]
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/* A context switch is never performed if the nesting count is not 0. */
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CMP r1, #0
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CMP R1, #0
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BNE exit_without_switch
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/* Did the interrupt request a context switch? r1 holds the address of
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ulPortYieldRequired and r0 the value of ulPortYieldRequired for future
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use. */
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LDR r1, ulPortYieldRequiredConst
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LDR r0, [r1]
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CMP r0, #0
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* ulPortYieldRequired and r0 the value of ulPortYieldRequired for future
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* use. */
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LDR R1, =ulPortYieldRequired
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LDR R0, [R1]
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CMP R0, #0
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BNE switch_before_exit
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exit_without_switch:
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/* No context switch. Restore used registers, LR_irq and SPSR before
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returning. */
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POP {r0-r3, r12}
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* returning. */
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POP {R0-R3, R12}
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CPS #IRQ_MODE
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POP {LR}
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MSR SPSR_cxsf, LR
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@ -224,13 +361,13 @@ exit_without_switch:
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switch_before_exit:
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/* A context switch is to be performed. Clear the context switch pending
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flag. */
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MOV r0, #0
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STR r0, [r1]
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* flag. */
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MOV R0, #0
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STR R0, [R1]
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/* Restore used registers, LR-irq and SPSR before saving the context
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to the task stack. */
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POP {r0-r3, r12}
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* to the task stack. */
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POP {R0-R3, R12}
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CPS #IRQ_MODE
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POP {LR}
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MSR SPSR_cxsf, LR
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@ -238,23 +375,15 @@ switch_before_exit:
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portSAVE_CONTEXT
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/* Call the function that selects the new task to execute.
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vTaskSwitchContext() if vTaskSwitchContext() uses LDRD or STRD
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instructions, or 8 byte aligned stack allocated data. LR does not need
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saving as a new LR will be loaded by portRESTORE_CONTEXT anyway. */
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LDR R0, vTaskSwitchContextConst
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BLX R0
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* vTaskSwitchContext() if vTaskSwitchContext() uses LDRD or STRD
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* instructions, or 8 byte aligned stack allocated data. LR does not need
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* saving as a new LR will be loaded by portRESTORE_CONTEXT anyway. */
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BLX vTaskSwitchContext
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/* Restore the context of, and branch to, the task selected to execute
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next. */
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* next. */
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portRESTORE_CONTEXT
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ulICCEOIRConst: .word ulICCEOIR
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pxCurrentTCBConst: .word pxCurrentTCB
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ulCriticalNestingConst: .word ulCriticalNesting
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ulPortTaskHasFPUContextConst: .word ulPortTaskHasFPUContext
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vTaskSwitchContextConst: .word vTaskSwitchContext
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vApplicationIRQHandlerConst: .word vApplicationIRQHandler
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ulPortInterruptNestingConst: .word ulPortInterruptNesting
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ulPortYieldRequiredConst: .word ulPortYieldRequired
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/*-----------------------------------------------------------*/
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.end
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