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Fix the comments in the CM3 and CM4 MPU Ports about the MPU Region numbers being loaded (#707)
Co-authored-by: Soren Ptak <skptak@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
This commit is contained in:
parent
6f6f656aa7
commit
54b13568e4
0
portable/GCC/ARM_CM3/port.c
Executable file → Normal file
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portable/GCC/ARM_CM3/port.c
Executable file → Normal file
8
portable/GCC/ARM_CM3_MPU/port.c
Executable file → Normal file
8
portable/GCC/ARM_CM3_MPU/port.c
Executable file → Normal file
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@ -736,8 +736,8 @@ static void prvRestoreContextOfFirstTask( void )
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" str r3, [r0] \n" /* Disable MPU. */
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" str r3, [r0] \n" /* Disable MPU. */
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" \n"
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" \n"
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" ldr r0, =0xe000ed9c \n" /* Region Base Address register. */
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" ldr r0, =0xe000ed9c \n" /* Region Base Address register. */
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" ldmia r2!, {r4-r11} \n" /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
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" ldmia r2!, {r4-r11} \n" /* Read 4 sets of MPU registers [MPU Region # 0 - 3]. */
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" stmia r0, {r4-r11} \n" /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
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" stmia r0, {r4-r11} \n" /* Write 4 sets of MPU registers [MPU Region # 0 - 3]. */
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" \n"
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" \n"
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" ldr r0, =0xe000ed94 \n" /* MPU_CTRL register. */
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" ldr r0, =0xe000ed94 \n" /* MPU_CTRL register. */
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" ldr r3, [r0] \n" /* Read the value of MPU_CTRL. */
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" ldr r3, [r0] \n" /* Read the value of MPU_CTRL. */
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@ -1011,8 +1011,8 @@ void xPortPendSVHandler( void )
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" str r3, [r0] \n" /* Disable MPU. */
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" str r3, [r0] \n" /* Disable MPU. */
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" \n"
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" \n"
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" ldr r0, =0xe000ed9c \n" /* Region Base Address register. */
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" ldr r0, =0xe000ed9c \n" /* Region Base Address register. */
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" ldmia r2!, {r4-r11} \n" /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
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" ldmia r2!, {r4-r11} \n" /* Read 4 sets of MPU registers [MPU Region # 0 - 3]. */
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" stmia r0, {r4-r11} \n" /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
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" stmia r0, {r4-r11} \n" /* Write 4 sets of MPU registers [MPU Region # 0 - 3]. */
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" \n"
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" \n"
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" ldr r0, =0xe000ed94 \n" /* MPU_CTRL register. */
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" ldr r0, =0xe000ed94 \n" /* MPU_CTRL register. */
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" ldr r3, [r0] \n" /* Read the value of MPU_CTRL. */
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" ldr r3, [r0] \n" /* Read the value of MPU_CTRL. */
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0
portable/GCC/ARM_CM4F/port.c
Executable file → Normal file
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portable/GCC/ARM_CM4F/port.c
Executable file → Normal file
20
portable/GCC/ARM_CM4_MPU/port.c
Executable file → Normal file
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portable/GCC/ARM_CM4_MPU/port.c
Executable file → Normal file
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@ -818,14 +818,14 @@ static void prvRestoreContextOfFirstTask( void )
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" str r3, [r0] \n" /* Disable MPU. */
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" str r3, [r0] \n" /* Disable MPU. */
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" \n"
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" \n"
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" ldr r0, =0xe000ed9c \n" /* Region Base Address register. */
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" ldr r0, =0xe000ed9c \n" /* Region Base Address register. */
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" ldmia r2!, {r4-r11} \n" /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
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" ldmia r2!, {r4-r11} \n" /* Read 4 sets of MPU registers [MPU Region # 0 - 3]. */
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" stmia r0, {r4-r11} \n" /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
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" stmia r0, {r4-r11} \n" /* Write 4 sets of MPU registers [MPU Region # 0 - 3]. */
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" \n"
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" \n"
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#if ( configTOTAL_MPU_REGIONS == 16 )
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#if ( configTOTAL_MPU_REGIONS == 16 )
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" ldmia r2!, {r4-r11} \n" /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
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" ldmia r2!, {r4-r11} \n" /* Read 4 sets of MPU registers [MPU Region # 4 - 8]. */
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" stmia r0, {r4-r11} \n" /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
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" stmia r0, {r4-r11} \n" /* Write 4 sets of MPU registers. [MPU Region # 4 - 8]. */
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" ldmia r2!, {r4-r11} \n" /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
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" ldmia r2!, {r4-r11} \n" /* Read 4 sets of MPU registers [MPU Region # 9 - 12]. */
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" stmia r0, {r4-r11} \n" /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
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" stmia r0, {r4-r11} \n" /* Write 4 sets of MPU registers. [MPU Region # 9 - 12]. */
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#endif /* configTOTAL_MPU_REGIONS == 16. */
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#endif /* configTOTAL_MPU_REGIONS == 16. */
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" \n"
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" \n"
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" ldr r0, =0xe000ed94 \n" /* MPU_CTRL register. */
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" ldr r0, =0xe000ed94 \n" /* MPU_CTRL register. */
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@ -1137,14 +1137,14 @@ void xPortPendSVHandler( void )
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" str r3, [r0] \n" /* Disable MPU. */
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" str r3, [r0] \n" /* Disable MPU. */
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" \n"
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" \n"
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" ldr r0, =0xe000ed9c \n" /* Region Base Address register. */
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" ldr r0, =0xe000ed9c \n" /* Region Base Address register. */
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" ldmia r2!, {r4-r11} \n" /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
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" ldmia r2!, {r4-r11} \n" /* Read 4 sets of MPU registers [MPU Region # 0 - 3]. */
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" stmia r0, {r4-r11} \n" /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
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" stmia r0, {r4-r11} \n" /* Write 4 sets of MPU registers [MPU Region # 0 - 3]. */
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" \n"
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" \n"
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#if ( configTOTAL_MPU_REGIONS == 16 )
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#if ( configTOTAL_MPU_REGIONS == 16 )
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" ldmia r2!, {r4-r11} \n" /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
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" stmia r0, {r4-r11} \n" /* Write 4 sets of MPU registers. [MPU Region # 4 - 7]. */
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" ldmia r2!, {r4-r11} \n" /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
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" ldmia r2!, {r4-r11} \n" /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
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" stmia r0, {r4-r11} \n" /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
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" stmia r0, {r4-r11} \n" /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
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" ldmia r2!, {r4-r11} \n" /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
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" stmia r0, {r4-r11} \n" /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
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#endif /* configTOTAL_MPU_REGIONS == 16. */
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#endif /* configTOTAL_MPU_REGIONS == 16. */
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" \n"
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" \n"
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" ldr r0, =0xe000ed94 \n" /* MPU_CTRL register. */
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" ldr r0, =0xe000ed94 \n" /* MPU_CTRL register. */
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@ -114,15 +114,15 @@ xPortPendSVHandler:
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str r3, [r0] /* Disable MPU. */
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str r3, [r0] /* Disable MPU. */
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ldr r0, =0xe000ed9c /* Region Base Address register. */
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ldr r0, =0xe000ed9c /* Region Base Address register. */
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ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
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ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 0 - 3]. */
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stmia r0, {r4-r11} /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
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stmia r0, {r4-r11} /* Write 4 sets of MPU registers [MPU Region # 0 - 3]. */
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#ifdef configTOTAL_MPU_REGIONS
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#ifdef configTOTAL_MPU_REGIONS
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#if ( configTOTAL_MPU_REGIONS == 16 )
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#if ( configTOTAL_MPU_REGIONS == 16 )
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ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
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stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 4 - 7]. */
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ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
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ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
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stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
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stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
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ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
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stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
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#endif /* configTOTAL_MPU_REGIONS == 16. */
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#endif /* configTOTAL_MPU_REGIONS == 16. */
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#endif
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#endif
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@ -240,15 +240,15 @@ vPortRestoreContextOfFirstTask:
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str r3, [r0] /* Disable MPU. */
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str r3, [r0] /* Disable MPU. */
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ldr r0, =0xe000ed9c /* Region Base Address register. */
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ldr r0, =0xe000ed9c /* Region Base Address register. */
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ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
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ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 0 - 3]. */
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stmia r0, {r4-r11} /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
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stmia r0, {r4-r11} /* Write 4 sets of MPU registers [MPU Region # 0 - 3]. */
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#ifdef configTOTAL_MPU_REGIONS
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#ifdef configTOTAL_MPU_REGIONS
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#if ( configTOTAL_MPU_REGIONS == 16 )
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#if ( configTOTAL_MPU_REGIONS == 16 )
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ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
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stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 4 - 7]. */
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ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
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ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
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stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
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stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
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ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
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stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
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#endif /* configTOTAL_MPU_REGIONS == 16. */
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#endif /* configTOTAL_MPU_REGIONS == 16. */
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#endif
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#endif
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@ -796,14 +796,14 @@ __asm void prvRestoreContextOfFirstTask( void )
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str r3, [r0] /* Disable MPU. */
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str r3, [r0] /* Disable MPU. */
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ldr r0, =0xe000ed9c /* Region Base Address register. */
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ldr r0, =0xe000ed9c /* Region Base Address register. */
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ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
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ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 0 - 3]. */
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stmia r0, {r4-r11} /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
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stmia r0, {r4-r11} /* Write 4 sets of MPU registers [MPU Region # 0 - 3]. */
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#if ( configTOTAL_MPU_REGIONS == 16 )
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#if ( configTOTAL_MPU_REGIONS == 16 )
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ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
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stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 4 - 7]. */
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ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
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ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
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stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
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stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
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ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
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stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
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#endif /* configTOTAL_MPU_REGIONS == 16. */
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#endif /* configTOTAL_MPU_REGIONS == 16. */
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ldr r0, =0xe000ed94 /* MPU_CTRL register. */
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ldr r0, =0xe000ed94 /* MPU_CTRL register. */
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@ -1132,14 +1132,14 @@ __asm void xPortPendSVHandler( void )
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str r3, [r0] /* Disable MPU. */
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str r3, [r0] /* Disable MPU. */
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ldr r0, =0xe000ed9c /* Region Base Address register. */
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ldr r0, =0xe000ed9c /* Region Base Address register. */
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ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
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ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 0 - 3]. */
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stmia r0, {r4-r11} /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
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stmia r0, {r4-r11} /* Write 4 sets of MPU registers [MPU Region # 0 - 3]. */
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#if ( configTOTAL_MPU_REGIONS == 16 )
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#if ( configTOTAL_MPU_REGIONS == 16 )
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ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
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stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 4 - 7]. */
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ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
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ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
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stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
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stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
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ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
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stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
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#endif /* configTOTAL_MPU_REGIONS == 16. */
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#endif /* configTOTAL_MPU_REGIONS == 16. */
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ldr r0, =0xe000ed94 /* MPU_CTRL register. */
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ldr r0, =0xe000ed94 /* MPU_CTRL register. */
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