len0rd/FreeRTOS-Kernel
1
0
Fork 0
mirror of https://github.com/FreeRTOS/FreeRTOS-Kernel.git synced 2025-08-20 01:58:32 -04:00
Code Issues Projects Releases Packages Wiki Activity

Fix the comments in the CM3 and CM4 MPU Ports about the MPU Region numbers being loaded (#707)

Browse source 
Co-authored-by: Soren Ptak <skptak@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
This commit is contained in:
Soren Ptak 2023-07-17 02:18:31 -07:00 • committed by GitHub
parent 6f6f656aa7
commit 54b13568e4
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
6 changed files with 30 additions and 30 deletions
Download patch file Download diff file Expand all files Collapse all files

16
portable/RVDS/ARM_CM4_MPU/port.c
View file

@ -796,14 +796,14 @@ __asm void prvRestoreContextOfFirstTask( void )
str r3, [r0] /* Disable MPU. */
ldr r0, =0xe000ed9c /* Region Base Address register. */
ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
stmia r0, {r4-r11} /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 0 - 3]. */
stmia r0, {r4-r11} /* Write 4 sets of MPU registers [MPU Region # 0 - 3]. */
#if ( configTOTAL_MPU_REGIONS == 16 )
ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 4 - 7]. */
ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
#endif /* configTOTAL_MPU_REGIONS == 16. */
ldr r0, =0xe000ed94 /* MPU_CTRL register. */
@ -1132,14 +1132,14 @@ __asm void xPortPendSVHandler( void )
str r3, [r0] /* Disable MPU. */
ldr r0, =0xe000ed9c /* Region Base Address register. */
ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
stmia r0, {r4-r11} /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 0 - 3]. */
stmia r0, {r4-r11} /* Write 4 sets of MPU registers [MPU Region # 0 - 3]. */
#if ( configTOTAL_MPU_REGIONS == 16 )
ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 4 - 7]. */
ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
#endif /* configTOTAL_MPU_REGIONS == 16. */
ldr r0, =0xe000ed94 /* MPU_CTRL register. */