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Optimize BaseType_t access for GCC ARM_CM4F

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hanzhijian 2026-07-31 11:40:28 +08:00
parent 4269c69a16
commit 5049e3c8f8
1 changed files with 7 additions and 0 deletions
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7
portable/GCC/ARM_CM4F/portmacro.h
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@ -117,6 +117,13 @@ typedef unsigned long UBaseType_t;
/* Critical section management. */ /* Critical section management. */
extern void vPortEnterCritical( void ); extern void vPortEnterCritical( void );
extern void vPortExitCritical( void ); extern void vPortExitCritical( void );
/* This is a single-core port where BaseType_t and UBaseType_t are 32-bit, and
* uint8_t is 8-bit. Reads and writes of these widths are atomic, so accesses
* protected by these macros do not need to enter a critical section. */
#define portBASE_TYPE_ENTER_CRITICAL()
#define portBASE_TYPE_EXIT_CRITICAL()
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI() #define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI()
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortSetBASEPRI( x ) #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortSetBASEPRI( x )
#define portDISABLE_INTERRUPTS() vPortRaiseBASEPRI() #define portDISABLE_INTERRUPTS() vPortRaiseBASEPRI()