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Add AVR32 port and demo files.
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401
Source/portable/GCC/AVR32_UC3/port.c
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Source/portable/GCC/AVR32_UC3/port.c
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/*This file has been prepared for Doxygen automatic documentation generation.*/
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/*! \file *********************************************************************
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*
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* \brief FreeRTOS port source for AVR32 UC3.
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*
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* - Compiler: GNU GCC for AVR32
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* - Supported devices: All AVR32 devices can be used.
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* - AppNote:
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*
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* \author Atmel Corporation: http://www.atmel.com \n
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* Support email: avr32@atmel.com
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*
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*****************************************************************************/
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/*
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FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry.
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This file is part of the FreeRTOS.org distribution.
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FreeRTOS.org is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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FreeRTOS.org is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with FreeRTOS.org; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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A special exception to the GPL can be applied should you wish to distribute
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a combined work that includes FreeRTOS.org, without being obliged to provide
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the source code for any proprietary components. See the licensing section
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of http://www.FreeRTOS.org for full details of how and when the exception
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can be applied.
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***************************************************************************
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See http://www.FreeRTOS.org for documentation, latest information, license
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and contact details. Please ensure to read the configuration and relevant
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port sections of the online documentation.
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***************************************************************************
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*/
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/* Standard includes. */
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#include <sys/cpu.h>
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#include <sys/usart.h>
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#include <malloc.h>
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* AVR32 UC3 includes. */
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#include <avr32/io.h>
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#include "gpio.h"
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#if( configTICK_USE_TC==1 )
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#include "tc.h"
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#endif
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/* Constants required to setup the task context. */
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#define portINITIAL_SR ( ( portSTACK_TYPE ) 0x00400000 ) /* AVR32 : [M2:M0]=001 I1M=0 I0M=0, GM=0 */
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#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 0 )
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/* Each task maintains its own critical nesting variable. */
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#define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 )
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volatile unsigned portLONG ulCriticalNesting = 9999UL;
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#if( configTICK_USE_TC==0 )
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static void prvScheduleNextTick( void );
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#endif
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/* Setup the timer to generate the tick interrupts. */
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static void prvSetupTimerInterrupt( void );
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/*-----------------------------------------------------------*/
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/*
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* Low-level initialization routine called during Newlib's startup.
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* This version comes in replacement to the default one provided by Newlib.
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* Newlib's _init_startup only calls init_exceptions, but Newlib's exception
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* vectors are not compatible with the SCALL management in the current FreeRTOS
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* port. More low-level initializations are besides added here.
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*/
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void _init_startup(void)
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{
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/* Import the Exception Vector Base Address. */
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extern void _evba;
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#if configHEAP_INIT
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extern void __heap_start__;
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extern void __heap_end__;
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portBASE_TYPE *pxMem;
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#endif
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/* Load the Exception Vector Base Address in the corresponding system register. */
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Set_system_register( AVR32_EVBA, ( int ) &_evba );
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/* Enable exceptions. */
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ENABLE_ALL_EXCEPTIONS();
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/* Initialize interrupt handling. */
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INTC_init_interrupts();
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#if configHEAP_INIT
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/* Initialize the heap used by malloc. */
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for( pxMem = &__heap_start__; pxMem < ( portBASE_TYPE * )&__heap_end__; )
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{
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*pxMem++ = 0xA5A5A5A5;
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}
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#endif
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/* Give the used CPU clock frequency to Newlib, so it can work properly. */
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set_cpu_hz( configCPU_CLOCK_HZ );
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/* Code section present if and only if the debug trace is activated. */
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#if configDBG
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/* Initialize the USART used for the debug trace with the configured parameters. */
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set_usart_base( ( void * ) configDBG_USART );
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gpio_enable_module_pin( configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION );
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gpio_enable_module_pin( configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION );
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usart_init( configDBG_USART_BAUDRATE );
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#endif
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}
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/*-----------------------------------------------------------*/
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/*
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* malloc, realloc and free are meant to be called through respectively
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* pvPortMalloc, pvPortRealloc and vPortFree.
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* The latter functions call the former ones from within sections where tasks
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* are suspended, so the latter functions are task-safe. __malloc_lock and
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* __malloc_unlock use the same mechanism to also keep the former functions
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* task-safe as they may be called directly from Newlib's functions.
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* However, all these functions are interrupt-unsafe and SHALL THEREFORE NOT BE
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* CALLED FROM WITHIN AN INTERRUPT, because __malloc_lock and __malloc_unlock do
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* not call portENTER_CRITICAL and portEXIT_CRITICAL in order not to disable
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* interrupts during memory allocation management as this may be a very time-
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* consuming process.
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*/
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/*
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* Lock routine called by Newlib on malloc / realloc / free entry to guarantee a
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* safe section as memory allocation management uses global data.
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* See the aforementioned details.
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*/
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void __malloc_lock(struct _reent *ptr)
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{
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vTaskSuspendAll();
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}
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/*
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* Unlock routine called by Newlib on malloc / realloc / free exit to guarantee
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* a safe section as memory allocation management uses global data.
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* See the aforementioned details.
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*/
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void __malloc_unlock(struct _reent *ptr)
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{
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xTaskResumeAll();
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}
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/*-----------------------------------------------------------*/
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/* Added as there is no such function in FreeRTOS. */
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void *pvPortRealloc( void *pv, size_t xWantedSize )
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{
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void *pvReturn;
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vTaskSuspendAll();
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{
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pvReturn = realloc( pv, xWantedSize );
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}
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xTaskResumeAll();
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return pvReturn;
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}
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/*-----------------------------------------------------------*/
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/* The cooperative scheduler requires a normal IRQ service routine to
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simply increment the system tick. */
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/* The preemptive scheduler is defined as "naked" as the full context is saved
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on entry as part of the context switch. */
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__attribute__((__naked__)) static void vTick( void )
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{
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/* Save the context of the interrupted task. */
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portSAVE_CONTEXT_OS_INT();
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/* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
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clock cycles from now. */
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#if( configTICK_USE_TC==1 )
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/* Clear the interrupt flag. */
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AVR32_TC.channel[configTICK_TC_CHANNEL].sr;
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#else
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prvScheduleNextTick();
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#endif
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/* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
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calls in a critical section . */
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portENTER_CRITICAL();
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vTaskIncrementTick();
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portEXIT_CRITICAL();
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/* Restore the context of the "elected task". */
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portRESTORE_CONTEXT_OS_INT();
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}
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/*-----------------------------------------------------------*/
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__attribute__((__naked__)) void SCALLYield( void )
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{
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/* Save the context of the interrupted task. */
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portSAVE_CONTEXT_SCALL();
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vTaskSwitchContext();
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portRESTORE_CONTEXT_SCALL();
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}
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/*-----------------------------------------------------------*/
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/* The code generated by the GCC compiler uses the stack in different ways at
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different optimisation levels. The interrupt flags can therefore not always
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be saved to the stack. Instead the critical section nesting level is stored
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in a variable, which is then saved as part of the stack context. */
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void vPortEnterCritical( void )
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{
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/* Disable interrupts */
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portDISABLE_INTERRUPTS();
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/* Now interrupts are disabled ulCriticalNesting can be accessed
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directly. Increment ulCriticalNesting to keep a count of how many times
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portENTER_CRITICAL() has been called. */
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ulCriticalNesting++;
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}
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/*-----------------------------------------------------------*/
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void vPortExitCritical( void )
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{
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if(ulCriticalNesting > portNO_CRITICAL_NESTING)
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{
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ulCriticalNesting--;
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if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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{
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/* Enable all interrupt/exception. */
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portENABLE_INTERRUPTS();
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}
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}
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}
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/*-----------------------------------------------------------*/
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/*
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* Initialise the stack of a task to look exactly as if a call to
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* portSAVE_CONTEXT had been called.
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*
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* See header file for description.
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*/
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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/* Setup the initial stack of the task. The stack is set exactly as
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expected by the portRESTORE_CONTEXT() macro. */
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/* When the task starts, it will expect to find the function parameter in R12. */
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pxTopOfStack--;
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*pxTopOfStack-- = ( portSTACK_TYPE ) 0x08080808; /* R8 */
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*pxTopOfStack-- = ( portSTACK_TYPE ) 0x09090909; /* R9 */
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*pxTopOfStack-- = ( portSTACK_TYPE ) 0x0A0A0A0A; /* R10 */
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*pxTopOfStack-- = ( portSTACK_TYPE ) 0x0B0B0B0B; /* R11 */
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*pxTopOfStack-- = ( portSTACK_TYPE ) pvParameters; /* R12 */
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*pxTopOfStack-- = ( portSTACK_TYPE ) 0xDEADBEEF; /* R14/LR */
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*pxTopOfStack-- = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; /* R15/PC */
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*pxTopOfStack-- = ( portSTACK_TYPE ) portINITIAL_SR; /* SR */
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*pxTopOfStack-- = ( portSTACK_TYPE ) 0xFF0000FF; /* R0 */
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*pxTopOfStack-- = ( portSTACK_TYPE ) 0x01010101; /* R1 */
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*pxTopOfStack-- = ( portSTACK_TYPE ) 0x02020202; /* R2 */
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*pxTopOfStack-- = ( portSTACK_TYPE ) 0x03030303; /* R3 */
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*pxTopOfStack-- = ( portSTACK_TYPE ) 0x04040404; /* R4 */
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*pxTopOfStack-- = ( portSTACK_TYPE ) 0x05050505; /* R5 */
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*pxTopOfStack-- = ( portSTACK_TYPE ) 0x06060606; /* R6 */
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*pxTopOfStack-- = ( portSTACK_TYPE ) 0x07070707; /* R7 */
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*pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_NESTING; /* ulCriticalNesting */
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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portBASE_TYPE xPortStartScheduler( void )
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{
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/* Start the timer that generates the tick ISR. Interrupts are disabled
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here already. */
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prvSetupTimerInterrupt();
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/* Start the first task. */
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portRESTORE_CONTEXT();
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/* Should not get here! */
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return 0;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* It is unlikely that the AVR32 port will require this function as there
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is nothing to return to. */
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}
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/*-----------------------------------------------------------*/
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/* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
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clock cycles from now. */
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#if( configTICK_USE_TC==0 )
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static void prvScheduleNextTick(void)
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{
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unsigned long lCountVal, lCompareVal;
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lCountVal = Get_system_register(AVR32_COUNT);
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lCompareVal = lCountVal + (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
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Set_system_register(AVR32_COMPARE, lCompareVal);
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}
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#endif
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/*-----------------------------------------------------------*/
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/* Setup the timer to generate the tick interrupts. */
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static void prvSetupTimerInterrupt(void)
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{
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#if( configTICK_USE_TC==1 )
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volatile avr32_tc_t *tc = &AVR32_TC;
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// Options for waveform genration.
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tc_waveform_opt_t waveform_opt =
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{
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.channel = configTICK_TC_CHANNEL, /* Channel selection. */
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.bswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect on TIOB. */
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.beevt = TC_EVT_EFFECT_NOOP, /* External event effect on TIOB. */
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.bcpc = TC_EVT_EFFECT_NOOP, /* RC compare effect on TIOB. */
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.bcpb = TC_EVT_EFFECT_NOOP, /* RB compare effect on TIOB. */
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.aswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect on TIOA. */
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.aeevt = TC_EVT_EFFECT_NOOP, /* External event effect on TIOA. */
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.acpc = TC_EVT_EFFECT_NOOP, /* RC compare effect on TIOA: toggle. */
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.acpa = TC_EVT_EFFECT_NOOP, /* RA compare effect on TIOA: toggle (other possibilities are none, set and clear). */
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.wavsel = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER,/* Waveform selection: Up mode without automatic trigger on RC compare. */
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.enetrg = FALSE, /* External event trigger enable. */
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.eevt = 0, /* External event selection. */
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.eevtedg = TC_SEL_NO_EDGE, /* External event edge selection. */
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.cpcdis = FALSE, /* Counter disable when RC compare. */
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.cpcstop = FALSE, /* Counter clock stopped with RC compare. */
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.burst = FALSE, /* Burst signal selection. */
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.clki = FALSE, /* Clock inversion. */
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.tcclks = TC_CLOCK_SOURCE_TC2 /* Internal source clock 2. */
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};
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tc_interrupt_t tc_interrupt =
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{
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.etrgs=0,
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.ldrbs=0,
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.ldras=0,
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.cpcs =1,
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.cpbs =0,
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.cpas =0,
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.lovrs=0,
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.covfs=0,
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};
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#endif
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/* Disable all interrupt/exception. */
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portDISABLE_INTERRUPTS();
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/* Register the compare interrupt handler to the interrupt controller and
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enable the compare interrupt. */
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#if( configTICK_USE_TC==1 )
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{
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INTC_register_interrupt(&vTick, configTICK_TC_IRQ, INT0);
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/* Initialize the timer/counter. */
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tc_init_waveform(tc, &waveform_opt);
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/* Set the compare triggers.
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Remember TC counter is 16-bits, so counting second is not possible!
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That's why we configure it to count ms. */
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tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ/ 4) / 1000 );
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tc_configure_interrupts( tc, configTICK_TC_CHANNEL, &tc_interrupt );
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/* Start the timer/counter. */
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tc_start(tc, configTICK_TC_CHANNEL);
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}
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#else
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{
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INTC_register_interrupt(&vTick, AVR32_CORE_COMPARE_IRQ, INT0);
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prvScheduleNextTick();
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}
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#endif
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}
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