mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-11-05 11:12:27 -05:00
Sync up MicroblazeV9 port with Xilinx tree (#220)
* MicroblazeV9: Add support for 64 bit microblaze * MicroblazeV9: Add support for generation of run time task stats * MicroblazeV9: Add default implementation for callback functions --------- Signed-off-by: Mubin Usman Sayyed <mubin.usman.sayyed@xilinx.com>
This commit is contained in:
parent
8e664fc984
commit
5040a67939
6 changed files with 508 additions and 298 deletions
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@ -33,63 +33,97 @@
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#include "microblaze_exceptions_g.h"
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#include "xparameters.h"
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#include "microblaze_instructions.h"
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/* The context is oversized to allow functions called from the ISR to write
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back into the caller stack. */
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#if defined (__arch64__)
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#if( XPAR_MICROBLAZE_USE_FPU != 0 )
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#define portCONTEXT_SIZE 272
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#define portMINUS_CONTEXT_SIZE -272
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#else
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#define portCONTEXT_SIZE 264
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#define portMINUS_CONTEXT_SIZE -264
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#endif
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#else
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#if( XPAR_MICROBLAZE_USE_FPU != 0 )
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#define portCONTEXT_SIZE 136
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#define portMINUS_CONTEXT_SIZE -136
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#else
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#define portCONTEXT_SIZE 132
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#define portMINUS_CONTEXT_SIZE -132
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#endif
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#endif
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/* Offsets from the stack pointer at which saved registers are placed. */
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#define portR31_OFFSET 4
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#define portR30_OFFSET 8
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#define portR29_OFFSET 12
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#define portR28_OFFSET 16
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#define portR27_OFFSET 20
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#define portR26_OFFSET 24
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#define portR25_OFFSET 28
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#define portR24_OFFSET 32
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#define portR23_OFFSET 36
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#define portR22_OFFSET 40
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#define portR21_OFFSET 44
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#define portR20_OFFSET 48
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#define portR19_OFFSET 52
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#define portR18_OFFSET 56
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#define portR17_OFFSET 60
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#define portR16_OFFSET 64
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#define portR15_OFFSET 68
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#define portR14_OFFSET 72
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#define portR13_OFFSET 76
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#define portR12_OFFSET 80
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#define portR11_OFFSET 84
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#define portR10_OFFSET 88
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#define portR9_OFFSET 92
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#define portR8_OFFSET 96
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#define portR7_OFFSET 100
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#define portR6_OFFSET 104
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#define portR5_OFFSET 108
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#define portR4_OFFSET 112
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#define portR3_OFFSET 116
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#define portR2_OFFSET 120
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#if defined (__arch64__)
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#define portR31_OFFSET 8
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#define portR30_OFFSET 16
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#define portR29_OFFSET 24
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#define portR28_OFFSET 32
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#define portR27_OFFSET 40
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#define portR26_OFFSET 48
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#define portR25_OFFSET 56
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#define portR24_OFFSET 64
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#define portR23_OFFSET 72
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#define portR22_OFFSET 80
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#define portR21_OFFSET 88
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#define portR20_OFFSET 96
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#define portR19_OFFSET 104
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#define portR18_OFFSET 112
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#define portR17_OFFSET 120
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#define portR16_OFFSET 128
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#define portR15_OFFSET 136
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#define portR14_OFFSET 144
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#define portR13_OFFSET 152
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#define portR12_OFFSET 160
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#define portR11_OFFSET 168
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#define portR10_OFFSET 176
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#define portR9_OFFSET 184
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#define portR8_OFFSET 192
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#define portR7_OFFSET 200
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#define portR6_OFFSET 208
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#define portR5_OFFSET 216
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#define portR4_OFFSET 224
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#define portR3_OFFSET 232
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#define portR2_OFFSET 240
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#define portCRITICAL_NESTING_OFFSET 248
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#define portMSR_OFFSET 256
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#define portFSR_OFFSET 264
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#else
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#define portR31_OFFSET 4
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#define portR30_OFFSET 8
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#define portR29_OFFSET 12
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#define portR28_OFFSET 16
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#define portR27_OFFSET 20
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#define portR26_OFFSET 24
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#define portR25_OFFSET 28
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#define portR24_OFFSET 32
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#define portR23_OFFSET 36
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#define portR22_OFFSET 40
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#define portR21_OFFSET 44
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#define portR20_OFFSET 48
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#define portR19_OFFSET 52
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#define portR18_OFFSET 56
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#define portR17_OFFSET 60
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#define portR16_OFFSET 64
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#define portR15_OFFSET 68
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#define portR14_OFFSET 72
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#define portR13_OFFSET 76
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#define portR12_OFFSET 80
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#define portR11_OFFSET 84
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#define portR10_OFFSET 88
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#define portR9_OFFSET 92
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#define portR8_OFFSET 96
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#define portR7_OFFSET 100
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#define portR6_OFFSET 104
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#define portR5_OFFSET 108
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#define portR4_OFFSET 112
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#define portR3_OFFSET 116
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#define portR2_OFFSET 120
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#define portCRITICAL_NESTING_OFFSET 124
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#define portMSR_OFFSET 128
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#define portFSR_OFFSET 132
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#if( XPAR_MICROBLAZE_USE_FPU != 0 )
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#define portFSR_OFFSET 132
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#if( XPAR_MICROBLAZE_USE_STACK_PROTECTION )
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#define portSLR_OFFSET 136
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#define portSHR_OFFSET 140
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#define portCONTEXT_SIZE 144
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#define portMINUS_CONTEXT_SIZE -144
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#else
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#define portCONTEXT_SIZE 136
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#define portMINUS_CONTEXT_SIZE -136
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#endif
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#else
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#if( XPAR_MICROBLAZE_USE_STACK_PROTECTION )
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#define portSLR_OFFSET 132
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#define portSHR_OFFSET 136
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#define portCONTEXT_SIZE 140
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#define portMINUS_CONTEXT_SIZE -140
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#else
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#define portCONTEXT_SIZE 132
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#define portMINUS_CONTEXT_SIZE -132
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#endif
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#endif
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.extern pxCurrentTCB
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@ -109,54 +143,54 @@
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.macro portSAVE_CONTEXT
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/* Make room for the context on the stack. */
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addik r1, r1, portMINUS_CONTEXT_SIZE
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/* Make room for the context on the stack. */
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ADDLIK r1, r1, portMINUS_CONTEXT_SIZE
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/* Stack general registers. */
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swi r31, r1, portR31_OFFSET
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swi r30, r1, portR30_OFFSET
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swi r29, r1, portR29_OFFSET
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swi r28, r1, portR28_OFFSET
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swi r27, r1, portR27_OFFSET
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swi r26, r1, portR26_OFFSET
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swi r25, r1, portR25_OFFSET
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swi r24, r1, portR24_OFFSET
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swi r23, r1, portR23_OFFSET
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swi r22, r1, portR22_OFFSET
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swi r21, r1, portR21_OFFSET
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swi r20, r1, portR20_OFFSET
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swi r19, r1, portR19_OFFSET
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swi r18, r1, portR18_OFFSET
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swi r17, r1, portR17_OFFSET
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swi r16, r1, portR16_OFFSET
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swi r15, r1, portR15_OFFSET
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/* R14 is saved later as it needs adjustment if a yield is performed. */
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swi r13, r1, portR13_OFFSET
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swi r12, r1, portR12_OFFSET
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swi r11, r1, portR11_OFFSET
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swi r10, r1, portR10_OFFSET
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swi r9, r1, portR9_OFFSET
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swi r8, r1, portR8_OFFSET
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swi r7, r1, portR7_OFFSET
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swi r6, r1, portR6_OFFSET
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swi r5, r1, portR5_OFFSET
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swi r4, r1, portR4_OFFSET
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swi r3, r1, portR3_OFFSET
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swi r2, r1, portR2_OFFSET
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/* Stack general registers. */
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SI r31, r1, portR31_OFFSET
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SI r30, r1, portR30_OFFSET
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SI r29, r1, portR29_OFFSET
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SI r28, r1, portR28_OFFSET
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SI r27, r1, portR27_OFFSET
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SI r26, r1, portR26_OFFSET
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SI r25, r1, portR25_OFFSET
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SI r24, r1, portR24_OFFSET
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SI r23, r1, portR23_OFFSET
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SI r22, r1, portR22_OFFSET
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SI r21, r1, portR21_OFFSET
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SI r20, r1, portR20_OFFSET
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SI r19, r1, portR19_OFFSET
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SI r18, r1, portR18_OFFSET
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SI r17, r1, portR17_OFFSET
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SI r16, r1, portR16_OFFSET
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SI r15, r1, portR15_OFFSET
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/* R14 is saved later as it needs adjustment if a yield is performed. */
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SI r13, r1, portR13_OFFSET
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SI r12, r1, portR12_OFFSET
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SI r11, r1, portR11_OFFSET
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SI r10, r1, portR10_OFFSET
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SI r9, r1, portR9_OFFSET
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SI r8, r1, portR8_OFFSET
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SI r7, r1, portR7_OFFSET
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SI r6, r1, portR6_OFFSET
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SI r5, r1, portR5_OFFSET
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SI r4, r1, portR4_OFFSET
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SI r3, r1, portR3_OFFSET
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SI r2, r1, portR2_OFFSET
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/* Stack the critical section nesting value. */
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lwi r18, r0, uxCriticalNesting
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swi r18, r1, portCRITICAL_NESTING_OFFSET
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/* Stack the critical section nesting value. */
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LI r18, r0, uxCriticalNesting
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SI r18, r1, portCRITICAL_NESTING_OFFSET
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/* Stack MSR. */
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mfs r18, rmsr
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swi r18, r1, portMSR_OFFSET
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/* Stack MSR. */
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mfs r18, rmsr
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SI r18, r1, portMSR_OFFSET
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#if( XPAR_MICROBLAZE_USE_FPU != 0 )
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/* Stack FSR. */
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mfs r18, rfsr
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swi r18, r1, portFSR_OFFSET
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#endif
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#if( XPAR_MICROBLAZE_USE_FPU != 0 )
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/* Stack FSR. */
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mfs r18, rfsr
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SI r18, r1, portFSR_OFFSET
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#endif
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#if( XPAR_MICROBLAZE_USE_STACK_PROTECTION )
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/* Save the stack limits */
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@ -166,17 +200,17 @@
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swi r18, r1, portSHR_OFFSET
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#endif
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/* Save the top of stack value to the TCB. */
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lwi r3, r0, pxCurrentTCB
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sw r1, r0, r3
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/* Save the top of stack value to the TCB. */
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LI r3, r0, pxCurrentTCB
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STORE r1, r0, r3
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.endm
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.macro portRESTORE_CONTEXT
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/* Load the top of stack value from the TCB. */
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lwi r18, r0, pxCurrentTCB
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lw r1, r0, r18
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/* Load the top of stack value from the TCB. */
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LI r18, r0, pxCurrentTCB
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LOAD r1, r0, r18
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#if( XPAR_MICROBLAZE_USE_STACK_PROTECTION )
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/* Restore the stack limits -- must not load from r1 (Stack Pointer)
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@ -189,101 +223,112 @@
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mts rshr, r12
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#endif
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/* Restore the general registers. */
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lwi r31, r1, portR31_OFFSET
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lwi r30, r1, portR30_OFFSET
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lwi r29, r1, portR29_OFFSET
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lwi r28, r1, portR28_OFFSET
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lwi r27, r1, portR27_OFFSET
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lwi r26, r1, portR26_OFFSET
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lwi r25, r1, portR25_OFFSET
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lwi r24, r1, portR24_OFFSET
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lwi r23, r1, portR23_OFFSET
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lwi r22, r1, portR22_OFFSET
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lwi r21, r1, portR21_OFFSET
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lwi r20, r1, portR20_OFFSET
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lwi r19, r1, portR19_OFFSET
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lwi r17, r1, portR17_OFFSET
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lwi r16, r1, portR16_OFFSET
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lwi r15, r1, portR15_OFFSET
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lwi r14, r1, portR14_OFFSET
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lwi r13, r1, portR13_OFFSET
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lwi r12, r1, portR12_OFFSET
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lwi r11, r1, portR11_OFFSET
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lwi r10, r1, portR10_OFFSET
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lwi r9, r1, portR9_OFFSET
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lwi r8, r1, portR8_OFFSET
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lwi r7, r1, portR7_OFFSET
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lwi r6, r1, portR6_OFFSET
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lwi r5, r1, portR5_OFFSET
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lwi r4, r1, portR4_OFFSET
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lwi r3, r1, portR3_OFFSET
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lwi r2, r1, portR2_OFFSET
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/* Restore the general registers. */
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LI r31, r1, portR31_OFFSET
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LI r30, r1, portR30_OFFSET
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LI r29, r1, portR29_OFFSET
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LI r28, r1, portR28_OFFSET
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LI r27, r1, portR27_OFFSET
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LI r26, r1, portR26_OFFSET
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LI r25, r1, portR25_OFFSET
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LI r24, r1, portR24_OFFSET
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LI r23, r1, portR23_OFFSET
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LI r22, r1, portR22_OFFSET
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LI r21, r1, portR21_OFFSET
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LI r20, r1, portR20_OFFSET
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LI r19, r1, portR19_OFFSET
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LI r17, r1, portR17_OFFSET
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LI r16, r1, portR16_OFFSET
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LI r15, r1, portR15_OFFSET
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LI r14, r1, portR14_OFFSET
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LI r13, r1, portR13_OFFSET
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LI r12, r1, portR12_OFFSET
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LI r11, r1, portR11_OFFSET
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LI r10, r1, portR10_OFFSET
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LI r9, r1, portR9_OFFSET
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LI r8, r1, portR8_OFFSET
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LI r7, r1, portR7_OFFSET
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LI r6, r1, portR6_OFFSET
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LI r5, r1, portR5_OFFSET
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LI r4, r1, portR4_OFFSET
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LI r3, r1, portR3_OFFSET
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LI r2, r1, portR2_OFFSET
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/* Reload the rmsr from the stack. */
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lwi r18, r1, portMSR_OFFSET
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mts rmsr, r18
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/* Reload the rmsr from the stack. */
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LI r18, r1, portMSR_OFFSET
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mts rmsr, r18
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#if( XPAR_MICROBLAZE_USE_FPU != 0 )
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/* Reload the FSR from the stack. */
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lwi r18, r1, portFSR_OFFSET
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mts rfsr, r18
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#endif
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#if( XPAR_MICROBLAZE_USE_FPU != 0 )
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/* Reload the FSR from the stack. */
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LI r18, r1, portFSR_OFFSET
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mts rfsr, r18
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#endif
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/* Load the critical nesting value. */
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lwi r18, r1, portCRITICAL_NESTING_OFFSET
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swi r18, r0, uxCriticalNesting
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/* Load the critical nesting value. */
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LI r18, r1, portCRITICAL_NESTING_OFFSET
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SI r18, r0, uxCriticalNesting
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/* Test the critical nesting value. If it is non zero then the task last
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exited the running state using a yield. If it is zero, then the task
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last exited the running state through an interrupt. */
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xori r18, r18, 0
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bnei r18, exit_from_yield
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/* Test the critical nesting value. If it is non zero then the task last
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exited the running state using a yield. If it is zero, then the task
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last exited the running state through an interrupt. */
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XORI r18, r18, 0
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BNEI r18, exit_from_yield
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/* r18 was being used as a temporary. Now restore its true value from the
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stack. */
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lwi r18, r1, portR18_OFFSET
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/* r18 was being used as a temporary. Now restore its true value from the
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stack. */
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LI r18, r1, portR18_OFFSET
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/* Remove the stack frame. */
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addik r1, r1, portCONTEXT_SIZE
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/* Remove the stack frame. */
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ADDLIK r1, r1, portCONTEXT_SIZE
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/* Return using rtid so interrupts are re-enabled as this function is
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exited. */
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rtid r14, 0
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or r0, r0, r0
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/* Return using rtid so interrupts are re-enabled as this function is
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exited. */
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rtid r14, 0
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OR r0, r0, r0
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.endm
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.endm
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/* This function is used to exit portRESTORE_CONTEXT() if the task being
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returned to last left the Running state by calling taskYIELD() (rather than
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being preempted by an interrupt). */
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.text
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.align 4
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.text
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#ifdef __arch64__
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.align 8
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#else
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.align 4
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#endif
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exit_from_yield:
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/* r18 was being used as a temporary. Now restore its true value from the
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stack. */
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lwi r18, r1, portR18_OFFSET
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/* r18 was being used as a temporary. Now restore its true value from the
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stack. */
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LI r18, r1, portR18_OFFSET
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/* Remove the stack frame. */
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addik r1, r1, portCONTEXT_SIZE
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/* Remove the stack frame. */
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ADDLIK r1, r1, portCONTEXT_SIZE
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/* Return to the task. */
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rtsd r14, 0
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or r0, r0, r0
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/* Return to the task. */
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rtsd r14, 0
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OR r0, r0, r0
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.text
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.align 4
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.text
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#ifdef __arch64__
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.align 8
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#else
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.align 4
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#endif
|
||||
|
||||
_interrupt_handler:
|
||||
|
||||
portSAVE_CONTEXT
|
||||
|
||||
/* Stack the return address. */
|
||||
swi r14, r1, portR14_OFFSET
|
||||
/* Stack the return address. */
|
||||
SI r14, r1, portR14_OFFSET
|
||||
|
||||
/* Switch to the ISR stack. */
|
||||
lwi r1, r0, pulISRStack
|
||||
/* Switch to the ISR stack. */
|
||||
LI r1, r0, pulISRStack
|
||||
|
||||
#if( XPAR_MICROBLAZE_USE_STACK_PROTECTION )
|
||||
ori r18, r0, _stack_end
|
||||
|
|
@ -292,29 +337,29 @@ _interrupt_handler:
|
|||
mts rshr, r18
|
||||
#endif
|
||||
|
||||
/* The parameter to the interrupt handler. */
|
||||
ori r5, r0, configINTERRUPT_CONTROLLER_TO_USE
|
||||
/* The parameter to the interrupt handler. */
|
||||
ORI r5, r0, configINTERRUPT_CONTROLLER_TO_USE
|
||||
|
||||
/* Execute any pending interrupts. */
|
||||
bralid r15, XIntc_DeviceInterruptHandler
|
||||
or r0, r0, r0
|
||||
/* Execute any pending interrupts. */
|
||||
BRALID r15, XIntc_DeviceInterruptHandler
|
||||
OR r0, r0, r0
|
||||
|
||||
/* See if a new task should be selected to execute. */
|
||||
lwi r18, r0, ulTaskSwitchRequested
|
||||
or r18, r18, r0
|
||||
/* See if a new task should be selected to execute. */
|
||||
LI r18, r0, ulTaskSwitchRequested
|
||||
OR r18, r18, r0
|
||||
|
||||
/* If ulTaskSwitchRequested is already zero, then jump straight to
|
||||
restoring the task that is already in the Running state. */
|
||||
beqi r18, task_switch_not_requested
|
||||
/* If ulTaskSwitchRequested is already zero, then jump straight to
|
||||
restoring the task that is already in the Running state. */
|
||||
BEQI r18, task_switch_not_requested
|
||||
|
||||
/* Set ulTaskSwitchRequested back to zero as a task switch is about to be
|
||||
performed. */
|
||||
swi r0, r0, ulTaskSwitchRequested
|
||||
/* Set ulTaskSwitchRequested back to zero as a task switch is about to be
|
||||
performed. */
|
||||
SI r0, r0, ulTaskSwitchRequested
|
||||
|
||||
/* ulTaskSwitchRequested was not 0 when tested. Select the next task to
|
||||
execute. */
|
||||
bralid r15, vTaskSwitchContext
|
||||
or r0, r0, r0
|
||||
/* ulTaskSwitchRequested was not 0 when tested. Select the next task to
|
||||
execute. */
|
||||
BRALID r15, vTaskSwitchContext
|
||||
OR r0, r0, r0
|
||||
|
||||
task_switch_not_requested:
|
||||
|
||||
|
|
@ -322,19 +367,24 @@ task_switch_not_requested:
|
|||
portRESTORE_CONTEXT
|
||||
|
||||
|
||||
.text
|
||||
.align 4
|
||||
.text
|
||||
#ifdef __arch64__
|
||||
.align 8
|
||||
#else
|
||||
.align 4
|
||||
#endif
|
||||
|
||||
VPortYieldASM:
|
||||
|
||||
portSAVE_CONTEXT
|
||||
|
||||
/* Modify the return address so a return is done to the instruction after
|
||||
the call to VPortYieldASM. */
|
||||
addi r14, r14, 8
|
||||
swi r14, r1, portR14_OFFSET
|
||||
/* Modify the return address so a return is done to the instruction after
|
||||
the call to VPortYieldASM. */
|
||||
ADDI r14, r14, 8
|
||||
SI r14, r1, portR14_OFFSET
|
||||
|
||||
/* Switch to use the ISR stack. */
|
||||
lwi r1, r0, pulISRStack
|
||||
/* Switch to use the ISR stack. */
|
||||
LI r1, r0, pulISRStack
|
||||
|
||||
#if( XPAR_MICROBLAZE_USE_STACK_PROTECTION )
|
||||
ori r18, r0, _stack_end
|
||||
|
|
@ -343,15 +393,20 @@ VPortYieldASM:
|
|||
mts rshr, r18
|
||||
#endif
|
||||
|
||||
/* Select the next task to execute. */
|
||||
bralid r15, vTaskSwitchContext
|
||||
or r0, r0, r0
|
||||
/* Select the next task to execute. */
|
||||
BRALID r15, vTaskSwitchContext
|
||||
OR r0, r0, r0
|
||||
|
||||
/* Restore the context of the next task scheduled to execute. */
|
||||
portRESTORE_CONTEXT
|
||||
|
||||
.text
|
||||
.align 4
|
||||
.text
|
||||
#ifdef __arch64__
|
||||
.align 8
|
||||
#else
|
||||
.align 4
|
||||
#endif
|
||||
|
||||
vPortStartFirstTask:
|
||||
|
||||
portRESTORE_CONTEXT
|
||||
|
|
@ -360,14 +415,19 @@ vPortStartFirstTask:
|
|||
|
||||
#if ( MICROBLAZE_EXCEPTIONS_ENABLED == 1 ) && ( configINSTALL_EXCEPTION_HANDLERS == 1 )
|
||||
|
||||
.text
|
||||
.align 4
|
||||
.text
|
||||
#ifdef __arch64__
|
||||
.align 8
|
||||
#else
|
||||
.align 4
|
||||
#endif
|
||||
|
||||
vPortExceptionHandlerEntry:
|
||||
|
||||
/* Take a copy of the stack pointer before vPortExecptionHandler is called,
|
||||
storing its value prior to the function stack frame being created. */
|
||||
swi r1, r0, pulStackPointerOnFunctionEntry
|
||||
bralid r15, vPortExceptionHandler
|
||||
or r0, r0, r0
|
||||
/* Take a copy of the stack pointer before vPortExecptionHandler is called,
|
||||
storing its value prior to the function stack frame being created. */
|
||||
SI r1, r0, pulStackPointerOnFunctionEntry
|
||||
BRALID r15, vPortExceptionHandler
|
||||
OR r0, r0, r0
|
||||
|
||||
#endif /* ( MICROBLAZE_EXCEPTIONS_ENABLED == 1 ) && ( configINSTALL_EXCEPTION_HANDLERS == 1 ) */
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue