Replace the CLZ function with a CLZ intrinsic in the Cortex-R4 port layer.

Add EDS support in the PIC24 port layer.
Remove unnecessary EHB instructions from PIC32 port.
In the PIC32 port assembly code, replace the &= code with a single ins instruction.
This commit is contained in:
Richard Barry 2013-01-23 16:06:45 +00:00
parent b5cf299df1
commit 4e7b460eaf
6 changed files with 107 additions and 83 deletions

View file

@ -233,15 +233,6 @@ vPortPreemptiveTick:
; Restore the context of the task selected to execute.
portRESTORE_CONTEXT
;-------------------------------------------------------------------------------
.def ulPortCountLeadingZeros
ulPortCountLeadingZeros:
CLZ R0, R0
BX LR
;-------------------------------------------------------------------------------
.if (__TI_VFP_SUPPORT__)

View file

@ -122,9 +122,6 @@ extern void vPortYield( void );
/* Architecture specific optimisations. */
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
/* Generic helper function. */
unsigned long ulPortCountLeadingZeros( unsigned long ulBitmap );
/* Check the configuration. */
#if( configMAX_PRIORITIES > 32 )
#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
@ -136,7 +133,7 @@ extern void vPortYield( void );
/*-----------------------------------------------------------*/
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - ulPortCountLeadingZeros( ( uxReadyPriorities ) ) )
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) )
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */