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Small tidy up of the new MicroBlaze port layer.
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@ -68,16 +68,16 @@
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#include <xintc_i.h>
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#include <xtmrctr.h>
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#include <xil_exception.h>
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/* Tasks are started with interrupts disabled as they will have their interrupts
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enabled as the task starts (when its context is restored for the first time). */
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#define portINITIAL_MSR_STATE ( ( portSTACK_TYPE ) 0x00 )
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#include <mb_interface.h>
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/* Tasks are started with a critical section nesting of 0 - however prior
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to the scheduler being commenced we don't want the critical nesting level
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to reach zero, so it is initialised to a high value. */
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#define portINITIAL_NESTING_VALUE ( 0xff )
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/* The bit within the MSR register that enabled/disables interrupts. */
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#define portMSR_IE ( 0x02U )
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/*-----------------------------------------------------------*/
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/*
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@ -119,19 +119,6 @@ extern void *_SDA2_BASE_, *_SDA_BASE_;
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const unsigned long ulR2 = ( unsigned long ) &_SDA2_BASE_;
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const unsigned long ulR13 = ( unsigned long ) &_SDA_BASE_;
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#if 0
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//_RB_
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#ifdef XPAR_MICROBLAZE_USE_ICACHE
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microblaze_invalidate_icache();
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microblaze_enable_icache();
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#endif
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#ifdef XPAR_MICROBLAZE_USE_DCACHE
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microblaze_invalidate_dcache();
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microblaze_enable_dcache();
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#endif
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#endif
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/* Place a few bytes of known values on the bottom of the stack.
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This is essential for the Microblaze port and these lines must
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not be omitted. The parameter value will overwrite the
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@ -219,8 +206,10 @@ const unsigned long ulR13 = ( unsigned long ) &_SDA_BASE_;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x1e; /* R30 - must be saved across function calls. Callee-save. */
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pxTopOfStack--;
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/* The MSR is stacked between R30 and R31. */
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*pxTopOfStack = portINITIAL_MSR_STATE;
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/* The MSR is stacked between R30 and R31. This should have interrupts
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disabled. Each task will enable interrupts automatically when it enters
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the running state for the first time. */
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*pxTopOfStack = mfmsr() & ~portMSR_IE;
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x1f; /* R31 - must be saved across function calls. Callee-save. */
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