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Common scheduler code:
- Back out changes that allow mutexes to be given from a semaphore after tests showed issues that would not be fast to fix. Demo projects: - Update the Microblaze Kintex 7 project and BSP to use version 2015.2 of the Xilinx SDK.
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/*
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OpenRTOS V8.2.1 Copyright (C) 2015 Real Time Engineers Ltd.
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FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
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All rights reserved
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This file is part of the OpenRTOS product.
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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OpenRTOS is distributed exclusively by WITTENSTEIN high integrity systems,
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and is subject to the terms of the License granted to your organization,
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including its warranties and limitations on use and distribution. It cannot be
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copied or reproduced in any way except as permitted by the License.
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This file is part of the FreeRTOS distribution.
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Licenses authorize use by processor, compiler, business unit, and product.
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WITTENSTEIN high integrity systems is a trading name of WITTENSTEIN
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aerospace & simulation ltd, Registered Office: Brown's Court, Long Ashton
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Business Park, Yanley Lane, Long Ashton, Bristol, BS41 9LB, UK.
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Tel: +44 (0) 1275 395 600, fax: +44 (0) 1275 393 630.
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E-mail: info@HighIntegritySystems.com
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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http://www.HighIntegritySystems.com
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***************************************************************************
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>>! NOTE: The modification to the GPL is included to allow you to !<<
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>>! distribute a combined work that includes FreeRTOS without being !<<
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>>! obliged to provide the source code for proprietary components !<<
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>>! outside of the FreeRTOS kernel. !<<
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***************************************************************************
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. Full license text is available on the following
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link: http://www.freertos.org/a00114.html
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***************************************************************************
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* *
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* FreeRTOS provides completely free yet professionally developed, *
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* robust, strictly quality controlled, supported, and cross *
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* platform software that is more than just the market leader, it *
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* is the industry's de facto standard. *
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* *
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* Help yourself get started quickly while simultaneously helping *
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* to support the FreeRTOS project by purchasing a FreeRTOS *
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* tutorial book, reference manual, or both: *
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* http://www.FreeRTOS.org/Documentation *
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* *
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***************************************************************************
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http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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the FAQ page "My application does not run, what could be wrong?". Have you
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defined configASSERT()?
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http://www.FreeRTOS.org/support - In return for receiving this top quality
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embedded software for free we request you assist our global community by
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participating in the support forum.
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http://www.FreeRTOS.org/training - Investing in training allows your team to
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be as productive as possible as early as possible. Now you can receive
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FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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Ltd, and the world's leading authority on the world's leading RTOS.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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compatible FAT file system, and our tiny thread aware UDP/IP stack.
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http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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licenses offer ticketed support, indemnification and commercial middleware.
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http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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engineered and independently SIL3 certified version for use in safety and
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mission critical applications that require provable dependability.
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1 tab == 4 spaces!
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*/
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/*
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@ -132,19 +180,19 @@ use of FreeRTOS.*/
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*/
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struct xLIST_ITEM
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{
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listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
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listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
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configLIST_VOLATILE TickType_t xItemValue; /*< The value being listed. In most cases this is used to sort the list in descending order. */
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struct xLIST_ITEM * configLIST_VOLATILE pxNext; /*< Pointer to the next ListItem_t in the list. */
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struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; /*< Pointer to the previous ListItem_t in the list. */
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void * pvOwner; /*< Pointer to the object (normally a TCB) that contains the list item. There is therefore a two way link between the object containing the list item and the list item itself. */
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void * configLIST_VOLATILE pvContainer; /*< Pointer to the list in which this list item is placed (if any). */
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listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
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listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
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};
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typedef struct xLIST_ITEM ListItem_t; /* For some reason lint wants this as two separate definitions. */
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struct xMINI_LIST_ITEM
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{
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listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
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listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
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configLIST_VOLATILE TickType_t xItemValue;
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struct xLIST_ITEM * configLIST_VOLATILE pxNext;
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struct xLIST_ITEM * configLIST_VOLATILE pxPrevious;
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@ -158,8 +206,8 @@ typedef struct xLIST
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{
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listFIRST_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
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configLIST_VOLATILE UBaseType_t uxNumberOfItems;
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ListItem_t * configLIST_VOLATILE pxIndex; /*< Used to walk through the list. Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */
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MiniListItem_t xListEnd; /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */
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ListItem_t * configLIST_VOLATILE pxIndex; /*< Used to walk through the list. Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */
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MiniListItem_t xListEnd; /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */
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listSECOND_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
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} List_t;
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@ -213,14 +213,14 @@ volatile uint32_t ulCriticalNesting = 9999UL;
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/* Saved as part of the task context. If ulPortTaskHasFPUContext is non-zero then
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a floating point context must be saved and restored for the task. */
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uint32_t ulPortTaskHasFPUContext = pdFALSE;
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volatile uint32_t ulPortTaskHasFPUContext = pdFALSE;
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/* Set to 1 to pend a context switch from an ISR. */
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uint32_t ulPortYieldRequired = pdFALSE;
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volatile uint32_t ulPortYieldRequired = pdFALSE;
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/* Counts the interrupt nesting depth. A context switch is only performed if
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if the nesting depth is 0. */
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uint32_t ulPortInterruptNesting = 0UL;
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volatile uint32_t ulPortInterruptNesting = 0UL;
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__attribute__(( used )) const uint32_t ulICCIAR = portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS;
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__attribute__(( used )) const uint32_t ulICCEOIR = portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS;
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/* Normally a mutex would not be given from an interrupt, especially if
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there is a mutex holder, as priority inheritance makes no sense for an
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interrupts, only tasks. However, on occasions when it is wanted to give
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a mutex from an interrupt, use xQueueSendFromISR() in place of
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xSemaphoreGiveFromISR(). */
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interrupts, only tasks. */
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configASSERT( !( ( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) && ( pxQueue->pxMutexHolder != NULL ) ) );
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/* RTOS ports that support interrupt nesting have the concept of a maximum
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@ -3489,6 +3489,12 @@ TCB_t *pxTCB;
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if( pxMutexHolder != NULL )
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{
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/* A task can only have an inherited priority if it holds the mutex.
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If the mutex is held by a task then it cannot be given from an
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interrupt, and if a mutex is given by the holding task then it must
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be the running state task. */
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configASSERT( pxTCB == pxCurrentTCB );
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configASSERT( pxTCB->uxMutexesHeld );
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( pxTCB->uxMutexesHeld )--;
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