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Tidy up the MicoBlaze port layer - still a work in progress.

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This commit is contained in:
Richard Barry 2011-06-11 12:00:52 +00:00
parent 3e07dd4a03
commit 4c80a9948e
4 changed files with 89 additions and 63 deletions
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26
Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/FreeRTOS_Source/portable/GCC/MicroBlaze/port.c
View file

@ -77,13 +77,6 @@ to the scheduler being commenced we don't want the critical nesting level
to reach zero, so it is initialised to a high value. */
#define portINITIAL_NESTING_VALUE ( 0xff )
/* Our hardware setup only uses one counter. */
#define portCOUNTER_0 0
/* The stack used by the ISR is filled with a known value to assist in
debugging. */
#define portISR_STACK_FILL_VALUE 0x55555555
/*-----------------------------------------------------------*/
/*
@ -231,26 +224,19 @@ const unsigned long ulR13 = ( unsigned long ) &_SDA_BASE_;
portBASE_TYPE xPortStartScheduler( void )
{
extern void ( vStartFirstTask )( void );
extern void ( vPortStartFirstTask )( void );
extern unsigned long *_stack;
/* Setup the hardware to generate the tick. Interrupts are disabled when
this function is called. */
vApplicationSetupTimerInterrupt();
/* Allocate the stack to be used by the interrupt handler. */
pulISRStack = ( unsigned long * ) pvPortMalloc( configINTERRUPT_STACK_SIZE * sizeof( portSTACK_TYPE ) );
configASSERT( pulISRStack != NULL );
pulISRStack = _stack;
/* Restore the context of the first task that is going to run. */
if( pulISRStack != NULL )
{
/* Fill the ISR stack with a known value to facilitate debugging. */
memset( pulISRStack, portISR_STACK_FILL_VALUE, configMINIMAL_STACK_SIZE * sizeof( portSTACK_TYPE ) );
pulISRStack += ( configMINIMAL_STACK_SIZE - 1 );
/* From here on, the created tasks will be executing. */
vStartFirstTask();
}
/* Restore the context of the first task that is going to run. From here
on, the created tasks will be executing. */
vPortStartFirstTask();
/* Should not get here as the tasks are now running! */
return pdFALSE;

108
Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/FreeRTOS_Source/portable/GCC/MicroBlaze/portasm.s
View file

@ -63,19 +63,22 @@
.extern uxCriticalNesting
.extern pulISRStack
/* .global vPortFreeRTOSInterruptHandler */
.global _interrupt_handler
.global VPortYieldASM
.global vStartFirstTask
.global vPortStartFirstTask
.macro portSAVE_CONTEXT
/* Make room for the context on the stack. */
addik r1, r1, -132
/* Save r31 so it can then be used. */
/* Save r31 so it can then be used as a temporary. */
swi r31, r1, 4
/* Copy the msr into r31 - this is stacked later. */
mfs r31, rmsr
/* Stack general registers. */
swi r30, r1, 12
swi r29, r1, 16
@ -105,9 +108,11 @@
swi r4, r1, 116
swi r3, r1, 120
swi r2, r1, 124
/* Stack the critical section nesting value. */
lwi r3, r0, uxCriticalNesting
swi r3, r1, 128
/* Save the top of stack value to the TCB. */
lwi r3, r0, pxCurrentTCB
sw r1, r0, r3
@ -115,9 +120,11 @@
.endm
.macro portRESTORE_CONTEXT
/* Load the top of stack value from the TCB. */
lwi r3, r0, pxCurrentTCB
lw r1, r0, r3
/* Restore the general registers. */
lwi r31, r1, 4
lwi r30, r1, 12
@ -149,80 +156,99 @@
lwi r4, r1, 116
lwi r2, r1, 124
/* Reload the rmsr from the stack. */
lwi r3, r1, 8
mts rmsr, r3
/* Load the critical nesting value. */
lwi r3, r1, 128
swi r3, r0, uxCriticalNesting
/* Obtain the MSR value from the stack. */
lwi r3, r1, 8
/* Test the critical nesting value. If it is non zero then the task last
exited the running state using a yield. If it is zero, then the task
last exited the running state through an interrupt. */
xori r3, r3, 0
bnei r3, exit_from_yield
/* Are interrupts enabled in the MSR? If so return using an return from
interrupt instruction to ensure interrupts are enabled only once the task
is running again. */
andi r3, r3, 2
beqid r3, 36
or r0, r0, r0
/* Reload the rmsr from the stack, clear the enable interrupt bit in the
value before saving back to rmsr register, then return enabling interrupts
as we return. */
lwi r3, r1, 8
andi r3, r3, ~2
mts rmsr, r3
/* r3 was being used as a temporary. Now restore its true value from the
stack. */
lwi r3, r1, 120
/* Remove the stack frame. */
addik r1, r1, 132
/* Return using rtid so interrupts are re-enabled as this function is
exited. */
rtid r14, 0
or r0, r0, r0
/* Reload the rmsr from the stack, place it in the rmsr register, and
return without enabling interrupts. */
lwi r3, r1, 8
mts rmsr, r3
lwi r3, r1, 120
addik r1, r1, 132
rtsd r14, 0
or r0, r0, r0
.endm
.text
.align 2
/* This function is used to exit portRESTORE_CONTEXT() if the task being
returned to last left the Running state by calling taskYIELD() (rather than
being preempted by an interrupt. */
exit_from_yield:
/* r3 was being used as a temporary. Now restore its true value from the
stack. */
lwi r3, r1, 120
/* Remove the stack frame. */
addik r1, r1, 132
/* Return to the task. */
rtsd r14, 0
or r0, r0, r0
/*vPortFreeRTOSInterruptHandler:*/
_interrupt_handler:
portSAVE_CONTEXT
/* Entered via an interrupt so interrupts must be enabled in msr. */
ori r31, r31, 2
/* Stack msr. */
swi r31, r1, 8
/* Stack the return address. As we entered via an interrupt we do
not need to modify the return address prior to stacking. */
/* Stack the return address. */
swi r14, r1, 76
/* Now switch to use the ISR stack. */
lwi r3, r0, pulISRStack
add r1, r3, r0
/* Switch to the ISR stack. */
lwi r1, r0, pulISRStack
/* Execute any pending interrupts. */
bralid r15, XIntc_DeviceInterruptHandler
or r0, r0, r0
/* Restore the context of the next task scheduled to execute. */
portRESTORE_CONTEXT
VPortYieldASM:
portSAVE_CONTEXT
/* Stack msr. */
swi r31, r1, 8
/* Modify the return address so we return to the instruction after the
exception. */
/* Modify the return address so a return is done to the instruction after
the call to VPortYieldASM. */
addi r14, r14, 8
swi r14, r1, 76
/* Now switch to use the ISR stack. */
lwi r3, r0, pulISRStack
add r1, r3, r0
/* Switch to use the ISR stack. */
lwi r1, r0, pulISRStack
/* Select the next task to execute. */
bralid r15, vTaskSwitchContext
or r0, r0, r0
/* Restore the context of the next task scheduled to execute. */
portRESTORE_CONTEXT
vStartFirstTask:
vPortStartFirstTask:
portRESTORE_CONTEXT

16
Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/main-blinky.c
View file

@ -428,7 +428,8 @@ void vApplicationSetupTimerInterrupt( void )
{
portBASE_TYPE xStatus;
const unsigned char ucTimerCounterNumber = ( unsigned char ) 0U;
const unsigned long ulCounterValue = ( ( XPAR_AXI_TIMER_0_CLOCK_FREQ_HZ / configTICK_RATE_HZ ) - 1UL );
//const unsigned long ulCounterValue = ( ( XPAR_AXI_TIMER_0_CLOCK_FREQ_HZ / configTICK_RATE_HZ ) - 1UL );
const unsigned long ulCounterValue = ( ( ( XPAR_AXI_TIMER_0_CLOCK_FREQ_HZ / configTICK_RATE_HZ ) - 1UL ) ) * 2UL; //_RB_ there is a clock set up incorrectly somwehre, the *2 should not be required. */
extern void vTickISR( void *pvUnused );
/* Initialise the timer/counter. */
@ -475,4 +476,17 @@ unsigned long ulCSR;
ulCSR = XTmrCtr_GetControlStatusReg( XPAR_AXI_TIMER_0_BASEADDR, 0 );
XTmrCtr_SetControlStatusReg( XPAR_AXI_TIMER_0_BASEADDR, 0, ulCSR );
}
/*-----------------------------------------------------------*/
void vAssertCalled( char *pcFile, long lLine )
{
volatile unsigned long ul = 1;
taskDISABLE_INTERRUPTS();
while( ul == 1 )
{
/* Just for somewhere to put a breakpoint. */
portNOP();
}
taskENABLE_INTERRUPTS();
}

2
Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/main-full.c
View file

@ -546,7 +546,7 @@ const unsigned char ucSetToOutput = 0U;
}
/*-----------------------------------------------------------*/
extern void vAssertCalled( char *pcFile, long lLine )
void vAssertCalled( char *pcFile, long lLine )
{
volatile unsigned long ul = 1;