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Richard Barry
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293
20100923-V6.1.0-RC2/Source/portable/MPLAB/PIC32MX/port_asm.S
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20100923-V6.1.0-RC2/Source/portable/MPLAB/PIC32MX/port_asm.S
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/*
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FreeRTOS V6.1.0 - Copyright (C) 2010 Real Time Engineers Ltd.
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***************************************************************************
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* *
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* If you are: *
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* *
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* + New to FreeRTOS, *
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* + Wanting to learn FreeRTOS or multitasking in general quickly *
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* + Looking for basic training, *
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* + Wanting to improve your FreeRTOS skills and productivity *
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* *
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* then take a look at the FreeRTOS books - available as PDF or paperback *
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* *
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* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
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* http://www.FreeRTOS.org/Documentation *
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* *
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* A pdf reference manual is also available. Both are usually delivered *
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* to your inbox within 20 minutes to two hours when purchased between 8am *
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* and 8pm GMT (although please allow up to 24 hours in case of *
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* exceptional circumstances). Thank you for your support! *
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* *
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***************************************************************************
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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***NOTE*** The exception to the GPL is included to allow you to distribute
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a combined work that includes FreeRTOS without being obliged to provide the
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source code for proprietary components outside of the FreeRTOS kernel.
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details. You should have received a copy of the GNU General Public
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License and the FreeRTOS license exception along with FreeRTOS; if not it
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can be viewed here: http://www.freertos.org/a00114.html and also obtained
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by writing to Richard Barry, contact details for whom are available on the
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FreeRTOS WEB site.
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1 tab == 4 spaces!
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http://www.FreeRTOS.org - Documentation, latest information, license and
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contact details.
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http://www.SafeRTOS.com - A version that is certified for use in safety
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critical systems.
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http://www.OpenRTOS.com - Commercial support, development, porting,
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licensing and training services.
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*/
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#include <p32xxxx.h>
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#include <sys/asm.h>
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#include "ISR_Support.h"
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.set nomips16
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.set noreorder
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.extern pxCurrentTCB
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.extern vTaskSwitchContext
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.extern vPortIncrementTick
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.extern xISRStackTop
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.global vPortStartFirstTask
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.global vPortYieldISR
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.global vT1InterruptHandler
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/******************************************************************/
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.section .FreeRTOS, "ax", @progbits
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.set noreorder
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.set noat
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.ent vT1InterruptHandler
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vT1InterruptHandler:
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portSAVE_CONTEXT
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jal vPortIncrementTick
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nop
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portRESTORE_CONTEXT
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.end vT1InterruptHandler
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/******************************************************************/
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.section .FreeRTOS, "ax", @progbits
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.set noreorder
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.set noat
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.ent xPortStartScheduler
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vPortStartFirstTask:
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/* Simply restore the context of the highest priority task that has been
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created so far. */
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portRESTORE_CONTEXT
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.end xPortStartScheduler
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/*******************************************************************/
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.section .FreeRTOS, "ax", @progbits
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.set noreorder
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.set noat
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.ent vPortYieldISR
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vPortYieldISR:
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/* Make room for the context. First save the current status so we can
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manipulate it, and the cause and EPC registers so we capture their
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original values in case of interrupt nesting. */
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mfc0 k0, _CP0_CAUSE
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addiu sp, sp, -portCONTEXT_SIZE
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mfc0 k1, _CP0_STATUS
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/* Also save s6 and s5 so we can use them during this interrupt. Any
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nesting interrupts should maintain the values of these registers
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across the ISR. */
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sw s6, 44(sp)
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sw s5, 40(sp)
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sw k1, portSTATUS_STACK_LOCATION(sp)
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/* Enable interrupts above the current priority. */
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srl k0, k0, 0xa
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ins k1, k0, 10, 6
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ins k1, zero, 1, 4
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/* s5 is used as the frame pointer. */
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add s5, zero, sp
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/* Swap to the system stack. This is not conditional on the nesting
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count as this interrupt is always the lowest priority and therefore
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the nesting is always 0. */
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la sp, xISRStackTop
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lw sp, (sp)
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/* Set the nesting count. */
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la k0, uxInterruptNesting
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addiu s6, zero, 1
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sw s6, 0(k0)
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/* s6 holds the EPC value, this is saved with the rest of the context
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after interrupts are enabled. */
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mfc0 s6, _CP0_EPC
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/* Re-enable interrupts. */
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mtc0 k1, _CP0_STATUS
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/* Save the context into the space just created. s6 is saved again
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here as it now contains the EPC value. */
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sw ra, 120(s5)
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sw s8, 116(s5)
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sw t9, 112(s5)
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sw t8, 108(s5)
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sw t7, 104(s5)
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sw t6, 100(s5)
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sw t5, 96(s5)
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sw t4, 92(s5)
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sw t3, 88(s5)
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sw t2, 84(s5)
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sw t1, 80(s5)
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sw t0, 76(s5)
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sw a3, 72(s5)
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sw a2, 68(s5)
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sw a1, 64(s5)
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sw a0, 60(s5)
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sw v1, 56(s5)
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sw v0, 52(s5)
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sw s7, 48(s5)
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sw s6, portEPC_STACK_LOCATION(s5)
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/* s5 and s6 has already been saved. */
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sw s4, 36(s5)
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sw s3, 32(s5)
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sw s2, 28(s5)
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sw s1, 24(s5)
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sw s0, 20(s5)
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sw $1, 16(s5)
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/* s7 is used as a scratch register as this should always be saved across
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nesting interrupts. */
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mfhi s7
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sw s7, 12(s5)
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mflo s7
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sw s7, 8(s5)
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/* Save the stack pointer to the task. */
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la s7, pxCurrentTCB
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lw s7, (s7)
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sw s5, (s7)
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/* Set the interrupt mask to the max priority that can use the API. */
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di
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mfc0 s7, _CP0_STATUS
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ori s7, s7, 1
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ori s6, s7, configMAX_SYSCALL_INTERRUPT_PRIORITY << 10
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/* This mtc0 re-enables interrupts, but only above
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configMAX_SYSCALL_INTERRUPT_PRIORITY. */
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mtc0 s6, _CP0_STATUS
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/* Clear the software interrupt in the core. */
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mfc0 s6, _CP0_CAUSE
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addiu s4,zero,-257
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and s6, s6, s4
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mtc0 s6, _CP0_CAUSE
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/* Clear the interrupt in the interrupt controller. */
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la s6, IFS0CLR
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addiu s4, zero, 2
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sw s4, (s6)
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jal vTaskSwitchContext
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nop
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/* Clear the interrupt mask again. The saved status value is still in s7. */
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mtc0 s7, _CP0_STATUS
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/* Restore the stack pointer from the TCB. */
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la s0, pxCurrentTCB
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lw s0, (s0)
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lw s5, (s0)
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/* Restore the rest of the context. */
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lw s0, 8(s5)
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mtlo s0
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lw s0, 12(s5)
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mthi s0
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lw $1, 16(s5)
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lw s0, 20(s5)
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lw s1, 24(s5)
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lw s2, 28(s5)
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lw s3, 32(s5)
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lw s4, 36(s5)
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/* s5 is loaded later. */
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lw s6, 44(s5)
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lw s7, 48(s5)
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lw v0, 52(s5)
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lw v1, 56(s5)
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lw a0, 60(s5)
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lw a1, 64(s5)
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lw a2, 68(s5)
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lw a3, 72(s5)
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lw t0, 76(s5)
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lw t1, 80(s5)
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lw t2, 84(s5)
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lw t3, 88(s5)
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lw t4, 92(s5)
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lw t5, 96(s5)
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lw t6, 100(s5)
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lw t7, 104(s5)
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lw t8, 108(s5)
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lw t9, 112(s5)
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lw s8, 116(s5)
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lw ra, 120(s5)
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/* Protect access to the k registers, and others. */
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di
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/* Set nesting back to zero. As the lowest priority interrupt this
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interrupt cannot have nested. */
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la k0, uxInterruptNesting
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sw zero, 0(k0)
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/* Switch back to use the real stack pointer. */
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add sp, zero, s5
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/* Restore the real s5 value. */
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lw s5, 40(sp)
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/* Pop the status and epc values. */
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lw k1, portSTATUS_STACK_LOCATION(sp)
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lw k0, portEPC_STACK_LOCATION(sp)
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/* Remove stack frame. */
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addiu sp, sp, portCONTEXT_SIZE
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mtc0 k1, _CP0_STATUS
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ehb
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mtc0 k0, _CP0_EPC
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eret
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nop
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.end vPortYieldISR
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