From 481c722ef3af605bd2bb9c570945aa5671ba6d5b Mon Sep 17 00:00:00 2001 From: Fabian Date: Tue, 28 Dec 2021 20:52:33 +0100 Subject: [PATCH] RISC-V: No #error on RV64 regarding byte alignment (#367) Co-authored-by: Joseph Julicher Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> --- portable/GCC/RISC-V/portmacro.h | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/portable/GCC/RISC-V/portmacro.h b/portable/GCC/RISC-V/portmacro.h index fe93dc28c..dd56dcb8b 100644 --- a/portable/GCC/RISC-V/portmacro.h +++ b/portable/GCC/RISC-V/portmacro.h @@ -81,12 +81,7 @@ not need to be guarded with a critical section. */ /* Architecture specifics. */ #define portSTACK_GROWTH ( -1 ) #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) -#ifdef __riscv64 - #error This is the RV32 port that has not yet been adapted for 64. - #define portBYTE_ALIGNMENT 16 -#else - #define portBYTE_ALIGNMENT 16 -#endif +#define portBYTE_ALIGNMENT 16 /*-----------------------------------------------------------*/