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UpdUpdate IAR projects to use Embedded Workbench V5.11.
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Richard Barry
parent
dfb8e7003b
commit
474cb76864
104 changed files with 10988 additions and 22710 deletions
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//*----------------------------------------------------------------------------
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//* ATMEL Microcontroller Software Support - ROUSSET -
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//*----------------------------------------------------------------------------
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//* The software is delivered "AS IS" without warranty or condition of any
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//* kind, either express, implied or statutory. This includes without
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//* limitation any warranty or condition with respect to merchantability or
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//* fitness for any particular purpose, or against the infringements of
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//* intellectual property rights of others.
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//*----------------------------------------------------------------------------
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//* File Name : Cstartup_SAM7.c
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//* Object : Low level initializations written in C for IAR
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//* tools
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//* 1.0 08/Sep/04 JPP : Creation
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//* 1.10 10/Sep/04 JPP : Update AT91C_CKGR_PLLCOUNT filed
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//*----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// ATMEL Microcontroller Software Support - ROUSSET -
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//-----------------------------------------------------------------------------
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// DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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// IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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// DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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// OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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// EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//-----------------------------------------------------------------------------
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// File Name : Cstartup_SAM7.c
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// Object : Low level initialisations written in C for Tools
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// For AT91SAM7X256 with 2 flash plane
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// Creation : JPP 14-Sep-2006
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//-----------------------------------------------------------------------------
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// Include the board file description
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#include "Board.h"
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//#include "init.h"
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#include <string.h>
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// The following functions must be write in ARM mode this function called directly
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// by exception vector
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// The following functions must be write in ARM mode this function called
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// directly by exception vector
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extern void AT91F_Spurious_handler(void);
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extern void AT91F_Default_IRQ_handler(void);
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extern void AT91F_Default_FIQ_handler(void);
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//*----------------------------------------------------------------------------
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//* \fn AT91F_LowLevelInit
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//* \brief This function performs very low level HW initialization
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//* this function can be use a Stack, depending the compilation
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//* this function can use a Stack, depending the compilation
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//* optimization mode
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//*----------------------------------------------------------------------------
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void AT91F_LowLevelInit( void);
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void AT91F_LowLevelInit( void ) @ "ICODE"
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void AT91F_LowLevelInit(void) @ "ICODE"
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{
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int i;
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AT91PS_PMC pPMC = AT91C_BASE_PMC;
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unsigned char i;
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///////////////////////////////////////////////////////////////////////////
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// EFC Init
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///////////////////////////////////////////////////////////////////////////
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AT91C_BASE_MC->MC_FMR = AT91C_MC_FWS_1FWS ;
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//* Set Flash Waite sate
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// Single Cycle Access at Up to 30 MHz, or 40
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// if MCK = 47923200 I have 50 Cycle for 1 useconde ( flied MC_FMR->FMCN
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AT91C_BASE_MC->MC_FMR = ((AT91C_MC_FMCN)&(75 <<16)) | AT91C_MC_FWS_1FWS ;
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///////////////////////////////////////////////////////////////////////////
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// Init PMC Step 1. Enable Main Oscillator
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// Main Oscillator startup time is board specific:
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// Main Oscillator Startup Time worst case (3MHz) corresponds to 15ms
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// (0x40 for AT91C_CKGR_OSCOUNT field)
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///////////////////////////////////////////////////////////////////////////
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AT91C_BASE_PMC->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x40 <<8) | AT91C_CKGR_MOSCEN ));
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// Wait Main Oscillator stabilization
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while(!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS));
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//* Watchdog Disable
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AT91C_BASE_WDTC->WDTC_WDMR= AT91C_WDTC_WDDIS;
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///////////////////////////////////////////////////////////////////////////
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// Init PMC Step 2.
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// Set PLL to 96MHz (96,109MHz) and UDP Clock to 48MHz
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// PLL Startup time depends on PLL RC filter: worst case is choosen
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// UDP Clock (48,058MHz) is compliant with the Universal Serial Bus
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// Specification (+/- 0.25% for full speed)
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///////////////////////////////////////////////////////////////////////////
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AT91C_BASE_PMC->PMC_PLLR = AT91C_CKGR_USBDIV_1 |
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(16 << 8) |
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(AT91C_CKGR_MUL & (72 << 16)) |
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(AT91C_CKGR_DIV & 14);
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// Wait for PLL stabilization
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while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCK) );
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// Wait until the master clock is established for the case we already
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// turn on the PLL
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while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) );
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// If we are running off a j-link then the PLL will have already been setup.
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if( !( pPMC->PMC_MCKR & AT91C_PMC_CSS_PLL_CLK ) )
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{
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//* Set MCK at 47 923 200
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// 1 Enabling the Main Oscillator:
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// SCK = 1/32768 = 30.51 uSeconde
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// Start up time = 8 * 6 / SCK = 56 * 30.51 = 1,46484375 ms
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pPMC->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x06 <<8) | AT91C_CKGR_MOSCEN ));
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// Wait the startup time
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while(!(pPMC->PMC_SR & AT91C_PMC_MOSCS));
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// 2 Checking the Main Oscillator Frequency (Optional)
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// 3 Setting PLL and divider:
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// - div by 5 Fin = 3,6864 =(18,432 / 5)
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// - Mul 25+1: Fout = 95,8464 =(3,6864 *26)
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// for 96 MHz the erroe is 0.16%
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//eld out NOT USED = 0 Fi
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pPMC->PMC_PLLR = ((AT91C_CKGR_DIV & 5) |
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(AT91C_CKGR_PLLCOUNT & (28<<8)) |
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(AT91C_CKGR_MUL & (25<<16)));
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///////////////////////////////////////////////////////////////////////////
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// Init PMC Step 3.
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// Selection of Master Clock MCK equal to (Processor Clock PCK) PLL/2=48MHz
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// The PMC_MCKR register must not be programmed in a single write operation
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// (see. Product Errata Sheet)
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///////////////////////////////////////////////////////////////////////////
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AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2;
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// Wait until the master clock is established
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while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) );
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// Wait the startup time
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while(!(pPMC->PMC_SR & AT91C_PMC_LOCK));
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// 4. Selection of Master Clock and Processor Clock
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// select the PLL clock divided by 2
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AT91C_BASE_PMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK;
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// Wait until the master clock is established
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while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) );
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pPMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2 ;
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while(!(pPMC->PMC_SR & AT91C_PMC_MCKRDY));
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///////////////////////////////////////////////////////////////////////////
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// Disable Watchdog (write once register)
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///////////////////////////////////////////////////////////////////////////
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AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
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pPMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK ;
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while(!(pPMC->PMC_SR & AT91C_PMC_MCKRDY));
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}
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// Set up the default interrupts handler vectors
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AT91C_BASE_AIC->AIC_SVR[0] = (int) AT91F_Default_FIQ_handler ;
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for (i=1;i < 31; i++)
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{
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AT91C_BASE_AIC->AIC_SVR[i] = (int) AT91F_Default_IRQ_handler ;
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}
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AT91C_BASE_AIC->AIC_SPU = (int) AT91F_Spurious_handler ;
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///////////////////////////////////////////////////////////////////////////
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// Init AIC: assign corresponding handler for each interrupt source
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///////////////////////////////////////////////////////////////////////////
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AT91C_BASE_AIC->AIC_SVR[0] = (int) AT91F_Default_FIQ_handler ;
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for (i = 1; i < 31; i++) {
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AT91C_BASE_AIC->AIC_SVR[i] = (int) AT91F_Default_IRQ_handler ;
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}
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AT91C_BASE_AIC->AIC_SPU = (unsigned int) AT91F_Spurious_handler;
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}
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