mirror of
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UpdUpdate IAR projects to use Embedded Workbench V5.11.
This commit is contained in:
Richard Barry
parent
dfb8e7003b
commit
474cb76864
104 changed files with 10988 additions and 22710 deletions
242
Demo/ARM9_STR91X_IAR/91x_init.s
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242
Demo/ARM9_STR91X_IAR/91x_init.s
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;******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
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;* File Name : 91x_init.s
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;* Author : MCD Application Team
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;* Date First Issued : 05/18/2006 : Version 1.0
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;* Description : This module performs:
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;* - FLASH/RAM initialization,
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;* - Stack pointer initialization for each mode ,
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;* - Branches to ?main in the C library (which eventually
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;* calls main()).
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;*
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;* On reset, the ARM core starts up in Supervisor (SVC) mode,
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;* in ARM state,with IRQ and FIQ disabled.
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;*******************************************************************************
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;* History:
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;* 05/22/2007 : Version 1.2
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;* 05/24/2006 : Version 1.1
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;* 05/18/2006 : Version 1.0
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;*******************************************************************************
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;* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
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;* CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS
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;* A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
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;* OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
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;* OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
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;* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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;******************************************************************************/
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; At power up, the CPU defaults to run on the oscillator clock, so Depending
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; of your Application, Disable or Enable the following Define
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#define PLL_Clock ; Use PLL as the default clock source @ 96 MHz only with
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; Bank 0 @ 0x0 and Bank 1 @ 0x80000
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; #define RTC_Clock ; Use RTC as the default clock source
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; #define OSC_Clock ; Use OSC as the default clock source
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; --- Standard definitions of mode bits and interrupt (I & F) flags in PSRs
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Mode_USR EQU 0x10
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Mode_FIQ EQU 0x11
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Mode_IRQ EQU 0x12
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Mode_SVC EQU 0x13
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Mode_ABT EQU 0x17
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Mode_UND EQU 0x1B
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Mode_SYS EQU 0x1F ; available on ARM Arch 4 and later
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I_Bit EQU 0x80 ; when I bit is set, IRQ is disabled
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F_Bit EQU 0x40 ; when F bit is set, FIQ is disabled
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; --- STR9X SCU specific definitions
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SCU_BASE_Address EQU 0x5C002000 ; SCU Base Address
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SCU_CLKCNTR_OFST EQU 0x00000000 ; Clock Control register Offset
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SCU_PLLCONF_OFST EQU 0x00000004 ; PLL Configuration register Offset
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SCU_SYSSTATUS_OFST EQU 0x00000008 ; System Status Register Offset
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SCU_SCR0_OFST EQU 0x00000034 ; System Configuration Register 0 Offset
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; --- STR9X FMI specific definitions
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FMI_BASE_Address EQU 0x54000000 ; FMI Base Address
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FMI_BBSR_OFST EQU 0x00000000 ; Boot Bank Size Register
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FMI_NBBSR_OFST EQU 0x00000004 ; Non-boot Bank Size Register
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FMI_BBADR_OFST EQU 0x0000000C ; Boot Bank Base Address Register
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FMI_NBBADR_OFST EQU 0x00000010 ; Non-boot Bank Base Address Register
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FMI_CR_OFST EQU 0x00000018 ; Control Register
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;---------------------------------------------------------------
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; ?program_start
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;---------------------------------------------------------------
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MODULE ?program_start
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SECTION IRQ_STACK:DATA:NOROOT(3)
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SECTION FIQ_STACK:DATA:NOROOT(3)
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SECTION UND_STACK:DATA:NOROOT(3)
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SECTION ABT_STACK:DATA:NOROOT(3)
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SECTION SVC_STACK:DATA:NOROOT(3)
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SECTION CSTACK:DATA:NOROOT(3)
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SECTION .icode:CODE:NOROOT(2)
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PUBLIC __iar_program_start
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EXTERN ?main
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CODE32
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__iar_program_start:
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LDR pc, =NextInst
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NextInst
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NOP ; execute some instructions to access CPU registers after wake
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NOP ; up from Reset, while waiting for OSC stabilization
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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; BUFFERED_Mode
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; ------------------------------------------------------------------------------
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; Description : Enable the Buffered mode.
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; Just enable the buffered define on the 91x_conf.h
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; http://www.arm.com/pdfs/DDI0164A_966E_S.pdf
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; ------------------------------------------------------------------------------
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MRC p15, 0, r0, c1, c0, 0 ; Read CP15 register 1 into r0
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ORR r0, r0, #0x8 ; Enable Write Buffer on AHB
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MCR p15, 0, r0, c1, c0, 0 ; Write CP15 register 1
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; --- Remap Flash Bank 0 at address 0x0 and Bank 1 at address 0x80000,
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; when the bank 0 is the boot bank, then enable the Bank 1.
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LDR R6, =FMI_BASE_Address
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LDR R7, = 0x4 ; BOOT BANK Size = 512KB
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STR R7, [R6, #FMI_BBSR_OFST] ; (2^4) * 32 = 512KB
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LDR R7, = 0x2 ; NON BOOT BANK Size = 32KB
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STR R7, [R6, #FMI_NBBSR_OFST] ; (2^2) * 8 = 32KB
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LDR R7, = 0x0 ; BOOT BANK Address = 0x0
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STR R7, [R6, #FMI_BBADR_OFST]
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LDR R7, = 0x20000 ; NON BOOT BANK Address = 0x80000
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STR R7, [R6, #FMI_NBBADR_OFST] ; need to put 0x20000 because FMI
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; bus on A[25:2] of CPU bus
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LDR R7, = 0x18 ; Enable CS on both banks
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STR R7, [R6, #FMI_CR_OFST] ; LDR R7, = 0x19 ;in RevD
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; to enable 8 words PFQ deepth
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; --- Enable 96K RAM, PFQBC enabled, DTCM & AHB wait-states disabled
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LDR R0, = SCU_BASE_Address
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LDR R1, = 0x0191
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STR R1, [R0, #SCU_SCR0_OFST]
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; ------------------------------------------------------------------------------
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; --- System clock configuration
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; ------------------------------------------------------------------------------
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#ifdef PLL_Clock ; Use 96 MHZ PLL clock as the default frequency
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; --- wait states Flash confguration
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LDR R6, = 0x00080000 ;Write a Write Flash Configuration
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LDR R7, =0x60 ;Register command (60h) to any word
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STRH R7, [R6] ;address in Bank 1.
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LDR R6, = 0x00083040 ;Write a Write Flash Configuration
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LDR R7, = 0x3 ;Register Confirm command (03h)
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STRH R7, [R6] ;2Wstaites in read,PWD,LVD enabled,
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;High BUSCFG.
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; --- PLL configuration
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LDR R1, = 0x00020002 ;Set OSC as clock source
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STR R1, [R0, #SCU_CLKCNTR_OFST ]
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NOP ; Wait for OSC stabilization
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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LDR R1, = 0x000ac019 ;Set PLL ENABLE, to 96Mhz
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STR R1, [R0, #SCU_PLLCONF_OFST]
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Wait_Loop
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LDR R1,[R0, #SCU_SYSSTATUS_OFST] ;Wait until PLL is Locked
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ANDS R1, R1, #0x01
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BEQ Wait_Loop
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LDR R1, = 0x00020080 ;Set PLL as clock source after pll
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STR R1, [R0, #SCU_CLKCNTR_OFST ] ;is locked and FMICLK=RCLK,
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;PCLK=RCLK/2
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#endif
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#ifdef RTC_Clock ;Use RTC as the default clock source
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LDR R1, = 0x00020001 ;Set RTC as clock source and
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STR R1, [R0, #SCU_CLKCNTR_OFST ] ;FMICLK=RCLK, PCLK=RCLK
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#endif
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#ifdef OSC_Clock ;Use Osc as the default clock source
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LDR R1, = 0x00020002 ;Set OSC as clock source and
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STR R1, [R0, #SCU_CLKCNTR_OFST ] ;FMICLK=RCLK, PCLK=RCLK
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#endif
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; --- Initialize Stack pointer registers
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; Enter each mode in turn and set up the stack pointer
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MSR CPSR_c, #Mode_FIQ|I_Bit|F_Bit ; No interrupts
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LDR SP, =SFE(FIQ_STACK)
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MSR CPSR_c, #Mode_IRQ|I_Bit|F_Bit ; No interrupts
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LDR SP, = SFE(IRQ_STACK)
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MSR CPSR_c, #Mode_ABT|I_Bit|F_Bit ; No interrupts
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LDR SP, = SFE(ABT_STACK)
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MSR CPSR_c, #Mode_UND|I_Bit|F_Bit ; No interrupts
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LDR SP, = SFE(UND_STACK)
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MSR CPSR_c, #Mode_SYS ; IRQs & FIQs are now enabled
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LDR SP, = SFE(CSTACK)
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MSR CPSR_c, #Mode_SVC|I_Bit|F_Bit ; No interrupts
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LDR SP, = SFE(SVC_STACK)
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; --- Set bits 17-18(DTCM/ITCM order bits)of the Core Configuration Control
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; Register
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MOV r0, #0x60000
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MCR p15,0x1,r0,c15,c1,0
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; --- Now enter the C code
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B ?main ; Note : use B not BL, because an application will
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; never return this way
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LTORG
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END
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;******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****
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228
Demo/ARM9_STR91X_IAR/91x_vect.s
Normal file
228
Demo/ARM9_STR91X_IAR/91x_vect.s
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@ -0,0 +1,228 @@
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;******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
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;* File Name : 91x_vect.s
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;* Author : MCD Application Team
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;* Date First Issued : 05/18/2006 : Version 1.0
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;* Description : This File used to initialize the exception and IRQ
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;* vectors, and to enter/return to/from exceptions
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;* handlers.
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;*******************************************************************************
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* History:
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* 05/22/2007 : Version 1.2
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* 05/24/2006 : Version 1.1
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* 05/18/2006 : Version 1.0
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;*******************************************************************************
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; THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
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; CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS
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; A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
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; OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
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; OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
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; CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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;******************************************************************************/
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#include "FreeRTOSConfig.h"
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#include "ISR_Support.h"
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SECTION .intvec:CODE:ROOT(2)
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CODE32
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VectorAddress EQU 0xFFFFF030 ; VIC Vector address register address.
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VectorAddressDaisy EQU 0xFC000030 ; Daisy VIC Vector address register
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I_Bit EQU 0x80 ; when I bit is set, IRQ is disabled
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F_Bit EQU 0x40 ; when F bit is set, FIQ is disabled
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;*******************************************************************************
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; Import the __iar_program_start address from 91x_init.s
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;*******************************************************************************
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IMPORT __iar_program_start
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;*******************************************************************************
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; Import exception handlers
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;*******************************************************************************
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IMPORT Undefined_Handler
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IMPORT vPortYieldProcessor ; FreeRTOS SWI handler
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IMPORT Prefetch_Handler
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IMPORT Abort_Handler
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IMPORT FIQ_Handler
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;*******************************************************************************
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; Export Peripherals IRQ handlers table address
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;*******************************************************************************
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;*******************************************************************************
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; Exception vectors
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;*******************************************************************************
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LDR PC, Reset_Addr
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LDR PC, Undefined_Addr
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LDR PC, SWI_Addr
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LDR PC, Prefetch_Addr
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LDR PC, Abort_Addr
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NOP ; Reserved vector
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LDR PC, IRQ_Addr
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;*******************************************************************************
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;* Function Name : FIQHandler
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;* Description : This function is called when FIQ exception is entered.
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;* Input : none
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;* Output : none
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;*******************************************************************************
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FIQHandler
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SUB lr,lr,#4 ; Update the link register.
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STMFD sp!,{r0-r7,lr} ; Save The workspace plus the current return
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; address lr_fiq into the FIQ stack.
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ldr r0,=FIQ_Handler
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ldr lr,=FIQ_Handler_end
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bx r0 ;Branch to FIQ_Handler.
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FIQ_Handler_end:
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LDMFD sp!,{r0-r7,pc}^; Return to the instruction following...
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; ...the exception interrupt.
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;*******************************************************************************
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; Exception handlers address table
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;*******************************************************************************
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Reset_Addr DCD __iar_program_start
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Undefined_Addr DCD UndefinedHandler
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SWI_Addr DCD vPortYieldProcessor
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Prefetch_Addr DCD PrefetchAbortHandler
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Abort_Addr DCD DataAbortHandler
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DCD 0 ; Reserved vector
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IRQ_Addr DCD IRQHandler
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;*******************************************************************************
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; MACRO
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;*******************************************************************************
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;*******************************************************************************
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;* Macro Name : SaveContext
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;* Description : This macro is used to save the context before entering
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; an exception handler.
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;* Input : The range of registers to store.
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;* Output : none
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;*******************************************************************************
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SaveContext MACRO reg1,reg2
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STMFD sp!,{reg1-reg2,lr} ; Save The workspace plus the current return
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; address lr_ mode into the stack.
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MRS r1,spsr ; Save the spsr_mode into r1.
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STMFD sp!,{r1} ; Save spsr.
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ENDM
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;*******************************************************************************
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;* Macro Name : RestoreContext
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;* Description : This macro is used to restore the context to return from
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; an exception handler and continue the program execution.
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;* Input : The range of registers to restore.
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;* Output : none
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;*******************************************************************************
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RestoreContext MACRO reg1,reg2
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LDMFD sp!,{r1} ; Restore the saved spsr_mode into r1.
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MSR spsr_cxsf,r1 ; Restore spsr_mode.
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LDMFD sp!,{reg1-reg2,pc}^; Return to the instruction following...
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; ...the exception interrupt.
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ENDM
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;*******************************************************************************
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; Exception Handlers
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;*******************************************************************************
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;*******************************************************************************
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;* Function Name : UndefinedHandler
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;* Description : This function is called when undefined instruction
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; exception is entered.
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;* Input : none
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;* Output : none
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;*******************************************************************************
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UndefinedHandler
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SaveContext r0,r12 ; Save the workspace plus the current
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; return address lr_ und and spsr_und.
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ldr r0,=Undefined_Handler
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ldr lr,=Undefined_Handler_end
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bx r0 ; Branch to Undefined_Handler.
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Undefined_Handler_end:
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RestoreContext r0,r12 ; Return to the instruction following...
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; ...the undefined instruction.
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;*******************************************************************************
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;* Function Name : PrefetchAbortHandler
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;* Description : This function is called when Prefetch Abort
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; exception is entered.
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;* Input : none
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;* Output : none
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;*******************************************************************************
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PrefetchAbortHandler
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SUB lr,lr,#4 ; Update the link register.
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SaveContext r0,r12 ; Save the workspace plus the current
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; return address lr_abt and spsr_abt.
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ldr r0,=Prefetch_Handler
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ldr lr,=Prefetch_Handler_end
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bx r0 ; Branch to Prefetch_Handler.
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Prefetch_Handler_end:
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RestoreContext r0,r12 ; Return to the instruction following that...
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; ...has generated the prefetch abort exception.
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;*******************************************************************************
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;* Function Name : DataAbortHandler
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;* Description : This function is called when Data Abort
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; exception is entered.
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;* Input : none
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;* Output : none
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;*******************************************************************************
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DataAbortHandler
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SUB lr,lr,#8 ; Update the link register.
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SaveContext r0,r12 ; Save the workspace plus the current
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; return address lr_ abt and spsr_abt.
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ldr r0,=Abort_Handler
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ldr lr,=Abort_Handler_end
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bx r0 ; Branch to Abort_Handler.
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Abort_Handler_end:
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RestoreContext r0,r12 ; Return to the instruction following that...
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; ...has generated the data abort exception.
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;*******************************************************************************
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;* Function Name : IRQHandler
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;* Description : This function is called when IRQ exception is entered.
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;* Input : none
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;* Output : none
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;*******************************************************************************
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IRQHandler
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portSAVE_CONTEXT ; Save the context of the current task.
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LDR r0, = VectorAddress
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LDR r0, [r0] ; Read the routine address
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LDR r1, = VectorAddressDaisy
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LDR r1, [r1]
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MOV lr, pc
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bx r0
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LDR r0, = VectorAddress ; Write to the VectorAddress to clear the
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STR r0, [r0] ; respective interrupt in the internal interrupt
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LDR r1, = VectorAddressDaisy ; Write to the VectorAddressDaisy to clear the
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STR r1,[r1] ; respective interrupt in the internal interrupt
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||||
portRESTORE_CONTEXT ; Restore the context of the selected task.
|
||||
|
||||
LTORG
|
||||
|
||||
END
|
||||
;******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****
|
||||
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
42
Demo/ARM9_STR91X_IAR/STR91x_FLASH.icf
Normal file
42
Demo/ARM9_STR91X_IAR/STR91x_FLASH.icf
Normal file
|
|
@ -0,0 +1,42 @@
|
|||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x00000178;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0007FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x04000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x04017FFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x200;
|
||||
define symbol __ICFEDIT_size_svcstack__ = 0x200;
|
||||
define symbol __ICFEDIT_size_irqstack__ = 0x200;
|
||||
define symbol __ICFEDIT_size_fiqstack__ = 0x10;
|
||||
define symbol __ICFEDIT_size_undstack__ = 0x10;
|
||||
define symbol __ICFEDIT_size_abtstack__ = 0x10;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x4;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block SVC_STACK with alignment = 8, size = __ICFEDIT_size_svcstack__ { };
|
||||
define block IRQ_STACK with alignment = 8, size = __ICFEDIT_size_irqstack__ { };
|
||||
define block FIQ_STACK with alignment = 8, size = __ICFEDIT_size_fiqstack__ { };
|
||||
define block UND_STACK with alignment = 8, size = __ICFEDIT_size_undstack__ { };
|
||||
define block ABT_STACK with alignment = 8, size = __ICFEDIT_size_abtstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { first block ICode{section .icode}, readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block SVC_STACK, block IRQ_STACK, block FIQ_STACK,
|
||||
block UND_STACK, block ABT_STACK, block HEAP };
|
||||
|
|
@ -22,11 +22,11 @@
|
|||
@REM but they are listed at the end of this file for reference.
|
||||
|
||||
|
||||
"C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\bin\cspybat" "C:\Devtools\IAR Systems\Embedded Workbench 4.0\ARM\bin\armproc.dll" "C:\Devtools\IAR Systems\Embedded Workbench 4.0\ARM\bin\armjlink.dll" %1 --plugin "C:\Devtools\IAR Systems\Embedded Workbench 4.0\ARM\bin\<libsupport_plugin>" --backend -B "--endian" "little" "--cpu" "ARM966E-S" "--fpu" "None" "--proc_device_desc_file" "C:\Devtools\IAR Systems\Embedded Workbench 4.0\ARM\CONFIG\iostr912.ddf" "--drv_verify_download" "all" "--proc_driver" "jlink" "--jlink_connection" "USB:0" "--jlink_initial_speed" "32" "--jlink_catch_exceptions" "0x000"
|
||||
"C:\Devtools\IAR Systems\Embedded Workbench 5.0\common\bin\cspybat" "C:\Devtools\IAR Systems\Embedded Workbench 5.0\ARM\bin\armproc.dll" "C:\Devtools\IAR Systems\Embedded Workbench 5.0\ARM\bin\armjlink.dll" %1 --plugin "C:\Devtools\IAR Systems\Embedded Workbench 5.0\ARM\bin\<libsupport_plugin>" --backend -B "--endian" "little" "--cpu" "ARM966E-S" "--fpu" "None" "--proc_device_desc_file" "C:\Devtools\IAR Systems\Embedded Workbench 5.0\ARM\CONFIG\debugger\ST\iostr912f.ddf" "--drv_verify_download" "all" "--proc_no_semihosting" "--proc_driver" "jlink" "--jlink_connection" "USB:0" "--jlink_initial_speed" "32" "--jlink_catch_exceptions" "0x000"
|
||||
|
||||
|
||||
@REM Loaded plugins:
|
||||
@REM armlibsupport.dll
|
||||
@REM C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\plugins\CodeCoverage\CodeCoverage.dll
|
||||
@REM C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\plugins\Profiling\Profiling.dll
|
||||
@REM C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\plugins\stack\stack.dll
|
||||
@REM C:\Devtools\IAR Systems\Embedded Workbench 5.0\common\plugins\CodeCoverage\CodeCoverage.dll
|
||||
@REM C:\Devtools\IAR Systems\Embedded Workbench 5.0\common\plugins\Profiling\Profiling.dll
|
||||
@REM C:\Devtools\IAR Systems\Embedded Workbench 5.0\common\plugins\stack\stack.dll
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
|
||||
|
||||
|
||||
<Column0>252</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>
|
||||
<Column0>268</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>
|
||||
</Workspace>
|
||||
<Disassembly>
|
||||
<PreferedWindows>
|
||||
|
|
@ -28,12 +28,12 @@
|
|||
|
||||
|
||||
|
||||
<MixedMode>1</MixedMode><CodeCovEnabled>0</CodeCovEnabled><CodeCovShow>0</CodeCovShow></Disassembly>
|
||||
<CodeCovEnabled>0</CodeCovEnabled><MixedMode>1</MixedMode><CodeCovShow>0</CodeCovShow></Disassembly>
|
||||
<Register><PreferedWindows><Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows></Register><Find-in-Files><ColumnWidth0>482</ColumnWidth0><ColumnWidth1>68</ColumnWidth1><ColumnWidth2>826</ColumnWidth2></Find-in-Files></Static>
|
||||
<Windows>
|
||||
|
||||
|
||||
<Wnd1>
|
||||
<Wnd0>
|
||||
<Tabs>
|
||||
<Tab>
|
||||
<Identity>TabID-874-7293</Identity>
|
||||
|
|
@ -49,7 +49,7 @@
|
|||
</Tab>
|
||||
<Tab><Identity>TabID-4501-4793</Identity><TabName>Find in Files</TabName><Factory>Find-in-Files</Factory><Session/></Tab><Tab><Identity>TabID-19328-10860</Identity><TabName>Breakpoints</TabName><Factory>Breakpoints</Factory></Tab></Tabs>
|
||||
|
||||
<SelectedTab>0</SelectedTab></Wnd1><Wnd4>
|
||||
<SelectedTab>0</SelectedTab></Wnd0><Wnd2>
|
||||
<Tabs>
|
||||
<Tab>
|
||||
<Identity>TabID-11622-7296</Identity>
|
||||
|
|
@ -57,24 +57,24 @@
|
|||
<Factory>Workspace</Factory>
|
||||
<Session>
|
||||
|
||||
<NodeDict><ExpandedNode>RTOSDemo</ExpandedNode><ExpandedNode>RTOSDemo/Demo Source</ExpandedNode><ExpandedNode>RTOSDemo/Library Source</ExpandedNode><ExpandedNode>RTOSDemo/lwIP</ExpandedNode><ExpandedNode>RTOSDemo/lwIP/WebServer</ExpandedNode><ExpandedNode>RTOSDemo/lwIP/netif</ExpandedNode></NodeDict></Session>
|
||||
<NodeDict><ExpandedNode>RTOSDemo</ExpandedNode></NodeDict></Session>
|
||||
</Tab>
|
||||
</Tabs>
|
||||
|
||||
<SelectedTab>0</SelectedTab></Wnd4><Wnd5><Tabs><Tab><Identity>TabID-21421-21055</Identity><TabName>Disassembly</TabName><Factory>Disassembly</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd5></Windows>
|
||||
<SelectedTab>0</SelectedTab></Wnd2></Windows>
|
||||
<Editor>
|
||||
|
||||
|
||||
|
||||
|
||||
<Pane><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\ARM9_STR91X_IAR\lwip\lwipWebServer\BasicWEB.c</Filename><XPos>0</XPos><YPos>105</YPos><SelStart>4173</SelStart><SelEnd>4173</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\ARM9_STR91X_IAR\lwip\netif\ethernetif.c</Filename><XPos>0</XPos><YPos>39</YPos><SelStart>2184</SelStart><SelEnd>2184</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\ARM9_STR91X_IAR\91x_init_IAR.s</Filename><XPos>0</XPos><YPos>66</YPos><SelStart>3533</SelStart><SelEnd>3533</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\ARM9_STR91X_IAR\main.c</Filename><XPos>0</XPos><YPos>168</YPos><SelStart>6893</SelStart><SelEnd>6893</SelEnd></Tab><ActiveTab>3</ActiveTab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\Common\ethernet\lwIP\netif\etharp.c</Filename><XPos>0</XPos><YPos>103</YPos><SelStart>4348</SelStart><SelEnd>4348</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\ARM9_STR91X_IAR\Library\source\91x_gpio.c</Filename><XPos>0</XPos><YPos>149</YPos><SelStart>5495</SelStart><SelEnd>5495</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\Common\ethernet\lwIP\core\netif.c</Filename><XPos>0</XPos><YPos>75</YPos><SelStart>3644</SelStart><SelEnd>3644</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Source\portable\IAR\STR91x\port.c</Filename><XPos>0</XPos><YPos>393</YPos><SelStart>12049</SelStart><SelEnd>12049</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\ARM9_STR91X_IAR\STCode\lcd.c</Filename><XPos>0</XPos><YPos>332</YPos><SelStart>20082</SelStart><SelEnd>20082</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\Common\ethernet\lwIP\api\tcpip.c</Filename><XPos>0</XPos><YPos>174</YPos><SelStart>4850</SelStart><SelEnd>4867</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Source\tasks.c</Filename><XPos>0</XPos><YPos>516</YPos><SelStart>19652</SelStart><SelEnd>19662</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\ARM9_STR91X_IAR\Library\source\91x_enet.c</Filename><XPos>0</XPos><YPos>397</YPos><SelStart>13417</SelStart><SelEnd>13417</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\ARM9_STR91X_IAR\lwip\api\sys_arch.c</Filename><XPos>0</XPos><YPos>316</YPos><SelStart>9502</SelStart><SelEnd>9502</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\ARM9_STR91X_IAR\FreeRTOSConfig.h</Filename><XPos>0</XPos><YPos>45</YPos><SelStart>2635</SelStart><SelEnd>2635</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\ARM9_STR91X_IAR\lwip\include\lwip\lwipopts.h</Filename><XPos>0</XPos><YPos>18</YPos><SelStart>1789</SelStart><SelEnd>1789</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\str9_test\FreeRTOS_v4.5.0_STR9_rc1\Demo\ARM9_STR91X_IAR\lwip\include\lwIPWebServer\BasicWEB.h</Filename><XPos>0</XPos><YPos>21</YPos><SelStart>1878</SelStart><SelEnd>1878</SelEnd></Tab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
|
||||
<Pane><Tab><Factory>TextEditor</Factory><Filename>C:\E\Dev\FreeRTOS\Demo\ARM9_STR91X_IAR\91x_vect.s</Filename><XPos>0</XPos><YPos>45</YPos><SelStart>2785</SelStart><SelEnd>2785</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\E\Dev\FreeRTOS\Demo\ARM9_STR91X_IAR\91x_init.s</Filename><XPos>0</XPos><YPos>65</YPos><SelStart>3704</SelStart><SelEnd>3704</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\E\Dev\FreeRTOS\Demo\ARM9_STR91X_IAR\main.c</Filename><XPos>0</XPos><YPos>170</YPos><SelStart>6952</SelStart><SelEnd>6952</SelEnd></Tab><ActiveTab>2</ActiveTab><Tab><Factory>TextEditor</Factory><Filename>C:\E\Dev\FreeRTOS\Demo\ARM9_STR91X_IAR\webserver\uIP_Task.c</Filename><XPos>0</XPos><YPos>36</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\E\Dev\FreeRTOS\Demo\ARM9_STR91X_IAR\lwip\include\lwIPWebServer\BasicWEB.h</Filename><XPos>0</XPos><YPos>34</YPos><SelStart>2079</SelStart><SelEnd>2079</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\E\Dev\FreeRTOS\Demo\Common\ethernet\lwIP\core\tcp_in.c</Filename><XPos>0</XPos><YPos>284</YPos><SelStart>10447</SelStart><SelEnd>10447</SelEnd></Tab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
|
||||
<Positions>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<Top><Row0><Sizes><Toolbar-0087eff8><key>iaridepm.enu1</key></Toolbar-0087eff8><Toolbar-03d99498><key>debuggergui.enu1</key></Toolbar-03d99498></Sizes></Row0></Top><Left><Row0><Sizes><Wnd4><Rect><Top>-2</Top><Left>-2</Left><Bottom>740</Bottom><Right>342</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>142857</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>245714</sizeVertCX><sizeVertCY>755601</sizeVertCY></Rect></Wnd4></Sizes></Row0></Left><Right><Row0><Sizes><Wnd5><Rect><Top>-2</Top><Left>-2</Left><Bottom>740</Bottom><Right>198</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>142857</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>142857</sizeVertCX><sizeVertCY>755601</sizeVertCY></Rect></Wnd5></Sizes></Row0></Right><Bottom><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>198</Bottom><Right>1402</Right><x>-2</x><y>-2</y><xscreen>1404</xscreen><yscreen>200</yscreen><sizeHorzCX>1002857</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>142857</sizeVertCX><sizeVertCY>203666</sizeVertCY></Rect></Wnd1></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
|
||||
<Top><Row0><Sizes><Toolbar-01284260><key>iaridepm.enu1</key></Toolbar-01284260><Toolbar-0597fdf0><key>debuggergui.enu1</key></Toolbar-0597fdf0></Sizes></Row0></Top><Left><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>740</Bottom><Right>342</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>142857</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>245714</sizeVertCX><sizeVertCY>755601</sizeVertCY></Rect></Wnd2></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>198</Bottom><Right>1402</Right><x>-2</x><y>-2</y><xscreen>1404</xscreen><yscreen>200</yscreen><sizeHorzCX>1002857</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>142857</sizeVertCX><sizeVertCY>203666</sizeVertCY></Rect></Wnd0></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
|
||||
</Desktop>
|
||||
</Project>
|
||||
|
||||
|
|
|
|||
|
|
@ -19,6 +19,8 @@ LimitSize=0
|
|||
ByteLimit=50
|
||||
[BreakpointUsageDialog]
|
||||
Placement=_ 144 186 919 647
|
||||
[CodeCoverage]
|
||||
Enabled=_ 0
|
||||
[Log file]
|
||||
LoggingEnabled=_ 0
|
||||
LogFile=_ ""
|
||||
|
|
|
|||
|
|
@ -3,7 +3,7 @@
|
|||
<Workspace>
|
||||
<ConfigDictionary>
|
||||
|
||||
<CurrentConfigs><Project>RTOSDemo/ARM - lwIP - D</Project></CurrentConfigs></ConfigDictionary>
|
||||
<CurrentConfigs><Project>RTOSDemo/ARM - uIP - R</Project></CurrentConfigs></ConfigDictionary>
|
||||
<Desktop>
|
||||
<Static>
|
||||
<Workspace>
|
||||
|
|
@ -34,7 +34,7 @@
|
|||
<Factory>Workspace</Factory>
|
||||
<Session>
|
||||
|
||||
<NodeDict><ExpandedNode>RTOSDemo</ExpandedNode></NodeDict></Session>
|
||||
<NodeDict><ExpandedNode>RTOSDemo</ExpandedNode><ExpandedNode>RTOSDemo/System Files</ExpandedNode></NodeDict></Session>
|
||||
</Tab>
|
||||
</Tabs>
|
||||
|
||||
|
|
@ -54,14 +54,14 @@
|
|||
|
||||
|
||||
|
||||
<Pane><Tab><Factory>TextEditor</Factory><Filename>C:\Temp\STR9\str9_test\FreeRTOS_v4.5.0_STR9_rc2\Demo\ARM9_STR91X_IAR\main.c</Filename><XPos>0</XPos><YPos>201</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd></Tab><ActiveTab>0</ActiveTab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
|
||||
<Pane><Tab><Factory>TextEditor</Factory><Filename>C:\E\Dev\FreeRTOS\Demo\ARM9_STR91X_IAR\91x_vect.s</Filename><XPos>0</XPos><YPos>45</YPos><SelStart>2785</SelStart><SelEnd>2785</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\E\Dev\FreeRTOS\Demo\ARM9_STR91X_IAR\91x_init.s</Filename><XPos>0</XPos><YPos>65</YPos><SelStart>3704</SelStart><SelEnd>3704</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\E\Dev\FreeRTOS\Demo\ARM9_STR91X_IAR\main.c</Filename><XPos>0</XPos><YPos>170</YPos><SelStart>6952</SelStart><SelEnd>6952</SelEnd></Tab><ActiveTab>2</ActiveTab><Tab><Factory>TextEditor</Factory><Filename>C:\E\Dev\FreeRTOS\Demo\ARM9_STR91X_IAR\webserver\uIP_Task.c</Filename><XPos>0</XPos><YPos>36</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\E\Dev\FreeRTOS\Demo\ARM9_STR91X_IAR\lwip\include\lwIPWebServer\BasicWEB.h</Filename><XPos>0</XPos><YPos>34</YPos><SelStart>2079</SelStart><SelEnd>2079</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\E\Dev\FreeRTOS\Demo\Common\ethernet\lwIP\core\tcp_in.c</Filename><XPos>0</XPos><YPos>284</YPos><SelStart>10447</SelStart><SelEnd>10447</SelEnd></Tab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
|
||||
<Positions>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<Top><Row0><Sizes><Toolbar-0087f048><key>iaridepm.enu1</key></Toolbar-0087f048></Sizes></Row0></Top><Left><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>606</Bottom><Right>402</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>142857</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>288571</sizeVertCX><sizeVertCY>619145</sizeVertCY></Rect></Wnd0></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>332</Bottom><Right>1402</Right><x>-2</x><y>-2</y><xscreen>1404</xscreen><yscreen>334</yscreen><sizeHorzCX>1002857</sizeHorzCX><sizeHorzCY>340122</sizeHorzCY><sizeVertCX>142857</sizeVertCX><sizeVertCY>203666</sizeVertCY></Rect></Wnd2></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
|
||||
<Top><Row0><Sizes><Toolbar-01284260><key>iaridepm.enu1</key></Toolbar-01284260></Sizes></Row0><Row1><Sizes/></Row1></Top><Left><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>606</Bottom><Right>402</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>142857</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>288571</sizeVertCX><sizeVertCY>619145</sizeVertCY></Rect></Wnd0></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>332</Bottom><Right>1402</Right><x>-2</x><y>-2</y><xscreen>1404</xscreen><yscreen>334</yscreen><sizeHorzCX>1002857</sizeHorzCX><sizeHorzCY>340122</sizeHorzCY><sizeVertCX>142857</sizeVertCX><sizeVertCY>203666</sizeVertCY></Rect></Wnd2></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
|
||||
</Desktop>
|
||||
</Workspace>
|
||||
|
||||
|
|
|
|||
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Add table
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Reference in a new issue