From 1065389c4e6356122b9642b1e23ff3835b3dfde9 Mon Sep 17 00:00:00 2001 From: bradleysmith23 <74752142+bradleysmith23@users.noreply.github.com> Date: Mon, 5 Feb 2024 04:38:15 -0800 Subject: [PATCH 1/2] Fix MISRA C 2012 Rule 10.4 Violations (#972) Fixes for violations of MISRA rule 10.4 --- portable/Common/mpu_wrappers_v2.c | 38 +++++++++++++++---------------- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/portable/Common/mpu_wrappers_v2.c b/portable/Common/mpu_wrappers_v2.c index 4f876ab99..af9e9f129 100644 --- a/portable/Common/mpu_wrappers_v2.c +++ b/portable/Common/mpu_wrappers_v2.c @@ -92,16 +92,16 @@ /** * @brief Checks whether an external index is valid or not. */ - #define IS_EXTERNAL_INDEX_VALID( lIndex ) \ - ( ( ( lIndex ) >= INDEX_OFFSET ) && \ - ( ( lIndex ) < ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE + INDEX_OFFSET ) ) ) + #define IS_EXTERNAL_INDEX_VALID( lIndex ) \ + ( ( ( ( lIndex ) >= INDEX_OFFSET ) && \ + ( ( lIndex ) < ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE + INDEX_OFFSET ) ) ) ? pdTRUE : pdFALSE ) /** * @brief Checks whether an internal index is valid or not. */ - #define IS_INTERNAL_INDEX_VALID( lIndex ) \ - ( ( ( lIndex ) >= 0 ) && \ - ( ( lIndex ) < ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE ) ) ) + #define IS_INTERNAL_INDEX_VALID( lIndex ) \ + ( ( ( ( lIndex ) >= 0 ) && \ + ( ( lIndex ) < ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE ) ) ) ? pdTRUE : pdFALSE ) /** * @brief Converts an internal index into external. @@ -2197,7 +2197,7 @@ if( ( !( ( pvItemToQueue == NULL ) && ( uxQueueItemSize != ( UBaseType_t ) 0U ) ) ) && ( !( ( xCopyPosition == queueOVERWRITE ) && ( uxQueueLength != ( UBaseType_t ) 1U ) ) ) #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) - && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ) + && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0U ) ) ) #endif ) { @@ -2312,7 +2312,7 @@ if( ( !( ( ( pvBuffer ) == NULL ) && ( uxQueueItemSize != ( UBaseType_t ) 0U ) ) ) #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) - && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ) + && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0U ) ) ) #endif ) { @@ -2364,7 +2364,7 @@ if( ( !( ( ( pvBuffer ) == NULL ) && ( uxQueueItemSize != ( UBaseType_t ) 0U ) ) ) #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) - && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ) + && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0U ) ) ) #endif ) { @@ -2411,9 +2411,9 @@ { uxQueueItemSize = uxQueueGetQueueItemSize( xInternalQueueHandle ); - if( ( uxQueueItemSize == 0 ) + if( ( uxQueueItemSize == 0U ) #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) - && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ) + && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0U ) ) ) #endif ) { @@ -3906,10 +3906,10 @@ if( xAreParamsReadable == pdTRUE ) { - if( ( ( pxParams->uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 ) && - ( pxParams->uxBitsToWaitFor != 0 ) + if( ( ( pxParams->uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0U ) && + ( pxParams->uxBitsToWaitFor != 0U ) #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) - && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( pxParams->xTicksToWait != 0 ) ) ) + && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( pxParams->xTicksToWait != 0U ) ) ) #endif ) { @@ -3951,7 +3951,7 @@ int32_t lIndex; BaseType_t xCallingTaskIsAuthorizedToAccessEventGroup = pdFALSE; - if( ( uxBitsToClear & eventEVENT_BITS_CONTROL_BYTES ) == 0 ) + if( ( uxBitsToClear & eventEVENT_BITS_CONTROL_BYTES ) == 0U ) { lIndex = ( int32_t ) xEventGroup; @@ -3986,7 +3986,7 @@ int32_t lIndex; BaseType_t xCallingTaskIsAuthorizedToAccessEventGroup = pdFALSE; - if( ( uxBitsToSet & eventEVENT_BITS_CONTROL_BYTES ) == 0 ) + if( ( uxBitsToSet & eventEVENT_BITS_CONTROL_BYTES ) == 0U ) { lIndex = ( int32_t ) xEventGroup; @@ -4025,10 +4025,10 @@ int32_t lIndex; BaseType_t xCallingTaskIsAuthorizedToAccessEventGroup = pdFALSE; - if( ( ( uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 ) && - ( uxBitsToWaitFor != 0 ) + if( ( ( uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0U ) && + ( uxBitsToWaitFor != 0U ) #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) - && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ) + && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0U ) ) ) #endif ) { From 938ec0f7bfb86ab70e49c23be625c99d760db4eb Mon Sep 17 00:00:00 2001 From: Eric Jackson <115876528+ericbj29@users.noreply.github.com> Date: Mon, 5 Feb 2024 10:31:52 -0800 Subject: [PATCH 2/2] Correct ARM port folder capitalization (#981) * Rename Arm_AARCH64 to ARM_AARCH64 * Rename Arm_AARCH64_SRE to ARM_AARCH64_SRE * Update cmake for ARM port folder capitalization * Update in portable/CmakeLists.txt * Use capitalization name in port README.md --------- Co-authored-by: Ching-Hsin Lee --- portable/CMakeLists.txt | 8 ++++---- portable/GCC/{Arm_AARCH64 => ARM_AARCH64}/README.md | 4 ++-- portable/GCC/{Arm_AARCH64 => ARM_AARCH64}/port.c | 0 portable/GCC/{Arm_AARCH64 => ARM_AARCH64}/portASM.S | 0 portable/GCC/{Arm_AARCH64 => ARM_AARCH64}/portmacro.h | 0 .../GCC/{Arm_AARCH64_SRE => ARM_AARCH64_SRE}/README.md | 4 ++-- portable/GCC/{Arm_AARCH64_SRE => ARM_AARCH64_SRE}/port.c | 0 .../GCC/{Arm_AARCH64_SRE => ARM_AARCH64_SRE}/portASM.S | 0 .../GCC/{Arm_AARCH64_SRE => ARM_AARCH64_SRE}/portmacro.h | 0 portable/GCC/ARM_CA53_64_BIT/README.md | 4 ++-- portable/GCC/ARM_CA53_64_BIT_SRE/README.md | 6 +++--- 11 files changed, 13 insertions(+), 13 deletions(-) rename portable/GCC/{Arm_AARCH64 => ARM_AARCH64}/README.md (96%) rename portable/GCC/{Arm_AARCH64 => ARM_AARCH64}/port.c (100%) rename portable/GCC/{Arm_AARCH64 => ARM_AARCH64}/portASM.S (100%) rename portable/GCC/{Arm_AARCH64 => ARM_AARCH64}/portmacro.h (100%) rename portable/GCC/{Arm_AARCH64_SRE => ARM_AARCH64_SRE}/README.md (95%) rename portable/GCC/{Arm_AARCH64_SRE => ARM_AARCH64_SRE}/port.c (100%) rename portable/GCC/{Arm_AARCH64_SRE => ARM_AARCH64_SRE}/portASM.S (100%) rename portable/GCC/{Arm_AARCH64_SRE => ARM_AARCH64_SRE}/portmacro.h (100%) diff --git a/portable/CMakeLists.txt b/portable/CMakeLists.txt index 98dcf8ed3..c067e9706 100644 --- a/portable/CMakeLists.txt +++ b/portable/CMakeLists.txt @@ -68,12 +68,12 @@ add_library(freertos_kernel_port OBJECT # ARMv8-A ports for GCC $<$: - GCC/Arm_AARCH64/port.c - GCC/Arm_AARCH64/portASM.S> + GCC/ARM_AARCH64/port.c + GCC/ARM_AARCH64/portASM.S> $<$: - GCC/Arm_AARCH64_SRE/port.c - GCC/Arm_AARCH64_SRE/portASM.S> + GCC/ARM_AARCH64_SRE/port.c + GCC/ARM_AARCH64_SRE/portASM.S> # ARMv6-M port for GCC $<$: diff --git a/portable/GCC/Arm_AARCH64/README.md b/portable/GCC/ARM_AARCH64/README.md similarity index 96% rename from portable/GCC/Arm_AARCH64/README.md rename to portable/GCC/ARM_AARCH64/README.md index 70552c202..0bee96951 100644 --- a/portable/GCC/Arm_AARCH64/README.md +++ b/portable/GCC/ARM_AARCH64/README.md @@ -13,11 +13,11 @@ the T32 and A32 instruction sets. Follow the [link](https://developer.arm.com/Architectures/A-Profile%20Architecture) for more information. -## Arm_AARCH64 port +## ARM_AARCH64 port This port adds support for Armv8-A architecture AArch64 execution state. This port is generic and can be used as a starting point for Armv8-A application processors. -* Arm_AARCH64 +* ARM_AARCH64 * Memory mapped interace to access Arm GIC registers diff --git a/portable/GCC/Arm_AARCH64/port.c b/portable/GCC/ARM_AARCH64/port.c similarity index 100% rename from portable/GCC/Arm_AARCH64/port.c rename to portable/GCC/ARM_AARCH64/port.c diff --git a/portable/GCC/Arm_AARCH64/portASM.S b/portable/GCC/ARM_AARCH64/portASM.S similarity index 100% rename from portable/GCC/Arm_AARCH64/portASM.S rename to portable/GCC/ARM_AARCH64/portASM.S diff --git a/portable/GCC/Arm_AARCH64/portmacro.h b/portable/GCC/ARM_AARCH64/portmacro.h similarity index 100% rename from portable/GCC/Arm_AARCH64/portmacro.h rename to portable/GCC/ARM_AARCH64/portmacro.h diff --git a/portable/GCC/Arm_AARCH64_SRE/README.md b/portable/GCC/ARM_AARCH64_SRE/README.md similarity index 95% rename from portable/GCC/Arm_AARCH64_SRE/README.md rename to portable/GCC/ARM_AARCH64_SRE/README.md index 0b2e0e485..4c9a55af0 100644 --- a/portable/GCC/Arm_AARCH64_SRE/README.md +++ b/portable/GCC/ARM_AARCH64_SRE/README.md @@ -13,11 +13,11 @@ the T32 and A32 instruction sets. Follow the [link](https://developer.arm.com/Architectures/A-Profile%20Architecture) for more information. -## Arm_AARCH64_SRE port +## ARM_AARCH64_SRE port This port adds support for Armv8-A architecture AArch64 execution state. This port is generic and can be used as a starting point for Armv8-A application processors. -* Arm_AARCH64_SRE +* ARM_AARCH64_SRE * System Register interace to access Arm GIC registers diff --git a/portable/GCC/Arm_AARCH64_SRE/port.c b/portable/GCC/ARM_AARCH64_SRE/port.c similarity index 100% rename from portable/GCC/Arm_AARCH64_SRE/port.c rename to portable/GCC/ARM_AARCH64_SRE/port.c diff --git a/portable/GCC/Arm_AARCH64_SRE/portASM.S b/portable/GCC/ARM_AARCH64_SRE/portASM.S similarity index 100% rename from portable/GCC/Arm_AARCH64_SRE/portASM.S rename to portable/GCC/ARM_AARCH64_SRE/portASM.S diff --git a/portable/GCC/Arm_AARCH64_SRE/portmacro.h b/portable/GCC/ARM_AARCH64_SRE/portmacro.h similarity index 100% rename from portable/GCC/Arm_AARCH64_SRE/portmacro.h rename to portable/GCC/ARM_AARCH64_SRE/portmacro.h diff --git a/portable/GCC/ARM_CA53_64_BIT/README.md b/portable/GCC/ARM_CA53_64_BIT/README.md index b3d56c040..a8df29e91 100644 --- a/portable/GCC/ARM_CA53_64_BIT/README.md +++ b/portable/GCC/ARM_CA53_64_BIT/README.md @@ -8,8 +8,8 @@ Arm Cortex-A53 processor. This port is generic and can be used as a starting point for other Armv8-A application processors. Therefore, the port `ARM_CA53_64_BIT` is renamed as -`Arm_AARCH64`. The existing projects that use old port `ARM_CA53_64_BIT`, -should migrate to renamed port `Arm_AARCH64`. +`ARM_AARCH64`. The existing projects that use old port `ARM_CA53_64_BIT`, +should migrate to renamed port `ARM_AARCH64`. **NOTE** diff --git a/portable/GCC/ARM_CA53_64_BIT_SRE/README.md b/portable/GCC/ARM_CA53_64_BIT_SRE/README.md index fb5d7936a..a5d415fc2 100644 --- a/portable/GCC/ARM_CA53_64_BIT_SRE/README.md +++ b/portable/GCC/ARM_CA53_64_BIT_SRE/README.md @@ -7,9 +7,9 @@ Arm Cortex-A53 processor. * System Register interace to access Arm GIC registers This port is generic and can be used as a starting point for other Armv8-A -application processors. Therefore, the port `Arm_AARCH64_SRE` is renamed as -`Arm_AARCH64_SRE`. The existing projects that use old port `Arm_AARCH64_SRE`, -should migrate to renamed port `Arm_AARCH64_SRE`. +application processors. Therefore, the port `ARM_AARCH64_SRE` is renamed as +`ARM_AARCH64_SRE`. The existing projects that use old port `ARM_AARCH64_SRE`, +should migrate to renamed port `ARM_AARCH64_SRE`. **NOTE**