mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-20 10:08:33 -04:00
Updates to the Cortex-M tickless idle code to reduce clock slippage.
Updates to prevent the vTaskSwitchContext() function being removed from GCC builds when link time optimisation is used.
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commit
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16 changed files with 686 additions and 505 deletions
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@ -71,7 +71,7 @@
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* Implementation of functions defined in portable.h for the ARM CM4F port.
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*----------------------------------------------------------*/
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/* Compiler includes. */
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/* IAR includes. */
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#include <intrinsics.h>
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/* Scheduler includes. */
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@ -82,7 +82,7 @@
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#error This port can only be used when the project options are configured to enable hardware floating point support.
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#endif
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#if configMAX_SYSCALL_INTERRUPT_PRIORITY == 0
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#if( configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 )
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#error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
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#endif
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@ -144,10 +144,6 @@ calculations. */
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have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
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#define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL )
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/* Each task maintains its own interrupt status in the critical nesting
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variable. */
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static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
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/*
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* Setup the timer to generate the tick interrupts. The implementation in this
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* file is weak to allow application writers to change the timer used to
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@ -177,10 +173,14 @@ static void prvTaskExitError( void );
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/*-----------------------------------------------------------*/
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/* Each task maintains its own interrupt status in the critical nesting
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variable. */
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static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
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/*
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* The number of SysTick increments that make up one tick period.
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*/
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#if configUSE_TICKLESS_IDLE == 1
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#if( configUSE_TICKLESS_IDLE == 1 )
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static uint32_t ulTimerCountsForOneTick = 0;
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#endif /* configUSE_TICKLESS_IDLE */
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@ -188,7 +188,7 @@ static void prvTaskExitError( void );
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* The maximum number of tick periods that can be suppressed is limited by the
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* 24 bit resolution of the SysTick timer.
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*/
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#if configUSE_TICKLESS_IDLE == 1
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#if( configUSE_TICKLESS_IDLE == 1 )
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static uint32_t xMaximumPossibleSuppressedTicks = 0;
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#endif /* configUSE_TICKLESS_IDLE */
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@ -196,7 +196,7 @@ static void prvTaskExitError( void );
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* Compensate for the CPU cycles that pass while the SysTick is stopped (low
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* power functionality only.
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*/
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#if configUSE_TICKLESS_IDLE == 1
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#if( configUSE_TICKLESS_IDLE == 1 )
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static uint32_t ulStoppedTimerCompensation = 0;
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#endif /* configUSE_TICKLESS_IDLE */
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@ -205,7 +205,7 @@ static void prvTaskExitError( void );
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* FreeRTOS API functions are not called from interrupts that have been assigned
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* a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
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*/
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#if ( configASSERT_DEFINED == 1 )
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#if( configASSERT_DEFINED == 1 )
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static uint8_t ucMaxSysCallPriority = 0;
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static uint32_t ulMaxPRIGROUPValue = 0;
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static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
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@ -265,6 +265,10 @@ static void prvTaskExitError( void )
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*/
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BaseType_t xPortStartScheduler( void )
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{
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/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
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See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
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configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
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#if( configASSERT_DEFINED == 1 )
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{
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volatile uint32_t ulOriginalPriority;
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@ -408,11 +412,11 @@ void xPortSysTickHandler( void )
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}
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/*-----------------------------------------------------------*/
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#if configUSE_TICKLESS_IDLE == 1
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#if( configUSE_TICKLESS_IDLE == 1 )
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__weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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{
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uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;
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uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
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TickType_t xModifiableIdleTime;
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/* Make sure the SysTick reload value does not overflow the counter. */
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@ -488,23 +492,41 @@ void xPortSysTickHandler( void )
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}
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configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
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/* Stop SysTick. Again, the time the SysTick is stopped for is
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accounted for as best it can be, but using the tickless mode will
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inevitably result in some tiny drift of the time maintained by the
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kernel with respect to calendar time. */
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ulSysTickCTRL = portNVIC_SYSTICK_CTRL_REG;
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portNVIC_SYSTICK_CTRL_REG = ( ulSysTickCTRL & ~portNVIC_SYSTICK_ENABLE_BIT );
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/* Re-enable interrupts - see comments above __disable_interrupt()
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call above. */
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/* Re-enable interrupts to allow the interrupt that brought the MCU
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out of sleep mode to execute immediately. see comments above
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__disable_interrupt() call above. */
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__enable_interrupt();
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__DSB();
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__ISB();
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if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
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/* Disable interrupts again because the clock is about to be stopped
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and interrupts that execute while the clock is stopped will increase
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any slippage between the time maintained by the RTOS and calendar
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time. */
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__disable_interrupt();
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__DSB();
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__ISB();
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/* Disable the SysTick clock without reading the
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portNVIC_SYSTICK_CTRL_REG register to ensure the
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portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. Again,
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the time the SysTick is stopped for is accounted for as best it can
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be, but using the tickless mode will inevitably result in some tiny
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drift of the time maintained by the kernel with respect to calendar
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time*/
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portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
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/* Determine if the SysTick clock has already counted to zero and
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been set back to the current reload value (the reload back being
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correct for the entire expected idle time) or if the SysTick is yet
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to count to zero (in which case an interrupt other than the SysTick
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must have brought the system out of sleep mode). */
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if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
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{
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uint32_t ulCalculatedLoadValue;
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/* The tick interrupt has already executed, and the SysTick
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count reloaded with ulReloadValue. Reset the
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/* The tick interrupt is already pending, and the SysTick count
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reloaded with ulReloadValue. Reset the
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portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
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period. */
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ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
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portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
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/* The tick interrupt handler will already have pended the tick
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processing in the kernel. As the pending tick will be
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processed as soon as this function exits, the tick value
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maintained by the tick is stepped forward by one less than the
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time spent waiting. */
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/* As the pending tick will be processed as soon as this
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function exits, the tick value maintained by the tick is stepped
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forward by one less than the time spent waiting. */
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ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
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}
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else
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/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
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again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
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value. The critical section is used to ensure the tick interrupt
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can only execute once in the case that the reload register is near
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zero. */
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value. */
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portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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portENTER_CRITICAL();
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{
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portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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vTaskStepTick( ulCompleteTickPeriods );
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portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
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}
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portEXIT_CRITICAL();
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portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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vTaskStepTick( ulCompleteTickPeriods );
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portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
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/* Exit with interrpts enabled. */
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__enable_interrupt();
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}
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}
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#endif /* #if configUSE_TICKLESS_IDLE */
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#endif /* configUSE_TICKLESS_IDLE */
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/*-----------------------------------------------------------*/
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/*
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uint8_t ucCurrentPriority;
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/* Obtain the number of the currently executing interrupt. */
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__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) );
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__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
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/* Is the interrupt number a user defined interrupt? */
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if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
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devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
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scheduler. Note however that some vendor specific peripheral libraries
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assume a non-zero priority group setting, in which cases using a value
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of zero will result in unpredicable behaviour. */
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of zero will result in unpredictable behaviour. */
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configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
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}
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*-----------------------------------------------------------
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*/
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/* IAR includes. */
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#include <intrinsics.h>
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/* Type definitions. */
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#define portCHAR char
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#define portFLOAT float
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#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
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#endif
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#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
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#if( configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 )
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/* Check the configuration. */
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#if( configMAX_PRIORITIES > 32 )
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/*-----------------------------------------------------------*/
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#include <intrinsics.h>
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#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( ( uint32_t ) __CLZ( ( uxReadyPriorities ) ) ) )
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#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
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