mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-19 09:38:32 -04:00
Updates to the Cortex-M tickless idle code to reduce clock slippage.
Updates to prevent the vTaskSwitchContext() function being removed from GCC builds when link time optimisation is used.
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7ee26c1b5e
commit
464c2660ad
16 changed files with 686 additions and 505 deletions
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@ -144,10 +144,6 @@ debugger. */
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#define portTASK_RETURN_ADDRESS prvTaskExitError
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#endif
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/* Each task maintains its own interrupt status in the critical nesting
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variable. */
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static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
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/*
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* Setup the timer to generate the tick interrupts. The implementation in this
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* file is weak to allow application writers to change the timer used to
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@ -174,10 +170,14 @@ static void prvTaskExitError( void );
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/*-----------------------------------------------------------*/
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/* Each task maintains its own interrupt status in the critical nesting
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variable. */
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static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
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/*
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* The number of SysTick increments that make up one tick period.
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*/
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#if configUSE_TICKLESS_IDLE == 1
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#if( configUSE_TICKLESS_IDLE == 1 )
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static uint32_t ulTimerCountsForOneTick = 0;
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#endif /* configUSE_TICKLESS_IDLE */
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@ -185,7 +185,7 @@ static void prvTaskExitError( void );
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* The maximum number of tick periods that can be suppressed is limited by the
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* 24 bit resolution of the SysTick timer.
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*/
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#if configUSE_TICKLESS_IDLE == 1
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#if( configUSE_TICKLESS_IDLE == 1 )
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static uint32_t xMaximumPossibleSuppressedTicks = 0;
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#endif /* configUSE_TICKLESS_IDLE */
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@ -193,7 +193,7 @@ static void prvTaskExitError( void );
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* Compensate for the CPU cycles that pass while the SysTick is stopped (low
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* power functionality only.
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*/
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#if configUSE_TICKLESS_IDLE == 1
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#if( configUSE_TICKLESS_IDLE == 1 )
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static uint32_t ulStoppedTimerCompensation = 0;
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#endif /* configUSE_TICKLESS_IDLE */
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@ -202,7 +202,7 @@ static void prvTaskExitError( void );
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* FreeRTOS API functions are not called from interrupts that have been assigned
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* a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
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*/
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#if ( configASSERT_DEFINED == 1 )
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#if( configASSERT_DEFINED == 1 )
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static uint8_t ucMaxSysCallPriority = 0;
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static uint32_t ulMaxPRIGROUPValue = 0;
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static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
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@ -370,8 +370,11 @@ BaseType_t xPortStartScheduler( void )
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/* Should never get here as the tasks will now be executing! Call the task
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exit error function to prevent compiler warnings about a static function
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not being called in the case that the application writer overrides this
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functionality by defining configTASK_RETURN_ADDRESS. */
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functionality by defining configTASK_RETURN_ADDRESS. Call
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vTaskSwitchContext() so link time optimisation does not remove the
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symbol. */
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prvTaskExitError();
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vTaskSwitchContext();
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/* Should not get here! */
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return 0;
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@ -471,7 +474,7 @@ void xPortSysTickHandler( void )
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}
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/*-----------------------------------------------------------*/
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#if configUSE_TICKLESS_IDLE == 1
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#if( configUSE_TICKLESS_IDLE == 1 )
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__attribute__((weak)) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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{
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@ -551,13 +554,28 @@ void xPortSysTickHandler( void )
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}
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configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
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/* Re-enable interrupts - see comments above the cpsid instruction()
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above. */
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/* Re-enable interrupts to allow the interrupt that brought the MCU
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out of sleep mode to execute immediately. see comments above
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__disable_interrupt() call above. */
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__asm volatile( "cpsie i" ::: "memory" );
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__asm volatile( "dsb" );
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__asm volatile( "isb" );
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/* Disable interrupts again because the clock is about to be stopped
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and interrupts that execute while the clock is stopped will increase
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any slippage between the time maintained by the RTOS and calendar
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time. */
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__asm volatile( "cpsid i" ::: "memory" );
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__asm volatile( "dsb" );
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__asm volatile( "isb" );
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/* Disable the SysTick clock without reading the
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portNVIC_SYSTICK_CTRL_REG register to ensure the
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portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. */
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portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. Again,
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the time the SysTick is stopped for is accounted for as best it can
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be, but using the tickless mode will inevitably result in some tiny
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drift of the time maintained by the kernel with respect to calendar
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time*/
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portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
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/* Determine if the SysTick clock has already counted to zero and
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@ -569,8 +587,8 @@ void xPortSysTickHandler( void )
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{
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uint32_t ulCalculatedLoadValue;
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/* The tick interrupt has already executed, and the SysTick
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count reloaded with ulReloadValue. Reset the
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/* The tick interrupt is already pending, and the SysTick count
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reloaded with ulReloadValue. Reset the
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portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
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period. */
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ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
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@ -585,11 +603,9 @@ void xPortSysTickHandler( void )
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portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
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/* The tick interrupt handler will already have pended the tick
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processing in the kernel. As the pending tick will be
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processed as soon as this function exits, the tick value
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maintained by the tick is stepped forward by one less than the
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time spent waiting. */
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/* As the pending tick will be processed as soon as this
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function exits, the tick value maintained by the tick is stepped
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forward by one less than the time spent waiting. */
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ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
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}
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else
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@ -611,21 +627,18 @@ void xPortSysTickHandler( void )
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/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
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again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
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value. The critical section is used to ensure the tick interrupt
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can only execute once in the case that the reload register is near
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zero. */
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value. */
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portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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portENTER_CRITICAL();
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{
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portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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vTaskStepTick( ulCompleteTickPeriods );
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portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
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}
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portEXIT_CRITICAL();
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portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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vTaskStepTick( ulCompleteTickPeriods );
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portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
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/* Exit with interrpts enabled. */
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__asm volatile( "cpsie i" ::: "memory" );
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}
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}
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#endif /* #if configUSE_TICKLESS_IDLE */
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#endif /* configUSE_TICKLESS_IDLE */
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/*-----------------------------------------------------------*/
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/*
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@ -635,7 +648,7 @@ void xPortSysTickHandler( void )
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__attribute__(( weak )) void vPortSetupTimerInterrupt( void )
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{
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/* Calculate the constants required to configure the tick interrupt. */
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#if configUSE_TICKLESS_IDLE == 1
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#if( configUSE_TICKLESS_IDLE == 1 )
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{
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ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
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xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
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@ -707,7 +720,7 @@ __attribute__(( weak )) void vPortSetupTimerInterrupt( void )
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devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
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scheduler. Note however that some vendor specific peripheral libraries
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assume a non-zero priority group setting, in which cases using a value
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of zero will result in unpredicable behaviour. */
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of zero will result in unpredictable behaviour. */
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configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
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}
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