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New port files for HCS12 using GCC.
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Source/portable/GCC/HCS12/port.c
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242
Source/portable/GCC/HCS12/port.c
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/*
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FreeRTOS V3.2.3 - Copyright (C) 2003 - 2005 Richard Barry.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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FreeRTOS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with FreeRTOS; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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A special exception to the GPL can be applied should you wish to distribute
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a combined work that includes FreeRTOS, without being obliged to provide
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the source code for any proprietary components. See the licensing section
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of http://www.FreeRTOS.org for full details of how and when the exception
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can be applied.
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***************************************************************************
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See http://www.FreeRTOS.org for documentation, latest information, license
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and contact details. Please ensure to read the configuration and relevant
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port sections of the online documentation.
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***************************************************************************
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*/
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/* GCC/HCS12 port by Jefferson L Smith, 2005 */
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Port includes */
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#include <sys/ports_def.h>
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the HCS12 port.
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*----------------------------------------------------------*/
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/*
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* Configure a timer to generate the RTOS tick at the frequency specified
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* within FreeRTOSConfig.h.
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*/
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static void prvSetupTimerInterrupt( void );
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/* NOTE: Interrupt service routines must be in non-banked memory - as does the
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scheduler startup function. */
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#define ATTR_NEAR __attribute__((near))
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/* Manual context switch function. This is the SWI ISR. */
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// __attribute__((interrupt))
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void ATTR_NEAR vPortYield( void );
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/* Tick context switch function. This is the timer ISR. */
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// __attribute__((interrupt))
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void ATTR_NEAR vPortTickInterrupt( void );
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/* Function in non-banked memory which actually switches to first task. */
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portBASE_TYPE ATTR_NEAR xStartSchedulerNear( void );
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/* Calls to portENTER_CRITICAL() can be nested. When they are nested the
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critical section should not be left (i.e. interrupts should not be re-enabled)
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until the nesting depth reaches 0. This variable simply tracks the nesting
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depth. Each task maintains it's own critical nesting depth variable so
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uxCriticalNesting is saved and restored from the task stack during a context
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switch. */
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volatile unsigned portBASE_TYPE uxCriticalNesting = 0x80; // un-initialized
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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/* Setup the initial stack of the task. The stack is set exactly as
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expected by the portRESTORE_CONTEXT() macro. In this case the stack as
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expected by the HCS12 RTI instruction. */
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/* The address of the task function is placed in the stack byte at a time. */
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*pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pxCode) ) + 1 );
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*--pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pxCode) ) + 0 );
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/* Next are all the registers that form part of the task context. */
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/* Y register */
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*--pxTopOfStack = ( portSTACK_TYPE ) 0xff;
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*--pxTopOfStack = ( portSTACK_TYPE ) 0xee;
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/* X register */
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*--pxTopOfStack = ( portSTACK_TYPE ) 0xdd;
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*--pxTopOfStack = ( portSTACK_TYPE ) 0xcc;
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/* A register contains parameter high byte. */
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*--pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pvParameters) ) + 0 );
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/* B register contains parameter low byte. */
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*--pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pvParameters) ) + 1 );
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/* CCR: Note that when the task starts interrupts will be enabled since
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"I" bit of CCR is cleared */
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*--pxTopOfStack = ( portSTACK_TYPE ) 0x80; // keeps Stop disabled (MCU default)
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/* tmp softregs used by GCC. Values right now don't matter. */
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__asm("\n\
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movw _.frame, 2,-%0 \n\
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movw _.tmp, 2,-%0 \n\
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movw _.z, 2,-%0 \n\
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movw _.xy, 2,-%0 \n\
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;movw _.d2, 2,-%0 \n\
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;movw _.d1, 2,-%0 \n\
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": "=A"(pxTopOfStack) : "0"(pxTopOfStack) );
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#ifdef BANKED_MODEL
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/* The page of the task. */
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*--pxTopOfStack = 0x30; // can only directly start in PPAGE 0x30
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#endif
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/* The critical nesting depth is initialised with 0 (meaning not in
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a critical section). */
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*--pxTopOfStack = ( portSTACK_TYPE ) 0x00;
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* It is unlikely that the HCS12 port will get stopped. */
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}
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/*-----------------------------------------------------------*/
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static void prvSetupTimerInterrupt( void )
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{
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/* Enable hardware RTI timer */
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/* Ignores configTICK_RATE_HZ */
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RTICTL = 0x50; // 16 MHz xtal: 976.56 Hz, 1024mS
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CRGINT |= 0x80; // RTIE
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}
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/*-----------------------------------------------------------*/
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portBASE_TYPE xPortStartScheduler( void )
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{
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/* xPortStartScheduler() does not start the scheduler directly because
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the header file containing the xPortStartScheduler() prototype is part
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of the common kernel code, and therefore cannot use the CODE_SEG pragma.
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Instead it simply calls the locally defined xNearStartScheduler() -
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which does use the CODE_SEG pragma. */
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short register d;
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__asm ("jmp xStartSchedulerNear ; will never return": "=d"(d));
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return d;
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}
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/*-----------------------------------------------------------*/
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portBASE_TYPE xStartSchedulerNear( void )
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{
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/* Configure the timer that will generate the RTOS tick. Interrupts are
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disabled when this function is called. */
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prvSetupTimerInterrupt();
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/* Restore the context of the first task. */
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portRESTORE_CONTEXT();
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portISR_TAIL();
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/* Should not get here! */
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return pdFALSE;
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}
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/*-----------------------------------------------------------*/
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/*
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* Context switch functions. These are interrupt service routines.
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*/
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/*
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* Manual context switch forced by calling portYIELD(). This is the SWI
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* handler.
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*/
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void vPortYield( void )
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{
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portISR_HEAD();
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/* NOTE: This is the trap routine (swi) although not defined as a trap.
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It will fill the stack the same way as an ISR in order to mix preemtion
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and cooperative yield. */
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portSAVE_CONTEXT();
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vTaskSwitchContext();
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portRESTORE_CONTEXT();
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portISR_TAIL();
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}
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/*-----------------------------------------------------------*/
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/*
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* RTOS tick interrupt service routine. If the cooperative scheduler is
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* being used then this simply increments the tick count. If the
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* preemptive scheduler is being used a context switch can occur.
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*/
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void vPortTickInterrupt( void )
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{
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portISR_HEAD();
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/* Clear tick timer flag */
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CRGFLG = 0x80;
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#if configUSE_PREEMPTION == 1
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{
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/* A context switch might happen so save the context. */
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portSAVE_CONTEXT();
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/* Increment the tick ... */
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vTaskIncrementTick();
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/* ... then see if the new tick value has necessitated a
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context switch. */
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vTaskSwitchContext();
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/* Restore the context of a task - which may be a different task
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to that interrupted. */
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portRESTORE_CONTEXT();
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}
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#else
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{
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vTaskIncrementTick();
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}
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#endif
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portISR_TAIL();
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}
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239
Source/portable/GCC/HCS12/portmacro.h
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239
Source/portable/GCC/HCS12/portmacro.h
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/*
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FreeRTOS V3.2.3 - Copyright (C) 2003 - 2005 Richard Barry.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
|
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(at your option) any later version.
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FreeRTOS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with FreeRTOS; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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A special exception to the GPL can be applied should you wish to distribute
|
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a combined work that includes FreeRTOS, without being obliged to provide
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the source code for any proprietary components. See the licensing section
|
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of http://www.FreeRTOS.org for full details of how and when the exception
|
||||
can be applied.
|
||||
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***************************************************************************
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See http://www.FreeRTOS.org for documentation, latest information, license
|
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and contact details. Please ensure to read the configuration and relevant
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port sections of the online documentation.
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***************************************************************************
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*/
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#ifndef PORTMACRO_H
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#define PORTMACRO_H
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/*-----------------------------------------------------------
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* Port specific definitions.
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*
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* The settings in this file configure FreeRTOS correctly for the
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* given hardware and compiler.
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*
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* These settings should not be altered.
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*-----------------------------------------------------------
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*/
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/* Type definitions. */
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#define portCHAR char
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#define portFLOAT float
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT short
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#define portSTACK_TYPE unsigned portCHAR
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#define portBASE_TYPE char
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#if( configUSE_16_BIT_TICKS == 1 )
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typedef unsigned portSHORT portTickType;
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#define portMAX_DELAY ( portTickType ) 0xffff
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#else
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typedef unsigned portLONG portTickType;
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#define portMAX_DELAY ( portTickType ) 0xffffffff
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#endif
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/*-----------------------------------------------------------*/
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/* Hardware specifics. */
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#define portBYTE_ALIGNMENT 1
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
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#define portYIELD() __asm( "swi" );
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/*-----------------------------------------------------------*/
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/* Critical section handling. */
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#define portENABLE_INTERRUPTS() __asm( "cli" )
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#define portDISABLE_INTERRUPTS() __asm( "sei" )
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/*
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* Disable interrupts before incrementing the count of critical section nesting.
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* The nesting count is maintained so we know when interrupts should be
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* re-enabled. Once interrupts are disabled the nesting count can be accessed
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* directly. Each task maintains its own nesting count.
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*/
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#define portENTER_CRITICAL() \
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{ \
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extern volatile unsigned portBASE_TYPE uxCriticalNesting; \
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\
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portDISABLE_INTERRUPTS(); \
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uxCriticalNesting++; \
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}
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/*
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* Interrupts are disabled so we can access the nesting count directly. If the
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* nesting is found to be 0 (no nesting) then we are leaving the critical
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* section and interrupts can be re-enabled.
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*/
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#define portEXIT_CRITICAL() \
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{ \
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extern volatile unsigned portBASE_TYPE uxCriticalNesting; \
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\
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uxCriticalNesting--; \
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if( uxCriticalNesting == 0 ) \
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{ \
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portENABLE_INTERRUPTS(); \
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} \
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}
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/*-----------------------------------------------------------*/
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/* Task utilities. */
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/*
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* These macros are very simple as the processor automatically saves and
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* restores its registers as interrupts are entered and exited. In
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* addition to the (automatically stacked) registers we also stack the
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* critical nesting count. Each task maintains its own critical nesting
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* count as it is legitimate for a task to yield from within a critical
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* section. If the banked memory model is being used then the PPAGE
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* register is also stored as part of the tasks context.
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*/
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#ifdef BANKED_MODEL
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/*
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* Load the stack pointer for the task, then pull the critical nesting
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* count and PPAGE register from the stack. The remains of the
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* context are restored by the RTI instruction.
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*/
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#define portRESTORE_CONTEXT() \
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{ \
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__asm( " \n\
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.globl pxCurrentTCB ; void * \n\
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.globl uxCriticalNesting ; char \n\
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\n\
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ldx pxCurrentTCB \n\
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lds 0,x ; Stack \n\
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\n\
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movb 1,sp+,uxCriticalNesting \n\
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movb 1,sp+,0x30 ; PPAGE \n\
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" ); \
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}
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/*
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* By the time this macro is called the processor has already stacked the
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* registers. Simply stack the nesting count and PPAGE value, then save
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* the task stack pointer.
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*/
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#define portSAVE_CONTEXT() \
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{ \
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__asm( " \n\
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.globl pxCurrentTCB ; void * \n\
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.globl uxCriticalNesting ; char \n\
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\n\
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movb 0x30, 1,-sp ; PPAGE \n\
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movb uxCriticalNesting, 1,-sp \n\
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\n\
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ldx pxCurrentTCB \n\
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sts 0,x ; Stack \n\
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" ); \
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}
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#else
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/*
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* These macros are as per the BANKED versions above, but without saving
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* and restoring the PPAGE register.
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*/
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#define portRESTORE_CONTEXT() \
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{ \
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__asm( " \n\
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.globl pxCurrentTCB ; void * \n\
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.globl uxCriticalNesting ; char \n\
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\n\
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ldx pxCurrentTCB \n\
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lds 0,x ; Stack \n\
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\n\
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movb 1,sp+,uxCriticalNesting \n\
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" ); \
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}
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#define portSAVE_CONTEXT() \
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{ \
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__asm( " \n\
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.globl pxCurrentTCB ; void * \n\
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.globl uxCriticalNesting ; char \n\
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\n\
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movb uxCriticalNesting, 1,-sp \n\
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\n\
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ldx pxCurrentTCB \n\
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sts 0,x ; Stack \n\
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" ); \
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}
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#endif
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/*
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* Utility macros to save/restore correct software registers for GCC. This is
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* useful when GCC does not generate appropriate ISR head/tail code.
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*/
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#define portISR_HEAD() \
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{ \
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__asm(" \n\
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movw _.frame, 2,-sp \n\
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movw _.tmp, 2,-sp \n\
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movw _.z, 2,-sp \n\
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movw _.xy, 2,-sp \n\
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;movw _.d2, 2,-sp \n\
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;movw _.d1, 2,-sp \n\
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"); \
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}
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#define portISR_TAIL() \
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{ \
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__asm(" \n\
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movw 2,sp+, _.xy \n\
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movw 2,sp+, _.z \n\
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movw 2,sp+, _.tmp \n\
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movw 2,sp+, _.frame \n\
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;movw 2,sp+, _.d1 \n\
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;movw 2,sp+, _.d2 \n\
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rti \n\
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"); \
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}
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/*
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* Utility macro to call macros above in correct order in order to perform a
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* task switch from within a standard ISR. This macro can only be used if
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* the ISR does not use any local (stack) variables. If the ISR uses stack
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* variables portYIELD() should be used in it's place.
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*/
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#define portTASK_SWITCH_FROM_ISR() \
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portSAVE_CONTEXT(); \
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vTaskSwitchContext(); \
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portRESTORE_CONTEXT();
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/* Task function macros as described on the FreeRTOS.org WEB site. */
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
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#endif /* PORTMACRO_H */
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