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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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Improve how the scheduler is started in the GCC Cortex-M0 port.
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@ -110,7 +110,7 @@ static void prvSetupTimerInterrupt( void );
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*/
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*/
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void xPortPendSVHandler( void ) __attribute__ (( naked ));
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void xPortPendSVHandler( void ) __attribute__ (( naked ));
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void xPortSysTickHandler( void );
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void xPortSysTickHandler( void );
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void vPortSVCHandler( void ) __attribute__ (( naked ));
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void vPortSVCHandler( void );
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/*
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/*
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* Start first task is a separate function so it can be tested in isolation.
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* Start first task is a separate function so it can be tested in isolation.
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@ -161,29 +161,8 @@ static void prvTaskExitError( void )
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void vPortSVCHandler( void )
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void vPortSVCHandler( void )
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{
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{
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__asm volatile (
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/* This function is no longer used, but returned for backward
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" ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */
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compatibility. */
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" ldr r1, [r3] \n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
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" ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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" add r0, r0, #16 \n" /* Move to the high registers. */
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" ldmia r0!, {r4-r7} \n" /* Pop the high registers. */
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" mov r8, r4 \n"
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" mov r9, r5 \n"
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" mov r10, r6 \n"
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" mov r11, r7 \n"
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" \n"
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" msr psp, r0 \n" /* Remember the new top of stack for the task. */
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" \n"
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" sub r0, r0, #32 \n" /* Go back for the low registers that are not automatically restored. */
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" ldmia r0!, {r4-r7} \n" /* Pop low registers. */
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" mov r1, r14 \n" /* OR R14 with 0x0d. */
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" movs r0, #0x0d \n"
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" orr r1, r0 \n"
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" bx r1 \n"
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" \n"
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" .align 2 \n"
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"pxCurrentTCBConst2: .word pxCurrentTCB \n"
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);
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}
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}
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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@ -193,9 +172,20 @@ void vPortStartFirstTask( void )
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table offset register that can be used to locate the initial stack value.
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table offset register that can be used to locate the initial stack value.
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Not all M0 parts have the application vector table at address 0. */
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Not all M0 parts have the application vector table at address 0. */
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__asm volatile(
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__asm volatile(
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" cpsie i \n" /* Globally enable interrupts. */
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" ldr r2, pxCurrentTCBConst2 \n" /* Obtain location of pxCurrentTCB. */
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" svc 0 \n" /* System call to start first task. */
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" ldr r3, [r2] \n"
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" nop \n"
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" ldr r0, [r3] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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" add r0, #32 \n" /* Discard everything up to r0. */
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" msr psp, r0 \n" /* This is now the new top of stack to use in the task. */
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" movs r0, #2 \n" /* Switch to the psp stack. */
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" msr CONTROL, r0 \n"
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" pop {r0-r5} \n" /* Pop the registers that are saved automatically. */
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" mov lr, r5 \n" /* lr is now in r5. */
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" cpsie i \n" /* The first task has its context and interrupts can be enabled. */
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" pop {pc} \n" /* Finally, pop the PC to jump to the user defined task code. */
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" \n"
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" .align 2 \n"
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"pxCurrentTCBConst2: .word pxCurrentTCB "
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);
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);
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}
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}
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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