Merge pull request #1 from FreeRTOS/master

sync from master

croutine.c

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 #include "FreeRTOS.h"

event_groups.c

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 /* Standard includes. */

include/FreeRTOS.h

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef INC_FREERTOS_H
@@ -48,9 +47,11 @@
  */
 #include <stdint.h>     /* READ COMMENT ABOVE. */
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
     extern "C" {
 #endif
+/* *INDENT-ON* */
 
 /* Application specific configuration options. */
 #include "FreeRTOSConfig.h"
@@ -1315,8 +1316,10 @@
 /* Message buffers are built on stream buffers. */
 typedef StaticStreamBuffer_t StaticMessageBuffer_t;
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
     }
 #endif
+/* *INDENT-ON* */
 
 #endif /* INC_FREERTOS_H */

include/StackMacros.h

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef STACK_MACROS_H

include/atomic.h

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 /**
@@ -44,9 +43,11 @@
 /* Standard includes. */
 #include <stdint.h>
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
     extern "C" {
 #endif
+/* *INDENT-ON* */
 
 /*
  * Port specific definitions -- entering/exiting critical section.
@@ -407,8 +408,10 @@
     return ulCurrent;
 }
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
     }
 #endif
+/* *INDENT-ON* */
 
 #endif /* ATOMIC_H */

include/croutine.h

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef CO_ROUTINE_H
@@ -34,9 +33,11 @@
 
 #include "list.h"
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
     extern "C" {
 #endif
+/* *INDENT-ON* */
 
 /* Used to hide the implementation of the co-routine control block.  The
  * control block structure however has to be included in the header due to
@@ -587,7 +588,8 @@
  * \defgroup crQUEUE_SEND_FROM_ISR crQUEUE_SEND_FROM_ISR
  * \ingroup Tasks
  */
-    #define crQUEUE_SEND_FROM_ISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken )    xQueueCRSendFromISR( ( pxQueue ), ( pvItemToQueue ), ( xCoRoutinePreviouslyWoken ) )
+#define crQUEUE_SEND_FROM_ISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) \
+    xQueueCRSendFromISR( ( pxQueue ), ( pvItemToQueue ), ( xCoRoutinePreviouslyWoken ) )
 
 
 /**
@@ -700,7 +702,8 @@
  * \defgroup crQUEUE_RECEIVE_FROM_ISR crQUEUE_RECEIVE_FROM_ISR
  * \ingroup Tasks
  */
-    #define crQUEUE_RECEIVE_FROM_ISR( pxQueue, pvBuffer, pxCoRoutineWoken )    xQueueCRReceiveFromISR( ( pxQueue ), ( pvBuffer ), ( pxCoRoutineWoken ) )
+#define crQUEUE_RECEIVE_FROM_ISR( pxQueue, pvBuffer, pxCoRoutineWoken ) \
+    xQueueCRReceiveFromISR( ( pxQueue ), ( pvBuffer ), ( pxCoRoutineWoken ) )
 
 /*
  * This function is intended for internal use by the co-routine macros only.
@@ -723,8 +726,10 @@
  */
 BaseType_t xCoRoutineRemoveFromEventList( const List_t * pxEventList );
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
     }
 #endif
+/* *INDENT-ON* */
 
 #endif /* CO_ROUTINE_H */

include/deprecated_definitions.h

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef DEPRECATED_DEFINITIONS_H

include/event_groups.h

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef EVENT_GROUPS_H
@@ -35,9 +34,11 @@
 /* FreeRTOS includes. */
 #include "timers.h"
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
     extern "C" {
 #endif
+/* *INDENT-ON* */
 
 /**
  * An event group is a collection of bits to which an application can assign a
@@ -413,7 +414,8 @@
     BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup,
                                             const EventBits_t uxBitsToClear ) PRIVILEGED_FUNCTION;
 #else
-        #define xEventGroupClearBitsFromISR( xEventGroup, uxBitsToClear )    xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToClear, NULL )
+    #define xEventGroupClearBitsFromISR( xEventGroup, uxBitsToClear ) \
+    xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToClear, NULL )
 #endif
 
 /**
@@ -568,7 +570,8 @@
                                           const EventBits_t uxBitsToSet,
                                           BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
 #else
-        #define xEventGroupSetBitsFromISR( xEventGroup, uxBitsToSet, pxHigherPriorityTaskWoken )    xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken )
+    #define xEventGroupSetBitsFromISR( xEventGroup, uxBitsToSet, pxHigherPriorityTaskWoken ) \
+    xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken )
 #endif
 
 /**
@@ -763,8 +766,10 @@
                                UBaseType_t uxEventGroupNumber ) PRIVILEGED_FUNCTION;
 #endif
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
     }
 #endif
+/* *INDENT-ON* */
 
 #endif /* EVENT_GROUPS_H */

include/list.h

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 /*
@@ -53,13 +52,14 @@
  * \ingroup FreeRTOSIntro
  */
 
-#ifndef INC_FREERTOS_H
-    #error FreeRTOS.h must be included before list.h
-#endif
 
 #ifndef LIST_H
 #define LIST_H
 
+#ifndef INC_FREERTOS_H
+    #error "FreeRTOS.h must be included before list.h"
+#endif
+
 /*
  * The list structure members are modified from within interrupts, and therefore
  * by rights should be declared volatile.  However, they are only modified in a
@@ -92,9 +92,11 @@
     #define configLIST_VOLATILE
 #endif /* configSUPPORT_CROSS_MODULE_OPTIMISATION */
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
     extern "C" {
 #endif
+/* *INDENT-ON* */
 
 /* Macros that can be used to place known values within the list structures,
  * then check that the known values do not get corrupted during the execution of
@@ -406,8 +408,10 @@
  */
 UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove ) PRIVILEGED_FUNCTION;
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
     }
 #endif
+/* *INDENT-ON* */
 
 #endif /* ifndef LIST_H */

include/message_buffer.h

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 
@@ -69,9 +68,11 @@
 /* Message buffers are built onto of stream buffers. */
 #include "stream_buffer.h"
 
+/* *INDENT-OFF* */
 #if defined( __cplusplus )
     extern "C" {
 #endif
+/* *INDENT-ON* */
 
 /**
  * Type by which message buffers are referenced.  For example, a call to
@@ -139,7 +140,8 @@
  * \defgroup xMessageBufferCreate xMessageBufferCreate
  * \ingroup MessageBufferManagement
  */
-    #define xMessageBufferCreate( xBufferSizeBytes )                                                              ( MessageBufferHandle_t ) xStreamBufferGenericCreate( xBufferSizeBytes, ( size_t ) 0, pdTRUE )
+#define xMessageBufferCreate( xBufferSizeBytes ) \
+    ( MessageBufferHandle_t ) xStreamBufferGenericCreate( xBufferSizeBytes, ( size_t ) 0, pdTRUE )
 
 /**
  * message_buffer.h
@@ -205,7 +207,8 @@
  * \defgroup xMessageBufferCreateStatic xMessageBufferCreateStatic
  * \ingroup MessageBufferManagement
  */
-    #define xMessageBufferCreateStatic( xBufferSizeBytes, pucMessageBufferStorageArea, pxStaticMessageBuffer )    ( MessageBufferHandle_t ) xStreamBufferGenericCreateStatic( xBufferSizeBytes, 0, pdTRUE, pucMessageBufferStorageArea, pxStaticMessageBuffer )
+#define xMessageBufferCreateStatic( xBufferSizeBytes, pucMessageBufferStorageArea, pxStaticMessageBuffer ) \
+    ( MessageBufferHandle_t ) xStreamBufferGenericCreateStatic( xBufferSizeBytes, 0, pdTRUE, pucMessageBufferStorageArea, pxStaticMessageBuffer )
 
 /**
  * message_buffer.h
@@ -304,7 +307,8 @@
  * \defgroup xMessageBufferSend xMessageBufferSend
  * \ingroup MessageBufferManagement
  */
-    #define xMessageBufferSend( xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait )                        xStreamBufferSend( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait )
+#define xMessageBufferSend( xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait ) \
+    xStreamBufferSend( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait )
 
 /**
  * message_buffer.h
@@ -408,7 +412,8 @@
  * \defgroup xMessageBufferSendFromISR xMessageBufferSendFromISR
  * \ingroup MessageBufferManagement
  */
-    #define xMessageBufferSendFromISR( xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken )    xStreamBufferSendFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken )
+#define xMessageBufferSendFromISR( xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken ) \
+    xStreamBufferSendFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken )
 
 /**
  * message_buffer.h
@@ -496,7 +501,8 @@
  * \defgroup xMessageBufferReceive xMessageBufferReceive
  * \ingroup MessageBufferManagement
  */
-    #define xMessageBufferReceive( xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait )                   xStreamBufferReceive( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait )
+#define xMessageBufferReceive( xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait ) \
+    xStreamBufferReceive( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait )
 
 
 /**
@@ -597,7 +603,8 @@
  * \defgroup xMessageBufferReceiveFromISR xMessageBufferReceiveFromISR
  * \ingroup MessageBufferManagement
  */
-    #define xMessageBufferReceiveFromISR( xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken )    xStreamBufferReceiveFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken )
+#define xMessageBufferReceiveFromISR( xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken ) \
+    xStreamBufferReceiveFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken )
 
 /**
  * message_buffer.h
@@ -617,7 +624,8 @@
  * @param xMessageBuffer The handle of the message buffer to be deleted.
  *
  */
-    #define vMessageBufferDelete( xMessageBuffer )                                                                     vStreamBufferDelete( ( StreamBufferHandle_t ) xMessageBuffer )
+#define vMessageBufferDelete( xMessageBuffer ) \
+    vStreamBufferDelete( ( StreamBufferHandle_t ) xMessageBuffer )
 
 /**
  * message_buffer.h
@@ -634,7 +642,8 @@
  * @return If the message buffer referenced by xMessageBuffer is full then
  * pdTRUE is returned.  Otherwise pdFALSE is returned.
  */
-    #define xMessageBufferIsFull( xMessageBuffer )                                                                     xStreamBufferIsFull( ( StreamBufferHandle_t ) xMessageBuffer )
+#define xMessageBufferIsFull( xMessageBuffer ) \
+    xStreamBufferIsFull( ( StreamBufferHandle_t ) xMessageBuffer )
 
 /**
  * message_buffer.h
@@ -650,7 +659,8 @@
  * pdTRUE is returned.  Otherwise pdFALSE is returned.
  *
  */
-    #define xMessageBufferIsEmpty( xMessageBuffer )                                                                    xStreamBufferIsEmpty( ( StreamBufferHandle_t ) xMessageBuffer )
+#define xMessageBufferIsEmpty( xMessageBuffer ) \
+    xStreamBufferIsEmpty( ( StreamBufferHandle_t ) xMessageBuffer )
 
 /**
  * message_buffer.h
@@ -673,7 +683,8 @@
  * \defgroup xMessageBufferReset xMessageBufferReset
  * \ingroup MessageBufferManagement
  */
-    #define xMessageBufferReset( xMessageBuffer )                                                                      xStreamBufferReset( ( StreamBufferHandle_t ) xMessageBuffer )
+#define xMessageBufferReset( xMessageBuffer ) \
+    xStreamBufferReset( ( StreamBufferHandle_t ) xMessageBuffer )
 
 
 /**
@@ -695,8 +706,10 @@
  * \defgroup xMessageBufferSpaceAvailable xMessageBufferSpaceAvailable
  * \ingroup MessageBufferManagement
  */
-    #define xMessageBufferSpaceAvailable( xMessageBuffer )                                        xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer )
+#define xMessageBufferSpaceAvailable( xMessageBuffer ) \
-    #define xMessageBufferSpacesAvailable( xMessageBuffer )                                       xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer ) /* Corrects typo in original macro name. */
+    xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer )
+#define xMessageBufferSpacesAvailable( xMessageBuffer ) \
+    xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer ) /* Corrects typo in original macro name. */
 
 /**
  * message_buffer.h
@@ -715,7 +728,8 @@
  * \defgroup xMessageBufferNextLengthBytes xMessageBufferNextLengthBytes
  * \ingroup MessageBufferManagement
  */
-    #define xMessageBufferNextLengthBytes( xMessageBuffer )                                       xStreamBufferNextMessageLengthBytes( ( StreamBufferHandle_t ) xMessageBuffer ) PRIVILEGED_FUNCTION;
+#define xMessageBufferNextLengthBytes( xMessageBuffer ) \
+    xStreamBufferNextMessageLengthBytes( ( StreamBufferHandle_t ) xMessageBuffer ) PRIVILEGED_FUNCTION;
 
 /**
  * message_buffer.h
@@ -754,7 +768,8 @@
  * \defgroup xMessageBufferSendCompletedFromISR xMessageBufferSendCompletedFromISR
  * \ingroup StreamBufferManagement
  */
-    #define xMessageBufferSendCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken )       xStreamBufferSendCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )
+#define xMessageBufferSendCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) \
+    xStreamBufferSendCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )
 
 /**
  * message_buffer.h
@@ -794,10 +809,13 @@
  * \defgroup xMessageBufferReceiveCompletedFromISR xMessageBufferReceiveCompletedFromISR
  * \ingroup StreamBufferManagement
  */
-    #define xMessageBufferReceiveCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken )    xStreamBufferReceiveCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )
+#define xMessageBufferReceiveCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) \
+    xStreamBufferReceiveCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )
 
+/* *INDENT-OFF* */
 #if defined( __cplusplus )
     } /* extern "C" */
 #endif
+/* *INDENT-ON* */
 
 #endif /* !defined( FREERTOS_MESSAGE_BUFFER_H ) */

include/mpu_prototypes.h

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 /*

include/mpu_wrappers.h

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef MPU_WRAPPERS_H

include/portable.h

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------
@@ -92,9 +91,11 @@
     #define portARCH_NAME    NULL
 #endif
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
     extern "C" {
 #endif
+/* *INDENT-ON* */
 
 #include "mpu_wrappers.h"
 
@@ -206,8 +207,10 @@
                                     uint32_t ulStackDepth ) PRIVILEGED_FUNCTION;
 #endif
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
     }
 #endif
+/* *INDENT-ON* */
 
 #endif /* PORTABLE_H */

include/projdefs.h

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef PROJDEFS_H

include/queue.h

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 
@@ -33,9 +32,11 @@
     #error "include FreeRTOS.h" must appear in source files before "include queue.h"
 #endif
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
     extern "C" {
 #endif
+/* *INDENT-ON* */
 
 #include "task.h"
 
@@ -310,7 +311,8 @@
  * \defgroup xQueueSend xQueueSend
  * \ingroup QueueManagement
  */
-    #define xQueueSendToFront( xQueue, pvItemToQueue, xTicksToWait )    xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_FRONT )
+#define xQueueSendToFront( xQueue, pvItemToQueue, xTicksToWait ) \
+    xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_FRONT )
 
 /**
  * queue. h
@@ -392,7 +394,8 @@
  * \defgroup xQueueSend xQueueSend
  * \ingroup QueueManagement
  */
-    #define xQueueSendToBack( xQueue, pvItemToQueue, xTicksToWait )     xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK )
+#define xQueueSendToBack( xQueue, pvItemToQueue, xTicksToWait ) \
+    xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK )
 
 /**
  * queue. h
@@ -476,7 +479,8 @@
  * \defgroup xQueueSend xQueueSend
  * \ingroup QueueManagement
  */
-    #define xQueueSend( xQueue, pvItemToQueue, xTicksToWait )           xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK )
+#define xQueueSend( xQueue, pvItemToQueue, xTicksToWait ) \
+    xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK )
 
 /**
  * queue. h
@@ -559,7 +563,8 @@
  * \defgroup xQueueOverwrite xQueueOverwrite
  * \ingroup QueueManagement
  */
-    #define xQueueOverwrite( xQueue, pvItemToQueue )                    xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), 0, queueOVERWRITE )
+#define xQueueOverwrite( xQueue, pvItemToQueue ) \
+    xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), 0, queueOVERWRITE )
 
 
 /**
@@ -989,7 +994,8 @@
  * \defgroup xQueueSendFromISR xQueueSendFromISR
  * \ingroup QueueManagement
  */
-    #define xQueueSendToFrontFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken )    xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_FRONT )
+#define xQueueSendToFrontFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) \
+    xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_FRONT )
 
 
 /**
@@ -1060,7 +1066,8 @@
  * \defgroup xQueueSendFromISR xQueueSendFromISR
  * \ingroup QueueManagement
  */
-    #define xQueueSendToBackFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken )    xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK )
+#define xQueueSendToBackFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) \
+    xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK )
 
 /**
  * queue. h
@@ -1147,7 +1154,8 @@
  * \defgroup xQueueOverwriteFromISR xQueueOverwriteFromISR
  * \ingroup QueueManagement
  */
-    #define xQueueOverwriteFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken )     xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueOVERWRITE )
+#define xQueueOverwriteFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) \
+    xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueOVERWRITE )
 
 /**
  * queue. h
@@ -1221,7 +1229,8 @@
  * \defgroup xQueueSendFromISR xQueueSendFromISR
  * \ingroup QueueManagement
  */
-    #define xQueueSendFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken )          xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK )
+#define xQueueSendFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) \
+    xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK )
 
 /**
  * queue. h
@@ -1689,8 +1698,10 @@
 uint8_t ucQueueGetQueueType( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
 
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
     }
 #endif
+/* *INDENT-ON* */
 
 #endif /* QUEUE_H */

include/semphr.h

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef SEMAPHORE_H

include/stack_macros.h

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef STACK_MACROS_H

include/stream_buffer.h

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 /*
@@ -55,9 +54,11 @@
     #error "include FreeRTOS.h must appear in source files before include stream_buffer.h"
 #endif
 
+/* *INDENT-OFF* */
 #if defined( __cplusplus )
     extern "C" {
 #endif
+/* *INDENT-ON* */
 
 /**
  * Type by which stream buffers are referenced.  For example, a call to
@@ -215,7 +216,8 @@
  * \defgroup xStreamBufferCreateStatic xStreamBufferCreateStatic
  * \ingroup StreamBufferManagement
  */
-    #define xStreamBufferCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pucStreamBufferStorageArea, pxStaticStreamBuffer )    xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE, pucStreamBufferStorageArea, pxStaticStreamBuffer )
+#define xStreamBufferCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pucStreamBufferStorageArea, pxStaticStreamBuffer ) \
+    xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE, pucStreamBufferStorageArea, pxStaticStreamBuffer )
 
 /**
  * stream_buffer.h
@@ -856,8 +858,10 @@
     uint8_t ucStreamBufferGetStreamBufferType( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
 #endif
 
+/* *INDENT-OFF* */
 #if defined( __cplusplus )
     }
 #endif
+/* *INDENT-ON* */
 
 #endif /* !defined( STREAM_BUFFER_H ) */

include/task.h

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 
@@ -35,9 +34,11 @@
 
 #include "list.h"
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
     extern "C" {
 #endif
+/* *INDENT-ON* */
 
 /*-----------------------------------------------------------
 * MACROS AND DEFINITIONS
@@ -1907,8 +1908,10 @@
                                uint32_t ulValue,
                                eNotifyAction eAction,
                                uint32_t * pulPreviousNotificationValue ) PRIVILEGED_FUNCTION;
-    #define xTaskNotify( xTaskToNotify, ulValue, eAction )                                                            xTaskGenericNotify( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulValue ), ( eAction ), NULL )
+#define xTaskNotify( xTaskToNotify, ulValue, eAction ) \
-    #define xTaskNotifyIndexed( xTaskToNotify, uxIndexToNotify, ulValue, eAction )                                    xTaskGenericNotify( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), NULL )
+    xTaskGenericNotify( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulValue ), ( eAction ), NULL )
+#define xTaskNotifyIndexed( xTaskToNotify, uxIndexToNotify, ulValue, eAction ) \
+    xTaskGenericNotify( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), NULL )
 
 /**
  * task. h
@@ -1932,8 +1935,10 @@
  * \defgroup xTaskNotifyAndQueryIndexed xTaskNotifyAndQueryIndexed
  * \ingroup TaskNotifications
  */
-    #define xTaskNotifyAndQuery( xTaskToNotify, ulValue, eAction, pulPreviousNotifyValue )                            xTaskGenericNotify( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulValue ), ( eAction ), ( pulPreviousNotifyValue ) )
+#define xTaskNotifyAndQuery( xTaskToNotify, ulValue, eAction, pulPreviousNotifyValue ) \
-    #define xTaskNotifyAndQueryIndexed( xTaskToNotify, uxIndexToNotify, ulValue, eAction, pulPreviousNotifyValue )    xTaskGenericNotify( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotifyValue ) )
+    xTaskGenericNotify( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulValue ), ( eAction ), ( pulPreviousNotifyValue ) )
+#define xTaskNotifyAndQueryIndexed( xTaskToNotify, uxIndexToNotify, ulValue, eAction, pulPreviousNotifyValue ) \
+    xTaskGenericNotify( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotifyValue ) )
 
 /**
  * task. h
@@ -2052,8 +2057,10 @@
                                       eNotifyAction eAction,
                                       uint32_t * pulPreviousNotificationValue,
                                       BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
-    #define xTaskNotifyFromISR( xTaskToNotify, ulValue, eAction, pxHigherPriorityTaskWoken )                                                                  xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulValue ), ( eAction ), NULL, ( pxHigherPriorityTaskWoken ) )
+#define xTaskNotifyFromISR( xTaskToNotify, ulValue, eAction, pxHigherPriorityTaskWoken ) \
-    #define xTaskNotifyIndexedFromISR( xTaskToNotify, uxIndexToNotify, ulValue, eAction, pxHigherPriorityTaskWoken )                                          xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), NULL, ( pxHigherPriorityTaskWoken ) )
+    xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulValue ), ( eAction ), NULL, ( pxHigherPriorityTaskWoken ) )
+#define xTaskNotifyIndexedFromISR( xTaskToNotify, uxIndexToNotify, ulValue, eAction, pxHigherPriorityTaskWoken ) \
+    xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), NULL, ( pxHigherPriorityTaskWoken ) )
 
 /**
  * task. h
@@ -2077,8 +2084,10 @@
  * \defgroup xTaskNotifyAndQueryIndexedFromISR xTaskNotifyAndQueryIndexedFromISR
  * \ingroup TaskNotifications
  */
-    #define xTaskNotifyAndQueryIndexedFromISR( xTaskToNotify, uxIndexToNotify, ulValue, eAction, pulPreviousNotificationValue, pxHigherPriorityTaskWoken )    xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotificationValue ), ( pxHigherPriorityTaskWoken ) )
+#define xTaskNotifyAndQueryIndexedFromISR( xTaskToNotify, uxIndexToNotify, ulValue, eAction, pulPreviousNotificationValue, pxHigherPriorityTaskWoken ) \
-    #define xTaskNotifyAndQueryFromISR( xTaskToNotify, ulValue, eAction, pulPreviousNotificationValue, pxHigherPriorityTaskWoken )                            xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulValue ), ( eAction ), ( pulPreviousNotificationValue ), ( pxHigherPriorityTaskWoken ) )
+    xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotificationValue ), ( pxHigherPriorityTaskWoken ) )
+#define xTaskNotifyAndQueryFromISR( xTaskToNotify, ulValue, eAction, pulPreviousNotificationValue, pxHigherPriorityTaskWoken ) \
+    xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulValue ), ( eAction ), ( pulPreviousNotificationValue ), ( pxHigherPriorityTaskWoken ) )
 
 /**
  * task. h
@@ -2186,8 +2195,10 @@
                                    uint32_t ulBitsToClearOnExit,
                                    uint32_t * pulNotificationValue,
                                    TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
-    #define xTaskNotifyWait( ulBitsToClearOnEntry, ulBitsToClearOnExit, pulNotificationValue, xTicksToWait )                            xTaskGenericNotifyWait( tskDEFAULT_INDEX_TO_NOTIFY, ( ulBitsToClearOnEntry ), ( ulBitsToClearOnExit ), ( pulNotificationValue ), ( xTicksToWait ) )
+#define xTaskNotifyWait( ulBitsToClearOnEntry, ulBitsToClearOnExit, pulNotificationValue, xTicksToWait ) \
-    #define xTaskNotifyWaitIndexed( uxIndexToWaitOn, ulBitsToClearOnEntry, ulBitsToClearOnExit, pulNotificationValue, xTicksToWait )    xTaskGenericNotifyWait( ( uxIndexToWaitOn ), ( ulBitsToClearOnEntry ), ( ulBitsToClearOnExit ), ( pulNotificationValue ), ( xTicksToWait ) )
+    xTaskGenericNotifyWait( tskDEFAULT_INDEX_TO_NOTIFY, ( ulBitsToClearOnEntry ), ( ulBitsToClearOnExit ), ( pulNotificationValue ), ( xTicksToWait ) )
+#define xTaskNotifyWaitIndexed( uxIndexToWaitOn, ulBitsToClearOnEntry, ulBitsToClearOnExit, pulNotificationValue, xTicksToWait ) \
+    xTaskGenericNotifyWait( ( uxIndexToWaitOn ), ( ulBitsToClearOnEntry ), ( ulBitsToClearOnExit ), ( pulNotificationValue ), ( xTicksToWait ) )
 
 /**
  * task. h
@@ -2259,8 +2270,10 @@
  * \defgroup xTaskNotifyGiveIndexed xTaskNotifyGiveIndexed
  * \ingroup TaskNotifications
  */
-    #define xTaskNotifyGive( xTaskToNotify )                                                                                            xTaskGenericNotify( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( 0 ), eIncrement, NULL )
+#define xTaskNotifyGive( xTaskToNotify ) \
-    #define xTaskNotifyGiveIndexed( xTaskToNotify, uxIndexToNotify )                                                                    xTaskGenericNotify( ( xTaskToNotify ), ( uxIndexToNotify ), ( 0 ), eIncrement, NULL )
+    xTaskGenericNotify( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( 0 ), eIncrement, NULL )
+#define xTaskNotifyGiveIndexed( xTaskToNotify, uxIndexToNotify ) \
+    xTaskGenericNotify( ( xTaskToNotify ), ( uxIndexToNotify ), ( 0 ), eIncrement, NULL )
 
 /**
  * task. h
@@ -2342,8 +2355,10 @@
 void vTaskGenericNotifyGiveFromISR( TaskHandle_t xTaskToNotify,
                                     UBaseType_t uxIndexToNotify,
                                     BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
-    #define vTaskNotifyGiveFromISR( xTaskToNotify, pxHigherPriorityTaskWoken )                            vTaskGenericNotifyGiveFromISR( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( pxHigherPriorityTaskWoken ) );
+#define vTaskNotifyGiveFromISR( xTaskToNotify, pxHigherPriorityTaskWoken ) \
-    #define vTaskNotifyGiveIndexedFromISR( xTaskToNotify, uxIndexToNotify, pxHigherPriorityTaskWoken )    vTaskGenericNotifyGiveFromISR( ( xTaskToNotify ), ( uxIndexToNotify ), ( pxHigherPriorityTaskWoken ) );
+    vTaskGenericNotifyGiveFromISR( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( pxHigherPriorityTaskWoken ) );
+#define vTaskNotifyGiveIndexedFromISR( xTaskToNotify, uxIndexToNotify, pxHigherPriorityTaskWoken ) \
+    vTaskGenericNotifyGiveFromISR( ( xTaskToNotify ), ( uxIndexToNotify ), ( pxHigherPriorityTaskWoken ) );
 
 /**
  * task. h
@@ -2443,8 +2458,10 @@
 uint32_t ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn,
                                   BaseType_t xClearCountOnExit,
                                   TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
-    #define ulTaskNotifyTake( xClearCountOnExit, xTicksToWait )                            ulTaskGenericNotifyTake( ( tskDEFAULT_INDEX_TO_NOTIFY ), ( xClearCountOnExit ), ( xTicksToWait ) )
+#define ulTaskNotifyTake( xClearCountOnExit, xTicksToWait ) \
-    #define ulTaskNotifyTakeIndexed( uxIndexToWaitOn, xClearCountOnExit, xTicksToWait )    ulTaskGenericNotifyTake( ( uxIndexToNotify ), ( xClearCountOnExit ), ( xTicksToWait ) )
+    ulTaskGenericNotifyTake( ( tskDEFAULT_INDEX_TO_NOTIFY ), ( xClearCountOnExit ), ( xTicksToWait ) )
+#define ulTaskNotifyTakeIndexed( uxIndexToWaitOn, xClearCountOnExit, xTicksToWait ) \
+    ulTaskGenericNotifyTake( ( uxIndexToNotify ), ( xClearCountOnExit ), ( xTicksToWait ) )
 
 /**
  * task. h
@@ -2502,8 +2519,10 @@
  */
 BaseType_t xTaskGenericNotifyStateClear( TaskHandle_t xTask,
                                          UBaseType_t uxIndexToClear ) PRIVILEGED_FUNCTION;
-    #define xTaskNotifyStateClear( xTask )                           xTaskGenericNotifyStateClear( ( xTask ), ( tskDEFAULT_INDEX_TO_NOTIFY ) )
+#define xTaskNotifyStateClear( xTask ) \
-    #define xTaskNotifyStateClearIndexed( xTask, uxIndexToClear )    xTaskGenericNotifyStateClear( ( xTask ), ( uxIndexToClear ) )
+    xTaskGenericNotifyStateClear( ( xTask ), ( tskDEFAULT_INDEX_TO_NOTIFY ) )
+#define xTaskNotifyStateClearIndexed( xTask, uxIndexToClear ) \
+    xTaskGenericNotifyStateClear( ( xTask ), ( uxIndexToClear ) )
 
 /**
  * task. h
@@ -2563,8 +2582,10 @@
 uint32_t ulTaskGenericNotifyValueClear( TaskHandle_t xTask,
                                         UBaseType_t uxIndexToClear,
                                         uint32_t ulBitsToClear ) PRIVILEGED_FUNCTION;
-    #define ulTaskNotifyValueClear( xTask, ulBitsToClear )                           ulTaskGenericNotifyValueClear( ( xTask ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulBitsToClear ) )
+#define ulTaskNotifyValueClear( xTask, ulBitsToClear ) \
-    #define ulTaskNotifyValueClearIndexed( xTask, uxIndexToClear, ulBitsToClear )    ulTaskGenericNotifyValueClear( ( xTask ), ( uxIndexToClear ), ( ulBitsToClear ) )
+    ulTaskGenericNotifyValueClear( ( xTask ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulBitsToClear ) )
+#define ulTaskNotifyValueClearIndexed( xTask, uxIndexToClear, ulBitsToClear ) \
+    ulTaskGenericNotifyValueClear( ( xTask ), ( uxIndexToClear ), ( ulBitsToClear ) )
 
 /**
  * task.h
@@ -2899,7 +2920,9 @@
 void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNCTION;
 
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
     }
 #endif
+/* *INDENT-ON* */
 #endif /* INC_TASK_H */

include/timers.h

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 
@@ -38,9 +37,11 @@
 #include "task.h"
 /*lint -restore */
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
     extern "C" {
 #endif
+/* *INDENT-ON* */
 
 /*-----------------------------------------------------------
 * MACROS AND DEFINITIONS
@@ -503,7 +504,8 @@
  * See the xTimerCreate() API function example usage scenario.
  *
  */
-    #define xTimerStart( xTimer, xTicksToWait )                                           xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START, ( xTaskGetTickCount() ), NULL, ( xTicksToWait ) )
+#define xTimerStart( xTimer, xTicksToWait ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START, ( xTaskGetTickCount() ), NULL, ( xTicksToWait ) )
 
 /**
  * BaseType_t xTimerStop( TimerHandle_t xTimer, TickType_t xTicksToWait );
@@ -545,7 +547,8 @@
  * See the xTimerCreate() API function example usage scenario.
  *
  */
-    #define xTimerStop( xTimer, xTicksToWait )                                            xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP, 0U, NULL, ( xTicksToWait ) )
+#define xTimerStop( xTimer, xTicksToWait ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP, 0U, NULL, ( xTicksToWait ) )
 
 /**
  * BaseType_t xTimerChangePeriod(   TimerHandle_t xTimer,
@@ -625,7 +628,8 @@
  * }
  * @endverbatim
  */
-    #define xTimerChangePeriod( xTimer, xNewPeriod, xTicksToWait )                        xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD, ( xNewPeriod ), NULL, ( xTicksToWait ) )
+#define xTimerChangePeriod( xTimer, xNewPeriod, xTicksToWait ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD, ( xNewPeriod ), NULL, ( xTicksToWait ) )
 
 /**
  * BaseType_t xTimerDelete( TimerHandle_t xTimer, TickType_t xTicksToWait );
@@ -663,7 +667,8 @@
  *
  * See the xTimerChangePeriod() API function example usage scenario.
  */
-    #define xTimerDelete( xTimer, xTicksToWait )                                          xTimerGenericCommand( ( xTimer ), tmrCOMMAND_DELETE, 0U, NULL, ( xTicksToWait ) )
+#define xTimerDelete( xTimer, xTicksToWait ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_DELETE, 0U, NULL, ( xTicksToWait ) )
 
 /**
  * BaseType_t xTimerReset( TimerHandle_t xTimer, TickType_t xTicksToWait );
@@ -787,7 +792,8 @@
  * }
  * @endverbatim
  */
-    #define xTimerReset( xTimer, xTicksToWait )                                           xTimerGenericCommand( ( xTimer ), tmrCOMMAND_RESET, ( xTaskGetTickCount() ), NULL, ( xTicksToWait ) )
+#define xTimerReset( xTimer, xTicksToWait ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_RESET, ( xTaskGetTickCount() ), NULL, ( xTicksToWait ) )
 
 /**
  * BaseType_t xTimerStartFromISR(   TimerHandle_t xTimer,
@@ -873,7 +879,8 @@
  * }
  * @endverbatim
  */
-    #define xTimerStartFromISR( xTimer, pxHigherPriorityTaskWoken )                       xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START_FROM_ISR, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U )
+#define xTimerStartFromISR( xTimer, pxHigherPriorityTaskWoken ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START_FROM_ISR, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U )
 
 /**
  * BaseType_t xTimerStopFromISR(    TimerHandle_t xTimer,
@@ -936,7 +943,8 @@
  * }
  * @endverbatim
  */
-    #define xTimerStopFromISR( xTimer, pxHigherPriorityTaskWoken )                        xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP_FROM_ISR, 0, ( pxHigherPriorityTaskWoken ), 0U )
+#define xTimerStopFromISR( xTimer, pxHigherPriorityTaskWoken ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP_FROM_ISR, 0, ( pxHigherPriorityTaskWoken ), 0U )
 
 /**
  * BaseType_t xTimerChangePeriodFromISR( TimerHandle_t xTimer,
@@ -1009,7 +1017,8 @@
  * }
  * @endverbatim
  */
-    #define xTimerChangePeriodFromISR( xTimer, xNewPeriod, pxHigherPriorityTaskWoken )    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD_FROM_ISR, ( xNewPeriod ), ( pxHigherPriorityTaskWoken ), 0U )
+#define xTimerChangePeriodFromISR( xTimer, xNewPeriod, pxHigherPriorityTaskWoken ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD_FROM_ISR, ( xNewPeriod ), ( pxHigherPriorityTaskWoken ), 0U )
 
 /**
  * BaseType_t xTimerResetFromISR(   TimerHandle_t xTimer,
@@ -1095,7 +1104,8 @@
  * }
  * @endverbatim
  */
-    #define xTimerResetFromISR( xTimer, pxHigherPriorityTaskWoken )                       xTimerGenericCommand( ( xTimer ), tmrCOMMAND_RESET_FROM_ISR, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U )
+#define xTimerResetFromISR( xTimer, pxHigherPriorityTaskWoken ) \
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_RESET_FROM_ISR, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U )
 
 
 /**
@@ -1314,7 +1324,9 @@
     UBaseType_t uxTimerGetTimerNumber( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
 #endif
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
     }
 #endif
+/* *INDENT-ON* */
 #endif /* TIMERS_H */

list.c

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 

portable/ARMv8M/non_secure/port.c

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
@@ -876,7 +875,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
     }
 }
 /*-----------------------------------------------------------*/
-
+/* *INDENT-OFF* */
 #if ( configENABLE_MPU == 1 )
     StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
                                          StackType_t * pxEndOfStack,
@@ -889,6 +888,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
                                          TaskFunction_t pxCode,
                                          void * pvParameters ) /* PRIVILEGED_FUNCTION */
 #endif /* configENABLE_MPU */
+/* *INDENT-ON* */
 {
     /* Simulate the stack frame as it would be created by a context switch
      * interrupt. */
@@ -1051,7 +1051,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
     {
         uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
         int32_t lIndex = 0;
+
         #if defined( __ARMCC_VERSION )
+
             /* Declaration when these variable are defined in code instead of being
              * exported from linker scripts. */
             extern uint32_t * __privileged_sram_start__;
@@ -1079,8 +1081,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
              * using a separate MPU region. This is needed because privileged
              * SRAM is already protected using an MPU region and ARMv8-M does
              * not allow overlapping MPU regions. */
-            if( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ &&
+            if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
-                ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ )
+                ( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
             {
                 xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
                 xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;

portable/BCC/16BitDOS/Flsh186/port.c

@@ -26,16 +26,16 @@
  */
 
 /*
- * Changes from V1.00:
+Changes from V1.00:
- *
+
 	+ Call to taskYIELD() from within tick ISR has been replaced by the more
- +    efficient portSWITCH_CONTEXT().
+	  efficient portSWITCH_CONTEXT().
 	+ ISR function definitions renamed to include the prv prefix.
- +
+
- + Changes from V2.6.1
+Changes from V2.6.1
- +
+
 	+ Replaced the sUsingPreemption variable with the configUSE_PREEMPTION
- +    macro to be consistent with the later ports.
+	  macro to be consistent with the later ports.
 */
 
 /*-----------------------------------------------------------
@@ -68,16 +68,14 @@ static void prvSetTickFrequency( uint32_t ulTickRateHz );
 static void prvExitFunction( void );
 
 /* The ISR used depends on whether the preemptive or cooperative scheduler
- * is being used. */
+is being used. */
 #if( configUSE_PREEMPTION == 1 )
-
 	/* Tick service routine used by the scheduler when preemptive scheduling is
- * being used. */
+	being used. */
 	static void __interrupt __far prvPreemptiveTick( void );
 #else
-
 	/* Tick service routine used by the scheduler when cooperative scheduling is
- * being used. */
+	being used. */
 	static void __interrupt __far prvNonPreemptiveTick( void );
 #endif
 
@@ -90,8 +88,8 @@ static void __interrupt __far prvYieldProcessor( void );
 static BaseType_t xSchedulerRunning = pdFALSE;
 
 /* Points to the original routine installed on the vector we use for manual
- * context switches.  This is then used to restore the original routine during
+context switches.  This is then used to restore the original routine during
- * prvExitFunction(). */
+prvExitFunction(). */
 static void ( __interrupt __far *pxOldSwitchISR )();
 
 /* Used to restore the original DOS context when the scheduler is ended. */
@@ -105,11 +103,11 @@ BaseType_t xPortStartScheduler( void )
 	/* This is called with interrupts already disabled. */
 
 	/* Remember what was on the interrupts we are going to use
-     * so we can put them back later if required. */
+	so we can put them back later if required. */
 	pxOldSwitchISR = _dos_getvect( portSWITCH_INT_NUMBER );
 
 	/* Put our manual switch (yield) function on a known
-     * vector. */
+	vector. */
 	_dos_setvect( portSWITCH_INT_NUMBER, prvYieldProcessor );
 
 	#if( configUSE_PREEMPTION == 1 )
@@ -145,7 +143,7 @@ BaseType_t xPortStartScheduler( void )
 /*-----------------------------------------------------------*/
 
 /* The ISR used depends on whether the preemptive or cooperative scheduler
- * is being used. */
+is being used. */
 #if( configUSE_PREEMPTION == 1 )
 	static void __interrupt __far prvPreemptiveTick( void )
 	{
@@ -159,15 +157,15 @@ BaseType_t xPortStartScheduler( void )
 		/* Reset the PIC ready for the next time. */
 		portRESET_PIC();
 	}
-#else /* if ( configUSE_PREEMPTION == 1 ) */
+#else
 	static void __interrupt __far prvNonPreemptiveTick( void )
 	{
 		/* Same as preemptive tick, but the cooperative scheduler is being used
-         * so we don't have to switch in the context of the next task. */
+		so we don't have to switch in the context of the next task. */
 		xTaskIncrementTick();
 		portRESET_PIC();
 	}
-#endif /* if ( configUSE_PREEMPTION == 1 ) */
+#endif
 /*-----------------------------------------------------------*/
 
 static void __interrupt __far prvYieldProcessor( void )
@@ -180,8 +178,8 @@ static void __interrupt __far prvYieldProcessor( void )
 void vPortEndScheduler( void )
 {
 	/* Jump back to the processor state prior to starting the
-     * scheduler.  This means we are not going to be using a
+	scheduler.  This means we are not going to be using a
-     * task stack frame so the task can be deleted. */
+	task stack frame so the task can be deleted. */
 	longjmp( xJumpBuf, 1 );
 }
 /*-----------------------------------------------------------*/
@@ -192,19 +190,18 @@ static void prvExitFunction( void )
 uint16_t usTimer0Control;
 
 	/* Interrupts should be disabled here anyway - but no
-     * harm in making sure. */
+	harm in making sure. */
 	portDISABLE_INTERRUPTS();
-
 	if( xSchedulerRunning == pdTRUE )
 	{
 		/* Put back the switch interrupt routines that was in place
-         * before the scheduler started. */
+		before the scheduler started. */
 		_dos_setvect( portSWITCH_INT_NUMBER, pxOldSwitchISR );
 	}
 
 	/* Disable the timer used for the tick to ensure the scheduler is
-     * not called before restoring interrupts.  There was previously nothing
+	not called before restoring interrupts.  There was previously nothing
-     * on this timer so there is no old ISR to restore. */
+	on this timer so there is no old ISR to restore. */
 	portOUTPUT_WORD( portTIMER_1_CONTROL_REGISTER, usTimerDisable );
 
 	/* Restart the DOS tick. */
@@ -244,3 +241,4 @@ static void prvSetTickFrequency( uint32_t ulTickRateHz )
 
 
 /*lint +e950 */
+

portable/BCC/16BitDOS/Flsh186/prtmacro.h

@@ -61,8 +61,7 @@ typedef unsigned short   UBaseType_t;
 /*-----------------------------------------------------------*/
 
 /* Critical section handling. */
-#define portENTER_CRITICAL() \
+#define portENTER_CRITICAL()			__asm{ pushf }  \
-    __asm{ pushf }           \
 										__asm{ cli 	 }	\
 
 #define portEXIT_CRITICAL()				__asm{ popf }
@@ -95,3 +94,4 @@ typedef unsigned short   UBaseType_t;
 #define portTASK_FUNCTION( vTaskFunction, vParameters ) void vTaskFunction( void *pvParameters )
 
 #endif /* PORTMACRO_H */
+

portable/BCC/16BitDOS/PC/port.c

@@ -26,15 +26,15 @@
  */
 
 /*
- * Changes from V2.6.1
+Changes from V2.6.1
- *
+
 	+ Replaced the sUsingPreemption variable with the configUSE_PREEMPTION
- +    macro to be consistent with the later ports.
+	  macro to be consistent with the later ports.
- +
+
- + Changes from V4.0.1
+Changes from V4.0.1
- +
+	
 	+ Add function prvSetTickFrequencyDefault() to set the DOS tick back to
- +    its proper value when the scheduler exits.
+	  its proper value when the scheduler exits. 
 */
 
 #include <stdlib.h>
@@ -61,21 +61,19 @@ static void prvSetTickFrequency( uint32_t ulTickRateHz );
 static void prvExitFunction( void );
 
 /* Either chain to the DOS tick (which itself clears the PIC) or clear the PIC
- * directly.  We chain to the DOS tick as close as possible to the standard DOS
+directly.  We chain to the DOS tick as close as possible to the standard DOS
- * tick rate. */
+tick rate. */
 static void prvPortResetPIC( void );
 
 /* The ISR used depends on whether the preemptive or cooperative
- * scheduler is being used. */
+scheduler is being used. */
 #if( configUSE_PREEMPTION == 1 )
-
 	/* Tick service routine used by the scheduler when preemptive scheduling is
- * being used. */
+	being used. */
 	static void __interrupt __far prvPreemptiveTick( void );
 #else
-
 	/* Tick service routine used by the scheduler when cooperative scheduling is
- * being used. */
+	being used. */
 	static void __interrupt __far prvNonPreemptiveTick( void );
 #endif
 
@@ -83,7 +81,7 @@ static void prvPortResetPIC( void );
 static void __interrupt __far prvYieldProcessor( void );
 
 /* Set the tick frequency back so the floppy drive works correctly when the
- * scheduler exits. */
+scheduler exits. */
 static void prvSetTickFrequencyDefault( void );
 
 /*lint -e956 File scopes necessary here. */
@@ -113,7 +111,7 @@ BaseType_t xPortStartScheduler( void )
 	/* This is called with interrupts already disabled. */
 
 	/* Remember what was on the interrupts we are going to use
-     * so we can put them back later if required. */
+	so we can put them back later if required. */
 	pxOldSwitchISR = _dos_getvect( portSWITCH_INT_NUMBER );
 	pxOriginalTickISR = _dos_getvect( portTIMER_INT_NUMBER );
 	pxOldSwitchISRPlus1 = _dos_getvect( portSWITCH_INT_NUMBER + 1 );
@@ -121,15 +119,15 @@ BaseType_t xPortStartScheduler( void )
 	prvSetTickFrequency( configTICK_RATE_HZ );
 
 	/* Put our manual switch (yield) function on a known
-     * vector. */
+	vector. */
 	_dos_setvect( portSWITCH_INT_NUMBER, prvYieldProcessor );
 
 	/* Put the old tick on a different interrupt number so we can
-     * call it when we want. */
+	call it when we want. */
 	_dos_setvect( portSWITCH_INT_NUMBER + 1, pxOriginalTickISR );
 
 	/* The ISR used depends on whether the preemptive or cooperative
-     * scheduler is being used. */
+	scheduler is being used. */
 	#if( configUSE_PREEMPTION == 1 )
 	{
 		/* Put our tick switch function on the timer interrupt. */
@@ -143,8 +141,8 @@ BaseType_t xPortStartScheduler( void )
     #endif
 
 	/* Setup a counter that is used to call the DOS interrupt as close
-     * to it's original frequency as can be achieved given our chosen tick
+	to it's original frequency as can be achieved given our chosen tick
-     * frequency. */
+	frequency. */
 	sDOSTickCounter = portTICKS_PER_DOS_TICK;
 
 	/* Clean up function if we want to return to DOS. */
@@ -166,7 +164,7 @@ BaseType_t xPortStartScheduler( void )
 /*-----------------------------------------------------------*/
 
 /* The ISR used depends on whether the preemptive or cooperative
- * scheduler is being used. */
+scheduler is being used. */
 #if( configUSE_PREEMPTION == 1 )
 	static void __interrupt __far prvPreemptiveTick( void )
 	{
@@ -180,15 +178,15 @@ BaseType_t xPortStartScheduler( void )
 		/* Reset the PIC ready for the next time. */
 		prvPortResetPIC();
 	}
-#else /* if ( configUSE_PREEMPTION == 1 ) */
+#else
 	static void __interrupt __far prvNonPreemptiveTick( void )
 	{
 		/* Same as preemptive tick, but the cooperative scheduler is being used
-         * so we don't have to switch in the context of the next task. */
+		so we don't have to switch in the context of the next task. */
 		xTaskIncrementTick();
 		prvPortResetPIC();
 	}
-#endif /* if ( configUSE_PREEMPTION == 1 ) */
+#endif
 /*-----------------------------------------------------------*/
 
 static void __interrupt __far prvYieldProcessor( void )
@@ -201,22 +199,19 @@ static void __interrupt __far prvYieldProcessor( void )
 static void prvPortResetPIC( void )
 {
 	/* We are going to call the DOS tick interrupt at as close a
-     * frequency to the normal DOS tick as possible. */
+	frequency to the normal DOS tick as possible. */
 
 	/* WE SHOULD NOT DO THIS IF YIELD WAS CALLED. */
 	--sDOSTickCounter;
-
 	if( sDOSTickCounter <= 0 )
 	{
 		sDOSTickCounter = ( int16_t ) portTICKS_PER_DOS_TICK;
-        __asm {
+		__asm{ int	portSWITCH_INT_NUMBER + 1 };		 
-            int portSWITCH_INT_NUMBER + 1
-        };
 	}
 	else
 	{
 		/* Reset the PIC as the DOS tick is not being called to
-         * do it. */
+		do it. */
 		__asm
 		{
 			mov	al, 20H
@@ -229,8 +224,8 @@ static void prvPortResetPIC( void )
 void vPortEndScheduler( void )
 {
 	/* Jump back to the processor state prior to starting the
-     * scheduler.  This means we are not going to be using a
+	scheduler.  This means we are not going to be using a
-     * task stack frame so the task can be deleted. */
+	task stack frame so the task can be deleted. */
 	longjmp( xJumpBuf, 1 );
 }
 /*-----------------------------------------------------------*/
@@ -240,9 +235,8 @@ static void prvExitFunction( void )
 void ( __interrupt __far *pxOriginalTickISR )();
 
 	/* Interrupts should be disabled here anyway - but no 
-     * harm in making sure. */
+	harm in making sure. */
 	portDISABLE_INTERRUPTS();
-
 	if( xSchedulerRunning == pdTRUE )
 	{
 		/* Set the DOS tick back onto the timer ticker. */
@@ -251,13 +245,12 @@ static void prvExitFunction( void )
 		prvSetTickFrequencyDefault();
 
 		/* Put back the switch interrupt routines that was in place
-         * before the scheduler started. */
+		before the scheduler started. */
 		_dos_setvect( portSWITCH_INT_NUMBER, pxOldSwitchISR );
 		_dos_setvect( portSWITCH_INT_NUMBER + 1, pxOldSwitchISRPlus1 );
 	}
-
 	/* The tick timer is back how DOS wants it.  We can re-enable
-     * interrupts without the scheduler being called. */
+	interrupts without the scheduler being called. */
 	portENABLE_INTERRUPTS();
 }
 /*-----------------------------------------------------------*/
@@ -292,3 +285,4 @@ static void prvSetTickFrequencyDefault( void )
 
 
 /*lint +e950 */
+

portable/BCC/16BitDOS/PC/prtmacro.h

@@ -61,8 +61,7 @@ typedef unsigned short   UBaseType_t;
 /*-----------------------------------------------------------*/
 
 /* Critical section management. */
-#define portENTER_CRITICAL() \
+#define portENTER_CRITICAL()			__asm{ pushf }  \
-    __asm{ pushf }           \
 										__asm{ cli 	 }	\
 
 #define portEXIT_CRITICAL()				__asm{ popf }
@@ -95,3 +94,4 @@ typedef unsigned short   UBaseType_t;
 #define portTASK_FUNCTION( vTaskFunction, pvParameters ) void vTaskFunction( void *pvParameters )
 
 #endif /* PORTMACRO_H */
+

portable/BCC/16BitDOS/common/portasm.h

@@ -47,10 +47,10 @@ void portSWITCH_CONTEXT( void );
 void portFIRST_CONTEXT( void );
 
 /* There are slightly different versions depending on whether you are building
- * to include debugger information.  If debugger information is used then there
+to include debugger information.  If debugger information is used then there
- * are a couple of extra bytes left of the ISR stack (presumably for use by the
+are a couple of extra bytes left of the ISR stack (presumably for use by the
- * debugger).  The true stack pointer is then stored in the bp register.  We add
+debugger).  The true stack pointer is then stored in the bp register.  We add
- * 2 to the stack pointer to remove the extra bytes before we restore our context. */
+2 to the stack pointer to remove the extra bytes before we restore our context. */
 
 #define portSWITCH_CONTEXT()											\
 							asm { mov	ax, seg pxCurrentTCB		}	\
@@ -83,4 +83,5 @@ void portFIRST_CONTEXT( void );
 							__asm { iret							}
 
 
-#endif /* ifndef PORT_ASM_H */
+#endif
+

portable/BCC/16BitDOS/common/portcomn.c

@@ -26,14 +26,14 @@
  */
 
 /*
- * Changes from V1.00:
+Changes from V1.00:
- *
+
 	+ pxPortInitialiseStack() now initialises the stack of new tasks to the
- +    same format used by the compiler.  This allows the compiler generated
+	  same format used by the compiler.  This allows the compiler generated
- +    interrupt mechanism to be used for context switches.
+	  interrupt mechanism to be used for context switches.
- +
+
- + Changes from V2.6.1
+Changes from V2.6.1
- +
+
 	+ Move usPortCheckFreeStackSpace() to tasks.c.
 */
 
@@ -45,14 +45,12 @@
 /*-----------------------------------------------------------*/
 
 /* See header file for description. */
-StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
-                                     TaskFunction_t pxCode,
-                                     void * pvParameters )
 {
 StackType_t DS_Reg = 0;
 
 	/* Place a few bytes of known values on the bottom of the stack.
-     * This is just useful for debugging. */
+	This is just useful for debugging. */
 
 	*pxTopOfStack = 0x1111;
 	pxTopOfStack--;
@@ -69,8 +67,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 	/*lint -e950 -e611 -e923 Lint doesn't like this much - but nothing I can do about it. */
 
 	/* We are going to start the scheduler using a return from interrupt
-     * instruction to load the program counter, so first there would be the
+	instruction to load the program counter, so first there would be the
-     * function call with parameters preamble. */
+	function call with parameters preamble. */
 	
 	*pxTopOfStack = FP_SEG( pvParameters );
 	pxTopOfStack--;
@@ -90,8 +88,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 	pxTopOfStack--;
 
 	/* The remaining registers would be pushed on the stack by our context
-     * switch function.  These are loaded with values simply to make debugging
+	switch function.  These are loaded with values simply to make debugging
-     * easier. */
+	easier. */
 	*pxTopOfStack = ( StackType_t ) 0xAAAA;	/* AX */
 	pxTopOfStack--;
 	*pxTopOfStack = ( StackType_t ) 0xBBBB;	/* BX */
@@ -104,9 +102,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 	pxTopOfStack--;
 
 	/* We need the true data segment. */
-    __asm {
+	__asm{	MOV DS_Reg, DS };
-        MOV DS_Reg, DS
-    };
 
 	*pxTopOfStack = DS_Reg;						/* DS */
 	pxTopOfStack--;
@@ -121,3 +117,4 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 	return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
+

portable/CCS/ARM_CM3/port.c

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------

portable/CCS/ARM_CM4F/port.c

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------

portable/CCS/ARM_Cortex-R4/port.c

@@ -57,7 +57,7 @@ uint32_t ulCriticalNesting = 9999;
 #define portTHUMB_MODE_BIT		( ( StackType_t ) 0x20 )
 
 /* The number of words on the stack frame between the saved Top Of Stack and
- * R0 (in which the parameters are passed. */
+R0 (in which the parameters are passed. */
 #define portSPACE_BETWEEN_TOS_AND_PARAMETERS	( 12 )
 
 /*-----------------------------------------------------------*/
@@ -68,7 +68,7 @@ extern void vPortStartFirstTask( void );
 /*-----------------------------------------------------------*/
 
 /* Saved as part of the task context.  Set to pdFALSE if the task does not
- * require an FPU context. */
+require an FPU context. */
 uint32_t ulTaskHasFPUContext = 0;
 
 /*-----------------------------------------------------------*/
@@ -77,9 +77,7 @@ uint32_t ulTaskHasFPUContext = 0;
 /*
  * See header file for description.
  */
-StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
-                                     TaskFunction_t pxCode,
-                                     void * pvParameters )
 {
 StackType_t *pxOriginalTOS;
 
@@ -93,11 +91,11 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 	#endif
 
 	/* Setup the initial stack of the task.  The stack is set exactly as
-     * expected by the portRESTORE_CONTEXT() macro. */
+	expected by the portRESTORE_CONTEXT() macro. */
 
 	/* First on the stack is the return address - which is the start of the as
-     * the task has not executed yet.  The offset is added to make the return
+	the task has not executed yet.  The offset is added to make the return
-     * address appear as it would within an IRQ ISR. */
+	address appear as it would within an IRQ ISR. */
 	*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
 	pxTopOfStack--;
 
@@ -133,11 +131,11 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 		*pxTopOfStack = ( StackType_t ) 0x01010101;	/* R1 */
 		pxTopOfStack--;
 	}
-    #else /* ifdef portPRELOAD_TASK_REGISTERS */
+	#else
 	{
 		pxTopOfStack -= portSPACE_BETWEEN_TOS_AND_PARAMETERS;
 	}
-    #endif /* ifdef portPRELOAD_TASK_REGISTERS */
+	#endif
 
 	/* Function parameters are passed in R0. */
 	*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
@@ -157,8 +155,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 		pxTopOfStack--;
 
 		/* The last thing on the stack is the tasks ulUsingFPU value, which by
-             * default is set to indicate that the stack frame does not include FPU
+		default is set to indicate that the stack frame does not include FPU
-             * registers. */
+		registers. */
 		*pxTopOfStack = pdFALSE;
 	}
 	#endif
@@ -209,7 +207,7 @@ BaseType_t xPortStartScheduler( void )
 	ulCriticalNesting = 0;
 
 	/* Start the first task.  This is done from portASM.asm as ARM mode must be
-     * used. */
+	used. */
 	vPortStartFirstTask();
 
 	/* Should not get here! */
@@ -223,7 +221,7 @@ BaseType_t xPortStartScheduler( void )
 void vPortEndScheduler(void)
 {
 	/* Not implemented in ports where there is nothing to return to.
-     * Artificially force an assert. */
+	Artificially force an assert. */
 	configASSERT( ulCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
@@ -238,11 +236,11 @@ void vPortEndScheduler( void )
 		portRTI_INTFLAG_REG = 0x00000001;
 
 		/* Increment the tick count - this may make a delaying task ready
-         * to run - but a context switch is not performed. */
+		to run - but a context switch is not performed. */
 		xTaskIncrementTick();
 	}
 
-#else /* if configUSE_PREEMPTION == 0 */
+ #else
 
 	/*
 	 **************************************************************************
@@ -253,7 +251,7 @@ void vPortEndScheduler( void )
 	 */
 	void vPortPreemptiveTick( void );
 
-#endif /* if configUSE_PREEMPTION == 0 */
+#endif
 /*-----------------------------------------------------------*/
 
 
@@ -266,8 +264,8 @@ void vPortEnterCritical( void )
 	portDISABLE_INTERRUPTS();
 
 	/* Now interrupts are disabled ulCriticalNesting can be accessed
-     * directly.  Increment ulCriticalNesting to keep a count of how many times
+	directly.  Increment ulCriticalNesting to keep a count of how many times
-     * portENTER_CRITICAL() has been called. */
+	portENTER_CRITICAL() has been called. */
 	ulCriticalNesting++;
 }
 /*-----------------------------------------------------------*/
@@ -284,7 +282,7 @@ void vPortExitCritical( void )
 		ulCriticalNesting--;
 
 		/* If the nesting level has reached zero then interrupts should be
-         * re-enabled. */
+		re-enabled. */
 		if( ulCriticalNesting == 0 )
 		{
 			/* Enable interrupts as per portENABLE_INTERRUPTS(). */
@@ -301,7 +299,7 @@ void vPortExitCritical( void )
 	extern void vPortInitialiseFPSCR( void );
 
 		/* A task is registering the fact that it needs an FPU context.  Set the
-         * FPU flag (saved as part of the task context. */
+		FPU flag (saved as part of the task context. */
 		ulTaskHasFPUContext = pdTRUE;
 
 		/* Initialise the floating point status register. */
@@ -311,3 +309,4 @@ void vPortExitCritical( void )
 #endif /* __TI_VFP_SUPPORT__ */
 
 /*-----------------------------------------------------------*/
+

portable/CCS/ARM_Cortex-R4/portmacro.h

@@ -59,7 +59,7 @@ typedef unsigned long    UBaseType_t;
     #define portMAX_DELAY (TickType_t) 0xFFFFFFFFF
 
 	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
- * not need to be guarded with a critical section. */
+	not need to be guarded with a critical section. */
 	#define portTICK_TYPE_IS_ATOMIC 1
 #endif
 
@@ -114,3 +114,4 @@ extern void vPortYield( void );
 #define portTASK_FUNCTION_PROTO(vFunction, pvParameters) void vFunction(void *pvParameters)
 
 #endif /* __PORTMACRO_H__ */
+

portable/CCS/MSP430X/data_model.h

@@ -1,29 +1,29 @@
 ;/*
-   * ; * FreeRTOS Kernel V10.3.1
+; * FreeRTOS Kernel V10.3.1
-   * ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
-   * ; *
+; *
-   * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
+; * Permission is hereby granted, free of charge, to any person obtaining a copy of
-   * ; * this software and associated documentation files (the "Software"), to deal in
+; * this software and associated documentation files (the "Software"), to deal in
-   * ; * the Software without restriction, including without limitation the rights to
+; * the Software without restriction, including without limitation the rights to
-   * ; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
-   * ; * the Software, and to permit persons to whom the Software is furnished to do so,
+; * the Software, and to permit persons to whom the Software is furnished to do so,
-   * ; * subject to the following conditions:
+; * subject to the following conditions:
-   * ; *
+; *
-   * ; * The above copyright notice and this permission notice shall be included in all
+; * The above copyright notice and this permission notice shall be included in all
-   * ; * copies or substantial portions of the Software.
+; * copies or substantial portions of the Software.
-   * ; *
+; *
-   * ; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-   * ; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
-   * ; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
-   * ; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-   * ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-   * ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-   * ; *
+; *
-   * ; * http://www.FreeRTOS.org
+; * http://www.FreeRTOS.org
-   * ; * http://aws.amazon.com/freertos
+; * http://aws.amazon.com/freertos
-   * ; *
+; *
-   * ; * 1 tab == 4 spaces!
+; * 1 tab == 4 spaces!
-   * ; */
+; */
 
 	.if $DEFINED( __LARGE_DATA_MODEL__ )
 		.define "pushm.a", pushm_x
@@ -46,3 +46,8 @@
 		.define "call", call_x
 		.define "ret", ret_x
 	.endif
+
+
+
+
+

portable/CCS/MSP430X/port.c

@@ -34,24 +34,24 @@
  *----------------------------------------------------------*/
 
 /* Constants required for hardware setup.  The tick ISR runs off the ACLK,
- * not the MCLK. */
+not the MCLK. */
 #define portACLK_FREQUENCY_HZ			( ( TickType_t ) 32768 )
 #define portINITIAL_CRITICAL_NESTING	( ( uint16_t ) 10 )
 #define portFLAGS_INT_ENABLED			( ( StackType_t ) 0x08 )
 
 /* We require the address of the pxCurrentTCB variable, but don't want to know
- * any details of its type. */
+any details of its type. */
 typedef void TCB_t;
 extern volatile TCB_t * volatile pxCurrentTCB;
 
 /* Each task maintains a count of the critical section nesting depth.  Each
- * time a critical section is entered the count is incremented.  Each time a
+time a critical section is entered the count is incremented.  Each time a
- * critical section is exited the count is decremented - with interrupts only
+critical section is exited the count is decremented - with interrupts only
- * being re-enabled if the count is zero.
+being re-enabled if the count is zero.
- *
+
- * usCriticalNesting will get set to zero when the scheduler starts, but must
+usCriticalNesting will get set to zero when the scheduler starts, but must
- * not be initialised to zero as this will cause problems during the startup
+not be initialised to zero as this will cause problems during the startup
- * sequence. */
+sequence. */
 volatile uint16_t usCriticalNesting = portINITIAL_CRITICAL_NESTING;
 /*-----------------------------------------------------------*/
 
@@ -69,27 +69,25 @@ void vPortSetupTimerInterrupt( void );
  *
  * See the header file portable.h.
  */
-StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
-                                     TaskFunction_t pxCode,
-                                     void * pvParameters )
 {
 uint16_t *pusTopOfStack;
 uint32_t *pulTopOfStack, ulTemp;
 
 	/*
-     *  Place a few bytes of known values on the bottom of the stack.
+		Place a few bytes of known values on the bottom of the stack.
-     *  This is just useful for debugging and can be included if required.
+		This is just useful for debugging and can be included if required.
-     *
+
 		*pxTopOfStack = ( StackType_t ) 0x1111;
-     *  pxTopOfStack--;
+		pxTopOfStack--;
 		*pxTopOfStack = ( StackType_t ) 0x2222;
-     *  pxTopOfStack--;
+		pxTopOfStack--;
 		*pxTopOfStack = ( StackType_t ) 0x3333;
-     *  pxTopOfStack--;
+		pxTopOfStack--;
 	*/
 
 	/* Data types are need either 16 bits or 32 bits depending on the data 
-     * and code model used. */
+	and code model used. */
 	if( sizeof( pxCode ) == sizeof( uint16_t ) )
 	{
 		pusTopOfStack = ( uint16_t * ) pxTopOfStack;
@@ -138,19 +136,19 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 		pxTopOfStack--;
 		*pxTopOfStack = ( StackType_t ) 0x4444;
 		pxTopOfStack--;
-    #else /* ifdef PRELOAD_REGISTER_VALUES */
+	#else
 		pxTopOfStack -= 3;
 		*pxTopOfStack = ( StackType_t ) pvParameters;
 		pxTopOfStack -= 9;
-    #endif /* ifdef PRELOAD_REGISTER_VALUES */
+	#endif
 
 	/* A variable is used to keep track of the critical section nesting.
-     * This variable has to be stored as part of the task context and is
+	This variable has to be stored as part of the task context and is
-     * initially set to zero. */
+	initially set to zero. */
 	*pxTopOfStack = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING;	
 
 	/* Return a pointer to the top of the stack we have generated so this can
-     * be stored in the task control block for the task. */
+	be stored in the task control block for the task. */
 	return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
@@ -158,7 +156,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 void vPortEndScheduler( void )
 {
 	/* It is unlikely that the MSP430 port will get stopped.  If required simply
-     * disable the tick interrupt here. */
+	disable the tick interrupt here. */
 }
 /*-----------------------------------------------------------*/
 
@@ -185,3 +183,5 @@ interrupt void vTickISREntry( void )
 		vPortCooperativeTickISR();
 	#endif
 }
+
+	

portable/CCS/MSP430X/portmacro.h

@@ -136,7 +136,8 @@ extern void vTaskSwitchContext( void );
 void vApplicationSetupTimerInterrupt( void );
 
 /* sizeof( int ) != sizeof( long ) so a full printf() library is required if
- * run time stats information is to be displayed. */
+run time stats information is to be displayed. */
 #define portLU_PRINTF_SPECIFIER_REQUIRED
 
 #endif /* PORTMACRO_H */
+

portable/CodeWarrior/ColdFire_V1/port.c

@@ -45,20 +45,17 @@ asm void interrupt VectorNumber_VL1swi vPortYieldISR( void );
 static void prvSetupTimerInterrupt( void );
 
 /* Used to keep track of the number of nested calls to taskENTER_CRITICAL().  This
- * will be set to 0 prior to the first task being started. */
+will be set to 0 prior to the first task being started. */
 static uint32_t ulCriticalNesting = 0x9999UL;
 
 /*-----------------------------------------------------------*/
 
-StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+StackType_t *pxPortInitialiseStack( StackType_t * pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
-                                     TaskFunction_t pxCode,
-                                     void * pvParameters )
 {
+
 uint32_t ulOriginalA5;
 
-    __asm {
+	__asm{ MOVE.L A5, ulOriginalA5 };
-        MOVE.L A5, ulOriginalA5
-    };
 
 
 	*pxTopOfStack = (StackType_t) 0xDEADBEEF;
@@ -109,7 +106,7 @@ static void prvSetupTimerInterrupt( void )
 	RTCMOD = portRTC_CLOCK_HZ / configTICK_RATE_HZ;
 	
 	/* Enable the RTC to generate interrupts - interrupts are already disabled
-     * when this code executes. */
+	when this code executes. */
 	RTCSC_RTIE = 1;
 }
 /*-----------------------------------------------------------*/
@@ -125,20 +122,19 @@ void vPortEnterCritical( void )
 	if( ulCriticalNesting == 0UL )
 	{
 		/* Guard against context switches being pended simultaneously with a
-         * critical section being entered. */
+		critical section being entered. */
 		do
 		{
 			portDISABLE_INTERRUPTS();
-
 			if( INTC_FRC == 0UL )
 			{
 				break;
 			}
 
 			portENABLE_INTERRUPTS();
+
 		} while( 1 );
 	}
-
 	ulCriticalNesting++;
 }
 /*-----------------------------------------------------------*/
@@ -146,7 +142,6 @@ void vPortEnterCritical( void )
 void vPortExitCritical( void )
 {
 	ulCriticalNesting--;
-
 	if( ulCriticalNesting == 0 )
 	{
 		portENABLE_INTERRUPTS();
@@ -185,3 +180,4 @@ void interrupt VectorNumber_Vrtc vPortTickISR( void )
 	}
 	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulSavedInterruptMask );
 }
+

portable/CodeWarrior/ColdFire_V1/portmacro.h

@@ -101,8 +101,7 @@
 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
 /*-----------------------------------------------------------*/
 
-    #define portEND_SWITCHING_ISR( xSwitchRequired ) \
+#define portEND_SWITCHING_ISR( xSwitchRequired )	if( xSwitchRequired != pdFALSE )	\
-    if( xSwitchRequired != pdFALSE )                 \
 													{									\
 														portYIELD();					\
 													}
@@ -113,3 +112,4 @@
 #endif
 
 #endif /* PORTMACRO_H */
+

portable/CodeWarrior/ColdFire_V2/port.c

@@ -36,7 +36,7 @@
 #define portINITIAL_STATUS_REGISTER		( ( StackType_t ) 0x2000)
 
 /* Used to keep track of the number of nested calls to taskENTER_CRITICAL().  This
- * will be set to 0 prior to the first task being started. */
+will be set to 0 prior to the first task being started. */
 static uint32_t ulCriticalNesting = 0x9999UL;
 
 
@@ -57,9 +57,7 @@ static uint32_t ulCriticalNesting = 0x9999UL;
 
 /*-----------------------------------------------------------*/
 
-StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+StackType_t *pxPortInitialiseStack( StackType_t * pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
-                                     TaskFunction_t pxCode,
-                                     void * pvParameters )
 {
 	*pxTopOfStack = ( StackType_t ) pvParameters;
 	pxTopOfStack--;
@@ -108,20 +106,19 @@ void vPortEnterCritical( void )
 	if( ulCriticalNesting == 0UL )
 	{
 		/* Guard against context switches being pended simultaneously with a
-         * critical section being entered. */
+		critical section being entered. */
 		do
 		{
 			portDISABLE_INTERRUPTS();
-
 			if( MCF_INTC0_INTFRCH == 0UL )
 			{
 				break;
 			}
 
 			portENABLE_INTERRUPTS();
+
 		} while( 1 );
 	}
-
 	ulCriticalNesting++;
 }
 /*-----------------------------------------------------------*/
@@ -129,7 +126,6 @@ void vPortEnterCritical( void )
 void vPortExitCritical( void )
 {
 	ulCriticalNesting--;
-
 	if( ulCriticalNesting == 0 )
 	{
 		portENABLE_INTERRUPTS();
@@ -148,3 +144,4 @@ void vPortYieldHandler( void )
 	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulSavedInterruptMask );
 }
 /*-----------------------------------------------------------*/
+

portable/CodeWarrior/ColdFire_V2/portmacro.h

@@ -100,8 +100,7 @@
 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
 /*-----------------------------------------------------------*/
 
-    #define portEND_SWITCHING_ISR( xSwitchRequired ) \
+#define portEND_SWITCHING_ISR( xSwitchRequired )	if( xSwitchRequired != pdFALSE )	\
-    if( xSwitchRequired != pdFALSE )                 \
 													{									\
 														portYIELD();					\
 													}
@@ -112,3 +111,4 @@
 #endif
 
 #endif /* PORTMACRO_H */
+

portable/CodeWarrior/HCS12/port.c

@@ -42,7 +42,7 @@
 static void prvSetupTimerInterrupt( void );
 
 /* Interrupt service routines have to be in non-banked memory - as does the
- * scheduler startup function. */
+scheduler startup function. */
 #pragma CODE_SEG __NEAR_SEG NON_BANKED
 
 	/* Manual context switch function.  This is the SWI ISR. */
@@ -52,19 +52,19 @@ void interrupt vPortYield( void );
 	void interrupt vPortTickInterrupt( void );
 	
 	/* Simply called by xPortStartScheduler().  xPortStartScheduler() does not
- * start the scheduler directly because the header file containing the
+	start the scheduler directly because the header file containing the 
- * xPortStartScheduler() prototype is part of the common kernel code, and
+	xPortStartScheduler() prototype is part of the common kernel code, and 
- * therefore cannot use the CODE_SEG pragma. */
+	therefore cannot use the CODE_SEG pragma. */
 	static BaseType_t xBankedStartScheduler( void );
 
 #pragma CODE_SEG DEFAULT
 
 /* Calls to portENTER_CRITICAL() can be nested.  When they are nested the 
- * critical section should not be left (i.e. interrupts should not be re-enabled)
+critical section should not be left (i.e. interrupts should not be re-enabled)
- * until the nesting depth reaches 0.  This variable simply tracks the nesting
+until the nesting depth reaches 0.  This variable simply tracks the nesting 
- * depth.  Each task maintains it's own critical nesting depth variable so
+depth.  Each task maintains it's own critical nesting depth variable so 
- * uxCriticalNesting is saved and restored from the task stack during a context
+uxCriticalNesting is saved and restored from the task stack during a context
- * switch. */
+switch. */
 volatile UBaseType_t uxCriticalNesting = 0xff;
 
 /*-----------------------------------------------------------*/
@@ -72,27 +72,25 @@ volatile UBaseType_t uxCriticalNesting = 0xff;
 /* 
  * See header file for description. 
  */
-StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
-                                     TaskFunction_t pxCode,
-                                     void * pvParameters )
 {
 	/* 
-     *  Place a few bytes of known values on the bottom of the stack.
+		Place a few bytes of known values on the bottom of the stack.
-     *  This can be uncommented to provide useful stack markers when debugging.
+		This can be uncommented to provide useful stack markers when debugging.
-     *
+
 		*pxTopOfStack = ( StackType_t ) 0x11;
-     *  pxTopOfStack--;
+		pxTopOfStack--;
 		*pxTopOfStack = ( StackType_t ) 0x22;
-     *  pxTopOfStack--;
+		pxTopOfStack--;
 		*pxTopOfStack = ( StackType_t ) 0x33;
-     *  pxTopOfStack--;
+		pxTopOfStack--;
 	*/
 
 
 
 	/* Setup the initial stack of the task.  The stack is set exactly as 
-     * expected by the portRESTORE_CONTEXT() macro.  In this case the stack as
+	expected by the portRESTORE_CONTEXT() macro.  In this case the stack as
-     * expected by the HCS12 RTI instruction. */
+	expected by the HCS12 RTI instruction. */
 
 
 	/* The address of the task function is placed in the stack byte at a time. */
@@ -124,7 +122,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 	pxTopOfStack--;
 
 	/* CCR: Note that when the task starts interrupts will be enabled since
-     * "I" bit of CCR is cleared */
+	"I" bit of CCR is cleared */
 	*pxTopOfStack = ( StackType_t ) 0x00;
 	pxTopOfStack--;
 	
@@ -135,7 +133,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 	#endif
 	
 	/* Finally the critical nesting depth is initialised with 0 (not within
-     * a critical section). */
+	a critical section). */
 	*pxTopOfStack = ( StackType_t ) 0x00;
 
 	return pxTopOfStack;
@@ -158,10 +156,10 @@ static void prvSetupTimerInterrupt( void )
 BaseType_t xPortStartScheduler( void )
 {
 	/* xPortStartScheduler() does not start the scheduler directly because 
-     * the header file containing the xPortStartScheduler() prototype is part
+	the header file containing the xPortStartScheduler() prototype is part 
-     * of the common kernel code, and therefore cannot use the CODE_SEG pragma.
+	of the common kernel code, and therefore cannot use the CODE_SEG pragma. 
-     * Instead it simply calls the locally defined xBankedStartScheduler() -
+	Instead it simply calls the locally defined xBankedStartScheduler() - 
-     * which does use the CODE_SEG pragma. */
+	which does use the CODE_SEG pragma. */
 
 	return xBankedStartScheduler();
 }
@@ -172,7 +170,7 @@ BaseType_t xPortStartScheduler( void )
 static BaseType_t xBankedStartScheduler( void )
 {
 	/* Configure the timer that will generate the RTOS tick.  Interrupts are
-     * disabled when this function is called. */
+	disabled when this function is called. */
 	prvSetupTimerInterrupt();
 
 	/* Restore the context of the first task. */
@@ -223,15 +221,17 @@ void interrupt vPortTickInterrupt( void )
 		TFLG1 = 1;								   
 
 		/* Restore the context of a task - which may be a different task
-             * to that interrupted. */
+		to that interrupted. */
 		portRESTORE_CONTEXT();	
 	}
-    #else /* if configUSE_PREEMPTION == 1 */
+	#else
 	{
 		xTaskIncrementTick();
 		TFLG1 = 1;
 	}
-    #endif /* if configUSE_PREEMPTION == 1 */
+	#endif
 }
 
 #pragma CODE_SEG DEFAULT
+
+

portable/CodeWarrior/HCS12/portmacro.h

@@ -117,7 +117,6 @@ typedef unsigned char    UBaseType_t;
  */
 
 #ifdef BANKED_MODEL
-
 	/*
 	 * Load the stack pointer for the task, then pull the critical nesting
 	 * count and PPAGE register from the stack.  The remains of the
@@ -153,7 +152,7 @@ typedef unsigned char    UBaseType_t;
 		__asm( "ldx pxCurrentTCB" );								\
 		__asm( "sts 0, x" );										\
 	}
-#else /* ifdef BANKED_MODEL */
+#else
 
 	/*
 	 * These macros are as per the BANKED versions above, but without saving
@@ -181,7 +180,7 @@ typedef unsigned char    UBaseType_t;
 		__asm( "ldx pxCurrentTCB" );								\
 		__asm( "sts 0, x" );										\
 	}
-#endif /* ifdef BANKED_MODEL */
+#endif
 
 /*
  * Utility macro to call macros above in correct order in order to perform a
@@ -200,3 +199,4 @@ typedef unsigned char    UBaseType_t;
 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
 
 #endif /* PORTMACRO_H */
+

portable/Common/mpu_wrappers.c

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 /*

portable/GCC/ARM7_AT91FR40008/port.c

@@ -73,24 +73,22 @@ extern void vPortISRStartFirstTask( void );
  *
  * See header file for description. 
  */
-StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
-                                     TaskFunction_t pxCode,
-                                     void * pvParameters )
 {
 StackType_t *pxOriginalTOS;
 
 	pxOriginalTOS = pxTopOfStack;
 	
 	/* To ensure asserts in tasks.c don't fail, although in this case the assert
-     * is not really required. */
+	is not really required. */
 	pxTopOfStack--;
 
 	/* Setup the initial stack of the task.  The stack is set exactly as 
-     * expected by the portRESTORE_CONTEXT() macro. */
+	expected by the portRESTORE_CONTEXT() macro. */
 
 	/* First on the stack is the return address - which in this case is the
-     * start of the task.  The offset is added to make the return address appear
+	start of the task.  The offset is added to make the return address appear
-     * as it would within an IRQ ISR. */
+	as it would within an IRQ ISR. */
 	*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;		
 	pxTopOfStack--;
 
@@ -124,12 +122,12 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 	pxTopOfStack--;	
 
 	/* When the task starts is will expect to find the function parameter in
-     * R0. */
+	R0. */
 	*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
 	pxTopOfStack--;
 
 	/* The last thing onto the stack is the status register, which is set for
-     * system mode, with interrupts enabled. */
+	system mode, with interrupts enabled. */
 	*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
 
 	#ifdef THUMB_INTERWORK
@@ -142,9 +140,9 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 	pxTopOfStack--;
 
 	/* Some optimisation levels use the stack differently to others.  This 
-     * means the interrupt flags cannot always be stored on the stack and will
+	means the interrupt flags cannot always be stored on the stack and will
-     * instead be stored in a variable, which is then saved as part of the
+	instead be stored in a variable, which is then saved as part of the
-     * tasks context. */
+	tasks context. */
 	*pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
 
 	return pxTopOfStack;
@@ -154,7 +152,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 BaseType_t xPortStartScheduler( void )
 {
 	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-     * here already. */
+	here already. */
 	prvSetupTimerInterrupt();
 
 	/* Start the first task. */
@@ -168,7 +166,7 @@ BaseType_t xPortStartScheduler( void )
 void vPortEndScheduler( void )
 {
 	/* It is unlikely that the ARM port will require this function as there
-     * is nothing to return to.  */
+	is nothing to return to.  */
 }
 /*-----------------------------------------------------------*/
 
@@ -192,8 +190,8 @@ static void prvSetupTimerInterrupt( void )
 	ulDummy = portTIMER_REG_BASE_PTR->TC_SR;
 
 	/* Store interrupt handler function address in tick timer vector register...
-     * The ISR installed depends on whether the preemptive or cooperative
+	The ISR installed depends on whether the preemptive or cooperative
-     * scheduler is being used. */
+	scheduler is being used. */
 	#if configUSE_PREEMPTION == 1
 	{
 		extern void ( vPreemptiveTick )( void );
@@ -210,8 +208,8 @@ static void prvSetupTimerInterrupt( void )
 	AT91C_BASE_AIC->AIC_SMR[ portTIMER_AIC_CHANNEL ] = AIC_SRCTYPE_INT_LEVEL_SENSITIVE | portTICK_PRIORITY_6;
 
 	/* Enable the tick timer interrupt...
-     *
+
-     * First at timer level */
+	First at timer level */
 	portTIMER_REG_BASE_PTR->TC_IER = TC_CPCS;
 
 	/* Then at the AIC level. */
@@ -221,14 +219,14 @@ static void prvSetupTimerInterrupt( void )
 	if( (configCPU_CLOCK_HZ / (configTICK_RATE_HZ * 2) ) <= 0xFFFF )
 	{
 		/* The tick rate is fast enough for us to use the faster timer input
-         * clock (main clock / 2). */
+		clock (main clock / 2). */
 		portTIMER_REG_BASE_PTR->TC_CMR = TC_WAVE | TC_CLKS_MCK2 | TC_BURST_NONE | TC_CPCTRG;
 		portTIMER_REG_BASE_PTR->TC_RC  = configCPU_CLOCK_HZ / (configTICK_RATE_HZ * 2);
 	}
 	else
 	{
 		/* We must use a slower timer input clock (main clock / 8) because the
-         * tick rate is too slow for the faster input clock. */
+		tick rate is too slow for the faster input clock. */
 		portTIMER_REG_BASE_PTR->TC_CMR = TC_WAVE | TC_CLKS_MCK8 | TC_BURST_NONE | TC_CPCTRG;
 		portTIMER_REG_BASE_PTR->TC_RC  = configCPU_CLOCK_HZ / (configTICK_RATE_HZ * 8);
 	}
@@ -237,3 +235,4 @@ static void prvSetupTimerInterrupt( void )
 	portTIMER_REG_BASE_PTR->TC_CCR = TC_SWTRG | TC_CLKEN;
 }
 /*-----------------------------------------------------------*/
+

portable/GCC/ARM7_AT91FR40008/portISR.c

@@ -33,10 +33,10 @@
  *----------------------------------------------------------*/
 
 /*
- *  Changes from V3.2.4
+	Changes from V3.2.4
- *
+
 	+ The assembler statements are now included in a single asm block rather
- +    than each line having its own asm block.
+	  than each line having its own asm block.
 */
 
 
@@ -66,7 +66,7 @@ void vPortISRStartFirstTask( void );
 void vPortISRStartFirstTask( void )
 {
 	/* Simply start the scheduler.  This is included here as it can only be
-     * called from ARM mode. */
+	called from ARM mode. */
 	portRESTORE_CONTEXT();
 }
 /*-----------------------------------------------------------*/
@@ -82,8 +82,8 @@ void vPortISRStartFirstTask( void )
 void vPortYieldProcessor( void )
 {
 	/* Within an IRQ ISR the link register has an offset from the true return 
-     * address, but an SWI ISR does not.  Add the offset manually so the same
+	address, but an SWI ISR does not.  Add the offset manually so the same 
-     * ISR return code can be used in both cases. */
+	ISR return code can be used in both cases. */
 	asm volatile ( "ADD		LR, LR, #4" );
 
 	/* Perform the context switch.  First save the context of the current task. */
@@ -105,7 +105,7 @@ void vPortYieldProcessor( void )
 #if configUSE_PREEMPTION == 0
 
 	/* The cooperative scheduler requires a normal IRQ service routine to 
- * simply increment the system tick. */
+	simply increment the system tick. */
 	void vNonPreemptiveTick( void ) __attribute__ ((interrupt ("IRQ")));
 	void vNonPreemptiveTick( void )
 	{		
@@ -123,7 +123,7 @@ void vPortYieldProcessor( void )
 #else  /* else preemption is turned on */
 
 	/* The preemptive scheduler is defined as "naked" as the full context is
- * saved on entry as part of the context switch. */
+	saved on entry as part of the context switch. */
 	void vPreemptiveTick( void ) __attribute__((naked));
 	void vPreemptiveTick( void )
 	{
@@ -131,14 +131,14 @@ void vPortYieldProcessor( void )
 		portSAVE_CONTEXT();	
 
 		/* WARNING - Do not use local (stack) variables here.  Use globals
-         *           if you must! */
+					 if you must! */
 		static volatile uint32_t ulDummy;
 
 		/* Clear tick timer interrupt indication. */
 		ulDummy = portTIMER_REG_BASE_PTR->TC_SR;  
 
 		/* Increment the RTOS tick count, then look for the highest priority 
-         * task that is ready to run. */
+		task that is ready to run. */
 		if( xTaskIncrementTick() != pdFALSE )
 		{
 			vTaskSwitchContext();
@@ -151,7 +151,7 @@ void vPortYieldProcessor( void )
 		portRESTORE_CONTEXT();
 	}
 
-#endif /* if configUSE_PREEMPTION == 0 */
+#endif
 /*-----------------------------------------------------------*/
 
 /*
@@ -190,9 +190,9 @@ void vPortYieldProcessor( void )
 #endif /* THUMB_INTERWORK */
 
 /* The code generated by the GCC compiler uses the stack in different ways at
- * different optimisation levels.  The interrupt flags can therefore not always
+different optimisation levels.  The interrupt flags can therefore not always
- * be saved to the stack.  Instead the critical section nesting level is stored
+be saved to the stack.  Instead the critical section nesting level is stored
- * in a variable, which is then saved as part of the stack context. */
+in a variable, which is then saved as part of the stack context. */
 void vPortEnterCritical( void )
 {
 	/* Disable interrupts as per portDISABLE_INTERRUPTS(); 							*/
@@ -204,8 +204,8 @@ void vPortEnterCritical( void )
 		"LDMIA	SP!, {R0}" );				/* Pop R0.								*/
 
 	/* Now interrupts are disabled ulCriticalNesting can be accessed 
-     * directly.  Increment ulCriticalNesting to keep a count of how many times
+	directly.  Increment ulCriticalNesting to keep a count of how many times
-     * portENTER_CRITICAL() has been called. */
+	portENTER_CRITICAL() has been called. */
 	ulCriticalNesting++;
 }
 
@@ -217,7 +217,7 @@ void vPortExitCritical( void )
 		ulCriticalNesting--;
 
 		/* If the nesting level has reached zero then interrupts should be
-         * re-enabled. */
+		re-enabled. */
 		if( ulCriticalNesting == portNO_CRITICAL_NESTING )
 		{
 			/* Enable interrupts as per portEXIT_CRITICAL().				*/
@@ -230,3 +230,4 @@ void vPortExitCritical( void )
 		}
 	}
 }
+

portable/GCC/ARM7_AT91FR40008/portmacro.h

@@ -26,26 +26,26 @@
  */
 
 /*
- *  Changes from V3.2.3
+	Changes from V3.2.3
- *
+
 	+ Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1.
- +
+
- +  Changes from V3.2.4
+	Changes from V3.2.4
- +
+
 	+ Removed the use of the %0 parameter within the assembler macros and
- +    replaced them with hard coded registers.  This will ensure the
+	  replaced them with hard coded registers.  This will ensure the
- +    assembler does not select the link register as the temp register as
+	  assembler does not select the link register as the temp register as
- +    was occasionally happening previously.
+	  was occasionally happening previously.
- +
+
 	+ The assembler statements are now included in a single asm block rather
- +    than each line having its own asm block.
+	  than each line having its own asm block.
- +
+
- +  Changes from V4.5.0
+	Changes from V4.5.0
- +
+
 	+ Removed the portENTER_SWITCHING_ISR() and portEXIT_SWITCHING_ISR() macros
- +    and replaced them with portYIELD_FROM_ISR() macro.  Application code
+	  and replaced them with portYIELD_FROM_ISR() macro.  Application code
- +    should now make use of the portSAVE_CONTEXT() and portRESTORE_CONTEXT()
+	  should now make use of the portSAVE_CONTEXT() and portRESTORE_CONTEXT()
- +    macros as per the V4.5.1 demo code.
+	  macros as per the V4.5.1 demo code.
 */
 
 #ifndef PORTMACRO_H
@@ -252,3 +252,4 @@
 #endif
 
 #endif /* PORTMACRO_H */
+

portable/GCC/ARM7_AT91SAM7S/lib_AT91SAM7X256.c

@@ -1,50 +1,51 @@
-/** ---------------------------------------------------------------------------- */
+//* ----------------------------------------------------------------------------
-/**         ATMEL Microcontroller Software Support  -  ROUSSET  - */
+//*         ATMEL Microcontroller Software Support  -  ROUSSET  -
-/** ---------------------------------------------------------------------------- */
+//* ----------------------------------------------------------------------------
-/** DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
+//* DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-/** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
+//* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-/** MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
+//* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-/** DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
+//* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-/** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
+//* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-/** LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
+//* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-/** OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
+//* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-/** LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
+//* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-/** NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
+//* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-/** EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
+//* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-/** ---------------------------------------------------------------------------- */
+//* ----------------------------------------------------------------------------
-/** File Name           : lib_AT91SAM7X256.h */
+//* File Name           : lib_AT91SAM7X256.h
-/** Object              : AT91SAM7X256 inlined functions */
+//* Object              : AT91SAM7X256 inlined functions
-/** Generated           : AT91 SW Application Group  05/20/2005 (16:22:29) */
+//* Generated           : AT91 SW Application Group  05/20/2005 (16:22:29)
-/** */
+//*
-/** CVS Reference       : /lib_dbgu.h/1.1/Fri Jan 31 12:18:40 2003// */
+//* CVS Reference       : /lib_dbgu.h/1.1/Fri Jan 31 12:18:40 2003//
-/** CVS Reference       : /lib_pmc_SAM7X.h/1.1/Tue Feb  1 08:32:10 2005// */
+//* CVS Reference       : /lib_pmc_SAM7X.h/1.1/Tue Feb  1 08:32:10 2005//
-/** CVS Reference       : /lib_VREG_6085B.h/1.1/Tue Feb  1 16:20:47 2005// */
+//* CVS Reference       : /lib_VREG_6085B.h/1.1/Tue Feb  1 16:20:47 2005//
-/** CVS Reference       : /lib_rstc_6098A.h/1.1/Wed Oct  6 10:39:20 2004// */
+//* CVS Reference       : /lib_rstc_6098A.h/1.1/Wed Oct  6 10:39:20 2004//
-/** CVS Reference       : /lib_ssc.h/1.4/Fri Jan 31 12:19:20 2003// */
+//* CVS Reference       : /lib_ssc.h/1.4/Fri Jan 31 12:19:20 2003//
-/** CVS Reference       : /lib_wdtc_6080A.h/1.1/Wed Oct  6 10:38:30 2004// */
+//* CVS Reference       : /lib_wdtc_6080A.h/1.1/Wed Oct  6 10:38:30 2004//
-/** CVS Reference       : /lib_usart.h/1.5/Thu Nov 21 16:01:54 2002// */
+//* CVS Reference       : /lib_usart.h/1.5/Thu Nov 21 16:01:54 2002//
-/** CVS Reference       : /lib_spi2.h/1.1/Mon Aug 25 14:23:52 2003// */
+//* CVS Reference       : /lib_spi2.h/1.1/Mon Aug 25 14:23:52 2003//
-/** CVS Reference       : /lib_pitc_6079A.h/1.2/Tue Nov  9 14:43:56 2004// */
+//* CVS Reference       : /lib_pitc_6079A.h/1.2/Tue Nov  9 14:43:56 2004//
-/** CVS Reference       : /lib_aic_6075b.h/1.1/Fri May 20 14:01:19 2005// */
+//* CVS Reference       : /lib_aic_6075b.h/1.1/Fri May 20 14:01:19 2005//
-/** CVS Reference       : /lib_aes_6149a.h/1.1/Mon Jan 17 07:43:09 2005// */
+//* CVS Reference       : /lib_aes_6149a.h/1.1/Mon Jan 17 07:43:09 2005//
-/** CVS Reference       : /lib_twi.h/1.3/Mon Jul 19 14:27:58 2004// */
+//* CVS Reference       : /lib_twi.h/1.3/Mon Jul 19 14:27:58 2004//
-/** CVS Reference       : /lib_adc.h/1.6/Fri Oct 17 09:12:38 2003// */
+//* CVS Reference       : /lib_adc.h/1.6/Fri Oct 17 09:12:38 2003//
-/** CVS Reference       : /lib_rttc_6081A.h/1.1/Wed Oct  6 10:39:38 2004// */
+//* CVS Reference       : /lib_rttc_6081A.h/1.1/Wed Oct  6 10:39:38 2004//
-/** CVS Reference       : /lib_udp.h/1.4/Wed Feb 16 08:39:34 2005// */
+//* CVS Reference       : /lib_udp.h/1.4/Wed Feb 16 08:39:34 2005//
-/** CVS Reference       : /lib_des3_6150a.h/1.1/Mon Jan 17 09:19:19 2005// */
+//* CVS Reference       : /lib_des3_6150a.h/1.1/Mon Jan 17 09:19:19 2005//
-/** CVS Reference       : /lib_tc_1753b.h/1.1/Fri Jan 31 12:20:02 2003// */
+//* CVS Reference       : /lib_tc_1753b.h/1.1/Fri Jan 31 12:20:02 2003//
-/** CVS Reference       : /lib_MC_SAM7X.h/1.1/Thu Mar 25 15:19:14 2004// */
+//* CVS Reference       : /lib_MC_SAM7X.h/1.1/Thu Mar 25 15:19:14 2004//
-/** CVS Reference       : /lib_pio.h/1.3/Fri Jan 31 12:18:56 2003// */
+//* CVS Reference       : /lib_pio.h/1.3/Fri Jan 31 12:18:56 2003//
-/** CVS Reference       : /lib_can_AT91.h/1.4/Fri Oct 17 09:12:50 2003// */
+//* CVS Reference       : /lib_can_AT91.h/1.4/Fri Oct 17 09:12:50 2003//
-/** CVS Reference       : /lib_PWM_SAM.h/1.3/Thu Jan 22 10:10:50 2004// */
+//* CVS Reference       : /lib_PWM_SAM.h/1.3/Thu Jan 22 10:10:50 2004//
-/** CVS Reference       : /lib_pdc.h/1.2/Tue Jul  2 13:29:40 2002// */
+//* CVS Reference       : /lib_pdc.h/1.2/Tue Jul  2 13:29:40 2002//
-/** ---------------------------------------------------------------------------- */
+//* ----------------------------------------------------------------------------
 
 
 #include "AT91SAM7X256.h"
 
 
-/**---------------------------------------------------------------------------- */
+//*----------------------------------------------------------------------------
-/** \fn    AT91F_AIC_ConfigureIt */
+//* \fn    AT91F_AIC_ConfigureIt
-/** \brief Interrupt Handler Initialization */
+//* \brief Interrupt Handler Initialization
-/**---------------------------------------------------------------------------- */
+//*----------------------------------------------------------------------------
+

portable/GCC/ARM7_AT91SAM7S/port.c

@@ -82,24 +82,22 @@ extern void vPortISRStartFirstTask( void );
  *
  * See header file for description. 
  */
-StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
-                                     TaskFunction_t pxCode,
-                                     void * pvParameters )
 {
 StackType_t *pxOriginalTOS;
 
 	pxOriginalTOS = pxTopOfStack;
 
 	/* To ensure asserts in tasks.c don't fail, although in this case the assert
-     * is not really required. */
+	is not really required. */
 	pxTopOfStack--;
 
 	/* Setup the initial stack of the task.  The stack is set exactly as 
-     * expected by the portRESTORE_CONTEXT() macro. */
+	expected by the portRESTORE_CONTEXT() macro. */
 
 	/* First on the stack is the return address - which in this case is the
-     * start of the task.  The offset is added to make the return address appear
+	start of the task.  The offset is added to make the return address appear
-     * as it would within an IRQ ISR. */
+	as it would within an IRQ ISR. */
 	*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;		
 	pxTopOfStack--;
 
@@ -133,12 +131,12 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 	pxTopOfStack--;	
 
 	/* When the task starts is will expect to find the function parameter in
-     * R0. */
+	R0. */
 	*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
 	pxTopOfStack--;
 
 	/* The last thing onto the stack is the status register, which is set for
-     * system mode, with interrupts enabled. */
+	system mode, with interrupts enabled. */
 	*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
 
 	#ifdef THUMB_INTERWORK
@@ -151,9 +149,9 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 	pxTopOfStack--;
 
 	/* Some optimisation levels use the stack differently to others.  This 
-     * means the interrupt flags cannot always be stored on the stack and will
+	means the interrupt flags cannot always be stored on the stack and will
-     * instead be stored in a variable, which is then saved as part of the
+	instead be stored in a variable, which is then saved as part of the
-     * tasks context. */
+	tasks context. */
 	*pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
 
 	return pxTopOfStack;
@@ -163,7 +161,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 BaseType_t xPortStartScheduler( void )
 {
 	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-     * here already. */
+	here already. */
 	prvSetupTimerInterrupt();
 
 	/* Start the first task. */
@@ -177,7 +175,7 @@ BaseType_t xPortStartScheduler( void )
 void vPortEndScheduler( void )
 {
 	/* It is unlikely that the ARM port will require this function as there
-     * is nothing to return to.  */
+	is nothing to return to.  */
 }
 /*-----------------------------------------------------------*/
 
@@ -189,20 +187,27 @@ static void prvSetupTimerInterrupt( void )
 AT91PS_PITC pxPIT = AT91C_BASE_PITC;
 
 	/* Setup the AIC for PIT interrupts.  The interrupt routine chosen depends
-     * on whether the preemptive or cooperative scheduler is being used. */
+	on whether the preemptive or cooperative scheduler is being used. */
 	#if configUSE_PREEMPTION == 0
+
 		extern void ( vNonPreemptiveTick ) ( void );
 		AT91F_AIC_ConfigureIt( AT91C_ID_SYS, AT91C_AIC_PRIOR_HIGHEST, portINT_LEVEL_SENSITIVE, ( void (*)(void) ) vNonPreemptiveTick );
+
 	#else
+		
 		extern void ( vPreemptiveTick )( void );
 		AT91F_AIC_ConfigureIt( AT91C_ID_SYS, AT91C_AIC_PRIOR_HIGHEST, portINT_LEVEL_SENSITIVE, ( void (*)(void) ) vPreemptiveTick );
+
 	#endif
 
 	/* Configure the PIT period. */
 	pxPIT->PITC_PIMR = portPIT_ENABLE | portPIT_INT_ENABLE | portPIT_COUNTER_VALUE;
 
 	/* Enable the interrupt.  Global interrupts are disables at this point so 
-     * this is safe. */
+	this is safe. */
     AT91C_BASE_AIC->AIC_IECR = 0x1 << AT91C_ID_SYS;
 }
 /*-----------------------------------------------------------*/
+
+
+

portable/GCC/ARM7_AT91SAM7S/portISR.c

@@ -33,10 +33,10 @@
  *----------------------------------------------------------*/
 
 /*
- *  Changes from V3.2.4
+	Changes from V3.2.4
- *
+
 	+ The assembler statements are now included in a single asm block rather
- +    than each line having its own asm block.
+	  than each line having its own asm block.
 */
 
 /* Scheduler includes. */
@@ -68,7 +68,7 @@ void vPortISRStartFirstTask( void );
 void vPortISRStartFirstTask( void )
 {
 	/* Simply start the scheduler.  This is included here as it can only be
-     * called from ARM mode. */
+	called from ARM mode. */
 	portRESTORE_CONTEXT();
 }
 /*-----------------------------------------------------------*/
@@ -84,8 +84,8 @@ void vPortISRStartFirstTask( void )
 void vPortYieldProcessor( void )
 {
 	/* Within an IRQ ISR the link register has an offset from the true return
-     * address, but an SWI ISR does not.  Add the offset manually so the same
+	address, but an SWI ISR does not.  Add the offset manually so the same
-     * ISR return code can be used in both cases. */
+	ISR return code can be used in both cases. */
 	__asm volatile ( "ADD		LR, LR, #4" );
 
 	/* Perform the context switch.  First save the context of the current task. */
@@ -107,15 +107,15 @@ void vPortYieldProcessor( void )
 #if configUSE_PREEMPTION == 0
 
 	/* The cooperative scheduler requires a normal IRQ service routine to
- * simply increment the system tick. */
+	simply increment the system tick. */
 	void vNonPreemptiveTick( void ) __attribute__ ((interrupt ("IRQ")));
 	void vNonPreemptiveTick( void )
 	{
 		uint32_t ulDummy;
 
 		/* Increment the tick count - which may wake some tasks but as the
-         * preemptive scheduler is not being used any woken task is not given
+		preemptive scheduler is not being used any woken task is not given
-         * processor time no matter what its priority. */
+		processor time no matter what its priority. */
 		xTaskIncrementTick();
 
 		/* Clear the PIT interrupt. */
@@ -125,10 +125,10 @@ void vPortYieldProcessor( void )
 		AT91C_BASE_AIC->AIC_EOICR = ulDummy;
 	}
 
-#else /* if configUSE_PREEMPTION == 0 */
+#else
 
 	/* The preemptive scheduler is defined as "naked" as the full context is
- * saved on entry as part of the context switch. */
+	saved on entry as part of the context switch. */
 	void vPreemptiveTick( void ) __attribute__((naked));
 	void vPreemptiveTick( void )
 	{
@@ -148,7 +148,7 @@ void vPortYieldProcessor( void )
 		portRESTORE_CONTEXT();
 	}
 
-#endif /* if configUSE_PREEMPTION == 0 */
+#endif
 /*-----------------------------------------------------------*/
 
 /*
@@ -184,9 +184,9 @@ void vPortEnableInterruptsFromThumb( void )
 
 
 /* The code generated by the GCC compiler uses the stack in different ways at
- * different optimisation levels.  The interrupt flags can therefore not always
+different optimisation levels.  The interrupt flags can therefore not always
- * be saved to the stack.  Instead the critical section nesting level is stored
+be saved to the stack.  Instead the critical section nesting level is stored
- * in a variable, which is then saved as part of the stack context. */
+in a variable, which is then saved as part of the stack context. */
 void vPortEnterCritical( void )
 {
 	/* Disable interrupts as per portDISABLE_INTERRUPTS(); 							*/
@@ -198,8 +198,8 @@ void vPortEnterCritical( void )
 		"LDMIA	SP!, {R0}" );				/* Pop R0.								*/
 
 	/* Now interrupts are disabled ulCriticalNesting can be accessed
-     * directly.  Increment ulCriticalNesting to keep a count of how many times
+	directly.  Increment ulCriticalNesting to keep a count of how many times
-     * portENTER_CRITICAL() has been called. */
+	portENTER_CRITICAL() has been called. */
 	ulCriticalNesting++;
 }
 
@@ -211,7 +211,7 @@ void vPortExitCritical( void )
 		ulCriticalNesting--;
 
 		/* If the nesting level has reached zero then interrupts should be
-         * re-enabled. */
+		re-enabled. */
 		if( ulCriticalNesting == portNO_CRITICAL_NESTING )
 		{
 			/* Enable interrupts as per portEXIT_CRITICAL().					*/
@@ -224,3 +224,4 @@ void vPortExitCritical( void )
 		}
 	}
 }
+

portable/GCC/ARM7_AT91SAM7S/portmacro.h

@@ -26,26 +26,26 @@
  */
 
 /*
- *  Changes from V3.2.3
+	Changes from V3.2.3
- *
+
 	+ Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1.
- +
+
- +  Changes from V3.2.4
+	Changes from V3.2.4
- +
+
 	+ Removed the use of the %0 parameter within the assembler macros and
- +    replaced them with hard coded registers.  This will ensure the
+	  replaced them with hard coded registers.  This will ensure the
- +    assembler does not select the link register as the temp register as
+	  assembler does not select the link register as the temp register as
- +    was occasionally happening previously.
+	  was occasionally happening previously.
- +
+
 	+ The assembler statements are now included in a single asm block rather
- +    than each line having its own asm block.
+	  than each line having its own asm block.
- +
+
- +  Changes from V4.5.0
+	Changes from V4.5.0
- +
+
 	+ Removed the portENTER_SWITCHING_ISR() and portEXIT_SWITCHING_ISR() macros
- +    and replaced them with portYIELD_FROM_ISR() macro.  Application code
+	  and replaced them with portYIELD_FROM_ISR() macro.  Application code
- +    should now make use of the portSAVE_CONTEXT() and portRESTORE_CONTEXT()
+	  should now make use of the portSAVE_CONTEXT() and portRESTORE_CONTEXT()
- +    macros as per the V4.5.1 demo code.
+	  macros as per the V4.5.1 demo code.
 */
 
 #ifndef PORTMACRO_H
@@ -246,3 +246,4 @@
 #endif
 
 #endif /* PORTMACRO_H */
+

portable/GCC/ARM7_LPC2000/port.c

@@ -78,24 +78,22 @@ extern void vPortISRStartFirstTask( void );
  *
  * See header file for description. 
  */
-StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
-                                     TaskFunction_t pxCode,
-                                     void * pvParameters )
 {
 StackType_t *pxOriginalTOS;
 
 	pxOriginalTOS = pxTopOfStack;
 
 	/* To ensure asserts in tasks.c don't fail, although in this case the assert
-     * is not really required. */
+	is not really required. */
 	pxTopOfStack--;
 
 	/* Setup the initial stack of the task.  The stack is set exactly as 
-     * expected by the portRESTORE_CONTEXT() macro. */
+	expected by the portRESTORE_CONTEXT() macro. */
 
 	/* First on the stack is the return address - which in this case is the
-     * start of the task.  The offset is added to make the return address appear
+	start of the task.  The offset is added to make the return address appear
-     * as it would within an IRQ ISR. */
+	as it would within an IRQ ISR. */
 	*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;		
 	pxTopOfStack--;
 
@@ -129,12 +127,12 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 	pxTopOfStack--;	
 
 	/* When the task starts is will expect to find the function parameter in
-     * R0. */
+	R0. */
 	*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
 	pxTopOfStack--;
 
 	/* The last thing onto the stack is the status register, which is set for
-     * system mode, with interrupts enabled. */
+	system mode, with interrupts enabled. */
 	*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
 
 	if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00 )
@@ -146,9 +144,9 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 	pxTopOfStack--;
 
 	/* Some optimisation levels use the stack differently to others.  This 
-     * means the interrupt flags cannot always be stored on the stack and will
+	means the interrupt flags cannot always be stored on the stack and will
-     * instead be stored in a variable, which is then saved as part of the
+	instead be stored in a variable, which is then saved as part of the
-     * tasks context. */
+	tasks context. */
 	*pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
 
 	return pxTopOfStack;
@@ -158,7 +156,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 BaseType_t xPortStartScheduler( void )
 {
 	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-     * here already. */
+	here already. */
 	prvSetupTimerInterrupt();
 
 	/* Start the first task. */
@@ -172,7 +170,7 @@ BaseType_t xPortStartScheduler( void )
 void vPortEndScheduler( void )
 {
 	/* It is unlikely that the ARM port will require this function as there
-     * is nothing to return to.  */
+	is nothing to return to.  */
 }
 /*-----------------------------------------------------------*/
 
@@ -182,18 +180,17 @@ void vPortEndScheduler( void )
 static void prvSetupTimerInterrupt( void )
 {
 uint32_t ulCompareMatch;
-
 extern void ( vTickISR )( void );
 
 	/* A 1ms tick does not require the use of the timer prescale.  This is
-     * defaulted to zero but can be used if necessary. */
+	defaulted to zero but can be used if necessary. */
 	T0_PR = portPRESCALE_VALUE;
 
 	/* Calculate the match value required for our wanted tick rate. */
 	ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
 
 	/* Protect against divide by zero.  Using an if() statement still results
-     * in a warning - hence the #if. */
+	in a warning - hence the #if. */
 	#if portPRESCALE_VALUE != 0
 	{
 		ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
@@ -209,13 +206,16 @@ static void prvSetupTimerInterrupt( void )
 	VICIntEnable |= portTIMER_VIC_CHANNEL_BIT;
 	
 	/* The ISR installed depends on whether the preemptive or cooperative
-     * scheduler is being used. */
+	scheduler is being used. */
 
 	VICVectAddr0 = ( int32_t ) vTickISR;
 	VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE;
 
 	/* Start the timer - interrupts are disabled when this function is called
-     * so it is okay to do this here. */
+	so it is okay to do this here. */
 	T0_TCR = portENABLE_TIMER;
 }
 /*-----------------------------------------------------------*/
+
+
+

portable/GCC/ARM7_LPC2000/portISR.c

@@ -33,21 +33,21 @@
  *----------------------------------------------------------*/
 
 /*
- *  Changes from V2.5.2
+	Changes from V2.5.2
- *
+
 	+ The critical section management functions have been changed.  These no
- +    longer modify the stack and are safe to use at all optimisation levels.
+	  longer modify the stack and are safe to use at all optimisation levels.
- +    The functions are now also the same for both ARM and THUMB modes.
+	  The functions are now also the same for both ARM and THUMB modes.
- +
+
- +  Changes from V2.6.0
+	Changes from V2.6.0
- +
+
 	+ Removed the 'static' from the definition of vNonPreemptiveTick() to
- +    allow the demo to link when using the cooperative scheduler.
+	  allow the demo to link when using the cooperative scheduler.
- +
+
- +  Changes from V3.2.4
+	Changes from V3.2.4
- +
+
 	+ The assembler statements are now included in a single asm block rather
- +    than each line having its own asm block.
+	  than each line having its own asm block.
 */
 
 
@@ -77,7 +77,7 @@ void vPortISRStartFirstTask( void );
 void vPortISRStartFirstTask( void )
 {
 	/* Simply start the scheduler.  This is included here as it can only be
-     * called from ARM mode. */
+	called from ARM mode. */
 	portRESTORE_CONTEXT();
 }
 /*-----------------------------------------------------------*/
@@ -93,8 +93,8 @@ void vPortISRStartFirstTask( void )
 void vPortYieldProcessor( void )
 {
 	/* Within an IRQ ISR the link register has an offset from the true return
-     * address, but an SWI ISR does not.  Add the offset manually so the same
+	address, but an SWI ISR does not.  Add the offset manually so the same
-     * ISR return code can be used in both cases. */
+	ISR return code can be used in both cases. */
 	__asm volatile ( "ADD		LR, LR, #4" );
 
 	/* Perform the context switch.  First save the context of the current task. */
@@ -118,7 +118,7 @@ void vTickISR( void )
 	portSAVE_CONTEXT();
 
 	/* Increment the RTOS tick count, then look for the highest priority
-     * task that is ready to run. */
+	task that is ready to run. */
 	__asm volatile
 	(
 		"	bl xTaskIncrementTick	\t\n" \
@@ -173,9 +173,9 @@ void vTickISR( void )
 #endif /* THUMB_INTERWORK */
 
 /* The code generated by the GCC compiler uses the stack in different ways at
- * different optimisation levels.  The interrupt flags can therefore not always
+different optimisation levels.  The interrupt flags can therefore not always
- * be saved to the stack.  Instead the critical section nesting level is stored
+be saved to the stack.  Instead the critical section nesting level is stored
- * in a variable, which is then saved as part of the stack context. */
+in a variable, which is then saved as part of the stack context. */
 void vPortEnterCritical( void )
 {
 	/* Disable interrupts as per portDISABLE_INTERRUPTS(); 							*/
@@ -187,8 +187,8 @@ void vPortEnterCritical( void )
 		"LDMIA	SP!, {R0}" );				/* Pop R0.								*/
 
 	/* Now interrupts are disabled ulCriticalNesting can be accessed
-     * directly.  Increment ulCriticalNesting to keep a count of how many times
+	directly.  Increment ulCriticalNesting to keep a count of how many times
-     * portENTER_CRITICAL() has been called. */
+	portENTER_CRITICAL() has been called. */
 	ulCriticalNesting++;
 }
 
@@ -200,7 +200,7 @@ void vPortExitCritical( void )
 		ulCriticalNesting--;
 
 		/* If the nesting level has reached zero then interrupts should be
-         * re-enabled. */
+		re-enabled. */
 		if( ulCriticalNesting == portNO_CRITICAL_NESTING )
 		{
 			/* Enable interrupts as per portEXIT_CRITICAL().					*/

portable/GCC/ARM7_LPC2000/portmacro.h

@@ -223,3 +223,4 @@
 #endif
 
 #endif /* PORTMACRO_H */
+

portable/GCC/ARM7_LPC23xx/port.c

@@ -78,24 +78,22 @@ extern void vPortISRStartFirstTask( void );
  *
  * See header file for description. 
  */
-StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
-                                     TaskFunction_t pxCode,
-                                     void * pvParameters )
 {
 StackType_t *pxOriginalTOS;
 
 	pxOriginalTOS = pxTopOfStack;
 	
 	/* To ensure asserts in tasks.c don't fail, although in this case the assert
-     * is not really required. */
+	is not really required. */
 	pxTopOfStack--;
 
 	/* Setup the initial stack of the task.  The stack is set exactly as 
-     * expected by the portRESTORE_CONTEXT() macro. */
+	expected by the portRESTORE_CONTEXT() macro. */
 
 	/* First on the stack is the return address - which in this case is the
-     * start of the task.  The offset is added to make the return address appear
+	start of the task.  The offset is added to make the return address appear
-     * as it would within an IRQ ISR. */
+	as it would within an IRQ ISR. */
 	*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;		
 	pxTopOfStack--;
 
@@ -129,12 +127,12 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 	pxTopOfStack--;	
 
 	/* When the task starts is will expect to find the function parameter in
-     * R0. */
+	R0. */
 	*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
 	pxTopOfStack--;
 
 	/* The last thing onto the stack is the status register, which is set for
-     * system mode, with interrupts enabled. */
+	system mode, with interrupts enabled. */
 	*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
 
 	if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00 )
@@ -146,9 +144,9 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 	pxTopOfStack--;
 
 	/* Some optimisation levels use the stack differently to others.  This 
-     * means the interrupt flags cannot always be stored on the stack and will
+	means the interrupt flags cannot always be stored on the stack and will
-     * instead be stored in a variable, which is then saved as part of the
+	instead be stored in a variable, which is then saved as part of the
-     * tasks context. */
+	tasks context. */
 	*pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
 
 	return pxTopOfStack;
@@ -158,7 +156,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 BaseType_t xPortStartScheduler( void )
 {
 	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-     * here already. */
+	here already. */
 	prvSetupTimerInterrupt();
 
 	/* Start the first task. */
@@ -172,7 +170,7 @@ BaseType_t xPortStartScheduler( void )
 void vPortEndScheduler( void )
 {
 	/* It is unlikely that the ARM port will require this function as there
-     * is nothing to return to.  */
+	is nothing to return to.  */
 }
 /*-----------------------------------------------------------*/
 
@@ -188,14 +186,14 @@ static void prvSetupTimerInterrupt( void )
 	T0CTCR = 0;         /* Timer mode               */
 	
 	/* A 1ms tick does not require the use of the timer prescale.  This is
-     * defaulted to zero but can be used if necessary. */
+	defaulted to zero but can be used if necessary. */
 	T0PR = portPRESCALE_VALUE;
 
 	/* Calculate the match value required for our wanted tick rate. */
 	ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
 
 	/* Protect against divide by zero.  Using an if() statement still results
-     * in a warning - hence the #if. */
+	in a warning - hence the #if. */
 	#if portPRESCALE_VALUE != 0
 	{
 		ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
@@ -210,7 +208,7 @@ static void prvSetupTimerInterrupt( void )
 	VICIntEnable = 0x00000010;
 	
 	/* The ISR installed depends on whether the preemptive or cooperative
-     * scheduler is being used. */
+	scheduler is being used. */
 	#if configUSE_PREEMPTION == 1
 	{
 		extern void ( vPreemptiveTick )( void );
@@ -226,7 +224,10 @@ static void prvSetupTimerInterrupt( void )
 	VICVectCntl4 = 1;
 
 	/* Start the timer - interrupts are disabled when this function is called
-     * so it is okay to do this here. */
+	so it is okay to do this here. */
 	T0TCR = portENABLE_TIMER;
 }
 /*-----------------------------------------------------------*/
+
+
+

portable/GCC/ARM7_LPC23xx/portISR.c

@@ -59,7 +59,7 @@ void vPortISRStartFirstTask( void );
 void vPortISRStartFirstTask( void )
 {
 	/* Simply start the scheduler.  This is included here as it can only be
-     * called from ARM mode. */
+	called from ARM mode. */
 	portRESTORE_CONTEXT();
 }
 /*-----------------------------------------------------------*/
@@ -75,8 +75,8 @@ void vPortISRStartFirstTask( void )
 void vPortYieldProcessor( void )
 {
 	/* Within an IRQ ISR the link register has an offset from the true return 
-     * address, but an SWI ISR does not.  Add the offset manually so the same
+	address, but an SWI ISR does not.  Add the offset manually so the same 
-     * ISR return code can be used in both cases. */
+	ISR return code can be used in both cases. */
 	__asm volatile ( "ADD		LR, LR, #4" );
 
 	/* Perform the context switch.  First save the context of the current task. */
@@ -99,7 +99,7 @@ void vPortYieldProcessor( void )
 #if configUSE_PREEMPTION == 0
 
 	/* The cooperative scheduler requires a normal IRQ service routine to 
- * simply increment the system tick. */
+	simply increment the system tick. */
 	void vNonPreemptiveTick( void ) __attribute__ ((interrupt ("IRQ")));
 	void vNonPreemptiveTick( void )
 	{	
@@ -108,10 +108,10 @@ void vPortYieldProcessor( void )
 		VICVectAddr = portCLEAR_VIC_INTERRUPT;
 	}
 
-#else /* if configUSE_PREEMPTION == 0 */
+#else
 
 	/* The preemptive scheduler is defined as "naked" as the full context is
- * saved on entry as part of the context switch. */
+	saved on entry as part of the context switch. */
 	void vPreemptiveTick( void ) __attribute__((naked));
 	void vPreemptiveTick( void )
 	{
@@ -119,7 +119,7 @@ void vPortYieldProcessor( void )
 		portSAVE_CONTEXT();	
 
 		/* Increment the RTOS tick count, then look for the highest priority 
-         * task that is ready to run. */
+		task that is ready to run. */
 		__asm volatile
 		(
 			"	bl xTaskIncrementTick	\t\n" \
@@ -137,7 +137,7 @@ void vPortYieldProcessor( void )
 		portRESTORE_CONTEXT();
 	}
 
-#endif /* if configUSE_PREEMPTION == 0 */
+#endif
 /*-----------------------------------------------------------*/
 
 /*
@@ -176,9 +176,9 @@ void vPortYieldProcessor( void )
 #endif /* THUMB_INTERWORK */
 
 /* The code generated by the GCC compiler uses the stack in different ways at
- * different optimisation levels.  The interrupt flags can therefore not always
+different optimisation levels.  The interrupt flags can therefore not always
- * be saved to the stack.  Instead the critical section nesting level is stored
+be saved to the stack.  Instead the critical section nesting level is stored
- * in a variable, which is then saved as part of the stack context. */
+in a variable, which is then saved as part of the stack context. */
 void vPortEnterCritical( void )
 {
 	/* Disable interrupts as per portDISABLE_INTERRUPTS(); 							*/
@@ -190,8 +190,8 @@ void vPortEnterCritical( void )
 		"LDMIA	SP!, {R0}" );				/* Pop R0.								*/
 
 	/* Now interrupts are disabled ulCriticalNesting can be accessed 
-     * directly.  Increment ulCriticalNesting to keep a count of how many times
+	directly.  Increment ulCriticalNesting to keep a count of how many times
-     * portENTER_CRITICAL() has been called. */
+	portENTER_CRITICAL() has been called. */
 	ulCriticalNesting++;
 }
 
@@ -203,7 +203,7 @@ void vPortExitCritical( void )
 		ulCriticalNesting--;
 
 		/* If the nesting level has reached zero then interrupts should be
-         * re-enabled. */
+		re-enabled. */
 		if( ulCriticalNesting == portNO_CRITICAL_NESTING )
 		{
 			/* Enable interrupts as per portEXIT_CRITICAL().					*/

portable/GCC/ARM7_LPC23xx/portmacro.h

@@ -26,26 +26,26 @@
  */
 
 /*
- *  Changes from V3.2.3
+	Changes from V3.2.3
- *
+
 	+ Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1.
- +
+
- +  Changes from V3.2.4
+	Changes from V3.2.4
- +
+
 	+ Removed the use of the %0 parameter within the assembler macros and
- +    replaced them with hard coded registers.  This will ensure the
+	  replaced them with hard coded registers.  This will ensure the
- +    assembler does not select the link register as the temp register as
+	  assembler does not select the link register as the temp register as
- +    was occasionally happening previously.
+	  was occasionally happening previously.
- +
+
 	+ The assembler statements are now included in a single asm block rather
- +    than each line having its own asm block.
+	  than each line having its own asm block.
- +
+
- +  Changes from V4.5.0
+	Changes from V4.5.0
- +
+
 	+ Removed the portENTER_SWITCHING_ISR() and portEXIT_SWITCHING_ISR() macros
- +    and replaced them with portYIELD_FROM_ISR() macro.  Application code
+	  and replaced them with portYIELD_FROM_ISR() macro.  Application code
- +    should now make use of the portSAVE_CONTEXT() and portRESTORE_CONTEXT()
+	  should now make use of the portSAVE_CONTEXT() and portRESTORE_CONTEXT()
- +    macros as per the V4.5.1 demo code.
+	  macros as per the V4.5.1 demo code.
 */
 
 #ifndef PORTMACRO_H
@@ -246,3 +246,4 @@
 #endif
 
 #endif /* PORTMACRO_H */
+

portable/GCC/ARM_CA53_64_BIT/port.c

@@ -33,23 +33,23 @@
 #include "task.h"
 
 #ifndef configINTERRUPT_CONTROLLER_BASE_ADDRESS
-    #error configINTERRUPT_CONTROLLER_BASE_ADDRESS must be defined.  See http: /*www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html */
+	#error configINTERRUPT_CONTROLLER_BASE_ADDRESS must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif
 
 #ifndef configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET
-    #error configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET must be defined.  See http: /*www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html */
+	#error configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif
 
 #ifndef configUNIQUE_INTERRUPT_PRIORITIES
-    #error configUNIQUE_INTERRUPT_PRIORITIES must be defined.  See http: /*www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html */
+	#error configUNIQUE_INTERRUPT_PRIORITIES must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif
 
 #ifndef configSETUP_TICK_INTERRUPT
-    #error configSETUP_TICK_INTERRUPT() must be defined.  See http: /*www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html */
+	#error configSETUP_TICK_INTERRUPT() must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif /* configSETUP_TICK_INTERRUPT */
 
 #ifndef configMAX_API_CALL_INTERRUPT_PRIORITY
-    #error configMAX_API_CALL_INTERRUPT_PRIORITY must be defined.  See http: /*www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html */
+	#error configMAX_API_CALL_INTERRUPT_PRIORITY must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif
 
 #if configMAX_API_CALL_INTERRUPT_PRIORITY == 0
@@ -73,24 +73,24 @@
 #endif
 
 /* Some vendor specific files default configCLEAR_TICK_INTERRUPT() in
- * portmacro.h. */
+portmacro.h. */
 #ifndef configCLEAR_TICK_INTERRUPT
 	#define configCLEAR_TICK_INTERRUPT()
 #endif
 
 /* A critical section is exited when the critical section nesting count reaches
- * this value. */
+this value. */
 #define portNO_CRITICAL_NESTING			( ( size_t ) 0 )
 
 /* In all GICs 255 can be written to the priority mask register to unmask all
- * (but the lowest) interrupt priority. */
+(but the lowest) interrupt priority. */
 #define portUNMASK_VALUE				( 0xFFUL )
 
 /* Tasks are not created with a floating point context, but can be given a
- * floating point context after they have been created.  A variable is stored as
+floating point context after they have been created.  A variable is stored as
- * part of the tasks context that holds portNO_FLOATING_POINT_CONTEXT if the task
+part of the tasks context that holds portNO_FLOATING_POINT_CONTEXT if the task
- * does not have an FPU context, or any other value if the task does have an FPU
+does not have an FPU context, or any other value if the task does have an FPU
- * context. */
+context. */
 #define portNO_FLOATING_POINT_CONTEXT	( ( StackType_t ) 0 )
 
 /* Constants required to setup the initial task context. */
@@ -108,7 +108,7 @@
 
 
 /* Used by portASSERT_IF_INTERRUPT_PRIORITY_INVALID() when ensuring the binary
- * point is zero. */
+point is zero. */
 #define portBINARY_POINT_BITS			( ( uint8_t ) 0x03 )
 
 /* Masks all bits in the APSR other than the mode bits. */
@@ -143,21 +143,21 @@ extern void vPortRestoreTaskContext( void );
 /*-----------------------------------------------------------*/
 
 /* A variable is used to keep track of the critical section nesting.  This
- * variable has to be stored as part of the task context and must be initialised to
+variable has to be stored as part of the task context and must be initialised to
- * a non zero value to ensure interrupts don't inadvertently become unmasked before
+a non zero value to ensure interrupts don't inadvertently become unmasked before
- * the scheduler starts.  As it is stored as part of the task context it will
+the scheduler starts.  As it is stored as part of the task context it will
- * automatically be set to 0 when the first task is started. */
+automatically be set to 0 when the first task is started. */
 volatile uint64_t ullCriticalNesting = 9999ULL;
 
 /* Saved as part of the task context.  If ullPortTaskHasFPUContext is non-zero
- * then floating point context must be saved and restored for the task. */
+then floating point context must be saved and restored for the task. */
 uint64_t ullPortTaskHasFPUContext = pdFALSE;
 
 /* Set to 1 to pend a context switch from an ISR. */
 uint64_t ullPortYieldRequired = pdFALSE;
 
 /* Counts the interrupt nesting depth.  A context switch is only performed if
- * if the nesting depth is 0. */
+if the nesting depth is 0. */
 uint64_t ullPortInterruptNesting = 0;
 
 /* Used in the ASM code. */
@@ -171,12 +171,10 @@ __attribute__( ( used ) ) const uint64_t ullMaxAPIPriorityMask = ( configMAX_API
 /*
  * See header file for description.
  */
-StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
-                                     TaskFunction_t pxCode,
-                                     void * pvParameters )
 {
 	/* Setup the initial stack of the task.  The stack is set exactly as
-     * expected by the portRESTORE_CONTEXT() macro. */
+	expected by the portRESTORE_CONTEXT() macro. */
 
 	/* First all the general purpose registers. */
 	pxTopOfStack--;
@@ -252,13 +250,13 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 	pxTopOfStack--;
 
 	/* The task will start with a critical nesting count of 0 as interrupts are
-     * enabled. */
+	enabled. */
 	*pxTopOfStack = portNO_CRITICAL_NESTING;
 	pxTopOfStack--;
 
 	/* The task will start without a floating point context.  A task that uses
-     * the floating point hardware must call vPortTaskUsesFPU() before executing
+	the floating point hardware must call vPortTaskUsesFPU() before executing
-     * any floating point instructions. */
+	any floating point instructions. */
 	*pxTopOfStack = portNO_FLOATING_POINT_CONTEXT;
 
 	return pxTopOfStack;
@@ -276,12 +274,12 @@ BaseType_t xPortStartScheduler( void )
 		volatile uint8_t ucMaxPriorityValue;
 
 		/* Determine how many priority bits are implemented in the GIC.
-             *
+
-             * Save the interrupt priority value that is about to be clobbered. */
+		Save the interrupt priority value that is about to be clobbered. */
 		ulOriginalPriority = *pucFirstUserPriorityRegister;
 
 		/* Determine the number of priority bits available.  First write to
-             * all possible bits. */
+		all possible bits. */
 		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
 
 		/* Read the value back to see how many bits stuck. */
@@ -294,13 +292,13 @@ BaseType_t xPortStartScheduler( void )
 		}
 
 		/* Sanity check configUNIQUE_INTERRUPT_PRIORITIES matches the read
-             * value. */
+		value. */
 
 		configASSERT( ucMaxPriorityValue >= portLOWEST_INTERRUPT_PRIORITY );
 
 
 		/* Restore the clobbered interrupt priority register to its original
-             * value. */
+		value. */
 		*pucFirstUserPriorityRegister = ulOriginalPriority;
 	}
 	#endif /* conifgASSERT_DEFINED */
@@ -313,25 +311,23 @@ BaseType_t xPortStartScheduler( void )
 #if defined( GUEST )
 	#warning Building for execution as a guest under XEN. THIS IS NOT A FULLY TESTED PATH.
 	configASSERT( ulAPSR == portEL1 );
-
 	if( ulAPSR == portEL1 )
 #else
 	configASSERT( ulAPSR == portEL3 );
-
 	if( ulAPSR == portEL3 )
 #endif
 	{
 		/* Only continue if the binary point value is set to its lowest possible
-         * setting.  See the comments in vPortValidateInterruptPriority() below for
+		setting.  See the comments in vPortValidateInterruptPriority() below for
-         * more information. */
+		more information. */
 		configASSERT( ( portICCBPR_BINARY_POINT_REGISTER & portBINARY_POINT_BITS ) <= portMAX_BINARY_POINT_VALUE );
 
 		if( ( portICCBPR_BINARY_POINT_REGISTER & portBINARY_POINT_BITS ) <= portMAX_BINARY_POINT_VALUE )
 		{
 			/* Interrupts are turned off in the CPU itself to ensure a tick does
-             * not execute	while the scheduler is being started.  Interrupts are
+			not execute	while the scheduler is being started.  Interrupts are
-             * automatically turned back on in the CPU when the first task starts
+			automatically turned back on in the CPU when the first task starts
-             * executing. */
+			executing. */
 			portDISABLE_INTERRUPTS();
 
 			/* Start the timer that generates the tick ISR. */
@@ -349,7 +345,7 @@ BaseType_t xPortStartScheduler( void )
 void vPortEndScheduler( void )
 {
 	/* Not implemented in ports where there is nothing to return to.
-     * Artificially force an assert. */
+	Artificially force an assert. */
 	configASSERT( ullCriticalNesting == 1000ULL );
 }
 /*-----------------------------------------------------------*/
@@ -360,15 +356,15 @@ void vPortEnterCritical( void )
 	uxPortSetInterruptMask();
 
 	/* Now interrupts are disabled ullCriticalNesting can be accessed
-     * directly.  Increment ullCriticalNesting to keep a count of how many times
+	directly.  Increment ullCriticalNesting to keep a count of how many times
-     * portENTER_CRITICAL() has been called. */
+	portENTER_CRITICAL() has been called. */
 	ullCriticalNesting++;
 
 	/* This is not the interrupt safe version of the enter critical function so
-     * assert() if it is being called from an interrupt context.  Only API
+	assert() if it is being called from an interrupt context.  Only API
-     * functions that end in "FromISR" can be used in an interrupt.  Only assert if
+	functions that end in "FromISR" can be used in an interrupt.  Only assert if
-     * the critical nesting count is 1 to protect against recursive calls if the
+	the critical nesting count is 1 to protect against recursive calls if the
-     * assert function also uses a critical section. */
+	assert function also uses a critical section. */
 	if( ullCriticalNesting == 1ULL )
 	{
 		configASSERT( ullPortInterruptNesting == 0 );
@@ -381,15 +377,15 @@ void vPortExitCritical( void )
 	if( ullCriticalNesting > portNO_CRITICAL_NESTING )
 	{
 		/* Decrement the nesting count as the critical section is being
-         * exited. */
+		exited. */
 		ullCriticalNesting--;
 
 		/* If the nesting level has reached zero then all interrupt
-         * priorities must be re-enabled. */
+		priorities must be re-enabled. */
 		if( ullCriticalNesting == portNO_CRITICAL_NESTING )
 		{
 			/* Critical nesting has reached zero so all interrupt priorities
-             * should be unmasked. */
+			should be unmasked. */
 			portCLEAR_INTERRUPT_MASK();
 		}
 	}
@@ -416,10 +412,10 @@ void FreeRTOS_Tick_Handler( void )
 	#endif /* configASSERT_DEFINED */
 
 	/* Set interrupt mask before altering scheduler structures.   The tick
-     * handler runs at the lowest priority, so interrupts cannot already be masked,
+	handler runs at the lowest priority, so interrupts cannot already be masked,
-     * so there is no need to save and restore the current mask value.  It is
+	so there is no need to save and restore the current mask value.  It is
-     * necessary to turn off interrupts in the CPU itself while the ICCPMR is being
+	necessary to turn off interrupts in the CPU itself while the ICCPMR is being
-     * updated. */
+	updated. */
 	portICCPMR_PRIORITY_MASK_REGISTER = ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );
 	__asm volatile (	"dsb sy		\n"
 						"isb sy		\n" ::: "memory" );
@@ -442,11 +438,11 @@ void FreeRTOS_Tick_Handler( void )
 void vPortTaskUsesFPU( void )
 {
 	/* A task is registering the fact that it needs an FPU context.  Set the
-     * FPU flag (which is saved as part of the task context). */
+	FPU flag (which is saved as part of the task context). */
 	ullPortTaskHasFPUContext = pdTRUE;
 
 	/* Consider initialising the FPSR here - but probably not necessary in
-     * AArch64. */
+	AArch64. */
 }
 /*-----------------------------------------------------------*/
 
@@ -464,9 +460,8 @@ UBaseType_t uxPortSetInterruptMask( void )
 uint32_t ulReturn;
 
 	/* Interrupt in the CPU must be turned off while the ICCPMR is being
-     * updated. */
+	updated. */
 	portDISABLE_INTERRUPTS();
-
 	if( portICCPMR_PRIORITY_MASK_REGISTER == ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) )
 	{
 		/* Interrupts were already masked. */
@@ -479,7 +474,6 @@ UBaseType_t uxPortSetInterruptMask( void )
 		__asm volatile (	"dsb sy		\n"
 							"isb sy		\n" ::: "memory" );
 	}
-
 	portENABLE_INTERRUPTS();
 
 	return ulReturn;
@@ -491,33 +485,34 @@ UBaseType_t uxPortSetInterruptMask( void )
 	void vPortValidateInterruptPriority( void )
 	{
 		/* The following assertion will fail if a service routine (ISR) for
-         * an interrupt that has been assigned a priority above
+		an interrupt that has been assigned a priority above
-         * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
+		configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
-         * function.  ISR safe FreeRTOS API functions must *only* be called
+		function.  ISR safe FreeRTOS API functions must *only* be called
-         * from interrupts that have been assigned a priority at or below
+		from interrupts that have been assigned a priority at or below
-         * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+		configMAX_SYSCALL_INTERRUPT_PRIORITY.
-         *
+
-         * Numerically low interrupt priority numbers represent logically high
+		Numerically low interrupt priority numbers represent logically high
-         * interrupt priorities, therefore the priority of the interrupt must
+		interrupt priorities, therefore the priority of the interrupt must
-         * be set to a value equal to or numerically *higher* than
+		be set to a value equal to or numerically *higher* than
-         * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+		configMAX_SYSCALL_INTERRUPT_PRIORITY.
-         *
+
-         * FreeRTOS maintains separate thread and ISR API functions to ensure
+		FreeRTOS maintains separate thread and ISR API functions to ensure
-         * interrupt entry is as fast and simple as possible. */
+		interrupt entry is as fast and simple as possible. */
 		configASSERT( portICCRPR_RUNNING_PRIORITY_REGISTER >= ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) );
 
 		/* Priority grouping:  The interrupt controller (GIC) allows the bits
-         * that define each interrupt's priority to be split between bits that
+		that define each interrupt's priority to be split between bits that
-         * define the interrupt's pre-emption priority bits and bits that define
+		define the interrupt's pre-emption priority bits and bits that define
-         * the interrupt's sub-priority.  For simplicity all bits must be defined
+		the interrupt's sub-priority.  For simplicity all bits must be defined
-         * to be pre-emption priority bits.  The following assertion will fail if
+		to be pre-emption priority bits.  The following assertion will fail if
-         * this is not the case (if some bits represent a sub-priority).
+		this is not the case (if some bits represent a sub-priority).
-         *
+
-         * The priority grouping is configured by the GIC's binary point register
+		The priority grouping is configured by the GIC's binary point register
-         * (ICCBPR).  Writting 0 to ICCBPR will ensure it is set to its lowest
+		(ICCBPR).  Writting 0 to ICCBPR will ensure it is set to its lowest
-         * possible value (which may be above 0). */
+		possible value (which may be above 0). */
 		configASSERT( ( portICCBPR_BINARY_POINT_REGISTER & portBINARY_POINT_BITS ) <= portMAX_BINARY_POINT_VALUE );
 	}
 
 #endif /* configASSERT_DEFINED */
 /*-----------------------------------------------------------*/
+

portable/GCC/ARM_CA53_64_BIT/portmacro.h

@@ -59,7 +59,7 @@
 #define portMAX_DELAY ( ( TickType_t ) 0xffffffffffffffff )
 
 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
- * not need to be guarded with a critical section. */
+not need to be guarded with a critical section. */
 #define portTICK_TYPE_IS_ATOMIC 1
 
 /*-----------------------------------------------------------*/
@@ -91,7 +91,6 @@
 #else
 	#define portYIELD() __asm volatile ( "SMC 0" ::: "memory" )
 #endif
-
 /*-----------------------------------------------------------
  * Critical section control
  *----------------------------------------------------------*/
@@ -114,7 +113,7 @@
 
 
 /* These macros do not globally disable/enable interrupts.  They do mask off
- * interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */
+interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */
 #define portENTER_CRITICAL()		vPortEnterCritical();
 #define portEXIT_CRITICAL()			vPortExitCritical();
 #define portSET_INTERRUPT_MASK_FROM_ISR()		uxPortSetInterruptMask()
@@ -123,17 +122,17 @@
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site.  These are
- * not required for this port but included in case common demo code that uses these
+not required for this port but included in case common demo code that uses these
- * macros is used. */
+macros is used. */
 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
 #define portTASK_FUNCTION( vFunction, pvParameters )	void vFunction( void *pvParameters )
 
 /* Prototype of the FreeRTOS tick handler.  This must be installed as the
- * handler for whichever peripheral is used to generate the RTOS tick. */
+handler for whichever peripheral is used to generate the RTOS tick. */
 void FreeRTOS_Tick_Handler( void );
 
 /* Any task that uses the floating point unit MUST call vPortTaskUsesFPU()
- * before any floating point instructions are executed. */
+before any floating point instructions are executed. */
 void vPortTaskUsesFPU( void );
 #define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()
 
@@ -171,7 +170,7 @@
 
 
 /* The number of bits to shift for an interrupt priority is dependent on the
- * number of bits implemented by the interrupt controller. */
+number of bits implemented by the interrupt controller. */
 #if configUNIQUE_INTERRUPT_PRIORITIES == 16
 	#define portPRIORITY_SHIFT 4
 	#define portMAX_BINARY_POINT_VALUE	3
@@ -187,9 +186,9 @@
 #elif configUNIQUE_INTERRUPT_PRIORITIES == 256
 	#define portPRIORITY_SHIFT 0
 	#define portMAX_BINARY_POINT_VALUE	0
-    #else /* if configUNIQUE_INTERRUPT_PRIORITIES == 16 */
+#else
 	#error Invalid configUNIQUE_INTERRUPT_PRIORITIES setting.  configUNIQUE_INTERRUPT_PRIORITIES must be set to the number of unique priorities implemented by the target hardware
-    #endif /* if configUNIQUE_INTERRUPT_PRIORITIES == 16 */
+#endif
 
 /* Interrupt controller access addresses. */
 #define portICCPMR_PRIORITY_MASK_OFFSET  						( 0x04 )
@@ -209,3 +208,4 @@
 #define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
 
 #endif /* PORTMACRO_H */
+

portable/GCC/ARM_CA9/port.c

@@ -33,23 +33,23 @@
 #include "task.h"
 
 #ifndef configINTERRUPT_CONTROLLER_BASE_ADDRESS
-    #error configINTERRUPT_CONTROLLER_BASE_ADDRESS must be defined.  See http: /*www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html */
+	#error configINTERRUPT_CONTROLLER_BASE_ADDRESS must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif
 
 #ifndef configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET
-    #error configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET must be defined.  See http: /*www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html */
+	#error configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif
 
 #ifndef configUNIQUE_INTERRUPT_PRIORITIES
-    #error configUNIQUE_INTERRUPT_PRIORITIES must be defined.  See http: /*www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html */
+	#error configUNIQUE_INTERRUPT_PRIORITIES must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif
 
 #ifndef configSETUP_TICK_INTERRUPT
-    #error configSETUP_TICK_INTERRUPT() must be defined.  See http: /*www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html */
+	#error configSETUP_TICK_INTERRUPT() must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif /* configSETUP_TICK_INTERRUPT */
 
 #ifndef configMAX_API_CALL_INTERRUPT_PRIORITY
-    #error configMAX_API_CALL_INTERRUPT_PRIORITY must be defined.  See http: /*www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html */
+	#error configMAX_API_CALL_INTERRUPT_PRIORITY must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
 #endif
 
 #if configMAX_API_CALL_INTERRUPT_PRIORITY == 0
@@ -73,24 +73,24 @@
 #endif
 
 /* Some vendor specific files default configCLEAR_TICK_INTERRUPT() in
- * portmacro.h. */
+portmacro.h. */
 #ifndef configCLEAR_TICK_INTERRUPT
 	#define configCLEAR_TICK_INTERRUPT()
 #endif
 
 /* A critical section is exited when the critical section nesting count reaches
- * this value. */
+this value. */
 #define portNO_CRITICAL_NESTING			( ( uint32_t ) 0 )
 
 /* In all GICs 255 can be written to the priority mask register to unmask all
- * (but the lowest) interrupt priority. */
+(but the lowest) interrupt priority. */
 #define portUNMASK_VALUE				( 0xFFUL )
 
 /* Tasks are not created with a floating point context, but can be given a
- * floating point context after they have been created.  A variable is stored as
+floating point context after they have been created.  A variable is stored as
- * part of the tasks context that holds portNO_FLOATING_POINT_CONTEXT if the task
+part of the tasks context that holds portNO_FLOATING_POINT_CONTEXT if the task
- * does not have an FPU context, or any other value if the task does have an FPU
+does not have an FPU context, or any other value if the task does have an FPU
- * context. */
+context. */
 #define portNO_FLOATING_POINT_CONTEXT	( ( StackType_t ) 0 )
 
 /* Constants required to setup the initial task context. */
@@ -100,19 +100,19 @@
 #define portTHUMB_MODE_ADDRESS			( 0x01UL )
 
 /* Used by portASSERT_IF_INTERRUPT_PRIORITY_INVALID() when ensuring the binary
- * point is zero. */
+point is zero. */
 #define portBINARY_POINT_BITS			( ( uint8_t ) 0x03 )
 
 /* Masks all bits in the APSR other than the mode bits. */
 #define portAPSR_MODE_BITS_MASK			( 0x1F )
 
 /* The value of the mode bits in the APSR when the CPU is executing in user
- * mode. */
+mode. */
 #define portAPSR_USER_MODE				( 0x10 )
 
 /* The critical section macros only mask interrupts up to an application
- * determined priority level.  Sometimes it is necessary to turn interrupt off in
+determined priority level.  Sometimes it is necessary to turn interrupt off in
- * the CPU itself before modifying certain hardware registers. */
+the CPU itself before modifying certain hardware registers. */
 #define portCPU_IRQ_DISABLE()										\
 	__asm volatile ( "CPSID i" ::: "memory" );						\
 	__asm volatile ( "DSB" );										\
@@ -139,8 +139,8 @@
 #define portBIT_0_SET								( ( uint8_t ) 0x01 )
 
 /* Let the user override the pre-loading of the initial LR with the address of
- * prvTaskExitError() in case it messes up unwinding of the stack in the
+prvTaskExitError() in case it messes up unwinding of the stack in the
- * debugger. */
+debugger. */
 #ifdef configTASK_RETURN_ADDRESS
 	#define portTASK_RETURN_ADDRESS	configTASK_RETURN_ADDRESS
 #else
@@ -148,7 +148,7 @@
 #endif
 
 /* The space on the stack required to hold the FPU registers.  This is 32 64-bit
- * registers, plus a 32-bit status register. */
+registers, plus a 32-bit status register. */
 #define portFPU_REGISTER_WORDS	( ( 32 * 2 ) + 1 )
 
 /*-----------------------------------------------------------*/
@@ -188,21 +188,21 @@ void vApplicationFPUSafeIRQHandler( uint32_t ulICCIAR ) __attribute__( ( weak )
 /*-----------------------------------------------------------*/
 
 /* A variable is used to keep track of the critical section nesting.  This
- * variable has to be stored as part of the task context and must be initialised to
+variable has to be stored as part of the task context and must be initialised to
- * a non zero value to ensure interrupts don't inadvertently become unmasked before
+a non zero value to ensure interrupts don't inadvertently become unmasked before
- * the scheduler starts.  As it is stored as part of the task context it will
+the scheduler starts.  As it is stored as part of the task context it will
- * automatically be set to 0 when the first task is started. */
+automatically be set to 0 when the first task is started. */
 volatile uint32_t ulCriticalNesting = 9999UL;
 
 /* Saved as part of the task context.  If ulPortTaskHasFPUContext is non-zero then
- * a floating point context must be saved and restored for the task. */
+a floating point context must be saved and restored for the task. */
 volatile uint32_t ulPortTaskHasFPUContext = pdFALSE;
 
 /* Set to 1 to pend a context switch from an ISR. */
 volatile uint32_t ulPortYieldRequired = pdFALSE;
 
 /* Counts the interrupt nesting depth.  A context switch is only performed if
- * if the nesting depth is 0. */
+if the nesting depth is 0. */
 volatile uint32_t ulPortInterruptNesting = 0UL;
 
 /* Used in the asm file. */
@@ -216,16 +216,14 @@ __attribute__( ( used ) ) const uint32_t ulMaxAPIPriorityMask = ( configMAX_API_
 /*
  * See header file for description.
  */
-StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
-                                     TaskFunction_t pxCode,
-                                     void * pvParameters )
 {
 	/* Setup the initial stack of the task.  The stack is set exactly as
-     * expected by the portRESTORE_CONTEXT() macro.
+	expected by the portRESTORE_CONTEXT() macro.
-     *
+
-     * The fist real value on the stack is the status register, which is set for
+	The fist real value on the stack is the status register, which is set for
-     * system mode, with interrupts enabled.  A few NULLs are added first to ensure
+	system mode, with interrupts enabled.  A few NULLs are added first to ensure
-     * GDB does not try decoding a non-existent return address. */
+	GDB does not try decoding a non-existent return address. */
 	*pxTopOfStack = ( StackType_t ) NULL;
 	pxTopOfStack--;
 	*pxTopOfStack = ( StackType_t ) NULL;
@@ -277,21 +275,21 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 	pxTopOfStack--;
 
 	/* The task will start with a critical nesting count of 0 as interrupts are
-     * enabled. */
+	enabled. */
 	*pxTopOfStack = portNO_CRITICAL_NESTING;
 
 	#if( configUSE_TASK_FPU_SUPPORT == 1 )
 	{
 		/* The task will start without a floating point context.  A task that
-             * uses the floating point hardware must call vPortTaskUsesFPU() before
+		uses the floating point hardware must call vPortTaskUsesFPU() before
-             * executing any floating point instructions. */
+		executing any floating point instructions. */
 		pxTopOfStack--;
 		*pxTopOfStack = portNO_FLOATING_POINT_CONTEXT;
 	}
 	#elif( configUSE_TASK_FPU_SUPPORT == 2 )
 	{
 		/* The task will start with a floating point context.  Leave enough
-             * space for the registers - and ensure they are initialised to 0. */
+		space for the registers - and ensure they are initialised to 0. */
 		pxTopOfStack -= portFPU_REGISTER_WORDS;
 		memset( pxTopOfStack, 0x00, portFPU_REGISTER_WORDS * sizeof( StackType_t ) );
 
@@ -299,11 +297,11 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 		*pxTopOfStack = pdTRUE;
 		ulPortTaskHasFPUContext = pdTRUE;
 	}
-    #else /* if ( configUSE_TASK_FPU_SUPPORT == 1 ) */
+	#else
 	{
 		#error Invalid configUSE_TASK_FPU_SUPPORT setting - configUSE_TASK_FPU_SUPPORT must be set to 1, 2, or left undefined.
 	}
-    #endif /* if ( configUSE_TASK_FPU_SUPPORT == 1 ) */
+	#endif
 
 	return pxTopOfStack;
 }
@@ -312,17 +310,14 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 static void prvTaskExitError( void )
 {
 	/* A function that implements a task must not exit or attempt to return to
-     * its caller as there is nothing to return to.  If a task wants to exit it
+	its caller as there is nothing to return to.  If a task wants to exit it
-     * should instead call vTaskDelete( NULL ).
+	should instead call vTaskDelete( NULL ).
-     *
+
-     * Artificially force an assert() to be triggered if configASSERT() is
+	Artificially force an assert() to be triggered if configASSERT() is
-     * defined, then stop here so application writers can catch the error. */
+	defined, then stop here so application writers can catch the error. */
 	configASSERT( ulPortInterruptNesting == ~0UL );
 	portDISABLE_INTERRUPTS();
-
+	for( ;; );
-    for( ; ; )
-    {
-    }
 }
 /*-----------------------------------------------------------*/
 
@@ -337,12 +332,12 @@ BaseType_t xPortStartScheduler( void )
 		volatile uint8_t ucMaxPriorityValue;
 
 		/* Determine how many priority bits are implemented in the GIC.
-             *
+
-             * Save the interrupt priority value that is about to be clobbered. */
+		Save the interrupt priority value that is about to be clobbered. */
 		ulOriginalPriority = *pucFirstUserPriorityRegister;
 
 		/* Determine the number of priority bits available.  First write to
-             * all possible bits. */
+		all possible bits. */
 		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
 
 		/* Read the value back to see how many bits stuck. */
@@ -355,18 +350,18 @@ BaseType_t xPortStartScheduler( void )
 		}
 
 		/* Sanity check configUNIQUE_INTERRUPT_PRIORITIES matches the read
-             * value. */
+		value. */
 		configASSERT( ucMaxPriorityValue == portLOWEST_INTERRUPT_PRIORITY );
 
 		/* Restore the clobbered interrupt priority register to its original
-             * value. */
+		value. */
 		*pucFirstUserPriorityRegister = ulOriginalPriority;
 	}
 	#endif /* conifgASSERT_DEFINED */
 
 
 	/* Only continue if the CPU is not in User mode.  The CPU must be in a
-     * Privileged mode for the scheduler to start. */
+	Privileged mode for the scheduler to start. */
 	__asm volatile ( "MRS %0, APSR" : "=r" ( ulAPSR ) :: "memory" );
 	ulAPSR &= portAPSR_MODE_BITS_MASK;
 	configASSERT( ulAPSR != portAPSR_USER_MODE );
@@ -374,16 +369,16 @@ BaseType_t xPortStartScheduler( void )
 	if( ulAPSR != portAPSR_USER_MODE )
 	{
 		/* Only continue if the binary point value is set to its lowest possible
-         * setting.  See the comments in vPortValidateInterruptPriority() below for
+		setting.  See the comments in vPortValidateInterruptPriority() below for
-         * more information. */
+		more information. */
 		configASSERT( ( portICCBPR_BINARY_POINT_REGISTER & portBINARY_POINT_BITS ) <= portMAX_BINARY_POINT_VALUE );
 
 		if( ( portICCBPR_BINARY_POINT_REGISTER & portBINARY_POINT_BITS ) <= portMAX_BINARY_POINT_VALUE )
 		{
 			/* Interrupts are turned off in the CPU itself to ensure tick does
-             * not execute	while the scheduler is being started.  Interrupts are
+			not execute	while the scheduler is being started.  Interrupts are
-             * automatically turned back on in the CPU when the first task starts
+			automatically turned back on in the CPU when the first task starts
-             * executing. */
+			executing. */
 			portCPU_IRQ_DISABLE();
 
 			/* Start the timer that generates the tick ISR. */
@@ -395,10 +390,10 @@ BaseType_t xPortStartScheduler( void )
 	}
 
 	/* Will only get here if vTaskStartScheduler() was called with the CPU in
-     * a non-privileged mode or the binary point register was not set to its lowest
+	a non-privileged mode or the binary point register was not set to its lowest
-     * possible value.  prvTaskExitError() is referenced to prevent a compiler
+	possible value.  prvTaskExitError() is referenced to prevent a compiler
-     * warning about it being defined but not referenced in the case that the user
+	warning about it being defined but not referenced in the case that the user
-     * defines their own exit address. */
+	defines their own exit address. */
 	( void ) prvTaskExitError;
 	return 0;
 }
@@ -407,7 +402,7 @@ BaseType_t xPortStartScheduler( void )
 void vPortEndScheduler( void )
 {
 	/* Not implemented in ports where there is nothing to return to.
-     * Artificially force an assert. */
+	Artificially force an assert. */
 	configASSERT( ulCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
@@ -418,15 +413,15 @@ void vPortEnterCritical( void )
 	ulPortSetInterruptMask();
 
 	/* Now interrupts are disabled ulCriticalNesting can be accessed
-     * directly.  Increment ulCriticalNesting to keep a count of how many times
+	directly.  Increment ulCriticalNesting to keep a count of how many times
-     * portENTER_CRITICAL() has been called. */
+	portENTER_CRITICAL() has been called. */
 	ulCriticalNesting++;
 
 	/* This is not the interrupt safe version of the enter critical function so
-     * assert() if it is being called from an interrupt context.  Only API
+	assert() if it is being called from an interrupt context.  Only API
-     * functions that end in "FromISR" can be used in an interrupt.  Only assert if
+	functions that end in "FromISR" can be used in an interrupt.  Only assert if
-     * the critical nesting count is 1 to protect against recursive calls if the
+	the critical nesting count is 1 to protect against recursive calls if the
-     * assert function also uses a critical section. */
+	assert function also uses a critical section. */
 	if( ulCriticalNesting == 1 )
 	{
 		configASSERT( ulPortInterruptNesting == 0 );
@@ -439,15 +434,15 @@ void vPortExitCritical( void )
 	if( ulCriticalNesting > portNO_CRITICAL_NESTING )
 	{
 		/* Decrement the nesting count as the critical section is being
-         * exited. */
+		exited. */
 		ulCriticalNesting--;
 
 		/* If the nesting level has reached zero then all interrupt
-         * priorities must be re-enabled. */
+		priorities must be re-enabled. */
 		if( ulCriticalNesting == portNO_CRITICAL_NESTING )
 		{
 			/* Critical nesting has reached zero so all interrupt priorities
-             * should be unmasked. */
+			should be unmasked. */
 			portCLEAR_INTERRUPT_MASK();
 		}
 	}
@@ -457,10 +452,10 @@ void vPortExitCritical( void )
 void FreeRTOS_Tick_Handler( void )
 {
 	/* Set interrupt mask before altering scheduler structures.   The tick
-     * handler runs at the lowest priority, so interrupts cannot already be masked,
+	handler runs at the lowest priority, so interrupts cannot already be masked,
-     * so there is no need to save and restore the current mask value.  It is
+	so there is no need to save and restore the current mask value.  It is
-     * necessary to turn off interrupts in the CPU itself while the ICCPMR is being
+	necessary to turn off interrupts in the CPU itself while the ICCPMR is being
-     * updated. */
+	updated. */
 	portCPU_IRQ_DISABLE();
 	portICCPMR_PRIORITY_MASK_REGISTER = ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );
 	__asm volatile (	"dsb		\n"
@@ -486,7 +481,7 @@ void FreeRTOS_Tick_Handler( void )
 	uint32_t ulInitialFPSCR = 0;
 
 		/* A task is registering the fact that it needs an FPU context.  Set the
-         * FPU flag (which is saved as part of the task context). */
+		FPU flag (which is saved as part of the task context). */
 		ulPortTaskHasFPUContext = pdTRUE;
 
 		/* Initialise the floating point status register. */
@@ -510,9 +505,8 @@ uint32_t ulPortSetInterruptMask( void )
 uint32_t ulReturn;
 
 	/* Interrupt in the CPU must be turned off while the ICCPMR is being
-     * updated. */
+	updated. */
 	portCPU_IRQ_DISABLE();
-
 	if( portICCPMR_PRIORITY_MASK_REGISTER == ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) )
 	{
 		/* Interrupts were already masked. */
@@ -525,7 +519,6 @@ uint32_t ulPortSetInterruptMask( void )
 		__asm volatile (	"dsb		\n"
 							"isb		\n" ::: "memory" );
 	}
-
 	portCPU_IRQ_ENABLE();
 
 	return ulReturn;
@@ -537,31 +530,31 @@ uint32_t ulPortSetInterruptMask( void )
 	void vPortValidateInterruptPriority( void )
 	{
 		/* The following assertion will fail if a service routine (ISR) for
-         * an interrupt that has been assigned a priority above
+		an interrupt that has been assigned a priority above
-         * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
+		configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
-         * function.  ISR safe FreeRTOS API functions must *only* be called
+		function.  ISR safe FreeRTOS API functions must *only* be called
-         * from interrupts that have been assigned a priority at or below
+		from interrupts that have been assigned a priority at or below
-         * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+		configMAX_SYSCALL_INTERRUPT_PRIORITY.
-         *
+
-         * Numerically low interrupt priority numbers represent logically high
+		Numerically low interrupt priority numbers represent logically high
-         * interrupt priorities, therefore the priority of the interrupt must
+		interrupt priorities, therefore the priority of the interrupt must
-         * be set to a value equal to or numerically *higher* than
+		be set to a value equal to or numerically *higher* than
-         * configMAX_SYSCALL_INTERRUPT_PRIORITY.
+		configMAX_SYSCALL_INTERRUPT_PRIORITY.
-         *
+
-         * FreeRTOS maintains separate thread and ISR API functions to ensure
+		FreeRTOS maintains separate thread and ISR API functions to ensure
-         * interrupt entry is as fast and simple as possible. */
+		interrupt entry is as fast and simple as possible. */
 		configASSERT( portICCRPR_RUNNING_PRIORITY_REGISTER >= ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) );
 
 		/* Priority grouping:  The interrupt controller (GIC) allows the bits
-         * that define each interrupt's priority to be split between bits that
+		that define each interrupt's priority to be split between bits that
-         * define the interrupt's pre-emption priority bits and bits that define
+		define the interrupt's pre-emption priority bits and bits that define
-         * the interrupt's sub-priority.  For simplicity all bits must be defined
+		the interrupt's sub-priority.  For simplicity all bits must be defined
-         * to be pre-emption priority bits.  The following assertion will fail if
+		to be pre-emption priority bits.  The following assertion will fail if
-         * this is not the case (if some bits represent a sub-priority).
+		this is not the case (if some bits represent a sub-priority).
-         *
+
-         * The priority grouping is configured by the GIC's binary point register
+		The priority grouping is configured by the GIC's binary point register
-         * (ICCBPR).  Writting 0 to ICCBPR will ensure it is set to its lowest
+		(ICCBPR).  Writting 0 to ICCBPR will ensure it is set to its lowest
-         * possible value (which may be above 0). */
+		possible value (which may be above 0). */
 		configASSERT( ( portICCBPR_BINARY_POINT_REGISTER & portBINARY_POINT_BITS ) <= portMAX_BINARY_POINT_VALUE );
 	}
 

portable/GCC/ARM_CA9/portmacro.h

@@ -59,7 +59,7 @@
 #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
 
 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
- * not need to be guarded with a critical section. */
+not need to be guarded with a critical section. */
 #define portTICK_TYPE_IS_ATOMIC 1
 
 /*-----------------------------------------------------------*/
@@ -99,7 +99,7 @@
 extern void vPortInstallFreeRTOSVectorTable( void );
 
 /* These macros do not globally disable/enable interrupts.  They do mask off
- * interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */
+interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */
 #define portENTER_CRITICAL()		vPortEnterCritical();
 #define portEXIT_CRITICAL()			vPortExitCritical();
 #define portDISABLE_INTERRUPTS()	ulPortSetInterruptMask()
@@ -110,26 +110,25 @@
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site.  These are
- * not required for this port but included in case common demo code that uses these
+not required for this port but included in case common demo code that uses these
- * macros is used. */
+macros is used. */
 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
 #define portTASK_FUNCTION( vFunction, pvParameters )	void vFunction( void *pvParameters )
 
 /* Prototype of the FreeRTOS tick handler.  This must be installed as the
- * handler for whichever peripheral is used to generate the RTOS tick. */
+handler for whichever peripheral is used to generate the RTOS tick. */
 void FreeRTOS_Tick_Handler( void );
 
 /* If configUSE_TASK_FPU_SUPPORT is set to 1 (or left undefined) then tasks are
- * created without an FPU context and must call vPortTaskUsesFPU() to give
+created without an FPU context and must call vPortTaskUsesFPU() to give
- * themselves an FPU context before using any FPU instructions.  If
+themselves an FPU context before using any FPU instructions.  If
- * configUSE_TASK_FPU_SUPPORT is set to 2 then all tasks will have an FPU context
+configUSE_TASK_FPU_SUPPORT is set to 2 then all tasks will have an FPU context
- * by default. */
+by default. */
 #if( configUSE_TASK_FPU_SUPPORT != 2 )
 	void vPortTaskUsesFPU( void );
 #else
-
 	/* Each task has an FPU context already, so define this function away to
- * nothing to prevent it being called accidentally. */
+	nothing to prevent it being called accidentally. */
 	#define vPortTaskUsesFPU()
 #endif
 #define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()
@@ -168,7 +167,7 @@
 
 
 /* The number of bits to shift for an interrupt priority is dependent on the
- * number of bits implemented by the interrupt controller. */
+number of bits implemented by the interrupt controller. */
 #if configUNIQUE_INTERRUPT_PRIORITIES == 16
 	#define portPRIORITY_SHIFT 4
 	#define portMAX_BINARY_POINT_VALUE	3
@@ -184,9 +183,9 @@
 #elif configUNIQUE_INTERRUPT_PRIORITIES == 256
 	#define portPRIORITY_SHIFT 0
 	#define portMAX_BINARY_POINT_VALUE	0
-    #else /* if configUNIQUE_INTERRUPT_PRIORITIES == 16 */
+#else
 	#error Invalid configUNIQUE_INTERRUPT_PRIORITIES setting.  configUNIQUE_INTERRUPT_PRIORITIES must be set to the number of unique priorities implemented by the target hardware
-    #endif /* if configUNIQUE_INTERRUPT_PRIORITIES == 16 */
+#endif
 
 /* Interrupt controller access addresses. */
 #define portICCPMR_PRIORITY_MASK_OFFSET  						( 0x04 )
@@ -206,3 +205,4 @@
 #define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
 
 #endif /* PORTMACRO_H */
+

portable/GCC/ARM_CM0/port.c

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------

portable/GCC/ARM_CM23/non_secure/port.c

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
@@ -1051,7 +1050,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
     {
         uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
         int32_t lIndex = 0;
+
         #if defined( __ARMCC_VERSION )
+
             /* Declaration when these variable are defined in code instead of being
              * exported from linker scripts. */
             extern uint32_t * __privileged_sram_start__;
@@ -1079,8 +1080,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
              * using a separate MPU region. This is needed because privileged
              * SRAM is already protected using an MPU region and ARMv8-M does
              * not allow overlapping MPU regions. */
-            if( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ &&
+            if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
-                ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ )
+                ( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
             {
                 xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
                 xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;

portable/GCC/ARM_CM23_NTZ/non_secure/port.c

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
@@ -877,6 +876,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
 }
 /*-----------------------------------------------------------*/
 
+/* *INDENT-OFF* */
 #if ( configENABLE_MPU == 1 )
     StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
                                          StackType_t * pxEndOfStack,
@@ -889,6 +889,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
                                          TaskFunction_t pxCode,
                                          void * pvParameters ) /* PRIVILEGED_FUNCTION */
 #endif /* configENABLE_MPU */
+/* *INDENT-ON* */
 {
     /* Simulate the stack frame as it would be created by a context switch
      * interrupt. */
@@ -1051,7 +1052,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
     {
         uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
         int32_t lIndex = 0;
+
         #if defined( __ARMCC_VERSION )
+
             /* Declaration when these variable are defined in code instead of being
              * exported from linker scripts. */
             extern uint32_t * __privileged_sram_start__;
@@ -1079,8 +1082,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
              * using a separate MPU region. This is needed because privileged
              * SRAM is already protected using an MPU region and ARMv8-M does
              * not allow overlapping MPU regions. */
-            if( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ &&
+            if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
-                ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ )
+                ( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
             {
                 xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
                 xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;

portable/GCC/ARM_CM3/port.c

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------

portable/GCC/ARM_CM33/non_secure/port.c

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
@@ -877,6 +876,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
 }
 /*-----------------------------------------------------------*/
 
+/* *INDENT-OFF* */
 #if ( configENABLE_MPU == 1 )
     StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
                                          StackType_t * pxEndOfStack,
@@ -889,6 +889,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
                                          TaskFunction_t pxCode,
                                          void * pvParameters ) /* PRIVILEGED_FUNCTION */
 #endif /* configENABLE_MPU */
+/* *INDENT-ON* */
 {
     /* Simulate the stack frame as it would be created by a context switch
      * interrupt. */
@@ -1051,7 +1052,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
     {
         uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
         int32_t lIndex = 0;
+
         #if defined( __ARMCC_VERSION )
+
             /* Declaration when these variable are defined in code instead of being
              * exported from linker scripts. */
             extern uint32_t * __privileged_sram_start__;
@@ -1079,8 +1082,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
              * using a separate MPU region. This is needed because privileged
              * SRAM is already protected using an MPU region and ARMv8-M does
              * not allow overlapping MPU regions. */
-            if( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ &&
+            if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
-                ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ )
+                ( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
             {
                 xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
                 xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;

portable/GCC/ARM_CM33_NTZ/non_secure/port.c

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
@@ -877,6 +876,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
 }
 /*-----------------------------------------------------------*/
 
+/* *INDENT-OFF* */
 #if ( configENABLE_MPU == 1 )
     StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
                                          StackType_t * pxEndOfStack,
@@ -889,6 +889,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
                                          TaskFunction_t pxCode,
                                          void * pvParameters )       /* PRIVILEGED_FUNCTION */
 #endif /* configENABLE_MPU */
+/* *INDENT-ON* */
 {
     /* Simulate the stack frame as it would be created by a context switch
      * interrupt. */
@@ -1051,7 +1052,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
     {
         uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
         int32_t lIndex = 0;
+
         #if defined( __ARMCC_VERSION )
+
             /* Declaration when these variable are defined in code instead of being
              * exported from linker scripts. */
             extern uint32_t * __privileged_sram_start__;
@@ -1079,8 +1082,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
              * using a separate MPU region. This is needed because privileged
              * SRAM is already protected using an MPU region and ARMv8-M does
              * not allow overlapping MPU regions. */
-            if( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ &&
+            if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
-                ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ )
+                ( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
             {
                 xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
                 xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;

portable/GCC/ARM_CM3_MPU/port.c

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------

portable/GCC/ARM_CM4F/port.c

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------

portable/GCC/ARM_CM4_MPU/port.c

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------

portable/GCC/ARM_CM4_MPU/portmacro.h

@@ -22,16 +22,18 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 
 #ifndef PORTMACRO_H
 #define PORTMACRO_H
 
+
+/* *INDENT-OFF* */
 #ifdef __cplusplus
     extern "C" {
 #endif
+/* *INDENT-ON* */
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -80,6 +82,7 @@
 #define portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY    ( 0x02UL << 24UL )
 #define portMPU_REGION_CACHEABLE_BUFFERABLE                      ( 0x07UL << 16UL )
 #define portMPU_REGION_EXECUTE_NEVER                             ( 0x01UL << 28UL )
+
 /* Location of the TEX,S,C,B bits in the MPU Region Attribute and Size
  * Register (RASR). */
 #define portMPU_RASR_TEX_S_C_B_LOCATION                          ( 16UL )
@@ -139,7 +142,7 @@
  |     |   |   |                        | bus. See the table below for the cacheability policy   |                         |
  |     |   |   |                        | encoding. memory, BB=Outer policy, AA=Inner policy.    |                         |
  +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
-
+ |
  +-----------------------------------------+----------------------------------------+
  | AA or BB subfield of {TEX,C,B} encoding |  Cacheability policy                   |
  +-----------------------------------------+----------------------------------------+
@@ -387,8 +390,11 @@
     #define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY    0
 #endif
 /*-----------------------------------------------------------*/
+
+/* *INDENT-OFF* */
     #ifdef __cplusplus
         }
     #endif
+/* *INDENT-ON* */
 
 #endif /* PORTMACRO_H */

portable/GCC/ARM_CM7/r0p1/port.c

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 /*-----------------------------------------------------------

portable/GCC/ARM_CR5/port.c

@@ -22,7 +22,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 /* Standard includes. */
@@ -149,7 +148,8 @@
 
 
 /* Adding the necessary stuff in order to be able to determine from C code wheter or not the IRQs are enabled at the processor level (not interrupt controller level) */
-#define GET_CPSR()	({u32 rval = 0U; \
+#define GET_CPSR()             \
+    ( { u32 rval = 0U;         \
         __asm__ __volatile__ ( \
             "mrs	%0, cpsr\n"\
             : "=r" ( rval )    \
@@ -516,7 +516,9 @@ uint32_t ulPortSetInterruptMask( void )
      * critical section violation just enabled it to happen : A SysTick was waiting to happen, and calling 'portCPU_IRQ_ENABLE' would enable it to occur... Thus triggering a
      * switch of context while already performing a switch context. */
     if( !wasIRQDisabled )
+    {
         portCPU_IRQ_ENABLE();
+    }
 
     return ulReturn;
 }

portable/GCC/ARM_CRx_No_GIC/port.c

@@ -48,14 +48,14 @@
 #endif
 
 /* A critical section is exited when the critical section nesting count reaches
- * this value. */
+this value. */
 #define portNO_CRITICAL_NESTING			( ( uint32_t ) 0 )
 
 /* Tasks are not created with a floating point context, but can be given a
- * floating point context after they have been created.  A variable is stored as
+floating point context after they have been created.  A variable is stored as
- * part of the tasks context that holds portNO_FLOATING_POINT_CONTEXT if the task
+part of the tasks context that holds portNO_FLOATING_POINT_CONTEXT if the task
- * does not have an FPU context, or any other value if the task does have an FPU
+does not have an FPU context, or any other value if the task does have an FPU
- * context. */
+context. */
 #define portNO_FLOATING_POINT_CONTEXT	( ( StackType_t ) 0 )
 
 /* Constants required to setup the initial task context. */
@@ -67,12 +67,12 @@
 #define portAPSR_MODE_BITS_MASK			( 0x1F )
 
 /* The value of the mode bits in the APSR when the CPU is executing in user
- * mode. */
+mode. */
 #define portAPSR_USER_MODE				( 0x10 )
 
 /* Let the user override the pre-loading of the initial LR with the address of
- * prvTaskExitError() in case it messes up unwinding of the stack in the
+prvTaskExitError() in case it messes up unwinding of the stack in the
- * debugger. */
+debugger. */
 #ifdef configTASK_RETURN_ADDRESS
 	#define portTASK_RETURN_ADDRESS	configTASK_RETURN_ADDRESS
 #else
@@ -95,21 +95,21 @@ static void prvTaskExitError( void );
 /*-----------------------------------------------------------*/
 
 /* A variable is used to keep track of the critical section nesting.  This
- * variable has to be stored as part of the task context and must be initialised to
+variable has to be stored as part of the task context and must be initialised to
- * a non zero value to ensure interrupts don't inadvertently become unmasked before
+a non zero value to ensure interrupts don't inadvertently become unmasked before
- * the scheduler starts.  As it is stored as part of the task context it will
+the scheduler starts.  As it is stored as part of the task context it will
- * automatically be set to 0 when the first task is started. */
+automatically be set to 0 when the first task is started. */
 volatile uint32_t ulCriticalNesting = 9999UL;
 
 /* Saved as part of the task context.  If ulPortTaskHasFPUContext is non-zero then
- * a floating point context must be saved and restored for the task. */
+a floating point context must be saved and restored for the task. */
 volatile uint32_t ulPortTaskHasFPUContext = pdFALSE;
 
 /* Set to 1 to pend a context switch from an ISR. */
 volatile uint32_t ulPortYieldRequired = pdFALSE;
 
 /* Counts the interrupt nesting depth.  A context switch is only performed if
- * if the nesting depth is 0. */
+if the nesting depth is 0. */
 volatile uint32_t ulPortInterruptNesting = 0UL;
 
 /* Used in the asm file to clear an interrupt. */
@@ -120,16 +120,14 @@ __attribute__( ( used ) ) const uint32_t ulICCEOIR = configEOI_ADDRESS;
 /*
  * See header file for description.
  */
-StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
-                                     TaskFunction_t pxCode,
-                                     void * pvParameters )
 {
 	/* Setup the initial stack of the task.  The stack is set exactly as
-     * expected by the portRESTORE_CONTEXT() macro.
+	expected by the portRESTORE_CONTEXT() macro.
-     *
+
-     * The fist real value on the stack is the status register, which is set for
+	The fist real value on the stack is the status register, which is set for
-     * system mode, with interrupts enabled.  A few NULLs are added first to ensure
+	system mode, with interrupts enabled.  A few NULLs are added first to ensure
-     * GDB does not try decoding a non-existent return address. */
+	GDB does not try decoding a non-existent return address. */
 	*pxTopOfStack = ( StackType_t ) NULL;
 	pxTopOfStack--;
 	*pxTopOfStack = ( StackType_t ) NULL;
@@ -181,13 +179,13 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 	pxTopOfStack--;
 
 	/* The task will start with a critical nesting count of 0 as interrupts are
-     * enabled. */
+	enabled. */
 	*pxTopOfStack = portNO_CRITICAL_NESTING;
 	pxTopOfStack--;
 
 	/* The task will start without a floating point context.  A task that uses
-     * the floating point hardware must call vPortTaskUsesFPU() before executing
+	the floating point hardware must call vPortTaskUsesFPU() before executing
-     * any floating point instructions. */
+	any floating point instructions. */
 	*pxTopOfStack = portNO_FLOATING_POINT_CONTEXT;
 
 	return pxTopOfStack;
@@ -197,17 +195,14 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 static void prvTaskExitError( void )
 {
 	/* A function that implements a task must not exit or attempt to return to
-     * its caller as there is nothing to return to.  If a task wants to exit it
+	its caller as there is nothing to return to.  If a task wants to exit it
-     * should instead call vTaskDelete( NULL ).
+	should instead call vTaskDelete( NULL ).
-     *
+
-     * Artificially force an assert() to be triggered if configASSERT() is
+	Artificially force an assert() to be triggered if configASSERT() is
-     * defined, then stop here so application writers can catch the error. */
+	defined, then stop here so application writers can catch the error. */
 	configASSERT( ulPortInterruptNesting == ~0UL );
 	portDISABLE_INTERRUPTS();
-
+	for( ;; );
-    for( ; ; )
-    {
-    }
 }
 /*-----------------------------------------------------------*/
 
@@ -216,9 +211,8 @@ BaseType_t xPortStartScheduler( void )
 uint32_t ulAPSR;
 
 	/* Only continue if the CPU is not in User mode.  The CPU must be in a
-     * Privileged mode for the scheduler to start. */
+	Privileged mode for the scheduler to start. */
 	__asm volatile ( "MRS %0, APSR" : "=r" ( ulAPSR ) :: "memory" );
-
 	ulAPSR &= portAPSR_MODE_BITS_MASK;
 	configASSERT( ulAPSR != portAPSR_USER_MODE );
 
@@ -233,10 +227,10 @@ BaseType_t xPortStartScheduler( void )
 	}
 
 	/* Will only get here if vTaskStartScheduler() was called with the CPU in
-     * a non-privileged mode or the binary point register was not set to its lowest
+	a non-privileged mode or the binary point register was not set to its lowest
-     * possible value.  prvTaskExitError() is referenced to prevent a compiler
+	possible value.  prvTaskExitError() is referenced to prevent a compiler
-     * warning about it being defined but not referenced in the case that the user
+	warning about it being defined but not referenced in the case that the user
-     * defines their own exit address. */
+	defines their own exit address. */
 	( void ) prvTaskExitError;
 	return 0;
 }
@@ -245,7 +239,7 @@ BaseType_t xPortStartScheduler( void )
 void vPortEndScheduler( void )
 {
 	/* Not implemented in ports where there is nothing to return to.
-     * Artificially force an assert. */
+	Artificially force an assert. */
 	configASSERT( ulCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
@@ -255,15 +249,15 @@ void vPortEnterCritical( void )
 	portDISABLE_INTERRUPTS();
 
 	/* Now interrupts are disabled ulCriticalNesting can be accessed
-     * directly.  Increment ulCriticalNesting to keep a count of how many times
+	directly.  Increment ulCriticalNesting to keep a count of how many times
-     * portENTER_CRITICAL() has been called. */
+	portENTER_CRITICAL() has been called. */
 	ulCriticalNesting++;
 
 	/* This is not the interrupt safe version of the enter critical function so
-     * assert() if it is being called from an interrupt context.  Only API
+	assert() if it is being called from an interrupt context.  Only API
-     * functions that end in "FromISR" can be used in an interrupt.  Only assert if
+	functions that end in "FromISR" can be used in an interrupt.  Only assert if
-     * the critical nesting count is 1 to protect against recursive calls if the
+	the critical nesting count is 1 to protect against recursive calls if the
-     * assert function also uses a critical section. */
+	assert function also uses a critical section. */
 	if( ulCriticalNesting == 1 )
 	{
 		configASSERT( ulPortInterruptNesting == 0 );
@@ -276,15 +270,15 @@ void vPortExitCritical( void )
 	if( ulCriticalNesting > portNO_CRITICAL_NESTING )
 	{
 		/* Decrement the nesting count as the critical section is being
-         * exited. */
+		exited. */
 		ulCriticalNesting--;
 
 		/* If the nesting level has reached zero then all interrupt
-         * priorities must be re-enabled. */
+		priorities must be re-enabled. */
 		if( ulCriticalNesting == portNO_CRITICAL_NESTING )
 		{
 			/* Critical nesting has reached zero so all interrupt priorities
-             * should be unmasked. */
+			should be unmasked. */
 			portENABLE_INTERRUPTS();
 		}
 	}
@@ -314,10 +308,12 @@ void vPortTaskUsesFPU( void )
 uint32_t ulInitialFPSCR = 0;
 
 	/* A task is registering the fact that it needs an FPU context.  Set the
-     * FPU flag (which is saved as part of the task context). */
+	FPU flag (which is saved as part of the task context). */
 	ulPortTaskHasFPUContext = pdTRUE;
 
 	/* Initialise the floating point status register. */
 	__asm volatile ( "FMXR 	FPSCR, %0" :: "r" (ulInitialFPSCR) : "memory" );
 }
 /*-----------------------------------------------------------*/
+
+

portable/GCC/ARM_CRx_No_GIC/portmacro.h

@@ -59,7 +59,7 @@
 #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
 
 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
- * not need to be guarded with a critical section. */
+not need to be guarded with a critical section. */
 #define portTICK_TYPE_IS_ATOMIC 1
 
 /*-----------------------------------------------------------*/
@@ -85,8 +85,7 @@
 }
 
 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
-    #define portYIELD()          \
+#define portYIELD() __asm volatile ( "SWI 0		\n"				\
-    __asm volatile ( "SWI 0		\n"\
 									 "ISB		  " ::: "memory" );
 
 
@@ -104,12 +103,11 @@
 #define portINTERRUPT_ENABLE_BIT	( 1 << 7 )
 
 /* In the absence of a priority mask register, these functions and macros
- * globally enable and disable interrupts. */
+globally enable and disable interrupts. */
 #define portENTER_CRITICAL()		vPortEnterCritical();
 #define portEXIT_CRITICAL()			vPortExitCritical();
 #define portENABLE_INTERRUPTS()		__asm volatile ( "CPSIE i 	\n"	::: "memory" );
-    #define portDISABLE_INTERRUPTS() \
+#define portDISABLE_INTERRUPTS()	__asm volatile ( "CPSID i 	\n"		\
-    __asm volatile ( "CPSID i 	\n"  \
 													 "DSB		\n"		\
 													 "ISB		  " ::: "memory" );
 
@@ -118,7 +116,6 @@
 volatile uint32_t ulCPSR;
 
 	__asm volatile ( "MRS %0, CPSR" : "=r" (ulCPSR) :: "memory" );
-
 	ulCPSR &= portINTERRUPT_ENABLE_BIT;
 	portDISABLE_INTERRUPTS();
 	return ulCPSR;
@@ -130,8 +127,8 @@
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site.  These are
- * not required for this port but included in case common demo code that uses these
+not required for this port but included in case common demo code that uses these
- * macros is used. */
+macros is used. */
 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
 #define portTASK_FUNCTION( vFunction, pvParameters )	void vFunction( void *pvParameters )
 
@@ -142,11 +139,11 @@
 #endif
 
 /* Prototype of the FreeRTOS tick handler.  This must be installed as the
- * handler for whichever peripheral is used to generate the RTOS tick. */
+handler for whichever peripheral is used to generate the RTOS tick. */
 void FreeRTOS_Tick_Handler( void );
 
 /* Any task that uses the floating point unit MUST call vPortTaskUsesFPU()
- * before any floating point instructions are executed. */
+before any floating point instructions are executed. */
 void vPortTaskUsesFPU( void );
 #define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()
 
@@ -181,3 +178,4 @@
 
 
 #endif /* PORTMACRO_H */
+

portable/GCC/ATMega323/port.c

@@ -26,12 +26,12 @@
  */
 
 /* 
- *
+
- * Changes from V2.6.0
+Changes from V2.6.0
- *
+
 	+ AVR port - Replaced the inb() and outb() functions with direct memory
- +    access.  This allows the port to be built with the 20050414 build of
+	  access.  This allows the port to be built with the 20050414 build of
- +    WinAVR.
+	  WinAVR.
 */
 
 #include <stdlib.h>
@@ -56,7 +56,7 @@
 /*-----------------------------------------------------------*/
 
 /* We require the address of the pxCurrentTCB variable, but don't want to know
- * any details of its type. */
+any details of its type. */
 typedef void TCB_t;
 extern volatile TCB_t * volatile pxCurrentTCB;
 
@@ -182,14 +182,12 @@ static void prvSetupTimerInterrupt( void );
 /* 
  * See header file for description. 
  */
-StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
-                                     TaskFunction_t pxCode,
-                                     void * pvParameters )
 {
 uint16_t usAddress;
 
 	/* Place a few bytes of known values on the bottom of the stack. 
-     * This is just useful for debugging. */
+	This is just useful for debugging. */
 
 	*pxTopOfStack = 0x11;
 	pxTopOfStack--;
@@ -199,12 +197,12 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 	pxTopOfStack--;
 
 	/* Simulate how the stack would look after a call to vPortYield() generated by 
-     * the compiler. */
+	the compiler. */
 
 	/*lint -e950 -e611 -e923 Lint doesn't like this much - but nothing I can do about it. */
 
 	/* The start of the task code will be popped off the stack last, so place
-     * it on first. */
+	it on first. */
 	usAddress = ( uint16_t ) pxCode;
 	*pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
 	pxTopOfStack--;
@@ -214,9 +212,9 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 	pxTopOfStack--;
 
 	/* Next simulate the stack as if after a call to portSAVE_CONTEXT().  
-     *  portSAVE_CONTEXT places the flags on the stack immediately after r0
+	portSAVE_CONTEXT places the flags on the stack immediately after r0
-     *  to ensure the interrupts get disabled as soon as possible, and so ensuring
+	to ensure the interrupts get disabled as soon as possible, and so ensuring
-     *  the stack use is minimal should a context switch interrupt occur. */
+	the stack use is minimal should a context switch interrupt occur. */
 	*pxTopOfStack = ( StackType_t ) 0x00;	/* R0 */
 	pxTopOfStack--;
 	*pxTopOfStack = portFLAGS_INT_ENABLED;
@@ -308,7 +306,7 @@ BaseType_t xPortStartScheduler( void )
 	portRESTORE_CONTEXT();
 
 	/* Simulate a function call end as generated by the compiler.  We will now
-     * jump to the start of the task the context of which we have just restored. */
+	jump to the start of the task the context of which we have just restored. */
 	asm volatile ( "ret" );
 
 	/* Should not get here. */
@@ -319,7 +317,7 @@ BaseType_t xPortStartScheduler( void )
 void vPortEndScheduler( void )
 {
 	/* It is unlikely that the AVR port will get stopped.  If required simply
-     * disable the tick interrupt here. */
+	disable the tick interrupt here. */
 }
 /*-----------------------------------------------------------*/
 
@@ -348,12 +346,10 @@ void vPortYieldFromTick( void ) __attribute__( ( naked ) );
 void vPortYieldFromTick( void )
 {
 	portSAVE_CONTEXT();
-
 	if( xTaskIncrementTick() != pdFALSE )
 	{
 		vTaskSwitchContext();
 	}
-
 	portRESTORE_CONTEXT();
 
 	asm volatile ( "ret" );
@@ -369,7 +365,7 @@ static void prvSetupTimerInterrupt( void )
 uint8_t ucHighByte, ucLowByte;
 
 	/* Using 16bit timer 1 to generate the tick.  Correct fuses must be
-     * selected for the configCPU_CLOCK_HZ clock. */
+	selected for the configCPU_CLOCK_HZ clock. */
 
 	ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
 
@@ -380,7 +376,7 @@ static void prvSetupTimerInterrupt( void )
 	ulCompareMatch -= ( uint32_t ) 1;
 
 	/* Setup compare match value for compare match A.  Interrupts are disabled 
-     * before this is called so we need not worry here. */
+	before this is called so we need not worry here. */
 	ucLowByte = ( uint8_t ) ( ulCompareMatch & ( uint32_t ) 0xff );
 	ulCompareMatch >>= 8;
 	ucHighByte = ( uint8_t ) ( ulCompareMatch & ( uint32_t ) 0xff );
@@ -392,7 +388,7 @@ static void prvSetupTimerInterrupt( void )
 	TCCR1B = ucLowByte;
 
 	/* Enable the interrupt - this is okay as interrupt are currently globally
-     * disabled. */
+	disabled. */
 	ucLowByte = TIMSK;
 	ucLowByte |= portCOMPARE_MATCH_A_INTERRUPT_ENABLE;
 	TIMSK = ucLowByte;
@@ -424,4 +420,7 @@ static void prvSetupTimerInterrupt( void )
 	{
 		xTaskIncrementTick();
 	}
-#endif /* if configUSE_PREEMPTION == 1 */
+#endif
+
+
+	

portable/GCC/ATMega323/portmacro.h

@@ -26,10 +26,10 @@
  */
 
 /*
- * Changes from V1.2.3
+Changes from V1.2.3
- *
+
 	+ portCPU_CLOSK_HZ definition changed to 8MHz base 10, previously it
- +    base 16.
+	  base 16.
 */
 
 #ifndef PORTMACRO_H
@@ -72,13 +72,11 @@
 /*-----------------------------------------------------------*/
 
 /* Critical section management. */
-    #define portENTER_CRITICAL()                    \
+#define portENTER_CRITICAL()		asm volatile ( "in		__tmp_reg__, __SREG__" :: );	\
-    asm volatile ( "in		__tmp_reg__, __SREG__"::); \
 									asm volatile ( "cli" :: );								\
 									asm volatile ( "push	__tmp_reg__" :: )
 
-    #define portEXIT_CRITICAL()            \
+#define portEXIT_CRITICAL()			asm volatile ( "pop		__tmp_reg__" :: );				\
-    asm volatile ( "pop		__tmp_reg__"::); \
 									asm volatile ( "out		__SREG__, __tmp_reg__" :: )
 
 #define portDISABLE_INTERRUPTS()	asm volatile ( "cli" :: );
@@ -106,3 +104,4 @@
 #endif
 
 #endif /* PORTMACRO_H */
+

portable/GCC/AVR32_UC3/port.c

@@ -1,5 +1,4 @@
 /*This file has been prepared for Doxygen automatic documentation generation.*/
-
 /*! \file *********************************************************************
  *
  * \brief FreeRTOS port source for AVR32 UC3.
@@ -106,11 +105,13 @@ void _init_startup( void )
 	INTC_init_interrupts();
 
 	#if configHEAP_INIT
+
 		/* Initialize the heap used by malloc. */
 		for( pxMem = &__heap_start__; pxMem < ( BaseType_t * )&__heap_end__; )
 		{
 			*pxMem++ = 0xA5A5A5A5;
 		}
+
 	#endif
 
 	/* Give the used CPU clock frequency to Newlib, so it can work properly. */
@@ -131,7 +132,7 @@ void _init_startup( void )
 		                    sizeof( DBG_USART_GPIO_MAP ) / sizeof( DBG_USART_GPIO_MAP[0] ) );
 		usart_init( configDBG_USART_BAUDRATE );
 	}
-    #endif /* if configDBG */
+	#endif
 }
 /*-----------------------------------------------------------*/
 
@@ -171,8 +172,7 @@ void __malloc_unlock( struct _reent * ptr )
 /*-----------------------------------------------------------*/
 
 /* Added as there is no such function in FreeRTOS. */
-void * pvPortRealloc( void * pv,
+void *pvPortRealloc( void *pv, size_t xWantedSize )
-                      size_t xWantedSize )
 {
 void *pvReturn;
 
@@ -187,10 +187,9 @@ void * pvPortRealloc( void * pv,
 /*-----------------------------------------------------------*/
 
 /* The cooperative scheduler requires a normal IRQ service routine to
- * simply increment the system tick. */
+simply increment the system tick. */
-
 /* The preemptive scheduler is defined as "naked" as the full context is saved
- * on entry as part of the context switch. */
+on entry as part of the context switch. */
 __attribute__((__naked__)) static void vTick( void )
 {
 	/* Save the context of the interrupted task. */
@@ -200,14 +199,13 @@ __attribute__( ( __naked__ ) ) static void vTick( void )
 		/* Clear the interrupt flag. */
 		prvClearTcInt();
 	#else
-
 		/* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
-         * clock cycles from now. */
+		clock cycles from now. */
 		prvScheduleNextTick();
 	#endif
 
 	/* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
-     * calls in a critical section . */
+	calls in a critical section . */
 	portENTER_CRITICAL();
 		xTaskIncrementTick();
 	portEXIT_CRITICAL();
@@ -227,17 +225,17 @@ __attribute__( ( __naked__ ) ) void SCALLYield( void )
 /*-----------------------------------------------------------*/
 
 /* The code generated by the GCC compiler uses the stack in different ways at
- * different optimisation levels.  The interrupt flags can therefore not always
+different optimisation levels.  The interrupt flags can therefore not always
- * be saved to the stack.  Instead the critical section nesting level is stored
+be saved to the stack.  Instead the critical section nesting level is stored
- * in a variable, which is then saved as part of the stack context. */
+in a variable, which is then saved as part of the stack context. */
 __attribute__((__noinline__)) void vPortEnterCritical( void )
 {
 	/* Disable interrupts */
 	portDISABLE_INTERRUPTS();
 
 	/* Now interrupts are disabled ulCriticalNesting can be accessed
-     * directly.  Increment ulCriticalNesting to keep a count of how many times
+	 directly.  Increment ulCriticalNesting to keep a count of how many times
-     * portENTER_CRITICAL() has been called. */
+	 portENTER_CRITICAL() has been called. */
 	ulCriticalNesting++;
 }
 /*-----------------------------------------------------------*/
@@ -247,7 +245,6 @@ __attribute__( ( __noinline__ ) ) void vPortExitCritical( void )
 	if(ulCriticalNesting > portNO_CRITICAL_NESTING)
 	{
 		ulCriticalNesting--;
-
 		if( ulCriticalNesting == portNO_CRITICAL_NESTING )
 		{
 			/* Enable all interrupt/exception. */
@@ -263,12 +260,10 @@ __attribute__( ( __noinline__ ) ) void vPortExitCritical( void )
  *
  * See header file for description.
  */
-StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
-                                     TaskFunction_t pxCode,
-                                     void * pvParameters )
 {
 	/* Setup the initial stack of the task.  The stack is set exactly as
-     * expected by the portRESTORE_CONTEXT() macro. */
+	expected by the portRESTORE_CONTEXT() macro. */
 
 	/* When the task starts, it will expect to find the function parameter in R12. */
 	pxTopOfStack--;
@@ -297,7 +292,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 BaseType_t xPortStartScheduler( void )
 {
 	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-     * here already. */
+	here already. */
 	prvSetupTimerInterrupt();
 
 	/* Start the first task. */
@@ -311,12 +306,12 @@ BaseType_t xPortStartScheduler( void )
 void vPortEndScheduler( void )
 {
 	/* It is unlikely that the AVR32 port will require this function as there
-     * is nothing to return to.  */
+	is nothing to return to.  */
 }
 /*-----------------------------------------------------------*/
 
 /* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
- * clock cycles from now. */
+clock cycles from now. */
 #if( configTICK_USE_TC==0 )
 	static void prvScheduleFirstTick(void)
 	{
@@ -324,14 +319,12 @@ void vPortEndScheduler( void )
 
 		lCycles = Get_system_register(AVR32_COUNT);
 		lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
-
+		// If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
-        /* If lCycles ends up to be 0, make it 1 so that the COMPARE and exception */
+		// generation feature does not get disabled.
-        /* generation feature does not get disabled. */
 		if(0 == lCycles)
 		{
 			lCycles++;
 		}
-
 		Set_system_register(AVR32_COMPARE, lCycles);
 	}
 	
@@ -341,38 +334,35 @@ void vPortEndScheduler( void )
 
 		lCycles = Get_system_register(AVR32_COMPARE);
 		lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
-
+		// If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
-        /* If lCycles ends up to be 0, make it 1 so that the COMPARE and exception */
+		// generation feature does not get disabled.
-        /* generation feature does not get disabled. */
 		if(0 == lCycles)
 		{
 			lCycles++;
 		}
-
 		lCount = Get_system_register(AVR32_COUNT);
-
 		if( lCycles < lCount )
-        { /* We missed a tick, recover for the next. */
+		{		// We missed a tick, recover for the next.
 			lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
 		}
-
 		Set_system_register(AVR32_COMPARE, lCycles);
 	}
-#else /* if ( configTICK_USE_TC == 0 ) */
+#else
 	__attribute__((__noinline__)) static void prvClearTcInt(void)
 	{
 		AVR32_TC.channel[configTICK_TC_CHANNEL].sr;
 	}
-#endif /* if ( configTICK_USE_TC == 0 ) */
+#endif
 /*-----------------------------------------------------------*/
 
 /* Setup the timer to generate the tick interrupts. */
 static void prvSetupTimerInterrupt(void)
 {
 #if( configTICK_USE_TC==1 )
+
 	volatile avr32_tc_t *tc = &AVR32_TC;
 
-        /* Options for waveform genration. */
+	// Options for waveform genration.
 	tc_waveform_opt_t waveform_opt =
 	{
 	.channel  = configTICK_TC_CHANNEL,             /* Channel selection. */
@@ -410,13 +400,14 @@ static void prvSetupTimerInterrupt( void )
 		.lovrs=0,
 		.covfs=0,
 	};
-    #endif /* if ( configTICK_USE_TC == 1 ) */
+
+#endif
 
 	/* Disable all interrupt/exception. */
 	portDISABLE_INTERRUPTS();
 
 	/* Register the compare interrupt handler to the interrupt controller and
-     * enable the compare interrupt. */
+	enable the compare interrupt. */
 
 	#if( configTICK_USE_TC==1 )
 	{
@@ -426,8 +417,8 @@ static void prvSetupTimerInterrupt( void )
 		tc_init_waveform(tc, &waveform_opt);
 
 		/* Set the compare triggers.
-             * Remember TC counter is 16-bits, so counting second is not possible!
+		Remember TC counter is 16-bits, so counting second is not possible!
-             * That's why we configure it to count ms. */
+		That's why we configure it to count ms. */
 		tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ / 4) / configTICK_RATE_HZ );
 
 		tc_configure_interrupts( tc, configTICK_TC_CHANNEL, &tc_interrupt );
@@ -435,10 +426,10 @@ static void prvSetupTimerInterrupt( void )
 		/* Start the timer/counter. */
 		tc_start(tc, configTICK_TC_CHANNEL);
 	}
-    #else /* if ( configTICK_USE_TC == 1 ) */
+	#else
 	{
 		INTC_register_interrupt(&vTick, AVR32_CORE_COMPARE_IRQ, INT0);
 		prvScheduleFirstTick();
 	}
-    #endif /* if ( configTICK_USE_TC == 1 ) */
+	#endif
 }

portable/GCC/AVR32_UC3/portmacro.h

@@ -1,5 +1,4 @@
 /*This file has been prepared for Doxygen automatic documentation generation.*/
-
 /*! \file *********************************************************************
  *
  * \brief FreeRTOS port source for AVR32 UC3.
@@ -149,8 +148,7 @@
 
 
 /* Added as there is no such function in FreeRTOS. */
-    extern void * pvPortRealloc( void * pv,
+extern void *pvPortRealloc( void *pv, size_t xSize );
-                                 size_t xSize );
 /*-----------------------------------------------------------*/
 
 
@@ -207,25 +205,25 @@
  * are not the same between INT0..3 exceptions and the scall exception.
  */
 
-/* Task context stack layout: */
+// Task context stack layout:
-/* R8  (*) */
+  // R8  (*)
-/* R9  (*) */
+  // R9  (*)
-/* R10 (*) */
+  // R10 (*)
-/* R11 (*) */
+  // R11 (*)
-/* R12 (*) */
+  // R12 (*)
-/* R14/LR (*) */
+  // R14/LR (*)
-/* R15/PC (*) */
+  // R15/PC (*)
-/* SR (*) */
+  // SR (*)
-/* R0 */
+  // R0
-/* R1 */
+  // R1
-/* R2 */
+  // R2
-/* R3 */
+  // R3
-/* R4 */
+  // R4
-/* R5 */
+  // R5
-/* R6 */
+  // R6
-/* R7 */
+  // R7
-/* ulCriticalNesting */
+  // ulCriticalNesting
-/* (*) automatically done for INT0..INT3, but not for SCALL */
+// (*) automatically done for INT0..INT3, but not for SCALL
 
 /*
  * The ISR used for the scheduler tick depends on whether the cooperative or
@@ -260,7 +258,7 @@
   );																					\
 }
 
-    #else /* if configUSE_PREEMPTION == 0 */
+#else
 
 /*
  * portSAVE_CONTEXT_OS_INT() for OS Tick exception.
@@ -374,7 +372,7 @@
   );																								\
 }
 
-    #endif /* if configUSE_PREEMPTION == 0 */
+#endif
 
 
 /*
@@ -536,7 +534,7 @@
   );																						\
 }
 
-    #else /* if configUSE_PREEMPTION == 0 */
+#else
 
 /*
  * ISR entry and exit macros.  These are only required if a task switch
@@ -653,7 +651,7 @@
   );																						\
 }
 
-    #endif /* if configUSE_PREEMPTION == 0 */
+#endif
 
 
 #define portYIELD()                 {__asm__ __volatile__ ("scall");}

portable/GCC/AVR_AVRDx/port.c

@@ -23,7 +23,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 #include <stdlib.h>
@@ -43,7 +42,7 @@
 /*-----------------------------------------------------------*/
 
 /* We require the address of the pxCurrentTCB variable, but don't want to know
-any details of its type. */
+ * any details of its type. */
 typedef void RTOS_TCB_t;
 extern volatile RTOS_TCB_t * volatile pxCurrentTCB;
 
@@ -171,23 +170,25 @@ static void prvSetupTimerInterrupt(void);
 /*
  * See header file for description.
  */
-StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters)
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
 {
     uint16_t usAddress;
 
     /*lint -e950 -e611 -e923 Lint doesn't like this much - but nothing I can do about it. */
 
     /* Place a few bytes of known values on the bottom of the stack.
-    This is just useful for debugging. Uncomment if needed. */
+     * This is just useful for debugging. Uncomment if needed. */
-    // *pxTopOfStack = 0x11;
+    /* *pxTopOfStack = 0x11; */
-    // pxTopOfStack--;
+    /* pxTopOfStack--; */
-    // *pxTopOfStack = 0x22;
+    /* *pxTopOfStack = 0x22; */
-    // pxTopOfStack--;
+    /* pxTopOfStack--; */
-    // *pxTopOfStack = 0x33; 
+    /* *pxTopOfStack = 0x33; */
-    // pxTopOfStack--;
+    /* pxTopOfStack--; */
 
     /* The start of the task code will be popped off the stack last, so place
-    it on first. */
+     * it on first. */
     usAddress = ( uint16_t ) pxCode;
     *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
     pxTopOfStack--;
@@ -197,9 +198,9 @@ StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxC
     pxTopOfStack--;
 
     /* Next simulate the stack as if after a call to portSAVE_CONTEXT().
-    portSAVE_CONTEXT places the flags on the stack immediately after r0
+    *  portSAVE_CONTEXT places the flags on the stack immediately after r0
-    to ensure the interrupts get disabled as soon as possible, and so ensuring
+    *  to ensure the interrupts get disabled as soon as possible, and so ensuring
-    the stack use is minimal should a context switch interrupt occur. */
+    *  the stack use is minimal should a context switch interrupt occur. */
     *pxTopOfStack = ( StackType_t ) 0x00; /* R0 */
     pxTopOfStack--;
     *pxTopOfStack = portFLAGS_INT_ENABLED;
@@ -239,7 +240,7 @@ BaseType_t xPortStartScheduler(void)
     portRESTORE_CONTEXT();
 
     /* Simulate a function call end as generated by the compiler.  We will now
-    jump to the start of the task the context of which we have just restored. */
+     * jump to the start of the task the context of which we have just restored. */
     asm volatile ( "ret" );
 
     /* Should not get here. */
@@ -291,7 +292,9 @@ void vPortYieldFromTick(void) __attribute__((naked));
 void vPortYieldFromTick( void )
 {
     portSAVE_CONTEXT();
-    if (xTaskIncrementTick() != pdFALSE) {
+
+    if( xTaskIncrementTick() != pdFALSE )
+    {
         vTaskSwitchContext();
     }
 
@@ -326,7 +329,7 @@ ISR(TICK_INT_vect, ISR_NAKED)
 
         asm volatile ( "reti" );
     }
-#else
+#else  /* if configUSE_PREEMPTION == 1 */
 
 /*
  * Tick ISR for the cooperative scheduler.  All this does is increment the
@@ -339,4 +342,4 @@ ISR(TICK_INT_vect)
         INT_FLAGS = INT_MASK;
         xTaskIncrementTick();
     }
-#endif
+#endif /* if configUSE_PREEMPTION == 1 */

portable/GCC/AVR_AVRDx/porthardware.h

@@ -21,7 +21,8 @@
     #define INT_FLAGS        TCB0_INTFLAGS
     #define INT_MASK         TCB_CAPT_bm
 
-    #define TICK_init()         { \
+    #define TICK_init()                                      \
+    {                                                        \
         TCB0.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
         TCB0.INTCTRL = TCB_CAPT_bm;                          \
         TCB0.CTRLA = TCB_ENABLE_bm;                          \
@@ -33,7 +34,8 @@
     #define INT_FLAGS        TCB1_INTFLAGS
     #define INT_MASK         TCB_CAPT_bm
 
-    #define TICK_init()         { \
+    #define TICK_init()                                      \
+    {                                                        \
         TCB1.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
         TCB1.INTCTRL = TCB_CAPT_bm;                          \
         TCB1.CTRLA = TCB_ENABLE_bm;                          \
@@ -45,7 +47,8 @@
     #define INT_FLAGS        TCB2_INTFLAGS
     #define INT_MASK         TCB_CAPT_bm
 
-    #define TICK_init()         { \
+    #define TICK_init()                                      \
+    {                                                        \
         TCB2.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
         TCB2.INTCTRL = TCB_CAPT_bm;                          \
         TCB2.CTRLA = TCB_ENABLE_bm;                          \
@@ -57,7 +60,8 @@
     #define INT_FLAGS        TCB3_INTFLAGS
     #define INT_MASK         TCB_CAPT_bm
 
-    #define TICK_init()         { \
+    #define TICK_init()                                      \
+    {                                                        \
         TCB3.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
         TCB3.INTCTRL = TCB_CAPT_bm;                          \
         TCB3.CTRLA = TCB_ENABLE_bm;                          \
@@ -69,7 +73,8 @@
     #define INT_FLAGS        TCB4_INTFLAGS
     #define INT_MASK         TCB_CAPT_bm
 
-    #define TICK_init()         { \
+    #define TICK_init()                                      \
+    {                                                        \
         TCB4.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
         TCB4.INTCTRL = TCB_CAPT_bm;                          \
         TCB4.CTRLA = TCB_ENABLE_bm;                          \
@@ -83,20 +88,21 @@
 
 /* Hertz to period for RTC setup */
     #define RTC_PERIOD_HZ( x )    ( 32768 * ( ( 1.0 / x ) ) )
-    #define TICK_init()         { \
+    #define TICK_init()                                        \
-                                while (RTC.STATUS > 0); \
+    {                                                          \
+        while( RTC.STATUS > 0 ) {; }                           \
         RTC.CTRLA = RTC_PRESCALER_DIV1_gc | 1 << RTC_RTCEN_bp; \
         RTC.PER = RTC_PERIOD_HZ( configTICK_RATE_HZ );         \
         RTC.INTCTRL |= 1 << RTC_OVF_bp;                        \
     }
 
-#else
+#else /* if ( configUSE_TIMER_INSTANCE == 0 ) */
     #undef TICK_INT_vect
     #undef INT_FLAGS
     #undef INT_MASK
     #undef TICK_init()
     #error Invalid timer setting.
-#endif
+#endif /* if ( configUSE_TIMER_INSTANCE == 0 ) */
 
 /*-----------------------------------------------------------*/
 

portable/GCC/AVR_AVRDx/portmacro.h

@@ -22,15 +22,16 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
 #define PORTMACRO_H
 
+/* *INDENT-OFF* */
     #ifdef __cplusplus
         extern "C" {
     #endif
+/* *INDENT-ON* */
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -99,8 +100,10 @@ extern void vPortYieldFromISR(void) __attribute__((naked));
 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
 #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 
+/* *INDENT-OFF* */
     #ifdef __cplusplus
         }
     #endif
+/* *INDENT-ON* */
 
 #endif /* PORTMACRO_H */

portable/GCC/AVR_Mega0/port.c

@@ -23,7 +23,6 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 #include <stdlib.h>
@@ -43,7 +42,7 @@
 /*-----------------------------------------------------------*/
 
 /* We require the address of the pxCurrentTCB variable, but don't want to know
-any details of its type. */
+ * any details of its type. */
 typedef void RTOS_TCB_t;
 extern volatile RTOS_TCB_t * volatile pxCurrentTCB;
 
@@ -167,23 +166,25 @@ static void prvSetupTimerInterrupt(void);
 /*
  * See header file for description.
  */
-StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters)
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                     TaskFunction_t pxCode,
+                                     void * pvParameters )
 {
     uint16_t usAddress;
 
     /*lint -e950 -e611 -e923 Lint doesn't like this much - but nothing I can do about it. */
 
     /* Place a few bytes of known values on the bottom of the stack.
-    This is just useful for debugging. Uncomment if needed. */
+     * This is just useful for debugging. Uncomment if needed. */
-    // *pxTopOfStack = 0x11;
+    /* *pxTopOfStack = 0x11; */
-    // pxTopOfStack--;
+    /* pxTopOfStack--; */
-    // *pxTopOfStack = 0x22;
+    /* *pxTopOfStack = 0x22; */
-    // pxTopOfStack--;
+    /* pxTopOfStack--; */
-    // *pxTopOfStack = 0x33; 
+    /* *pxTopOfStack = 0x33; */
-    // pxTopOfStack--;
+    /* pxTopOfStack--; */
 
     /* The start of the task code will be popped off the stack last, so place
-    it on first. */
+     * it on first. */
     usAddress = ( uint16_t ) pxCode;
     *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
     pxTopOfStack--;
@@ -193,9 +194,9 @@ StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxC
     pxTopOfStack--;
 
     /* Next simulate the stack as if after a call to portSAVE_CONTEXT().
-    portSAVE_CONTEXT places the flags on the stack immediately after r0
+    *  portSAVE_CONTEXT places the flags on the stack immediately after r0
-    to ensure the interrupts get disabled as soon as possible, and so ensuring
+    *  to ensure the interrupts get disabled as soon as possible, and so ensuring
-    the stack use is minimal should a context switch interrupt occur. */
+    *  the stack use is minimal should a context switch interrupt occur. */
     *pxTopOfStack = ( StackType_t ) 0x00; /* R0 */
     pxTopOfStack--;
     *pxTopOfStack = portFLAGS_INT_ENABLED;
@@ -233,7 +234,7 @@ BaseType_t xPortStartScheduler(void)
     portRESTORE_CONTEXT();
 
     /* Simulate a function call end as generated by the compiler.  We will now
-    jump to the start of the task the context of which we have just restored. */
+     * jump to the start of the task the context of which we have just restored. */
     asm volatile ( "ret" );
 
     /* Should not get here. */
@@ -285,7 +286,9 @@ void vPortYieldFromTick(void) __attribute__((naked));
 void vPortYieldFromTick( void )
 {
     portSAVE_CONTEXT();
-    if (xTaskIncrementTick() != pdFALSE) {
+
+    if( xTaskIncrementTick() != pdFALSE )
+    {
         vTaskSwitchContext();
     }
 
@@ -320,7 +323,7 @@ ISR(TICK_INT_vect, ISR_NAKED)
 
         asm volatile ( "reti" );
     }
-#else
+#else  /* if configUSE_PREEMPTION == 1 */
 
 /*
  * Tick ISR for the cooperative scheduler.  All this does is increment the
@@ -333,4 +336,4 @@ ISR(TICK_INT_vect)
         INT_FLAGS = INT_MASK;
         xTaskIncrementTick();
     }
-#endif
+#endif /* if configUSE_PREEMPTION == 1 */

portable/GCC/AVR_Mega0/porthardware.h

@@ -21,7 +21,8 @@
     #define INT_FLAGS        TCB0_INTFLAGS
     #define INT_MASK         TCB_CAPT_bm
 
-    #define TICK_init()         { \
+    #define TICK_init()                                      \
+    {                                                        \
         TCB0.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
         TCB0.INTCTRL = TCB_CAPT_bm;                          \
         TCB0.CTRLA = TCB_ENABLE_bm;                          \
@@ -33,7 +34,8 @@
     #define INT_FLAGS        TCB1_INTFLAGS
     #define INT_MASK         TCB_CAPT_bm
 
-    #define TICK_init()         { \
+    #define TICK_init()                                      \
+    {                                                        \
         TCB1.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
         TCB1.INTCTRL = TCB_CAPT_bm;                          \
         TCB1.CTRLA = TCB_ENABLE_bm;                          \
@@ -45,7 +47,8 @@
     #define INT_FLAGS        TCB2_INTFLAGS
     #define INT_MASK         TCB_CAPT_bm
 
-    #define TICK_init()         { \
+    #define TICK_init()                                      \
+    {                                                        \
         TCB2.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
         TCB2.INTCTRL = TCB_CAPT_bm;                          \
         TCB2.CTRLA = TCB_ENABLE_bm;                          \
@@ -57,7 +60,8 @@
     #define INT_FLAGS        TCB3_INTFLAGS
     #define INT_MASK         TCB_CAPT_bm
 
-    #define TICK_init()         { \
+    #define TICK_init()                                      \
+    {                                                        \
         TCB3.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
         TCB3.INTCTRL = TCB_CAPT_bm;                          \
         TCB3.CTRLA = TCB_ENABLE_bm;                          \
@@ -71,20 +75,21 @@
 
 /* Hertz to period for RTC setup */
     #define RTC_PERIOD_HZ( x )    ( 32768 * ( ( 1.0 / x ) ) )
-    #define TICK_init()         { \
+    #define TICK_init()                                        \
-                                while (RTC.STATUS > 0); \
+    {                                                          \
+        while( RTC.STATUS > 0 ) {; }                           \
         RTC.CTRLA = RTC_PRESCALER_DIV1_gc | 1 << RTC_RTCEN_bp; \
         RTC.PER = RTC_PERIOD_HZ( configTICK_RATE_HZ );         \
         RTC.INTCTRL |= 1 << RTC_OVF_bp;                        \
     }
 
-#else
+#else /* if ( configUSE_TIMER_INSTANCE == 0 ) */
     #undef TICK_INT_vect
     #undef INT_FLAGS
     #undef INT_MASK
     #undef TICK_init()
     #error Invalid timer setting.
-#endif
+#endif /* if ( configUSE_TIMER_INSTANCE == 0 ) */
 
 /*-----------------------------------------------------------*/
 

portable/GCC/AVR_Mega0/portmacro.h

@@ -22,15 +22,16 @@
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
 #define PORTMACRO_H
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
     extern "C" {
 #endif
+/* *INDENT-ON* */
 
 /*-----------------------------------------------------------
  * Port specific definitions.
@@ -99,8 +100,10 @@ extern void vPortYieldFromISR(void) __attribute__((naked));
 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
 #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 
+/* *INDENT-OFF* */
 #ifdef __cplusplus
     }
 #endif
+/* *INDENT-ON* */
 
 #endif /* PORTMACRO_H */

portable/GCC/CORTUS_APS3/port.c

@@ -48,12 +48,10 @@
 static void prvSetupTimerInterrupt( void );
 /*-----------------------------------------------------------*/
 
-StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+StackType_t *pxPortInitialiseStack( StackType_t * pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
-                                     TaskFunction_t pxCode,
-                                     void * pvParameters )
 {
 	/* Make space on the stack for the context - this leaves a couple of spaces
-     * empty.  */
+	empty.  */
 	pxTopOfStack -= 20;
 
 	/* Fill the registers with known values to assist debugging. */

portable/GCC/ColdFire_V2/port.c

@@ -35,14 +35,12 @@
 #define portINITIAL_STATUS_REGISTER		( ( StackType_t ) 0x2000)
 
 /* Used to keep track of the number of nested calls to taskENTER_CRITICAL().  This
- * will be set to 0 prior to the first task being started. */
+will be set to 0 prior to the first task being started. */
 static uint32_t ulCriticalNesting = 0x9999UL;
 
 /*-----------------------------------------------------------*/
 
-StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+StackType_t *pxPortInitialiseStack( StackType_t * pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
-                                     TaskFunction_t pxCode,
-                                     void * pvParameters )
 {
 	*pxTopOfStack = ( StackType_t ) pvParameters;
 	pxTopOfStack--;
@@ -91,20 +89,19 @@ void vPortEnterCritical( void )
 	if( ulCriticalNesting == 0UL )
 	{
 		/* Guard against context switches being pended simultaneously with a
-         * critical section being entered. */
+		critical section being entered. */
 		do
 		{
 			portDISABLE_INTERRUPTS();
-
 			if( MCF_INTC0_INTFRCL == 0UL )
 			{
 				break;
 			}
 
 			portENABLE_INTERRUPTS();
+
 		} while( 1 );
 	}
-
 	ulCriticalNesting++;
 }
 /*-----------------------------------------------------------*/
@@ -112,7 +109,6 @@ void vPortEnterCritical( void )
 void vPortExitCritical( void )
 {
 	ulCriticalNesting--;
-
 	if( ulCriticalNesting == 0 )
 	{
 		portENABLE_INTERRUPTS();
@@ -130,3 +126,9 @@ void vPortYieldHandler( void )
 		vTaskSwitchContext();
 	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulSavedInterruptMask );
 }
+
+
+
+
+
+

portable/GCC/ColdFire_V2/portmacro.h

@@ -100,8 +100,7 @@
 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
 /*-----------------------------------------------------------*/
 
-    #define portEND_SWITCHING_ISR( xSwitchRequired ) \
+#define portEND_SWITCHING_ISR( xSwitchRequired )	if( xSwitchRequired != pdFALSE )	\
-    if( xSwitchRequired != pdFALSE )                 \
 													{									\
 														portYIELD();					\
 													}
@@ -112,3 +111,4 @@
 #endif
 
 #endif /* PORTMACRO_H */
+

portable/GCC/H8S2329/port.c

@@ -63,22 +63,19 @@ void vPortYield( void ) __attribute__( ( saveall, interrupt_handler ) );
 /* 
  * See header file for description. 
  */
-StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
-                                     TaskFunction_t pxCode,
-                                     void * pvParameters )
 {
 uint32_t ulValue;
 
 	/* This requires an even address. */
 	ulValue = ( uint32_t ) pxTopOfStack;
-
 	if( ulValue & 1UL )
 	{
 		pxTopOfStack = pxTopOfStack - 1;
 	}
 
 	/* Place a few bytes of known values on the bottom of the stack. 
-     * This is just useful for debugging. */
+	This is just useful for debugging. */
 	pxTopOfStack--;
 	*pxTopOfStack = 0xaa;
 	pxTopOfStack--;
@@ -89,7 +86,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 	*pxTopOfStack = 0xdd;
 
 	/* The initial stack mimics an interrupt stack.  First there is the program
-     * counter (24 bits). */
+	counter (24 bits). */
 	ulValue = ( uint32_t ) pxCode;
 
 	pxTopOfStack--;
@@ -106,8 +103,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 	*pxTopOfStack = portINITIAL_CCR;
 
 	/* Next all the general purpose registers - with the parameters being passed
-     * in ER0.  The parameter order must match that used by the compiler when the
+	in ER0.  The parameter order must match that used by the compiler when the
-     * "saveall" function attribute is used. */
+	"saveall" function attribute is used. */
 
 	/* ER6 */
 	pxTopOfStack--;
@@ -196,8 +193,8 @@ BaseType_t xPortStartScheduler( void )
 	prvSetupTimerInterrupt();
 
 	/* Restore the context of the first task that is going to run.  This
-     * mirrors the function epilogue code generated by the compiler when the
+	mirrors the function epilogue code generated by the compiler when the
-     * "saveall" function attribute is used. */
+	"saveall" function attribute is used. */
 	asm volatile ( 
 					"MOV.L		@_pxCurrentTCB, ER6			\n\t"
 					"MOV.L		@ER6, ER7					\n\t"
@@ -260,7 +257,7 @@ void vPortYield( void )
 		portRESTORE_STACK_POINTER();
 	}
 
-#else /* if ( configUSE_PREEMPTION == 1 ) */
+#else
 
 	/*
 	 * The cooperative scheduler is being used so all we have to do is 
@@ -276,7 +273,7 @@ void vPortYield( void )
 		TSR1 &= ~0x01;
 	}
 
-#endif /* if ( configUSE_PREEMPTION == 1 ) */
+#endif
 /*-----------------------------------------------------------*/
 
 /*
@@ -296,8 +293,11 @@ static void prvSetupTimerInterrupt( void )
 	TGR1A = ulCompareMatch;
 
 	/* Start the timer and enable the interrupt - we can do this here as 
-     * interrupts are globally disabled when this function is called. */
+	interrupts are globally disabled when this function is called. */
 	TIER1 |= portTGRA_INTERRUPT_ENABLE;
 	TSTR |= portTIMER_CHANNEL;
 }
 /*-----------------------------------------------------------*/
+
+
+

portable/GCC/H8S2329/portmacro.h

@@ -78,8 +78,7 @@
 #define portDISABLE_INTERRUPTS()	asm volatile( "ORC  #0x80, CCR" );
 
 /* Push the CCR then disable interrupts. */
-    #define portENTER_CRITICAL()       \
+#define portENTER_CRITICAL()  		asm volatile( "STC	CCR, @-ER7" ); \
-    asm volatile ( "STC	CCR, @-ER7" ); \
                                		portDISABLE_INTERRUPTS();
 
 /* Pop the CCR to set the interrupt masking back to its previous state. */
@@ -89,9 +88,9 @@
 /* Task utilities. */
 
 /* Context switch macros.  These macros are very simple as the context
- * is saved simply by selecting the saveall attribute of the context switch
+is saved simply by selecting the saveall attribute of the context switch
- * interrupt service routines.  These macros save and restore the stack
+interrupt service routines.  These macros save and restore the stack
- * pointer to the TCB. */
+pointer to the TCB. */
 
 #define portSAVE_STACK_POINTER()								\
 extern void* pxCurrentTCB;										\
@@ -117,14 +116,14 @@
 /* Macros to allow a context switch from within an application ISR. */
 
 #define portENTER_SWITCHING_ISR() portSAVE_STACK_POINTER(); {
+
 #define portEXIT_SWITCHING_ISR( x )							\
 	if( x )													\
 	{														\
 		extern void vTaskSwitchContext( void );				\
 		vTaskSwitchContext();								\
 	}														\
-    }                                           \
+	} portRESTORE_STACK_POINTER();
-    portRESTORE_STACK_POINTER();
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site. */
@@ -136,3 +135,4 @@
 #endif
 
 #endif /* PORTMACRO_H */
+

portable/GCC/HCS12/port.c

@@ -46,40 +46,40 @@
 static void prvSetupTimerInterrupt( void );
 
 /* NOTE: Interrupt service routines must be in non-banked memory - as does the
- * scheduler startup function. */
+scheduler startup function. */
 #define ATTR_NEAR	__attribute__((near))
 
 /* Manual context switch function.  This is the SWI ISR. */
-/* __attribute__((interrupt)) */
+// __attribute__((interrupt))
 void ATTR_NEAR vPortYield( void );
 
 /* Tick context switch function.  This is the timer ISR. */
-/* __attribute__((interrupt)) */
+// __attribute__((interrupt))
 void ATTR_NEAR vPortTickInterrupt( void );
 
 /* Function in non-banked memory which actually switches to first task. */
 BaseType_t ATTR_NEAR xStartSchedulerNear( void );
 
 /* Calls to portENTER_CRITICAL() can be nested.  When they are nested the 
- * critical section should not be left (i.e. interrupts should not be re-enabled)
+critical section should not be left (i.e. interrupts should not be re-enabled)
- * until the nesting depth reaches 0.  This variable simply tracks the nesting
+until the nesting depth reaches 0.  This variable simply tracks the nesting 
- * depth.  Each task maintains it's own critical nesting depth variable so
+depth.  Each task maintains it's own critical nesting depth variable so 
- * uxCriticalNesting is saved and restored from the task stack during a context
+uxCriticalNesting is saved and restored from the task stack during a context
- * switch. */
+switch. */
-volatile UBaseType_t uxCriticalNesting = 0x80; /* un-initialized */
+volatile UBaseType_t uxCriticalNesting = 0x80;  // un-initialized
 
 /*-----------------------------------------------------------*/
 
 /* 
  * See header file for description. 
  */
-StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
-                                     TaskFunction_t pxCode,
-                                     void * pvParameters )
 {
+
+
 	/* Setup the initial stack of the task.  The stack is set exactly as 
-     * expected by the portRESTORE_CONTEXT() macro.  In this case the stack as
+	expected by the portRESTORE_CONTEXT() macro.  In this case the stack as
-     * expected by the HCS12 RTI instruction. */
+	expected by the HCS12 RTI instruction. */
 
 
 	/* The address of the task function is placed in the stack byte at a time. */
@@ -103,8 +103,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 	*--pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pvParameters) ) + 1 );
 
 	/* CCR: Note that when the task starts interrupts will be enabled since
-     * "I" bit of CCR is cleared */
+	"I" bit of CCR is cleared */
-    *--pxTopOfStack = ( StackType_t ) 0x80; /* keeps Stop disabled (MCU default) */
+	*--pxTopOfStack = ( StackType_t ) 0x80;		// keeps Stop disabled (MCU default)
 	
 	/* tmp softregs used by GCC. Values right now don't	matter. */
 	__asm("\n\
@@ -118,11 +118,11 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 
 	#ifdef BANKED_MODEL
 		/* The page of the task. */
-        *--pxTopOfStack = 0x30; /* can only directly start in PPAGE 0x30 */
+		*--pxTopOfStack = 0x30;      // can only directly start in PPAGE 0x30
 	#endif
 	
 	/* The critical nesting depth is initialised with 0 (meaning not in
-     * a critical section). */
+	a critical section). */
 	*--pxTopOfStack = ( StackType_t ) 0x00;
 
 
@@ -140,21 +140,20 @@ static void prvSetupTimerInterrupt( void )
 {
 	/* Enable hardware RTI timer */
 	/* Ignores configTICK_RATE_HZ */
-    RTICTL = 0x50;  /* 16 MHz xtal: 976.56 Hz, 1024mS */
+	RTICTL = 0x50;			// 16 MHz xtal: 976.56 Hz, 1024mS 
-    CRGINT |= 0x80; /* RTIE */
+	CRGINT |= 0x80;			// RTIE
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xPortStartScheduler( void )
 {
 	/* xPortStartScheduler() does not start the scheduler directly because 
-     * the header file containing the xPortStartScheduler() prototype is part
+	the header file containing the xPortStartScheduler() prototype is part 
-     * of the common kernel code, and therefore cannot use the CODE_SEG pragma.
+	of the common kernel code, and therefore cannot use the CODE_SEG pragma. 
-     * Instead it simply calls the locally defined xNearStartScheduler() -
+	Instead it simply calls the locally defined xNearStartScheduler() - 
-     * which does use the CODE_SEG pragma. */
+	which does use the CODE_SEG pragma. */
 
 	int16_t register d;
-
 	__asm ("jmp  xStartSchedulerNear		; will never return": "=d"(d));
 	return d;
 }
@@ -163,7 +162,7 @@ BaseType_t xPortStartScheduler( void )
 BaseType_t xStartSchedulerNear( void )
 {
 	/* Configure the timer that will generate the RTOS tick.  Interrupts are
-     * disabled when this function is called. */
+	disabled when this function is called. */
 	prvSetupTimerInterrupt();
 
 	/* Restore the context of the first task. */
@@ -187,10 +186,9 @@ BaseType_t xStartSchedulerNear( void )
 void vPortYield( void )
 {
 	portISR_HEAD();
-
 	/* NOTE: This is the trap routine (swi) although not defined as a trap.
-     * It will fill the stack the same way as an ISR in order to mix preemtion
+	   It will fill the stack the same way as an ISR in order to mix preemtion
-     * and cooperative yield. */
+	   and cooperative yield. */
 
 	portSAVE_CONTEXT();
 	vTaskSwitchContext();
@@ -225,14 +223,15 @@ void vPortTickInterrupt( void )
 		}
 
 		/* Restore the context of a task - which may be a different task
-             * to that interrupted. */
+		to that interrupted. */
 		portRESTORE_CONTEXT();
 	}
-    #else /* if configUSE_PREEMPTION == 1 */
+	#else
 	{
 		xTaskIncrementTick();
 	}
-    #endif /* if configUSE_PREEMPTION == 1 */
+	#endif
 
 	portISR_TAIL();
 }
+

portable/GCC/HCS12/portmacro.h

@@ -121,7 +121,6 @@
  */
 
 #ifdef BANKED_MODEL
-
 	/*
 	 * Load the stack pointer for the task, then pull the critical nesting
 	 * count and PPAGE register from the stack.  The remains of the
@@ -159,7 +158,7 @@
 		sts  0,x				; Stack				\n\
 		" );									\
 	}
-    #else /* ifdef BANKED_MODEL */
+#else
 
 	/*
 	 * These macros are as per the BANKED versions above, but without saving
@@ -191,7 +190,7 @@
 		sts  0,x				; Stack				\n\
 		" );									\
 	}
-    #endif /* ifdef BANKED_MODEL */
+#endif
 
 /*
  * Utility macros to save/restore correct software registers for GCC. This is
@@ -244,3 +243,4 @@
 #endif
 
 #endif /* PORTMACRO_H */
+

portable/GCC/IA32_flat/ISR_Support.h

@@ -36,7 +36,7 @@
 	pusha
 
 	/* If ulInterruptNesting is zero the rest of the task context will need
- * saving and a stack switch might be required. */
+	saving and a stack switch might be required. */
 	movl	ulInterruptNesting, %eax
 	test	%eax, %eax
 	jne		2f
@@ -45,7 +45,7 @@ jne     2f
 	.if configSUPPORT_FPU == 1
 
 		/* If the task has a buffer allocated to save the FPU context then
- * save the FPU context now. */
+		save the FPU context now. */
 		movl	pucPortTaskFPUContextBuffer, %eax
 		test	%eax, %eax
 		je		1f
@@ -94,7 +94,8 @@ call vTaskSwitchContext
 
 	1:
 	/* Stack location is first item in the TCB. */
-movl pxCurrentTCB, % eax movl( % eax ), % esp
+	movl 	pxCurrentTCB, %eax
+	movl	(%eax), %esp
 
 	.if configSUPPORT_FPU == 1
 
@@ -102,7 +103,7 @@ movl pxCurrentTCB, % eax movl( % eax ), % esp
 		pop 	pucPortTaskFPUContextBuffer
 
 		/* If the task has a buffer allocated in which its FPU context is saved,
- * then restore it now. */
+		then restore it now. */
 		movl	pucPortTaskFPUContextBuffer, %eax
 		test	%eax, %eax
 		je		1f

portable/GCC/IA32_flat/port.c

@@ -52,14 +52,14 @@
 #endif
 
 /* A critical section is exited when the critical section nesting count reaches
- * this value. */
+this value. */
 #define portNO_CRITICAL_NESTING			( ( uint32_t ) 0 )
 
 /* Tasks are not created with a floating point context, but can be given a
- * floating point context after they have been created.  A variable is stored as
+floating point context after they have been created.  A variable is stored as
- * part of the tasks context that holds portNO_FLOATING_POINT_CONTEXT if the task
+part of the tasks context that holds portNO_FLOATING_POINT_CONTEXT if the task
- * does not have an FPU context, or any other value if the task does have an FPU
+does not have an FPU context, or any other value if the task does have an FPU
- * context. */
+context. */
 #define portNO_FLOATING_POINT_CONTEXT	( ( StackType_t ) 0 )
 
 /* Only the IF bit is set so tasks start with interrupts enabled. */
@@ -76,7 +76,7 @@
 #define portFPU_CONTEXT_SIZE_BYTES 		108
 
 /* The expected size of each entry in the IDT.  Used to check structure packing
- * is set correctly. */
+ is set correctly. */
 #define portEXPECTED_IDT_ENTRY_SIZE		8
 
 /* Default flags setting for entries in the IDT. */
@@ -86,7 +86,7 @@
 #define portAPIC_MIN_ALLOWABLE_VECTOR	( 0x20 )
 
 /* If configASSERT() is defined then the system stack is filled with this value
- * to allow for a crude stack overflow check. */
+to allow for a crude stack overflow check. */
 #define portSTACK_WORD					( 0xecececec )
 /*-----------------------------------------------------------*/
 
@@ -103,9 +103,7 @@ static void prvTaskExitError( void );
 /*
  * Complete one descriptor in the IDT.
  */
-static void prvSetInterruptGate( uint8_t ucNumber,
+static void prvSetInterruptGate( uint8_t ucNumber, ISR_Handler_t pxHandlerFunction, uint8_t ucFlags );
-                                 ISR_Handler_t pxHandlerFunction,
-                                 uint8_t ucFlags );
 
 /*
  * The default handler installed in each IDT position.
@@ -136,13 +134,13 @@ static BaseType_t prvCheckValidityOfVectorNumber( uint32_t ulVectorNumber );
 /*-----------------------------------------------------------*/
 
 /* A variable is used to keep track of the critical section nesting.  This
- * variable must be initialised to a non zero value to ensure interrupts don't
+variable must be initialised to a non zero value to ensure interrupts don't
- * inadvertently become unmasked before the scheduler starts. It is set to zero
+inadvertently become unmasked before the scheduler starts. It is set to zero
- * before the first task starts executing. */
+before the first task starts executing. */
 volatile uint32_t ulCriticalNesting = 9999UL;
 
 /* A structure used to map the various fields of an IDT entry into separate
- * structure members. */
+structure members. */
 struct IDTEntry
 {
 	uint16_t usISRLow;				/* Low 16 bits of handler address. */
@@ -150,8 +148,7 @@ struct IDTEntry
 	uint8_t ucZero;					/* Must be set to zero. */
 	uint8_t ucFlags;				/* Flags for this entry. */
 	uint16_t usISRHigh;				/* High 16 bits of handler address. */
-}
+} __attribute__( ( packed ) );
-__attribute__( ( packed ) );
 typedef struct IDTEntry IDTEntry_t;
 
 
@@ -160,8 +157,7 @@ struct IDTPointer
 {
    uint16_t usTableLimit;
    uint32_t ulTableBase;                /* The address of the first entry in xInterruptDescriptorTable. */
-}
+} __attribute__( ( __packed__ ) );
-__attribute__( ( __packed__ ) );
 typedef struct IDTPointer IDTPointer_t;
 
 /* The IDT itself. */
@@ -170,8 +166,8 @@ static __attribute__( ( aligned( 32 ) ) ) IDTEntry_t xInterruptDescriptorTable[
 #if ( configUSE_COMMON_INTERRUPT_ENTRY_POINT == 1 )
 
 	/* A table in which application defined interrupt handlers are stored.  These
- * are called by the central interrupt handler if a common interrupt entry
+	are called by the central interrupt handler if a common interrupt entry
- * point it used. */
+	point it used. */
 	static ISR_Handler_t xInterruptHandlerTable[ portNUM_VECTORS ] = { NULL };
 
 #endif /* configUSE_COMMON_INTERRUPT_ENTRY_POINT */
@@ -179,8 +175,8 @@ static __attribute__( ( aligned( 32 ) ) ) IDTEntry_t xInterruptDescriptorTable[
 #if ( configSUPPORT_FPU == 1 )
 
 	/* Saved as part of the task context.  If pucPortTaskFPUContextBuffer is NULL
- * then the task does not have an FPU context.  If pucPortTaskFPUContextBuffer is
+	then the task does not have an FPU context.  If pucPortTaskFPUContextBuffer is
- * not NULL then it points to a buffer into which the FPU context can be saved. */
+	not NULL then it points to a buffer into which the FPU context can be saved. */
 	uint8_t *pucPortTaskFPUContextBuffer __attribute__((used)) = pdFALSE;
 
 #endif /* configSUPPORT_FPU */
@@ -189,17 +185,17 @@ static __attribute__( ( aligned( 32 ) ) ) IDTEntry_t xInterruptDescriptorTable[
 static uint32_t ulSystemStack[ configISR_STACK_SIZE ] __attribute__((used))  = { 0 };
 
 /* Don't use the very top of the system stack so the return address
- * appears as 0 if the debugger tries to unwind the stack. */
+appears as 0 if the debugger tries to unwind the stack. */
 volatile uint32_t ulTopOfSystemStack __attribute__((used)) = ( uint32_t ) &( ulSystemStack[ configISR_STACK_SIZE - 5 ] );
 
 /* If a yield is requested from an interrupt or from a critical section then
- * the yield is not performed immediately, and ulPortYieldPending is set to pdTRUE
+the yield is not performed immediately, and ulPortYieldPending is set to pdTRUE
- * instead to indicate the yield should be performed at the end of the interrupt
+instead to indicate the yield should be performed at the end of the interrupt
- * when the critical section is exited. */
+when the critical section is exited. */
 volatile uint32_t ulPortYieldPending __attribute__((used)) = pdFALSE;
 
 /* Counts the interrupt nesting depth.  Used to know when to switch to the
- * interrupt/system stack and when to save/restore a complete context. */
+interrupt/system stack and when to save/restore a complete context. */
 volatile uint32_t ulInterruptNesting __attribute__((used)) = 0;
 
 /*-----------------------------------------------------------*/
@@ -207,9 +203,7 @@ volatile uint32_t ulInterruptNesting __attribute__( ( used ) ) = 0;
 /*
  * See header file for description.
  */
-StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
-                                     TaskFunction_t pxCode,
-                                     void * pvParameters )
 {
 uint32_t ulCodeSegment;
 
@@ -225,7 +219,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 	pxTopOfStack--;
 
 	/* There is nothing to return to so assert if attempting to use the return
-     * address. */
+	address. */
 	*pxTopOfStack = ( StackType_t ) prvTaskExitError;
 	pxTopOfStack--;
 
@@ -271,7 +265,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 		pxTopOfStack--;
 
 		/* Buffer for FPU context, which is initialised to NULL as tasks are not
-             * created with an FPU context. */
+		created with an FPU context. */
 		*pxTopOfStack = portNO_FLOATING_POINT_CONTEXT;
 	}
 	#endif /* configSUPPORT_FPU */
@@ -280,9 +274,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 }
 /*-----------------------------------------------------------*/
 
-static void prvSetInterruptGate( uint8_t ucNumber,
+static void prvSetInterruptGate( uint8_t ucNumber, ISR_Handler_t pxHandlerFunction, uint8_t ucFlags )
-                                 ISR_Handler_t pxHandlerFunction,
-                                 uint8_t ucFlags )
 {
 uint16_t usCodeSegment;
 uint32_t ulBase = ( uint32_t ) pxHandlerFunction;
@@ -328,17 +320,14 @@ void vPortSetupIDT( void )
 static void prvTaskExitError( void )
 {
 	/* A function that implements a task must not exit or attempt to return to
-     * its caller as there is nothing to return to.  If a task wants to exit it
+	its caller as there is nothing to return to.  If a task wants to exit it
-     * should instead call vTaskDelete( NULL ).
+	should instead call vTaskDelete( NULL ).
-     *
+
-     * Artificially force an assert() to be triggered if configASSERT() is
+	Artificially force an assert() to be triggered if configASSERT() is
-     * defined, then stop here so application writers can catch the error. */
+	defined, then stop here so application writers can catch the error. */
 	configASSERT( ulCriticalNesting == ~0UL );
 	portDISABLE_INTERRUPTS();
-
+	for( ;; );
-    for( ; ; )
-    {
-    }
 }
 /*-----------------------------------------------------------*/
 
@@ -385,12 +374,12 @@ BaseType_t xPortStartScheduler( void )
 BaseType_t xWord;
 
 	/* Some versions of GCC require the -mno-ms-bitfields command line option
-     * for packing to work. */
+	for packing to work. */
 	configASSERT( sizeof( struct IDTEntry ) == portEXPECTED_IDT_ENTRY_SIZE );
 
 	/* Fill part of the system stack with a known value to help detect stack
-     * overflow.  A few zeros are left so GDB doesn't get confused unwinding
+	overflow.  A few zeros are left so GDB doesn't get confused unwinding
-     * the stack. */
+	the stack. */
 	for( xWord = 0; xWord < configISR_STACK_SIZE - 20; xWord++ )
 	{
 		ulSystemStack[ xWord ] = portSTACK_WORD;
@@ -414,7 +403,7 @@ BaseType_t xPortStartScheduler( void )
 	portAPIC_TMRDIV = portAPIC_DIV_16;
 
 	/* Should not return from the following function as the scheduler will then
-     * be executing the tasks. */
+	be executing the tasks. */
 	vPortStartFirstTask();
 
 	return 0;
@@ -424,7 +413,7 @@ BaseType_t xPortStartScheduler( void )
 void vPortEndScheduler( void )
 {
 	/* Not implemented in ports where there is nothing to return to.
-     * Artificially force an assert. */
+	Artificially force an assert. */
 	configASSERT( ulCriticalNesting == 1000UL );
 }
 /*-----------------------------------------------------------*/
@@ -446,8 +435,8 @@ void vPortEnterCritical( void )
 	}
 
 	/* Now interrupts are disabled ulCriticalNesting can be accessed
-     * directly.  Increment ulCriticalNesting to keep a count of how many times
+	directly.  Increment ulCriticalNesting to keep a count of how many times
-     * portENTER_CRITICAL() has been called. */
+	portENTER_CRITICAL() has been called. */
 	ulCriticalNesting++;
 }
 /*-----------------------------------------------------------*/
@@ -457,15 +446,15 @@ void vPortExitCritical( void )
 	if( ulCriticalNesting > portNO_CRITICAL_NESTING )
 	{
 		/* Decrement the nesting count as the critical section is being
-         * exited. */
+		exited. */
 		ulCriticalNesting--;
 
 		/* If the nesting level has reached zero then all interrupt
-         * priorities must be re-enabled. */
+		priorities must be re-enabled. */
 		if( ulCriticalNesting == portNO_CRITICAL_NESTING )
 		{
 			/* Critical nesting has reached zero so all interrupt priorities
-             * should be unmasked. */
+			should be unmasked. */
 			#if( configMAX_API_CALL_INTERRUPT_PRIORITY == portMAX_PRIORITY )
 			{
 				__asm volatile( "sti" );
@@ -477,7 +466,7 @@ void vPortExitCritical( void )
 			#endif
 
 			/* If a yield was pended from within the critical section then
-             * perform the yield now. */
+			perform the yield now. */
 			if( ulPortYieldPending != pdFALSE )
 			{
 				ulPortYieldPending = pdFALSE;
@@ -496,7 +485,7 @@ uint32_t ulPortSetInterruptMask( void )
 	#if( configMAX_API_CALL_INTERRUPT_PRIORITY == portMAX_PRIORITY )
 	{
 		/* Return whether interrupts were already enabled or not.  Pop adjusts
-             * the stack first. */
+		the stack first. */
 		__asm volatile( "pushf		\t\n"
 						"pop %0		\t\n"
 						"cli			"
@@ -511,7 +500,7 @@ uint32_t ulPortSetInterruptMask( void )
 		portAPIC_TASK_PRIORITY = portMAX_API_CALL_PRIORITY;
 		configASSERT( portAPIC_TASK_PRIORITY == portMAX_API_CALL_PRIORITY );
 	}
-    #endif /* if ( configMAX_API_CALL_INTERRUPT_PRIORITY == portMAX_PRIORITY ) */
+	#endif
 
 	return ulOriginalMask;
 }
@@ -531,7 +520,7 @@ void vPortClearInterruptMask( uint32_t ulNewMaskValue )
 		portAPIC_TASK_PRIORITY = ulNewMaskValue;
 		configASSERT( portAPIC_TASK_PRIORITY == ulNewMaskValue );
 	}
-    #endif /* if ( configMAX_API_CALL_INTERRUPT_PRIORITY == portMAX_PRIORITY ) */
+	#endif
 }
 /*-----------------------------------------------------------*/
 
@@ -540,7 +529,7 @@ void vPortClearInterruptMask( uint32_t ulNewMaskValue )
 	void vPortTaskUsesFPU( void )
 	{
 		/* A task is registering the fact that it needs an FPU context.  Allocate a
-         * buffer into which the context can be saved. */
+		buffer into which the context can be saved. */
 		pucPortTaskFPUContextBuffer = ( uint8_t * ) pvPortMalloc( portFPU_CONTEXT_SIZE_BYTES );
 		configASSERT( pucPortTaskFPUContextBuffer );
 
@@ -588,8 +577,7 @@ void vPortAPICErrorHandler( void )
 
 #if ( configUSE_COMMON_INTERRUPT_ENTRY_POINT == 1 )
 
-    BaseType_t xPortRegisterCInterruptHandler( ISR_Handler_t pxHandler,
+	BaseType_t xPortRegisterCInterruptHandler( ISR_Handler_t pxHandler, uint32_t ulVectorNumber )
-                                               uint32_t ulVectorNumber )
 	{
 	BaseType_t xReturn;
 
@@ -598,8 +586,8 @@ void vPortAPICErrorHandler( void )
 		if( xReturn != pdFAIL )
 		{
 			/* Save the handler passed in by the application in the vector number
-             * passed in.  The addresses are then called from the central interrupt
+			passed in.  The addresses are then called from the central interrupt
-             * handler. */
+			handler. */
 			xInterruptHandlerTable[ ulVectorNumber ] = pxHandler;
 		}
 
@@ -609,8 +597,7 @@ void vPortAPICErrorHandler( void )
 #endif /* configUSE_COMMON_INTERRUPT_ENTRY_POINT */
 /*-----------------------------------------------------------*/
 
-BaseType_t xPortInstallInterruptHandler( ISR_Handler_t pxHandler,
+BaseType_t xPortInstallInterruptHandler( ISR_Handler_t pxHandler, uint32_t ulVectorNumber )
-                                         uint32_t ulVectorNumber )
 {
 BaseType_t xReturn;
 
@@ -683,3 +670,17 @@ void vGenerateYieldInterrupt( void )
 {
 	__asm volatile( portYIELD_INTERRUPT );
 }
+
+
+
+
+
+
+
+
+
+
+
+
+
+

portable/GCC/IA32_flat/portmacro.h

@@ -70,10 +70,10 @@
 /* Task utilities. */
 
 /* The interrupt priority (for vectors 16 to 255) is determined using vector/16.
- * The quotient is rounded to the nearest integer with 1 being the lowest priority
+The quotient is rounded to the nearest integer with 1 being the lowest priority
- * and 15 is the highest.  Therefore the following two interrupts are at the lowest
+and 15 is the highest.  Therefore the following two interrupts are at the lowest
- * priority.  *NOTE 1* If the yield vector is changed then it must also be changed
+priority.  *NOTE 1* If the yield vector is changed then it must also be changed
- * in the portYIELD_INTERRUPT definition immediately below. */
+in the portYIELD_INTERRUPT definition immediately below. */
 #define portAPIC_TIMER_INT_VECTOR 		( 0x21 )
 #define portAPIC_YIELD_INT_VECTOR 		( 0x20 )
 
@@ -106,7 +106,7 @@
 #define portAPIC_LVT_LINT1 				( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x360UL ) ) )
 
 /* Don't yield if inside a critical section - instead hold the yield pending
- * so it is performed when the critical section is exited. */
+so it is performed when the critical section is exited. */
 #define portYIELD() 								\
 {													\
 extern volatile uint32_t ulCriticalNesting;			\
@@ -122,7 +122,7 @@
 }
 
 /* Called at the end of an ISR that can cause a context switch - pend a yield if
- * xSwithcRequired is not false. */
+xSwithcRequired is not false. */
 #define portEND_SWITCHING_ISR( xSwitchRequired )	\
 {													\
 extern volatile uint32_t ulPortYieldPending;		\
@@ -149,7 +149,7 @@
 extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );
 
 /* These macros do not globally disable/enable interrupts.  They do mask off
- * interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */
+interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */
 #define portENTER_CRITICAL()		vPortEnterCritical()
 #define portEXIT_CRITICAL()			vPortExitCritical()
 #define portDISABLE_INTERRUPTS()	__asm volatile( "cli" )
@@ -158,8 +158,8 @@
 /*-----------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site.  These are
- * not required for this port but included in case common demo code that uses these
+not required for this port but included in case common demo code that uses these
- * macros is used. */
+macros is used. */
 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
 #define portTASK_FUNCTION( vFunction, pvParameters )	void vFunction( void *pvParameters )
 
@@ -187,7 +187,7 @@
 typedef void ( *ISR_Handler_t ) ( void );
 
 /* Any task that uses the floating point unit MUST call vPortTaskUsesFPU()
- * before any floating point instructions are executed. */
+before any floating point instructions are executed. */
 #ifndef configSUPPORT_FPU
 	#define configSUPPORT_FPU 0
 #endif
@@ -198,78 +198,71 @@
 #endif
 
 /* See the comments under the configUSE_COMMON_INTERRUPT_ENTRY_POINT definition
- * below. */
+below. */
-    BaseType_t xPortRegisterCInterruptHandler( ISR_Handler_t pxHandler,
+BaseType_t xPortRegisterCInterruptHandler( ISR_Handler_t pxHandler, uint32_t ulVectorNumber );
-                                               uint32_t ulVectorNumber );
+BaseType_t xPortInstallInterruptHandler( ISR_Handler_t pxHandler, uint32_t ulVectorNumber );
-    BaseType_t xPortInstallInterruptHandler( ISR_Handler_t pxHandler,
-                                             uint32_t ulVectorNumber );
 
 #ifndef configAPIC_BASE
-
 	/* configAPIC_BASE_ADDRESS sets the base address of the local APIC.  It can
- * be overridden in FreeRTOSConfig.h should it not be constant. */
+	be overridden in FreeRTOSConfig.h should it not be constant. */
 	#define configAPIC_BASE	0xFEE00000UL
 #endif
 
 #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
-
 	/* The FreeRTOS scheduling algorithm selects the task that will enter the
- * Running state.  configUSE_PORT_OPTIMISED_TASK_SELECTION is used to set how
+	Running state.  configUSE_PORT_OPTIMISED_TASK_SELECTION is used to set how
- * that is done.
+	that is done.
- *
+
- * If configUSE_PORT_OPTIMISED_TASK_SELECTION is set to 0 then the task to
+	If configUSE_PORT_OPTIMISED_TASK_SELECTION is set to 0 then the task to
- * enter the Running state is selected using a portable algorithm written in
+	enter the Running state is selected using a portable algorithm written in
- * C.  This is the slowest method, but the algorithm does not restrict the
+	C.  This is the slowest method, but the algorithm does not restrict the
- * maximum number of unique RTOS task priorities that are available.
+	maximum number of unique RTOS task priorities that are available.
- *
+
- * If configUSE_PORT_OPTIMISED_TASK_SELECTION is set to 1 then the task to
+	If configUSE_PORT_OPTIMISED_TASK_SELECTION is set to 1 then the task to
- * enter the Running state is selected using a single assembly instruction.
+	enter the Running state is selected using a single assembly instruction.
- * This is the fastest method, but restricts the maximum number of unique RTOS
+	This is the fastest method, but restricts the maximum number of unique RTOS
- * task priorities to 32 (the same task priority can be assigned to any number
+	task priorities to 32 (the same task priority can be assigned to any number
- * of RTOS	tasks). */
+	of RTOS	tasks). */
 	#warning configUSE_PORT_OPTIMISED_TASK_SELECTION was not defined in FreeRTOSConfig.h and has been defaulted to 1
 	#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
 #endif
 
 #ifndef configUSE_COMMON_INTERRUPT_ENTRY_POINT
-
 	/* There are two ways of implementing interrupt handlers:
- *
+
- *  1) As standard C functions -
+		1) As standard C functions -
- *
+
- *  This method can only be used if configUSE_COMMON_INTERRUPT_ENTRY_POINT
+		This method can only be used if configUSE_COMMON_INTERRUPT_ENTRY_POINT
- *  is set to 1.  The C function is installed using
+		is set to 1.  The C function is installed using
- *  xPortRegisterCInterruptHandler().
+		xPortRegisterCInterruptHandler().
- *
+
- *  This is the simplest of the two methods but incurs a slightly longer
+		This is the simplest of the two methods but incurs a slightly longer
- *  interrupt entry time.
+		interrupt entry time.
- *
+
- *  2) By using an assembly stub that wraps the handler in the FreeRTOS
+		2) By using an assembly stub that wraps the handler in the FreeRTOS
- *     portFREERTOS_INTERRUPT_ENTRY and portFREERTOS_INTERRUPT_EXIT macros.
+		   portFREERTOS_INTERRUPT_ENTRY and portFREERTOS_INTERRUPT_EXIT macros.
- *
+
- *  This method can always be used.  It is slightly more complex than
+		This method can always be used.  It is slightly more complex than
- *  method 1 but benefits from a faster interrupt entry time. */
+		method 1 but benefits from a faster interrupt entry time. */
 	#warning configUSE_COMMON_INTERRUPT_ENTRY_POINT was not defined in FreeRTOSConfig.h and has been defaulted to 1.
 	#define configUSE_COMMON_INTERRUPT_ENTRY_POINT	1
 #endif
 
 #ifndef configISR_STACK_SIZE
-
 	/* Interrupt entry code will switch the stack in use to a dedicated system
- * stack.
+	stack.
- *
+
- * configISR_STACK_SIZE defines the number of 32-bit values that can be stored
+	configISR_STACK_SIZE defines the number of 32-bit values that can be stored
- * on the system stack, and must be large enough to hold a potentially nested
+	on the system stack, and must be large enough to hold a potentially nested
- * interrupt stack frame. */
+	interrupt stack frame. */
 
 	#error configISR_STACK_SIZE was not defined in FreeRTOSConfig.h.
 #endif
 
 #ifndef configMAX_API_CALL_INTERRUPT_PRIORITY
-
 	/* Interrupt safe FreeRTOS functions (those that end in "FromISR" must not
- * be called from an interrupt that has a priority above that set by
+	be called from an interrupt that has a priority above that set by
- * configMAX_API_CALL_INTERRUPT_PRIORITY.  */
+	configMAX_API_CALL_INTERRUPT_PRIORITY.  */
 	#warning configMAX_API_CALL_INTERRUPT_PRIORITY was not defined in FreeRTOSConfig.h and has been defaulted to 10
 	#define configMAX_API_CALL_INTERRUPT_PRIORITY 10
 #endif
@@ -280,13 +273,13 @@
 #endif
 
 /* The value written to the task priority register to raise the interrupt mask
- * to the maximum from which FreeRTOS API calls can be made. */
+to the maximum from which FreeRTOS API calls can be made. */
 #define portAPIC_PRIORITY_SHIFT		( 4UL )
 #define portAPIC_MAX_SUB_PRIORITY	( 0x0fUL )
 #define portMAX_API_CALL_PRIORITY		( ( configMAX_API_CALL_INTERRUPT_PRIORITY << portAPIC_PRIORITY_SHIFT ) | portAPIC_MAX_SUB_PRIORITY )
 
 /* Asserts if interrupt safe FreeRTOS functions are called from a priority
- * above the max system call interrupt priority. */
+above the max system call interrupt priority. */
 #define portAPIC_PROCESSOR_PRIORITY	( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0xA0UL  ) ) )
 #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( portAPIC_PROCESSOR_PRIORITY ) <= ( portMAX_API_CALL_PRIORITY ) )
 
@@ -295,3 +288,4 @@
 #endif
 
 #endif /* PORTMACRO_H */
+

portable/GCC/MCF5235/port.c

@@ -1,29 +1,29 @@
 /*
- *  FreeRTOS V4.1.1 - Copyright (C) 2003-2006 Richard Barry.
+    FreeRTOS V4.1.1 - Copyright (C) 2003-2006 Richard Barry.
- *  MCF5235 Port - Copyright (C) 2006 Christian Walter.
+    MCF5235 Port - Copyright (C) 2006 Christian Walter.
- *
+
- *  This file is part of the FreeRTOS distribution.
+    This file is part of the FreeRTOS distribution.
- *
+
- *  FreeRTOS is free software; you can redistribute it and/or modify
+    FreeRTOS is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License** as published by
+    it under the terms of the GNU General Public License** as published by
- *  the Free Software Foundation; either version 2 of the License, or
+    the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
+    (at your option) any later version.
- *
+
- *  FreeRTOS is distributed in the hope that it will be useful,
+    FreeRTOS is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
+    GNU General Public License for more details.
- *
+
- *  You should have received a copy of the GNU General Public License
+    You should have received a copy of the GNU General Public License
- *  along with FreeRTOS; if not, write to the Free Software
+    along with FreeRTOS; if not, write to the Free Software
- *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
+
- *  A special exception to the GPL can be applied should you wish to distribute
+    A special exception to the GPL can be applied should you wish to distribute
- *  a combined work that includes FreeRTOS, without being obliged to provide
+    a combined work that includes FreeRTOS, without being obliged to provide
- *  the source code for any proprietary components.  See the licensing section
+    the source code for any proprietary components.  See the licensing section
- *  of http://www.FreeRTOS.org for full details of how and when the exception
+    of http://www.FreeRTOS.org for full details of how and when the exception
- *  can be applied.
+    can be applied.
- *
+
     ***************************************************************************
     ***************************************************************************
     *                                                                         *
@@ -37,18 +37,18 @@
     *                                                                         *
     ***************************************************************************
     ***************************************************************************
- *
+
- *  Please ensure to read the configuration and relevant port sections of the
+	Please ensure to read the configuration and relevant port sections of the
- *  online documentation.
+	online documentation.
- *
+
- *  http://www.FreeRTOS.org - Documentation, latest information, license and
+	http://www.FreeRTOS.org - Documentation, latest information, license and 
- *  contact details.
+	contact details.
- *
+
- *  http://www.SafeRTOS.com - A version that is certified for use in safety
+	http://www.SafeRTOS.com - A version that is certified for use in safety 
- *  critical systems.
+	critical systems.
- *
+
- *  http://www.OpenRTOS.com - Commercial support, development, porting,
+	http://www.OpenRTOS.com - Commercial support, development, porting, 
- *  licensing and training services.
+	licensing and training services.
 */
 
 #include <stdlib.h>
@@ -101,8 +101,8 @@ volatile uint32_t ulCriticalNesting = portINITIAL_CRITICAL_NESTING;
 
 /* ------------------------ Start implementation -------------------------- */
 
-StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+StackType_t *
-                                     TaskFunction_t pxCode,
+pxPortInitialiseStack( StackType_t * pxTopOfStack, TaskFunction_t pxCode,
                        void *pvParameters )
 {
     /* Place the parameter on the stack in the expected location. */
@@ -165,7 +165,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 /*
  * Called by portYIELD() or taskYIELD() to manually force a context switch.
  */
-static void prvPortYield( void )
+static void
+prvPortYield( void )
 {
     asm volatile ( "move.w  #0x2700, %sr\n\t" );
 #if _GCC_USES_FP == 1
@@ -182,12 +183,12 @@ static void prvPortYield( void )
 }
 
 #if configUSE_PREEMPTION == 0
-
 /*
  * The ISR used for the scheduler tick depends on whether the cooperative or
  * the preemptive scheduler is being used.
  */
-    static void prvPortPreemptiveTick( void )
+static void
+prvPortPreemptiveTick ( void )
 {
     /* The cooperative scheduler requires a normal IRQ service routine to
      * simply increment the system tick.
@@ -197,9 +198,10 @@ static void prvPortYield( void )
     MCF_PIT_PCSR0 |= MCF_PIT_PCSR_PIF;
 }
 
-#else /* if configUSE_PREEMPTION == 0 */
+#else
 
-    static void prvPortPreemptiveTick( void )
+static void
+prvPortPreemptiveTick( void )
 {
     asm volatile ( "move.w  #0x2700, %sr\n\t" );
 #if _GCC_USES_FP == 1
@@ -207,17 +209,16 @@ static void prvPortYield( void )
 #endif
     portSAVE_CONTEXT(  );
     MCF_PIT_PCSR0 |= MCF_PIT_PCSR_PIF;
-
     if( xTaskIncrementTick() != pdFALSE )
 	{
 		vTaskSwitchContext(  );
 	}
-
     portRESTORE_CONTEXT(  );
 }
-#endif /* if configUSE_PREEMPTION == 0 */
+#endif
 
-void vPortEnterCritical()
+void
+vPortEnterCritical()
 {
     /* FIXME: We should store the old IPL here - How are we supposed to do
      * this.
@@ -230,7 +231,8 @@ void vPortEnterCritical()
     ulCriticalNesting++;
 }
 
-void vPortExitCritical()
+void
+vPortExitCritical()
 {
     if( ulCriticalNesting > portNO_CRITICAL_NESTING )
     {
@@ -238,7 +240,7 @@ void vPortExitCritical()
         ulCriticalNesting--;
 
         /* If the nesting level has reached zero then interrupts should be
-         * re-enabled. */
+        re-enabled. */
         if( ulCriticalNesting == portNO_CRITICAL_NESTING )
         {
             ( void )portSET_IPL( 0 );
@@ -246,7 +248,8 @@ void vPortExitCritical()
     }
 }
 
-BaseType_t xPortStartScheduler( void )
+BaseType_t
+xPortStartScheduler( void )
 {
     extern void     ( *portVECTOR_TABLE[  ] ) (  );
 
@@ -276,6 +279,7 @@ BaseType_t xPortStartScheduler( void )
     return pdTRUE;
 }
 
-void vPortEndScheduler( void )
+void
+vPortEndScheduler( void )
 {
 }

portable/GCC/MCF5235/portmacro.h

@@ -1,29 +1,29 @@
 /*
- *  FreeRTOS V4.1.1 - Copyright (C) 2003-2006 Richard Barry.
+    FreeRTOS V4.1.1 - Copyright (C) 2003-2006 Richard Barry.
- *  MCF5235 Port - Copyright (C) 2006 Christian Walter.
+    MCF5235 Port - Copyright (C) 2006 Christian Walter.
- *
+
- *  This file is part of the FreeRTOS distribution.
+    This file is part of the FreeRTOS distribution.
- *
+
- *  FreeRTOS is free software; you can redistribute it and/or modify
+    FreeRTOS is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License** as published by
+    it under the terms of the GNU General Public License** as published by
- *  the Free Software Foundation; either version 2 of the License, or
+    the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
+    (at your option) any later version.
- *
+
- *  FreeRTOS is distributed in the hope that it will be useful,
+    FreeRTOS is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
+    GNU General Public License for more details.
- *
+
- *  You should have received a copy of the GNU General Public License
+    You should have received a copy of the GNU General Public License
- *  along with FreeRTOS; if not, write to the Free Software
+    along with FreeRTOS; if not, write to the Free Software
- *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
+
- *  A special exception to the GPL can be applied should you wish to distribute
+    A special exception to the GPL can be applied should you wish to distribute
- *  a combined work that includes FreeRTOS, without being obliged to provide
+    a combined work that includes FreeRTOS, without being obliged to provide
- *  the source code for any proprietary components.  See the licensing section
+    the source code for any proprietary components.  See the licensing section
- *  of http://www.FreeRTOS.org for full details of how and when the exception
+    of http://www.FreeRTOS.org for full details of how and when the exception
- *  can be applied.
+    can be applied.
- *
+
     ***************************************************************************
     ***************************************************************************
     *                                                                         *
@@ -37,18 +37,18 @@
     *                                                                         *
     ***************************************************************************
     ***************************************************************************
- *
+
- *  Please ensure to read the configuration and relevant port sections of the
+	Please ensure to read the configuration and relevant port sections of the
- *  online documentation.
+	online documentation.
- *
+
- *  http://www.FreeRTOS.org - Documentation, latest information, license and
+	http://www.FreeRTOS.org - Documentation, latest information, license and
- *  contact details.
+	contact details.
- *
+
- *  http://www.SafeRTOS.com - A version that is certified for use in safety
+	http://www.SafeRTOS.com - A version that is certified for use in safety
- *  critical systems.
+	critical systems.
- *
+
- *  http://www.OpenRTOS.com - Commercial support, development, porting,
+	http://www.OpenRTOS.com - Commercial support, development, porting,
- *  licensing and training services.
+	licensing and training services.
 */
 
 #ifndef PORTMACRO_H
@@ -151,6 +151,7 @@
     /* Save the context of the interrupted task. */                          \
     portSAVE_CONTEXT(  );                                                    \
     {
+
 #define portEXIT_SWITCHING_ISR( SwitchRequired )                             \
         /* If a switch is required we call vTaskSwitchContext(). */          \
         if( SwitchRequired )                                                 \
@@ -178,3 +179,4 @@
 
 
 #endif /* PORTMACRO_H */
+

portable/GCC/MSP430F449/port.c

@@ -26,8 +26,8 @@
  */
 
 /*
- *  Changes from V2.5.2
+	Changes from V2.5.2
- *
+		
 	+ usCriticalNesting now has a volatile qualifier.
 */
 
@@ -44,28 +44,28 @@
  *----------------------------------------------------------*/
 
 /* Constants required for hardware setup.  The tick ISR runs off the ACLK, 
- * not the MCLK. */
+not the MCLK. */
 #define portACLK_FREQUENCY_HZ			( ( TickType_t ) 32768 )
 #define portINITIAL_CRITICAL_NESTING	( ( uint16_t ) 10 )
 #define portFLAGS_INT_ENABLED	( ( StackType_t ) 0x08 )
 
 /* We require the address of the pxCurrentTCB variable, but don't want to know
- * any details of its type. */
+any details of its type. */
 typedef void TCB_t;
 extern volatile TCB_t * volatile pxCurrentTCB;
 
 /* Most ports implement critical sections by placing the interrupt flags on
- * the stack before disabling interrupts.  Exiting the critical section is then
+the stack before disabling interrupts.  Exiting the critical section is then
- * simply a case of popping the flags from the stack.  As mspgcc does not use
+simply a case of popping the flags from the stack.  As mspgcc does not use
- * a frame pointer this cannot be done as modifying the stack will clobber all
+a frame pointer this cannot be done as modifying the stack will clobber all
- * the stack variables.  Instead each task maintains a count of the critical
+the stack variables.  Instead each task maintains a count of the critical
- * section nesting depth.  Each time a critical section is entered the count is
+section nesting depth.  Each time a critical section is entered the count is
- * incremented.  Each time a critical section is left the count is decremented -
+incremented.  Each time a critical section is left the count is decremented -
- * with interrupts only being re-enabled if the count is zero.
+with interrupts only being re-enabled if the count is zero.
- *
+
- * usCriticalNesting will get set to zero when the scheduler starts, but must
+usCriticalNesting will get set to zero when the scheduler starts, but must
- * not be initialised to zero as this will cause problems during the startup
+not be initialised to zero as this will cause problems during the startup
- * sequence. */
+sequence. */
 volatile uint16_t usCriticalNesting = portINITIAL_CRITICAL_NESTING;
 /*-----------------------------------------------------------*/
 
@@ -140,26 +140,24 @@ static void prvSetupTimerInterrupt( void );
  * 
  * See the header file portable.h.
  */
-StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
-                                     TaskFunction_t pxCode,
-                                     void * pvParameters )
 {
 	/* 
-     *  Place a few bytes of known values on the bottom of the stack.
+		Place a few bytes of known values on the bottom of the stack. 
-     *  This is just useful for debugging and can be included if required.
+		This is just useful for debugging and can be included if required.
-     *
+
 		*pxTopOfStack = ( StackType_t ) 0x1111;
-     *  pxTopOfStack--;
+		pxTopOfStack--;
 		*pxTopOfStack = ( StackType_t ) 0x2222;
-     *  pxTopOfStack--;
+		pxTopOfStack--;
 		*pxTopOfStack = ( StackType_t ) 0x3333;
-     *  pxTopOfStack--;
+		pxTopOfStack--; 
 	*/
 
 	/* The msp430 automatically pushes the PC then SR onto the stack before 
-     * executing an ISR.  We want the stack to look just as if this has happened
+	executing an ISR.  We want the stack to look just as if this has happened
-     * so place a pointer to the start of the task on the stack first - followed
+	so place a pointer to the start of the task on the stack first - followed
-     * by the flags we want the task to use when it starts up. */
+	by the flags we want the task to use when it starts up. */
 	*pxTopOfStack = ( StackType_t ) pxCode;
 	pxTopOfStack--;
 	*pxTopOfStack = portFLAGS_INT_ENABLED;
@@ -190,19 +188,19 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 	pxTopOfStack--;
 
 	/* When the task starts is will expect to find the function parameter in
-     * R15. */
+	R15. */
 	*pxTopOfStack = ( StackType_t ) pvParameters;
 	pxTopOfStack--;
 
 	/* The code generated by the mspgcc compiler does not maintain separate
-     * stack and frame pointers. The portENTER_CRITICAL macro cannot therefore
+	stack and frame pointers. The portENTER_CRITICAL macro cannot therefore
-     * use the stack as per other ports.  Instead a variable is used to keep
+	use the stack as per other ports.  Instead a variable is used to keep
-     * track of the critical section nesting.  This variable has to be stored
+	track of the critical section nesting.  This variable has to be stored
-     * as part of the task context and is initially set to zero. */
+	as part of the task context and is initially set to zero. */
 	*pxTopOfStack = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING;	
 
 	/* Return a pointer to the top of the stack we have generated so this can
-     * be stored in the task control block for the task. */
+	be stored in the task control block for the task. */
 	return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
@@ -210,7 +208,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 BaseType_t xPortStartScheduler( void )
 {
 	/* Setup the hardware to generate the tick.  Interrupts are disabled when
-     * this function is called. */
+	this function is called. */
 	prvSetupTimerInterrupt();
 
 	/* Restore the context of the first task that is going to run. */
@@ -224,7 +222,7 @@ BaseType_t xPortStartScheduler( void )
 void vPortEndScheduler( void )
 {
 	/* It is unlikely that the MSP430 port will get stopped.  If required simply
-     * disable the tick interrupt here. */
+	disable the tick interrupt here. */
 }
 /*-----------------------------------------------------------*/
 
@@ -237,9 +235,9 @@ void vPortYield( void ) __attribute__( ( naked ) );
 void vPortYield( void )
 {
 	/* We want the stack of the task being saved to look exactly as if the task
-     * was saved during a pre-emptive RTOS tick ISR.  Before calling an ISR the
+	was saved during a pre-emptive RTOS tick ISR.  Before calling an ISR the 
-     * msp430 places the status register onto the stack.  As this is a function
+	msp430 places the status register onto the stack.  As this is a function 
-     * call and not an ISR we have to do this manually. */
+	call and not an ISR we have to do this manually. */
 	asm volatile ( "push	r2" );
 	_DINT();
 
@@ -302,7 +300,7 @@ static void prvSetupTimerInterrupt( void )
 		portSAVE_CONTEXT();
 
 		/* Increment the tick count then switch to the highest priority task
-         * that is ready to run. */
+		that is ready to run. */
 		if( xTaskIncrementTick() != pdFALSE )
 		{
 			vTaskSwitchContext();
@@ -312,7 +310,7 @@ static void prvSetupTimerInterrupt( void )
 		portRESTORE_CONTEXT();
 	}
 
-#else /* if configUSE_PREEMPTION == 1 */
+#else
 
 	/*
 	 * Tick ISR for the cooperative scheduler.  All this does is increment the
@@ -324,4 +322,7 @@ static void prvSetupTimerInterrupt( void )
 	{
 		xTaskIncrementTick();
 	}
-#endif /* if configUSE_PREEMPTION == 1 */
+#endif
+
+
+	

portable/GCC/MSP430F449/portmacro.h

@@ -124,3 +124,4 @@
 #endif
 
 #endif /* PORTMACRO_H */
+