mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-20 10:08:33 -04:00
Replace standard types with stdint.h types.
Replace #define types with typedefs. Rename all typedefs to have a _t extension. Add #defines to automatically convert old FreeRTOS specific types to their new names (with the _t).
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190 changed files with 4940 additions and 4603 deletions
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@ -84,7 +84,7 @@
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/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
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PSW is set with U and I set, and PM and IPL clear. */
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#define portINITIAL_PSW ( ( portSTACK_TYPE ) 0x00030000 )
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#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
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/* The peripheral clock is divided by this value before being supplying the
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CMT. */
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@ -112,8 +112,8 @@ respectively. */
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/* The following lines are to ensure vSoftwareInterruptEntry can be referenced,
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and therefore installed in the vector table, when the FreeRTOS code is built
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as a library. */
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extern portBASE_TYPE vSoftwareInterruptEntry;
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const portBASE_TYPE * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry;
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extern BaseType_t vSoftwareInterruptEntry;
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const BaseType_t * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry;
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/*-----------------------------------------------------------*/
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@ -157,7 +157,7 @@ static void prvSetupTimerInterrupt( void );
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* instruction.
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*/
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#if configUSE_TICKLESS_IDLE == 1
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static void prvSleep( portTickType xExpectedIdleTime );
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static void prvSleep( TickType_t xExpectedIdleTime );
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#endif /* configUSE_TICKLESS_IDLE */
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/*-----------------------------------------------------------*/
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@ -169,7 +169,7 @@ extern void vTaskSwitchContext( void );
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/*-----------------------------------------------------------*/
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/* Calculate how many clock increments make up a single tick period. */
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static const unsigned long ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );
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static const uint32_t ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );
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#if configUSE_TICKLESS_IDLE == 1
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@ -177,7 +177,7 @@ static const unsigned long ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_H
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basically how far into the future an interrupt can be generated. Set
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during initialisation. This is the maximum possible value that the
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compare match register can hold divided by ulMatchValueForOneTick. */
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static const portTickType xMaximumPossibleSuppressedTicks = USHRT_MAX / ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );
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static const TickType_t xMaximumPossibleSuppressedTicks = USHRT_MAX / ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );
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/* Flag set from the tick interrupt to allow the sleep processing to know if
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sleep mode was exited because of a tick interrupt, or an interrupt
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@ -190,7 +190,7 @@ static const unsigned long ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_H
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compensate for the lost time. The large difference between the divided CMT
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clock and the CPU clock means it is likely ulStoppedTimerCompensation will
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equal zero - and be optimised away. */
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static const unsigned long ulStoppedTimerCompensation = 100UL / ( configCPU_CLOCK_HZ / ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) );
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static const uint32_t ulStoppedTimerCompensation = 100UL / ( configCPU_CLOCK_HZ / ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) );
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#endif
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@ -199,7 +199,7 @@ static const unsigned long ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_H
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/*
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* See header file for description.
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*/
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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/* Offset to end up on 8 byte boundary. */
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pxTopOfStack--;
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@ -211,7 +211,7 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_PSW;
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) pxCode;
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*pxTopOfStack = ( StackType_t ) pxCode;
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/* When debugging it can be useful if every register is set to a known
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value. Otherwise code space can be saved by just setting the registers
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@ -256,7 +256,7 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
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}
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#endif
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*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R1 */
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*pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
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pxTopOfStack--;
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*pxTopOfStack = 0x12345678; /* Accumulator. */
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pxTopOfStack--;
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@ -266,7 +266,7 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
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}
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/*-----------------------------------------------------------*/
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portBASE_TYPE xPortStartScheduler( void )
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BaseType_t xPortStartScheduler( void )
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{
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/* Use pxCurrentTCB just so it does not get optimised away. */
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if( pxCurrentTCB != NULL )
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@ -355,7 +355,7 @@ void prvTickISR( void )
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/* If this is the first tick since exiting tickless mode then the CMT
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compare match value needs resetting. */
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CMT0.CMCOR = ( unsigned short ) ulMatchValueForOneTick;
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CMT0.CMCOR = ( uint16_t ) ulMatchValueForOneTick;
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}
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#endif
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}
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@ -468,7 +468,7 @@ static void prvSetupTimerInterrupt( void )
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CMT0.CMCR.BIT.CMIE = 1;
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/* Set the compare match value. */
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CMT0.CMCOR = ( unsigned short ) ulMatchValueForOneTick;
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CMT0.CMCOR = ( uint16_t ) ulMatchValueForOneTick;
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/* Divide the PCLK. */
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#if portCLOCK_DIVISOR == 512
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@ -507,7 +507,7 @@ static void prvSetupTimerInterrupt( void )
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#if configUSE_TICKLESS_IDLE == 1
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static void prvSleep( portTickType xExpectedIdleTime )
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static void prvSleep( TickType_t xExpectedIdleTime )
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{
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/* Allow the application to define some pre-sleep processing. */
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configPRE_SLEEP_PROCESSING( xExpectedIdleTime );
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#if configUSE_TICKLESS_IDLE == 1
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void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )
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void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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{
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unsigned long ulMatchValue, ulCompleteTickPeriods, ulCurrentCount;
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uint32_t ulMatchValue, ulCompleteTickPeriods, ulCurrentCount;
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eSleepModeStatus eSleepAction;
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/* THIS FUNCTION IS CALLED WITH THE SCHEDULER SUSPENDED. */
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@ -614,8 +614,8 @@ static void prvSetupTimerInterrupt( void )
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/* Adjust the match value to take into account that the current
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time slice is already partially complete. */
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ulMatchValue -= ( unsigned long ) CMT0.CMCNT;
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CMT0.CMCOR = ( unsigned short ) ulMatchValue;
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ulMatchValue -= ( uint32_t ) CMT0.CMCNT;
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CMT0.CMCOR = ( uint16_t ) ulMatchValue;
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/* Restart the CMT to count up to the new match value. */
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CMT0.CMCNT = 0;
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/* Nothing to do here. */
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}
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ulCurrentCount = ( unsigned long ) CMT0.CMCNT;
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ulCurrentCount = ( uint32_t ) CMT0.CMCNT;
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if( ulTickFlag != pdFALSE )
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{
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exited. Reset the match value with whatever remains of this
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tick period. */
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ulMatchValue = ulMatchValueForOneTick - ulCurrentCount;
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CMT0.CMCOR = ( unsigned short ) ulMatchValue;
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CMT0.CMCOR = ( uint16_t ) ulMatchValue;
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/* The tick interrupt handler will already have pended the tick
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processing in the kernel. As the pending tick will be
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/* The match value is set to whatever fraction of a single tick
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period remains. */
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ulMatchValue = ulCurrentCount - ( ulCompleteTickPeriods * ulMatchValueForOneTick );
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CMT0.CMCOR = ( unsigned short ) ulMatchValue;
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CMT0.CMCOR = ( uint16_t ) ulMatchValue;
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}
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/* Restart the CMT so it runs up to the match value. The match value
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