mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-18 09:08:33 -04:00
Replace standard types with stdint.h types.
Replace #define types with typedefs. Rename all typedefs to have a _t extension. Add #defines to automatically convert old FreeRTOS specific types to their new names (with the _t).
This commit is contained in:
parent
f292243dcf
commit
3e20aa7d60
190 changed files with 4940 additions and 4603 deletions
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@ -104,7 +104,7 @@ Changes from V3.2.0
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*----------------------------------------------------------*/
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/* Hardware setup for tick. */
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#define portTIMER_FOSC_SCALE ( ( unsigned long ) 4 )
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#define portTIMER_FOSC_SCALE ( ( uint32_t ) 4 )
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/* Initial interrupt enable state for newly created tasks. This value is
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copied into INTCON when a task switches in for the first time. */
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@ -121,16 +121,16 @@ enable state to be unchanged when the interrupted task is switched back in. */
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area's get used by the compiler for temporary storage, especially when
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performing mathematical operations, or when using 32bit data types. This
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constant defines the size of memory area which must be saved. */
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#define portCOMPILER_MANAGED_MEMORY_SIZE ( ( unsigned char ) 0x13 )
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#define portCOMPILER_MANAGED_MEMORY_SIZE ( ( uint8_t ) 0x13 )
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/* We require the address of the pxCurrentTCB variable, but don't want to know
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any details of its type. */
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typedef void tskTCB;
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extern volatile tskTCB * volatile pxCurrentTCB;
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typedef void TCB_t;
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extern volatile TCB_t * volatile pxCurrentTCB;
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/* IO port constants. */
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#define portBIT_SET ( ( unsigned char ) 1 )
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#define portBIT_CLEAR ( ( unsigned char ) 0 )
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#define portBIT_SET ( ( uint8_t ) 1 )
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#define portBIT_CLEAR ( ( uint8_t ) 0 )
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/*
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* The serial port ISR's are defined in serial.c, but are called from portable
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@ -243,7 +243,7 @@ static void prvLowInterrupt( void );
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_endasm \
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\
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/* Store each address from the hardware stack. */ \
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while( STKPTR > ( unsigned char ) 0 ) \
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while( STKPTR > ( uint8_t ) 0 ) \
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{ \
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_asm \
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MOVFF TOSL, PREINC1 \
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@ -380,10 +380,10 @@ static void prvLowInterrupt( void );
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/*
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* See header file for description.
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*/
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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unsigned long ulAddress;
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unsigned char ucBlock;
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uint32_t ulAddress;
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uint8_t ucBlock;
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/* Place a few bytes of known values on the bottom of the stack.
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This is just useful for debugging. */
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@ -401,12 +401,12 @@ unsigned char ucBlock;
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First store the function parameters. This is where the task will expect to
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find them when it starts running. */
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ulAddress = ( unsigned long ) pvParameters;
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*pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned long ) 0x00ff );
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ulAddress = ( uint32_t ) pvParameters;
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*pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );
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pxTopOfStack++;
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ulAddress >>= 8;
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*pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned long ) 0x00ff );
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*pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );
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pxTopOfStack++;
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/* Next we just leave a space. When a context is saved the stack pointer
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@ -418,97 +418,97 @@ unsigned char ucBlock;
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/* Next are all the registers that form part of the task context. */
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*pxTopOfStack = ( portSTACK_TYPE ) 0x66; /* WREG. */
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*pxTopOfStack = ( StackType_t ) 0x66; /* WREG. */
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pxTopOfStack++;
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*pxTopOfStack = ( portSTACK_TYPE ) 0xcc; /* Status. */
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*pxTopOfStack = ( StackType_t ) 0xcc; /* Status. */
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pxTopOfStack++;
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/* INTCON is saved with interrupts enabled. */
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*pxTopOfStack = ( portSTACK_TYPE ) portINITAL_INTERRUPT_STATE; /* INTCON */
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*pxTopOfStack = ( StackType_t ) portINITAL_INTERRUPT_STATE; /* INTCON */
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pxTopOfStack++;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x11; /* BSR. */
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*pxTopOfStack = ( StackType_t ) 0x11; /* BSR. */
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pxTopOfStack++;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x22; /* FSR2L. */
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*pxTopOfStack = ( StackType_t ) 0x22; /* FSR2L. */
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pxTopOfStack++;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x33; /* FSR2H. */
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*pxTopOfStack = ( StackType_t ) 0x33; /* FSR2H. */
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pxTopOfStack++;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x44; /* FSR0L. */
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*pxTopOfStack = ( StackType_t ) 0x44; /* FSR0L. */
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pxTopOfStack++;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x55; /* FSR0H. */
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*pxTopOfStack = ( StackType_t ) 0x55; /* FSR0H. */
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pxTopOfStack++;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x66; /* TABLAT. */
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*pxTopOfStack = ( StackType_t ) 0x66; /* TABLAT. */
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pxTopOfStack++;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* TBLPTRU. */
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*pxTopOfStack = ( StackType_t ) 0x00; /* TBLPTRU. */
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pxTopOfStack++;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x88; /* TBLPTRUH. */
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*pxTopOfStack = ( StackType_t ) 0x88; /* TBLPTRUH. */
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pxTopOfStack++;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x99; /* TBLPTRUL. */
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*pxTopOfStack = ( StackType_t ) 0x99; /* TBLPTRUL. */
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pxTopOfStack++;
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*pxTopOfStack = ( portSTACK_TYPE ) 0xaa; /* PRODH. */
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*pxTopOfStack = ( StackType_t ) 0xaa; /* PRODH. */
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pxTopOfStack++;
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*pxTopOfStack = ( portSTACK_TYPE ) 0xbb; /* PRODL. */
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*pxTopOfStack = ( StackType_t ) 0xbb; /* PRODL. */
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pxTopOfStack++;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* PCLATU. */
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*pxTopOfStack = ( StackType_t ) 0x00; /* PCLATU. */
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pxTopOfStack++;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* PCLATH. */
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*pxTopOfStack = ( StackType_t ) 0x00; /* PCLATH. */
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pxTopOfStack++;
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/* Next the .tmpdata and MATH_DATA sections. */
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for( ucBlock = 0; ucBlock <= portCOMPILER_MANAGED_MEMORY_SIZE; ucBlock++ )
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{
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*pxTopOfStack = ( portSTACK_TYPE ) ucBlock;
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*pxTopOfStack = ( StackType_t ) ucBlock;
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*pxTopOfStack++;
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}
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/* Store the top of the global data section. */
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*pxTopOfStack = ( portSTACK_TYPE ) portCOMPILER_MANAGED_MEMORY_SIZE; /* Low. */
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*pxTopOfStack = ( StackType_t ) portCOMPILER_MANAGED_MEMORY_SIZE; /* Low. */
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pxTopOfStack++;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* High. */
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*pxTopOfStack = ( StackType_t ) 0x00; /* High. */
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pxTopOfStack++;
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/* The only function return address so far is the address of the
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task. */
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ulAddress = ( unsigned long ) pxCode;
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ulAddress = ( uint32_t ) pxCode;
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/* TOS low. */
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*pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned long ) 0x00ff );
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*pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );
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pxTopOfStack++;
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ulAddress >>= 8;
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/* TOS high. */
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*pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned long ) 0x00ff );
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*pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );
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pxTopOfStack++;
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ulAddress >>= 8;
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/* TOS even higher. */
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*pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned long ) 0x00ff );
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*pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );
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pxTopOfStack++;
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/* Store the number of return addresses on the hardware stack - so far only
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the address of the task entry point. */
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*pxTopOfStack = ( portSTACK_TYPE ) 1;
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*pxTopOfStack = ( StackType_t ) 1;
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pxTopOfStack++;
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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portBASE_TYPE xPortStartScheduler( void )
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BaseType_t xPortStartScheduler( void )
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{
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/* Setup a timer for the tick ISR is using the preemptive scheduler. */
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prvSetupTimerInterrupt();
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@ -617,9 +617,9 @@ static void prvTickISR( void )
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*/
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static void prvSetupTimerInterrupt( void )
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{
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const unsigned long ulConstCompareValue = ( ( configCPU_CLOCK_HZ / portTIMER_FOSC_SCALE ) / configTICK_RATE_HZ );
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unsigned long ulCompareValue;
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unsigned char ucByte;
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const uint32_t ulConstCompareValue = ( ( configCPU_CLOCK_HZ / portTIMER_FOSC_SCALE ) / configTICK_RATE_HZ );
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uint32_t ulCompareValue;
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uint8_t ucByte;
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/* Interrupts are disabled when this function is called.
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@ -627,14 +627,14 @@ unsigned char ucByte;
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1.
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Clear the time count then setup timer. */
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TMR1H = ( unsigned char ) 0x00;
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TMR1L = ( unsigned char ) 0x00;
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TMR1H = ( uint8_t ) 0x00;
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TMR1L = ( uint8_t ) 0x00;
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/* Set the compare match value. */
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ulCompareValue = ulConstCompareValue;
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CCPR1L = ( unsigned char ) ( ulCompareValue & ( unsigned long ) 0xff );
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ulCompareValue >>= ( unsigned long ) 8;
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CCPR1H = ( unsigned char ) ( ulCompareValue & ( unsigned long ) 0xff );
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CCPR1L = ( uint8_t ) ( ulCompareValue & ( uint32_t ) 0xff );
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ulCompareValue >>= ( uint32_t ) 8;
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CCPR1H = ( uint8_t ) ( ulCompareValue & ( uint32_t ) 0xff );
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CCP1CONbits.CCP1M0 = portBIT_SET; /*< Compare match mode. */
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CCP1CONbits.CCP1M1 = portBIT_SET; /*< Compare match mode. */
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@ -1,5 +1,5 @@
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/*
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FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
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FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
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All rights reserved
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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@ -67,7 +67,7 @@
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#define PORTMACRO_H
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/*-----------------------------------------------------------
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* Port specific definitions.
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* Port specific definitions.
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*
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* The settings in this file configure FreeRTOS correctly for the
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* given hardware and compiler.
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@ -82,15 +82,19 @@
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT int
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#define portSTACK_TYPE unsigned char
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#define portSTACK_TYPE uint8_t
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#define portBASE_TYPE char
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typedef portSTACK_TYPE StackType_t;
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typedef signed char BaseType_t;
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typedef unsigned char UBaseType_t;
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#if( configUSE_16_BIT_TICKS == 1 )
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typedef unsigned portSHORT portTickType;
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#define portMAX_DELAY ( portTickType ) 0xffff
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typedef uint16_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffff
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#else
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typedef unsigned portLONG portTickType;
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#define portMAX_DELAY ( portTickType ) 0xffffffffUL
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typedef uint32_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
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#endif
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/*-----------------------------------------------------------*/
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#define portBYTE_ALIGNMENT 1
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#define portGLOBAL_INT_ENABLE_BIT 0x80
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#define portSTACK_GROWTH 1
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#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
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#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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/*-----------------------------------------------------------*/
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/* Critical section management. */
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@ -98,7 +98,7 @@ not provided their own. */
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#define portUNUSED_PR_BITS 0x7f
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/* Records the nesting depth of calls to portENTER_CRITICAL(). */
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unsigned portBASE_TYPE uxCriticalNesting = 0xef;
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UBaseType_t uxCriticalNesting = 0xef;
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#if configKERNEL_INTERRUPT_PRIORITY != 1
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#error If configKERNEL_INTERRUPT_PRIORITY is not 1 then the #32 in the following macros needs changing to equal the portINTERRUPT_BITS value, which is ( configKERNEL_INTERRUPT_PRIORITY << 5 )
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/*
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* See header file for description.
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*/
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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unsigned short usCode;
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unsigned portBASE_TYPE i;
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uint16_t usCode;
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UBaseType_t i;
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const portSTACK_TYPE xInitialStack[] =
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const StackType_t xInitialStack[] =
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{
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0x1111, /* W1 */
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0x2222, /* W2 */
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/* Setup the stack as if a yield had occurred.
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Save the low bytes of the program counter. */
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usCode = ( unsigned short ) pxCode;
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*pxTopOfStack = ( portSTACK_TYPE ) usCode;
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usCode = ( uint16_t ) pxCode;
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*pxTopOfStack = ( StackType_t ) usCode;
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pxTopOfStack++;
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/* Save the high byte of the program counter. This will always be zero
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here as it is passed in a 16bit pointer. If the address is greater than
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16 bits then the pointer will point to a jump table. */
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*pxTopOfStack = ( portSTACK_TYPE ) 0;
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*pxTopOfStack = ( StackType_t ) 0;
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pxTopOfStack++;
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/* Status register with interrupts enabled. */
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pxTopOfStack++;
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/* Parameters are passed in W0. */
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*pxTopOfStack = ( portSTACK_TYPE ) pvParameters;
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*pxTopOfStack = ( StackType_t ) pvParameters;
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pxTopOfStack++;
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for( i = 0; i < ( sizeof( xInitialStack ) / sizeof( portSTACK_TYPE ) ); i++ )
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for( i = 0; i < ( sizeof( xInitialStack ) / sizeof( StackType_t ) ); i++ )
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{
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*pxTopOfStack = xInitialStack[ i ];
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pxTopOfStack++;
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}
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/*-----------------------------------------------------------*/
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portBASE_TYPE xPortStartScheduler( void )
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BaseType_t xPortStartScheduler( void )
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{
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/* Setup a timer for the tick ISR. */
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vApplicationSetupTickTimerInterrupt();
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@ -311,13 +311,13 @@ void vPortEndScheduler( void )
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*/
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__attribute__(( weak )) void vApplicationSetupTickTimerInterrupt( void )
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{
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const unsigned long ulCompareMatch = ( ( configCPU_CLOCK_HZ / portTIMER_PRESCALE ) / configTICK_RATE_HZ ) - 1;
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const uint32_t ulCompareMatch = ( ( configCPU_CLOCK_HZ / portTIMER_PRESCALE ) / configTICK_RATE_HZ ) - 1;
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/* Prescale of 8. */
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T1CON = 0;
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TMR1 = 0;
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PR1 = ( unsigned short ) ulCompareMatch;
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PR1 = ( uint16_t ) ulCompareMatch;
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/* Setup timer 1 interrupt priority. */
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IPC0bits.T1IP = configKERNEL_INTERRUPT_PRIORITY;
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@ -1,5 +1,5 @@
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/*
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FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
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FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
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All rights reserved
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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@ -71,7 +71,7 @@ extern "C" {
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#endif
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/*-----------------------------------------------------------
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* Port specific definitions.
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* Port specific definitions.
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*
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* The settings in this file configure FreeRTOS correctly for the
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* given hardware and compiler.
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@ -86,28 +86,32 @@ extern "C" {
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT short
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#define portSTACK_TYPE unsigned short
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#define portSTACK_TYPE uint16_t
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#define portBASE_TYPE short
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typedef portSTACK_TYPE StackType_t;
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typedef short BaseType_t;
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typedef unsigned short UBaseType_t;
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#if( configUSE_16_BIT_TICKS == 1 )
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typedef unsigned portSHORT portTickType;
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#define portMAX_DELAY ( portTickType ) 0xffff
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typedef uint16_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffff
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#else
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typedef unsigned portLONG portTickType;
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#define portMAX_DELAY ( portTickType ) 0xffffffffUL
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typedef uint32_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
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#endif
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/*-----------------------------------------------------------*/
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/* Hardware specifics. */
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#define portBYTE_ALIGNMENT 2
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#define portSTACK_GROWTH 1
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#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
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#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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/*-----------------------------------------------------------*/
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/* Critical section management. */
|
||||
#define portINTERRUPT_BITS ( ( unsigned portSHORT ) configKERNEL_INTERRUPT_PRIORITY << ( unsigned portSHORT ) 5 )
|
||||
#define portINTERRUPT_BITS ( ( uint16_t ) configKERNEL_INTERRUPT_PRIORITY << ( uint16_t ) 5 )
|
||||
|
||||
#define portDISABLE_INTERRUPTS() SR |= portINTERRUPT_BITS
|
||||
#define portDISABLE_INTERRUPTS() SR |= portINTERRUPT_BITS
|
||||
#define portENABLE_INTERRUPTS() SR &= ~portINTERRUPT_BITS
|
||||
|
||||
/* Note that exiting a critical sectino will set the IPL bits to 0, nomatter
|
||||
|
|
|
@ -137,7 +137,7 @@ task stack, not the ISR stack). */
|
|||
the ISR stack. */
|
||||
#define portISR_STACK_FILL_BYTE 0xee
|
||||
|
||||
static const unsigned char ucExpectedStackBytes[] = {
|
||||
static const uint8_t ucExpectedStackBytes[] = {
|
||||
portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
|
||||
portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
|
||||
portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
|
||||
|
@ -178,47 +178,47 @@ static void prvTaskExitError( void );
|
|||
|
||||
/* Records the interrupt nesting depth. This is initialised to one as it is
|
||||
decremented to 0 when the first task starts. */
|
||||
volatile unsigned portBASE_TYPE uxInterruptNesting = 0x01;
|
||||
volatile UBaseType_t uxInterruptNesting = 0x01;
|
||||
|
||||
/* Stores the task stack pointer when a switch is made to use the system stack. */
|
||||
unsigned portBASE_TYPE uxSavedTaskStackPointer = 0;
|
||||
UBaseType_t uxSavedTaskStackPointer = 0;
|
||||
|
||||
/* The stack used by interrupt service routines that cause a context switch. */
|
||||
portSTACK_TYPE xISRStack[ configISR_STACK_SIZE ] = { 0 };
|
||||
StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 };
|
||||
|
||||
/* The top of stack value ensures there is enough space to store 6 registers on
|
||||
the callers stack, as some functions seem to want to do this. */
|
||||
const portSTACK_TYPE * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );
|
||||
const StackType_t * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* See header file for description.
|
||||
*/
|
||||
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
|
||||
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
|
||||
{
|
||||
/* Ensure byte alignment is maintained when leaving this function. */
|
||||
pxTopOfStack--;
|
||||
|
||||
*pxTopOfStack = (portSTACK_TYPE) 0xDEADBEEF;
|
||||
*pxTopOfStack = (StackType_t) 0xDEADBEEF;
|
||||
pxTopOfStack--;
|
||||
|
||||
*pxTopOfStack = (portSTACK_TYPE) 0x12345678; /* Word to which the stack pointer will be left pointing after context restore. */
|
||||
*pxTopOfStack = (StackType_t) 0x12345678; /* Word to which the stack pointer will be left pointing after context restore. */
|
||||
pxTopOfStack--;
|
||||
|
||||
*pxTopOfStack = (portSTACK_TYPE) _CP0_GET_CAUSE();
|
||||
*pxTopOfStack = (StackType_t) _CP0_GET_CAUSE();
|
||||
pxTopOfStack--;
|
||||
|
||||
*pxTopOfStack = (portSTACK_TYPE) portINITIAL_SR;/* CP0_STATUS */
|
||||
*pxTopOfStack = (StackType_t) portINITIAL_SR;/* CP0_STATUS */
|
||||
pxTopOfStack--;
|
||||
|
||||
*pxTopOfStack = (portSTACK_TYPE) pxCode; /* CP0_EPC */
|
||||
*pxTopOfStack = (StackType_t) pxCode; /* CP0_EPC */
|
||||
pxTopOfStack--;
|
||||
|
||||
*pxTopOfStack = (portSTACK_TYPE) portTASK_RETURN_ADDRESS; /* ra */
|
||||
*pxTopOfStack = (StackType_t) portTASK_RETURN_ADDRESS; /* ra */
|
||||
pxTopOfStack -= 15;
|
||||
|
||||
*pxTopOfStack = (portSTACK_TYPE) pvParameters; /* Parameters to pass in. */
|
||||
*pxTopOfStack = (StackType_t) pvParameters; /* Parameters to pass in. */
|
||||
pxTopOfStack -= 15;
|
||||
|
||||
return pxTopOfStack;
|
||||
|
@ -250,7 +250,7 @@ static void prvTaskExitError( void )
|
|||
*/
|
||||
__attribute__(( weak )) void vApplicationSetupTickTimerInterrupt( void )
|
||||
{
|
||||
const unsigned long ulCompareMatch = ( (configPERIPHERAL_CLOCK_HZ / portTIMER_PRESCALE) / configTICK_RATE_HZ ) - 1;
|
||||
const uint32_t ulCompareMatch = ( (configPERIPHERAL_CLOCK_HZ / portTIMER_PRESCALE) / configTICK_RATE_HZ ) - 1;
|
||||
|
||||
T1CON = 0x0000;
|
||||
T1CONbits.TCKPS = portPRESCALE_BITS;
|
||||
|
@ -276,7 +276,7 @@ void vPortEndScheduler(void)
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
portBASE_TYPE xPortStartScheduler( void )
|
||||
BaseType_t xPortStartScheduler( void )
|
||||
{
|
||||
extern void vPortStartFirstTask( void );
|
||||
extern void *pxCurrentTCB;
|
||||
|
@ -305,7 +305,7 @@ extern void *pxCurrentTCB;
|
|||
|
||||
/* Kick off the highest priority task that has been created so far.
|
||||
Its stack location is loaded into uxSavedTaskStackPointer. */
|
||||
uxSavedTaskStackPointer = *( unsigned portBASE_TYPE * ) pxCurrentTCB;
|
||||
uxSavedTaskStackPointer = *( UBaseType_t * ) pxCurrentTCB;
|
||||
vPortStartFirstTask();
|
||||
|
||||
/* Should never get here as the tasks will now be executing! Call the task
|
||||
|
@ -320,7 +320,7 @@ extern void *pxCurrentTCB;
|
|||
|
||||
void vPortIncrementTick( void )
|
||||
{
|
||||
unsigned portBASE_TYPE uxSavedStatus;
|
||||
UBaseType_t uxSavedStatus;
|
||||
|
||||
uxSavedStatus = uxPortSetInterruptMaskFromISR();
|
||||
{
|
||||
|
@ -340,9 +340,9 @@ unsigned portBASE_TYPE uxSavedStatus;
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
unsigned portBASE_TYPE uxPortSetInterruptMaskFromISR( void )
|
||||
UBaseType_t uxPortSetInterruptMaskFromISR( void )
|
||||
{
|
||||
unsigned portBASE_TYPE uxSavedStatusRegister;
|
||||
UBaseType_t uxSavedStatusRegister;
|
||||
|
||||
__builtin_disable_interrupts();
|
||||
uxSavedStatusRegister = _CP0_GET_STATUS() | 0x01;
|
||||
|
@ -358,7 +358,7 @@ unsigned portBASE_TYPE uxSavedStatusRegister;
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE uxSavedStatusRegister )
|
||||
void vPortClearInterruptMaskFromISR( UBaseType_t uxSavedStatusRegister )
|
||||
{
|
||||
_CP0_SET_STATUS( uxSavedStatusRegister );
|
||||
}
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
|
||||
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
@ -89,22 +89,26 @@ extern "C" {
|
|||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE unsigned long
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
#if( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef unsigned portSHORT portTickType;
|
||||
#define portMAX_DELAY ( portTickType ) 0xffff
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef unsigned long portTickType;
|
||||
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Hardware specifics. */
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
#define portSTACK_GROWTH -1
|
||||
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
|
||||
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Critical section management. */
|
||||
|
@ -123,7 +127,7 @@ ensure API function and interrupt entry is as fast and as simple as possible. */
|
|||
#ifdef configASSERT
|
||||
#define portDISABLE_INTERRUPTS() \
|
||||
{ \
|
||||
unsigned long ulStatus; \
|
||||
uint32_t ulStatus; \
|
||||
\
|
||||
/* Mask interrupts at and below the kernel interrupt priority. */ \
|
||||
ulStatus = _CP0_GET_STATUS(); \
|
||||
|
@ -138,7 +142,7 @@ ensure API function and interrupt entry is as fast and as simple as possible. */
|
|||
#else /* configASSERT */
|
||||
#define portDISABLE_INTERRUPTS() \
|
||||
{ \
|
||||
unsigned long ulStatus; \
|
||||
uint32_t ulStatus; \
|
||||
\
|
||||
/* Mask interrupts at and below the kernel interrupt priority. */ \
|
||||
ulStatus = _CP0_GET_STATUS(); \
|
||||
|
@ -149,7 +153,7 @@ ensure API function and interrupt entry is as fast and as simple as possible. */
|
|||
|
||||
#define portENABLE_INTERRUPTS() \
|
||||
{ \
|
||||
unsigned long ulStatus; \
|
||||
uint32_t ulStatus; \
|
||||
\
|
||||
/* Unmask all interrupts. */ \
|
||||
ulStatus = _CP0_GET_STATUS(); \
|
||||
|
@ -164,8 +168,8 @@ extern void vTaskExitCritical( void );
|
|||
#define portENTER_CRITICAL() vTaskEnterCritical()
|
||||
#define portEXIT_CRITICAL() vTaskExitCritical()
|
||||
|
||||
extern unsigned portBASE_TYPE uxPortSetInterruptMaskFromISR();
|
||||
extern void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE );
|
||||
extern UBaseType_t uxPortSetInterruptMaskFromISR();
|
||||
extern void vPortClearInterruptMaskFromISR( UBaseType_t );
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() uxPortSetInterruptMaskFromISR()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusRegister ) vPortClearInterruptMaskFromISR( uxSavedStatusRegister )
|
||||
|
||||
|
@ -192,7 +196,7 @@ extern void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE );
|
|||
|
||||
#define portYIELD() \
|
||||
{ \
|
||||
unsigned long ulCause; \
|
||||
uint32_t ulCause; \
|
||||
\
|
||||
/* Trigger software interrupt. */ \
|
||||
ulCause = _CP0_GET_CAUSE(); \
|
||||
|
|
|
@ -144,7 +144,7 @@ task stack, not the ISR stack). */
|
|||
the ISR stack. */
|
||||
#define portISR_STACK_FILL_BYTE 0xee
|
||||
|
||||
static const unsigned char ucExpectedStackBytes[] = {
|
||||
static const uint8_t ucExpectedStackBytes[] = {
|
||||
portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
|
||||
portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
|
||||
portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
|
||||
|
@ -184,50 +184,50 @@ static void prvTaskExitError( void );
|
|||
|
||||
/* Records the interrupt nesting depth. This is initialised to one as it is
|
||||
decremented to 0 when the first task starts. */
|
||||
volatile unsigned portBASE_TYPE uxInterruptNesting = 0x01;
|
||||
volatile UBaseType_t uxInterruptNesting = 0x01;
|
||||
|
||||
/* Stores the task stack pointer when a switch is made to use the system stack. */
|
||||
unsigned portBASE_TYPE uxSavedTaskStackPointer = 0;
|
||||
UBaseType_t uxSavedTaskStackPointer = 0;
|
||||
|
||||
/* The stack used by interrupt service routines that cause a context switch. */
|
||||
portSTACK_TYPE xISRStack[ configISR_STACK_SIZE ] = { 0 };
|
||||
StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 };
|
||||
|
||||
/* The top of stack value ensures there is enough space to store 6 registers on
|
||||
the callers stack, as some functions seem to want to do this. */
|
||||
const portSTACK_TYPE * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );
|
||||
const StackType_t * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* See header file for description.
|
||||
*/
|
||||
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
|
||||
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
|
||||
{
|
||||
/* Ensure byte alignment is maintained when leaving this function. */
|
||||
pxTopOfStack--;
|
||||
|
||||
*pxTopOfStack = (portSTACK_TYPE) 0xDEADBEEF;
|
||||
*pxTopOfStack = (StackType_t) 0xDEADBEEF;
|
||||
pxTopOfStack--;
|
||||
|
||||
*pxTopOfStack = (portSTACK_TYPE) 0x12345678; /* Word to which the stack pointer will be left pointing after context restore. */
|
||||
*pxTopOfStack = (StackType_t) 0x12345678; /* Word to which the stack pointer will be left pointing after context restore. */
|
||||
pxTopOfStack--;
|
||||
|
||||
*pxTopOfStack = (portSTACK_TYPE) _CP0_GET_CAUSE();
|
||||
*pxTopOfStack = (StackType_t) _CP0_GET_CAUSE();
|
||||
pxTopOfStack--;
|
||||
|
||||
*pxTopOfStack = (portSTACK_TYPE) portINITIAL_SR;/* CP0_STATUS */
|
||||
*pxTopOfStack = (StackType_t) portINITIAL_SR;/* CP0_STATUS */
|
||||
pxTopOfStack--;
|
||||
|
||||
*pxTopOfStack = (portSTACK_TYPE) pxCode; /* CP0_EPC */
|
||||
*pxTopOfStack = (StackType_t) pxCode; /* CP0_EPC */
|
||||
pxTopOfStack -= 7; /* Includes space for AC1 - AC3. */
|
||||
|
||||
*pxTopOfStack = (portSTACK_TYPE) 0x00000000; /* DSPControl */
|
||||
*pxTopOfStack = (StackType_t) 0x00000000; /* DSPControl */
|
||||
pxTopOfStack--;
|
||||
|
||||
*pxTopOfStack = (portSTACK_TYPE) portTASK_RETURN_ADDRESS; /* ra */
|
||||
*pxTopOfStack = (StackType_t) portTASK_RETURN_ADDRESS; /* ra */
|
||||
pxTopOfStack -= 15;
|
||||
|
||||
*pxTopOfStack = (portSTACK_TYPE) pvParameters; /* Parameters to pass in. */
|
||||
*pxTopOfStack = (StackType_t) pvParameters; /* Parameters to pass in. */
|
||||
pxTopOfStack -= 15;
|
||||
|
||||
return pxTopOfStack;
|
||||
|
@ -259,7 +259,7 @@ static void prvTaskExitError( void )
|
|||
*/
|
||||
__attribute__(( weak )) void vApplicationSetupTickTimerInterrupt( void )
|
||||
{
|
||||
const unsigned long ulCompareMatch = ( (configPERIPHERAL_CLOCK_HZ / portTIMER_PRESCALE) / configTICK_RATE_HZ ) - 1;
|
||||
const uint32_t ulCompareMatch = ( (configPERIPHERAL_CLOCK_HZ / portTIMER_PRESCALE) / configTICK_RATE_HZ ) - 1;
|
||||
|
||||
T1CON = 0x0000;
|
||||
T1CONbits.TCKPS = portPRESCALE_BITS;
|
||||
|
@ -285,7 +285,7 @@ void vPortEndScheduler(void)
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
portBASE_TYPE xPortStartScheduler( void )
|
||||
BaseType_t xPortStartScheduler( void )
|
||||
{
|
||||
extern void vPortStartFirstTask( void );
|
||||
extern void *pxCurrentTCB;
|
||||
|
@ -314,7 +314,7 @@ extern void *pxCurrentTCB;
|
|||
|
||||
/* Kick off the highest priority task that has been created so far.
|
||||
Its stack location is loaded into uxSavedTaskStackPointer. */
|
||||
uxSavedTaskStackPointer = *( unsigned portBASE_TYPE * ) pxCurrentTCB;
|
||||
uxSavedTaskStackPointer = *( UBaseType_t * ) pxCurrentTCB;
|
||||
vPortStartFirstTask();
|
||||
|
||||
/* Should never get here as the tasks will now be executing! Call the task
|
||||
|
@ -329,7 +329,7 @@ extern void *pxCurrentTCB;
|
|||
|
||||
void vPortIncrementTick( void )
|
||||
{
|
||||
unsigned portBASE_TYPE uxSavedStatus;
|
||||
UBaseType_t uxSavedStatus;
|
||||
|
||||
uxSavedStatus = uxPortSetInterruptMaskFromISR();
|
||||
{
|
||||
|
@ -349,9 +349,9 @@ unsigned portBASE_TYPE uxSavedStatus;
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
unsigned portBASE_TYPE uxPortSetInterruptMaskFromISR( void )
|
||||
UBaseType_t uxPortSetInterruptMaskFromISR( void )
|
||||
{
|
||||
unsigned portBASE_TYPE uxSavedStatusRegister;
|
||||
UBaseType_t uxSavedStatusRegister;
|
||||
|
||||
__builtin_disable_interrupts();
|
||||
uxSavedStatusRegister = _CP0_GET_STATUS() | 0x01;
|
||||
|
@ -367,7 +367,7 @@ unsigned portBASE_TYPE uxSavedStatusRegister;
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE uxSavedStatusRegister )
|
||||
void vPortClearInterruptMaskFromISR( UBaseType_t uxSavedStatusRegister )
|
||||
{
|
||||
_CP0_SET_STATUS( uxSavedStatusRegister );
|
||||
}
|
||||
|
|
|
@ -89,27 +89,31 @@ extern "C" {
|
|||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE unsigned long
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
#if( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef unsigned portSHORT portTickType;
|
||||
#define portMAX_DELAY ( portTickType ) 0xffff
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef unsigned long portTickType;
|
||||
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Hardware specifics. */
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
#define portSTACK_GROWTH -1
|
||||
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
|
||||
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Critical section management. */
|
||||
#define portIPL_SHIFT ( 10UL )
|
||||
/* Don't straddle the CEE bit. Interrupts calling FreeRTOS functions should
|
||||
/* Don't straddle the CEE bit. Interrupts calling FreeRTOS functions should
|
||||
never have higher IPL bits set anyway. */
|
||||
#define portALL_IPL_BITS ( 0x7FUL << portIPL_SHIFT )
|
||||
#define portSW0_BIT ( 0x01 << 8 )
|
||||
|
@ -125,7 +129,7 @@ ensure API function and interrupt entry is as fast and as simple as possible. */
|
|||
#ifdef configASSERT
|
||||
#define portDISABLE_INTERRUPTS() \
|
||||
{ \
|
||||
unsigned long ulStatus; \
|
||||
uint32_t ulStatus; \
|
||||
\
|
||||
/* Mask interrupts at and below the kernel interrupt priority. */ \
|
||||
ulStatus = _CP0_GET_STATUS(); \
|
||||
|
@ -140,7 +144,7 @@ ensure API function and interrupt entry is as fast and as simple as possible. */
|
|||
#else /* configASSERT */
|
||||
#define portDISABLE_INTERRUPTS() \
|
||||
{ \
|
||||
unsigned long ulStatus; \
|
||||
uint32_t ulStatus; \
|
||||
\
|
||||
/* Mask interrupts at and below the kernel interrupt priority. */ \
|
||||
ulStatus = _CP0_GET_STATUS(); \
|
||||
|
@ -151,7 +155,7 @@ ensure API function and interrupt entry is as fast and as simple as possible. */
|
|||
|
||||
#define portENABLE_INTERRUPTS() \
|
||||
{ \
|
||||
unsigned long ulStatus; \
|
||||
uint32_t ulStatus; \
|
||||
\
|
||||
/* Unmask all interrupts. */ \
|
||||
ulStatus = _CP0_GET_STATUS(); \
|
||||
|
@ -166,8 +170,8 @@ extern void vTaskExitCritical( void );
|
|||
#define portENTER_CRITICAL() vTaskEnterCritical()
|
||||
#define portEXIT_CRITICAL() vTaskExitCritical()
|
||||
|
||||
extern unsigned portBASE_TYPE uxPortSetInterruptMaskFromISR();
|
||||
extern void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE );
|
||||
extern UBaseType_t uxPortSetInterruptMaskFromISR();
|
||||
extern void vPortClearInterruptMaskFromISR( UBaseType_t );
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() uxPortSetInterruptMaskFromISR()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusRegister ) vPortClearInterruptMaskFromISR( uxSavedStatusRegister )
|
||||
|
||||
|
@ -194,7 +198,7 @@ extern void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE );
|
|||
|
||||
#define portYIELD() \
|
||||
{ \
|
||||
unsigned long ulCause; \
|
||||
uint32_t ulCause; \
|
||||
\
|
||||
/* Trigger software interrupt. */ \
|
||||
ulCause = _CP0_GET_CAUSE(); \
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue