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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-31 15:38:40 -04:00
Replace standard types with stdint.h types.
Replace #define types with typedefs. Rename all typedefs to have a _t extension. Add #defines to automatically convert old FreeRTOS specific types to their new names (with the _t).
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190 changed files with 4940 additions and 4603 deletions
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@ -115,7 +115,7 @@
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/* A critical section is exited when the critical section nesting count reaches
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this value. */
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#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )
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#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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/* In all GICs 255 can be written to the priority mask register to unmask all
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(but the lowest) interrupt priority. */
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@ -126,17 +126,17 @@ floating point context after they have been created. A variable is stored as
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part of the tasks context that holds portNO_FLOATING_POINT_CONTEXT if the task
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does not have an FPU context, or any other value if the task does have an FPU
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context. */
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#define portNO_FLOATING_POINT_CONTEXT ( ( portSTACK_TYPE ) 0 )
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#define portNO_FLOATING_POINT_CONTEXT ( ( StackType_t ) 0 )
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/* Constants required to setup the initial task context. */
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#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )
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#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
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#define portINTERRUPT_ENABLE_BIT ( 0x80UL )
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#define portTHUMB_MODE_ADDRESS ( 0x01UL )
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/* Used by portASSERT_IF_INTERRUPT_PRIORITY_INVALID() when ensuring the binary
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point is zero. */
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#define portBINARY_POINT_BITS ( ( unsigned char ) 0x03 )
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#define portBINARY_POINT_BITS ( ( uint8_t ) 0x03 )
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/* Masks all bits in the APSR other than the mode bits. */
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#define portAPSR_MODE_BITS_MASK ( 0x1F )
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@ -170,18 +170,18 @@ variable has to be stored as part of the task context and must be initialised to
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a non zero value to ensure interrupts don't inadvertently become unmasked before
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the scheduler starts. As it is stored as part of the task context it will
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automatically be set to 0 when the first task is started. */
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volatile unsigned long ulCriticalNesting = 9999UL;
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volatile uint32_t ulCriticalNesting = 9999UL;
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/* Saved as part of the task context. If ulPortTaskHasFPUContext is non-zero then
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a floating point context must be saved and restored for the task. */
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unsigned long ulPortTaskHasFPUContext = pdFALSE;
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uint32_t ulPortTaskHasFPUContext = pdFALSE;
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/* Set to 1 to pend a context switch from an ISR. */
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unsigned long ulPortYieldRequired = pdFALSE;
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uint32_t ulPortYieldRequired = pdFALSE;
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/* Counts the interrupt nesting depth. A context switch is only performed if
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if the nesting depth is 0. */
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unsigned long ulPortInterruptNesting = 0UL;
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uint32_t ulPortInterruptNesting = 0UL;
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/*-----------------------------------------------------------*/
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@ -189,7 +189,7 @@ unsigned long ulPortInterruptNesting = 0UL;
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/*
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* See header file for description.
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*/
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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/* Setup the initial stack of the task. The stack is set exactly as
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expected by the portRESTORE_CONTEXT() macro.
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@ -203,9 +203,9 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
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pxTopOfStack--;
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*pxTopOfStack = NULL;
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
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*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
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if( ( ( unsigned long ) pxCode & portTHUMB_MODE_ADDRESS ) != 0x00UL )
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if( ( ( uint32_t ) pxCode & portTHUMB_MODE_ADDRESS ) != 0x00UL )
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{
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/* The task will start in THUMB mode. */
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*pxTopOfStack |= portTHUMB_MODE_BIT;
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@ -214,37 +214,37 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
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pxTopOfStack--;
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/* Next the return address, which in this case is the start of the task. */
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*pxTopOfStack = ( portSTACK_TYPE ) pxCode;
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*pxTopOfStack = ( StackType_t ) pxCode;
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pxTopOfStack--;
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/* Next all the registers other than the stack pointer. */
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*pxTopOfStack = ( portSTACK_TYPE ) 0x00000000; /* R14 */
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*pxTopOfStack = ( StackType_t ) 0x00000000; /* R14 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
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*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
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*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
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*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
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*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
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*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
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*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
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*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
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*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
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*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
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*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
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*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
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*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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pxTopOfStack--;
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/* The task will start with a critical nesting count of 0 as interrupts are
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@ -261,9 +261,9 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
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}
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/*-----------------------------------------------------------*/
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portBASE_TYPE xPortStartScheduler( void )
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BaseType_t xPortStartScheduler( void )
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{
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unsigned long ulAPSR;
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uint32_t ulAPSR;
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/* Only continue if the CPU is not in User mode. The CPU must be in a
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Privileged mode for the scheduler to start. */
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@ -359,7 +359,7 @@ void FreeRTOS_Tick_Handler( void )
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void vPortTaskUsesFPU( void )
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{
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unsigned long ulInitialFPSCR = 0;
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uint32_t ulInitialFPSCR = 0;
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/* A task is registering the fact that it needs an FPU context. Set the
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FPU flag (which is saved as part of the task context). */
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}
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/*-----------------------------------------------------------*/
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void vPortClearInterruptMask( unsigned long ulNewMaskValue )
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void vPortClearInterruptMask( uint32_t ulNewMaskValue )
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{
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if( ulNewMaskValue == pdFALSE )
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{
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@ -379,9 +379,9 @@ void vPortClearInterruptMask( unsigned long ulNewMaskValue )
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}
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/*-----------------------------------------------------------*/
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unsigned long ulPortSetInterruptMask( void )
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uint32_t ulPortSetInterruptMask( void )
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{
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unsigned long ulReturn;
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uint32_t ulReturn;
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__disable_irq();
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if( portICCPMR_PRIORITY_MASK_REGISTER == ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) )
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