mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-19 17:48:33 -04:00
Replace standard types with stdint.h types.
Replace #define types with typedefs. Rename all typedefs to have a _t extension. Add #defines to automatically convert old FreeRTOS specific types to their new names (with the _t).
This commit is contained in:
Richard Barry
parent
f292243dcf
commit
3e20aa7d60
190 changed files with 4940 additions and 4603 deletions
|
|
@ -98,24 +98,24 @@ created. */
|
|||
/*
|
||||
* Initialise the interrupt controller instance.
|
||||
*/
|
||||
static long prvInitialiseInterruptController( void );
|
||||
static int32_t prvInitialiseInterruptController( void );
|
||||
|
||||
/* Ensure the interrupt controller instance variable is initialised before it is
|
||||
* used, and that the initialisation only happens once.
|
||||
*/
|
||||
static long prvEnsureInterruptControllerIsInitialised( void );
|
||||
static int32_t prvEnsureInterruptControllerIsInitialised( void );
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Counts the nesting depth of calls to portENTER_CRITICAL(). Each task
|
||||
maintains its own count, so this variable is saved as part of the task
|
||||
context. */
|
||||
volatile unsigned portBASE_TYPE uxCriticalNesting = portINITIAL_NESTING_VALUE;
|
||||
volatile UBaseType_t uxCriticalNesting = portINITIAL_NESTING_VALUE;
|
||||
|
||||
/* This port uses a separate stack for interrupts. This prevents the stack of
|
||||
every task needing to be large enough to hold an entire interrupt stack on top
|
||||
of the task stack. */
|
||||
unsigned long *pulISRStack;
|
||||
uint32_t *pulISRStack;
|
||||
|
||||
/* If an interrupt requests a context switch, then ulTaskSwitchRequested will
|
||||
get set to 1. ulTaskSwitchRequested is inspected just before the main interrupt
|
||||
|
|
@ -125,7 +125,7 @@ the interrupt exists is the highest priority task that is able to run. This is
|
|||
an unusual mechanism, but is used for this port because a single interrupt can
|
||||
cause the servicing of multiple peripherals - and it is inefficient to call
|
||||
vTaskSwitchContext() multiple times as each peripheral is serviced. */
|
||||
volatile unsigned long ulTaskSwitchRequested = 0UL;
|
||||
volatile uint32_t ulTaskSwitchRequested = 0UL;
|
||||
|
||||
/* The instance of the interrupt controller used by this port. This is required
|
||||
by the Xilinx library API functions. */
|
||||
|
|
@ -139,20 +139,20 @@ static XIntc xInterruptControllerInstance;
|
|||
*
|
||||
* See the portable.h header file.
|
||||
*/
|
||||
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
|
||||
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
|
||||
{
|
||||
extern void *_SDA2_BASE_, *_SDA_BASE_;
|
||||
const unsigned long ulR2 = ( unsigned long ) &_SDA2_BASE_;
|
||||
const unsigned long ulR13 = ( unsigned long ) &_SDA_BASE_;
|
||||
const uint32_t ulR2 = ( uint32_t ) &_SDA2_BASE_;
|
||||
const uint32_t ulR13 = ( uint32_t ) &_SDA_BASE_;
|
||||
|
||||
/* Place a few bytes of known values on the bottom of the stack.
|
||||
This is essential for the Microblaze port and these lines must
|
||||
not be omitted. */
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x00000000;
|
||||
*pxTopOfStack = ( StackType_t ) 0x00000000;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x00000000;
|
||||
*pxTopOfStack = ( StackType_t ) 0x00000000;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x00000000;
|
||||
*pxTopOfStack = ( StackType_t ) 0x00000000;
|
||||
pxTopOfStack--;
|
||||
|
||||
#if XPAR_MICROBLAZE_0_USE_FPU == 1
|
||||
|
|
@ -169,86 +169,86 @@ const unsigned long ulR13 = ( unsigned long ) &_SDA_BASE_;
|
|||
|
||||
/* First stack an initial value for the critical section nesting. This
|
||||
is initialised to zero. */
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x00;
|
||||
*pxTopOfStack = ( StackType_t ) 0x00;
|
||||
|
||||
/* R0 is always zero. */
|
||||
/* R1 is the SP. */
|
||||
|
||||
/* Place an initial value for all the general purpose registers. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) ulR2; /* R2 - read only small data area. */
|
||||
*pxTopOfStack = ( StackType_t ) ulR2; /* R2 - read only small data area. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x03; /* R3 - return values and temporaries. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x03; /* R3 - return values and temporaries. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x04; /* R4 - return values and temporaries. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x04; /* R4 - return values and temporaries. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters;/* R5 contains the function call parameters. */
|
||||
*pxTopOfStack = ( StackType_t ) pvParameters;/* R5 contains the function call parameters. */
|
||||
|
||||
#ifdef portPRE_LOAD_STACK_FOR_DEBUGGING
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x06; /* R6 - other parameters and temporaries. Used as the return address from vPortTaskEntryPoint. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x06; /* R6 - other parameters and temporaries. Used as the return address from vPortTaskEntryPoint. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x07; /* R7 - other parameters and temporaries. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x07; /* R7 - other parameters and temporaries. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x08; /* R8 - other parameters and temporaries. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x08; /* R8 - other parameters and temporaries. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x09; /* R9 - other parameters and temporaries. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x09; /* R9 - other parameters and temporaries. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x0a; /* R10 - other parameters and temporaries. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x0a; /* R10 - other parameters and temporaries. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x0b; /* R11 - temporaries. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x0b; /* R11 - temporaries. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x0c; /* R12 - temporaries. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x0c; /* R12 - temporaries. */
|
||||
pxTopOfStack--;
|
||||
#else
|
||||
pxTopOfStack-= 8;
|
||||
#endif
|
||||
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) ulR13; /* R13 - read/write small data area. */
|
||||
*pxTopOfStack = ( StackType_t ) ulR13; /* R13 - read/write small data area. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* R14 - return address for interrupt. */
|
||||
*pxTopOfStack = ( StackType_t ) pxCode; /* R14 - return address for interrupt. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) NULL; /* R15 - return address for subroutine. */
|
||||
*pxTopOfStack = ( StackType_t ) NULL; /* R15 - return address for subroutine. */
|
||||
|
||||
#ifdef portPRE_LOAD_STACK_FOR_DEBUGGING
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x10; /* R16 - return address for trap (debugger). */
|
||||
*pxTopOfStack = ( StackType_t ) 0x10; /* R16 - return address for trap (debugger). */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x11; /* R17 - return address for exceptions, if configured. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x11; /* R17 - return address for exceptions, if configured. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x12; /* R18 - reserved for assembler and compiler temporaries. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x12; /* R18 - reserved for assembler and compiler temporaries. */
|
||||
pxTopOfStack--;
|
||||
#else
|
||||
pxTopOfStack -= 4;
|
||||
#endif
|
||||
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* R19 - must be saved across function calls. Callee-save. Seems to be interpreted as the frame pointer. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x00; /* R19 - must be saved across function calls. Callee-save. Seems to be interpreted as the frame pointer. */
|
||||
|
||||
#ifdef portPRE_LOAD_STACK_FOR_DEBUGGING
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x14; /* R20 - reserved for storing a pointer to the Global Offset Table (GOT) in Position Independent Code (PIC). Non-volatile in non-PIC code. Must be saved across function calls. Callee-save. Not used by FreeRTOS. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x14; /* R20 - reserved for storing a pointer to the Global Offset Table (GOT) in Position Independent Code (PIC). Non-volatile in non-PIC code. Must be saved across function calls. Callee-save. Not used by FreeRTOS. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x15; /* R21 - must be saved across function calls. Callee-save. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x15; /* R21 - must be saved across function calls. Callee-save. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x16; /* R22 - must be saved across function calls. Callee-save. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x16; /* R22 - must be saved across function calls. Callee-save. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x17; /* R23 - must be saved across function calls. Callee-save. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x17; /* R23 - must be saved across function calls. Callee-save. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x18; /* R24 - must be saved across function calls. Callee-save. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x18; /* R24 - must be saved across function calls. Callee-save. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x19; /* R25 - must be saved across function calls. Callee-save. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x19; /* R25 - must be saved across function calls. Callee-save. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x1a; /* R26 - must be saved across function calls. Callee-save. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x1a; /* R26 - must be saved across function calls. Callee-save. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x1b; /* R27 - must be saved across function calls. Callee-save. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x1b; /* R27 - must be saved across function calls. Callee-save. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x1c; /* R28 - must be saved across function calls. Callee-save. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x1c; /* R28 - must be saved across function calls. Callee-save. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x1d; /* R29 - must be saved across function calls. Callee-save. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x1d; /* R29 - must be saved across function calls. Callee-save. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x1e; /* R30 - must be saved across function calls. Callee-save. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x1e; /* R30 - must be saved across function calls. Callee-save. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x1f; /* R31 - must be saved across function calls. Callee-save. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x1f; /* R31 - must be saved across function calls. Callee-save. */
|
||||
pxTopOfStack--;
|
||||
#else
|
||||
pxTopOfStack -= 13;
|
||||
|
|
@ -260,10 +260,10 @@ const unsigned long ulR13 = ( unsigned long ) &_SDA_BASE_;
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
portBASE_TYPE xPortStartScheduler( void )
|
||||
BaseType_t xPortStartScheduler( void )
|
||||
{
|
||||
extern void ( vPortStartFirstTask )( void );
|
||||
extern unsigned long _stack[];
|
||||
extern uint32_t _stack[];
|
||||
|
||||
/* Setup the hardware to generate the tick. Interrupts are disabled when
|
||||
this function is called.
|
||||
|
|
@ -277,7 +277,7 @@ extern unsigned long _stack[];
|
|||
vApplicationSetupTimerInterrupt();
|
||||
|
||||
/* Reuse the stack from main() as the stack for the interrupts/exceptions. */
|
||||
pulISRStack = ( unsigned long * ) _stack;
|
||||
pulISRStack = ( uint32_t * ) _stack;
|
||||
|
||||
/* Ensure there is enough space for the functions called from the interrupt
|
||||
service routines to write back into the stack frame of the caller. */
|
||||
|
|
@ -321,9 +321,9 @@ extern void VPortYieldASM( void );
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortEnableInterrupt( unsigned char ucInterruptID )
|
||||
void vPortEnableInterrupt( uint8_t ucInterruptID )
|
||||
{
|
||||
long lReturn;
|
||||
int32_t lReturn;
|
||||
|
||||
/* An API function is provided to enable an interrupt in the interrupt
|
||||
controller because the interrupt controller instance variable is private
|
||||
|
|
@ -338,9 +338,9 @@ long lReturn;
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortDisableInterrupt( unsigned char ucInterruptID )
|
||||
void vPortDisableInterrupt( uint8_t ucInterruptID )
|
||||
{
|
||||
long lReturn;
|
||||
int32_t lReturn;
|
||||
|
||||
/* An API function is provided to disable an interrupt in the interrupt
|
||||
controller because the interrupt controller instance variable is private
|
||||
|
|
@ -356,9 +356,9 @@ long lReturn;
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
portBASE_TYPE xPortInstallInterruptHandler( unsigned char ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef )
|
||||
BaseType_t xPortInstallInterruptHandler( uint8_t ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef )
|
||||
{
|
||||
long lReturn;
|
||||
int32_t lReturn;
|
||||
|
||||
/* An API function is provided to install an interrupt handler because the
|
||||
interrupt controller instance variable is private to this file. */
|
||||
|
|
@ -381,10 +381,10 @@ long lReturn;
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static long prvEnsureInterruptControllerIsInitialised( void )
|
||||
static int32_t prvEnsureInterruptControllerIsInitialised( void )
|
||||
{
|
||||
static long lInterruptControllerInitialised = pdFALSE;
|
||||
long lReturn;
|
||||
static int32_t lInterruptControllerInitialised = pdFALSE;
|
||||
int32_t lReturn;
|
||||
|
||||
/* Ensure the interrupt controller instance variable is initialised before
|
||||
it is used, and that the initialisation only happens once. */
|
||||
|
|
@ -434,9 +434,9 @@ extern void vApplicationClearTimerInterrupt( void );
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static long prvInitialiseInterruptController( void )
|
||||
static int32_t prvInitialiseInterruptController( void )
|
||||
{
|
||||
long lStatus;
|
||||
int32_t lStatus;
|
||||
|
||||
lStatus = XIntc_Initialize( &xInterruptControllerInstance, configINTERRUPT_CONTROLLER_TO_USE );
|
||||
|
||||
|
|
|
|||
|
|
@ -104,7 +104,7 @@ configINSTALL_EXCEPTION_HANDLERS is not set to 1. */
|
|||
|
||||
/* This variable is set in the exception entry code, before
|
||||
vPortExceptionHandler is called. */
|
||||
unsigned long *pulStackPointerOnFunctionEntry = NULL;
|
||||
uint32_t *pulStackPointerOnFunctionEntry = NULL;
|
||||
|
||||
/* This is the structure that is filled with the MicroBlaze context as it
|
||||
existed immediately prior to the exception occurrence. A pointer to this
|
||||
|
|
@ -186,7 +186,7 @@ extern void *pxCurrentTCB;
|
|||
xRegisterDump.ulR29 = mfgpr( R29 );
|
||||
xRegisterDump.ulR30 = mfgpr( R30 );
|
||||
xRegisterDump.ulR31 = mfgpr( R31 );
|
||||
xRegisterDump.ulR1_SP = ( ( unsigned long ) pulStackPointerOnFunctionEntry ) + portexASM_HANDLER_STACK_FRAME_SIZE;
|
||||
xRegisterDump.ulR1_SP = ( ( uint32_t ) pulStackPointerOnFunctionEntry ) + portexASM_HANDLER_STACK_FRAME_SIZE;
|
||||
xRegisterDump.ulEAR = mfear();
|
||||
xRegisterDump.ulESR = mfesr();
|
||||
xRegisterDump.ulEDR = mfedr();
|
||||
|
|
@ -209,40 +209,40 @@ extern void *pxCurrentTCB;
|
|||
/* Also fill in a string that describes what type of exception this is.
|
||||
The string uses the same ID names as defined in the MicroBlaze standard
|
||||
library exception header files. */
|
||||
switch( ( unsigned long ) pvExceptionID )
|
||||
switch( ( uint32_t ) pvExceptionID )
|
||||
{
|
||||
case XEXC_ID_FSL :
|
||||
xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_FSL";
|
||||
xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_FSL";
|
||||
break;
|
||||
|
||||
case XEXC_ID_UNALIGNED_ACCESS :
|
||||
xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_UNALIGNED_ACCESS";
|
||||
xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_UNALIGNED_ACCESS";
|
||||
break;
|
||||
|
||||
case XEXC_ID_ILLEGAL_OPCODE :
|
||||
xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_ILLEGAL_OPCODE";
|
||||
xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_ILLEGAL_OPCODE";
|
||||
break;
|
||||
|
||||
case XEXC_ID_M_AXI_I_EXCEPTION :
|
||||
xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_M_AXI_I_EXCEPTION or XEXC_ID_IPLB_EXCEPTION";
|
||||
xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_M_AXI_I_EXCEPTION or XEXC_ID_IPLB_EXCEPTION";
|
||||
break;
|
||||
|
||||
case XEXC_ID_M_AXI_D_EXCEPTION :
|
||||
xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_M_AXI_D_EXCEPTION or XEXC_ID_DPLB_EXCEPTION";
|
||||
xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_M_AXI_D_EXCEPTION or XEXC_ID_DPLB_EXCEPTION";
|
||||
break;
|
||||
|
||||
case XEXC_ID_DIV_BY_ZERO :
|
||||
xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_DIV_BY_ZERO";
|
||||
xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_DIV_BY_ZERO";
|
||||
break;
|
||||
|
||||
case XEXC_ID_STACK_VIOLATION :
|
||||
xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_STACK_VIOLATION or XEXC_ID_MMU";
|
||||
xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_STACK_VIOLATION or XEXC_ID_MMU";
|
||||
break;
|
||||
|
||||
#if XPAR_MICROBLAZE_0_USE_FPU == 1
|
||||
|
||||
case XEXC_ID_FPU :
|
||||
xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_FPU see ulFSR value";
|
||||
xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_FPU see ulFSR value";
|
||||
break;
|
||||
|
||||
#endif /* XPAR_MICROBLAZE_0_USE_FPU */
|
||||
|
|
@ -265,7 +265,7 @@ extern void *pxCurrentTCB;
|
|||
|
||||
void vPortExceptionsInstallHandlers( void )
|
||||
{
|
||||
static unsigned long ulHandlersAlreadyInstalled = pdFALSE;
|
||||
static uint32_t ulHandlersAlreadyInstalled = pdFALSE;
|
||||
|
||||
if( ulHandlersAlreadyInstalled == pdFALSE )
|
||||
{
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
|
||||
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
|
@ -75,7 +75,7 @@ extern "C" {
|
|||
#include <xparameters.h>
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
* Port specific definitions.
|
||||
*
|
||||
* The settings in this file configure FreeRTOS correctly for the
|
||||
* given hardware and compiler.
|
||||
|
|
@ -90,17 +90,21 @@ extern "C" {
|
|||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE unsigned long
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
#if( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef unsigned portSHORT portTickType;
|
||||
#define portMAX_DELAY ( portTickType ) 0xffff
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef unsigned portLONG portTickType;
|
||||
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Interrupt control macros and functions. */
|
||||
void microblaze_disable_interrupts( void );
|
||||
|
|
@ -114,13 +118,13 @@ void microblaze_enable_interrupts( void );
|
|||
void vPortEnterCritical( void );
|
||||
void vPortExitCritical( void );
|
||||
#define portENTER_CRITICAL() { \
|
||||
extern volatile unsigned portBASE_TYPE uxCriticalNesting; \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
microblaze_disable_interrupts(); \
|
||||
uxCriticalNesting++; \
|
||||
}
|
||||
|
||||
#define portEXIT_CRITICAL() { \
|
||||
extern volatile unsigned portBASE_TYPE uxCriticalNesting; \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
/* Interrupts are disabled, so we can */ \
|
||||
/* access the variable directly. */ \
|
||||
uxCriticalNesting--; \
|
||||
|
|
@ -144,14 +148,14 @@ then checks this flag, and calls vTaskSwitchContext() before restoring a task
|
|||
context, if the flag is not false. This is done to prevent multiple calls to
|
||||
vTaskSwitchContext() being made from a single interrupt, as a single interrupt
|
||||
can result in multiple peripherals being serviced. */
|
||||
extern volatile unsigned long ulTaskSwitchRequested;
|
||||
extern volatile uint32_t ulTaskSwitchRequested;
|
||||
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) ulTaskSwitchRequested = 1
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Hardware specifics. */
|
||||
#define portBYTE_ALIGNMENT 4
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
|
||||
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portNOP() asm volatile ( "NOP" )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
@ -167,53 +171,53 @@ typedef struct PORT_REGISTER_DUMP
|
|||
{
|
||||
/* The following structure members hold the values of the MicroBlaze
|
||||
registers at the time the exception was raised. */
|
||||
unsigned long ulR1_SP;
|
||||
unsigned long ulR2_small_data_area;
|
||||
unsigned long ulR3;
|
||||
unsigned long ulR4;
|
||||
unsigned long ulR5;
|
||||
unsigned long ulR6;
|
||||
unsigned long ulR7;
|
||||
unsigned long ulR8;
|
||||
unsigned long ulR9;
|
||||
unsigned long ulR10;
|
||||
unsigned long ulR11;
|
||||
unsigned long ulR12;
|
||||
unsigned long ulR13_read_write_small_data_area;
|
||||
unsigned long ulR14_return_address_from_interrupt;
|
||||
unsigned long ulR15_return_address_from_subroutine;
|
||||
unsigned long ulR16_return_address_from_trap;
|
||||
unsigned long ulR17_return_address_from_exceptions; /* The exception entry code will copy the BTR into R17 if the exception occurred in the delay slot of a branch instruction. */
|
||||
unsigned long ulR18;
|
||||
unsigned long ulR19;
|
||||
unsigned long ulR20;
|
||||
unsigned long ulR21;
|
||||
unsigned long ulR22;
|
||||
unsigned long ulR23;
|
||||
unsigned long ulR24;
|
||||
unsigned long ulR25;
|
||||
unsigned long ulR26;
|
||||
unsigned long ulR27;
|
||||
unsigned long ulR28;
|
||||
unsigned long ulR29;
|
||||
unsigned long ulR30;
|
||||
unsigned long ulR31;
|
||||
unsigned long ulPC;
|
||||
unsigned long ulESR;
|
||||
unsigned long ulMSR;
|
||||
unsigned long ulEAR;
|
||||
unsigned long ulFSR;
|
||||
unsigned long ulEDR;
|
||||
uint32_t ulR1_SP;
|
||||
uint32_t ulR2_small_data_area;
|
||||
uint32_t ulR3;
|
||||
uint32_t ulR4;
|
||||
uint32_t ulR5;
|
||||
uint32_t ulR6;
|
||||
uint32_t ulR7;
|
||||
uint32_t ulR8;
|
||||
uint32_t ulR9;
|
||||
uint32_t ulR10;
|
||||
uint32_t ulR11;
|
||||
uint32_t ulR12;
|
||||
uint32_t ulR13_read_write_small_data_area;
|
||||
uint32_t ulR14_return_address_from_interrupt;
|
||||
uint32_t ulR15_return_address_from_subroutine;
|
||||
uint32_t ulR16_return_address_from_trap;
|
||||
uint32_t ulR17_return_address_from_exceptions; /* The exception entry code will copy the BTR into R17 if the exception occurred in the delay slot of a branch instruction. */
|
||||
uint32_t ulR18;
|
||||
uint32_t ulR19;
|
||||
uint32_t ulR20;
|
||||
uint32_t ulR21;
|
||||
uint32_t ulR22;
|
||||
uint32_t ulR23;
|
||||
uint32_t ulR24;
|
||||
uint32_t ulR25;
|
||||
uint32_t ulR26;
|
||||
uint32_t ulR27;
|
||||
uint32_t ulR28;
|
||||
uint32_t ulR29;
|
||||
uint32_t ulR30;
|
||||
uint32_t ulR31;
|
||||
uint32_t ulPC;
|
||||
uint32_t ulESR;
|
||||
uint32_t ulMSR;
|
||||
uint32_t ulEAR;
|
||||
uint32_t ulFSR;
|
||||
uint32_t ulEDR;
|
||||
|
||||
/* A human readable description of the exception cause. The strings used
|
||||
are the same as the #define constant names found in the
|
||||
microblaze_exceptions_i.h header file */
|
||||
signed char *pcExceptionCause;
|
||||
int8_t *pcExceptionCause;
|
||||
|
||||
/* The human readable name of the task that was running at the time the
|
||||
exception occurred. This is the name that was given to the task when the
|
||||
task was created using the FreeRTOS xTaskCreate() API function. */
|
||||
signed char *pcCurrentTaskName;
|
||||
int8_t *pcCurrentTaskName;
|
||||
|
||||
/* The handle of the task that was running a the time the exception
|
||||
occurred. */
|
||||
|
|
@ -223,15 +227,15 @@ typedef struct PORT_REGISTER_DUMP
|
|||
|
||||
|
||||
/*
|
||||
* Installs pxHandler as the interrupt handler for the peripheral specified by
|
||||
* Installs pxHandler as the interrupt handler for the peripheral specified by
|
||||
* the ucInterruptID parameter.
|
||||
*
|
||||
* ucInterruptID:
|
||||
*
|
||||
*
|
||||
* The ID of the peripheral that will have pxHandler assigned as its interrupt
|
||||
* handler. Peripheral IDs are defined in the xparameters.h header file, which
|
||||
* is itself part of the BSP project. For example, in the official demo
|
||||
* application for this port, xparameters.h defines the following IDs for the
|
||||
* handler. Peripheral IDs are defined in the xparameters.h header file, which
|
||||
* is itself part of the BSP project. For example, in the official demo
|
||||
* application for this port, xparameters.h defines the following IDs for the
|
||||
* four possible interrupt sources:
|
||||
*
|
||||
* XPAR_INTC_0_UARTLITE_1_VEC_ID - for the UARTlite peripheral.
|
||||
|
|
@ -241,7 +245,7 @@ typedef struct PORT_REGISTER_DUMP
|
|||
*
|
||||
*
|
||||
* pxHandler:
|
||||
*
|
||||
*
|
||||
* A pointer to the interrupt handler function itself. This must be a void
|
||||
* function that takes a (void *) parameter.
|
||||
*
|
||||
|
|
@ -253,23 +257,23 @@ typedef struct PORT_REGISTER_DUMP
|
|||
* the peripheral instance variable, so it can be accessed from inside the
|
||||
* handler function.
|
||||
*
|
||||
*
|
||||
*
|
||||
* pdPASS is returned if the function executes successfully. Any other value
|
||||
* being returned indicates that the function did not execute correctly.
|
||||
*/
|
||||
portBASE_TYPE xPortInstallInterruptHandler( unsigned char ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef );
|
||||
BaseType_t xPortInstallInterruptHandler( uint8_t ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef );
|
||||
|
||||
|
||||
/*
|
||||
* Enables the interrupt, within the interrupt controller, for the peripheral
|
||||
* Enables the interrupt, within the interrupt controller, for the peripheral
|
||||
* specified by the ucInterruptID parameter.
|
||||
*
|
||||
* ucInterruptID:
|
||||
*
|
||||
*
|
||||
* The ID of the peripheral that will have its interrupt enabled in the
|
||||
* interrupt controller. Peripheral IDs are defined in the xparameters.h header
|
||||
* file, which is itself part of the BSP project. For example, in the official
|
||||
* demo application for this port, xparameters.h defines the following IDs for
|
||||
* interrupt controller. Peripheral IDs are defined in the xparameters.h header
|
||||
* file, which is itself part of the BSP project. For example, in the official
|
||||
* demo application for this port, xparameters.h defines the following IDs for
|
||||
* the four possible interrupt sources:
|
||||
*
|
||||
* XPAR_INTC_0_UARTLITE_1_VEC_ID - for the UARTlite peripheral.
|
||||
|
|
@ -278,18 +282,18 @@ portBASE_TYPE xPortInstallInterruptHandler( unsigned char ucInterruptID, XInterr
|
|||
* XPAR_INTC_0_GPIO_1_VEC_ID - for the button inputs.
|
||||
*
|
||||
*/
|
||||
void vPortEnableInterrupt( unsigned char ucInterruptID );
|
||||
void vPortEnableInterrupt( uint8_t ucInterruptID );
|
||||
|
||||
/*
|
||||
* Disables the interrupt, within the interrupt controller, for the peripheral
|
||||
* Disables the interrupt, within the interrupt controller, for the peripheral
|
||||
* specified by the ucInterruptID parameter.
|
||||
*
|
||||
* ucInterruptID:
|
||||
*
|
||||
*
|
||||
* The ID of the peripheral that will have its interrupt disabled in the
|
||||
* interrupt controller. Peripheral IDs are defined in the xparameters.h header
|
||||
* file, which is itself part of the BSP project. For example, in the official
|
||||
* demo application for this port, xparameters.h defines the following IDs for
|
||||
* interrupt controller. Peripheral IDs are defined in the xparameters.h header
|
||||
* file, which is itself part of the BSP project. For example, in the official
|
||||
* demo application for this port, xparameters.h defines the following IDs for
|
||||
* the four possible interrupt sources:
|
||||
*
|
||||
* XPAR_INTC_0_UARTLITE_1_VEC_ID - for the UARTlite peripheral.
|
||||
|
|
@ -298,49 +302,49 @@ void vPortEnableInterrupt( unsigned char ucInterruptID );
|
|||
* XPAR_INTC_0_GPIO_1_VEC_ID - for the button inputs.
|
||||
*
|
||||
*/
|
||||
void vPortDisableInterrupt( unsigned char ucInterruptID );
|
||||
void vPortDisableInterrupt( uint8_t ucInterruptID );
|
||||
|
||||
/*
|
||||
* This is an application defined callback function used to install the tick
|
||||
* interrupt handler. It is provided as an application callback because the
|
||||
* kernel will run on lots of different MicroBlaze and FPGA configurations - not
|
||||
* all of which will have the same timer peripherals defined or available. This
|
||||
* example uses the AXI Timer 0. If that is available on your hardware platform
|
||||
* then this example callback implementation should not require modification.
|
||||
* The name of the interrupt handler that should be installed is vPortTickISR(),
|
||||
* interrupt handler. It is provided as an application callback because the
|
||||
* kernel will run on lots of different MicroBlaze and FPGA configurations - not
|
||||
* all of which will have the same timer peripherals defined or available. This
|
||||
* example uses the AXI Timer 0. If that is available on your hardware platform
|
||||
* then this example callback implementation should not require modification.
|
||||
* The name of the interrupt handler that should be installed is vPortTickISR(),
|
||||
* which the function below declares as an extern.
|
||||
*/
|
||||
*/
|
||||
void vApplicationSetupTimerInterrupt( void );
|
||||
|
||||
/*
|
||||
/*
|
||||
* This is an application defined callback function used to clear whichever
|
||||
* interrupt was installed by the the vApplicationSetupTimerInterrupt() callback
|
||||
* function - in this case the interrupt generated by the AXI timer. It is
|
||||
* provided as an application callback because the kernel will run on lots of
|
||||
* different MicroBlaze and FPGA configurations - not all of which will have the
|
||||
* same timer peripherals defined or available. This example uses the AXI Timer 0.
|
||||
* If that is available on your hardware platform then this example callback
|
||||
* function - in this case the interrupt generated by the AXI timer. It is
|
||||
* provided as an application callback because the kernel will run on lots of
|
||||
* different MicroBlaze and FPGA configurations - not all of which will have the
|
||||
* same timer peripherals defined or available. This example uses the AXI Timer 0.
|
||||
* If that is available on your hardware platform then this example callback
|
||||
* implementation should not require modification provided the example definition
|
||||
* of vApplicationSetupTimerInterrupt() is also not modified.
|
||||
* of vApplicationSetupTimerInterrupt() is also not modified.
|
||||
*/
|
||||
void vApplicationClearTimerInterrupt( void );
|
||||
|
||||
/*
|
||||
* vPortExceptionsInstallHandlers() is only available when the MicroBlaze
|
||||
* is configured to include exception functionality, and
|
||||
* is configured to include exception functionality, and
|
||||
* configINSTALL_EXCEPTION_HANDLERS is set to 1 in FreeRTOSConfig.h.
|
||||
*
|
||||
* vPortExceptionsInstallHandlers() installs the FreeRTOS exception handler
|
||||
* for every possible exception cause.
|
||||
* for every possible exception cause.
|
||||
*
|
||||
* vPortExceptionsInstallHandlers() can be called explicitly from application
|
||||
* code. After that is done, the default FreeRTOS exception handler that will
|
||||
* have been installed can be replaced for any specific exception cause by using
|
||||
* have been installed can be replaced for any specific exception cause by using
|
||||
* the standard Xilinx library function microblaze_register_exception_handler().
|
||||
*
|
||||
* If vPortExceptionsInstallHandlers() is not called explicitly by the
|
||||
* If vPortExceptionsInstallHandlers() is not called explicitly by the
|
||||
* application, it will be called automatically by the kernel the first time
|
||||
* xPortInstallInterruptHandler() is called. At that time, any exception
|
||||
* xPortInstallInterruptHandler() is called. At that time, any exception
|
||||
* handlers that may have already been installed will be replaced.
|
||||
*
|
||||
* See the description of vApplicationExceptionRegisterDump() for information
|
||||
|
|
@ -349,16 +353,16 @@ void vApplicationClearTimerInterrupt( void );
|
|||
void vPortExceptionsInstallHandlers( void );
|
||||
|
||||
/*
|
||||
* The FreeRTOS exception handler fills an xPortRegisterDump structure (defined
|
||||
* in portmacro.h) with the MicroBlaze context, as it was at the time the
|
||||
* The FreeRTOS exception handler fills an xPortRegisterDump structure (defined
|
||||
* in portmacro.h) with the MicroBlaze context, as it was at the time the
|
||||
* exception occurred. The exception handler then calls
|
||||
* vApplicationExceptionRegisterDump(), passing in the completed
|
||||
* xPortRegisterDump structure as its parameter.
|
||||
*
|
||||
* The FreeRTOS kernel provides its own implementation of
|
||||
* vApplicationExceptionRegisterDump(), but the kernel provided implementation
|
||||
* is declared as being 'weak'. The weak definition allows the application
|
||||
* writer to provide their own implementation, should they wish to use the
|
||||
* vApplicationExceptionRegisterDump(), but the kernel provided implementation
|
||||
* is declared as being 'weak'. The weak definition allows the application
|
||||
* writer to provide their own implementation, should they wish to use the
|
||||
* register dump information. For example, an implementation could be provided
|
||||
* that wrote the register dump data to a display, or a UART port.
|
||||
*/
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue