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Replace standard types with stdint.h types.

Browse source 
Replace #define types with typedefs.
Rename all typedefs to have a _t extension.
Add #defines to automatically convert old FreeRTOS specific types to their new names (with the _t).
This commit is contained in:
Richard Barry 2013-12-29 14:06:04 +00:00
parent f292243dcf
commit 3e20aa7d60
190 changed files with 4940 additions and 4603 deletions
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54
FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/port.c
View file

@ -87,10 +87,10 @@
#include "tc.h"
/* Constants required to setup the task context. */
#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )
#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
#define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )
#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
#define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 )
#define portTICK_PRIORITY_6 ( 6 )
/*-----------------------------------------------------------*/
@ -111,9 +111,9 @@ extern void vPortISRStartFirstTask( void );
*
* See header file for description.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
portSTACK_TYPE *pxOriginalTOS;
StackType_t *pxOriginalTOS;
pxOriginalTOS = pxTopOfStack;
@ -127,46 +127,46 @@ portSTACK_TYPE *pxOriginalTOS;
/* First on the stack is the return address - which in this case is the
start of the task. The offset is added to make the return address appear
as it would within an IRQ ISR. */
*pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */
*pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
*pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
pxTopOfStack--;
/* When the task starts is will expect to find the function parameter in
R0. */
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
pxTopOfStack--;
/* The last thing onto the stack is the status register, which is set for
system mode, with interrupts enabled. */
*pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
#ifdef THUMB_INTERWORK
{
@ -187,7 +187,7 @@ portSTACK_TYPE *pxOriginalTOS;
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortStartScheduler( void )
BaseType_t xPortStartScheduler( void )
{
/* Start the timer that generates the tick ISR. Interrupts are disabled
here already. */
@ -213,7 +213,7 @@ void vPortEndScheduler( void )
*/
static void prvSetupTimerInterrupt( void )
{
volatile unsigned long ulDummy;
volatile uint32_t ulDummy;
/* Enable clock to the tick timer... */
AT91C_BASE_PS->PS_PCER = portTIMER_CLK_ENABLE_BIT;
@ -233,12 +233,12 @@ volatile unsigned long ulDummy;
#if configUSE_PREEMPTION == 1
{
extern void ( vPreemptiveTick )( void );
AT91C_BASE_AIC->AIC_SVR[portTIMER_AIC_CHANNEL] = ( unsigned long ) vPreemptiveTick;
AT91C_BASE_AIC->AIC_SVR[portTIMER_AIC_CHANNEL] = ( uint32_t ) vPreemptiveTick;
}
#else // else use cooperative scheduler
{
extern void ( vNonPreemptiveTick )( void );
AT91C_BASE_AIC->AIC_SVR[portTIMER_AIC_CHANNEL] = ( unsigned long ) vNonPreemptiveTick;
AT91C_BASE_AIC->AIC_SVR[portTIMER_AIC_CHANNEL] = ( uint32_t ) vNonPreemptiveTick;
}
#endif

10
FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/portISR.c
View file

@ -83,11 +83,11 @@
#include "task.h"
/* Constants required to handle interrupts. */
#define portCLEAR_AIC_INTERRUPT ( ( unsigned long ) 0 )
#define portCLEAR_AIC_INTERRUPT ( ( uint32_t ) 0 )
/* Constants required to handle critical sections. */
#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )
volatile unsigned long ulCriticalNesting = 9999UL;
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
volatile uint32_t ulCriticalNesting = 9999UL;
/*-----------------------------------------------------------*/
@ -147,7 +147,7 @@ void vPortYieldProcessor( void )
void vNonPreemptiveTick( void ) __attribute__ ((interrupt ("IRQ")));
void vNonPreemptiveTick( void )
{
static volatile unsigned long ulDummy;
static volatile uint32_t ulDummy;
/* Clear tick timer interrupt indication. */
ulDummy = portTIMER_REG_BASE_PTR->TC_SR;
@ -170,7 +170,7 @@ void vPortYieldProcessor( void )
/* WARNING - Do not use local (stack) variables here. Use globals
if you must! */
static volatile unsigned long ulDummy;
static volatile uint32_t ulDummy;
/* Clear tick timer interrupt indication. */
ulDummy = portTIMER_REG_BASE_PTR->TC_SR;

46
FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/portmacro.h
View file

@ -1,5 +1,5 @@
/*
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@ -65,12 +65,12 @@
/*
Changes from V3.2.3
+ Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1.
Changes from V3.2.4
+ Removed the use of the %0 parameter within the assembler macros and
+ Removed the use of the %0 parameter within the assembler macros and
replaced them with hard coded registers. This will ensure the
assembler does not select the link register as the temp register as
was occasionally happening previously.
@ -81,7 +81,7 @@
Changes from V4.5.0
+ Removed the portENTER_SWITCHING_ISR() and portEXIT_SWITCHING_ISR() macros
and replaced them with portYIELD_FROM_ISR() macro. Application code
and replaced them with portYIELD_FROM_ISR() macro. Application code
should now make use of the portSAVE_CONTEXT() and portRESTORE_CONTEXT()
macros as per the V4.5.1 demo code.
*/
@ -94,7 +94,7 @@ extern "C" {
#endif
/*-----------------------------------------------------------
* Port specific definitions.
* Port specific definitions.
*
* The settings in this file configure FreeRTOS correctly for the
* given hardware and compiler.
@ -109,21 +109,25 @@ extern "C" {
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE unsigned portLONG
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif
/*-----------------------------------------------------------*/
/*-----------------------------------------------------------*/
/* Hardware specifics. */
#define portSTACK_GROWTH ( -1 )
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8
#define portYIELD() asm volatile ( "SWI 0" )
#define portNOP() asm volatile ( "NOP" )
@ -135,8 +139,8 @@ extern "C" {
*/
#define portTIMER_REG_BASE_PTR AT91C_BASE_TC0
#define portTIMER_CLK_ENABLE_BIT AT91C_PS_TC0
#define portTIMER_AIC_CHANNEL ( ( unsigned portLONG ) 4 )
/*-----------------------------------------------------------*/
#define portTIMER_AIC_CHANNEL ( ( uint32_t ) 4 )
/*-----------------------------------------------------------*/
/* Task utilities. */
@ -150,7 +154,7 @@ extern "C" {
#define portRESTORE_CONTEXT() \
{ \
extern volatile void * volatile pxCurrentTCB; \
extern volatile unsigned portLONG ulCriticalNesting; \
extern volatile uint32_t ulCriticalNesting; \
\
/* Set the LR to the task stack. */ \
asm volatile ( \
@ -187,7 +191,7 @@ extern volatile unsigned portLONG ulCriticalNesting; \
#define portSAVE_CONTEXT() \
{ \
extern volatile void * volatile pxCurrentTCB; \
extern volatile unsigned portLONG ulCriticalNesting; \
extern volatile uint32_t ulCriticalNesting; \
\
/* Push R0 as we are going to use the register. */ \
asm volatile ( \
@ -236,8 +240,8 @@ extern volatile unsigned portLONG ulCriticalNesting; \
/*
* The interrupt management utilities can only be called from ARM mode. When
* THUMB_INTERWORK is defined the utilities are defined as functions in
* portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not
* THUMB_INTERWORK is defined the utilities are defined as functions in
* portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not
* defined then the utilities are defined as macros here - as per other ports.
*/
@ -248,7 +252,7 @@ extern volatile unsigned portLONG ulCriticalNesting; \
#define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb()
#define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb()
#else
#define portDISABLE_INTERRUPTS() \
@ -258,7 +262,7 @@ extern volatile unsigned portLONG ulCriticalNesting; \
"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ \
"MSR CPSR, R0 \n\t" /* Write back modified value. */ \
"LDMIA SP!, {R0} " ) /* Pop R0. */
#define portENABLE_INTERRUPTS() \
asm volatile ( \
"STMDB SP!, {R0} \n\t" /* Push R0. */ \
@ -275,7 +279,7 @@ extern void vPortExitCritical( void );
#define portENTER_CRITICAL() vPortEnterCritical();
#define portEXIT_CRITICAL() vPortExitCritical();
/*-----------------------------------------------------------*/
/*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )

46
FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/lib_AT91SAM7X256.h
View file

@ -2262,7 +2262,7 @@ __inline unsigned int AT91F_US_ReceiveFrame (
//*----------------------------------------------------------------------------
__inline void AT91F_US_SetIrdaFilter (
AT91PS_USART pUSART,
unsigned char value
uint8_t value
)
{
pUSART->US_IF = value;
@ -2704,7 +2704,7 @@ __inline void AT91F_UDP_DisableIt (
//*----------------------------------------------------------------------------
__inline void AT91F_UDP_SetAddress (
AT91PS_UDP pUDP, // \arg pointer to a UDP controller
unsigned char address) // \arg new UDP address
uint8_t address) // \arg new UDP address
{
pUDP->UDP_FADDR = (AT91C_UDP_FEN | address);
}
@ -2715,7 +2715,7 @@ __inline void AT91F_UDP_SetAddress (
//*----------------------------------------------------------------------------
__inline void AT91F_UDP_EnableEp (
AT91PS_UDP pUDP, // \arg pointer to a UDP controller
unsigned char endpoint) // \arg endpoint number
uint8_t endpoint) // \arg endpoint number
{
pUDP->UDP_CSR[endpoint] |= AT91C_UDP_EPEDS;
}
@ -2726,7 +2726,7 @@ __inline void AT91F_UDP_EnableEp (
//*----------------------------------------------------------------------------
__inline void AT91F_UDP_DisableEp (
AT91PS_UDP pUDP, // \arg pointer to a UDP controller
unsigned char endpoint) // \arg endpoint number
uint8_t endpoint) // \arg endpoint number
{
pUDP->UDP_CSR[endpoint] &= ~AT91C_UDP_EPEDS;
}
@ -2771,7 +2771,7 @@ __inline void AT91F_UDP_ResetEp ( // \return the UDP device state
//*----------------------------------------------------------------------------
__inline void AT91F_UDP_EpStall(
AT91PS_UDP pUDP, // \arg pointer to a UDP controller
unsigned char endpoint) // \arg endpoint number
uint8_t endpoint) // \arg endpoint number
{
pUDP->UDP_CSR[endpoint] |= AT91C_UDP_FORCESTALL;
}
@ -2782,8 +2782,8 @@ __inline void AT91F_UDP_EpStall(
//*----------------------------------------------------------------------------
__inline void AT91F_UDP_EpWrite(
AT91PS_UDP pUDP, // \arg pointer to a UDP controller
unsigned char endpoint, // \arg endpoint number
unsigned char value) // \arg value to be written in the DPR
uint8_t endpoint, // \arg endpoint number
uint8_t value) // \arg value to be written in the DPR
{
pUDP->UDP_FDR[endpoint] = value;
}
@ -2794,7 +2794,7 @@ __inline void AT91F_UDP_EpWrite(
//*----------------------------------------------------------------------------
__inline unsigned int AT91F_UDP_EpRead(
AT91PS_UDP pUDP, // \arg pointer to a UDP controller
unsigned char endpoint) // \arg endpoint number
uint8_t endpoint) // \arg endpoint number
{
return pUDP->UDP_FDR[endpoint];
}
@ -2805,7 +2805,7 @@ __inline unsigned int AT91F_UDP_EpRead(
//*----------------------------------------------------------------------------
__inline void AT91F_UDP_EpEndOfWr(
AT91PS_UDP pUDP, // \arg pointer to a UDP controller
unsigned char endpoint) // \arg endpoint number
uint8_t endpoint) // \arg endpoint number
{
pUDP->UDP_CSR[endpoint] |= AT91C_UDP_TXPKTRDY;
}
@ -2816,7 +2816,7 @@ __inline void AT91F_UDP_EpEndOfWr(
//*----------------------------------------------------------------------------
__inline void AT91F_UDP_EpClear(
AT91PS_UDP pUDP, // \arg pointer to a UDP controller
unsigned char endpoint, // \arg endpoint number
uint8_t endpoint, // \arg endpoint number
unsigned int flag) // \arg flag to be cleared
{
pUDP->UDP_CSR[endpoint] &= ~(flag);
@ -2828,7 +2828,7 @@ __inline void AT91F_UDP_EpClear(
//*----------------------------------------------------------------------------
__inline void AT91F_UDP_EpSet(
AT91PS_UDP pUDP, // \arg pointer to a UDP controller
unsigned char endpoint, // \arg endpoint number
uint8_t endpoint, // \arg endpoint number
unsigned int flag) // \arg flag to be cleared
{
pUDP->UDP_CSR[endpoint] |= flag;
@ -2840,7 +2840,7 @@ __inline void AT91F_UDP_EpSet(
//*----------------------------------------------------------------------------
__inline unsigned int AT91F_UDP_EpStatus(
AT91PS_UDP pUDP, // \arg pointer to a UDP controller
unsigned char endpoint) // \arg endpoint number
uint8_t endpoint) // \arg endpoint number
{
return pUDP->UDP_CSR[endpoint];
}
@ -3158,7 +3158,7 @@ __inline unsigned int AT91F_CAN_GetMessageModeReg (
__inline void AT91F_CAN_CfgMessageIDReg (
AT91PS_CAN_MB CAN_Mailbox, // pointer to a CAN Mailbox
unsigned int id,
unsigned char version)
uint8_t version)
{
if(version==0) // IDvA Standard Format
CAN_Mailbox->CAN_MB_MID = id<<18;
@ -3680,7 +3680,7 @@ __inline void AT91F_AES_LoadNewSeed (
//*----------------------------------------------------------------------------
__inline void AT91F_AES_SetCryptoKey (
AT91PS_AES pAES, // pointer to a AES controller
unsigned char index,
uint8_t index,
unsigned int keyword
)
{
@ -3693,7 +3693,7 @@ __inline void AT91F_AES_SetCryptoKey (
//*----------------------------------------------------------------------------
__inline void AT91F_AES_InputData (
AT91PS_AES pAES, // pointer to a AES controller
unsigned char index,
uint8_t index,
unsigned int indata
)
{
@ -3706,7 +3706,7 @@ __inline void AT91F_AES_InputData (
//*----------------------------------------------------------------------------
__inline unsigned int AT91F_AES_GetOutputData (
AT91PS_AES pAES, // pointer to a AES controller
unsigned char index
uint8_t index
)
{
return pAES->AES_ODATAxR[index];
@ -3718,7 +3718,7 @@ __inline unsigned int AT91F_AES_GetOutputData (
//*----------------------------------------------------------------------------
__inline void AT91F_AES_SetInitializationVector (
AT91PS_AES pAES, // pointer to a AES controller
unsigned char index,
uint8_t index,
unsigned int initvector
)
{
@ -3845,7 +3845,7 @@ __inline void AT91F_TDES_SoftReset (
//*----------------------------------------------------------------------------
__inline void AT91F_TDES_SetCryptoKey1 (
AT91PS_TDES pTDES, // pointer to a TDES controller
unsigned char index,
uint8_t index,
unsigned int keyword
)
{
@ -3858,7 +3858,7 @@ __inline void AT91F_TDES_SetCryptoKey1 (
//*----------------------------------------------------------------------------
__inline void AT91F_TDES_SetCryptoKey2 (
AT91PS_TDES pTDES, // pointer to a TDES controller
unsigned char index,
uint8_t index,
unsigned int keyword
)
{
@ -3871,7 +3871,7 @@ __inline void AT91F_TDES_SetCryptoKey2 (
//*----------------------------------------------------------------------------
__inline void AT91F_TDES_SetCryptoKey3 (
AT91PS_TDES pTDES, // pointer to a TDES controller
unsigned char index,
uint8_t index,
unsigned int keyword
)
{
@ -3884,7 +3884,7 @@ __inline void AT91F_TDES_SetCryptoKey3 (
//*----------------------------------------------------------------------------
__inline void AT91F_TDES_InputData (
AT91PS_TDES pTDES, // pointer to a TDES controller
unsigned char index,
uint8_t index,
unsigned int indata
)
{
@ -3897,7 +3897,7 @@ __inline void AT91F_TDES_InputData (
//*----------------------------------------------------------------------------
__inline unsigned int AT91F_TDES_GetOutputData (
AT91PS_TDES pTDES, // pointer to a TDES controller
unsigned char index
uint8_t index
)
{
return pTDES->TDES_ODATAxR[index];
@ -3909,7 +3909,7 @@ __inline unsigned int AT91F_TDES_GetOutputData (
//*----------------------------------------------------------------------------
__inline void AT91F_TDES_SetInitializationVector (
AT91PS_TDES pTDES, // pointer to a TDES controller
unsigned char index,
uint8_t index,
unsigned int initvector
)
{

60
FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/port.c
View file

@ -83,24 +83,24 @@
#include "AT91SAM7X256.h"
/* Constants required to setup the task context. */
#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )
#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
#define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )
#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
#define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 )
/* Constants required to setup the tick ISR. */
#define portENABLE_TIMER ( ( unsigned char ) 0x01 )
#define portENABLE_TIMER ( ( uint8_t ) 0x01 )
#define portPRESCALE_VALUE 0x00
#define portINTERRUPT_ON_MATCH ( ( unsigned long ) 0x01 )
#define portRESET_COUNT_ON_MATCH ( ( unsigned long ) 0x02 )
#define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )
#define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )
/* Constants required to setup the PIT. */
#define portPIT_CLOCK_DIVISOR ( ( unsigned long ) 16 )
#define portPIT_CLOCK_DIVISOR ( ( uint32_t ) 16 )
#define portPIT_COUNTER_VALUE ( ( ( configCPU_CLOCK_HZ / portPIT_CLOCK_DIVISOR ) / 1000UL ) * portTICK_RATE_MS )
#define portINT_LEVEL_SENSITIVE 0
#define portPIT_ENABLE ( ( unsigned short ) 0x1 << 24 )
#define portPIT_INT_ENABLE ( ( unsigned short ) 0x1 << 25 )
#define portPIT_ENABLE ( ( uint16_t ) 0x1 << 24 )
#define portPIT_INT_ENABLE ( ( uint16_t ) 0x1 << 25 )
/*-----------------------------------------------------------*/
/* Setup the timer to generate the tick interrupts. */
@ -120,9 +120,9 @@ extern void vPortISRStartFirstTask( void );
*
* See header file for description.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
portSTACK_TYPE *pxOriginalTOS;
StackType_t *pxOriginalTOS;
pxOriginalTOS = pxTopOfStack;
@ -136,46 +136,46 @@ portSTACK_TYPE *pxOriginalTOS;
/* First on the stack is the return address - which in this case is the
start of the task. The offset is added to make the return address appear
as it would within an IRQ ISR. */
*pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x00000000; /* R14 */
*pxTopOfStack = ( StackType_t ) 0x00000000; /* R14 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
*pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
pxTopOfStack--;
/* When the task starts is will expect to find the function parameter in
R0. */
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
pxTopOfStack--;
/* The last thing onto the stack is the status register, which is set for
system mode, with interrupts enabled. */
*pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
#ifdef THUMB_INTERWORK
{
@ -196,7 +196,7 @@ portSTACK_TYPE *pxOriginalTOS;
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortStartScheduler( void )
BaseType_t xPortStartScheduler( void )
{
/* Start the timer that generates the tick ISR. Interrupts are disabled
here already. */

10
FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portISR.c
View file

@ -84,12 +84,12 @@
#include "AT91SAM7X256.h"
/* Constants required to handle interrupts. */
#define portTIMER_MATCH_ISR_BIT ( ( unsigned char ) 0x01 )
#define portCLEAR_VIC_INTERRUPT ( ( unsigned long ) 0 )
#define portTIMER_MATCH_ISR_BIT ( ( uint8_t ) 0x01 )
#define portCLEAR_VIC_INTERRUPT ( ( uint32_t ) 0 )
/* Constants required to handle critical sections. */
#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )
volatile unsigned long ulCriticalNesting = 9999UL;
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
volatile uint32_t ulCriticalNesting = 9999UL;
/*-----------------------------------------------------------*/
@ -149,7 +149,7 @@ void vPortYieldProcessor( void )
void vNonPreemptiveTick( void ) __attribute__ ((interrupt ("IRQ")));
void vNonPreemptiveTick( void )
{
unsigned long ulDummy;
uint32_t ulDummy;
/* Increment the tick count - which may wake some tasks but as the
preemptive scheduler is not being used any woken task is not given

42
FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h
View file

@ -1,5 +1,5 @@
/*
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@ -65,12 +65,12 @@
/*
Changes from V3.2.3
+ Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1.
Changes from V3.2.4
+ Removed the use of the %0 parameter within the assembler macros and
+ Removed the use of the %0 parameter within the assembler macros and
replaced them with hard coded registers. This will ensure the
assembler does not select the link register as the temp register as
was occasionally happening previously.
@ -81,7 +81,7 @@
Changes from V4.5.0
+ Removed the portENTER_SWITCHING_ISR() and portEXIT_SWITCHING_ISR() macros
and replaced them with portYIELD_FROM_ISR() macro. Application code
and replaced them with portYIELD_FROM_ISR() macro. Application code
should now make use of the portSAVE_CONTEXT() and portRESTORE_CONTEXT()
macros as per the V4.5.1 demo code.
*/
@ -94,7 +94,7 @@ extern "C" {
#endif
/*-----------------------------------------------------------
* Port specific definitions.
* Port specific definitions.
*
* The settings in this file configure FreeRTOS correctly for the
* given hardware and compiler.
@ -109,24 +109,28 @@ extern "C" {
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE unsigned portLONG
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE portLONG
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif
/*-----------------------------------------------------------*/
/*-----------------------------------------------------------*/
/* Architecture specifics. */
#define portSTACK_GROWTH ( -1 )
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8
#define portNOP() asm volatile ( "NOP" );
/*-----------------------------------------------------------*/
/*-----------------------------------------------------------*/
/* Scheduler utilities. */
@ -141,7 +145,7 @@ extern "C" {
#define portRESTORE_CONTEXT() \
{ \
extern volatile void * volatile pxCurrentTCB; \
extern volatile unsigned portLONG ulCriticalNesting; \
extern volatile uint32_t ulCriticalNesting; \
\
/* Set the LR to the task stack. */ \
asm volatile ( \
@ -178,7 +182,7 @@ extern volatile unsigned portLONG ulCriticalNesting; \
#define portSAVE_CONTEXT() \
{ \
extern volatile void * volatile pxCurrentTCB; \
extern volatile unsigned portLONG ulCriticalNesting; \
extern volatile uint32_t ulCriticalNesting; \
\
/* Push R0 as we are going to use the register. */ \
asm volatile ( \
@ -231,8 +235,8 @@ extern volatile unsigned portLONG ulCriticalNesting; \
/*
* The interrupt management utilities can only be called from ARM mode. When
* THUMB_INTERWORK is defined the utilities are defined as functions in
* portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not
* THUMB_INTERWORK is defined the utilities are defined as functions in
* portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not
* defined then the utilities are defined as macros here - as per other ports.
*/
@ -243,7 +247,7 @@ extern volatile unsigned portLONG ulCriticalNesting; \
#define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb()
#define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb()
#else
#define portDISABLE_INTERRUPTS() \
@ -253,7 +257,7 @@ extern volatile unsigned portLONG ulCriticalNesting; \
"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ \
"MSR CPSR, R0 \n\t" /* Write back modified value. */ \
"LDMIA SP!, {R0} " ) /* Pop R0. */
#define portENABLE_INTERRUPTS() \
asm volatile ( \
"STMDB SP!, {R0} \n\t" /* Push R0. */ \

66
FreeRTOS/Source/portable/GCC/ARM7_LPC2000/port.c
View file

@ -81,21 +81,21 @@
#include "task.h"
/* Constants required to setup the task context. */
#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )
#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
#define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )
#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
#define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 )
/* Constants required to setup the tick ISR. */
#define portENABLE_TIMER ( ( unsigned char ) 0x01 )
#define portENABLE_TIMER ( ( uint8_t ) 0x01 )
#define portPRESCALE_VALUE 0x00
#define portINTERRUPT_ON_MATCH ( ( unsigned long ) 0x01 )
#define portRESET_COUNT_ON_MATCH ( ( unsigned long ) 0x02 )
#define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )
#define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )
/* Constants required to setup the VIC for the tick ISR. */
#define portTIMER_VIC_CHANNEL ( ( unsigned long ) 0x0004 )
#define portTIMER_VIC_CHANNEL_BIT ( ( unsigned long ) 0x0010 )
#define portTIMER_VIC_ENABLE ( ( unsigned long ) 0x0020 )
#define portTIMER_VIC_CHANNEL ( ( uint32_t ) 0x0004 )
#define portTIMER_VIC_CHANNEL_BIT ( ( uint32_t ) 0x0010 )
#define portTIMER_VIC_ENABLE ( ( uint32_t ) 0x0020 )
/*-----------------------------------------------------------*/
@ -116,9 +116,9 @@ extern void vPortISRStartFirstTask( void );
*
* See header file for description.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
portSTACK_TYPE *pxOriginalTOS;
StackType_t *pxOriginalTOS;
pxOriginalTOS = pxTopOfStack;
@ -132,48 +132,48 @@ portSTACK_TYPE *pxOriginalTOS;
/* First on the stack is the return address - which in this case is the
start of the task. The offset is added to make the return address appear
as it would within an IRQ ISR. */
*pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */
*pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
*pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
pxTopOfStack--;
/* When the task starts is will expect to find the function parameter in
R0. */
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
pxTopOfStack--;
/* The last thing onto the stack is the status register, which is set for
system mode, with interrupts enabled. */
*pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
if( ( ( unsigned long ) pxCode & 0x01UL ) != 0x00 )
if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00 )
{
/* We want the task to start in thumb mode. */
*pxTopOfStack |= portTHUMB_MODE_BIT;
@ -191,7 +191,7 @@ portSTACK_TYPE *pxOriginalTOS;
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortStartScheduler( void )
BaseType_t xPortStartScheduler( void )
{
/* Start the timer that generates the tick ISR. Interrupts are disabled
here already. */
@ -217,7 +217,7 @@ void vPortEndScheduler( void )
*/
static void prvSetupTimerInterrupt( void )
{
unsigned long ulCompareMatch;
uint32_t ulCompareMatch;
extern void ( vTickISR )( void );
/* A 1ms tick does not require the use of the timer prescale. This is
@ -246,7 +246,7 @@ extern void ( vTickISR )( void );
/* The ISR installed depends on whether the preemptive or cooperative
scheduler is being used. */
VICVectAddr0 = ( long ) vTickISR;
VICVectAddr0 = ( int32_t ) vTickISR;
VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE;
/* Start the timer - interrupts are disabled when this function is called

8
FreeRTOS/Source/portable/GCC/ARM7_LPC2000/portISR.c
View file

@ -93,12 +93,12 @@
#include "FreeRTOS.h"
/* Constants required to handle interrupts. */
#define portTIMER_MATCH_ISR_BIT ( ( unsigned char ) 0x01 )
#define portCLEAR_VIC_INTERRUPT ( ( unsigned long ) 0 )
#define portTIMER_MATCH_ISR_BIT ( ( uint8_t ) 0x01 )
#define portCLEAR_VIC_INTERRUPT ( ( uint32_t ) 0 )
/* Constants required to handle critical sections. */
#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )
volatile unsigned long ulCriticalNesting = 9999UL;
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
volatile uint32_t ulCriticalNesting = 9999UL;
/*-----------------------------------------------------------*/

36
FreeRTOS/Source/portable/GCC/ARM7_LPC2000/portmacro.h
View file

@ -1,5 +1,5 @@
/*
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@ -71,7 +71,7 @@ extern "C" {
#endif
/*-----------------------------------------------------------
* Port specific definitions.
* Port specific definitions.
*
* The settings in this file configure FreeRTOS correctly for the
* given hardware and compiler.
@ -86,24 +86,28 @@ extern "C" {
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE unsigned portLONG
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE portLONG
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif
/*-----------------------------------------------------------*/
/*-----------------------------------------------------------*/
/* Architecture specifics. */
#define portSTACK_GROWTH ( -1 )
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8
#define portNOP() __asm volatile ( "NOP" );
/*-----------------------------------------------------------*/
/*-----------------------------------------------------------*/
/* Scheduler utilities. */
@ -118,7 +122,7 @@ extern "C" {
#define portRESTORE_CONTEXT() \
{ \
extern volatile void * volatile pxCurrentTCB; \
extern volatile unsigned portLONG ulCriticalNesting; \
extern volatile uint32_t ulCriticalNesting; \
\
/* Set the LR to the task stack. */ \
__asm volatile ( \
@ -155,7 +159,7 @@ extern volatile unsigned portLONG ulCriticalNesting; \
#define portSAVE_CONTEXT() \
{ \
extern volatile void * volatile pxCurrentTCB; \
extern volatile unsigned portLONG ulCriticalNesting; \
extern volatile uint32_t ulCriticalNesting; \
\
/* Push R0 as we are going to use the register. */ \
__asm volatile ( \
@ -208,8 +212,8 @@ extern void vTaskSwitchContext( void );
/*
* The interrupt management utilities can only be called from ARM mode. When
* THUMB_INTERWORK is defined the utilities are defined as functions in
* portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not
* THUMB_INTERWORK is defined the utilities are defined as functions in
* portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not
* defined then the utilities are defined as macros here - as per other ports.
*/
@ -220,7 +224,7 @@ extern void vTaskSwitchContext( void );
#define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb()
#define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb()
#else
#define portDISABLE_INTERRUPTS() \
@ -230,7 +234,7 @@ extern void vTaskSwitchContext( void );
"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ \
"MSR CPSR, R0 \n\t" /* Write back modified value. */ \
"LDMIA SP!, {R0} " ) /* Pop R0. */
#define portENABLE_INTERRUPTS() \
__asm volatile ( \
"STMDB SP!, {R0} \n\t" /* Push R0. */ \

68
FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/port.c
View file

@ -81,21 +81,21 @@
#include "task.h"
/* Constants required to setup the task context. */
#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )
#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
#define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )
#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
#define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 )
/* Constants required to setup the tick ISR. */
#define portENABLE_TIMER ( ( unsigned portCHAR ) 0x01 )
#define portENABLE_TIMER ( ( uint8_t ) 0x01 )
#define portPRESCALE_VALUE 0x00
#define portINTERRUPT_ON_MATCH ( ( unsigned portLONG ) 0x01 )
#define portRESET_COUNT_ON_MATCH ( ( unsigned portLONG ) 0x02 )
#define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )
#define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )
/* Constants required to setup the VIC for the tick ISR. */
#define portTIMER_VIC_CHANNEL ( ( unsigned portLONG ) 0x0004 )
#define portTIMER_VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x0010 )
#define portTIMER_VIC_ENABLE ( ( unsigned portLONG ) 0x0020 )
#define portTIMER_VIC_CHANNEL ( ( uint32_t ) 0x0004 )
#define portTIMER_VIC_CHANNEL_BIT ( ( uint32_t ) 0x0010 )
#define portTIMER_VIC_ENABLE ( ( uint32_t ) 0x0020 )
/*-----------------------------------------------------------*/
@ -116,9 +116,9 @@ extern void vPortISRStartFirstTask( void );
*
* See header file for description.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
portSTACK_TYPE *pxOriginalTOS;
StackType_t *pxOriginalTOS;
pxOriginalTOS = pxTopOfStack;
@ -132,48 +132,48 @@ portSTACK_TYPE *pxOriginalTOS;
/* First on the stack is the return address - which in this case is the
start of the task. The offset is added to make the return address appear
as it would within an IRQ ISR. */
*pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x00000000; /* R14 */
*pxTopOfStack = ( StackType_t ) 0x00000000; /* R14 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
*pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
pxTopOfStack--;
/* When the task starts is will expect to find the function parameter in
R0. */
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
pxTopOfStack--;
/* The last thing onto the stack is the status register, which is set for
system mode, with interrupts enabled. */
*pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
if( ( ( unsigned long ) pxCode & 0x01UL ) != 0x00 )
if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00 )
{
/* We want the task to start in thumb mode. */
*pxTopOfStack |= portTHUMB_MODE_BIT;
@ -191,7 +191,7 @@ portSTACK_TYPE *pxOriginalTOS;
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortStartScheduler( void )
BaseType_t xPortStartScheduler( void )
{
/* Start the timer that generates the tick ISR. Interrupts are disabled
here already. */
@ -217,7 +217,7 @@ void vPortEndScheduler( void )
*/
static void prvSetupTimerInterrupt( void )
{
unsigned portLONG ulCompareMatch;
uint32_t ulCompareMatch;
PCLKSEL0 = (PCLKSEL0 & (~(0x3<<2))) | (0x01 << 2);
T0TCR = 2; /* Stop and reset the timer */
@ -250,12 +250,12 @@ unsigned portLONG ulCompareMatch;
#if configUSE_PREEMPTION == 1
{
extern void ( vPreemptiveTick )( void );
VICVectAddr4 = ( portLONG ) vPreemptiveTick;
VICVectAddr4 = ( int32_t ) vPreemptiveTick;
}
#else
{
extern void ( vNonPreemptiveTick )( void );
VICVectAddr4 = ( portLONG ) vNonPreemptiveTick;
VICVectAddr4 = ( int32_t ) vNonPreemptiveTick;
}
#endif

8
FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/portISR.c
View file

@ -75,12 +75,12 @@
#include "task.h"
/* Constants required to handle interrupts. */
#define portTIMER_MATCH_ISR_BIT ( ( unsigned portCHAR ) 0x01 )
#define portCLEAR_VIC_INTERRUPT ( ( unsigned portLONG ) 0 )
#define portTIMER_MATCH_ISR_BIT ( ( uint8_t ) 0x01 )
#define portCLEAR_VIC_INTERRUPT ( ( uint32_t ) 0 )
/* Constants required to handle critical sections. */
#define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 )
volatile unsigned portLONG ulCriticalNesting = 9999UL;
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
volatile uint32_t ulCriticalNesting = 9999UL;
/*-----------------------------------------------------------*/

42
FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/portmacro.h
View file

@ -1,5 +1,5 @@
/*
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@ -65,12 +65,12 @@
/*
Changes from V3.2.3
+ Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1.
Changes from V3.2.4
+ Removed the use of the %0 parameter within the assembler macros and
+ Removed the use of the %0 parameter within the assembler macros and
replaced them with hard coded registers. This will ensure the
assembler does not select the link register as the temp register as
was occasionally happening previously.
@ -81,7 +81,7 @@
Changes from V4.5.0
+ Removed the portENTER_SWITCHING_ISR() and portEXIT_SWITCHING_ISR() macros
and replaced them with portYIELD_FROM_ISR() macro. Application code
and replaced them with portYIELD_FROM_ISR() macro. Application code
should now make use of the portSAVE_CONTEXT() and portRESTORE_CONTEXT()
macros as per the V4.5.1 demo code.
*/
@ -94,7 +94,7 @@ extern "C" {
#endif
/*-----------------------------------------------------------
* Port specific definitions.
* Port specific definitions.
*
* The settings in this file configure FreeRTOS correctly for the
* given hardware and compiler.
@ -109,24 +109,28 @@ extern "C" {
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE unsigned portLONG
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE portLONG
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif
/*-----------------------------------------------------------*/
/*-----------------------------------------------------------*/
/* Architecture specifics. */
#define portSTACK_GROWTH ( -1 )
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8
#define portNOP() __asm volatile ( "NOP" );
/*-----------------------------------------------------------*/
/*-----------------------------------------------------------*/
/* Scheduler utilities. */
@ -141,7 +145,7 @@ extern "C" {
#define portRESTORE_CONTEXT() \
{ \
extern volatile void * volatile pxCurrentTCB; \
extern volatile unsigned portLONG ulCriticalNesting; \
extern volatile uint32_t ulCriticalNesting; \
\
/* Set the LR to the task stack. */ \
__asm volatile ( \
@ -178,7 +182,7 @@ extern volatile unsigned portLONG ulCriticalNesting; \
#define portSAVE_CONTEXT() \
{ \
extern volatile void * volatile pxCurrentTCB; \
extern volatile unsigned portLONG ulCriticalNesting; \
extern volatile uint32_t ulCriticalNesting; \
\
/* Push R0 as we are going to use the register. */ \
__asm volatile ( \
@ -231,8 +235,8 @@ extern volatile unsigned portLONG ulCriticalNesting; \
/*
* The interrupt management utilities can only be called from ARM mode. When
* THUMB_INTERWORK is defined the utilities are defined as functions in
* portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not
* THUMB_INTERWORK is defined the utilities are defined as functions in
* portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not
* defined then the utilities are defined as macros here - as per other ports.
*/
@ -243,7 +247,7 @@ extern volatile unsigned portLONG ulCriticalNesting; \
#define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb()
#define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb()
#else
#define portDISABLE_INTERRUPTS() \
@ -253,7 +257,7 @@ extern volatile unsigned portLONG ulCriticalNesting; \
"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ \
"MSR CPSR, R0 \n\t" /* Write back modified value. */ \
"LDMIA SP!, {R0} " ) /* Pop R0. */
#define portENABLE_INTERRUPTS() \
__asm volatile ( \
"STMDB SP!, {R0} \n\t" /* Push R0. */ \

26
FreeRTOS/Source/portable/GCC/ARM_CM0/port.c
View file

@ -72,10 +72,10 @@
#include "task.h"
/* Constants required to manipulate the NVIC. */
#define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long *) 0xe000e010 )
#define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long *) 0xe000e014 )
#define portNVIC_INT_CTRL ( ( volatile unsigned long *) 0xe000ed04 )
#define portNVIC_SYSPRI2 ( ( volatile unsigned long *) 0xe000ed20 )
#define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t *) 0xe000e010 )
#define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t *) 0xe000e014 )
#define portNVIC_INT_CTRL ( ( volatile uint32_t *) 0xe000ed04 )
#define portNVIC_SYSPRI2 ( ( volatile uint32_t *) 0xe000ed20 )
#define portNVIC_SYSTICK_CLK 0x00000004
#define portNVIC_SYSTICK_INT 0x00000002
#define portNVIC_SYSTICK_ENABLE 0x00000001
@ -98,7 +98,7 @@ debugger. */
/* Each task maintains its own interrupt status in the critical nesting
variable. */
static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
/*
* Setup the timer to generate the tick interrupts.
@ -127,18 +127,18 @@ static void prvTaskExitError( void );
/*
* See header file for description.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
/* Simulate the stack frame as it would be created by a context switch
interrupt. */
pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
*pxTopOfStack = ( StackType_t ) pxCode; /* PC */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) portTASK_RETURN_ADDRESS; /* LR */
*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
pxTopOfStack -= 8; /* R11..R4. */
return pxTopOfStack;
@ -193,7 +193,7 @@ void vPortStartFirstTask( void )
/*
* See header file for description.
*/
portBASE_TYPE xPortStartScheduler( void )
BaseType_t xPortStartScheduler( void )
{
/* Make PendSV, CallSV and SysTick the same priroity as the kernel. */
*(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
@ -260,7 +260,7 @@ void vPortExitCritical( void )
}
/*-----------------------------------------------------------*/
unsigned long ulSetInterruptMaskFromISR( void )
uint32_t ulSetInterruptMaskFromISR( void )
{
__asm volatile(
" mrs r0, PRIMASK \n"
@ -273,7 +273,7 @@ unsigned long ulSetInterruptMaskFromISR( void )
}
/*-----------------------------------------------------------*/
void vClearInterruptMaskFromISR( unsigned long ulMask )
void vClearInterruptMaskFromISR( uint32_t ulMask )
{
__asm volatile(
" msr PRIMASK, r0 \n"
@ -335,7 +335,7 @@ void xPortPendSVHandler( void )
void xPortSysTickHandler( void )
{
unsigned long ulPreviousMask;
uint32_t ulPreviousMask;
ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
{

24
FreeRTOS/Source/portable/GCC/ARM_CM0/portmacro.h
View file

@ -1,5 +1,5 @@
/*
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@ -87,28 +87,32 @@ extern "C" {
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE unsigned portLONG
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif
/*-----------------------------------------------------------*/
/* Architecture specifics. */
#define portSTACK_GROWTH ( -1 )
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8
/*-----------------------------------------------------------*/
/* Scheduler utilities. */
extern void vPortYield( void );
#define portNVIC_INT_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000ed04 ) )
#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
#define portYIELD() vPortYield()
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
@ -119,8 +123,8 @@ extern void vPortYield( void );
/* Critical section management. */
extern void vPortEnterCritical( void );
extern void vPortExitCritical( void );
extern unsigned long ulSetInterruptMaskFromISR( void ) __attribute__((naked));
extern void vClearInterruptMaskFromISR( unsigned long ulMask ) __attribute__((naked));
extern uint32_t ulSetInterruptMaskFromISR( void ) __attribute__((naked));
extern void vClearInterruptMaskFromISR( uint32_t ulMask ) __attribute__((naked));
#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR()
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMaskFromISR( x )

68
FreeRTOS/Source/portable/GCC/ARM_CM3/port.c
View file

@ -89,10 +89,10 @@ FreeRTOS.org versions prior to V4.4.0 did not include this definition. */
#endif
/* Constants required to manipulate the core. Registers first... */
#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000e010 ) )
#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile unsigned long * ) 0xe000e014 ) )
#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile unsigned long * ) 0xe000e018 ) )
#define portNVIC_SYSPRI2_REG ( * ( ( volatile unsigned long * ) 0xe000ed20 ) )
#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )
#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )
#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )
#define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
/* ...then bits in the registers. */
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
@ -100,16 +100,16 @@ FreeRTOS.org versions prior to V4.4.0 did not include this definition. */
#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
/* Constants required to check the validity of an interrupt priority. */
#define portFIRST_USER_INTERRUPT_NUMBER ( 16 )
#define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )
#define portAIRCR_REG ( * ( ( volatile unsigned long * ) 0xE000ED0C ) )
#define portMAX_8_BIT_VALUE ( ( unsigned char ) 0xff )
#define portTOP_BIT_OF_BYTE ( ( unsigned char ) 0x80 )
#define portMAX_PRIGROUP_BITS ( ( unsigned char ) 7 )
#define portAIRCR_REG ( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
#define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff )
#define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 )
#define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 )
#define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )
#define portPRIGROUP_SHIFT ( 8UL )
@ -135,7 +135,7 @@ debugger. */
/* Each task maintains its own interrupt status in the critical nesting
variable. */
static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
/*
* Setup the timer to generate the tick interrupts. The implementation in this
@ -167,7 +167,7 @@ static void prvTaskExitError( void );
* The number of SysTick increments that make up one tick period.
*/
#if configUSE_TICKLESS_IDLE == 1
static unsigned long ulTimerCountsForOneTick = 0;
static uint32_t ulTimerCountsForOneTick = 0;
#endif /* configUSE_TICKLESS_IDLE */
/*
@ -175,7 +175,7 @@ static void prvTaskExitError( void );
* 24 bit resolution of the SysTick timer.
*/
#if configUSE_TICKLESS_IDLE == 1
static unsigned long xMaximumPossibleSuppressedTicks = 0;
static uint32_t xMaximumPossibleSuppressedTicks = 0;
#endif /* configUSE_TICKLESS_IDLE */
/*
@ -183,7 +183,7 @@ static void prvTaskExitError( void );
* power functionality only.
*/
#if configUSE_TICKLESS_IDLE == 1
static unsigned long ulStoppedTimerCompensation = 0;
static uint32_t ulStoppedTimerCompensation = 0;
#endif /* configUSE_TICKLESS_IDLE */
/*
@ -192,9 +192,9 @@ static void prvTaskExitError( void );
* a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
*/
#if ( configASSERT_DEFINED == 1 )
static unsigned char ucMaxSysCallPriority = 0;
static unsigned long ulMaxPRIGROUPValue = 0;
static const volatile unsigned char * const pcInterruptPriorityRegisters = ( const volatile unsigned char * const ) portNVIC_IP_REGISTERS_OFFSET_16;
static uint8_t ucMaxSysCallPriority = 0;
static uint32_t ulMaxPRIGROUPValue = 0;
static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
#endif /* configASSERT_DEFINED */
/*-----------------------------------------------------------*/
@ -202,18 +202,18 @@ static void prvTaskExitError( void );
/*
* See header file for description.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
/* Simulate the stack frame as it would be created by a context switch
interrupt. */
pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
*pxTopOfStack = ( StackType_t ) pxCode; /* PC */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) portTASK_RETURN_ADDRESS; /* LR */
*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
return pxTopOfStack;
@ -273,7 +273,7 @@ static void prvPortStartFirstTask( void )
/*
* See header file for description.
*/
portBASE_TYPE xPortStartScheduler( void )
BaseType_t xPortStartScheduler( void )
{
/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
@ -281,9 +281,9 @@ portBASE_TYPE xPortStartScheduler( void )
#if( configASSERT_DEFINED == 1 )
{
volatile unsigned long ulOriginalPriority;
volatile char * const pcFirstUserPriorityRegister = ( volatile char * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
volatile unsigned char ucMaxPriorityValue;
volatile uint32_t ulOriginalPriority;
volatile int8_t * const pcFirstUserPriorityRegister = ( volatile int8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
volatile uint8_t ucMaxPriorityValue;
/* Determine the maximum priority from which ISR safe FreeRTOS API
functions can be called. ISR safe functions are those that end in
@ -309,7 +309,7 @@ portBASE_TYPE xPortStartScheduler( void )
while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
{
ulMaxPRIGROUPValue--;
ucMaxPriorityValue <<= ( unsigned char ) 0x01;
ucMaxPriorityValue <<= ( uint8_t ) 0x01;
}
/* Shift the priority group value back to its position within the AIRCR
@ -388,7 +388,7 @@ void vPortExitCritical( void )
}
/*-----------------------------------------------------------*/
__attribute__(( naked )) unsigned long ulPortSetInterruptMask( void )
__attribute__(( naked )) uint32_t ulPortSetInterruptMask( void )
{
__asm volatile \
( \
@ -405,7 +405,7 @@ __attribute__(( naked )) unsigned long ulPortSetInterruptMask( void )
}
/*-----------------------------------------------------------*/
__attribute__(( naked )) void vPortClearInterruptMask( unsigned long ulNewMaskValue )
__attribute__(( naked )) void vPortClearInterruptMask( uint32_t ulNewMaskValue )
{
__asm volatile \
( \
@ -478,10 +478,10 @@ void xPortSysTickHandler( void )
#if configUSE_TICKLESS_IDLE == 1
__attribute__((weak)) void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )
__attribute__((weak)) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;
portTickType xModifiableIdleTime;
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;
TickType_t xModifiableIdleTime;
/* Make sure the SysTick reload value does not overflow the counter. */
if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
@ -567,7 +567,7 @@ void xPortSysTickHandler( void )
if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
{
unsigned long ulCalculatedLoadValue;
uint32_t ulCalculatedLoadValue;
/* The tick interrupt has already executed, and the SysTick
count reloaded with ulReloadValue. Reset the
@ -653,8 +653,8 @@ __attribute__(( weak )) void vPortSetupTimerInterrupt( void )
void vPortValidateInterruptPriority( void )
{
unsigned long ulCurrentInterrupt;
unsigned char ucCurrentPriority;
uint32_t ulCurrentInterrupt;
uint8_t ucCurrentPriority;
/* Obtain the number of the currently executing interrupt. */
__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) );

30
FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h
View file

@ -1,5 +1,5 @@
/*
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@ -87,28 +87,32 @@ extern "C" {
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE unsigned portLONG
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif
/*-----------------------------------------------------------*/
/* Architecture specifics. */
#define portSTACK_GROWTH ( -1 )
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8
/*-----------------------------------------------------------*/
/* Scheduler utilities. */
extern void vPortYield( void );
#define portNVIC_INT_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000ed04 ) )
#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
#define portYIELD() vPortYield()
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
@ -118,8 +122,8 @@ extern void vPortYield( void );
/* Critical section management. */
extern void vPortEnterCritical( void );
extern void vPortExitCritical( void );
extern unsigned long ulPortSetInterruptMask( void );
extern void vPortClearInterruptMask( unsigned long ulNewMaskValue );
extern uint32_t ulPortSetInterruptMask( void );
extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask(x)
#define portDISABLE_INTERRUPTS() ulPortSetInterruptMask()
@ -137,7 +141,7 @@ not necessary for to use this port. They are defined so the common demo files
/* Tickless idle/low power functionality. */
#ifndef portSUPPRESS_TICKS_AND_SLEEP
extern void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime );
extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
#endif
/*-----------------------------------------------------------*/
@ -146,9 +150,9 @@ not necessary for to use this port. They are defined so the common demo files
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
/* Generic helper function. */
__attribute__( ( always_inline ) ) static inline unsigned char ucPortCountLeadingZeros( unsigned long ulBitmap )
__attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
{
unsigned char ucReturn;
uint8_t ucReturn;
__asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) );
return ucReturn;

422
FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c
View file

@ -80,18 +80,18 @@ task.h is included from an application file. */
#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
/* Constants required to access and manipulate the NVIC. */
#define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long * ) 0xe000e010 )
#define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long * ) 0xe000e014 )
#define portNVIC_SYSPRI2 ( ( volatile unsigned long * ) 0xe000ed20 )
#define portNVIC_SYSPRI1 ( ( volatile unsigned long * ) 0xe000ed1c )
#define portNVIC_SYS_CTRL_STATE ( ( volatile unsigned long * ) 0xe000ed24 )
#define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t * ) 0xe000e010 )
#define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t * ) 0xe000e014 )
#define portNVIC_SYSPRI2 ( ( volatile uint32_t * ) 0xe000ed20 )
#define portNVIC_SYSPRI1 ( ( volatile uint32_t * ) 0xe000ed1c )
#define portNVIC_SYS_CTRL_STATE ( ( volatile uint32_t * ) 0xe000ed24 )
#define portNVIC_MEM_FAULT_ENABLE ( 1UL << 16UL )
/* Constants required to access and manipulate the MPU. */
#define portMPU_TYPE ( ( volatile unsigned long * ) 0xe000ed90 )
#define portMPU_REGION_BASE_ADDRESS ( ( volatile unsigned long * ) 0xe000ed9C )
#define portMPU_REGION_ATTRIBUTE ( ( volatile unsigned long * ) 0xe000edA0 )
#define portMPU_CTRL ( ( volatile unsigned long * ) 0xe000ed94 )
#define portMPU_TYPE ( ( volatile uint32_t * ) 0xe000ed90 )
#define portMPU_REGION_BASE_ADDRESS ( ( volatile uint32_t * ) 0xe000ed9C )
#define portMPU_REGION_ATTRIBUTE ( ( volatile uint32_t * ) 0xe000edA0 )
#define portMPU_CTRL ( ( volatile uint32_t * ) 0xe000ed94 )
#define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
#define portMPU_ENABLE ( 0x01UL )
#define portMPU_BACKGROUND_ENABLE ( 1UL << 2UL )
@ -105,9 +105,9 @@ task.h is included from an application file. */
#define portNVIC_SYSTICK_CLK ( 0x00000004UL )
#define portNVIC_SYSTICK_INT ( 0x00000002UL )
#define portNVIC_SYSTICK_ENABLE ( 0x00000001UL )
#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
#define portNVIC_SVC_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
#define portNVIC_SVC_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
/* Constants required to set up the initial stack. */
#define portINITIAL_XPSR ( 0x01000000 )
@ -123,7 +123,7 @@ task.h is included from an application file. */
/* Each task maintains its own interrupt status in the critical nesting
variable. Note this is not saved as part of the task context as context
switches can only occur when uxCriticalNesting is zero. */
static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
/*
* Setup the timer to generate the tick interrupts.
@ -140,14 +140,14 @@ static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
* into. The region size is returned as the value that should be programmed
* into the region attribute register for that region.
*/
static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes ) PRIVILEGED_FUNCTION;
static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes ) PRIVILEGED_FUNCTION;
/*
* Checks to see if being called from the context of an unprivileged task, and
* if so raises the privilege level and returns false - otherwise does nothing
* other than return true.
*/
static portBASE_TYPE prvRaisePrivilege( void ) __attribute__(( naked ));
static BaseType_t prvRaisePrivilege( void ) __attribute__(( naked ));
/*
* Standard FreeRTOS exception handlers.
@ -165,76 +165,76 @@ static void prvRestoreContextOfFirstTask( void ) __attribute__(( naked )) PRIVIL
* C portion of the SVC handler. The SVC handler is split between an asm entry
* and a C wrapper for simplicity of coding and maintenance.
*/
static void prvSVCHandler( unsigned long *pulRegisters ) __attribute__(( noinline )) PRIVILEGED_FUNCTION;
static void prvSVCHandler( uint32_t *pulRegisters ) __attribute__(( noinline )) PRIVILEGED_FUNCTION;
/*
* Prototypes for all the MPU wrappers.
*/
signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions );
void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions );
void MPU_vTaskDelete( xTaskHandle pxTaskToDelete );
void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement );
void MPU_vTaskDelay( portTickType xTicksToDelay );
unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask );
void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority );
eTaskState MPU_eTaskGetState( xTaskHandle pxTask );
void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend );
signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask );
void MPU_vTaskResume( xTaskHandle pxTaskToResume );
BaseType_t MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const char * const pcName, uint16_t usStackDepth, void *pvParameters, UBaseType_t uxPriority, TaskHandle_t *pxCreatedTask, StackType_t *puxStackBuffer, const MemoryRegion_t * const xRegions );
void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const xRegions );
void MPU_vTaskDelete( TaskHandle_t pxTaskToDelete );
void MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, TickType_t xTimeIncrement );
void MPU_vTaskDelay( TickType_t xTicksToDelay );
UBaseType_t MPU_uxTaskPriorityGet( TaskHandle_t pxTask );
void MPU_vTaskPrioritySet( TaskHandle_t pxTask, UBaseType_t uxNewPriority );
eTaskState MPU_eTaskGetState( TaskHandle_t pxTask );
void MPU_vTaskSuspend( TaskHandle_t pxTaskToSuspend );
BaseType_t MPU_xTaskIsTaskSuspended( TaskHandle_t xTask );
void MPU_vTaskResume( TaskHandle_t pxTaskToResume );
void MPU_vTaskSuspendAll( void );
signed portBASE_TYPE MPU_xTaskResumeAll( void );
portTickType MPU_xTaskGetTickCount( void );
unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void );
BaseType_t MPU_xTaskResumeAll( void );
TickType_t MPU_xTaskGetTickCount( void );
UBaseType_t MPU_uxTaskGetNumberOfTasks( void );
void MPU_vTaskList( char *pcWriteBuffer );
void MPU_vTaskGetRunTimeStats( char *pcWriteBuffer );
void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue );
pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask );
portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter );
unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask );
xTaskHandle MPU_xTaskGetCurrentTaskHandle( void );
portBASE_TYPE MPU_xTaskGetSchedulerState( void );
xTaskHandle MPU_xTaskGetIdleTaskHandle( void );
unsigned portBASE_TYPE MPU_uxTaskGetSystemState( xTaskStatusType *pxTaskStatusArray, unsigned portBASE_TYPE uxArraySize, unsigned long *pulTotalRunTime );
xQueueHandle MPU_xQueueGenericCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize, unsigned char ucQueueType );
signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition );
portBASE_TYPE MPU_xQueueGenericReset( xQueueHandle pxQueue, portBASE_TYPE xNewQueue );
unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue );
signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking );
xQueueHandle MPU_xQueueCreateMutex( void );
xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount );
portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime );
portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex );
signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition );
signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking );
void MPU_vQueueAddToRegistry( xQueueHandle xQueue, char *pcName );
void MPU_vQueueDelete( xQueueHandle xQueue );
void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, pdTASK_HOOK_CODE pxTagValue );
pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask );
BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter );
UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask );
TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void );
BaseType_t MPU_xTaskGetSchedulerState( void );
TaskHandle_t MPU_xTaskGetIdleTaskHandle( void );
UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t *pxTaskStatusArray, UBaseType_t uxArraySize, uint32_t *pulTotalRunTime );
QueueHandle_t MPU_xQueueGenericCreate( UBaseType_t uxQueueLength, UBaseType_t uxItemSize, uint8_t ucQueueType );
BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition );
BaseType_t MPU_xQueueGenericReset( QueueHandle_t pxQueue, BaseType_t xNewQueue );
UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t pxQueue );
BaseType_t MPU_xQueueGenericReceive( QueueHandle_t pxQueue, void * const pvBuffer, TickType_t xTicksToWait, BaseType_t xJustPeeking );
QueueHandle_t MPU_xQueueCreateMutex( void );
QueueHandle_t MPU_xQueueCreateCountingSemaphore( UBaseType_t uxCountValue, UBaseType_t uxInitialCount );
BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xBlockTime );
BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t xMutex );
BaseType_t MPU_xQueueAltGenericSend( QueueHandle_t pxQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition );
BaseType_t MPU_xQueueAltGenericReceive( QueueHandle_t pxQueue, void * const pvBuffer, TickType_t xTicksToWait, BaseType_t xJustPeeking );
void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, char *pcName );
void MPU_vQueueDelete( QueueHandle_t xQueue );
void *MPU_pvPortMalloc( size_t xSize );
void MPU_vPortFree( void *pv );
void MPU_vPortInitialiseBlocks( void );
size_t MPU_xPortGetFreeHeapSize( void );
xQueueSetHandle MPU_xQueueCreateSet( unsigned portBASE_TYPE uxEventQueueLength );
xQueueSetMemberHandle MPU_xQueueSelectFromSet( xQueueSetHandle xQueueSet, portTickType xBlockTimeTicks );
portBASE_TYPE MPU_xQueueAddToSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet );
portBASE_TYPE MPU_xQueueRemoveFromSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet );
signed portBASE_TYPE MPU_xQueuePeekFromISR( xQueueHandle xQueue, void * const pvBuffer );
QueueSetHandle_t MPU_xQueueCreateSet( UBaseType_t uxEventQueueLength );
QueueSetMember_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, TickType_t xBlockTimeTicks );
BaseType_t MPU_xQueueAddToSet( QueueSetMember_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet );
BaseType_t MPU_xQueueRemoveFromSet( QueueSetMember_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet );
BaseType_t MPU_xQueuePeekFromISR( QueueHandle_t xQueue, void * const pvBuffer );
/*-----------------------------------------------------------*/
/*
* See header file for description.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters, portBASE_TYPE xRunPrivileged )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters, BaseType_t xRunPrivileged )
{
/* Simulate the stack frame as it would be created by a context switch
interrupt. */
pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
*pxTopOfStack = ( StackType_t ) pxCode; /* PC */
pxTopOfStack--;
*pxTopOfStack = 0; /* LR */
pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
pxTopOfStack -= 9; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
if( xRunPrivileged == pdTRUE )
@ -269,13 +269,13 @@ void vPortSVCHandler( void )
}
/*-----------------------------------------------------------*/
static void prvSVCHandler( unsigned long *pulParam )
static void prvSVCHandler( uint32_t *pulParam )
{
unsigned char ucSVCNumber;
uint8_t ucSVCNumber;
/* The stack contains: r0, r1, r2, r3, r12, r14, the return address and
xPSR. The first argument (r0) is pulParam[ 0 ]. */
ucSVCNumber = ( ( unsigned char * ) pulParam[ portOFFSET_TO_PC ] )[ -2 ];
ucSVCNumber = ( ( uint8_t * ) pulParam[ portOFFSET_TO_PC ] )[ -2 ];
switch( ucSVCNumber )
{
case portSVC_START_SCHEDULER : *(portNVIC_SYSPRI1) |= portNVIC_SVC_PRI;
@ -339,7 +339,7 @@ static void prvRestoreContextOfFirstTask( void )
/*
* See header file for description.
*/
portBASE_TYPE xPortStartScheduler( void )
BaseType_t xPortStartScheduler( void )
{
/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See
http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
@ -378,7 +378,7 @@ void vPortEndScheduler( void )
void vPortEnterCritical( void )
{
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xRunningPrivileged = prvRaisePrivilege();
portDISABLE_INTERRUPTS();
uxCriticalNesting++;
@ -389,7 +389,7 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
void vPortExitCritical( void )
{
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xRunningPrivileged = prvRaisePrivilege();
configASSERT( uxCriticalNesting );
uxCriticalNesting--;
@ -445,7 +445,7 @@ void xPortPendSVHandler( void )
void xPortSysTickHandler( void )
{
unsigned long ulDummy;
uint32_t ulDummy;
ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
{
@ -474,46 +474,46 @@ static void prvSetupTimerInterrupt( void )
static void prvSetupMPU( void )
{
extern unsigned long __privileged_functions_end__[];
extern unsigned long __FLASH_segment_start__[];
extern unsigned long __FLASH_segment_end__[];
extern unsigned long __privileged_data_start__[];
extern unsigned long __privileged_data_end__[];
extern uint32_t __privileged_functions_end__[];
extern uint32_t __FLASH_segment_start__[];
extern uint32_t __FLASH_segment_end__[];
extern uint32_t __privileged_data_start__[];
extern uint32_t __privileged_data_end__[];
/* Check the expected MPU is present. */
if( *portMPU_TYPE == portEXPECTED_MPU_TYPE_VALUE )
{
/* First setup the entire flash for unprivileged read only access. */
*portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */
*portMPU_REGION_BASE_ADDRESS = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */
( portMPU_REGION_VALID ) |
( portUNPRIVILEGED_FLASH_REGION );
*portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_ONLY ) |
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
( prvGetMPURegionSizeSetting( ( unsigned long ) __FLASH_segment_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |
( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |
( portMPU_REGION_ENABLE );
/* Setup the first 16K for privileged only access (even though less
than 10K is actually being used). This is where the kernel code is
placed. */
*portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */
*portMPU_REGION_BASE_ADDRESS = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */
( portMPU_REGION_VALID ) |
( portPRIVILEGED_FLASH_REGION );
*portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
( prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_functions_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |
( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |
( portMPU_REGION_ENABLE );
/* Setup the privileged data RAM region. This is where the kernel data
is placed. */
*portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */
*portMPU_REGION_BASE_ADDRESS = ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
( portMPU_REGION_VALID ) |
( portPRIVILEGED_RAM_REGION );
*portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |
prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |
( portMPU_REGION_ENABLE );
/* By default allow everything to access the general peripherals. The
@ -535,9 +535,9 @@ extern unsigned long __privileged_data_end__[];
}
/*-----------------------------------------------------------*/
static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes )
static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes )
{
unsigned long ulRegionSize, ulReturnValue = 4;
uint32_t ulRegionSize, ulReturnValue = 4;
/* 32 is the smallest region size, 31 is the largest valid value for
ulReturnValue. */
@ -559,7 +559,7 @@ unsigned long ulRegionSize, ulReturnValue = 4;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvRaisePrivilege( void )
static BaseType_t prvRaisePrivilege( void )
{
__asm volatile
(
@ -577,40 +577,40 @@ static portBASE_TYPE prvRaisePrivilege( void )
}
/*-----------------------------------------------------------*/
void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, portSTACK_TYPE *pxBottomOfStack, unsigned short usStackDepth )
void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint16_t usStackDepth )
{
extern unsigned long __SRAM_segment_start__[];
extern unsigned long __SRAM_segment_end__[];
extern unsigned long __privileged_data_start__[];
extern unsigned long __privileged_data_end__[];
long lIndex;
unsigned long ul;
extern uint32_t __SRAM_segment_start__[];
extern uint32_t __SRAM_segment_end__[];
extern uint32_t __privileged_data_start__[];
extern uint32_t __privileged_data_end__[];
int32_t lIndex;
uint32_t ul;
if( xRegions == NULL )
{
/* No MPU regions are specified so allow access to all RAM. */
xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
( ( unsigned long ) __SRAM_segment_start__ ) | /* Base address. */
( ( uint32_t ) __SRAM_segment_start__ ) | /* Base address. */
( portMPU_REGION_VALID ) |
( portSTACK_REGION );
xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
( portMPU_REGION_READ_WRITE ) |
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
( prvGetMPURegionSizeSetting( ( unsigned long ) __SRAM_segment_end__ - ( unsigned long ) __SRAM_segment_start__ ) ) |
( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) |
( portMPU_REGION_ENABLE );
/* Re-instate the privileged only RAM region as xRegion[ 0 ] will have
just removed the privileged only parameters. */
xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =
( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */
( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
( portMPU_REGION_VALID ) |
( portSTACK_REGION + 1 );
xMPUSettings->xRegion[ 1 ].ulRegionAttribute =
( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |
prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |
( portMPU_REGION_ENABLE );
/* Invalidate all other regions. */
@ -630,13 +630,13 @@ unsigned long ul;
{
/* Define the region that allows access to the stack. */
xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
( ( unsigned long ) pxBottomOfStack ) |
( ( uint32_t ) pxBottomOfStack ) |
( portMPU_REGION_VALID ) |
( portSTACK_REGION ); /* Region number. */
xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
( portMPU_REGION_READ_WRITE ) | /* Read and write. */
( prvGetMPURegionSizeSetting( ( unsigned long ) usStackDepth * ( unsigned long ) sizeof( portSTACK_TYPE ) ) ) |
( prvGetMPURegionSizeSetting( ( uint32_t ) usStackDepth * ( uint32_t ) sizeof( StackType_t ) ) ) |
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
( portMPU_REGION_ENABLE );
}
@ -651,7 +651,7 @@ unsigned long ul;
xRegions into the CM3 specific MPU settings that are then
stored in xMPUSettings. */
xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =
( ( unsigned long ) xRegions[ lIndex ].pvBaseAddress ) |
( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) |
( portMPU_REGION_VALID ) |
( portSTACK_REGION + ul ); /* Region number. */
@ -673,10 +673,10 @@ unsigned long ul;
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions )
BaseType_t MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const char * const pcName, uint16_t usStackDepth, void *pvParameters, UBaseType_t uxPriority, TaskHandle_t *pxCreatedTask, StackType_t *puxStackBuffer, const MemoryRegion_t * const xRegions )
{
signed portBASE_TYPE xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
xReturn = xTaskGenericCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, puxStackBuffer, xRegions );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -684,9 +684,9 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
}
/*-----------------------------------------------------------*/
void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions )
void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const xRegions )
{
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xRunningPrivileged = prvRaisePrivilege();
vTaskAllocateMPURegions( xTask, xRegions );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -694,9 +694,9 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
/*-----------------------------------------------------------*/
#if ( INCLUDE_vTaskDelete == 1 )
void MPU_vTaskDelete( xTaskHandle pxTaskToDelete )
void MPU_vTaskDelete( TaskHandle_t pxTaskToDelete )
{
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xRunningPrivileged = prvRaisePrivilege();
vTaskDelete( pxTaskToDelete );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -705,9 +705,9 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
/*-----------------------------------------------------------*/
#if ( INCLUDE_vTaskDelayUntil == 1 )
void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement )
void MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, TickType_t xTimeIncrement )
{
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xRunningPrivileged = prvRaisePrivilege();
vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -716,9 +716,9 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
/*-----------------------------------------------------------*/
#if ( INCLUDE_vTaskDelay == 1 )
void MPU_vTaskDelay( portTickType xTicksToDelay )
void MPU_vTaskDelay( TickType_t xTicksToDelay )
{
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xRunningPrivileged = prvRaisePrivilege();
vTaskDelay( xTicksToDelay );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -727,10 +727,10 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
/*-----------------------------------------------------------*/
#if ( INCLUDE_uxTaskPriorityGet == 1 )
unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask )
UBaseType_t MPU_uxTaskPriorityGet( TaskHandle_t pxTask )
{
unsigned portBASE_TYPE uxReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
UBaseType_t uxReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
uxReturn = uxTaskPriorityGet( pxTask );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -740,9 +740,9 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
/*-----------------------------------------------------------*/
#if ( INCLUDE_vTaskPrioritySet == 1 )
void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority )
void MPU_vTaskPrioritySet( TaskHandle_t pxTask, UBaseType_t uxNewPriority )
{
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xRunningPrivileged = prvRaisePrivilege();
vTaskPrioritySet( pxTask, uxNewPriority );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -751,9 +751,9 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
/*-----------------------------------------------------------*/
#if ( INCLUDE_eTaskGetState == 1 )
eTaskState MPU_eTaskGetState( xTaskHandle pxTask )
eTaskState MPU_eTaskGetState( TaskHandle_t pxTask )
{
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xRunningPrivileged = prvRaisePrivilege();
eTaskState eReturn;
eReturn = eTaskGetState( pxTask );
@ -764,10 +764,10 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
/*-----------------------------------------------------------*/
#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 )
xTaskHandle MPU_xTaskGetIdleTaskHandle( void )
TaskHandle_t MPU_xTaskGetIdleTaskHandle( void )
{
xTaskHandle xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
TaskHandle_t xReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
xReturn = xTaskGetIdleTaskHandle();
portRESET_PRIVILEGE( xRunningPrivileged );
@ -777,9 +777,9 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
/*-----------------------------------------------------------*/
#if ( INCLUDE_vTaskSuspend == 1 )
void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend )
void MPU_vTaskSuspend( TaskHandle_t pxTaskToSuspend )
{
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xRunningPrivileged = prvRaisePrivilege();
vTaskSuspend( pxTaskToSuspend );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -788,10 +788,10 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
/*-----------------------------------------------------------*/
#if ( INCLUDE_vTaskSuspend == 1 )
signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask )
BaseType_t MPU_xTaskIsTaskSuspended( TaskHandle_t xTask )
{
signed portBASE_TYPE xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
xReturn = xTaskIsTaskSuspended( xTask );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -801,9 +801,9 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
/*-----------------------------------------------------------*/
#if ( INCLUDE_vTaskSuspend == 1 )
void MPU_vTaskResume( xTaskHandle pxTaskToResume )
void MPU_vTaskResume( TaskHandle_t pxTaskToResume )
{
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xRunningPrivileged = prvRaisePrivilege();
vTaskResume( pxTaskToResume );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -813,17 +813,17 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
void MPU_vTaskSuspendAll( void )
{
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xRunningPrivileged = prvRaisePrivilege();
vTaskSuspendAll();
portRESET_PRIVILEGE( xRunningPrivileged );
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE MPU_xTaskResumeAll( void )
BaseType_t MPU_xTaskResumeAll( void )
{
signed portBASE_TYPE xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
xReturn = xTaskResumeAll();
portRESET_PRIVILEGE( xRunningPrivileged );
@ -831,10 +831,10 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
}
/*-----------------------------------------------------------*/
portTickType MPU_xTaskGetTickCount( void )
TickType_t MPU_xTaskGetTickCount( void )
{
portTickType xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
TickType_t xReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
xReturn = xTaskGetTickCount();
portRESET_PRIVILEGE( xRunningPrivileged );
@ -842,10 +842,10 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
}
/*-----------------------------------------------------------*/
unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void )
UBaseType_t MPU_uxTaskGetNumberOfTasks( void )
{
unsigned portBASE_TYPE uxReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
UBaseType_t uxReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
uxReturn = uxTaskGetNumberOfTasks();
portRESET_PRIVILEGE( xRunningPrivileged );
@ -856,7 +856,7 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
#if ( configUSE_TRACE_FACILITY == 1 )
void MPU_vTaskList( char *pcWriteBuffer )
{
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xRunningPrivileged = prvRaisePrivilege();
vTaskList( pcWriteBuffer );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -867,7 +867,7 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
#if ( configGENERATE_RUN_TIME_STATS == 1 )
void MPU_vTaskGetRunTimeStats( char *pcWriteBuffer )
{
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xRunningPrivileged = prvRaisePrivilege();
vTaskGetRunTimeStats( pcWriteBuffer );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -876,9 +876,9 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
/*-----------------------------------------------------------*/
#if ( configUSE_APPLICATION_TASK_TAG == 1 )
void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue )
void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, pdTASK_HOOK_CODE pxTagValue )
{
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xRunningPrivileged = prvRaisePrivilege();
vTaskSetApplicationTaskTag( xTask, pxTagValue );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -887,10 +887,10 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
/*-----------------------------------------------------------*/
#if ( configUSE_APPLICATION_TASK_TAG == 1 )
pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask )
pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask )
{
pdTASK_HOOK_CODE xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xRunningPrivileged = prvRaisePrivilege();
xReturn = xTaskGetApplicationTaskTag( xTask );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -900,10 +900,10 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
/*-----------------------------------------------------------*/
#if ( configUSE_APPLICATION_TASK_TAG == 1 )
portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter )
BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter )
{
portBASE_TYPE xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -913,10 +913,10 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
/*-----------------------------------------------------------*/
#if ( configUSE_TRACE_FACILITY == 1 )
unsigned portBASE_TYPE MPU_uxTaskGetSystemState( xTaskStatusType *pxTaskStatusArray, unsigned portBASE_TYPE uxArraySize, unsigned long *pulTotalRunTime )
UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t *pxTaskStatusArray, UBaseType_t uxArraySize, uint32_t *pulTotalRunTime )
{
unsigned portBASE_TYPE uxReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
UBaseType_t uxReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
uxReturn = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, pulTotalRunTime );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -926,10 +926,10 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
/*-----------------------------------------------------------*/
#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )
unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask )
UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask )
{
unsigned portBASE_TYPE uxReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
UBaseType_t uxReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
uxReturn = uxTaskGetStackHighWaterMark( xTask );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -939,10 +939,10 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
/*-----------------------------------------------------------*/
#if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 )
xTaskHandle MPU_xTaskGetCurrentTaskHandle( void )
TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void )
{
xTaskHandle xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
TaskHandle_t xReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
xReturn = xTaskGetCurrentTaskHandle();
portRESET_PRIVILEGE( xRunningPrivileged );
@ -952,10 +952,10 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
/*-----------------------------------------------------------*/
#if ( INCLUDE_xTaskGetSchedulerState == 1 )
portBASE_TYPE MPU_xTaskGetSchedulerState( void )
BaseType_t MPU_xTaskGetSchedulerState( void )
{
portBASE_TYPE xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
xReturn = xTaskGetSchedulerState();
portRESET_PRIVILEGE( xRunningPrivileged );
@ -964,10 +964,10 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
#endif
/*-----------------------------------------------------------*/
xQueueHandle MPU_xQueueGenericCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize, unsigned char ucQueueType )
QueueHandle_t MPU_xQueueGenericCreate( UBaseType_t uxQueueLength, UBaseType_t uxItemSize, uint8_t ucQueueType )
{
xQueueHandle xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
QueueHandle_t xReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
xReturn = xQueueGenericCreate( uxQueueLength, uxItemSize, ucQueueType );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -975,10 +975,10 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
}
/*-----------------------------------------------------------*/
portBASE_TYPE MPU_xQueueGenericReset( xQueueHandle pxQueue, portBASE_TYPE xNewQueue )
BaseType_t MPU_xQueueGenericReset( QueueHandle_t pxQueue, BaseType_t xNewQueue )
{
portBASE_TYPE xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
xReturn = xQueueGenericReset( pxQueue, xNewQueue );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -986,10 +986,10 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )
BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition )
{
signed portBASE_TYPE xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -997,10 +997,10 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
}
/*-----------------------------------------------------------*/
unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue )
UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t pxQueue )
{
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
unsigned portBASE_TYPE uxReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
UBaseType_t uxReturn;
uxReturn = uxQueueMessagesWaiting( pxQueue );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -1008,10 +1008,10 @@ unsigned portBASE_TYPE uxReturn;
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )
BaseType_t MPU_xQueueGenericReceive( QueueHandle_t pxQueue, void * const pvBuffer, TickType_t xTicksToWait, BaseType_t xJustPeeking )
{
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
signed portBASE_TYPE xReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
BaseType_t xReturn;
xReturn = xQueueGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -1019,10 +1019,10 @@ signed portBASE_TYPE xReturn;
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE MPU_xQueuePeekFromISR( xQueueHandle pxQueue, void * const pvBuffer )
BaseType_t MPU_xQueuePeekFromISR( QueueHandle_t pxQueue, void * const pvBuffer )
{
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
signed portBASE_TYPE xReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
BaseType_t xReturn;
xReturn = xQueuePeekFromISR( pxQueue, pvBuffer );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -1031,10 +1031,10 @@ signed portBASE_TYPE xReturn;
/*-----------------------------------------------------------*/
#if ( configUSE_MUTEXES == 1 )
xQueueHandle MPU_xQueueCreateMutex( void )
QueueHandle_t MPU_xQueueCreateMutex( void )
{
xQueueHandle xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
QueueHandle_t xReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
xReturn = xQueueCreateMutex( queueQUEUE_TYPE_MUTEX );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -1044,10 +1044,10 @@ signed portBASE_TYPE xReturn;
/*-----------------------------------------------------------*/
#if configUSE_COUNTING_SEMAPHORES == 1
xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount )
QueueHandle_t MPU_xQueueCreateCountingSemaphore( UBaseType_t uxCountValue, UBaseType_t uxInitialCount )
{
xQueueHandle xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
QueueHandle_t xReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
xReturn = xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -1057,10 +1057,10 @@ signed portBASE_TYPE xReturn;
/*-----------------------------------------------------------*/
#if ( configUSE_MUTEXES == 1 )
portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime )
BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xBlockTime )
{
portBASE_TYPE xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -1070,10 +1070,10 @@ signed portBASE_TYPE xReturn;
/*-----------------------------------------------------------*/
#if ( configUSE_MUTEXES == 1 )
portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex )
BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t xMutex )
{
portBASE_TYPE xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
xReturn = xQueueGiveMutexRecursive( xMutex );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -1083,10 +1083,10 @@ signed portBASE_TYPE xReturn;
/*-----------------------------------------------------------*/
#if ( configUSE_QUEUE_SETS == 1 )
xQueueSetHandle MPU_xQueueCreateSet( unsigned portBASE_TYPE uxEventQueueLength )
QueueSetHandle_t MPU_xQueueCreateSet( UBaseType_t uxEventQueueLength )
{
xQueueSetHandle xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
QueueSetHandle_t xReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
xReturn = xQueueCreateSet( uxEventQueueLength );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -1096,10 +1096,10 @@ signed portBASE_TYPE xReturn;
/*-----------------------------------------------------------*/
#if ( configUSE_QUEUE_SETS == 1 )
xQueueSetMemberHandle MPU_xQueueSelectFromSet( xQueueSetHandle xQueueSet, portTickType xBlockTimeTicks )
QueueSetMember_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, TickType_t xBlockTimeTicks )
{
xQueueSetMemberHandle xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
QueueSetMember_t xReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
xReturn = xQueueSelectFromSet( xQueueSet, xBlockTimeTicks );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -1109,10 +1109,10 @@ signed portBASE_TYPE xReturn;
/*-----------------------------------------------------------*/
#if ( configUSE_QUEUE_SETS == 1 )
portBASE_TYPE MPU_xQueueAddToSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet )
BaseType_t MPU_xQueueAddToSet( QueueSetMember_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet )
{
portBASE_TYPE xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
xReturn = xQueueAddToSet( xQueueOrSemaphore, xQueueSet );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -1122,10 +1122,10 @@ signed portBASE_TYPE xReturn;
/*-----------------------------------------------------------*/
#if ( configUSE_QUEUE_SETS == 1 )
portBASE_TYPE MPU_xQueueRemoveFromSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet )
BaseType_t MPU_xQueueRemoveFromSet( QueueSetMember_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet )
{
portBASE_TYPE xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
xReturn = xQueueRemoveFromSet( xQueueOrSemaphore, xQueueSet );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -1135,12 +1135,12 @@ signed portBASE_TYPE xReturn;
/*-----------------------------------------------------------*/
#if configUSE_ALTERNATIVE_API == 1
signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )
BaseType_t MPU_xQueueAltGenericSend( QueueHandle_t pxQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition )
{
signed portBASE_TYPE xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
xReturn = signed portBASE_TYPE xQueueAltGenericSend( pxQueue, pvItemToQueue, xTicksToWait, xCopyPosition );
xReturn = BaseType_t xQueueAltGenericSend( pxQueue, pvItemToQueue, xTicksToWait, xCopyPosition );
portRESET_PRIVILEGE( xRunningPrivileged );
return xReturn;
}
@ -1148,10 +1148,10 @@ signed portBASE_TYPE xReturn;
/*-----------------------------------------------------------*/
#if configUSE_ALTERNATIVE_API == 1
signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )
BaseType_t MPU_xQueueAltGenericReceive( QueueHandle_t pxQueue, void * const pvBuffer, TickType_t xTicksToWait, BaseType_t xJustPeeking )
{
signed portBASE_TYPE xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xReturn;
BaseType_t xRunningPrivileged = prvRaisePrivilege();
xReturn = xQueueAltGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );
portRESET_PRIVILEGE( xRunningPrivileged );
@ -1161,9 +1161,9 @@ signed portBASE_TYPE xReturn;
/*-----------------------------------------------------------*/
#if configQUEUE_REGISTRY_SIZE > 0
void MPU_vQueueAddToRegistry( xQueueHandle xQueue, char *pcName )
void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, char *pcName )
{
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xRunningPrivileged = prvRaisePrivilege();
vQueueAddToRegistry( xQueue, pcName );
@ -1172,9 +1172,9 @@ signed portBASE_TYPE xReturn;
#endif
/*-----------------------------------------------------------*/
void MPU_vQueueDelete( xQueueHandle xQueue )
void MPU_vQueueDelete( QueueHandle_t xQueue )
{
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xRunningPrivileged = prvRaisePrivilege();
vQueueDelete( xQueue );
@ -1185,7 +1185,7 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
void *MPU_pvPortMalloc( size_t xSize )
{
void *pvReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xRunningPrivileged = prvRaisePrivilege();
pvReturn = pvPortMalloc( xSize );
@ -1197,7 +1197,7 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
void MPU_vPortFree( void *pv )
{
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xRunningPrivileged = prvRaisePrivilege();
vPortFree( pv );
@ -1207,7 +1207,7 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
void MPU_vPortInitialiseBlocks( void )
{
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xRunningPrivileged = prvRaisePrivilege();
vPortInitialiseBlocks();
@ -1218,7 +1218,7 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
size_t MPU_xPortGetFreeHeapSize( void )
{
size_t xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xRunningPrivileged = prvRaisePrivilege();
xReturn = xPortGetFreeHeapSize();
@ -1234,7 +1234,7 @@ equals the privilege state on entry. For example:
void MPU_FunctionName( [parameters ] )
{
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
BaseType_t xRunningPrivileged = prvRaisePrivilege();
FunctionName( [parameters ] );

24
FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/portmacro.h
View file

@ -1,5 +1,5 @@
/*
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@ -87,15 +87,19 @@ extern "C" {
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE unsigned portLONG
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif
/*-----------------------------------------------------------*/
@ -124,8 +128,8 @@ extern "C" {
typedef struct MPU_REGION_REGISTERS
{
unsigned portLONG ulRegionBaseAddress;
unsigned portLONG ulRegionAttribute;
uint32_t ulRegionBaseAddress;
uint32_t ulRegionAttribute;
} xMPU_REGION_REGISTERS;
/* Plus 1 to create space for the stack region. */
@ -136,7 +140,7 @@ typedef struct MPU_SETTINGS
/* Architecture specifics. */
#define portSTACK_GROWTH ( -1 )
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8
/*-----------------------------------------------------------*/
@ -150,7 +154,7 @@ typedef struct MPU_SETTINGS
#define portYIELD() __asm volatile ( " SVC %0 \n" :: "i" (portSVC_YIELD) )
#define portYIELD_WITHIN_API() *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET
#define portNVIC_INT_CTRL ( ( volatile unsigned portLONG *) 0xe000ed04 )
#define portNVIC_INT_CTRL ( ( volatile uint32_t *) 0xe000ed04 )
#define portNVIC_PENDSVSET 0x10000000
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )

70
FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c
View file

@ -86,10 +86,10 @@
#endif
/* Constants required to manipulate the core. Registers first... */
#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000e010 ) )
#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile unsigned long * ) 0xe000e014 ) )
#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile unsigned long * ) 0xe000e018 ) )
#define portNVIC_SYSPRI2_REG ( * ( ( volatile unsigned long * ) 0xe000ed20 ) )
#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )
#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )
#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )
#define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
/* ...then bits in the registers. */
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
@ -97,21 +97,21 @@
#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
/* Constants required to check the validity of an interrupt priority. */
#define portFIRST_USER_INTERRUPT_NUMBER ( 16 )
#define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )
#define portAIRCR_REG ( * ( ( volatile unsigned long * ) 0xE000ED0C ) )
#define portMAX_8_BIT_VALUE ( ( unsigned char ) 0xff )
#define portTOP_BIT_OF_BYTE ( ( unsigned char ) 0x80 )
#define portMAX_PRIGROUP_BITS ( ( unsigned char ) 7 )
#define portAIRCR_REG ( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
#define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff )
#define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 )
#define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 )
#define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )
#define portPRIGROUP_SHIFT ( 8UL )
/* Constants required to manipulate the VFP. */
#define portFPCCR ( ( volatile unsigned long * ) 0xe000ef34 ) /* Floating point context control register. */
#define portFPCCR ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
#define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL )
/* Constants required to set up the initial stack. */
@ -137,7 +137,7 @@ debugger. */
/* Each task maintains its own interrupt status in the critical nesting
variable. */
static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
/*
* Setup the timer to generate the tick interrupts. The implementation in this
@ -174,7 +174,7 @@ static void prvTaskExitError( void );
* The number of SysTick increments that make up one tick period.
*/
#if configUSE_TICKLESS_IDLE == 1
static unsigned long ulTimerCountsForOneTick = 0;
static uint32_t ulTimerCountsForOneTick = 0;
#endif /* configUSE_TICKLESS_IDLE */
/*
@ -182,7 +182,7 @@ static void prvTaskExitError( void );
* 24 bit resolution of the SysTick timer.
*/
#if configUSE_TICKLESS_IDLE == 1
static unsigned long xMaximumPossibleSuppressedTicks = 0;
static uint32_t xMaximumPossibleSuppressedTicks = 0;
#endif /* configUSE_TICKLESS_IDLE */
/*
@ -190,7 +190,7 @@ static void prvTaskExitError( void );
* power functionality only.
*/
#if configUSE_TICKLESS_IDLE == 1
static unsigned long ulStoppedTimerCompensation = 0;
static uint32_t ulStoppedTimerCompensation = 0;
#endif /* configUSE_TICKLESS_IDLE */
/*
@ -199,9 +199,9 @@ static void prvTaskExitError( void );
* a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
*/
#if ( configASSERT_DEFINED == 1 )
static unsigned char ucMaxSysCallPriority = 0;
static unsigned long ulMaxPRIGROUPValue = 0;
static const volatile unsigned char * const pcInterruptPriorityRegisters = ( const volatile unsigned char * const ) portNVIC_IP_REGISTERS_OFFSET_16;
static uint8_t ucMaxSysCallPriority = 0;
static uint32_t ulMaxPRIGROUPValue = 0;
static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
#endif /* configASSERT_DEFINED */
/*-----------------------------------------------------------*/
@ -209,7 +209,7 @@ static void prvTaskExitError( void );
/*
* See header file for description.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
/* Simulate the stack frame as it would be created by a context switch
interrupt. */
@ -220,13 +220,13 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
*pxTopOfStack = ( StackType_t ) pxCode; /* PC */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) portTASK_RETURN_ADDRESS; /* LR */
*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
/* Save code space by skipping register initialisation. */
pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
/* A save method is being used that requires each task to maintain its
own exec return value. */
@ -291,7 +291,7 @@ static void prvPortStartFirstTask( void )
/*
* See header file for description.
*/
portBASE_TYPE xPortStartScheduler( void )
BaseType_t xPortStartScheduler( void )
{
/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
@ -299,9 +299,9 @@ portBASE_TYPE xPortStartScheduler( void )
#if( configASSERT_DEFINED == 1 )
{
volatile unsigned long ulOriginalPriority;
volatile char * const pcFirstUserPriorityRegister = ( volatile char * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
volatile unsigned char ucMaxPriorityValue;
volatile uint32_t ulOriginalPriority;
volatile int8_t * const pcFirstUserPriorityRegister = ( volatile int8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
volatile uint8_t ucMaxPriorityValue;
/* Determine the maximum priority from which ISR safe FreeRTOS API
functions can be called. ISR safe functions are those that end in
@ -327,7 +327,7 @@ portBASE_TYPE xPortStartScheduler( void )
while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
{
ulMaxPRIGROUPValue--;
ucMaxPriorityValue <<= ( unsigned char ) 0x01;
ucMaxPriorityValue <<= ( uint8_t ) 0x01;
}
/* Shift the priority group value back to its position within the AIRCR
@ -412,7 +412,7 @@ void vPortExitCritical( void )
}
/*-----------------------------------------------------------*/
__attribute__(( naked )) unsigned long ulPortSetInterruptMask( void )
__attribute__(( naked )) uint32_t ulPortSetInterruptMask( void )
{
__asm volatile \
( \
@ -429,7 +429,7 @@ __attribute__(( naked )) unsigned long ulPortSetInterruptMask( void )
}
/*-----------------------------------------------------------*/
__attribute__(( naked )) void vPortClearInterruptMask( unsigned long ulNewMaskValue )
__attribute__(( naked )) void vPortClearInterruptMask( uint32_t ulNewMaskValue )
{
__asm volatile \
( \
@ -521,10 +521,10 @@ void xPortSysTickHandler( void )
#if configUSE_TICKLESS_IDLE == 1
__attribute__((weak)) void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )
__attribute__((weak)) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;
portTickType xModifiableIdleTime;
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;
TickType_t xModifiableIdleTime;
/* Make sure the SysTick reload value does not overflow the counter. */
if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
@ -610,7 +610,7 @@ void xPortSysTickHandler( void )
if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
{
unsigned long ulCalculatedLoadValue;
uint32_t ulCalculatedLoadValue;
/* The tick interrupt has already executed, and the SysTick
count reloaded with ulReloadValue. Reset the
@ -711,8 +711,8 @@ static void vPortEnableVFP( void )
void vPortValidateInterruptPriority( void )
{
unsigned long ulCurrentInterrupt;
unsigned char ucCurrentPriority;
uint32_t ulCurrentInterrupt;
uint8_t ucCurrentPriority;
/* Obtain the number of the currently executing interrupt. */
__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) );

30
FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h
View file

@ -1,5 +1,5 @@
/*
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@ -87,28 +87,32 @@ extern "C" {
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE unsigned portLONG
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif
/*-----------------------------------------------------------*/
/* Architecture specifics. */
#define portSTACK_GROWTH ( -1 )
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8
/*-----------------------------------------------------------*/
/* Scheduler utilities. */
extern void vPortYield( void );
#define portNVIC_INT_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000ed04 ) )
#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
#define portYIELD() vPortYield()
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
@ -118,8 +122,8 @@ extern void vPortYield( void );
/* Critical section management. */
extern void vPortEnterCritical( void );
extern void vPortExitCritical( void );
extern unsigned long ulPortSetInterruptMask( void );
extern void vPortClearInterruptMask( unsigned long ulNewMaskValue );
extern uint32_t ulPortSetInterruptMask( void );
extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask(x)
#define portDISABLE_INTERRUPTS() ulPortSetInterruptMask()
@ -138,7 +142,7 @@ not necessary for to use this port. They are defined so the common demo files
/* Tickless idle/low power functionality. */
#ifndef portSUPPRESS_TICKS_AND_SLEEP
extern void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime );
extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
#endif
/*-----------------------------------------------------------*/
@ -147,9 +151,9 @@ not necessary for to use this port. They are defined so the common demo files
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
/* Generic helper function. */
__attribute__( ( always_inline ) ) static inline unsigned char ucPortCountLeadingZeros( unsigned long ulBitmap )
__attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
{
unsigned char ucReturn;
uint8_t ucReturn;
__asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) );
return ucReturn;

102
FreeRTOS/Source/portable/GCC/ATMega323/port.c
View file

@ -83,20 +83,20 @@ Changes from V2.6.0
*----------------------------------------------------------*/
/* Start tasks with interrupts enables. */
#define portFLAGS_INT_ENABLED ( ( portSTACK_TYPE ) 0x80 )
#define portFLAGS_INT_ENABLED ( ( StackType_t ) 0x80 )
/* Hardware constants for timer 1. */
#define portCLEAR_COUNTER_ON_MATCH ( ( unsigned char ) 0x08 )
#define portPRESCALE_64 ( ( unsigned char ) 0x03 )
#define portCLOCK_PRESCALER ( ( unsigned long ) 64 )
#define portCOMPARE_MATCH_A_INTERRUPT_ENABLE ( ( unsigned char ) 0x10 )
#define portCLEAR_COUNTER_ON_MATCH ( ( uint8_t ) 0x08 )
#define portPRESCALE_64 ( ( uint8_t ) 0x03 )
#define portCLOCK_PRESCALER ( ( uint32_t ) 64 )
#define portCOMPARE_MATCH_A_INTERRUPT_ENABLE ( ( uint8_t ) 0x10 )
/*-----------------------------------------------------------*/
/* We require the address of the pxCurrentTCB variable, but don't want to know
any details of its type. */
typedef void tskTCB;
extern volatile tskTCB * volatile pxCurrentTCB;
typedef void TCB_t;
extern volatile TCB_t * volatile pxCurrentTCB;
/*-----------------------------------------------------------*/
@ -220,9 +220,9 @@ static void prvSetupTimerInterrupt( void );
/*
* See header file for description.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
unsigned short usAddress;
uint16_t usAddress;
/* Place a few bytes of known values on the bottom of the stack.
This is just useful for debugging. */
@ -241,92 +241,92 @@ unsigned short usAddress;
/* The start of the task code will be popped off the stack last, so place
it on first. */
usAddress = ( unsigned short ) pxCode;
*pxTopOfStack = ( portSTACK_TYPE ) ( usAddress & ( unsigned short ) 0x00ff );
usAddress = ( uint16_t ) pxCode;
*pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
pxTopOfStack--;
usAddress >>= 8;
*pxTopOfStack = ( portSTACK_TYPE ) ( usAddress & ( unsigned short ) 0x00ff );
*pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
pxTopOfStack--;
/* Next simulate the stack as if after a call to portSAVE_CONTEXT().
portSAVE_CONTEXT places the flags on the stack immediately after r0
to ensure the interrupts get disabled as soon as possible, and so ensuring
the stack use is minimal should a context switch interrupt occur. */
*pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* R0 */
*pxTopOfStack = ( StackType_t ) 0x00; /* R0 */
pxTopOfStack--;
*pxTopOfStack = portFLAGS_INT_ENABLED;
pxTopOfStack--;
/* Now the remaining registers. The compiler expects R1 to be 0. */
*pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* R1 */
*pxTopOfStack = ( StackType_t ) 0x00; /* R1 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x02; /* R2 */
*pxTopOfStack = ( StackType_t ) 0x02; /* R2 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x03; /* R3 */
*pxTopOfStack = ( StackType_t ) 0x03; /* R3 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x04; /* R4 */
*pxTopOfStack = ( StackType_t ) 0x04; /* R4 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x05; /* R5 */
*pxTopOfStack = ( StackType_t ) 0x05; /* R5 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x06; /* R6 */
*pxTopOfStack = ( StackType_t ) 0x06; /* R6 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x07; /* R7 */
*pxTopOfStack = ( StackType_t ) 0x07; /* R7 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x08; /* R8 */
*pxTopOfStack = ( StackType_t ) 0x08; /* R8 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x09; /* R9 */
*pxTopOfStack = ( StackType_t ) 0x09; /* R9 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x10; /* R10 */
*pxTopOfStack = ( StackType_t ) 0x10; /* R10 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x11; /* R11 */
*pxTopOfStack = ( StackType_t ) 0x11; /* R11 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x12; /* R12 */
*pxTopOfStack = ( StackType_t ) 0x12; /* R12 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x13; /* R13 */
*pxTopOfStack = ( StackType_t ) 0x13; /* R13 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x14; /* R14 */
*pxTopOfStack = ( StackType_t ) 0x14; /* R14 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x15; /* R15 */
*pxTopOfStack = ( StackType_t ) 0x15; /* R15 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x16; /* R16 */
*pxTopOfStack = ( StackType_t ) 0x16; /* R16 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x17; /* R17 */
*pxTopOfStack = ( StackType_t ) 0x17; /* R17 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x18; /* R18 */
*pxTopOfStack = ( StackType_t ) 0x18; /* R18 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x19; /* R19 */
*pxTopOfStack = ( StackType_t ) 0x19; /* R19 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x20; /* R20 */
*pxTopOfStack = ( StackType_t ) 0x20; /* R20 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x21; /* R21 */
*pxTopOfStack = ( StackType_t ) 0x21; /* R21 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x22; /* R22 */
*pxTopOfStack = ( StackType_t ) 0x22; /* R22 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x23; /* R23 */
*pxTopOfStack = ( StackType_t ) 0x23; /* R23 */
pxTopOfStack--;
/* Place the parameter on the stack in the expected location. */
usAddress = ( unsigned short ) pvParameters;
*pxTopOfStack = ( portSTACK_TYPE ) ( usAddress & ( unsigned short ) 0x00ff );
usAddress = ( uint16_t ) pvParameters;
*pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
pxTopOfStack--;
usAddress >>= 8;
*pxTopOfStack = ( portSTACK_TYPE ) ( usAddress & ( unsigned short ) 0x00ff );
*pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x26; /* R26 X */
*pxTopOfStack = ( StackType_t ) 0x26; /* R26 X */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x27; /* R27 */
*pxTopOfStack = ( StackType_t ) 0x27; /* R27 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x28; /* R28 Y */
*pxTopOfStack = ( StackType_t ) 0x28; /* R28 Y */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x29; /* R29 */
*pxTopOfStack = ( StackType_t ) 0x29; /* R29 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x30; /* R30 Z */
*pxTopOfStack = ( StackType_t ) 0x30; /* R30 Z */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x031; /* R31 */
*pxTopOfStack = ( StackType_t ) 0x031; /* R31 */
pxTopOfStack--;
/*lint +e950 +e611 +e923 */
@ -335,7 +335,7 @@ unsigned short usAddress;
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortStartScheduler( void )
BaseType_t xPortStartScheduler( void )
{
/* Setup the hardware to generate the tick. */
prvSetupTimerInterrupt();
@ -399,8 +399,8 @@ void vPortYieldFromTick( void )
*/
static void prvSetupTimerInterrupt( void )
{
unsigned long ulCompareMatch;
unsigned char ucHighByte, ucLowByte;
uint32_t ulCompareMatch;
uint8_t ucHighByte, ucLowByte;
/* Using 16bit timer 1 to generate the tick. Correct fuses must be
selected for the configCPU_CLOCK_HZ clock. */
@ -411,13 +411,13 @@ unsigned char ucHighByte, ucLowByte;
ulCompareMatch /= portCLOCK_PRESCALER;
/* Adjust for correct value. */
ulCompareMatch -= ( unsigned long ) 1;
ulCompareMatch -= ( uint32_t ) 1;
/* Setup compare match value for compare match A. Interrupts are disabled
before this is called so we need not worry here. */
ucLowByte = ( unsigned char ) ( ulCompareMatch & ( unsigned long ) 0xff );
ucLowByte = ( uint8_t ) ( ulCompareMatch & ( uint32_t ) 0xff );
ulCompareMatch >>= 8;
ucHighByte = ( unsigned char ) ( ulCompareMatch & ( unsigned long ) 0xff );
ucHighByte = ( uint8_t ) ( ulCompareMatch & ( uint32_t ) 0xff );
OCR1AH = ucHighByte;
OCR1AL = ucLowByte;

24
FreeRTOS/Source/portable/GCC/ATMega323/portmacro.h
View file

@ -1,5 +1,5 @@
/*
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@ -66,7 +66,7 @@
/*
Changes from V1.2.3
+ portCPU_CLOSK_HZ definition changed to 8MHz base 10, previously it
+ portCPU_CLOSK_HZ definition changed to 8MHz base 10, previously it
base 16.
*/
@ -78,7 +78,7 @@ extern "C" {
#endif
/*-----------------------------------------------------------
* Port specific definitions.
* Port specific definitions.
*
* The settings in this file configure FreeRTOS correctly for the
* given hardware and compiler.
@ -93,17 +93,21 @@ extern "C" {
#define portDOUBLE double
#define portLONG long
#define portSHORT int
#define portSTACK_TYPE unsigned portCHAR
#define portSTACK_TYPE uint8_t
#define portBASE_TYPE char
typedef portSTACK_TYPE StackType_t;
typedef signed char BaseType_t;
typedef unsigned char UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif
/*-----------------------------------------------------------*/
/*-----------------------------------------------------------*/
/* Critical section management. */
#define portENTER_CRITICAL() asm volatile ( "in __tmp_reg__, __SREG__" :: ); \
@ -119,7 +123,7 @@ extern "C" {
/* Architecture specifics. */
#define portSTACK_GROWTH ( -1 )
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 1
#define portNOP() asm volatile ( "nop" );
/*-----------------------------------------------------------*/

54
FreeRTOS/Source/portable/GCC/AVR32_UC3/port.c
View file

@ -96,12 +96,12 @@
/* Constants required to setup the task context. */
#define portINITIAL_SR ( ( portSTACK_TYPE ) 0x00400000 ) /* AVR32 : [M2:M0]=001 I1M=0 I0M=0, GM=0 */
#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 0 )
#define portINITIAL_SR ( ( StackType_t ) 0x00400000 ) /* AVR32 : [M2:M0]=001 I1M=0 I0M=0, GM=0 */
#define portINSTRUCTION_SIZE ( ( StackType_t ) 0 )
/* Each task maintains its own critical nesting variable. */
#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )
volatile unsigned long ulCriticalNesting = 9999UL;
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
volatile uint32_t ulCriticalNesting = 9999UL;
#if( configTICK_USE_TC==0 )
static void prvScheduleNextTick( void );
@ -130,7 +130,7 @@ void _init_startup(void)
#if configHEAP_INIT
extern void __heap_start__;
extern void __heap_end__;
portBASE_TYPE *pxMem;
BaseType_t *pxMem;
#endif
/* Load the Exception Vector Base Address in the corresponding system register. */
@ -145,7 +145,7 @@ void _init_startup(void)
#if configHEAP_INIT
/* Initialize the heap used by malloc. */
for( pxMem = &__heap_start__; pxMem < ( portBASE_TYPE * )&__heap_end__; )
for( pxMem = &__heap_start__; pxMem < ( BaseType_t * )&__heap_end__; )
{
*pxMem++ = 0xA5A5A5A5;
}
@ -298,36 +298,36 @@ __attribute__((__noinline__)) void vPortExitCritical( void )
*
* See header file for description.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
/* Setup the initial stack of the task. The stack is set exactly as
expected by the portRESTORE_CONTEXT() macro. */
/* When the task starts, it will expect to find the function parameter in R12. */
pxTopOfStack--;
*pxTopOfStack-- = ( portSTACK_TYPE ) 0x08080808; /* R8 */
*pxTopOfStack-- = ( portSTACK_TYPE ) 0x09090909; /* R9 */
*pxTopOfStack-- = ( portSTACK_TYPE ) 0x0A0A0A0A; /* R10 */
*pxTopOfStack-- = ( portSTACK_TYPE ) 0x0B0B0B0B; /* R11 */
*pxTopOfStack-- = ( portSTACK_TYPE ) pvParameters; /* R12 */
*pxTopOfStack-- = ( portSTACK_TYPE ) 0xDEADBEEF; /* R14/LR */
*pxTopOfStack-- = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; /* R15/PC */
*pxTopOfStack-- = ( portSTACK_TYPE ) portINITIAL_SR; /* SR */
*pxTopOfStack-- = ( portSTACK_TYPE ) 0xFF0000FF; /* R0 */
*pxTopOfStack-- = ( portSTACK_TYPE ) 0x01010101; /* R1 */
*pxTopOfStack-- = ( portSTACK_TYPE ) 0x02020202; /* R2 */
*pxTopOfStack-- = ( portSTACK_TYPE ) 0x03030303; /* R3 */
*pxTopOfStack-- = ( portSTACK_TYPE ) 0x04040404; /* R4 */
*pxTopOfStack-- = ( portSTACK_TYPE ) 0x05050505; /* R5 */
*pxTopOfStack-- = ( portSTACK_TYPE ) 0x06060606; /* R6 */
*pxTopOfStack-- = ( portSTACK_TYPE ) 0x07070707; /* R7 */
*pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_NESTING; /* ulCriticalNesting */
*pxTopOfStack-- = ( StackType_t ) 0x08080808; /* R8 */
*pxTopOfStack-- = ( StackType_t ) 0x09090909; /* R9 */
*pxTopOfStack-- = ( StackType_t ) 0x0A0A0A0A; /* R10 */
*pxTopOfStack-- = ( StackType_t ) 0x0B0B0B0B; /* R11 */
*pxTopOfStack-- = ( StackType_t ) pvParameters; /* R12 */
*pxTopOfStack-- = ( StackType_t ) 0xDEADBEEF; /* R14/LR */
*pxTopOfStack-- = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; /* R15/PC */
*pxTopOfStack-- = ( StackType_t ) portINITIAL_SR; /* SR */
*pxTopOfStack-- = ( StackType_t ) 0xFF0000FF; /* R0 */
*pxTopOfStack-- = ( StackType_t ) 0x01010101; /* R1 */
*pxTopOfStack-- = ( StackType_t ) 0x02020202; /* R2 */
*pxTopOfStack-- = ( StackType_t ) 0x03030303; /* R3 */
*pxTopOfStack-- = ( StackType_t ) 0x04040404; /* R4 */
*pxTopOfStack-- = ( StackType_t ) 0x05050505; /* R5 */
*pxTopOfStack-- = ( StackType_t ) 0x06060606; /* R6 */
*pxTopOfStack-- = ( StackType_t ) 0x07070707; /* R7 */
*pxTopOfStack = ( StackType_t ) portNO_CRITICAL_NESTING; /* ulCriticalNesting */
return pxTopOfStack;
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortStartScheduler( void )
BaseType_t xPortStartScheduler( void )
{
/* Start the timer that generates the tick ISR. Interrupts are disabled
here already. */
@ -353,7 +353,7 @@ clock cycles from now. */
#if( configTICK_USE_TC==0 )
static void prvScheduleFirstTick(void)
{
unsigned long lCycles;
uint32_t lCycles;
lCycles = Get_system_register(AVR32_COUNT);
lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
@ -368,7 +368,7 @@ clock cycles from now. */
__attribute__((__noinline__)) static void prvScheduleNextTick(void)
{
unsigned long lCycles, lCount;
uint32_t lCycles, lCount;
lCycles = Get_system_register(AVR32_COMPARE);
lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);

34
FreeRTOS/Source/portable/GCC/AVR32_UC3/portmacro.h
View file

@ -13,7 +13,7 @@
*****************************************************************************/
/*
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@ -105,8 +105,12 @@ extern "C" {
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE unsigned portLONG
#define portBASE_TYPE portLONG
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#define TASK_DELAY_MS(x) ( (x) /portTICK_RATE_MS )
#define TASK_DELAY_S(x) ( (x)*1000 /portTICK_RATE_MS )
@ -115,17 +119,17 @@ extern "C" {
#define configTICK_TC_IRQ ATPASTE2(AVR32_TC_IRQ, configTICK_TC_CHANNEL)
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif
/*-----------------------------------------------------------*/
/* Architecture specifics. */
#define portSTACK_GROWTH ( -1 )
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 4
#define portNOP() {__asm__ __volatile__ ("nop");}
/*-----------------------------------------------------------*/
@ -193,7 +197,7 @@ extern void *pvPortRealloc( void *pv, size_t xSize );
*/
#define portRESTORE_CONTEXT() \
{ \
extern volatile unsigned portLONG ulCriticalNesting; \
extern volatile uint32_t ulCriticalNesting; \
extern volatile void *volatile pxCurrentTCB; \
\
__asm__ __volatile__ ( \
@ -299,7 +303,7 @@ extern void *pvPortRealloc( void *pv, size_t xSize );
*/
#define portSAVE_CONTEXT_OS_INT() \
{ \
extern volatile unsigned portLONG ulCriticalNesting; \
extern volatile uint32_t ulCriticalNesting; \
extern volatile void *volatile pxCurrentTCB; \
\
/* When we come here */ \
@ -351,7 +355,7 @@ extern void *pvPortRealloc( void *pv, size_t xSize );
*/
#define portRESTORE_CONTEXT_OS_INT() \
{ \
extern volatile unsigned portLONG ulCriticalNesting; \
extern volatile uint32_t ulCriticalNesting; \
extern volatile void *volatile pxCurrentTCB; \
\
/* Check if INT0 or higher were being handled (case where the OS tick interrupted another */ \
@ -417,7 +421,7 @@ extern void *pvPortRealloc( void *pv, size_t xSize );
*/
#define portSAVE_CONTEXT_SCALL() \
{ \
extern volatile unsigned portLONG ulCriticalNesting; \
extern volatile uint32_t ulCriticalNesting; \
extern volatile void *volatile pxCurrentTCB; \
\
/* Warning: the stack layout after SCALL doesn't match the one after an interrupt. */ \
@ -484,7 +488,7 @@ extern void *pvPortRealloc( void *pv, size_t xSize );
*/
#define portRESTORE_CONTEXT_SCALL() \
{ \
extern volatile unsigned portLONG ulCriticalNesting; \
extern volatile uint32_t ulCriticalNesting; \
extern volatile void *volatile pxCurrentTCB; \
\
/* Restore all registers */ \
@ -576,7 +580,7 @@ extern void *pvPortRealloc( void *pv, size_t xSize );
*/
#define portENTER_SWITCHING_ISR() \
{ \
extern volatile unsigned portLONG ulCriticalNesting; \
extern volatile uint32_t ulCriticalNesting; \
extern volatile void *volatile pxCurrentTCB; \
\
/* When we come here */ \
@ -624,7 +628,7 @@ extern void *pvPortRealloc( void *pv, size_t xSize );
*/
#define portEXIT_SWITCHING_ISR() \
{ \
extern volatile unsigned portLONG ulCriticalNesting; \
extern volatile uint32_t ulCriticalNesting; \
extern volatile void *volatile pxCurrentTCB; \
\
__asm__ __volatile__ ( \

8
FreeRTOS/Source/portable/GCC/CORTUS_APS3/port.c
View file

@ -86,7 +86,7 @@
static void prvSetupTimerInterrupt( void );
/*-----------------------------------------------------------*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
/* Make space on the stack for the context - this leaves a couple of spaces
empty. */
@ -95,7 +95,7 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_COD
/* Fill the registers with known values to assist debugging. */
pxTopOfStack[ 16 ] = 0;
pxTopOfStack[ 15 ] = portINITIAL_PSR;
pxTopOfStack[ 14 ] = ( unsigned long ) pxCode;
pxTopOfStack[ 14 ] = ( uint32_t ) pxCode;
pxTopOfStack[ 13 ] = 0x00000000UL; /* R15. */
pxTopOfStack[ 12 ] = 0x00000000UL; /* R14. */
pxTopOfStack[ 11 ] = 0x0d0d0d0dUL;
@ -109,13 +109,13 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_COD
pxTopOfStack[ 3 ] = 0x05050505UL;
pxTopOfStack[ 2 ] = 0x04040404UL;
pxTopOfStack[ 1 ] = 0x03030303UL;
pxTopOfStack[ 0 ] = ( unsigned long ) pvParameters;
pxTopOfStack[ 0 ] = ( uint32_t ) pvParameters;
return pxTopOfStack;
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortStartScheduler( void )
BaseType_t xPortStartScheduler( void )
{
/* Set-up the timer interrupt. */
prvSetupTimerInterrupt();

20
FreeRTOS/Source/portable/GCC/CORTUS_APS3/portmacro.h
View file

@ -1,5 +1,5 @@
/*
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@ -88,21 +88,25 @@ extern "C" {
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE unsigned portLONG
#define portBASE_TYPE portLONG
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif
/*-----------------------------------------------------------*/
/* Architecture specifics. */
#define portSTACK_GROWTH ( -1 )
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 4
#define portNOP() __asm__ volatile ( "mov r0, r0" )
#define portCRITICAL_NESTING_IN_TCB 1

20
FreeRTOS/Source/portable/GCC/ColdFire_V2/port.c
View file

@ -67,40 +67,40 @@
#include "FreeRTOS.h"
#include "task.h"
#define portINITIAL_FORMAT_VECTOR ( ( portSTACK_TYPE ) 0x4000 )
#define portINITIAL_FORMAT_VECTOR ( ( StackType_t ) 0x4000 )
/* Supervisor mode set. */
#define portINITIAL_STATUS_REGISTER ( ( portSTACK_TYPE ) 0x2000)
#define portINITIAL_STATUS_REGISTER ( ( StackType_t ) 0x2000)
/* Used to keep track of the number of nested calls to taskENTER_CRITICAL(). This
will be set to 0 prior to the first task being started. */
static unsigned long ulCriticalNesting = 0x9999UL;
static uint32_t ulCriticalNesting = 0x9999UL;
/*-----------------------------------------------------------*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters;
*pxTopOfStack = ( StackType_t ) pvParameters;
pxTopOfStack--;
*pxTopOfStack = (portSTACK_TYPE) 0xDEADBEEF;
*pxTopOfStack = (StackType_t) 0xDEADBEEF;
pxTopOfStack--;
/* Exception stack frame starts with the return address. */
*pxTopOfStack = ( portSTACK_TYPE ) pxCode;
*pxTopOfStack = ( StackType_t ) pxCode;
pxTopOfStack--;
*pxTopOfStack = ( portINITIAL_FORMAT_VECTOR << 16UL ) | ( portINITIAL_STATUS_REGISTER );
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x0; /*FP*/
*pxTopOfStack = ( StackType_t ) 0x0; /*FP*/
pxTopOfStack -= 14; /* A5 to D0. */
return pxTopOfStack;
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortStartScheduler( void )
BaseType_t xPortStartScheduler( void )
{
extern void vPortStartFirstTask( void );
@ -156,7 +156,7 @@ void vPortExitCritical( void )
void vPortYieldHandler( void )
{
unsigned long ulSavedInterruptMask;
uint32_t ulSavedInterruptMask;
ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR();
/* Note this will clear all forced interrupts - this is done for speed. */

24
FreeRTOS/Source/portable/GCC/ColdFire_V2/portmacro.h
View file

@ -1,5 +1,5 @@
/*
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@ -86,24 +86,28 @@ extern "C" {
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE unsigned long
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif
/*-----------------------------------------------------------*/
/* Hardware specifics. */
#define portBYTE_ALIGNMENT 4
#define portSTACK_GROWTH -1
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
/*-----------------------------------------------------------*/
unsigned portLONG ulPortSetIPL( unsigned portLONG );
uint32_t ulPortSetIPL( uint32_t );
#define portDISABLE_INTERRUPTS() ulPortSetIPL( configMAX_SYSCALL_INTERRUPT_PRIORITY )
#define portENABLE_INTERRUPTS() ulPortSetIPL( 0 )
@ -113,8 +117,8 @@ extern void vPortExitCritical( void );
#define portENTER_CRITICAL() vPortEnterCritical()
#define portEXIT_CRITICAL() vPortExitCritical()
extern unsigned portBASE_TYPE uxPortSetInterruptMaskFromISR( void );
extern void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE );
extern UBaseType_t uxPortSetInterruptMaskFromISR( void );
extern void vPortClearInterruptMaskFromISR( UBaseType_t );
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetIPL( configMAX_SYSCALL_INTERRUPT_PRIORITY )
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusRegister ) ulPortSetIPL( uxSavedStatusRegister )

42
FreeRTOS/Source/portable/GCC/H8S2329/port.c
View file

@ -76,15 +76,15 @@
/*-----------------------------------------------------------*/
/* When the task starts interrupts should be enabled. */
#define portINITIAL_CCR ( ( portSTACK_TYPE ) 0x00 )
#define portINITIAL_CCR ( ( StackType_t ) 0x00 )
/* Hardware specific constants used to generate the RTOS tick from the TPU. */
#define portCLEAR_ON_TGRA_COMPARE_MATCH ( ( unsigned char ) 0x20 )
#define portCLOCK_DIV_64 ( ( unsigned char ) 0x03 )
#define portCLOCK_DIV ( ( unsigned long ) 64 )
#define portTGRA_INTERRUPT_ENABLE ( ( unsigned char ) 0x01 )
#define portTIMER_CHANNEL ( ( unsigned char ) 0x02 )
#define portMSTP13 ( ( unsigned short ) 0x2000 )
#define portCLEAR_ON_TGRA_COMPARE_MATCH ( ( uint8_t ) 0x20 )
#define portCLOCK_DIV_64 ( ( uint8_t ) 0x03 )
#define portCLOCK_DIV ( ( uint32_t ) 64 )
#define portTGRA_INTERRUPT_ENABLE ( ( uint8_t ) 0x01 )
#define portTIMER_CHANNEL ( ( uint8_t ) 0x02 )
#define portMSTP13 ( ( uint16_t ) 0x2000 )
/*
* Setup TPU channel one for the RTOS tick at the requested frequency.
@ -101,12 +101,12 @@ void vPortYield( void ) __attribute__ ( ( saveall, interrupt_handler ) );
/*
* See header file for description.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
unsigned long ulValue;
uint32_t ulValue;
/* This requires an even address. */
ulValue = ( unsigned long ) pxTopOfStack;
ulValue = ( uint32_t ) pxTopOfStack;
if( ulValue & 1UL )
{
pxTopOfStack = pxTopOfStack - 1;
@ -125,16 +125,16 @@ unsigned long ulValue;
/* The initial stack mimics an interrupt stack. First there is the program
counter (24 bits). */
ulValue = ( unsigned long ) pxCode;
ulValue = ( uint32_t ) pxCode;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) ( ulValue & 0xff );
*pxTopOfStack = ( StackType_t ) ( ulValue & 0xff );
pxTopOfStack--;
ulValue >>= 8UL;
*pxTopOfStack = ( portSTACK_TYPE ) ( ulValue & 0xff );
*pxTopOfStack = ( StackType_t ) ( ulValue & 0xff );
pxTopOfStack--;
ulValue >>= 8UL;
*pxTopOfStack = ( portSTACK_TYPE ) ( ulValue & 0xff );
*pxTopOfStack = ( StackType_t ) ( ulValue & 0xff );
/* Followed by the CCR. */
pxTopOfStack--;
@ -155,19 +155,19 @@ unsigned long ulValue;
*pxTopOfStack = 0x66;
/* ER0 */
ulValue = ( unsigned long ) pvParameters;
ulValue = ( uint32_t ) pvParameters;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) ( ulValue & 0xff );
*pxTopOfStack = ( StackType_t ) ( ulValue & 0xff );
pxTopOfStack--;
ulValue >>= 8UL;
*pxTopOfStack = ( portSTACK_TYPE ) ( ulValue & 0xff );
*pxTopOfStack = ( StackType_t ) ( ulValue & 0xff );
pxTopOfStack--;
ulValue >>= 8UL;
*pxTopOfStack = ( portSTACK_TYPE ) ( ulValue & 0xff );
*pxTopOfStack = ( StackType_t ) ( ulValue & 0xff );
pxTopOfStack--;
ulValue >>= 8UL;
*pxTopOfStack = ( portSTACK_TYPE ) ( ulValue & 0xff );
*pxTopOfStack = ( StackType_t ) ( ulValue & 0xff );
/* ER1 */
pxTopOfStack--;
@ -223,7 +223,7 @@ unsigned long ulValue;
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortStartScheduler( void )
BaseType_t xPortStartScheduler( void )
{
extern void * pxCurrentTCB;
@ -319,7 +319,7 @@ void vPortYield( void )
*/
static void prvSetupTimerInterrupt( void )
{
const unsigned long ulCompareMatch = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) / portCLOCK_DIV;
const uint32_t ulCompareMatch = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) / portCLOCK_DIV;
/* Turn the module on. */
MSTPCR &= ~portMSTP13;

24
FreeRTOS/Source/portable/GCC/H8S2329/portmacro.h
View file

@ -1,5 +1,5 @@
/*
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@ -72,7 +72,7 @@ extern "C" {
#endif
/*-----------------------------------------------------------
* Port specific definitions.
* Port specific definitions.
*
* The settings in this file configure FreeRTOS correctly for the
* given hardware and compiler.
@ -87,22 +87,26 @@ extern "C" {
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE unsigned portCHAR
#define portSTACK_TYPE uint8_t
#define portBASE_TYPE char
typedef portSTACK_TYPE StackType_t;
typedef signed char BaseType_t;
typedef unsigned char UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif
/*-----------------------------------------------------------*/
/* Hardware specifics. */
#define portBYTE_ALIGNMENT 2
#define portSTACK_GROWTH ( -1 )
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portYIELD() asm volatile( "TRAPA #0" )
#define portNOP() asm volatile( "NOP" )
/*-----------------------------------------------------------*/
@ -121,8 +125,8 @@ extern "C" {
/* Task utilities. */
/* Context switch macros. These macros are very simple as the context
is saved simply by selecting the saveall attribute of the context switch
/* Context switch macros. These macros are very simple as the context
is saved simply by selecting the saveall attribute of the context switch
interrupt service routines. These macros save and restore the stack
pointer to the TCB. */

32
FreeRTOS/Source/portable/GCC/HCS12/port.c
View file

@ -96,7 +96,7 @@ void ATTR_NEAR vPortYield( void );
void ATTR_NEAR vPortTickInterrupt( void );
/* Function in non-banked memory which actually switches to first task. */
portBASE_TYPE ATTR_NEAR xStartSchedulerNear( void );
BaseType_t ATTR_NEAR xStartSchedulerNear( void );
/* Calls to portENTER_CRITICAL() can be nested. When they are nested the
critical section should not be left (i.e. interrupts should not be re-enabled)
@ -104,14 +104,14 @@ until the nesting depth reaches 0. This variable simply tracks the nesting
depth. Each task maintains it's own critical nesting depth variable so
uxCriticalNesting is saved and restored from the task stack during a context
switch. */
volatile unsigned portBASE_TYPE uxCriticalNesting = 0x80; // un-initialized
volatile UBaseType_t uxCriticalNesting = 0x80; // un-initialized
/*-----------------------------------------------------------*/
/*
* See header file for description.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
@ -121,28 +121,28 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
/* The address of the task function is placed in the stack byte at a time. */
*pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pxCode) ) + 1 );
*--pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pxCode) ) + 0 );
*pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pxCode) ) + 1 );
*--pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pxCode) ) + 0 );
/* Next are all the registers that form part of the task context. */
/* Y register */
*--pxTopOfStack = ( portSTACK_TYPE ) 0xff;
*--pxTopOfStack = ( portSTACK_TYPE ) 0xee;
*--pxTopOfStack = ( StackType_t ) 0xff;
*--pxTopOfStack = ( StackType_t ) 0xee;
/* X register */
*--pxTopOfStack = ( portSTACK_TYPE ) 0xdd;
*--pxTopOfStack = ( portSTACK_TYPE ) 0xcc;
*--pxTopOfStack = ( StackType_t ) 0xdd;
*--pxTopOfStack = ( StackType_t ) 0xcc;
/* A register contains parameter high byte. */
*--pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pvParameters) ) + 0 );
*--pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pvParameters) ) + 0 );
/* B register contains parameter low byte. */
*--pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pvParameters) ) + 1 );
*--pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pvParameters) ) + 1 );
/* CCR: Note that when the task starts interrupts will be enabled since
"I" bit of CCR is cleared */
*--pxTopOfStack = ( portSTACK_TYPE ) 0x80; // keeps Stop disabled (MCU default)
*--pxTopOfStack = ( StackType_t ) 0x80; // keeps Stop disabled (MCU default)
/* tmp softregs used by GCC. Values right now don't matter. */
__asm("\n\
@ -161,7 +161,7 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
/* The critical nesting depth is initialised with 0 (meaning not in
a critical section). */
*--pxTopOfStack = ( portSTACK_TYPE ) 0x00;
*--pxTopOfStack = ( StackType_t ) 0x00;
return pxTopOfStack;
@ -183,7 +183,7 @@ static void prvSetupTimerInterrupt( void )
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortStartScheduler( void )
BaseType_t xPortStartScheduler( void )
{
/* xPortStartScheduler() does not start the scheduler directly because
the header file containing the xPortStartScheduler() prototype is part
@ -191,13 +191,13 @@ portBASE_TYPE xPortStartScheduler( void )
Instead it simply calls the locally defined xNearStartScheduler() -
which does use the CODE_SEG pragma. */
short register d;
int16_t register d;
__asm ("jmp xStartSchedulerNear ; will never return": "=d"(d));
return d;
}
/*-----------------------------------------------------------*/
portBASE_TYPE xStartSchedulerNear( void )
BaseType_t xStartSchedulerNear( void )
{
/* Configure the timer that will generate the RTOS tick. Interrupts are
disabled when this function is called. */

45
FreeRTOS/Source/portable/GCC/HCS12/portmacro.h
View file

@ -1,5 +1,5 @@
/*
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@ -72,7 +72,7 @@ extern "C" {
#endif
/*-----------------------------------------------------------
* Port specific definitions.
* Port specific definitions.
*
* The settings in this file configure FreeRTOS correctly for the
* given hardware and compiler.
@ -87,27 +87,32 @@ extern "C" {
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE unsigned portCHAR
#define portSTACK_TYPE uint8_t
#define portBASE_TYPE char
typedef portSTACK_TYPE StackType_t;
typedef signed char BaseType_t;
typedef unsigned char UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif
/*-----------------------------------------------------------*/
/* Hardware specifics. */
#define portBYTE_ALIGNMENT 1
#define portSTACK_GROWTH ( -1 )
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portYIELD() __asm( "swi" );
/*-----------------------------------------------------------*/
/* Critical section handling. */
#define portENABLE_INTERRUPTS() __asm( "cli" )
#define portENABLE_INTERRUPTS() __asm( "cli" )
#define portDISABLE_INTERRUPTS() __asm( "sei" )
/*
@ -118,7 +123,7 @@ extern "C" {
*/
#define portENTER_CRITICAL() \
{ \
extern volatile unsigned portBASE_TYPE uxCriticalNesting; \
extern volatile UBaseType_t uxCriticalNesting; \
\
portDISABLE_INTERRUPTS(); \
uxCriticalNesting++; \
@ -126,12 +131,12 @@ extern "C" {
/*
* Interrupts are disabled so we can access the nesting count directly. If the
* nesting is found to be 0 (no nesting) then we are leaving the critical
* nesting is found to be 0 (no nesting) then we are leaving the critical
* section and interrupts can be re-enabled.
*/
#define portEXIT_CRITICAL() \
{ \
extern volatile unsigned portBASE_TYPE uxCriticalNesting; \
extern volatile UBaseType_t uxCriticalNesting; \
\
uxCriticalNesting--; \
if( uxCriticalNesting == 0 ) \
@ -143,10 +148,10 @@ extern "C" {
/* Task utilities. */
/*
* These macros are very simple as the processor automatically saves and
/*
* These macros are very simple as the processor automatically saves and
* restores its registers as interrupts are entered and exited. In
* addition to the (automatically stacked) registers we also stack the
* addition to the (automatically stacked) registers we also stack the
* critical nesting count. Each task maintains its own critical nesting
* count as it is legitimate for a task to yield from within a critical
* section. If the banked memory model is being used then the PPAGE
@ -154,9 +159,9 @@ extern "C" {
*/
#ifdef BANKED_MODEL
/*
/*
* Load the stack pointer for the task, then pull the critical nesting
* count and PPAGE register from the stack. The remains of the
* count and PPAGE register from the stack. The remains of the
* context are restored by the RTI instruction.
*/
#define portRESTORE_CONTEXT() \
@ -173,9 +178,9 @@ extern "C" {
" ); \
}
/*
/*
* By the time this macro is called the processor has already stacked the
* registers. Simply stack the nesting count and PPAGE value, then save
* registers. Simply stack the nesting count and PPAGE value, then save
* the task stack pointer.
*/
#define portSAVE_CONTEXT() \
@ -193,7 +198,7 @@ extern "C" {
}
#else
/*
/*
* These macros are as per the BANKED versions above, but without saving
* and restoring the PPAGE register.
*/

54
FreeRTOS/Source/portable/GCC/MCF5235/port.c
View file

@ -58,9 +58,9 @@
#include "task.h"
/* ------------------------ Types ----------------------------------------- */
typedef volatile unsigned long vuint32;
typedef volatile unsigned short vuint16;
typedef volatile unsigned char vuint8;
typedef volatile uint32_t vuint32;
typedef volatile uint16_t vuint16;
typedef volatile uint8_t vuint8;
/* ------------------------ Defines --------------------------------------- */
#define portVECTOR_TABLE __RAMVEC
@ -86,11 +86,11 @@ typedef volatile unsigned char vuint8;
#define MCF_INTC0_ICRn_IP(x) ( ( ( x ) & 0x07 ) << 0 )
#define MCF_INTC0_ICRn_IL(x) ( ( ( x ) & 0x07 ) << 3 )
#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )
#define portINITIAL_CRITICAL_NESTING ( ( unsigned long ) 10 )
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
#define portINITIAL_CRITICAL_NESTING ( ( uint32_t ) 10 )
/* ------------------------ Static variables ------------------------------ */
volatile unsigned long ulCriticalNesting = portINITIAL_CRITICAL_NESTING;
volatile uint32_t ulCriticalNesting = portINITIAL_CRITICAL_NESTING;
/* ------------------------ Static functions ------------------------------ */
#if configUSE_PREEMPTION == 0
@ -101,22 +101,22 @@ static void prvPortPreemptiveTick ( void );
/* ------------------------ Start implementation -------------------------- */
portSTACK_TYPE *
pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode,
StackType_t *
pxPortInitialiseStack( StackType_t * pxTopOfStack, pdTASK_CODE pxCode,
void *pvParameters )
{
/* Place the parameter on the stack in the expected location. */
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters;
*pxTopOfStack = ( StackType_t ) pvParameters;
pxTopOfStack--;
/* Place dummy return address on stack. Tasks should never terminate so
* we can set this to anything. */
*pxTopOfStack = ( portSTACK_TYPE ) 0;
*pxTopOfStack = ( StackType_t ) 0;
pxTopOfStack--;
/* Create a Motorola Coldfire exception stack frame. First comes the return
* address. */
*pxTopOfStack = ( portSTACK_TYPE ) pxCode;
*pxTopOfStack = ( StackType_t ) pxCode;
pxTopOfStack--;
/* Format, fault-status, vector number for exception stack frame. Task
@ -129,35 +129,35 @@ pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode,
*pxTopOfStack = 0;
*pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0xA6; /* A6 / FP */
*pxTopOfStack = ( StackType_t ) 0xA6; /* A6 / FP */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0xA5; /* A5 */
*pxTopOfStack = ( StackType_t ) 0xA5; /* A5 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0xA4; /* A4 */
*pxTopOfStack = ( StackType_t ) 0xA4; /* A4 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0xA3; /* A3 */
*pxTopOfStack = ( StackType_t ) 0xA3; /* A3 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0xA2; /* A2 */
*pxTopOfStack = ( StackType_t ) 0xA2; /* A2 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0xA1; /* A1 */
*pxTopOfStack = ( StackType_t ) 0xA1; /* A1 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0xA0; /* A0 */
*pxTopOfStack = ( StackType_t ) 0xA0; /* A0 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0xD7; /* D7 */
*pxTopOfStack = ( StackType_t ) 0xD7; /* D7 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0xD6; /* D6 */
*pxTopOfStack = ( StackType_t ) 0xD6; /* D6 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0xD5; /* D5 */
*pxTopOfStack = ( StackType_t ) 0xD5; /* D5 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0xD4; /* D4 */
*pxTopOfStack = ( StackType_t ) 0xD4; /* D4 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0xD3; /* D3 */
*pxTopOfStack = ( StackType_t ) 0xD3; /* D3 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0xD2; /* D2 */
*pxTopOfStack = ( StackType_t ) 0xD2; /* D2 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0xD1; /* D1 */
*pxTopOfStack = ( StackType_t ) 0xD1; /* D1 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0xD0; /* D0 */
*pxTopOfStack = ( StackType_t ) 0xD0; /* D0 */
return pxTopOfStack;
}
@ -248,7 +248,7 @@ vPortExitCritical()
}
}
portBASE_TYPE
BaseType_t
xPortStartScheduler( void )
{
extern void ( *portVECTOR_TABLE[ ] ) ( );

22
FreeRTOS/Source/portable/GCC/MCF5235/portmacro.h
View file

@ -41,13 +41,13 @@
Please ensure to read the configuration and relevant port sections of the
online documentation.
http://www.FreeRTOS.org - Documentation, latest information, license and
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
@ -67,17 +67,21 @@ extern "C" {
#define portSTACK_TYPE unsigned int
#define portBASE_TYPE int
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif
/* ------------------------ Architecture specifics ------------------------ */
#define portSTACK_GROWTH ( -1 )
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 4
#define portTRAP_YIELD 0 /* Trap 0 */
@ -160,7 +164,7 @@ extern "C" {
/* ------------------------ Function prototypes --------------------------- */
void vPortEnterCritical( void );
void vPortExitCritical( void );
int asm_set_ipl( unsigned long int uiNewIPL );
int asm_set_ipl( uint32_t int uiNewIPL );
/* ------------------------ Compiler specifics ---------------------------- */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) \

50
FreeRTOS/Source/portable/GCC/MSP430F449/port.c
View file

@ -83,14 +83,14 @@
/* Constants required for hardware setup. The tick ISR runs off the ACLK,
not the MCLK. */
#define portACLK_FREQUENCY_HZ ( ( portTickType ) 32768 )
#define portINITIAL_CRITICAL_NESTING ( ( unsigned short ) 10 )
#define portFLAGS_INT_ENABLED ( ( portSTACK_TYPE ) 0x08 )
#define portACLK_FREQUENCY_HZ ( ( TickType_t ) 32768 )
#define portINITIAL_CRITICAL_NESTING ( ( uint16_t ) 10 )
#define portFLAGS_INT_ENABLED ( ( StackType_t ) 0x08 )
/* We require the address of the pxCurrentTCB variable, but don't want to know
any details of its type. */
typedef void tskTCB;
extern volatile tskTCB * volatile pxCurrentTCB;
typedef void TCB_t;
extern volatile TCB_t * volatile pxCurrentTCB;
/* Most ports implement critical sections by placing the interrupt flags on
the stack before disabling interrupts. Exiting the critical section is then
@ -104,7 +104,7 @@ with interrupts only being re-enabled if the count is zero.
usCriticalNesting will get set to zero when the scheduler starts, but must
not be initialised to zero as this will cause problems during the startup
sequence. */
volatile unsigned short usCriticalNesting = portINITIAL_CRITICAL_NESTING;
volatile uint16_t usCriticalNesting = portINITIAL_CRITICAL_NESTING;
/*-----------------------------------------------------------*/
/*
@ -178,17 +178,17 @@ static void prvSetupTimerInterrupt( void );
*
* See the header file portable.h.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
/*
Place a few bytes of known values on the bottom of the stack.
This is just useful for debugging and can be included if required.
*pxTopOfStack = ( portSTACK_TYPE ) 0x1111;
*pxTopOfStack = ( StackType_t ) 0x1111;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x2222;
*pxTopOfStack = ( StackType_t ) 0x2222;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x3333;
*pxTopOfStack = ( StackType_t ) 0x3333;
pxTopOfStack--;
*/
@ -196,38 +196,38 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
executing an ISR. We want the stack to look just as if this has happened
so place a pointer to the start of the task on the stack first - followed
by the flags we want the task to use when it starts up. */
*pxTopOfStack = ( portSTACK_TYPE ) pxCode;
*pxTopOfStack = ( StackType_t ) pxCode;
pxTopOfStack--;
*pxTopOfStack = portFLAGS_INT_ENABLED;
pxTopOfStack--;
/* Next the general purpose registers. */
*pxTopOfStack = ( portSTACK_TYPE ) 0x4444;
*pxTopOfStack = ( StackType_t ) 0x4444;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x5555;
*pxTopOfStack = ( StackType_t ) 0x5555;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x6666;
*pxTopOfStack = ( StackType_t ) 0x6666;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x7777;
*pxTopOfStack = ( StackType_t ) 0x7777;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x8888;
*pxTopOfStack = ( StackType_t ) 0x8888;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x9999;
*pxTopOfStack = ( StackType_t ) 0x9999;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0xaaaa;
*pxTopOfStack = ( StackType_t ) 0xaaaa;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0xbbbb;
*pxTopOfStack = ( StackType_t ) 0xbbbb;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0xcccc;
*pxTopOfStack = ( StackType_t ) 0xcccc;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0xdddd;
*pxTopOfStack = ( StackType_t ) 0xdddd;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0xeeee;
*pxTopOfStack = ( StackType_t ) 0xeeee;
pxTopOfStack--;
/* When the task starts is will expect to find the function parameter in
R15. */
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters;
*pxTopOfStack = ( StackType_t ) pvParameters;
pxTopOfStack--;
/* The code generated by the mspgcc compiler does not maintain separate
@ -235,7 +235,7 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
use the stack as per other ports. Instead a variable is used to keep
track of the critical section nesting. This variable has to be stored
as part of the task context and is initially set to zero. */
*pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_SECTION_NESTING;
*pxTopOfStack = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING;
/* Return a pointer to the top of the stack we have generated so this can
be stored in the task control block for the task. */
@ -243,7 +243,7 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortStartScheduler( void )
BaseType_t xPortStartScheduler( void )
{
/* Setup the hardware to generate the tick. Interrupts are disabled when
this function is called. */

30
FreeRTOS/Source/portable/GCC/MSP430F449/portmacro.h
View file

@ -1,5 +1,5 @@
/*
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@ -71,7 +71,7 @@ extern "C" {
#endif
/*-----------------------------------------------------------
* Port specific definitions.
* Port specific definitions.
*
* The settings in this file configure FreeRTOS correctly for the
* given hardware and compiler.
@ -86,17 +86,21 @@ extern "C" {
#define portDOUBLE double
#define portLONG long
#define portSHORT int
#define portSTACK_TYPE unsigned portSHORT
#define portBASE_TYPE portSHORT
#define portSTACK_TYPE uint16_t
#define portBASE_TYPE short
typedef portSTACK_TYPE StackType_t;
typedef short BaseType_t;
typedef unsigned short UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif
/*-----------------------------------------------------------*/
/*-----------------------------------------------------------*/
/* Interrupt control macros. */
#define portDISABLE_INTERRUPTS() asm volatile ( "DINT" ); asm volatile ( "NOP" )
@ -104,11 +108,11 @@ extern "C" {
/*-----------------------------------------------------------*/
/* Critical section control macros. */
#define portNO_CRITICAL_SECTION_NESTING ( ( unsigned portSHORT ) 0 )
#define portNO_CRITICAL_SECTION_NESTING ( ( uint16_t ) 0 )
#define portENTER_CRITICAL() \
{ \
extern volatile unsigned portSHORT usCriticalNesting; \
extern volatile uint16_t usCriticalNesting; \
\
portDISABLE_INTERRUPTS(); \
\
@ -120,7 +124,7 @@ extern volatile unsigned portSHORT usCriticalNesting; \
#define portEXIT_CRITICAL() \
{ \
extern volatile unsigned portSHORT usCriticalNesting; \
extern volatile uint16_t usCriticalNesting; \
\
if( usCriticalNesting > portNO_CRITICAL_SECTION_NESTING ) \
{ \
@ -146,7 +150,7 @@ extern void vPortYield( void ) __attribute__ ( ( naked ) );
/* Hardwware specifics. */
#define portBYTE_ALIGNMENT 2
#define portSTACK_GROWTH ( -1 )
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
/*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. */

100
FreeRTOS/Source/portable/GCC/MicroBlaze/port.c
View file

@ -81,7 +81,7 @@
#include <xtmrctr.h>
/* Tasks are started with interrupts enabled. */
#define portINITIAL_MSR_STATE ( ( portSTACK_TYPE ) 0x02 )
#define portINITIAL_MSR_STATE ( ( StackType_t ) 0x02 )
/* Tasks are started with a critical section nesting of 0 - however prior
to the scheduler being commenced we don't want the critical nesting level
@ -98,11 +98,11 @@ debugging. */
/* Counts the nesting depth of calls to portENTER_CRITICAL(). Each task
maintains it's own count, so this variable is saved as part of the task
context. */
volatile unsigned portBASE_TYPE uxCriticalNesting = portINITIAL_NESTING_VALUE;
volatile UBaseType_t uxCriticalNesting = portINITIAL_NESTING_VALUE;
/* To limit the amount of stack required by each task, this port uses a
separate stack for interrupts. */
unsigned long *pulISRStack;
uint32_t *pulISRStack;
/*-----------------------------------------------------------*/
@ -119,93 +119,93 @@ static void prvSetupTimerInterrupt( void );
*
* See the header file portable.h.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
extern void *_SDA2_BASE_, *_SDA_BASE_;
const unsigned long ulR2 = ( unsigned long ) &_SDA2_BASE_;
const unsigned long ulR13 = ( unsigned long ) &_SDA_BASE_;
const uint32_t ulR2 = ( uint32_t ) &_SDA2_BASE_;
const uint32_t ulR13 = ( uint32_t ) &_SDA_BASE_;
/* Place a few bytes of known values on the bottom of the stack.
This is essential for the Microblaze port and these lines must
not be omitted. The parameter value will overwrite the
0x22222222 value during the function prologue. */
*pxTopOfStack = ( portSTACK_TYPE ) 0x11111111;
*pxTopOfStack = ( StackType_t ) 0x11111111;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x22222222;
*pxTopOfStack = ( StackType_t ) 0x22222222;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x33333333;
*pxTopOfStack = ( StackType_t ) 0x33333333;
pxTopOfStack--;
/* First stack an initial value for the critical section nesting. This
is initialised to zero as tasks are started with interrupts enabled. */
*pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* R0. */
*pxTopOfStack = ( StackType_t ) 0x00; /* R0. */
/* Place an initial value for all the general purpose registers. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) ulR2; /* R2 - small data area. */
*pxTopOfStack = ( StackType_t ) ulR2; /* R2 - small data area. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x03; /* R3. */
*pxTopOfStack = ( StackType_t ) 0x03; /* R3. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x04; /* R4. */
*pxTopOfStack = ( StackType_t ) 0x04; /* R4. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters;/* R5 contains the function call parameters. */
*pxTopOfStack = ( StackType_t ) pvParameters;/* R5 contains the function call parameters. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x06; /* R6. */
*pxTopOfStack = ( StackType_t ) 0x06; /* R6. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x07; /* R7. */
*pxTopOfStack = ( StackType_t ) 0x07; /* R7. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x08; /* R8. */
*pxTopOfStack = ( StackType_t ) 0x08; /* R8. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x09; /* R9. */
*pxTopOfStack = ( StackType_t ) 0x09; /* R9. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x0a; /* R10. */
*pxTopOfStack = ( StackType_t ) 0x0a; /* R10. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x0b; /* R11. */
*pxTopOfStack = ( StackType_t ) 0x0b; /* R11. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x0c; /* R12. */
*pxTopOfStack = ( StackType_t ) 0x0c; /* R12. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) ulR13; /* R13 - small data read write area. */
*pxTopOfStack = ( StackType_t ) ulR13; /* R13 - small data read write area. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* R14. */
*pxTopOfStack = ( StackType_t ) pxCode; /* R14. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x0f; /* R15. */
*pxTopOfStack = ( StackType_t ) 0x0f; /* R15. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x10; /* R16. */
*pxTopOfStack = ( StackType_t ) 0x10; /* R16. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x11; /* R17. */
*pxTopOfStack = ( StackType_t ) 0x11; /* R17. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x12; /* R18. */
*pxTopOfStack = ( StackType_t ) 0x12; /* R18. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x13; /* R19. */
*pxTopOfStack = ( StackType_t ) 0x13; /* R19. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x14; /* R20. */
*pxTopOfStack = ( StackType_t ) 0x14; /* R20. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x15; /* R21. */
*pxTopOfStack = ( StackType_t ) 0x15; /* R21. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x16; /* R22. */
*pxTopOfStack = ( StackType_t ) 0x16; /* R22. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x17; /* R23. */
*pxTopOfStack = ( StackType_t ) 0x17; /* R23. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x18; /* R24. */
*pxTopOfStack = ( StackType_t ) 0x18; /* R24. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x19; /* R25. */
*pxTopOfStack = ( StackType_t ) 0x19; /* R25. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x1a; /* R26. */
*pxTopOfStack = ( StackType_t ) 0x1a; /* R26. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x1b; /* R27. */
*pxTopOfStack = ( StackType_t ) 0x1b; /* R27. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x1c; /* R28. */
*pxTopOfStack = ( StackType_t ) 0x1c; /* R28. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x1d; /* R29. */
*pxTopOfStack = ( StackType_t ) 0x1d; /* R29. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x1e; /* R30. */
*pxTopOfStack = ( StackType_t ) 0x1e; /* R30. */
pxTopOfStack--;
/* The MSR is stacked between R30 and R31. */
*pxTopOfStack = portINITIAL_MSR_STATE;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x1f; /* R31. */
*pxTopOfStack = ( StackType_t ) 0x1f; /* R31. */
pxTopOfStack--;
/* Return a pointer to the top of the stack we have generated so this can
@ -214,7 +214,7 @@ const unsigned long ulR13 = ( unsigned long ) &_SDA_BASE_;
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortStartScheduler( void )
BaseType_t xPortStartScheduler( void )
{
extern void ( __FreeRTOS_interrupt_Handler )( void );
extern void ( vStartFirstTask )( void );
@ -232,13 +232,13 @@ extern void ( vStartFirstTask )( void );
prvSetupTimerInterrupt();
/* Allocate the stack to be used by the interrupt handler. */
pulISRStack = ( unsigned long * ) pvPortMalloc( configMINIMAL_STACK_SIZE * sizeof( portSTACK_TYPE ) );
pulISRStack = ( uint32_t * ) pvPortMalloc( configMINIMAL_STACK_SIZE * sizeof( StackType_t ) );
/* Restore the context of the first task that is going to run. */
if( pulISRStack != NULL )
{
/* Fill the ISR stack with a known value to facilitate debugging. */
memset( pulISRStack, portISR_STACK_FILL_VALUE, configMINIMAL_STACK_SIZE * sizeof( portSTACK_TYPE ) );
memset( pulISRStack, portISR_STACK_FILL_VALUE, configMINIMAL_STACK_SIZE * sizeof( StackType_t ) );
pulISRStack += ( configMINIMAL_STACK_SIZE - 1 );
/* Kick off the first task. */
@ -281,8 +281,8 @@ extern void VPortYieldASM( void );
static void prvSetupTimerInterrupt( void )
{
XTmrCtr xTimer;
const unsigned long ulCounterValue = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
unsigned portBASE_TYPE uxMask;
const uint32_t ulCounterValue = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
UBaseType_t uxMask;
/* The OPB timer1 is used to generate the tick. Use the provided library
functions to enable the timer and set the tick frequency. */
@ -311,7 +311,7 @@ unsigned portBASE_TYPE uxMask;
*/
void vTaskISRHandler( void )
{
static unsigned long ulPending;
static uint32_t ulPending;
/* Which interrupts are pending? */
ulPending = XIntc_In32( ( XPAR_INTC_SINGLE_BASEADDR + XIN_IVR_OFFSET ) );
@ -320,12 +320,12 @@ static unsigned long ulPending;
{
static XIntc_VectorTableEntry *pxTablePtr;
static XIntc_Config *pxConfig;
static unsigned long ulInterruptMask;
static uint32_t ulInterruptMask;
ulInterruptMask = ( unsigned long ) 1 << ulPending;
ulInterruptMask = ( uint32_t ) 1 << ulPending;
/* Get the configuration data using the device ID */
pxConfig = &XIntc_ConfigTable[ ( unsigned long ) XPAR_INTC_SINGLE_DEVICE_ID ];
pxConfig = &XIntc_ConfigTable[ ( uint32_t ) XPAR_INTC_SINGLE_DEVICE_ID ];
pxTablePtr = &( pxConfig->HandlerTable[ ulPending ] );
if( pxConfig->AckBeforeService & ( ulInterruptMask ) )
@ -347,7 +347,7 @@ static unsigned long ulPending;
*/
void vTickISR( void *pvBaseAddress )
{
unsigned long ulCSR;
uint32_t ulCSR;
/* Increment the RTOS tick - this might cause a task to unblock. */
if( xTaskIncrementTick() != pdFALSE )

30
FreeRTOS/Source/portable/GCC/MicroBlaze/portmacro.h
View file

@ -1,5 +1,5 @@
/*
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@ -71,7 +71,7 @@ extern "C" {
#endif
/*-----------------------------------------------------------
* Port specific definitions.
* Port specific definitions.
*
* The settings in this file configure FreeRTOS correctly for the
* given hardware and compiler.
@ -86,17 +86,21 @@ extern "C" {
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE unsigned portLONG
#define portBASE_TYPE portLONG
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif
/*-----------------------------------------------------------*/
/*-----------------------------------------------------------*/
/* Interrupt control macros. */
void microblaze_disable_interrupts( void );
@ -109,13 +113,13 @@ void microblaze_enable_interrupts( void );
void vPortEnterCritical( void );
void vPortExitCritical( void );
#define portENTER_CRITICAL() { \
extern unsigned portBASE_TYPE uxCriticalNesting; \
extern UBaseType_t uxCriticalNesting; \
microblaze_disable_interrupts(); \
uxCriticalNesting++; \
}
#define portEXIT_CRITICAL() { \
extern unsigned portBASE_TYPE uxCriticalNesting; \
extern UBaseType_t uxCriticalNesting; \
/* Interrupts are disabled, so we can */ \
/* access the variable directly. */ \
uxCriticalNesting--; \
@ -140,7 +144,7 @@ void vTaskSwitchContext();
/* Hardware specifics. */
#define portBYTE_ALIGNMENT 4
#define portSTACK_GROWTH ( -1 )
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portNOP() asm volatile ( "NOP" )
/*-----------------------------------------------------------*/

112
FreeRTOS/Source/portable/GCC/MicroBlazeV8/port.c
View file

@ -98,24 +98,24 @@ created. */
/*
* Initialise the interrupt controller instance.
*/
static long prvInitialiseInterruptController( void );
static int32_t prvInitialiseInterruptController( void );
/* Ensure the interrupt controller instance variable is initialised before it is
* used, and that the initialisation only happens once.
*/
static long prvEnsureInterruptControllerIsInitialised( void );
static int32_t prvEnsureInterruptControllerIsInitialised( void );
/*-----------------------------------------------------------*/
/* Counts the nesting depth of calls to portENTER_CRITICAL(). Each task
maintains its own count, so this variable is saved as part of the task
context. */
volatile unsigned portBASE_TYPE uxCriticalNesting = portINITIAL_NESTING_VALUE;
volatile UBaseType_t uxCriticalNesting = portINITIAL_NESTING_VALUE;
/* This port uses a separate stack for interrupts. This prevents the stack of
every task needing to be large enough to hold an entire interrupt stack on top
of the task stack. */
unsigned long *pulISRStack;
uint32_t *pulISRStack;
/* If an interrupt requests a context switch, then ulTaskSwitchRequested will
get set to 1. ulTaskSwitchRequested is inspected just before the main interrupt
@ -125,7 +125,7 @@ the interrupt exists is the highest priority task that is able to run. This is
an unusual mechanism, but is used for this port because a single interrupt can
cause the servicing of multiple peripherals - and it is inefficient to call
vTaskSwitchContext() multiple times as each peripheral is serviced. */
volatile unsigned long ulTaskSwitchRequested = 0UL;
volatile uint32_t ulTaskSwitchRequested = 0UL;
/* The instance of the interrupt controller used by this port. This is required
by the Xilinx library API functions. */
@ -139,20 +139,20 @@ static XIntc xInterruptControllerInstance;
*
* See the portable.h header file.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
extern void *_SDA2_BASE_, *_SDA_BASE_;
const unsigned long ulR2 = ( unsigned long ) &_SDA2_BASE_;
const unsigned long ulR13 = ( unsigned long ) &_SDA_BASE_;
const uint32_t ulR2 = ( uint32_t ) &_SDA2_BASE_;
const uint32_t ulR13 = ( uint32_t ) &_SDA_BASE_;
/* Place a few bytes of known values on the bottom of the stack.
This is essential for the Microblaze port and these lines must
not be omitted. */
*pxTopOfStack = ( portSTACK_TYPE ) 0x00000000;
*pxTopOfStack = ( StackType_t ) 0x00000000;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x00000000;
*pxTopOfStack = ( StackType_t ) 0x00000000;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x00000000;
*pxTopOfStack = ( StackType_t ) 0x00000000;
pxTopOfStack--;
#if XPAR_MICROBLAZE_0_USE_FPU == 1
@ -169,86 +169,86 @@ const unsigned long ulR13 = ( unsigned long ) &_SDA_BASE_;
/* First stack an initial value for the critical section nesting. This
is initialised to zero. */
*pxTopOfStack = ( portSTACK_TYPE ) 0x00;
*pxTopOfStack = ( StackType_t ) 0x00;
/* R0 is always zero. */
/* R1 is the SP. */
/* Place an initial value for all the general purpose registers. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) ulR2; /* R2 - read only small data area. */
*pxTopOfStack = ( StackType_t ) ulR2; /* R2 - read only small data area. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x03; /* R3 - return values and temporaries. */
*pxTopOfStack = ( StackType_t ) 0x03; /* R3 - return values and temporaries. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x04; /* R4 - return values and temporaries. */
*pxTopOfStack = ( StackType_t ) 0x04; /* R4 - return values and temporaries. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters;/* R5 contains the function call parameters. */
*pxTopOfStack = ( StackType_t ) pvParameters;/* R5 contains the function call parameters. */
#ifdef portPRE_LOAD_STACK_FOR_DEBUGGING
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x06; /* R6 - other parameters and temporaries. Used as the return address from vPortTaskEntryPoint. */
*pxTopOfStack = ( StackType_t ) 0x06; /* R6 - other parameters and temporaries. Used as the return address from vPortTaskEntryPoint. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x07; /* R7 - other parameters and temporaries. */
*pxTopOfStack = ( StackType_t ) 0x07; /* R7 - other parameters and temporaries. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x08; /* R8 - other parameters and temporaries. */
*pxTopOfStack = ( StackType_t ) 0x08; /* R8 - other parameters and temporaries. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x09; /* R9 - other parameters and temporaries. */
*pxTopOfStack = ( StackType_t ) 0x09; /* R9 - other parameters and temporaries. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x0a; /* R10 - other parameters and temporaries. */
*pxTopOfStack = ( StackType_t ) 0x0a; /* R10 - other parameters and temporaries. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x0b; /* R11 - temporaries. */
*pxTopOfStack = ( StackType_t ) 0x0b; /* R11 - temporaries. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x0c; /* R12 - temporaries. */
*pxTopOfStack = ( StackType_t ) 0x0c; /* R12 - temporaries. */
pxTopOfStack--;
#else
pxTopOfStack-= 8;
#endif
*pxTopOfStack = ( portSTACK_TYPE ) ulR13; /* R13 - read/write small data area. */
*pxTopOfStack = ( StackType_t ) ulR13; /* R13 - read/write small data area. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* R14 - return address for interrupt. */
*pxTopOfStack = ( StackType_t ) pxCode; /* R14 - return address for interrupt. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) NULL; /* R15 - return address for subroutine. */
*pxTopOfStack = ( StackType_t ) NULL; /* R15 - return address for subroutine. */
#ifdef portPRE_LOAD_STACK_FOR_DEBUGGING
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x10; /* R16 - return address for trap (debugger). */
*pxTopOfStack = ( StackType_t ) 0x10; /* R16 - return address for trap (debugger). */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x11; /* R17 - return address for exceptions, if configured. */
*pxTopOfStack = ( StackType_t ) 0x11; /* R17 - return address for exceptions, if configured. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x12; /* R18 - reserved for assembler and compiler temporaries. */
*pxTopOfStack = ( StackType_t ) 0x12; /* R18 - reserved for assembler and compiler temporaries. */
pxTopOfStack--;
#else
pxTopOfStack -= 4;
#endif
*pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* R19 - must be saved across function calls. Callee-save. Seems to be interpreted as the frame pointer. */
*pxTopOfStack = ( StackType_t ) 0x00; /* R19 - must be saved across function calls. Callee-save. Seems to be interpreted as the frame pointer. */
#ifdef portPRE_LOAD_STACK_FOR_DEBUGGING
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x14; /* R20 - reserved for storing a pointer to the Global Offset Table (GOT) in Position Independent Code (PIC). Non-volatile in non-PIC code. Must be saved across function calls. Callee-save. Not used by FreeRTOS. */
*pxTopOfStack = ( StackType_t ) 0x14; /* R20 - reserved for storing a pointer to the Global Offset Table (GOT) in Position Independent Code (PIC). Non-volatile in non-PIC code. Must be saved across function calls. Callee-save. Not used by FreeRTOS. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x15; /* R21 - must be saved across function calls. Callee-save. */
*pxTopOfStack = ( StackType_t ) 0x15; /* R21 - must be saved across function calls. Callee-save. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x16; /* R22 - must be saved across function calls. Callee-save. */
*pxTopOfStack = ( StackType_t ) 0x16; /* R22 - must be saved across function calls. Callee-save. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x17; /* R23 - must be saved across function calls. Callee-save. */
*pxTopOfStack = ( StackType_t ) 0x17; /* R23 - must be saved across function calls. Callee-save. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x18; /* R24 - must be saved across function calls. Callee-save. */
*pxTopOfStack = ( StackType_t ) 0x18; /* R24 - must be saved across function calls. Callee-save. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x19; /* R25 - must be saved across function calls. Callee-save. */
*pxTopOfStack = ( StackType_t ) 0x19; /* R25 - must be saved across function calls. Callee-save. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x1a; /* R26 - must be saved across function calls. Callee-save. */
*pxTopOfStack = ( StackType_t ) 0x1a; /* R26 - must be saved across function calls. Callee-save. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x1b; /* R27 - must be saved across function calls. Callee-save. */
*pxTopOfStack = ( StackType_t ) 0x1b; /* R27 - must be saved across function calls. Callee-save. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x1c; /* R28 - must be saved across function calls. Callee-save. */
*pxTopOfStack = ( StackType_t ) 0x1c; /* R28 - must be saved across function calls. Callee-save. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x1d; /* R29 - must be saved across function calls. Callee-save. */
*pxTopOfStack = ( StackType_t ) 0x1d; /* R29 - must be saved across function calls. Callee-save. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x1e; /* R30 - must be saved across function calls. Callee-save. */
*pxTopOfStack = ( StackType_t ) 0x1e; /* R30 - must be saved across function calls. Callee-save. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x1f; /* R31 - must be saved across function calls. Callee-save. */
*pxTopOfStack = ( StackType_t ) 0x1f; /* R31 - must be saved across function calls. Callee-save. */
pxTopOfStack--;
#else
pxTopOfStack -= 13;
@ -260,10 +260,10 @@ const unsigned long ulR13 = ( unsigned long ) &_SDA_BASE_;
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortStartScheduler( void )
BaseType_t xPortStartScheduler( void )
{
extern void ( vPortStartFirstTask )( void );
extern unsigned long _stack[];
extern uint32_t _stack[];
/* Setup the hardware to generate the tick. Interrupts are disabled when
this function is called.
@ -277,7 +277,7 @@ extern unsigned long _stack[];
vApplicationSetupTimerInterrupt();
/* Reuse the stack from main() as the stack for the interrupts/exceptions. */
pulISRStack = ( unsigned long * ) _stack;
pulISRStack = ( uint32_t * ) _stack;
/* Ensure there is enough space for the functions called from the interrupt
service routines to write back into the stack frame of the caller. */
@ -321,9 +321,9 @@ extern void VPortYieldASM( void );
}
/*-----------------------------------------------------------*/
void vPortEnableInterrupt( unsigned char ucInterruptID )
void vPortEnableInterrupt( uint8_t ucInterruptID )
{
long lReturn;
int32_t lReturn;
/* An API function is provided to enable an interrupt in the interrupt
controller because the interrupt controller instance variable is private
@ -338,9 +338,9 @@ long lReturn;
}
/*-----------------------------------------------------------*/
void vPortDisableInterrupt( unsigned char ucInterruptID )
void vPortDisableInterrupt( uint8_t ucInterruptID )
{
long lReturn;
int32_t lReturn;
/* An API function is provided to disable an interrupt in the interrupt
controller because the interrupt controller instance variable is private
@ -356,9 +356,9 @@ long lReturn;
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortInstallInterruptHandler( unsigned char ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef )
BaseType_t xPortInstallInterruptHandler( uint8_t ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef )
{
long lReturn;
int32_t lReturn;
/* An API function is provided to install an interrupt handler because the
interrupt controller instance variable is private to this file. */
@ -381,10 +381,10 @@ long lReturn;
}
/*-----------------------------------------------------------*/
static long prvEnsureInterruptControllerIsInitialised( void )
static int32_t prvEnsureInterruptControllerIsInitialised( void )
{
static long lInterruptControllerInitialised = pdFALSE;
long lReturn;
static int32_t lInterruptControllerInitialised = pdFALSE;
int32_t lReturn;
/* Ensure the interrupt controller instance variable is initialised before
it is used, and that the initialisation only happens once. */
@ -434,9 +434,9 @@ extern void vApplicationClearTimerInterrupt( void );
}
/*-----------------------------------------------------------*/
static long prvInitialiseInterruptController( void )
static int32_t prvInitialiseInterruptController( void )
{
long lStatus;
int32_t lStatus;
lStatus = XIntc_Initialize( &xInterruptControllerInstance, configINTERRUPT_CONTROLLER_TO_USE );

24
FreeRTOS/Source/portable/GCC/MicroBlazeV8/port_exceptions.c
View file

@ -104,7 +104,7 @@ configINSTALL_EXCEPTION_HANDLERS is not set to 1. */
/* This variable is set in the exception entry code, before
vPortExceptionHandler is called. */
unsigned long *pulStackPointerOnFunctionEntry = NULL;
uint32_t *pulStackPointerOnFunctionEntry = NULL;
/* This is the structure that is filled with the MicroBlaze context as it
existed immediately prior to the exception occurrence. A pointer to this
@ -186,7 +186,7 @@ extern void *pxCurrentTCB;
xRegisterDump.ulR29 = mfgpr( R29 );
xRegisterDump.ulR30 = mfgpr( R30 );
xRegisterDump.ulR31 = mfgpr( R31 );
xRegisterDump.ulR1_SP = ( ( unsigned long ) pulStackPointerOnFunctionEntry ) + portexASM_HANDLER_STACK_FRAME_SIZE;
xRegisterDump.ulR1_SP = ( ( uint32_t ) pulStackPointerOnFunctionEntry ) + portexASM_HANDLER_STACK_FRAME_SIZE;
xRegisterDump.ulEAR = mfear();
xRegisterDump.ulESR = mfesr();
xRegisterDump.ulEDR = mfedr();
@ -209,40 +209,40 @@ extern void *pxCurrentTCB;
/* Also fill in a string that describes what type of exception this is.
The string uses the same ID names as defined in the MicroBlaze standard
library exception header files. */
switch( ( unsigned long ) pvExceptionID )
switch( ( uint32_t ) pvExceptionID )
{
case XEXC_ID_FSL :
xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_FSL";
xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_FSL";
break;
case XEXC_ID_UNALIGNED_ACCESS :
xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_UNALIGNED_ACCESS";
xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_UNALIGNED_ACCESS";
break;
case XEXC_ID_ILLEGAL_OPCODE :
xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_ILLEGAL_OPCODE";
xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_ILLEGAL_OPCODE";
break;
case XEXC_ID_M_AXI_I_EXCEPTION :
xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_M_AXI_I_EXCEPTION or XEXC_ID_IPLB_EXCEPTION";
xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_M_AXI_I_EXCEPTION or XEXC_ID_IPLB_EXCEPTION";
break;
case XEXC_ID_M_AXI_D_EXCEPTION :
xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_M_AXI_D_EXCEPTION or XEXC_ID_DPLB_EXCEPTION";
xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_M_AXI_D_EXCEPTION or XEXC_ID_DPLB_EXCEPTION";
break;
case XEXC_ID_DIV_BY_ZERO :
xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_DIV_BY_ZERO";
xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_DIV_BY_ZERO";
break;
case XEXC_ID_STACK_VIOLATION :
xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_STACK_VIOLATION or XEXC_ID_MMU";
xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_STACK_VIOLATION or XEXC_ID_MMU";
break;
#if XPAR_MICROBLAZE_0_USE_FPU == 1
case XEXC_ID_FPU :
xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_FPU see ulFSR value";
xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_FPU see ulFSR value";
break;
#endif /* XPAR_MICROBLAZE_0_USE_FPU */
@ -265,7 +265,7 @@ extern void *pxCurrentTCB;
void vPortExceptionsInstallHandlers( void )
{
static unsigned long ulHandlersAlreadyInstalled = pdFALSE;
static uint32_t ulHandlersAlreadyInstalled = pdFALSE;
if( ulHandlersAlreadyInstalled == pdFALSE )
{

194
FreeRTOS/Source/portable/GCC/MicroBlazeV8/portmacro.h
View file

@ -1,5 +1,5 @@
/*
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@ -75,7 +75,7 @@ extern "C" {
#include <xparameters.h>
/*-----------------------------------------------------------
* Port specific definitions.
* Port specific definitions.
*
* The settings in this file configure FreeRTOS correctly for the
* given hardware and compiler.
@ -90,17 +90,21 @@ extern "C" {
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE unsigned long
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif
/*-----------------------------------------------------------*/
/*-----------------------------------------------------------*/
/* Interrupt control macros and functions. */
void microblaze_disable_interrupts( void );
@ -114,13 +118,13 @@ void microblaze_enable_interrupts( void );
void vPortEnterCritical( void );
void vPortExitCritical( void );
#define portENTER_CRITICAL() { \
extern volatile unsigned portBASE_TYPE uxCriticalNesting; \
extern volatile UBaseType_t uxCriticalNesting; \
microblaze_disable_interrupts(); \
uxCriticalNesting++; \
}
#define portEXIT_CRITICAL() { \
extern volatile unsigned portBASE_TYPE uxCriticalNesting; \
extern volatile UBaseType_t uxCriticalNesting; \
/* Interrupts are disabled, so we can */ \
/* access the variable directly. */ \
uxCriticalNesting--; \
@ -144,14 +148,14 @@ then checks this flag, and calls vTaskSwitchContext() before restoring a task
context, if the flag is not false. This is done to prevent multiple calls to
vTaskSwitchContext() being made from a single interrupt, as a single interrupt
can result in multiple peripherals being serviced. */
extern volatile unsigned long ulTaskSwitchRequested;
extern volatile uint32_t ulTaskSwitchRequested;
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) ulTaskSwitchRequested = 1
/*-----------------------------------------------------------*/
/* Hardware specifics. */
#define portBYTE_ALIGNMENT 4
#define portSTACK_GROWTH ( -1 )
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portNOP() asm volatile ( "NOP" )
/*-----------------------------------------------------------*/
@ -167,53 +171,53 @@ typedef struct PORT_REGISTER_DUMP
{
/* The following structure members hold the values of the MicroBlaze
registers at the time the exception was raised. */
unsigned long ulR1_SP;
unsigned long ulR2_small_data_area;
unsigned long ulR3;
unsigned long ulR4;
unsigned long ulR5;
unsigned long ulR6;
unsigned long ulR7;
unsigned long ulR8;
unsigned long ulR9;
unsigned long ulR10;
unsigned long ulR11;
unsigned long ulR12;
unsigned long ulR13_read_write_small_data_area;
unsigned long ulR14_return_address_from_interrupt;
unsigned long ulR15_return_address_from_subroutine;
unsigned long ulR16_return_address_from_trap;
unsigned long ulR17_return_address_from_exceptions; /* The exception entry code will copy the BTR into R17 if the exception occurred in the delay slot of a branch instruction. */
unsigned long ulR18;
unsigned long ulR19;
unsigned long ulR20;
unsigned long ulR21;
unsigned long ulR22;
unsigned long ulR23;
unsigned long ulR24;
unsigned long ulR25;
unsigned long ulR26;
unsigned long ulR27;
unsigned long ulR28;
unsigned long ulR29;
unsigned long ulR30;
unsigned long ulR31;
unsigned long ulPC;
unsigned long ulESR;
unsigned long ulMSR;
unsigned long ulEAR;
unsigned long ulFSR;
unsigned long ulEDR;
uint32_t ulR1_SP;
uint32_t ulR2_small_data_area;
uint32_t ulR3;
uint32_t ulR4;
uint32_t ulR5;
uint32_t ulR6;
uint32_t ulR7;
uint32_t ulR8;
uint32_t ulR9;
uint32_t ulR10;
uint32_t ulR11;
uint32_t ulR12;
uint32_t ulR13_read_write_small_data_area;
uint32_t ulR14_return_address_from_interrupt;
uint32_t ulR15_return_address_from_subroutine;
uint32_t ulR16_return_address_from_trap;
uint32_t ulR17_return_address_from_exceptions; /* The exception entry code will copy the BTR into R17 if the exception occurred in the delay slot of a branch instruction. */
uint32_t ulR18;
uint32_t ulR19;
uint32_t ulR20;
uint32_t ulR21;
uint32_t ulR22;
uint32_t ulR23;
uint32_t ulR24;
uint32_t ulR25;
uint32_t ulR26;
uint32_t ulR27;
uint32_t ulR28;
uint32_t ulR29;
uint32_t ulR30;
uint32_t ulR31;
uint32_t ulPC;
uint32_t ulESR;
uint32_t ulMSR;
uint32_t ulEAR;
uint32_t ulFSR;
uint32_t ulEDR;
/* A human readable description of the exception cause. The strings used
are the same as the #define constant names found in the
microblaze_exceptions_i.h header file */
signed char *pcExceptionCause;
int8_t *pcExceptionCause;
/* The human readable name of the task that was running at the time the
exception occurred. This is the name that was given to the task when the
task was created using the FreeRTOS xTaskCreate() API function. */
signed char *pcCurrentTaskName;
int8_t *pcCurrentTaskName;
/* The handle of the task that was running a the time the exception
occurred. */
@ -223,15 +227,15 @@ typedef struct PORT_REGISTER_DUMP
/*
* Installs pxHandler as the interrupt handler for the peripheral specified by
* Installs pxHandler as the interrupt handler for the peripheral specified by
* the ucInterruptID parameter.
*
* ucInterruptID:
*
*
* The ID of the peripheral that will have pxHandler assigned as its interrupt
* handler. Peripheral IDs are defined in the xparameters.h header file, which
* is itself part of the BSP project. For example, in the official demo
* application for this port, xparameters.h defines the following IDs for the
* handler. Peripheral IDs are defined in the xparameters.h header file, which
* is itself part of the BSP project. For example, in the official demo
* application for this port, xparameters.h defines the following IDs for the
* four possible interrupt sources:
*
* XPAR_INTC_0_UARTLITE_1_VEC_ID - for the UARTlite peripheral.
@ -241,7 +245,7 @@ typedef struct PORT_REGISTER_DUMP
*
*
* pxHandler:
*
*
* A pointer to the interrupt handler function itself. This must be a void
* function that takes a (void *) parameter.
*
@ -253,23 +257,23 @@ typedef struct PORT_REGISTER_DUMP
* the peripheral instance variable, so it can be accessed from inside the
* handler function.
*
*
*
* pdPASS is returned if the function executes successfully. Any other value
* being returned indicates that the function did not execute correctly.
*/
portBASE_TYPE xPortInstallInterruptHandler( unsigned char ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef );
BaseType_t xPortInstallInterruptHandler( uint8_t ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef );
/*
* Enables the interrupt, within the interrupt controller, for the peripheral
* Enables the interrupt, within the interrupt controller, for the peripheral
* specified by the ucInterruptID parameter.
*
* ucInterruptID:
*
*
* The ID of the peripheral that will have its interrupt enabled in the
* interrupt controller. Peripheral IDs are defined in the xparameters.h header
* file, which is itself part of the BSP project. For example, in the official
* demo application for this port, xparameters.h defines the following IDs for
* interrupt controller. Peripheral IDs are defined in the xparameters.h header
* file, which is itself part of the BSP project. For example, in the official
* demo application for this port, xparameters.h defines the following IDs for
* the four possible interrupt sources:
*
* XPAR_INTC_0_UARTLITE_1_VEC_ID - for the UARTlite peripheral.
@ -278,18 +282,18 @@ portBASE_TYPE xPortInstallInterruptHandler( unsigned char ucInterruptID, XInterr
* XPAR_INTC_0_GPIO_1_VEC_ID - for the button inputs.
*
*/
void vPortEnableInterrupt( unsigned char ucInterruptID );
void vPortEnableInterrupt( uint8_t ucInterruptID );
/*
* Disables the interrupt, within the interrupt controller, for the peripheral
* Disables the interrupt, within the interrupt controller, for the peripheral
* specified by the ucInterruptID parameter.
*
* ucInterruptID:
*
*
* The ID of the peripheral that will have its interrupt disabled in the
* interrupt controller. Peripheral IDs are defined in the xparameters.h header
* file, which is itself part of the BSP project. For example, in the official
* demo application for this port, xparameters.h defines the following IDs for
* interrupt controller. Peripheral IDs are defined in the xparameters.h header
* file, which is itself part of the BSP project. For example, in the official
* demo application for this port, xparameters.h defines the following IDs for
* the four possible interrupt sources:
*
* XPAR_INTC_0_UARTLITE_1_VEC_ID - for the UARTlite peripheral.
@ -298,49 +302,49 @@ void vPortEnableInterrupt( unsigned char ucInterruptID );
* XPAR_INTC_0_GPIO_1_VEC_ID - for the button inputs.
*
*/
void vPortDisableInterrupt( unsigned char ucInterruptID );
void vPortDisableInterrupt( uint8_t ucInterruptID );
/*
* This is an application defined callback function used to install the tick
* interrupt handler. It is provided as an application callback because the
* kernel will run on lots of different MicroBlaze and FPGA configurations - not
* all of which will have the same timer peripherals defined or available. This
* example uses the AXI Timer 0. If that is available on your hardware platform
* then this example callback implementation should not require modification.
* The name of the interrupt handler that should be installed is vPortTickISR(),
* interrupt handler. It is provided as an application callback because the
* kernel will run on lots of different MicroBlaze and FPGA configurations - not
* all of which will have the same timer peripherals defined or available. This
* example uses the AXI Timer 0. If that is available on your hardware platform
* then this example callback implementation should not require modification.
* The name of the interrupt handler that should be installed is vPortTickISR(),
* which the function below declares as an extern.
*/
*/
void vApplicationSetupTimerInterrupt( void );
/*
/*
* This is an application defined callback function used to clear whichever
* interrupt was installed by the the vApplicationSetupTimerInterrupt() callback
* function - in this case the interrupt generated by the AXI timer. It is
* provided as an application callback because the kernel will run on lots of
* different MicroBlaze and FPGA configurations - not all of which will have the
* same timer peripherals defined or available. This example uses the AXI Timer 0.
* If that is available on your hardware platform then this example callback
* function - in this case the interrupt generated by the AXI timer. It is
* provided as an application callback because the kernel will run on lots of
* different MicroBlaze and FPGA configurations - not all of which will have the
* same timer peripherals defined or available. This example uses the AXI Timer 0.
* If that is available on your hardware platform then this example callback
* implementation should not require modification provided the example definition
* of vApplicationSetupTimerInterrupt() is also not modified.
* of vApplicationSetupTimerInterrupt() is also not modified.
*/
void vApplicationClearTimerInterrupt( void );
/*
* vPortExceptionsInstallHandlers() is only available when the MicroBlaze
* is configured to include exception functionality, and
* is configured to include exception functionality, and
* configINSTALL_EXCEPTION_HANDLERS is set to 1 in FreeRTOSConfig.h.
*
* vPortExceptionsInstallHandlers() installs the FreeRTOS exception handler
* for every possible exception cause.
* for every possible exception cause.
*
* vPortExceptionsInstallHandlers() can be called explicitly from application
* code. After that is done, the default FreeRTOS exception handler that will
* have been installed can be replaced for any specific exception cause by using
* have been installed can be replaced for any specific exception cause by using
* the standard Xilinx library function microblaze_register_exception_handler().
*
* If vPortExceptionsInstallHandlers() is not called explicitly by the
* If vPortExceptionsInstallHandlers() is not called explicitly by the
* application, it will be called automatically by the kernel the first time
* xPortInstallInterruptHandler() is called. At that time, any exception
* xPortInstallInterruptHandler() is called. At that time, any exception
* handlers that may have already been installed will be replaced.
*
* See the description of vApplicationExceptionRegisterDump() for information
@ -349,16 +353,16 @@ void vApplicationClearTimerInterrupt( void );
void vPortExceptionsInstallHandlers( void );
/*
* The FreeRTOS exception handler fills an xPortRegisterDump structure (defined
* in portmacro.h) with the MicroBlaze context, as it was at the time the
* The FreeRTOS exception handler fills an xPortRegisterDump structure (defined
* in portmacro.h) with the MicroBlaze context, as it was at the time the
* exception occurred. The exception handler then calls
* vApplicationExceptionRegisterDump(), passing in the completed
* xPortRegisterDump structure as its parameter.
*
* The FreeRTOS kernel provides its own implementation of
* vApplicationExceptionRegisterDump(), but the kernel provided implementation
* is declared as being 'weak'. The weak definition allows the application
* writer to provide their own implementation, should they wish to use the
* vApplicationExceptionRegisterDump(), but the kernel provided implementation
* is declared as being 'weak'. The weak definition allows the application
* writer to provide their own implementation, should they wish to use the
* register dump information. For example, an implementation could be provided
* that wrote the register dump data to a display, or a UART port.
*/

18
FreeRTOS/Source/portable/GCC/NiosII/port.c
View file

@ -81,7 +81,7 @@
#include "task.h"
/* Interrupts are enabled. */
#define portINITIAL_ESTATUS ( portSTACK_TYPE ) 0x01
#define portINITIAL_ESTATUS ( StackType_t ) 0x01
/*-----------------------------------------------------------*/
@ -97,7 +97,7 @@ void vPortSysTickHandler( void * context, alt_u32 id );
/*-----------------------------------------------------------*/
static void prvReadGp( unsigned long *ulValue )
static void prvReadGp( uint32_t *ulValue )
{
asm( "stw gp, (%0)" :: "r"(ulValue) );
}
@ -106,10 +106,10 @@ static void prvReadGp( unsigned long *ulValue )
/*
* See header file for description.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
portSTACK_TYPE *pxFramePointer = pxTopOfStack - 1;
portSTACK_TYPE xGlobalPointer;
StackType_t *pxFramePointer = pxTopOfStack - 1;
StackType_t xGlobalPointer;
prvReadGp( &xGlobalPointer );
@ -117,7 +117,7 @@ portSTACK_TYPE xGlobalPointer;
*pxTopOfStack = 0xdeadbeef;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) pxFramePointer;
*pxTopOfStack = ( StackType_t ) pxFramePointer;
pxTopOfStack--;
*pxTopOfStack = xGlobalPointer;
@ -125,7 +125,7 @@ portSTACK_TYPE xGlobalPointer;
/* Space for R23 to R16. */
pxTopOfStack -= 9;
*pxTopOfStack = ( portSTACK_TYPE ) pxCode;
*pxTopOfStack = ( StackType_t ) pxCode;
pxTopOfStack--;
*pxTopOfStack = portINITIAL_ESTATUS;
@ -133,7 +133,7 @@ portSTACK_TYPE xGlobalPointer;
/* Space for R15 to R5. */
pxTopOfStack -= 12;
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters;
*pxTopOfStack = ( StackType_t ) pvParameters;
/* Space for R3 to R1, muldiv and RA. */
pxTopOfStack -= 5;
@ -145,7 +145,7 @@ portSTACK_TYPE xGlobalPointer;
/*
* See header file for description.
*/
portBASE_TYPE xPortStartScheduler( void )
BaseType_t xPortStartScheduler( void )
{
/* Start the timer that generates the tick ISR. Interrupts are disabled
here already. */

24
FreeRTOS/Source/portable/GCC/NiosII/portmacro.h
View file

@ -1,5 +1,5 @@
/*
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@ -73,7 +73,7 @@ extern "C" {
#include "sys/alt_irq.h"
/*-----------------------------------------------------------
* Port specific definitions.
* Port specific definitions.
*
* The settings in this file configure FreeRTOS correctly for the
* given hardware and compiler.
@ -88,25 +88,29 @@ extern "C" {
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE unsigned portLONG
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif
/*-----------------------------------------------------------*/
/*-----------------------------------------------------------*/
/* Architecture specifics. */
#define portSTACK_GROWTH ( -1 )
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 4
#define portNOP() asm volatile ( "NOP" )
#define portCRITICAL_NESTING_IN_TCB 1
/*-----------------------------------------------------------*/
/*-----------------------------------------------------------*/
extern void vTaskSwitchContext( void );
#define portYIELD() asm volatile ( "trap" );

26
FreeRTOS/Source/portable/GCC/PPC405_Xilinx/port.c
View file

@ -134,7 +134,7 @@ static XIntc xInterruptController;
*
* See the header file portable.h.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
/* Place a known value at the bottom of the stack for debugging. */
*pxTopOfStack = 0xDEADBEEF;
@ -144,15 +144,15 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
pxTopOfStack -= 20; /* Previous backchain and LR, R31 to R4 inclusive. */
/* Parameters in R13. */
*pxTopOfStack = ( portSTACK_TYPE ) &_SDA_BASE_; /* address of the first small data area */
*pxTopOfStack = ( StackType_t ) &_SDA_BASE_; /* address of the first small data area */
pxTopOfStack -= 10;
/* Parameters in R3. */
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters;
*pxTopOfStack = ( StackType_t ) pvParameters;
pxTopOfStack--;
/* Parameters in R2. */
*pxTopOfStack = ( portSTACK_TYPE ) &_SDA2_BASE_; /* address of the second small data area */
*pxTopOfStack = ( StackType_t ) &_SDA2_BASE_; /* address of the second small data area */
pxTopOfStack--;
/* R1 is the stack pointer so is omitted. */
@ -167,13 +167,13 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
pxTopOfStack--;
*pxTopOfStack = 0x00000000UL; /* CTR. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) vPortEndScheduler; /* LR. */
*pxTopOfStack = ( StackType_t ) vPortEndScheduler; /* LR. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* SRR0. */
*pxTopOfStack = ( StackType_t ) pxCode; /* SRR0. */
pxTopOfStack--;
*pxTopOfStack = portINITIAL_MSR;/* SRR1. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) vPortEndScheduler;/* Next LR. */
*pxTopOfStack = ( StackType_t ) vPortEndScheduler;/* Next LR. */
pxTopOfStack--;
*pxTopOfStack = 0x00000000UL;/* Backchain. */
@ -181,7 +181,7 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortStartScheduler( void )
BaseType_t xPortStartScheduler( void )
{
prvSetupTimerInterrupt();
XExc_RegisterHandler( XEXC_ID_SYSTEM_CALL, ( XExceptionHandler ) vPortYield, ( void * ) 0 );
@ -204,7 +204,7 @@ void vPortEndScheduler( void )
*/
static void prvSetupTimerInterrupt( void )
{
const unsigned long ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );
const uint32_t ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );
XTime_PITClearInterrupt();
XTime_FITClearInterrupt();
@ -222,8 +222,8 @@ const unsigned long ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) -
void vPortISRHandler( void *pvNullDoNotUse )
{
unsigned long ulInterruptStatus, ulInterruptMask = 1UL;
portBASE_TYPE xInterruptNumber;
uint32_t ulInterruptStatus, ulInterruptMask = 1UL;
BaseType_t xInterruptNumber;
XIntc_Config *pxInterruptController;
XIntc_VectorTableEntry *pxTable;
@ -281,9 +281,9 @@ extern void vPortISRWrapper( void );
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortInstallInterruptHandler( unsigned char ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef )
BaseType_t xPortInstallInterruptHandler( uint8_t ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef )
{
portBASE_TYPE xReturn = pdFAIL;
BaseType_t xReturn = pdFAIL;
/* This function is defined here so the scope of xInterruptController can
remain within this file. */

26
FreeRTOS/Source/portable/GCC/PPC405_Xilinx/portmacro.h
View file

@ -1,5 +1,5 @@
/*
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@ -73,7 +73,7 @@ extern "C" {
#endif
/*-----------------------------------------------------------
* Port specific definitions.
* Port specific definitions.
*
* The settings in this file configure FreeRTOS correctly for the
* given hardware and compiler.
@ -88,17 +88,21 @@ extern "C" {
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE unsigned portLONG
#define portBASE_TYPE portLONG
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif
/*-----------------------------------------------------------*/
/*-----------------------------------------------------------*/
/* This port uses the critical nesting count from the TCB rather than
maintaining a separate value and then saving this value in the task stack. */
@ -128,7 +132,7 @@ void vPortYield( void );
/* Hardware specifics. */
#define portBYTE_ALIGNMENT 8
#define portSTACK_GROWTH ( -1 )
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portNOP() asm volatile ( "NOP" )
/* There are 32 * 32bit floating point regieters, plus the FPSCR to save. */
@ -142,7 +146,7 @@ void vPortYield( void );
/* Port specific interrupt handling functions. */
void vPortSetupInterruptController( void );
portBASE_TYPE xPortInstallInterruptHandler( unsigned portCHAR ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef );
BaseType_t xPortInstallInterruptHandler( uint8_t ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef );
#ifdef __cplusplus
}

26
FreeRTOS/Source/portable/GCC/PPC440_Xilinx/port.c
View file

@ -134,7 +134,7 @@ static XIntc xInterruptController;
*
* See the header file portable.h.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
/* Place a known value at the bottom of the stack for debugging. */
*pxTopOfStack = 0xDEADBEEF;
@ -144,15 +144,15 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
pxTopOfStack -= 20; /* Previous backchain and LR, R31 to R4 inclusive. */
/* Parameters in R13. */
*pxTopOfStack = ( portSTACK_TYPE ) &_SDA_BASE_; /* address of the first small data area */
*pxTopOfStack = ( StackType_t ) &_SDA_BASE_; /* address of the first small data area */
pxTopOfStack -= 10;
/* Parameters in R3. */
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters;
*pxTopOfStack = ( StackType_t ) pvParameters;
pxTopOfStack--;
/* Parameters in R2. */
*pxTopOfStack = ( portSTACK_TYPE ) &_SDA2_BASE_; /* address of the second small data area */
*pxTopOfStack = ( StackType_t ) &_SDA2_BASE_; /* address of the second small data area */
pxTopOfStack--;
/* R1 is the stack pointer so is omitted. */
@ -167,13 +167,13 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
pxTopOfStack--;
*pxTopOfStack = 0x00000000UL; /* CTR. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) vPortEndScheduler; /* LR. */
*pxTopOfStack = ( StackType_t ) vPortEndScheduler; /* LR. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* SRR0. */
*pxTopOfStack = ( StackType_t ) pxCode; /* SRR0. */
pxTopOfStack--;
*pxTopOfStack = portINITIAL_MSR;/* SRR1. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) vPortEndScheduler;/* Next LR. */
*pxTopOfStack = ( StackType_t ) vPortEndScheduler;/* Next LR. */
pxTopOfStack--;
*pxTopOfStack = 0x00000000UL;/* Backchain. */
@ -181,7 +181,7 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortStartScheduler( void )
BaseType_t xPortStartScheduler( void )
{
prvSetupTimerInterrupt();
XExc_RegisterHandler( XEXC_ID_SYSTEM_CALL, ( XExceptionHandler ) vPortYield, ( void * ) 0 );
@ -204,7 +204,7 @@ void vPortEndScheduler( void )
*/
static void prvSetupTimerInterrupt( void )
{
const unsigned long ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );
const uint32_t ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );
XTime_DECClearInterrupt();
XTime_FITClearInterrupt();
@ -222,8 +222,8 @@ const unsigned long ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) -
void vPortISRHandler( void *pvNullDoNotUse )
{
unsigned long ulInterruptStatus, ulInterruptMask = 1UL;
portBASE_TYPE xInterruptNumber;
uint32_t ulInterruptStatus, ulInterruptMask = 1UL;
BaseType_t xInterruptNumber;
XIntc_Config *pxInterruptController;
XIntc_VectorTableEntry *pxTable;
@ -281,9 +281,9 @@ extern void vPortISRWrapper( void );
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortInstallInterruptHandler( unsigned char ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef )
BaseType_t xPortInstallInterruptHandler( uint8_t ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef )
{
portBASE_TYPE xReturn = pdFAIL;
BaseType_t xReturn = pdFAIL;
/* This function is defined here so the scope of xInterruptController can
remain within this file. */

26
FreeRTOS/Source/portable/GCC/PPC440_Xilinx/portmacro.h
View file

@ -1,5 +1,5 @@
/*
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@ -73,7 +73,7 @@ extern "C" {
#endif
/*-----------------------------------------------------------
* Port specific definitions.
* Port specific definitions.
*
* The settings in this file configure FreeRTOS correctly for the
* given hardware and compiler.
@ -88,17 +88,21 @@ extern "C" {
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE unsigned portLONG
#define portBASE_TYPE portLONG
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif
/*-----------------------------------------------------------*/
/*-----------------------------------------------------------*/
/* This port uses the critical nesting count from the TCB rather than
maintaining a separate value and then saving this value in the task stack. */
@ -128,7 +132,7 @@ void vPortYield( void );
/* Hardware specifics. */
#define portBYTE_ALIGNMENT 8
#define portSTACK_GROWTH ( -1 )
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portNOP() asm volatile ( "NOP" )
/* There are 32 * 32bit floating point regieters, plus the FPSCR to save. */
@ -142,7 +146,7 @@ void vPortYield( void );
/* Port specific interrupt handling functions. */
void vPortSetupInterruptController( void );
portBASE_TYPE xPortInstallInterruptHandler( unsigned portCHAR ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef );
BaseType_t xPortInstallInterruptHandler( uint8_t ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef );
#ifdef __cplusplus
}

42
FreeRTOS/Source/portable/GCC/RX100/port.c
View file

@ -84,7 +84,7 @@
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
PSW is set with U and I set, and PM and IPL clear. */
#define portINITIAL_PSW ( ( portSTACK_TYPE ) 0x00030000 )
#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
/* The peripheral clock is divided by this value before being supplying the
CMT. */
@ -153,7 +153,7 @@ static void prvSetupTimerInterrupt( void );
* instruction.
*/
#if configUSE_TICKLESS_IDLE == 1
static void prvSleep( portTickType xExpectedIdleTime );
static void prvSleep( TickType_t xExpectedIdleTime );
#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
@ -162,7 +162,7 @@ static void prvSetupTimerInterrupt( void );
extern void *pxCurrentTCB;
/* Calculate how many clock increments make up a single tick period. */
static const unsigned long ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );
static const uint32_t ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );
#if configUSE_TICKLESS_IDLE == 1
@ -170,7 +170,7 @@ static const unsigned long ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_H
basically how far into the future an interrupt can be generated. Set
during initialisation. This is the maximum possible value that the
compare match register can hold divided by ulMatchValueForOneTick. */
static const portTickType xMaximumPossibleSuppressedTicks = USHRT_MAX / ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );
static const TickType_t xMaximumPossibleSuppressedTicks = USHRT_MAX / ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );
/* Flag set from the tick interrupt to allow the sleep processing to know if
sleep mode was exited because of a tick interrupt, or an interrupt
@ -183,7 +183,7 @@ static const unsigned long ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_H
compensate for the lost time. The large difference between the divided CMT
clock and the CPU clock means it is likely ulStoppedTimerCompensation will
equal zero - and be optimised away. */
static const unsigned long ulStoppedTimerCompensation = 100UL / ( configCPU_CLOCK_HZ / ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) );
static const uint32_t ulStoppedTimerCompensation = 100UL / ( configCPU_CLOCK_HZ / ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) );
#endif
@ -192,7 +192,7 @@ static const unsigned long ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_H
/*
* See header file for description.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
/* Offset to end up on 8 byte boundary. */
pxTopOfStack--;
@ -204,7 +204,7 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
pxTopOfStack--;
*pxTopOfStack = portINITIAL_PSW;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) pxCode;
*pxTopOfStack = ( StackType_t ) pxCode;
/* When debugging it can be useful if every register is set to a known
value. Otherwise code space can be saved by just setting the registers
@ -249,7 +249,7 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
}
#endif
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R1 */
*pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
pxTopOfStack--;
*pxTopOfStack = 0x12345678; /* Accumulator. */
pxTopOfStack--;
@ -259,7 +259,7 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortStartScheduler( void )
BaseType_t xPortStartScheduler( void )
{
/* Use pxCurrentTCB just so it does not get optimised away. */
if( pxCurrentTCB != NULL )
@ -446,13 +446,13 @@ void vPortTickISR( void )
/* If this is the first tick since exiting tickless mode then the CMT
compare match value needs resetting. */
CMT0.CMCOR = ( unsigned short ) ulMatchValueForOneTick;
CMT0.CMCOR = ( uint16_t ) ulMatchValueForOneTick;
}
#endif
}
/*-----------------------------------------------------------*/
unsigned long ulPortGetIPL( void )
uint32_t ulPortGetIPL( void )
{
__asm volatile
(
@ -466,7 +466,7 @@ unsigned long ulPortGetIPL( void )
}
/*-----------------------------------------------------------*/
void vPortSetIPL( unsigned long ulNewIPL )
void vPortSetIPL( uint32_t ulNewIPL )
{
__asm volatile
(
@ -497,7 +497,7 @@ static void prvSetupTimerInterrupt( void )
CMT0.CMCR.BIT.CMIE = 1;
/* Set the compare match value. */
CMT0.CMCOR = ( unsigned short ) ulMatchValueForOneTick;
CMT0.CMCOR = ( uint16_t ) ulMatchValueForOneTick;
/* Divide the PCLK. */
#if portCLOCK_DIVISOR == 512
@ -535,7 +535,7 @@ static void prvSetupTimerInterrupt( void )
#if configUSE_TICKLESS_IDLE == 1
static void prvSleep( portTickType xExpectedIdleTime )
static void prvSleep( TickType_t xExpectedIdleTime )
{
/* Allow the application to define some pre-sleep processing. */
configPRE_SLEEP_PROCESSING( xExpectedIdleTime );
@ -557,9 +557,9 @@ static void prvSetupTimerInterrupt( void )
#if configUSE_TICKLESS_IDLE == 1
void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )
void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
unsigned long ulMatchValue, ulCompleteTickPeriods, ulCurrentCount;
uint32_t ulMatchValue, ulCompleteTickPeriods, ulCurrentCount;
eSleepModeStatus eSleepAction;
/* THIS FUNCTION IS CALLED WITH THE SCHEDULER SUSPENDED. */
@ -642,8 +642,8 @@ static void prvSetupTimerInterrupt( void )
/* Adjust the match value to take into account that the current
time slice is already partially complete. */
ulMatchValue -= ( unsigned long ) CMT0.CMCNT;
CMT0.CMCOR = ( unsigned short ) ulMatchValue;
ulMatchValue -= ( uint32_t ) CMT0.CMCNT;
CMT0.CMCOR = ( uint16_t ) ulMatchValue;
/* Restart the CMT to count up to the new match value. */
CMT0.CMCNT = 0;
@ -663,7 +663,7 @@ static void prvSetupTimerInterrupt( void )
/* Nothing to do here. */
}
ulCurrentCount = ( unsigned long ) CMT0.CMCNT;
ulCurrentCount = ( uint32_t ) CMT0.CMCNT;
if( ulTickFlag != pdFALSE )
{
@ -673,7 +673,7 @@ static void prvSetupTimerInterrupt( void )
exited. Reset the match value with whatever remains of this
tick period. */
ulMatchValue = ulMatchValueForOneTick - ulCurrentCount;
CMT0.CMCOR = ( unsigned short ) ulMatchValue;
CMT0.CMCOR = ( uint16_t ) ulMatchValue;
/* The tick interrupt handler will already have pended the tick
processing in the kernel. As the pending tick will be
@ -693,7 +693,7 @@ static void prvSetupTimerInterrupt( void )
/* The match value is set to whatever fraction of a single tick
period remains. */
ulMatchValue = ulCurrentCount - ( ulCompleteTickPeriods * ulMatchValueForOneTick );
CMT0.CMCOR = ( unsigned short ) ulMatchValue;
CMT0.CMCOR = ( uint16_t ) ulMatchValue;
}
/* Restart the CMT so it runs up to the match value. The match value

40
FreeRTOS/Source/portable/GCC/RX100/portmacro.h
View file

@ -1,5 +1,5 @@
/*
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@ -88,22 +88,26 @@ portSTACK_TYPE and portBASE_TYPE. */
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE unsigned portLONG
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif
/*-----------------------------------------------------------*/
/* Hardware specifics. */
#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */
#define portSTACK_GROWTH -1
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portNOP() __asm volatile( "NOP" )
/* Save clobbered register, set ITU SWINR (at address 0x872E0), read the value
@ -120,14 +124,14 @@ register. */
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) { portYIELD(); }
/* These macros should not be called directly, but through the
taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
performed if configASSERT() is defined to ensure an assertion handler does not
inadvertently attempt to lower the IPL when the call to assert was triggered
because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
functions are those that end in FromISR. FreeRTOS maintains a separate
interrupt API to ensure API function and interrupt entry is as fast and as
/* These macros should not be called directly, but through the
taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
performed if configASSERT() is defined to ensure an assertion handler does not
inadvertently attempt to lower the IPL when the call to assert was triggered
because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
functions are those that end in FromISR. FreeRTOS maintains a separate
interrupt API to ensure API function and interrupt entry is as fast and as
simple as possible. */
#define portENABLE_INTERRUPTS() __asm volatile ( "MVTIPL #0" )
#ifdef configASSERT
@ -147,15 +151,15 @@ extern void vTaskExitCritical( void );
#define portEXIT_CRITICAL() vTaskExitCritical()
/* As this port allows interrupt nesting... */
unsigned long ulPortGetIPL( void ) __attribute__((naked));
void vPortSetIPL( unsigned long ulNewIPL ) __attribute__((naked));
uint32_t ulPortGetIPL( void ) __attribute__((naked));
void vPortSetIPL( uint32_t ulNewIPL ) __attribute__((naked));
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortGetIPL(); portDISABLE_INTERRUPTS()
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) vPortSetIPL( uxSavedInterruptStatus )
/* Tickless idle/low power functionality. */
#if configUSE_TICKLESS_IDLE == 1
#ifndef portSUPPRESS_TICKS_AND_SLEEP
extern void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime );
extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
#endif
#endif

16
FreeRTOS/Source/portable/GCC/RX600/port.c
View file

@ -81,8 +81,8 @@
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
PSW is set with U and I set, and PM and IPL clear. */
#define portINITIAL_PSW ( ( portSTACK_TYPE ) 0x00030000 )
#define portINITIAL_FPSW ( ( portSTACK_TYPE ) 0x00000100 )
#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
#define portINITIAL_FPSW ( ( StackType_t ) 0x00000100 )
/* These macros allow a critical section to be added around the call to
xTaskIncrementTick(), which is only ever called from interrupts at the kernel
@ -121,7 +121,7 @@ extern void *pxCurrentTCB;
/*
* See header file for description.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
/* R0 is not included as it is the stack pointer. */
@ -129,7 +129,7 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
pxTopOfStack--;
*pxTopOfStack = portINITIAL_PSW;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) pxCode;
*pxTopOfStack = ( StackType_t ) pxCode;
/* When debugging it can be useful if every register is set to a known
value. Otherwise code space can be saved by just setting the registers
@ -172,7 +172,7 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
}
#endif
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R1 */
*pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
pxTopOfStack--;
*pxTopOfStack = portINITIAL_FPSW;
pxTopOfStack--;
@ -184,7 +184,7 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortStartScheduler( void )
BaseType_t xPortStartScheduler( void )
{
extern void vApplicationSetupTimerInterrupt( void );
@ -366,7 +366,7 @@ void vTickISR( void )
}
/*-----------------------------------------------------------*/
unsigned long ulPortGetIPL( void )
uint32_t ulPortGetIPL( void )
{
__asm volatile
(
@ -380,7 +380,7 @@ unsigned long ulPortGetIPL( void )
}
/*-----------------------------------------------------------*/
void vPortSetIPL( unsigned long ulNewIPL )
void vPortSetIPL( uint32_t ulNewIPL )
{
__asm volatile
(

42
FreeRTOS/Source/portable/GCC/RX600/portmacro.h
View file

@ -1,5 +1,5 @@
/*
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@ -72,7 +72,7 @@ extern "C" {
#endif
/*-----------------------------------------------------------
* Port specific definitions.
* Port specific definitions.
*
* The settings in this file configure FreeRTOS correctly for the
* given hardware and compiler.
@ -88,27 +88,31 @@ portSTACK_TYPE and portBASE_TYPE. */
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE unsigned portLONG
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif
/*-----------------------------------------------------------*/
/* Hardware specifics. */
#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */
#define portSTACK_GROWTH -1
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portNOP() __asm volatile( "NOP" )
/* Yield equivalent to "*portITU_SWINTR = 0x01; ( void ) *portITU_SWINTR;"
where portITU_SWINTR is the location of the software interrupt register
(0x000872E0). Don't rely on the assembler to select a register, so instead
(0x000872E0). Don't rely on the assembler to select a register, so instead
save and restore clobbered registers manually. */
#define portYIELD() \
__asm volatile \
@ -122,14 +126,14 @@ save and restore clobbered registers manually. */
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) portYIELD()
/* These macros should not be called directly, but through the
taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
performed if configASSERT() is defined to ensure an assertion handler does not
inadvertently attempt to lower the IPL when the call to assert was triggered
because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
functions are those that end in FromISR. FreeRTOS maintains a separate
interrupt API to ensure API function and interrupt entry is as fast and as
/* These macros should not be called directly, but through the
taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
performed if configASSERT() is defined to ensure an assertion handler does not
inadvertently attempt to lower the IPL when the call to assert was triggered
because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
functions are those that end in FromISR. FreeRTOS maintains a separate
interrupt API to ensure API function and interrupt entry is as fast and as
simple as possible. */
#define portENABLE_INTERRUPTS() __asm volatile ( "MVTIPL #0" )
#ifdef configASSERT
@ -149,8 +153,8 @@ extern void vTaskExitCritical( void );
#define portEXIT_CRITICAL() vTaskExitCritical()
/* As this port allows interrupt nesting... */
unsigned long ulPortGetIPL( void ) __attribute__((naked));
void vPortSetIPL( unsigned long ulNewIPL ) __attribute__((naked));
uint32_t ulPortGetIPL( void ) __attribute__((naked));
void vPortSetIPL( uint32_t ulNewIPL ) __attribute__((naked));
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortGetIPL(); portDISABLE_INTERRUPTS()
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) vPortSetIPL( uxSavedInterruptStatus )

48
FreeRTOS/Source/portable/GCC/STR75x/port.c
View file

@ -77,12 +77,12 @@
#include "task.h"
/* Constants required to setup the initial stack. */
#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )
#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
/* Constants required to handle critical sections. */
#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
/* Prescale used on the timer clock when calculating the tick period. */
#define portPRESCALE 20
@ -101,9 +101,9 @@ static void prvSetupTimerInterrupt( void );
*
* See header file for description.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
portSTACK_TYPE *pxOriginalTOS;
StackType_t *pxOriginalTOS;
pxOriginalTOS = pxTopOfStack;
@ -117,45 +117,45 @@ portSTACK_TYPE *pxOriginalTOS;
/* First on the stack is the return address - which in this case is the
start of the task. The offset is added to make the return address appear
as it would within an IRQ ISR. */
*pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */
*pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
*pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
pxTopOfStack--;
/* When the task starts is will expect to find the function parameter in
R0. */
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
pxTopOfStack--;
/* The status register is set for system mode, with interrupts enabled. */
*pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
#ifdef THUMB_INTERWORK
{
@ -175,7 +175,7 @@ portSTACK_TYPE *pxOriginalTOS;
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortStartScheduler( void )
BaseType_t xPortStartScheduler( void )
{
extern void vPortISRStartFirstTask( void );

4
FreeRTOS/Source/portable/GCC/STR75x/portISR.c
View file

@ -78,9 +78,9 @@
#include "task.h"
/* Constants required to handle critical sections. */
#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
volatile unsigned long ulCriticalNesting = 9999UL;
volatile uint32_t ulCriticalNesting = 9999UL;
/*-----------------------------------------------------------*/

36
FreeRTOS/Source/portable/GCC/STR75x/portmacro.h
View file

@ -1,5 +1,5 @@
/*
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@ -87,31 +87,35 @@ extern "C" {
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE unsigned portLONG
#define portBASE_TYPE portLONG
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif
/*-----------------------------------------------------------*/
/*-----------------------------------------------------------*/
/* Hardware specifics. */
#define portSTACK_GROWTH ( -1 )
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8
#define portYIELD() asm volatile ( "SWI 0" )
#define portNOP() asm volatile ( "NOP" )
/*-----------------------------------------------------------*/
/*-----------------------------------------------------------*/
/* Critical section handling. */
/*
* The interrupt management utilities can only be called from ARM mode. When
* THUMB_INTERWORK is defined the utilities are defined as functions in
* portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not
* THUMB_INTERWORK is defined the utilities are defined as functions in
* portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not
* defined then the utilities are defined as macros here - as per other ports.
*/
@ -122,7 +126,7 @@ extern "C" {
#define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb()
#define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb()
#else
#define portDISABLE_INTERRUPTS() \
@ -132,7 +136,7 @@ extern "C" {
"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ \
"MSR CPSR, R0 \n\t" /* Write back modified value. */ \
"LDMIA SP!, {R0} " ) /* Pop R0. */
#define portENABLE_INTERRUPTS() \
asm volatile ( \
"STMDB SP!, {R0} \n\t" /* Push R0. */ \
@ -148,7 +152,7 @@ extern void vPortExitCritical( void );
#define portENTER_CRITICAL() vPortEnterCritical();
#define portEXIT_CRITICAL() vPortExitCritical();
/*-----------------------------------------------------------*/
/*-----------------------------------------------------------*/
/* Task utilities. */
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
@ -160,7 +164,7 @@ extern void vTaskSwitchContext( void ); \
vTaskSwitchContext(); \
} \
}
/*-----------------------------------------------------------*/
/*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )

64
FreeRTOS/Source/portable/GCC/TriCore_1782/port.c
View file

@ -126,17 +126,17 @@ static void prvInterruptYield( int iTrapIdentification );
/*-----------------------------------------------------------*/
/* This reference is required by the save/restore context macros. */
extern volatile unsigned long *pxCurrentTCB;
extern volatile uint32_t *pxCurrentTCB;
/* Precalculate the compare match value at compile time. */
static const unsigned long ulCompareMatchValue = ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ );
static const uint32_t ulCompareMatchValue = ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ );
/*-----------------------------------------------------------*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
unsigned long *pulUpperCSA = NULL;
unsigned long *pulLowerCSA = NULL;
uint32_t *pulUpperCSA = NULL;
uint32_t *pulLowerCSA = NULL;
/* 16 Address Registers (4 Address registers are global), 16 Data
Registers, and 3 System Registers.
@ -189,24 +189,24 @@ unsigned long *pulLowerCSA = NULL;
portEXIT_CRITICAL();
/* Clear the upper CSA. */
memset( pulUpperCSA, 0, portNUM_WORDS_IN_CSA * sizeof( unsigned long ) );
memset( pulUpperCSA, 0, portNUM_WORDS_IN_CSA * sizeof( uint32_t ) );
/* Upper Context. */
pulUpperCSA[ 2 ] = ( unsigned long )pxTopOfStack; /* A10; Stack Return aka Stack Pointer */
pulUpperCSA[ 2 ] = ( uint32_t )pxTopOfStack; /* A10; Stack Return aka Stack Pointer */
pulUpperCSA[ 1 ] = portSYSTEM_PROGRAM_STATUS_WORD; /* PSW */
/* Clear the lower CSA. */
memset( pulLowerCSA, 0, portNUM_WORDS_IN_CSA * sizeof( unsigned long ) );
memset( pulLowerCSA, 0, portNUM_WORDS_IN_CSA * sizeof( uint32_t ) );
/* Lower Context. */
pulLowerCSA[ 8 ] = ( unsigned long ) pvParameters; /* A4; Address Type Parameter Register */
pulLowerCSA[ 1 ] = ( unsigned long ) pxCode; /* A11; Return Address aka RA */
pulLowerCSA[ 8 ] = ( uint32_t ) pvParameters; /* A4; Address Type Parameter Register */
pulLowerCSA[ 1 ] = ( uint32_t ) pxCode; /* A11; Return Address aka RA */
/* PCXI pointing to the Upper context. */
pulLowerCSA[ 0 ] = ( portINITIAL_PCXI_UPPER_CONTEXT_WORD | ( unsigned long ) portADDRESS_TO_CSA( pulUpperCSA ) );
pulLowerCSA[ 0 ] = ( portINITIAL_PCXI_UPPER_CONTEXT_WORD | ( uint32_t ) portADDRESS_TO_CSA( pulUpperCSA ) );
/* Save the link to the CSA in the top of stack. */
pxTopOfStack = (unsigned long * ) portADDRESS_TO_CSA( pulLowerCSA );
pxTopOfStack = (uint32_t * ) portADDRESS_TO_CSA( pulLowerCSA );
/* DSync to ensure that buffering is not a problem. */
_dsync();
@ -215,12 +215,12 @@ unsigned long *pulLowerCSA = NULL;
}
/*-----------------------------------------------------------*/
long xPortStartScheduler( void )
int32_t xPortStartScheduler( void )
{
extern void vTrapInstallHandlers( void );
unsigned long ulMFCR = 0UL;
unsigned long *pulUpperCSA = NULL;
unsigned long *pulLowerCSA = NULL;
uint32_t ulMFCR = 0UL;
uint32_t *pulUpperCSA = NULL;
uint32_t *pulLowerCSA = NULL;
/* Interrupts at or below configMAX_SYSCALL_INTERRUPT_PRIORITY are disable
when this function is called. */
@ -322,11 +322,11 @@ static void prvSetupTimerInterrupt( void )
static void prvSystemTickHandler( int iArg )
{
unsigned long ulSavedInterruptMask;
unsigned long *pxUpperCSA = NULL;
unsigned long xUpperCSA = 0UL;
extern volatile unsigned long *pxCurrentTCB;
long lYieldRequired;
uint32_t ulSavedInterruptMask;
uint32_t *pxUpperCSA = NULL;
uint32_t xUpperCSA = 0UL;
extern volatile uint32_t *pxCurrentTCB;
int32_t lYieldRequired;
/* Just to avoid compiler warnings about unused parameters. */
( void ) iArg;
@ -413,10 +413,10 @@ long lYieldRequired;
* than they can be freed assuming that tasks are being spawned and
* deleted frequently.
*/
void vPortReclaimCSA( unsigned long *pxTCB )
void vPortReclaimCSA( uint32_t *pxTCB )
{
unsigned long pxHeadCSA, pxTailCSA, pxFreeCSA;
unsigned long *pulNextCSA;
uint32_t pxHeadCSA, pxTailCSA, pxFreeCSA;
uint32_t *pulNextCSA;
/* A pointer to the first CSA in the list of CSAs consumed by the task is
stored in the first element of the tasks TCB structure (where the stack
@ -476,9 +476,9 @@ void vPortEndScheduler( void )
static void prvTrapYield( int iTrapIdentification )
{
unsigned long *pxUpperCSA = NULL;
unsigned long xUpperCSA = 0UL;
extern volatile unsigned long *pxCurrentTCB;
uint32_t *pxUpperCSA = NULL;
uint32_t xUpperCSA = 0UL;
extern volatile uint32_t *pxCurrentTCB;
switch( iTrapIdentification )
{
@ -523,9 +523,9 @@ extern volatile unsigned long *pxCurrentTCB;
static void prvInterruptYield( int iId )
{
unsigned long *pxUpperCSA = NULL;
unsigned long xUpperCSA = 0UL;
extern volatile unsigned long *pxCurrentTCB;
uint32_t *pxUpperCSA = NULL;
uint32_t xUpperCSA = 0UL;
extern volatile uint32_t *pxCurrentTCB;
/* Just to remove compiler warnings. */
( void ) iId;
@ -561,9 +561,9 @@ extern volatile unsigned long *pxCurrentTCB;
}
/*-----------------------------------------------------------*/
unsigned long uxPortSetInterruptMaskFromISR( void )
uint32_t uxPortSetInterruptMaskFromISR( void )
{
unsigned long uxReturn = 0UL;
uint32_t uxReturn = 0UL;
_disable();
uxReturn = _mfcr( $ICR );

36
FreeRTOS/Source/portable/GCC/TriCore_1782/portmacro.h
View file

@ -1,5 +1,5 @@
/*
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@ -90,21 +90,25 @@ extern "C" {
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE unsigned long
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffffUL
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif
/*---------------------------------------------------------------------------*/
/* Architecture specifics. */
#define portSTACK_GROWTH ( -1 )
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 4
#define portNOP() __asm volatile( " nop " )
#define portCRITICAL_NESTING_IN_TCB 1
@ -113,7 +117,7 @@ extern "C" {
/*---------------------------------------------------------------------------*/
typedef struct MPU_SETTINGS { unsigned long ulNotUsed; } xMPU_SETTINGS;
typedef struct MPU_SETTINGS { uint32_t ulNotUsed; } xMPU_SETTINGS;
/* Define away the instruction from the Restore Context Macro. */
#define portPRIVILEGE_BIT 0x0UL
@ -127,8 +131,8 @@ extern void vTaskExitCritical( void );
/*---------------------------------------------------------------------------*/
/* CSA Manipulation. */
#define portCSA_TO_ADDRESS( pCSA ) ( ( unsigned long * )( ( ( ( pCSA ) & 0x000F0000 ) << 12 ) | ( ( ( pCSA ) & 0x0000FFFF ) << 6 ) ) )
#define portADDRESS_TO_CSA( pAddress ) ( ( unsigned long )( ( ( ( (unsigned long)( pAddress ) ) & 0xF0000000 ) >> 12 ) | ( ( ( unsigned long )( pAddress ) & 0x003FFFC0 ) >> 6 ) ) )
#define portCSA_TO_ADDRESS( pCSA ) ( ( uint32_t * )( ( ( ( pCSA ) & 0x000F0000 ) << 12 ) | ( ( ( pCSA ) & 0x0000FFFF ) << 6 ) ) )
#define portADDRESS_TO_CSA( pAddress ) ( ( uint32_t )( ( ( ( (uint32_t)( pAddress ) ) & 0xF0000000 ) >> 12 ) | ( ( ( uint32_t )( pAddress ) & 0x003FFFC0 ) >> 6 ) ) )
/*---------------------------------------------------------------------------*/
#define portYIELD() _syscall( 0 )
@ -141,7 +145,7 @@ extern void vTaskExitCritical( void );
/* Set ICR.CCPN to configMAX_SYSCALL_INTERRUPT_PRIORITY. */
#define portDISABLE_INTERRUPTS() { \
unsigned long ulICR; \
uint32_t ulICR; \
_disable(); \
ulICR = _mfcr( $ICR ); /* Get current ICR value. */ \
ulICR &= ~portCCPN_MASK; /* Clear down mask bits. */ \
@ -153,7 +157,7 @@ extern void vTaskExitCritical( void );
/* Clear ICR.CCPN to allow all interrupt priorities. */
#define portENABLE_INTERRUPTS() { \
unsigned long ulICR; \
uint32_t ulICR; \
_disable(); \
ulICR = _mfcr( $ICR ); /* Get current ICR value. */ \
ulICR &= ~portCCPN_MASK; /* Clear down mask bits. */ \
@ -164,7 +168,7 @@ extern void vTaskExitCritical( void );
/* Set ICR.CCPN to uxSavedMaskValue. */
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedMaskValue ) { \
unsigned long ulICR; \
uint32_t ulICR; \
_disable(); \
ulICR = _mfcr( $ICR ); /* Get current ICR value. */ \
ulICR &= ~portCCPN_MASK; /* Clear down mask bits. */ \
@ -176,7 +180,7 @@ extern void vTaskExitCritical( void );
/* Set ICR.CCPN to configMAX_SYSCALL_INTERRUPT_PRIORITY */
extern unsigned long uxPortSetInterruptMaskFromISR( void );
extern uint32_t uxPortSetInterruptMaskFromISR( void );
#define portSET_INTERRUPT_MASK_FROM_ISR() uxPortSetInterruptMaskFromISR()
/* Pend a priority 1 interrupt, which will take care of the context switch. */
@ -193,8 +197,8 @@ extern unsigned long uxPortSetInterruptMaskFromISR( void );
* Port specific clean up macro required to free the CSAs that were consumed by
* a task that has since been deleted.
*/
void vPortReclaimCSA( unsigned long *pxTCB );
#define portCLEAN_UP_TCB( pxTCB ) vPortReclaimCSA( ( unsigned long * ) ( pxTCB ) )
void vPortReclaimCSA( uint32_t *pxTCB );
#define portCLEAN_UP_TCB( pxTCB ) vPortReclaimCSA( ( uint32_t * ) ( pxTCB ) )
#ifdef __cplusplus
}

2
FreeRTOS/Source/portable/GCC/TriCore_1782/porttrap.c
View file

@ -75,7 +75,7 @@
/*
* This reference is required by the Save/Restore Context Macros.
*/
extern volatile unsigned long *pxCurrentTCB;
extern volatile uint32_t *pxCurrentTCB;
/*-----------------------------------------------------------*/
/*