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Richard Barry 2008-03-25 21:09:14 +00:00
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633
20080325/Source/portable/MPLAB/PIC18F/port.c Normal file
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/*
FreeRTOS.org V4.7.2 - Copyright (C) 2003-2008 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
Please ensure to read the configuration and relevant port sections of the
online documentation.
+++ http://www.FreeRTOS.org +++
Documentation, latest information, license and contact details.
+++ http://www.SafeRTOS.com +++
A version that is certified for use in safety critical systems.
+++ http://www.OpenRTOS.com +++
Commercial support, development, porting, licensing and training services.
***************************************************************************
*/
/*
Changes between V1.2.4 and V1.2.5
+ Introduced portGLOBAL_INTERRUPT_FLAG definition to test the global
interrupt flag setting. Using the two bits defined within
portINITAL_INTERRUPT_STATE was causing the w register to get clobbered
before the test was performed.
Changes from V1.2.5
+ Set the interrupt vector address to 0x08. Previously it was at the
incorrect address for compatibility mode of 0x18.
Changes from V2.1.1
+ PCLATU and PCLATH are now saved as part of the context. This allows
function pointers to be used within tasks. Thanks to Javier Espeche
for the enhancement.
Changes from V2.3.1
+ TABLAT is now saved as part of the task context.
Changes from V3.2.0
+ TBLPTRU is now initialised to zero as the MPLAB compiler expects this
value and does not write to the register.
*/
/* Scheduler include files. */
#include "FreeRTOS.h"
#include "task.h"
/* MPLAB library include file. */
#include "timers.h"
/*-----------------------------------------------------------
* Implementation of functions defined in portable.h for the PIC port.
*----------------------------------------------------------*/
/* Hardware setup for tick. */
#define portTIMER_FOSC_SCALE ( ( unsigned portLONG ) 4 )
/* Initial interrupt enable state for newly created tasks. This value is
copied into INTCON when a task switches in for the first time. */
#define portINITAL_INTERRUPT_STATE 0xc0
/* Just the bit within INTCON for the global interrupt flag. */
#define portGLOBAL_INTERRUPT_FLAG 0x80
/* Constant used for context switch macro when we require the interrupt
enable state to be unchanged when the interrupted task is switched back in. */
#define portINTERRUPTS_UNCHANGED 0x00
/* Some memory areas get saved as part of the task context. These memory
area's get used by the compiler for temporary storage, especially when
performing mathematical operations, or when using 32bit data types. This
constant defines the size of memory area which must be saved. */
#define portCOMPILER_MANAGED_MEMORY_SIZE ( ( unsigned portCHAR ) 0x13 )
/* We require the address of the pxCurrentTCB variable, but don't want to know
any details of its type. */
typedef void tskTCB;
extern volatile tskTCB * volatile pxCurrentTCB;
/* IO port constants. */
#define portBIT_SET ( ( unsigned portCHAR ) 1 )
#define portBIT_CLEAR ( ( unsigned portCHAR ) 0 )
/*
* The serial port ISR's are defined in serial.c, but are called from portable
* as they use the same vector as the tick ISR.
*/
void vSerialTxISR( void );
void vSerialRxISR( void );
/*
* Perform hardware setup to enable ticks.
*/
static void prvSetupTimerInterrupt( void );
/*
* ISR to maintain the tick, and perform tick context switches if the
* preemptive scheduler is being used.
*/
static void prvTickISR( void );
/*
* ISR placed on the low priority vector. This calls the appropriate ISR for
* the actual interrupt.
*/
static void prvLowInterrupt( void );
/*
* Macro that pushes all the registers that make up the context of a task onto
* the stack, then saves the new top of stack into the TCB.
*
* If this is called from an ISR then the interrupt enable bits must have been
* set for the ISR to ever get called. Therefore we want to save the INTCON
* register with the enable bits forced to be set - and ucForcedInterruptFlags
* must contain these bit settings. This means the interrupts will again be
* enabled when the interrupted task is switched back in.
*
* If this is called from a manual context switch (i.e. from a call to yield),
* then we want to save the INTCON so it is restored with its current state,
* and ucForcedInterruptFlags must be 0. This allows a yield from within
* a critical section.
*
* The compiler uses some locations at the bottom of the memory for temporary
* storage during math and other computations. This is especially true if
* 32bit data types are utilised (as they are by the scheduler). The .tmpdata
* and MATH_DATA sections have to be stored in there entirety as part of a task
* context. This macro stores from data address 0x00 to
* portCOMPILER_MANAGED_MEMORY_SIZE. This is sufficient for the demo
* applications but you should check the map file for your project to ensure
* this is sufficient for your needs. It is not clear whether this size is
* fixed for all compilations or has the potential to be program specific.
*/
#define portSAVE_CONTEXT( ucForcedInterruptFlags ) \
{ \
_asm \
/* Save the status and WREG registers first, as these will get modified \
by the operations below. */ \
MOVFF WREG, PREINC1 \
MOVFF STATUS, PREINC1 \
/* Save the INTCON register with the appropriate bits forced if \
necessary - as described above. */ \
MOVFF INTCON, WREG \
IORLW ucForcedInterruptFlags \
MOVFF WREG, PREINC1 \
_endasm \
\
portDISABLE_INTERRUPTS(); \
\
_asm \
/* Store the necessary registers to the stack. */ \
MOVFF BSR, PREINC1 \
MOVFF FSR2L, PREINC1 \
MOVFF FSR2H, PREINC1 \
MOVFF FSR0L, PREINC1 \
MOVFF FSR0H, PREINC1 \
MOVFF TABLAT, PREINC1 \
MOVFF TBLPTRU, PREINC1 \
MOVFF TBLPTRH, PREINC1 \
MOVFF TBLPTRL, PREINC1 \
MOVFF PRODH, PREINC1 \
MOVFF PRODL, PREINC1 \
MOVFF PCLATU, PREINC1 \
MOVFF PCLATH, PREINC1 \
/* Store the .tempdata and MATH_DATA areas as described above. */ \
CLRF FSR0L, 0 \
CLRF FSR0H, 0 \
MOVFF POSTINC0, PREINC1 \
MOVFF POSTINC0, PREINC1 \
MOVFF POSTINC0, PREINC1 \
MOVFF POSTINC0, PREINC1 \
MOVFF POSTINC0, PREINC1 \
MOVFF POSTINC0, PREINC1 \
MOVFF POSTINC0, PREINC1 \
MOVFF POSTINC0, PREINC1 \
MOVFF POSTINC0, PREINC1 \
MOVFF POSTINC0, PREINC1 \
MOVFF POSTINC0, PREINC1 \
MOVFF POSTINC0, PREINC1 \
MOVFF POSTINC0, PREINC1 \
MOVFF POSTINC0, PREINC1 \
MOVFF POSTINC0, PREINC1 \
MOVFF POSTINC0, PREINC1 \
MOVFF POSTINC0, PREINC1 \
MOVFF POSTINC0, PREINC1 \
MOVFF POSTINC0, PREINC1 \
MOVFF INDF0, PREINC1 \
MOVFF FSR0L, PREINC1 \
MOVFF FSR0H, PREINC1 \
/* Store the hardware stack pointer in a temp register before we \
modify it. */ \
MOVFF STKPTR, FSR0L \
_endasm \
\
/* Store each address from the hardware stack. */ \
while( STKPTR > ( unsigned portCHAR ) 0 ) \
{ \
_asm \
MOVFF TOSL, PREINC1 \
MOVFF TOSH, PREINC1 \
MOVFF TOSU, PREINC1 \
POP \
_endasm \
} \
\
_asm \
/* Store the number of addresses on the hardware stack (from the \
temporary register). */ \
MOVFF FSR0L, PREINC1 \
MOVF PREINC1, 1, 0 \
_endasm \
\
/* Save the new top of the software stack in the TCB. */ \
_asm \
MOVFF pxCurrentTCB, FSR0L \
MOVFF pxCurrentTCB + 1, FSR0H \
MOVFF FSR1L, POSTINC0 \
MOVFF FSR1H, POSTINC0 \
_endasm \
}
/*-----------------------------------------------------------*/
/*
* This is the reverse of portSAVE_CONTEXT. See portSAVE_CONTEXT for more
* details.
*/
#define portRESTORE_CONTEXT() \
{ \
_asm \
/* Set FSR0 to point to pxCurrentTCB->pxTopOfStack. */ \
MOVFF pxCurrentTCB, FSR0L \
MOVFF pxCurrentTCB + 1, FSR0H \
\
/* De-reference FSR0 to set the address it holds into FSR1. \
(i.e. *( pxCurrentTCB->pxTopOfStack ) ). */ \
MOVFF POSTINC0, FSR1L \
MOVFF POSTINC0, FSR1H \
\
/* How many return addresses are there on the hardware stack? Discard \
the first byte as we are pointing to the next free space. */ \
MOVFF POSTDEC1, FSR0L \
MOVFF POSTDEC1, FSR0L \
_endasm \
\
/* Fill the hardware stack from our software stack. */ \
STKPTR = 0; \
\
while( STKPTR < FSR0L ) \
{ \
_asm \
PUSH \
MOVF POSTDEC1, 0, 0 \
MOVWF TOSU, 0 \
MOVF POSTDEC1, 0, 0 \
MOVWF TOSH, 0 \
MOVF POSTDEC1, 0, 0 \
MOVWF TOSL, 0 \
_endasm \
} \
\
_asm \
/* Restore the .tmpdata and MATH_DATA memory. */ \
MOVFF POSTDEC1, FSR0H \
MOVFF POSTDEC1, FSR0L \
MOVFF POSTDEC1, POSTDEC0 \
MOVFF POSTDEC1, POSTDEC0 \
MOVFF POSTDEC1, POSTDEC0 \
MOVFF POSTDEC1, POSTDEC0 \
MOVFF POSTDEC1, POSTDEC0 \
MOVFF POSTDEC1, POSTDEC0 \
MOVFF POSTDEC1, POSTDEC0 \
MOVFF POSTDEC1, POSTDEC0 \
MOVFF POSTDEC1, POSTDEC0 \
MOVFF POSTDEC1, POSTDEC0 \
MOVFF POSTDEC1, POSTDEC0 \
MOVFF POSTDEC1, POSTDEC0 \
MOVFF POSTDEC1, POSTDEC0 \
MOVFF POSTDEC1, POSTDEC0 \
MOVFF POSTDEC1, POSTDEC0 \
MOVFF POSTDEC1, POSTDEC0 \
MOVFF POSTDEC1, POSTDEC0 \
MOVFF POSTDEC1, POSTDEC0 \
MOVFF POSTDEC1, POSTDEC0 \
MOVFF POSTDEC1, INDF0 \
/* Restore the other registers forming the tasks context. */ \
MOVFF POSTDEC1, PCLATH \
MOVFF POSTDEC1, PCLATU \
MOVFF POSTDEC1, PRODL \
MOVFF POSTDEC1, PRODH \
MOVFF POSTDEC1, TBLPTRL \
MOVFF POSTDEC1, TBLPTRH \
MOVFF POSTDEC1, TBLPTRU \
MOVFF POSTDEC1, TABLAT \
MOVFF POSTDEC1, FSR0H \
MOVFF POSTDEC1, FSR0L \
MOVFF POSTDEC1, FSR2H \
MOVFF POSTDEC1, FSR2L \
MOVFF POSTDEC1, BSR \
/* The next byte is the INTCON register. Read this into WREG as some \
manipulation is required. */ \
MOVFF POSTDEC1, WREG \
_endasm \
\
/* From the INTCON register, only the interrupt enable bits form part \
of the tasks context. It is perfectly legitimate for another task to \
have modified any other bits. We therefore only restore the top two bits. \
*/ \
if( WREG & portGLOBAL_INTERRUPT_FLAG ) \
{ \
_asm \
MOVFF POSTDEC1, STATUS \
MOVFF POSTDEC1, WREG \
/* Return enabling interrupts. */ \
RETFIE 0 \
_endasm \
} \
else \
{ \
_asm \
MOVFF POSTDEC1, STATUS \
MOVFF POSTDEC1, WREG \
/* Return without effecting interrupts. The context may have \
been saved from a critical region. */ \
RETURN 0 \
_endasm \
} \
}
/*-----------------------------------------------------------*/
/*
* See header file for description.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
unsigned portLONG ulAddress;
unsigned portCHAR ucBlock;
/* Place a few bytes of known values on the bottom of the stack.
This is just useful for debugging. */
*pxTopOfStack = 0x11;
pxTopOfStack++;
*pxTopOfStack = 0x22;
pxTopOfStack++;
*pxTopOfStack = 0x33;
pxTopOfStack++;
/* Simulate how the stack would look after a call to vPortYield() generated
by the compiler.
First store the function parameters. This is where the task will expect to
find them when it starts running. */
ulAddress = ( unsigned portLONG ) pvParameters;
*pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned portLONG ) 0x00ff );
pxTopOfStack++;
ulAddress >>= 8;
*pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned portLONG ) 0x00ff );
pxTopOfStack++;
/* Next we just leave a space. When a context is saved the stack pointer
is incremented before it is used so as not to corrupt whatever the stack
pointer is actually pointing to. This is especially necessary during
function epilogue code generated by the compiler. */
*pxTopOfStack = 0x44;
pxTopOfStack++;
/* Next are all the registers that form part of the task context. */
*pxTopOfStack = ( portSTACK_TYPE ) 0x66; /* WREG. */
pxTopOfStack++;
*pxTopOfStack = ( portSTACK_TYPE ) 0xcc; /* Status. */
pxTopOfStack++;
/* INTCON is saved with interrupts enabled. */
*pxTopOfStack = ( portSTACK_TYPE ) portINITAL_INTERRUPT_STATE; /* INTCON */
pxTopOfStack++;
*pxTopOfStack = ( portSTACK_TYPE ) 0x11; /* BSR. */
pxTopOfStack++;
*pxTopOfStack = ( portSTACK_TYPE ) 0x22; /* FSR2L. */
pxTopOfStack++;
*pxTopOfStack = ( portSTACK_TYPE ) 0x33; /* FSR2H. */
pxTopOfStack++;
*pxTopOfStack = ( portSTACK_TYPE ) 0x44; /* FSR0L. */
pxTopOfStack++;
*pxTopOfStack = ( portSTACK_TYPE ) 0x55; /* FSR0H. */
pxTopOfStack++;
*pxTopOfStack = ( portSTACK_TYPE ) 0x66; /* TABLAT. */
pxTopOfStack++;
*pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* TBLPTRU. */
pxTopOfStack++;
*pxTopOfStack = ( portSTACK_TYPE ) 0x88; /* TBLPTRUH. */
pxTopOfStack++;
*pxTopOfStack = ( portSTACK_TYPE ) 0x99; /* TBLPTRUL. */
pxTopOfStack++;
*pxTopOfStack = ( portSTACK_TYPE ) 0xaa; /* PRODH. */
pxTopOfStack++;
*pxTopOfStack = ( portSTACK_TYPE ) 0xbb; /* PRODL. */
pxTopOfStack++;
*pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* PCLATU. */
pxTopOfStack++;
*pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* PCLATH. */
pxTopOfStack++;
/* Next the .tmpdata and MATH_DATA sections. */
for( ucBlock = 0; ucBlock <= portCOMPILER_MANAGED_MEMORY_SIZE; ucBlock++ )
{
*pxTopOfStack = ( portSTACK_TYPE ) ucBlock;
*pxTopOfStack++;
}
/* Store the top of the global data section. */
*pxTopOfStack = ( portSTACK_TYPE ) portCOMPILER_MANAGED_MEMORY_SIZE; /* Low. */
pxTopOfStack++;
*pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* High. */
pxTopOfStack++;
/* The only function return address so far is the address of the
task. */
ulAddress = ( unsigned portLONG ) pxCode;
/* TOS low. */
*pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned portLONG ) 0x00ff );
pxTopOfStack++;
ulAddress >>= 8;
/* TOS high. */
*pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned portLONG ) 0x00ff );
pxTopOfStack++;
ulAddress >>= 8;
/* TOS even higher. */
*pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned portLONG ) 0x00ff );
pxTopOfStack++;
/* Store the number of return addresses on the hardware stack - so far only
the address of the task entry point. */
*pxTopOfStack = ( portSTACK_TYPE ) 1;
pxTopOfStack++;
return pxTopOfStack;
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortStartScheduler( void )
{
/* Setup a timer for the tick ISR is using the preemptive scheduler. */
prvSetupTimerInterrupt();
/* Restore the context of the first task to run. */
portRESTORE_CONTEXT();
/* Should not get here. Use the function name to stop compiler warnings. */
( void ) prvLowInterrupt;
( void ) prvTickISR;
return pdTRUE;
}
/*-----------------------------------------------------------*/
void vPortEndScheduler( void )
{
/* It is unlikely that the scheduler for the PIC port will get stopped
once running. If required disable the tick interrupt here, then return
to xPortStartScheduler(). */
}
/*-----------------------------------------------------------*/
/*
* Manual context switch. This is similar to the tick context switch,
* but does not increment the tick count. It must be identical to the
* tick context switch in how it stores the stack of a task.
*/
void vPortYield( void )
{
/* This can get called with interrupts either enabled or disabled. We
will save the INTCON register with the interrupt enable bits unmodified. */
portSAVE_CONTEXT( portINTERRUPTS_UNCHANGED );
/* Switch to the highest priority task that is ready to run. */
vTaskSwitchContext();
/* Start executing the task we have just switched to. */
portRESTORE_CONTEXT();
}
/*-----------------------------------------------------------*/
/*
* Vector for ISR. Nothing here must alter any registers!
*/
#pragma code high_vector=0x08
static void prvLowInterrupt( void )
{
/* Was the interrupt the tick? */
if( PIR1bits.CCP1IF )
{
_asm
goto prvTickISR
_endasm
}
/* Was the interrupt a byte being received? */
if( PIR1bits.RCIF )
{
_asm
goto vSerialRxISR
_endasm
}
/* Was the interrupt the Tx register becoming empty? */
if( PIR1bits.TXIF )
{
if( PIE1bits.TXIE )
{
_asm
goto vSerialTxISR
_endasm
}
}
}
#pragma code
/*-----------------------------------------------------------*/
/*
* ISR for the tick.
* This increments the tick count and, if using the preemptive scheduler,
* performs a context switch. This must be identical to the manual
* context switch in how it stores the context of a task.
*/
static void prvTickISR( void )
{
/* Interrupts must have been enabled for the ISR to fire, so we have to
save the context with interrupts enabled. */
portSAVE_CONTEXT( portGLOBAL_INTERRUPT_FLAG );
PIR1bits.CCP1IF = 0;
/* Maintain the tick count. */
vTaskIncrementTick();
#if configUSE_PREEMPTION == 1
{
/* Switch to the highest priority task that is ready to run. */
vTaskSwitchContext();
}
#endif
portRESTORE_CONTEXT();
}
/*-----------------------------------------------------------*/
/*
* Setup a timer for a regular tick.
*/
static void prvSetupTimerInterrupt( void )
{
const unsigned portLONG ulConstCompareValue = ( ( configCPU_CLOCK_HZ / portTIMER_FOSC_SCALE ) / configTICK_RATE_HZ );
unsigned portLONG ulCompareValue;
unsigned portCHAR ucByte;
/* Interrupts are disabled when this function is called.
Setup CCP1 to provide the tick interrupt using a compare match on timer
1.
Clear the time count then setup timer. */
TMR1H = ( unsigned portCHAR ) 0x00;
TMR1L = ( unsigned portCHAR ) 0x00;
/* Set the compare match value. */
ulCompareValue = ulConstCompareValue;
CCPR1L = ( unsigned portCHAR ) ( ulCompareValue & ( unsigned portLONG ) 0xff );
ulCompareValue >>= ( unsigned portLONG ) 8;
CCPR1H = ( unsigned portCHAR ) ( ulCompareValue & ( unsigned portLONG ) 0xff );
CCP1CONbits.CCP1M0 = portBIT_SET; /*< Compare match mode. */
CCP1CONbits.CCP1M1 = portBIT_SET; /*< Compare match mode. */
CCP1CONbits.CCP1M2 = portBIT_CLEAR; /*< Compare match mode. */
CCP1CONbits.CCP1M3 = portBIT_SET; /*< Compare match mode. */
PIE1bits.CCP1IE = portBIT_SET; /*< Interrupt enable. */
/* We are only going to use the global interrupt bit, so set the peripheral
bit to true. */
INTCONbits.GIEL = portBIT_SET;
/* Provided library function for setting up the timer that will produce the
tick. */
OpenTimer1( T1_16BIT_RW & T1_SOURCE_INT & T1_PS_1_1 & T1_CCP1_T3_CCP2 );
}

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/*
FreeRTOS.org V4.7.2 - Copyright (C) 2003-2008 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
Please ensure to read the configuration and relevant port sections of the
online documentation.
+++ http://www.FreeRTOS.org +++
Documentation, latest information, license and contact details.
+++ http://www.SafeRTOS.com +++
A version that is certified for use in safety critical systems.
+++ http://www.OpenRTOS.com +++
Commercial support, development, porting, licensing and training services.
***************************************************************************
*/
#ifndef PORTMACRO_H
#define PORTMACRO_H
/*-----------------------------------------------------------
* Port specific definitions.
*
* The settings in this file configure FreeRTOS correctly for the
* given hardware and compiler.
*
* These settings should not be altered.
*-----------------------------------------------------------
*/
/* Type definitions. */
#define portCHAR char
#define portFLOAT float
#define portDOUBLE double
#define portLONG long
#define portSHORT int
#define portSTACK_TYPE unsigned char
#define portBASE_TYPE char
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffff
#endif
/*-----------------------------------------------------------*/
/* Hardware specifics. */
#define portBYTE_ALIGNMENT 1
#define portGLOBAL_INT_ENABLE_BIT 0x80
#define portSTACK_GROWTH 1
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
/*-----------------------------------------------------------*/
/* Critical section management. */
#define portDISABLE_INTERRUPTS() INTCONbits.GIEH = 0;
#define portENABLE_INTERRUPTS() INTCONbits.GIEH = 1;
/* Push the INTCON register onto the stack, then disable interrupts. */
#define portENTER_CRITICAL() POSTINC1 = INTCON; \
INTCONbits.GIEH = 0;
/* Retrieve the INTCON register from the stack, and enable interrupts
if they were saved as being enabled. Don't modify any other bits
within the INTCON register as these may have lagitimately have been
modified within the critical region. */
#define portEXIT_CRITICAL() _asm \
MOVF POSTDEC1, 1, 0 \
_endasm \
if( INDF1 & portGLOBAL_INT_ENABLE_BIT ) \
{ \
portENABLE_INTERRUPTS(); \
}
/*-----------------------------------------------------------*/
/* Task utilities. */
extern void vPortYield( void );
#define portYIELD() vPortYield()
/*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
/*-----------------------------------------------------------*/
/* Compiler specifics. */
#define inline
#define portNOP() _asm \
NOP \
_endasm
#endif /* PORTMACRO_H */

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20080325/Source/portable/MPLAB/PIC18F/stdio.h Normal file
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20080325/Source/portable/MPLAB/PIC24_dsPIC/port.c Normal file
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/*
FreeRTOS.org V4.7.2 - Copyright (C) 2003-2008 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
Please ensure to read the configuration and relevant port sections of the
online documentation.
+++ http://www.FreeRTOS.org +++
Documentation, latest information, license and contact details.
+++ http://www.SafeRTOS.com +++
A version that is certified for use in safety critical systems.
+++ http://www.OpenRTOS.com +++
Commercial support, development, porting, licensing and training services.
***************************************************************************
*/
/*
Changes from V4.2.1
+ Introduced the configKERNEL_INTERRUPT_PRIORITY definition.
*/
/*-----------------------------------------------------------
* Implementation of functions defined in portable.h for the PIC24 port.
*----------------------------------------------------------*/
/* Scheduler include files. */
#include "FreeRTOS.h"
#include "task.h"
/* Hardware specifics. */
#define portBIT_SET 1
#define portTIMER_PRESCALE 8
#define portINITIAL_SR 0
/* Defined for backward compatability with project created prior to
FreeRTOS.org V4.3.0. */
#ifndef configKERNEL_INTERRUPT_PRIORITY
#define configKERNEL_INTERRUPT_PRIORITY 1
#endif
/* The program counter is only 23 bits. */
#define portUNUSED_PR_BITS 0x7f
/* Records the nesting depth of calls to portENTER_CRITICAL(). */
unsigned portBASE_TYPE uxCriticalNesting = 0xef;
#if configKERNEL_INTERRUPT_PRIORITY != 1
#error If configKERNEL_INTERRUPT_PRIORITY is not 1 then the #32 in the following macros needs changing to equal the portINTERRUPT_BITS value, which is ( configKERNEL_INTERRUPT_PRIORITY << 5 )
#endif
#ifdef MPLAB_PIC24_PORT
#define portRESTORE_CONTEXT() \
asm volatile( "MOV _pxCurrentTCB, W0 \n" /* Restore the stack pointer for the task. */ \
"MOV [W0], W15 \n" \
"POP W0 \n" /* Restore the critical nesting counter for the task. */ \
"MOV W0, _uxCriticalNesting \n" \
"POP PSVPAG \n" \
"POP CORCON \n" \
"POP TBLPAG \n" \
"POP RCOUNT \n" /* Restore the registers from the stack. */ \
"POP W14 \n" \
"POP.D W12 \n" \
"POP.D W10 \n" \
"POP.D W8 \n" \
"POP.D W6 \n" \
"POP.D W4 \n" \
"POP.D W2 \n" \
"POP.D W0 \n" \
"POP SR " );
#define portSAVE_CONTEXT() \
asm volatile( "PUSH SR \n" /* Save the SR used by the task.... */ \
"PUSH W0 \n" /* ....then disable interrupts. */ \
"MOV #32, W0 \n" \
"MOV W0, SR \n" \
"PUSH W1 \n" /* Save registers to the stack. */ \
"PUSH.D W2 \n" \
"PUSH.D W4 \n" \
"PUSH.D W6 \n" \
"PUSH.D W8 \n" \
"PUSH.D W10 \n" \
"PUSH.D W12 \n" \
"PUSH W14 \n" \
"PUSH RCOUNT \n" \
"PUSH TBLPAG \n" \
"PUSH CORCON \n" \
"PUSH PSVPAG \n" \
"MOV _uxCriticalNesting, W0 \n" /* Save the critical nesting counter for the task. */ \
"PUSH W0 \n" \
"MOV _pxCurrentTCB, W0 \n" /* Save the new top of stack into the TCB. */ \
"MOV W15, [W0] ");
#endif /* MPLAB_PIC24_PORT */
#ifdef MPLAB_DSPIC_PORT
#define portRESTORE_CONTEXT() \
asm volatile( "MOV _pxCurrentTCB, W0 \n" /* Restore the stack pointer for the task. */ \
"MOV [W0], W15 \n" \
"POP W0 \n" /* Restore the critical nesting counter for the task. */ \
"MOV W0, _uxCriticalNesting \n" \
"POP PSVPAG \n" \
"POP CORCON \n" \
"POP DOENDH \n" \
"POP DOENDL \n" \
"POP DOSTARTH \n" \
"POP DOSTARTL \n" \
"POP DCOUNT \n" \
"POP ACCBU \n" \
"POP ACCBH \n" \
"POP ACCBL \n" \
"POP ACCAU \n" \
"POP ACCAH \n" \
"POP ACCAL \n" \
"POP TBLPAG \n" \
"POP RCOUNT \n" /* Restore the registers from the stack. */ \
"POP W14 \n" \
"POP.D W12 \n" \
"POP.D W10 \n" \
"POP.D W8 \n" \
"POP.D W6 \n" \
"POP.D W4 \n" \
"POP.D W2 \n" \
"POP.D W0 \n" \
"POP SR " );
#define portSAVE_CONTEXT() \
asm volatile( "PUSH SR \n" /* Save the SR used by the task.... */ \
"PUSH W0 \n" /* ....then disable interrupts. */ \
"MOV #32, W0 \n" \
"MOV W0, SR \n" \
"PUSH W1 \n" /* Save registers to the stack. */ \
"PUSH.D W2 \n" \
"PUSH.D W4 \n" \
"PUSH.D W6 \n" \
"PUSH.D W8 \n" \
"PUSH.D W10 \n" \
"PUSH.D W12 \n" \
"PUSH W14 \n" \
"PUSH RCOUNT \n" \
"PUSH TBLPAG \n" \
"PUSH ACCAL \n" \
"PUSH ACCAH \n" \
"PUSH ACCAU \n" \
"PUSH ACCBL \n" \
"PUSH ACCBH \n" \
"PUSH ACCBU \n" \
"PUSH DCOUNT \n" \
"PUSH DOSTARTL \n" \
"PUSH DOSTARTH \n" \
"PUSH DOENDL \n" \
"PUSH DOENDH \n" \
"PUSH CORCON \n" \
"PUSH PSVPAG \n" \
"MOV _uxCriticalNesting, W0 \n" /* Save the critical nesting counter for the task. */ \
"PUSH W0 \n" \
"MOV _pxCurrentTCB, W0 \n" /* Save the new top of stack into the TCB. */ \
"MOV W15, [W0] " );
#endif /* MPLAB_DSPIC_PORT */
/*
* Setup the timer used to generate the tick interrupt.
*/
static void prvSetupTimerInterrupt( void );
/*
* See header file for description.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
unsigned portSHORT usCode;
portBASE_TYPE i;
const portSTACK_TYPE xInitialStack[] =
{
0x1111, /* W1 */
0x2222, /* W2 */
0x3333, /* W3 */
0x4444, /* W4 */
0x5555, /* W5 */
0x6666, /* W6 */
0x7777, /* W7 */
0x8888, /* W8 */
0x9999, /* W9 */
0xaaaa, /* W10 */
0xbbbb, /* W11 */
0xcccc, /* W12 */
0xdddd, /* W13 */
0xeeee, /* W14 */
0xcdce, /* RCOUNT */
0xabac, /* TBLPAG */
/* dsPIC specific registers. */
#ifdef MPLAB_DSPIC_PORT
0x0202, /* ACCAL */
0x0303, /* ACCAH */
0x0404, /* ACCAU */
0x0505, /* ACCBL */
0x0606, /* ACCBH */
0x0707, /* ACCBU */
0x0808, /* DCOUNT */
0x090a, /* DOSTARTL */
0x1010, /* DOSTARTH */
0x1110, /* DOENDL */
0x1212, /* DOENDH */
#endif
};
/* Setup the stack as if a yield had occurred.
Save the low bytes of the program counter. */
usCode = ( unsigned portSHORT ) pxCode;
*pxTopOfStack = ( portSTACK_TYPE ) usCode;
pxTopOfStack++;
/* Save the high byte of the program counter. This will always be zero
here as it is passed in a 16bit pointer. If the address is greater than
16 bits then the pointer will point to a jump table. */
*pxTopOfStack = ( portSTACK_TYPE ) 0;
pxTopOfStack++;
/* Status register with interrupts enabled. */
*pxTopOfStack = portINITIAL_SR;
pxTopOfStack++;
/* Parameters are passed in W0. */
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters;
pxTopOfStack++;
for( i = 0; i < ( sizeof( xInitialStack ) / sizeof( portSTACK_TYPE ) ); i++ )
{
*pxTopOfStack = xInitialStack[ i ];
pxTopOfStack++;
}
*pxTopOfStack = CORCON;
pxTopOfStack++;
*pxTopOfStack = PSVPAG;
pxTopOfStack++;
/* Finally the critical nesting depth. */
*pxTopOfStack = 0x00;
pxTopOfStack++;
return pxTopOfStack;
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortStartScheduler( void )
{
/* Setup a timer for the tick ISR. */
prvSetupTimerInterrupt();
/* Restore the context of the first task to run. */
portRESTORE_CONTEXT();
/* Simulate the end of the yield function. */
asm volatile ( "return" );
/* Should not reach here. */
return pdTRUE;
}
/*-----------------------------------------------------------*/
void vPortEndScheduler( void )
{
/* It is unlikely that the scheduler for the PIC port will get stopped
once running. If required disable the tick interrupt here, then return
to xPortStartScheduler(). */
}
/*-----------------------------------------------------------*/
/*
* Manual context switch. This is similar to the tick context switch,
* but does not increment the tick count. It must be identical to the
* tick context switch in how it stores the stack of a task.
*/
void vPortYield( void )
{
portSAVE_CONTEXT();
vTaskSwitchContext();
portRESTORE_CONTEXT();
}
/*-----------------------------------------------------------*/
/*
* Setup a timer for a regular tick.
*/
static void prvSetupTimerInterrupt( void )
{
const unsigned portLONG ulCompareMatch = ( configCPU_CLOCK_HZ / portTIMER_PRESCALE ) / configTICK_RATE_HZ;
/* Prescale of 8. */
T1CON = 0;
TMR1 = 0;
PR1 = ( unsigned portSHORT ) ulCompareMatch;
/* Setup timer 1 interrupt priority. */
IPC0bits.T1IP = configKERNEL_INTERRUPT_PRIORITY;
/* Clear the interrupt as a starting condition. */
IFS0bits.T1IF = 0;
/* Enable the interrupt. */
IEC0bits.T1IE = 1;
/* Setup the prescale value. */
T1CONbits.TCKPS0 = 1;
T1CONbits.TCKPS1 = 0;
/* Start the timer. */
T1CONbits.TON = 1;
}
/*-----------------------------------------------------------*/
void vPortEnterCritical( void )
{
portDISABLE_INTERRUPTS();
uxCriticalNesting++;
}
/*-----------------------------------------------------------*/
void vPortExitCritical( void )
{
uxCriticalNesting--;
if( uxCriticalNesting == 0 )
{
portENABLE_INTERRUPTS();
}
}
/*-----------------------------------------------------------*/
void __attribute__((__interrupt__, auto_psv)) _T1Interrupt( void )
{
vTaskIncrementTick();
/* Clear the timer interrupt. */
IFS0bits.T1IF = 0;
#if configUSE_PREEMPTION == 1
portYIELD();
#endif
}

119
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/*
FreeRTOS.org V4.7.2 - Copyright (C) 2003-2008 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
Please ensure to read the configuration and relevant port sections of the
online documentation.
+++ http://www.FreeRTOS.org +++
Documentation, latest information, license and contact details.
+++ http://www.SafeRTOS.com +++
A version that is certified for use in safety critical systems.
+++ http://www.OpenRTOS.com +++
Commercial support, development, porting, licensing and training services.
***************************************************************************
*/
#ifndef PORTMACRO_H
#define PORTMACRO_H
#ifdef __cplusplus
extern "C" {
#endif
/*-----------------------------------------------------------
* Port specific definitions.
*
* The settings in this file configure FreeRTOS correctly for the
* given hardware and compiler.
*
* These settings should not be altered.
*-----------------------------------------------------------
*/
/* Type definitions. */
#define portCHAR char
#define portFLOAT float
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE unsigned short
#define portBASE_TYPE short
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffff
#endif
/*-----------------------------------------------------------*/
/* Hardware specifics. */
#define portBYTE_ALIGNMENT 2
#define portSTACK_GROWTH 1
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
/*-----------------------------------------------------------*/
/* Critical section management. */
#define portINTERRUPT_BITS ( ( unsigned portSHORT ) configKERNEL_INTERRUPT_PRIORITY << ( unsigned portSHORT ) 5 )
#define portDISABLE_INTERRUPTS() SR |= portINTERRUPT_BITS
#define portENABLE_INTERRUPTS() SR &= ~portINTERRUPT_BITS
/* Note that exiting a critical sectino will set the IPL bits to 0, nomatter
what their value was prior to entering the critical section. */
extern void vPortEnterCritical( void );
extern void vPortExitCritical( void );
#define portENTER_CRITICAL() vPortEnterCritical()
#define portEXIT_CRITICAL() vPortExitCritical()
/*-----------------------------------------------------------*/
/* Task utilities. */
extern void vPortYield( void );
#define portYIELD() asm volatile ( "CALL _vPortYield \n" \
"NOP " );
/*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
/*-----------------------------------------------------------*/
/* Compiler specifics. */
#define inline
#define portNOP() asm volatile ( "NOP" )
#ifdef __cplusplus
}
#endif
#endif /* PORTMACRO_H */

197
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/*
FreeRTOS.org V4.7.2 - Copyright (C) 2003-2008 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
Please ensure to read the configuration and relevant port sections of the
online documentation.
+++ http://www.FreeRTOS.org +++
Documentation, latest information, license and contact details.
+++ http://www.SafeRTOS.com +++
A version that is certified for use in safety critical systems.
+++ http://www.OpenRTOS.com +++
Commercial support, development, porting, licensing and training services.
***************************************************************************
*/
#include "FreeRTOSConfig.h"
#define portCONTEXT_SIZE 136
#define portEXL_AND_IE_BITS 0x03
#define portEPC_STACK_LOCATION 124
#define portSTATUS_STACK_LOCATION 128
#define portCAUSE_STACK_LOCATION 132
/******************************************************************/
.macro portSAVE_CONTEXT
/* Make room for the context. */
addiu sp, sp, -portCONTEXT_SIZE
/* Get interrupts above the kernel priority enabled again ASAP. First
save the current status so we can manipulate it, and the cause and EPC
registers so we capture their original values in case of interrupt nesting. */
mfc0 k0, _CP0_CAUSE
sw k0, portCAUSE_STACK_LOCATION(sp)
mfc0 k1, _CP0_STATUS
sw k1, portSTATUS_STACK_LOCATION(sp)
/* Also save s6 so we can use it during this interrupt. Any
nesting interrupts should maintain the values of this register
accross the ISR. */
sw s6, 44(sp)
/* s6 holds the EPC value, we may want this during the context switch. */
mfc0 s6, _CP0_EPC
/* Enable interrupts above the kernel priority. */
addiu k0, zero, configKERNEL_INTERRUPT_PRIORITY
ins k1, k0, 10, 6
ins k1, zero, 1, 4
mtc0 k1, _CP0_STATUS
/* Save the context into the space just created. s6 is saved again
here as it now contains the EPC value. */
sw ra, 120(sp)
sw s8, 116(sp)
sw t9, 112(sp)
sw t8, 108(sp)
sw t7, 104(sp)
sw t6, 100(sp)
sw t5, 96(sp)
sw t4, 92(sp)
sw t3, 88(sp)
sw t2, 84(sp)
sw t1, 80(sp)
sw t0, 76(sp)
sw a3, 72(sp)
sw a2, 68(sp)
sw a1, 64(sp)
sw a0, 60(sp)
sw v1, 56(sp)
sw v0, 52(sp)
sw s7, 48(sp)
sw s6, portEPC_STACK_LOCATION(sp)
sw s5, 40(sp)
sw s4, 36(sp)
sw s3, 32(sp)
sw s2, 28(sp)
sw s1, 24(sp)
sw s0, 20(sp)
sw $1, 16(sp)
/* s7 is used as a scratch register. */
mfhi s7
sw s7, 12(sp)
mflo s7
sw s7, 8(sp)
/* Each task maintains its own nesting count. */
la s7, uxCriticalNesting
lw s7, (s7)
sw s7, 4(sp)
/* Update the TCB stack pointer value */
la s7, pxCurrentTCB
lw s7, (s7)
sw sp, (s7)
/* Switch to the ISR stack, saving the current stack in s5. This might
be used to determine the cause of a general exception. */
add s5, zero, sp
la s7, xISRStackTop
lw sp, (s7)
.endm
/******************************************************************/
.macro portRESTORE_CONTEXT
/* Restore the stack pointer from the TCB */
la s0, pxCurrentTCB
lw s1, (s0)
lw sp, (s1)
/* Restore the context, the first item of which is the critical nesting
depth. */
la s0, uxCriticalNesting
lw s1, 4(sp)
sw s1, (s0)
/* Restore the rest of the context. */
lw s0, 8(sp)
mtlo s0
lw s0, 12(sp)
mthi s0
lw $1, 16(sp)
lw s0, 20(sp)
lw s1, 24(sp)
lw s2, 28(sp)
lw s3, 32(sp)
lw s4, 36(sp)
lw s5, 40(sp)
lw s6, 44(sp)
lw s7, 48(sp)
lw v0, 52(sp)
lw v1, 56(sp)
lw a0, 60(sp)
lw a1, 64(sp)
lw a2, 68(sp)
lw a3, 72(sp)
lw t0, 76(sp)
lw t1, 80(sp)
lw t2, 84(sp)
lw t3, 88(sp)
lw t4, 92(sp)
lw t5, 96(sp)
lw t6, 100(sp)
lw t7, 104(sp)
lw t8, 108(sp)
lw t9, 112(sp)
lw s8, 116(sp)
lw ra, 120(sp)
/* Protect access to the k registers. */
di
lw k1, portSTATUS_STACK_LOCATION(sp)
lw k0, portEPC_STACK_LOCATION(sp)
/* Leave the stack how we found it. */
addiu sp, sp, portCONTEXT_SIZE
mtc0 k1, _CP0_STATUS
ehb
mtc0 k0, _CP0_EPC
eret
nop
.endm

198
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/*
FreeRTOS.org V4.7.2 - Copyright (C) 2003-2008 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
Please ensure to read the configuration and relevant port sections of the
online documentation.
+++ http://www.FreeRTOS.org +++
Documentation, latest information, license and contact details.
+++ http://www.SafeRTOS.com +++
A version that is certified for use in safety critical systems.
+++ http://www.OpenRTOS.com +++
Commercial support, development, porting, licensing and training services.
***************************************************************************
*/
/*-----------------------------------------------------------
* Implementation of functions defined in portable.h for the PIC32MX port.
*----------------------------------------------------------*/
/* Scheduler include files. */
#include "FreeRTOS.h"
#include "task.h"
/* Hardware specifics. */
#define portTIMER_PRESCALE 8
/* Bits within various registers. */
#define portIE_BIT ( 0x00000001 )
#define portEXL_BIT ( 0x00000002 )
#define portIPL_SHIFT ( 10 )
#define portALL_IPL_BITS ( 0x1f << portIPL_SHIFT )
/* The EXL bit is set to ensure interrupts do not occur while the context of
the first task is being restored. */
#define portINITIAL_SR ( portIE_BIT | portEXL_BIT )
/* Records the nesting depth of calls to portENTER_CRITICAL(). */
unsigned portBASE_TYPE uxCriticalNesting = 0x55555555;
/* The stack used by interrupt service routines that cause a context switch. */
portSTACK_TYPE xISRStack[ configISR_STACK_SIZE ] = { 0 };
/* The top of stack value ensures there is enough space to store 6 registers on
the callers stack, as some functions seem to want to do this. */
const portBASE_TYPE * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );
/* Place the prototype here to ensure the interrupt vector is correctly installed. */
extern void __attribute__( (interrupt(ipl1), vector(_TIMER_1_VECTOR))) vT1InterruptHandler( void );
/*
* General exception handler that will be called for all general exceptions
* other than SYS. This should be overridden by a user provided handler.
*/
void vApplicationGeneralExceptionHandler( unsigned portLONG ulCause, unsigned portLONG ulStatus ) __attribute__((weak));
/*-----------------------------------------------------------*/
/*
* See header file for description.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
*pxTopOfStack = (portSTACK_TYPE) 0xDEADBEEF;
pxTopOfStack--;
*pxTopOfStack = (portSTACK_TYPE) 0x12345678; /* Word to which the stack pointer will be left pointing after context restore. */
pxTopOfStack--;
*pxTopOfStack = (portSTACK_TYPE) _CP0_GET_CAUSE();
pxTopOfStack--;
*pxTopOfStack = (portSTACK_TYPE) portINITIAL_SR; /* CP0_STATUS */
pxTopOfStack--;
*pxTopOfStack = (portSTACK_TYPE) pxCode; /* CP0_EPC */
pxTopOfStack--;
*pxTopOfStack = (portSTACK_TYPE) NULL; /* ra */
pxTopOfStack -= 15;
*pxTopOfStack = (portSTACK_TYPE) pvParameters; /* Parameters to pass in */
pxTopOfStack -= 14;
*pxTopOfStack = (portSTACK_TYPE) 0x00000000; /* critical nesting level */
pxTopOfStack--;
return pxTopOfStack;
}
/*-----------------------------------------------------------*/
/*
* Setup a timer for a regular tick.
*/
void prvSetupTimerInterrupt( void )
{
const unsigned portLONG ulCompareMatch = (configPERIPHERAL_CLOCK_HZ / portTIMER_PRESCALE) / configTICK_RATE_HZ;
OpenTimer1( ( T1_ON | T1_PS_1_8 | T1_SOURCE_INT ), ulCompareMatch );
ConfigIntTimer1( T1_INT_ON | configKERNEL_INTERRUPT_PRIORITY );
}
/*-----------------------------------------------------------*/
void vPortEndScheduler(void)
{
/* It is unlikely that the scheduler for the PIC port will get stopped
once running. If required disable the tick interrupt here, then return
to xPortStartScheduler(). */
for( ;; );
}
/*-----------------------------------------------------------*/
void vPortEnterCritical(void)
{
unsigned portLONG ulStatus;
/* Mask interrupts at and below the kernel interrupt priority. */
ulStatus = _CP0_GET_STATUS();
ulStatus |= ( configKERNEL_INTERRUPT_PRIORITY << portIPL_SHIFT );
_CP0_SET_STATUS( ulStatus );
/* Once interrupts are disabled we can access the nesting count directly. */
uxCriticalNesting++;
}
/*-----------------------------------------------------------*/
void vPortExitCritical(void)
{
unsigned portLONG ulStatus;
/* If we are in a critical section then we can access the nesting count
directly. */
uxCriticalNesting--;
/* Has the nesting unwound? */
if( uxCriticalNesting == 0 )
{
/* Unmask all interrupts. */
ulStatus = _CP0_GET_STATUS();
ulStatus &= ~portALL_IPL_BITS;
_CP0_SET_STATUS( ulStatus );
}
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortStartScheduler( void )
{
extern void vPortStartFirstTask( void );
/* Setup the timer to generate the tick. Interrupts will have been
disabled by the time we get here. */
prvSetupTimerInterrupt();
/* Kick off the highest priority task that has been created so far. */
vPortStartFirstTask();
/* Should never get here as the tasks will now be executing. */
return pdFALSE;
}
/*-----------------------------------------------------------*/
void vApplicationGeneralExceptionHandler( unsigned portLONG ulCause, unsigned portLONG ulStatus )
{
/* This function is declared weak and should be overridden by the users
application. */
while( 1 );
}

163
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/*
FreeRTOS.org V4.7.2 - Copyright (C) 2003-2008 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
Please ensure to read the configuration and relevant port sections of the
online documentation.
+++ http://www.FreeRTOS.org +++
Documentation, latest information, license and contact details.
+++ http://www.SafeRTOS.com +++
A version that is certified for use in safety critical systems.
+++ http://www.OpenRTOS.com +++
Commercial support, development, porting, licensing and training services.
***************************************************************************
*/
#include <p32xxxx.h>
#include <sys/asm.h>
#include "ISR_Support.h"
#define portEXC_CODE_MASK ( 0x1f << 2 )
.set nomips16
.set noreorder
.extern pxCurrentTCB
.extern uxCriticalNesting
.extern vTaskSwitchContext
.extern vTaskIncrementTick
.extern vApplicationGeneralExceptionHandler
.extern xISRStackTop
.global vPortStartFirstTask
.global _general_exception_context
.global vT1InterruptHandler
/******************************************************************/
.section .FreeRTOS, "ax", @progbits
.set noreorder
.set noat
.ent vT1InterruptHandler
vT1InterruptHandler:
portSAVE_CONTEXT
jal vTaskIncrementTick
nop
/* If we are using the preemptive scheduler then we might want to select
a different task to execute. */
#if configUSE_PREEMPTION == 1
jal vTaskSwitchContext
nop
#endif /* configUSE_PREEMPTION */
/* Clear timer 0 interrupt. */
la s1, IFS0CLR
addiu s0,zero,_IFS0_T1IF_MASK
sw s0, 0(s1)
portRESTORE_CONTEXT
.end vT1InterruptHandler
/******************************************************************/
.section .FreeRTOS, "ax", @progbits
.set noreorder
.set noat
.ent xPortStartScheduler
vPortStartFirstTask:
/* Simply restore the context of the highest priority task that has been
created so far. */
portRESTORE_CONTEXT
.end xPortStartScheduler
/*******************************************************************/
.section .FreeRTOS, "ax", @progbits
.set noreorder
.set noat
.ent _general_exception_context
_general_exception_context:
/* Save the context of the current task. */
portSAVE_CONTEXT
/* Was this handler caused by a syscall? The original Cause
value was saved to the stack as it could change as interrupts
nest. Use of k registers must be protected from use by nesting
interrupts. */
lw s7, portCAUSE_STACK_LOCATION(s5)
andi s7, s7, portEXC_CODE_MASK
addi s7, s7, -( _EXCCODE_SYS << 2 )
/* Yes - call the SYSCALL handler to select a new task to execute. */
beq s7, zero, SyscallHandler
nop
/* No - call the application handler to handle all other types of
exception. Pass the status and cause to the application provided
handler. Interrupts are disabled during the execution of the user
defined handler. */
di
lw a1, portSTATUS_STACK_LOCATION(s5)
lw a0, portCAUSE_STACK_LOCATION(s5)
jal vApplicationGeneralExceptionHandler
nop
ei
beq zero, zero, FinishExceptionHandler
nop
SyscallHandler:
/* Adjust the return that was placed onto the stack to be the
address of the instruction following the syscall. s6 already
contains the EPC value. */
addi s6, 4
sw s6, portEPC_STACK_LOCATION(s5)
jal vTaskSwitchContext
nop
FinishExceptionHandler:
portRESTORE_CONTEXT
.end _general_exception_context

117
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/*
FreeRTOS.org V4.7.2 - Copyright (C) 2003-2008 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
Please ensure to read the configuration and relevant port sections of the
online documentation.
+++ http://www.FreeRTOS.org +++
Documentation, latest information, license and contact details.
+++ http://www.SafeRTOS.com +++
A version that is certified for use in safety critical systems.
+++ http://www.OpenRTOS.com +++
Commercial support, development, porting, licensing and training services.
***************************************************************************
*/
#ifndef PORTMACRO_H
#define PORTMACRO_H
/* System include files */
#include <plib.h>
#ifdef __cplusplus
extern "C" {
#endif
/*-----------------------------------------------------------
* Port specific definitions.
*
* The settings in this file configure FreeRTOS correctly for the
* given hardware and compiler.
*
* These settings should not be altered.
*-----------------------------------------------------------
*/
/* Type definitions. */
#define portCHAR char
#define portFLOAT float
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE unsigned long
#define portBASE_TYPE long
#if( configUSE_16_BIT_TICKS == 1 )
typedef unsigned portSHORT portTickType;
#define portMAX_DELAY ( portTickType ) 0xffff
#else
typedef unsigned portLONG portTickType;
#define portMAX_DELAY ( portTickType ) 0xffffffff
#endif
/*-----------------------------------------------------------*/
/* Hardware specifics. */
#define portBYTE_ALIGNMENT 4
#define portSTACK_GROWTH -4
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
/*-----------------------------------------------------------*/
/* Critical section management. */
#define portDISABLE_INTERRUPTS() INTDisableInterrupts()
#define portENABLE_INTERRUPTS() INTEnableInterrupts()
extern void vPortEnterCritical( void );
extern void vPortExitCritical( void );
#define portENTER_CRITICAL() vPortEnterCritical()
#define portEXIT_CRITICAL() vPortExitCritical()
/*-----------------------------------------------------------*/
/* Task utilities. */
#define portYIELD() asm volatile ( "ehb \r\n" \
"SYSCALL \r\n" )
#define portNOP() asm volatile ( "nop" )
/*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) __attribute__((noreturn))
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
/*-----------------------------------------------------------*/
#define portEND_SWITCHING_ISR( vSwitchRequired ) if( vSwitchRequired ) vTaskSwitchContext()
#ifdef __cplusplus
}
#endif
#endif /* PORTMACRO_H */