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Update to V4.0.4. Add in STR912 port and demo.
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Richard Barry
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05023971cb
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445 changed files with 30007 additions and 331 deletions
297
Source/portable/IAR/STR91x/port.c
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297
Source/portable/IAR/STR91x/port.c
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/*
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FreeRTOS.org V4.0.4 - Copyright (C) 2003-2006 Richard Barry.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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FreeRTOS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with FreeRTOS; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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A special exception to the GPL can be applied should you wish to distribute
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a combined work that includes FreeRTOS, without being obliged to provide
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the source code for any proprietary components. See the licensing section
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of http://www.FreeRTOS.org for full details of how and when the exception
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can be applied.
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***************************************************************************
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See http://www.FreeRTOS.org for documentation, latest information, license
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and contact details. Please ensure to read the configuration and relevant
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port sections of the online documentation.
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***************************************************************************
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the ST STR91x ARM7
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* port.
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*----------------------------------------------------------*/
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/* Library includes. */
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#include "91x_lib.h"
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/* Standard includes. */
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#include <stdlib.h>
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Constants required to setup the initial stack. */
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#ifndef _RUN_TASK_IN_ARM_MODE_
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#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x3f ) /* System mode, THUMB mode, interrupts enabled. */
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#else
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#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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#endif
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#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
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/* Constants required to handle critical sections. */
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#define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 )
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/*-----------------------------------------------------------*/
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/* Setup the watchdog to generate the tick interrupts. */
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static void prvSetupTimerInterrupt( void );
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/* ulCriticalNesting will get set to zero when the first task starts. It
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cannot be initialised to 0 as this will cause interrupts to be enabled
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during the kernel initialisation process. */
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unsigned portLONG ulCriticalNesting = ( unsigned portLONG ) 9999;
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/* Tick interrupt routines for cooperative and preemptive operation
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respectively. The preemptive version is not defined as __irq as it is called
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from an asm wrapper function. */
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__arm __irq void vPortNonPreemptiveTick( void );
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void WDG_IRQHandler( void );
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/* VIC interrupt default handler. */
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static void prvDefaultHandler( void );
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/*-----------------------------------------------------------*/
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/*
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* Initialise the stack of a task to look exactly as if a call to
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* portSAVE_CONTEXT had been called.
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*
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* See header file for description.
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*/
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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portSTACK_TYPE *pxOriginalTOS;
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pxOriginalTOS = pxTopOfStack;
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/* Setup the initial stack of the task. The stack is set exactly as
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expected by the portRESTORE_CONTEXT() macro. */
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/* First on the stack is the return address - which in this case is the
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start of the task. The offset is added to make the return address appear
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as it would within an IRQ ISR. */
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*pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
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pxTopOfStack--;
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/* When the task starts is will expect to find the function parameter in
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R0. */
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*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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pxTopOfStack--;
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/* The status register is set for system mode, with interrupts enabled. */
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*pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
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pxTopOfStack--;
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/* Interrupt flags cannot always be stored on the stack and will
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instead be stored in a variable, which is then saved as part of the
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tasks context. */
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*pxTopOfStack = portNO_CRITICAL_NESTING;
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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portBASE_TYPE xPortStartScheduler( void )
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{
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extern void vPortStartFirstTask( void );
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/* Start the timer that generates the tick ISR. Interrupts are disabled
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here already. */
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prvSetupTimerInterrupt();
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/* Start the first task. */
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vPortStartFirstTask();
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/* Should not get here! */
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return 0;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* It is unlikely that the ARM port will require this function as there
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is nothing to return to. */
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}
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/*-----------------------------------------------------------*/
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/* This function is called from an asm wrapper, so does not require the __irq
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keyword. */
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void WDG_IRQHandler( void )
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{
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/* Increment the tick counter. */
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vTaskIncrementTick();
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#if configUSE_PREEMPTION == 1
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/* The new tick value might unblock a task. Ensure the highest task that
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is ready to execute is the task that will execute when the tick ISR
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exits. */
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vTaskSwitchContext();
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#endif
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/* Clear the interrupt in the watchdog. */
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WDG->SR &= ~0x0001;
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}
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/*-----------------------------------------------------------*/
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#ifndef abs
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#define abs(x) ((x)>0 ? (x) : -(x))
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#endif
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static void prvFindFactors(u32 n, u16 *a, u32 *b)
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{
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/* This function is copied from the ST STR7 library and is
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copyright STMicroelectronics. Reproduced with permission. */
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u32 b0;
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u16 a0;
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long err, err_min=n;
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*a = a0 = ((n-1)/65536ul) + 1;
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*b = b0 = n / *a;
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for (; *a <= 256; (*a)++)
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{
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*b = n / *a;
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err = (long)*a * (long)*b - (long)n;
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if (abs(err) > (*a / 2))
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{
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(*b)++;
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err = (long)*a * (long)*b - (long)n;
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}
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if (abs(err) < abs(err_min))
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{
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err_min = err;
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a0 = *a;
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b0 = *b;
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if (err == 0) break;
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}
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}
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*a = a0;
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*b = b0;
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}
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/*-----------------------------------------------------------*/
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static void prvSetupTimerInterrupt( void )
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{
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WDG_InitTypeDef xWdg;
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unsigned portSHORT a;
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unsigned portLONG n = configCPU_PERIPH_HZ / configTICK_RATE_HZ, b;
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/* Configure the watchdog as a free running timer that generates a
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periodic interrupt. */
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SCU_APBPeriphClockConfig( __WDG, ENABLE );
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WDG_DeInit();
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WDG_StructInit(&xWdg);
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prvFindFactors( n, &a, &b );
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xWdg.WDG_Prescaler = a - 1;
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xWdg.WDG_Preload = b - 1;
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WDG_Init( &xWdg );
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WDG_ITConfig(ENABLE);
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/* Configure the VIC for the WDG interrupt. */
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VIC_Config( WDG_ITLine, VIC_IRQ, 10 );
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VIC_ITCmd( WDG_ITLine, ENABLE );
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/* Install the default handlers for both VIC's. */
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VIC0->DVAR = ( unsigned portLONG ) prvDefaultHandler;
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VIC1->DVAR = ( unsigned portLONG ) prvDefaultHandler;
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WDG_Cmd(ENABLE);
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}
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/*-----------------------------------------------------------*/
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__arm __interwork void vPortEnterCritical( void )
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{
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/* Disable interrupts first! */
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portDISABLE_INTERRUPTS();
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/* Now interrupts are disabled ulCriticalNesting can be accessed
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directly. Increment ulCriticalNesting to keep a count of how many times
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portENTER_CRITICAL() has been called. */
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ulCriticalNesting++;
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}
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/*-----------------------------------------------------------*/
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__arm __interwork void vPortExitCritical( void )
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{
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if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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{
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/* Decrement the nesting count as we are leaving a critical section. */
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ulCriticalNesting--;
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/* If the nesting level has reached zero then interrupts should be
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re-enabled. */
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if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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{
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portENABLE_INTERRUPTS();
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}
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}
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}
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/*-----------------------------------------------------------*/
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static void prvDefaultHandler( void )
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{
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}
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