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Update to V4.0.4. Add in STR912 port and demo.
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Richard Barry
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05023971cb
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3dcbed5763
445 changed files with 30007 additions and 331 deletions
289
Demo/ARM9_STR91X_IAR/serial/serial.c
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289
Demo/ARM9_STR91X_IAR/serial/serial.c
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/*
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FreeRTOS.org V4.0.4 - Copyright (C) 2003-2006 Richard Barry.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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FreeRTOS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with FreeRTOS; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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A special exception to the GPL can be applied should you wish to distribute
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a combined work that includes FreeRTOS, without being obliged to provide
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the source code for any proprietary components. See the licensing section
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of http://www.FreeRTOS.org for full details of how and when the exception
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can be applied.
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***************************************************************************
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See http://www.FreeRTOS.org for documentation, latest information, license
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and contact details. Please ensure to read the configuration and relevant
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port sections of the online documentation.
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***************************************************************************
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*/
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/*
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BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART1.
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*/
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/* Library includes. */
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#include "91x_lib.h"
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "queue.h"
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#include "semphr.h"
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/* Demo application includes. */
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#include "serial.h"
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/*-----------------------------------------------------------*/
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/* Misc defines. */
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#define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
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#define serNO_BLOCK ( ( portTickType ) 0 )
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#define serTX_BLOCK_TIME ( 40 / portTICK_RATE_MS )
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/* Interrupt and status bit definitions. */
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#define mainTXRIS 0x20
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#define mainRXRIS 0x50
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#define serTX_FIFO_FULL 0x20
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#define serCLEAR_ALL_INTERRUPTS 0x3ff
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/*-----------------------------------------------------------*/
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/* The queue used to hold received characters. */
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static xQueueHandle xRxedChars;
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/* The semaphore used to wake a task waiting for space to become available
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in the FIFO. */
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static xSemaphoreHandle xTxFIFOSemaphore;
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/*-----------------------------------------------------------*/
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/* UART interrupt handler. */
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void UART1_IRQHandler( void );
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/* The interrupt service routine - called from the assembly entry point. */
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__arm void UART1_IRQHandler( void );
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/*-----------------------------------------------------------*/
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/* Flag to indicate whether or not a task is blocked waiting for space on
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the FIFO. */
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static portLONG lTaskWaiting = pdFALSE;
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/*
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* See the serial2.h header file.
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*/
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xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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{
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xComPortHandle xReturn;
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UART_InitTypeDef xUART1_Init;
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GPIO_InitTypeDef GPIO_InitStructure;
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/* Create the queues used to hold Rx characters. */
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xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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/* Create the semaphore used to wake a task waiting for space to become
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available in the FIFO. */
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vSemaphoreCreateBinary( xTxFIFOSemaphore );
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/* If the queue/semaphore was created correctly then setup the serial port
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hardware. */
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if( ( xRxedChars != serINVALID_QUEUE ) && ( xTxFIFOSemaphore != serINVALID_QUEUE ) )
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{
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/* Pre take the semaphore so a task will block if it tries to access
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it. */
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xSemaphoreTake( xTxFIFOSemaphore, 0 );
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/* Configure the UART. */
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xUART1_Init.UART_WordLength = UART_WordLength_8D;
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xUART1_Init.UART_StopBits = UART_StopBits_1;
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xUART1_Init.UART_Parity = UART_Parity_No;
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xUART1_Init.UART_BaudRate = ulWantedBaud;
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xUART1_Init.UART_HardwareFlowControl = UART_HardwareFlowControl_None;
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xUART1_Init.UART_Mode = UART_Mode_Tx_Rx;
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xUART1_Init.UART_FIFO = UART_FIFO_Enable;
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/* Enable the UART1 Clock */
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SCU_APBPeriphClockConfig( __UART1, ENABLE );
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/* Enable the GPIO3 Clock */
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SCU_APBPeriphClockConfig( __GPIO3, ENABLE );
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/* Configure UART1_Rx pin GPIO3.2 */
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GPIO_InitStructure.GPIO_Direction = GPIO_PinInput;
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
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GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ;
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GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Enable;
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GPIO_InitStructure.GPIO_Alternate = GPIO_InputAlt1 ;
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GPIO_Init( GPIO3, &GPIO_InitStructure );
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/* Configure UART1_Tx pin GPIO3.3 */
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GPIO_InitStructure.GPIO_Direction = GPIO_PinOutput;
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
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GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ;
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GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Enable;
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GPIO_InitStructure.GPIO_Alternate = GPIO_OutputAlt2 ;
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GPIO_Init( GPIO3, &GPIO_InitStructure );
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portENTER_CRITICAL();
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{
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/* Configure the UART itself. */
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UART_DeInit( UART1 );
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UART_Init( UART1, &xUART1_Init );
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UART_ITConfig( UART1, UART_IT_Receive | UART_IT_Transmit, ENABLE );
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UART1->ICR = serCLEAR_ALL_INTERRUPTS;
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UART_LoopBackConfig( UART1, DISABLE );
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UART_IrDACmd( IrDA1, DISABLE );
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/* Configure the VIC for the UART interrupts. */
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VIC_Config( UART1_ITLine, VIC_IRQ, 9 );
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VIC_ITCmd( UART1_ITLine, ENABLE );
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UART_Cmd( UART1, ENABLE );
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lTaskWaiting = pdFALSE;
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}
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portEXIT_CRITICAL();
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}
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else
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{
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xReturn = ( xComPortHandle ) 0;
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}
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/* This demo file only supports a single port but we have to return
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something to comply with the standard demo header file. */
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return xReturn;
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}
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/*-----------------------------------------------------------*/
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signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
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{
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/* The port handle is not required as this driver only supports one port. */
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( void ) pxPort;
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/* Get the next character from the buffer. Return false if no characters
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are available, or arrive before xBlockTime expires. */
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if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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{
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return pdTRUE;
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}
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else
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{
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return pdFALSE;
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}
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}
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/*-----------------------------------------------------------*/
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void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength )
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{
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signed portCHAR *pxNext;
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/* A couple of parameters that this port does not use. */
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( void ) usStringLength;
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( void ) pxPort;
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/* NOTE: This implementation does not handle the queue being full as no
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block time is used! */
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/* The port handle is not required as this driver only supports UART1. */
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( void ) pxPort;
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/* Send each character in the string, one at a time. */
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pxNext = ( signed portCHAR * ) pcString;
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while( *pxNext )
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{
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xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
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pxNext++;
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}
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}
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/*-----------------------------------------------------------*/
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signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
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{
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portBASE_TYPE xReturn;
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portENTER_CRITICAL();
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{
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/* Can we write to the FIFO? */
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if( UART1->FR & serTX_FIFO_FULL )
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{
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/* Wait for the interrupt letting us know there is space on the
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FIFO. It is ok to block in a critical section, interrupts will be
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enabled for other tasks once we force a switch. */
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lTaskWaiting = pdTRUE;
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/* Just to be a bit different this driver uses a semaphore to
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block the sending task when the FIFO is full. The standard COMTest
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task assumes a queue of adequate length exists so does not use
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a block time. For this demo the block time is therefore hard
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coded. */
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xReturn = xSemaphoreTake( xTxFIFOSemaphore, serTX_BLOCK_TIME );
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if( xReturn )
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{
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UART1->DR = cOutChar;
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}
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}
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else
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{
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UART1->DR = cOutChar;
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xReturn = pdPASS;
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}
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}
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portEXIT_CRITICAL();
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return xReturn;
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}
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/*-----------------------------------------------------------*/
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void vSerialClose( xComPortHandle xPort )
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{
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/* Not supported as not required by the demo application. */
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}
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/*-----------------------------------------------------------*/
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void UART1_IRQHandler( void )
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{
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signed portCHAR cChar;
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portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
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while( UART1->RIS & mainRXRIS )
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{
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/* The interrupt was caused by a character being received. Grab the
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character from the DR and place it in the queue of received
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characters. */
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cChar = UART1->DR;
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xTaskWokenByPost = xQueueSendFromISR( xRxedChars, &cChar, xTaskWokenByPost );
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}
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if( UART1->RIS & mainTXRIS )
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{
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if( lTaskWaiting == pdTRUE )
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{
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/* This interrupt was caused by space becoming available on the Tx
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FIFO, wake any task that is waiting to post (if any). */
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xTaskWokenByTx = xSemaphoreGiveFromISR( xTxFIFOSemaphore, xTaskWokenByTx );
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lTaskWaiting = pdFALSE;
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}
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UART1->ICR = mainTXRIS;
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}
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/* If a task was woken by either a character being received or a character
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being transmitted then we may need to switch to another task. */
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portEND_SWITCHING_ISR( ( xTaskWokenByPost || xTaskWokenByTx ) );
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}
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